rtw88: update Realtek's rtw88 driver
This version is based on git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git e5f0a698b34ed76002dc5cff3804a61c80233a7a ( tag: v6.17 ). MFC after: 3 days
This commit is contained in:
@@ -94,6 +94,15 @@ rtw88_8821au-objs := rtw8821au.o
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obj-$(CONFIG_RTW88_8812AU) += rtw88_8812au.o
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rtw88_8812au-objs := rtw8812au.o
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obj-$(CONFIG_RTW88_8814A) += rtw88_8814a.o
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rtw88_8814a-objs := rtw8814a.o rtw8814a_table.o
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obj-$(CONFIG_RTW88_8814AE) += rtw88_8814ae.o
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rtw88_8814ae-objs := rtw8814ae.o
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obj-$(CONFIG_RTW88_8814AU) += rtw88_8814au.o
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rtw88_8814au-objs := rtw8814au.o
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obj-$(CONFIG_RTW88_PCI) += rtw88_pci.o
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rtw88_pci-objs := pci.o
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@@ -309,7 +309,7 @@ static void rtw_coex_tdma_timer_base(struct rtw_dev *rtwdev, u8 type)
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{
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struct rtw_coex *coex = &rtwdev->coex;
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struct rtw_coex_stat *coex_stat = &coex->stat;
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u8 para[2] = {0};
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u8 para[6] = {};
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u8 times;
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u16 tbtt_interval = coex_stat->wl_beacon_interval;
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@@ -1501,28 +1501,28 @@ static u8 rtw_coex_algorithm(struct rtw_dev *rtwdev)
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algorithm = COEX_ALGO_HFP;
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break;
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case BPM_HID:
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case BPM_HFP + BPM_HID:
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case BPM_HFP | BPM_HID:
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algorithm = COEX_ALGO_HID;
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break;
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case BPM_HFP + BPM_A2DP:
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case BPM_HID + BPM_A2DP:
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case BPM_HFP + BPM_HID + BPM_A2DP:
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case BPM_HFP | BPM_A2DP:
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case BPM_HID | BPM_A2DP:
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case BPM_HFP | BPM_HID | BPM_A2DP:
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algorithm = COEX_ALGO_A2DP_HID;
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break;
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case BPM_HFP + BPM_PAN:
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case BPM_HID + BPM_PAN:
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case BPM_HFP + BPM_HID + BPM_PAN:
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case BPM_HFP | BPM_PAN:
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case BPM_HID | BPM_PAN:
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case BPM_HFP | BPM_HID | BPM_PAN:
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algorithm = COEX_ALGO_PAN_HID;
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break;
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case BPM_HFP + BPM_A2DP + BPM_PAN:
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case BPM_HID + BPM_A2DP + BPM_PAN:
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case BPM_HFP + BPM_HID + BPM_A2DP + BPM_PAN:
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case BPM_HFP | BPM_A2DP | BPM_PAN:
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case BPM_HID | BPM_A2DP | BPM_PAN:
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case BPM_HFP | BPM_HID | BPM_A2DP | BPM_PAN:
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algorithm = COEX_ALGO_A2DP_PAN_HID;
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break;
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case BPM_PAN:
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algorithm = COEX_ALGO_PAN;
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break;
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case BPM_A2DP + BPM_PAN:
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case BPM_A2DP | BPM_PAN:
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algorithm = COEX_ALGO_A2DP_PAN;
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break;
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case BPM_A2DP:
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@@ -654,10 +654,10 @@ static void rtw_print_rate(struct seq_file *m, u8 rate)
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case DESC_RATE6M...DESC_RATE54M:
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rtw_print_ofdm_rate_txt(m, rate);
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break;
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case DESC_RATEMCS0...DESC_RATEMCS15:
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case DESC_RATEMCS0...DESC_RATEMCS31:
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rtw_print_ht_rate_txt(m, rate);
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break;
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case DESC_RATEVHT1SS_MCS0...DESC_RATEVHT2SS_MCS9:
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case DESC_RATEVHT1SS_MCS0...DESC_RATEVHT4SS_MCS9:
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rtw_print_vht_rate_txt(m, rate);
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break;
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default:
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@@ -692,9 +692,11 @@ static int rtw_debugfs_get_tx_pwr_tbl(struct seq_file *m, void *v)
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{
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struct rtw_debugfs_priv *debugfs_priv = m->private;
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struct rtw_dev *rtwdev = debugfs_priv->rtwdev;
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struct rtw_hal *hal = &rtwdev->hal;
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u8 path, rate, bw, ch, regd;
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struct rtw_power_params pwr_param = {0};
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struct rtw_hal *hal = &rtwdev->hal;
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u8 nss = rtwdev->efuse.hw_cap.nss;
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u8 path, rate, bw, ch, regd;
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u8 max_ht_rate, max_rate;
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mutex_lock(&rtwdev->mutex);
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bw = hal->current_band_width;
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@@ -707,19 +709,23 @@ static int rtw_debugfs_get_tx_pwr_tbl(struct seq_file *m, void *v)
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seq_printf(m, "%-4s %-10s %-9s %-9s (%-4s %-4s %-4s) %-4s\n",
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"path", "rate", "pwr", "base", "byr", "lmt", "sar", "rem");
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max_ht_rate = DESC_RATEMCS0 + nss * 8 - 1;
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if (rtwdev->chip->vht_supported)
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max_rate = DESC_RATEVHT1SS_MCS0 + nss * 10 - 1;
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else
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max_rate = max_ht_rate;
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mutex_lock(&hal->tx_power_mutex);
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for (path = RF_PATH_A; path <= RF_PATH_B; path++) {
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for (path = RF_PATH_A; path < hal->rf_path_num; path++) {
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/* there is no CCK rates used in 5G */
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if (hal->current_band_type == RTW_BAND_5G)
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rate = DESC_RATE6M;
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else
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rate = DESC_RATE1M;
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/* now, not support vht 3ss and vht 4ss*/
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for (; rate <= DESC_RATEVHT2SS_MCS9; rate++) {
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/* now, not support ht 3ss and ht 4ss*/
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if (rate > DESC_RATEMCS15 &&
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rate < DESC_RATEVHT1SS_MCS0)
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for (; rate <= max_rate; rate++) {
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if (rate > max_ht_rate && rate <= DESC_RATEMCS31)
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continue;
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rtw_get_tx_power_params(rtwdev, path, rate, bw,
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@@ -849,20 +855,28 @@ static int rtw_debugfs_get_phy_info(struct seq_file *m, void *v)
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last_cnt->num_qry_pkt[rate_id + 9]);
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}
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seq_printf(m, "[RSSI(dBm)] = {%d, %d}\n",
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seq_printf(m, "[RSSI(dBm)] = {%d, %d, %d, %d}\n",
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dm_info->rssi[RF_PATH_A] - 100,
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dm_info->rssi[RF_PATH_B] - 100);
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seq_printf(m, "[Rx EVM(dB)] = {-%d, -%d}\n",
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dm_info->rssi[RF_PATH_B] - 100,
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dm_info->rssi[RF_PATH_C] - 100,
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dm_info->rssi[RF_PATH_D] - 100);
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seq_printf(m, "[Rx EVM(dB)] = {-%d, -%d, -%d, -%d}\n",
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dm_info->rx_evm_dbm[RF_PATH_A],
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dm_info->rx_evm_dbm[RF_PATH_B]);
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seq_printf(m, "[Rx SNR] = {%d, %d}\n",
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dm_info->rx_evm_dbm[RF_PATH_B],
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dm_info->rx_evm_dbm[RF_PATH_C],
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dm_info->rx_evm_dbm[RF_PATH_D]);
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seq_printf(m, "[Rx SNR] = {%d, %d, %d, %d}\n",
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dm_info->rx_snr[RF_PATH_A],
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dm_info->rx_snr[RF_PATH_B]);
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seq_printf(m, "[CFO_tail(KHz)] = {%d, %d}\n",
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dm_info->rx_snr[RF_PATH_B],
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dm_info->rx_snr[RF_PATH_C],
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dm_info->rx_snr[RF_PATH_D]);
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seq_printf(m, "[CFO_tail(KHz)] = {%d, %d, %d, %d}\n",
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dm_info->cfo_tail[RF_PATH_A],
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dm_info->cfo_tail[RF_PATH_B]);
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dm_info->cfo_tail[RF_PATH_B],
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dm_info->cfo_tail[RF_PATH_C],
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dm_info->cfo_tail[RF_PATH_D]);
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if (dm_info->curr_rx_rate >= DESC_RATE11M) {
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if (dm_info->curr_rx_rate >= DESC_RATE6M) {
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seq_puts(m, "[Rx Average Status]:\n");
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seq_printf(m, " * OFDM, EVM: {-%d}, SNR: {%d}\n",
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(u8)ewma_evm_read(&ewma_evm[RTW_EVM_OFDM]),
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@@ -875,6 +889,13 @@ static int rtw_debugfs_get_phy_info(struct seq_file *m, void *v)
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(u8)ewma_evm_read(&ewma_evm[RTW_EVM_2SS_B]),
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(u8)ewma_snr_read(&ewma_snr[RTW_SNR_2SS_A]),
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(u8)ewma_snr_read(&ewma_snr[RTW_SNR_2SS_B]));
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seq_printf(m, " * 3SS, EVM: {-%d, -%d, -%d}, SNR: {%d, %d, %d}\n",
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(u8)ewma_evm_read(&ewma_evm[RTW_EVM_3SS_A]),
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(u8)ewma_evm_read(&ewma_evm[RTW_EVM_3SS_B]),
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(u8)ewma_evm_read(&ewma_evm[RTW_EVM_3SS_C]),
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(u8)ewma_snr_read(&ewma_snr[RTW_SNR_3SS_A]),
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(u8)ewma_snr_read(&ewma_snr[RTW_SNR_3SS_B]),
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(u8)ewma_snr_read(&ewma_snr[RTW_SNR_3SS_C]));
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}
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seq_puts(m, "[Rx Counter]:\n");
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@@ -521,7 +521,7 @@ rtw_fw_send_general_info(struct rtw_dev *rtwdev)
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u8 h2c_pkt[H2C_PKT_SIZE] = {0};
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u16 total_size = H2C_PKT_HDR_SIZE + 4;
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if (rtw_chip_wcpu_11n(rtwdev))
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if (rtw_chip_wcpu_8051(rtwdev))
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return;
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rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_GENERAL_INFO);
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@@ -544,7 +544,7 @@ rtw_fw_send_phydm_info(struct rtw_dev *rtwdev)
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u16 total_size = H2C_PKT_HDR_SIZE + 8;
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u8 fw_rf_type = 0;
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if (rtw_chip_wcpu_11n(rtwdev))
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if (rtw_chip_wcpu_8051(rtwdev))
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return;
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if (hal->rf_type == RF_1T1R)
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@@ -735,6 +735,7 @@ void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
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{
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u8 h2c_pkt[H2C_PKT_SIZE] = {0};
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bool disable_pt = true;
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u32 mask_hi;
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SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO);
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@@ -755,6 +756,20 @@ void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
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si->init_ra_lv = 0;
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rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
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if (rtwdev->chip->id != RTW_CHIP_TYPE_8814A)
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return;
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SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO_HI);
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mask_hi = si->ra_mask >> 32;
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SET_RA_INFO_RA_MASK0(h2c_pkt, (mask_hi & 0xff));
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SET_RA_INFO_RA_MASK1(h2c_pkt, (mask_hi & 0xff00) >> 8);
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SET_RA_INFO_RA_MASK2(h2c_pkt, (mask_hi & 0xff0000) >> 16);
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SET_RA_INFO_RA_MASK3(h2c_pkt, (mask_hi & 0xff000000) >> 24);
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rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
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}
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void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect)
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@@ -1451,7 +1466,7 @@ void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev,
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int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
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u8 *buf, u32 size)
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{
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u8 bckp[2];
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u8 bckp[3];
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u8 val;
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u16 rsvd_pg_head;
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u32 bcn_valid_addr;
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@@ -1463,7 +1478,9 @@ int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
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if (!size)
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return -EINVAL;
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if (rtw_chip_wcpu_11n(rtwdev)) {
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bckp[2] = rtw_read8(rtwdev, REG_BCN_CTRL);
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if (rtw_chip_wcpu_8051(rtwdev)) {
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rtw_write32_set(rtwdev, REG_DWBCN0_CTRL, BIT_BCN_VALID);
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} else {
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pg_addr &= BIT_MASK_BCN_HEAD_1_V1;
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@@ -1476,6 +1493,9 @@ int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
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val |= BIT_ENSWBCN >> 8;
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rtw_write8(rtwdev, REG_CR + 1, val);
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rtw_write8(rtwdev, REG_BCN_CTRL,
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(bckp[2] & ~BIT_EN_BCN_FUNCTION) | BIT_DIS_TSF_UDT);
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if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE) {
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val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2);
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bckp[1] = val;
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@@ -1489,7 +1509,7 @@ int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
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goto restore;
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}
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if (rtw_chip_wcpu_11n(rtwdev)) {
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if (rtw_chip_wcpu_8051(rtwdev)) {
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bcn_valid_addr = REG_DWBCN0_CTRL;
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bcn_valid_mask = BIT_BCN_VALID;
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} else {
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@@ -1506,6 +1526,7 @@ int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
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rsvd_pg_head = rtwdev->fifo.rsvd_boundary;
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rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2,
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rsvd_pg_head | BIT_BCN_VALID_V1);
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rtw_write8(rtwdev, REG_BCN_CTRL, bckp[2]);
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if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE)
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rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, bckp[1]);
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rtw_write8(rtwdev, REG_CR + 1, bckp[0]);
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@@ -557,6 +557,7 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id)
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#define H2C_CMD_DEFAULT_PORT 0x2c
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#define H2C_CMD_RA_INFO 0x40
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#define H2C_CMD_RSSI_MONITOR 0x42
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#define H2C_CMD_RA_INFO_HI 0x46
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#define H2C_CMD_BCN_FILTER_OFFLOAD_P0 0x56
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#define H2C_CMD_BCN_FILTER_OFFLOAD_P1 0x57
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#define H2C_CMD_WL_PHY_INFO 0x58
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@@ -19,6 +19,8 @@ struct rtw_hci_ops {
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void (*link_ps)(struct rtw_dev *rtwdev, bool enter);
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void (*interface_cfg)(struct rtw_dev *rtwdev);
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void (*dynamic_rx_agg)(struct rtw_dev *rtwdev, bool enable);
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void (*write_firmware_page)(struct rtw_dev *rtwdev, u32 page,
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const u8 *data, u32 size);
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int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
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int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
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@@ -79,6 +81,12 @@ static inline void rtw_hci_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
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rtwdev->hci.ops->dynamic_rx_agg(rtwdev, enable);
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}
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static inline void rtw_hci_write_firmware_page(struct rtw_dev *rtwdev, u32 page,
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const u8 *data, u32 size)
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{
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rtwdev->hci.ops->write_firmware_page(rtwdev, page, data, size);
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}
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static inline int
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rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
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{
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+33
-17
@@ -41,7 +41,7 @@ void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
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}
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rtw_write32(rtwdev, REG_WMAC_TRXPTCL_CTL, value32);
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if (rtw_chip_wcpu_11n(rtwdev))
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if (rtw_chip_wcpu_8051(rtwdev))
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return;
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value32 = rtw_read32(rtwdev, REG_AFE_CTRL1) & ~(BIT_MAC_CLK_SEL);
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@@ -67,7 +67,7 @@ static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
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rtw_write8(rtwdev, REG_RSV_CTRL, 0);
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if (rtw_chip_wcpu_11n(rtwdev)) {
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if (rtw_chip_wcpu_8051(rtwdev)) {
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if (rtw_read32(rtwdev, REG_SYS_CFG1) & BIT_LDO)
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rtw_write8(rtwdev, REG_LDO_SWR_CTRL, LDO_SEL);
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else
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@@ -278,7 +278,7 @@ static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on)
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bool cur_pwr;
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int ret;
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if (rtw_chip_wcpu_11ac(rtwdev)) {
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if (rtw_chip_wcpu_3081(rtwdev)) {
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rpwm = rtw_read8(rtwdev, rtwdev->hci.rpwm_addr);
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/* Check FW still exist or not */
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@@ -291,6 +291,7 @@ static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on)
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if (rtw_read8(rtwdev, REG_CR) == 0xea)
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cur_pwr = false;
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else if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB &&
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||||
chip->id != RTW_CHIP_TYPE_8814A &&
|
||||
(rtw_read8(rtwdev, REG_SYS_STATUS1 + 1) & BIT(0)))
|
||||
cur_pwr = false;
|
||||
else
|
||||
@@ -368,7 +369,7 @@ static int __rtw_mac_init_system_cfg_legacy(struct rtw_dev *rtwdev)
|
||||
|
||||
static int rtw_mac_init_system_cfg(struct rtw_dev *rtwdev)
|
||||
{
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
return __rtw_mac_init_system_cfg_legacy(rtwdev);
|
||||
|
||||
return __rtw_mac_init_system_cfg(rtwdev);
|
||||
@@ -784,7 +785,8 @@ static int __rtw_download_firmware(struct rtw_dev *rtwdev,
|
||||
if (!check_firmware_size(data, size))
|
||||
return -EINVAL;
|
||||
|
||||
if (!ltecoex_read_reg(rtwdev, 0x38, <ecoex_bckp))
|
||||
if (rtwdev->chip->ltecoex_addr &&
|
||||
!ltecoex_read_reg(rtwdev, 0x38, <ecoex_bckp))
|
||||
return -EBUSY;
|
||||
|
||||
wlan_cpu_enable(rtwdev, false);
|
||||
@@ -802,7 +804,8 @@ static int __rtw_download_firmware(struct rtw_dev *rtwdev,
|
||||
|
||||
wlan_cpu_enable(rtwdev, true);
|
||||
|
||||
if (!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) {
|
||||
if (rtwdev->chip->ltecoex_addr &&
|
||||
!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) {
|
||||
ret = -EBUSY;
|
||||
goto dlfw_fail;
|
||||
}
|
||||
@@ -853,8 +856,8 @@ static void en_download_firmware_legacy(struct rtw_dev *rtwdev, bool en)
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
write_firmware_page(struct rtw_dev *rtwdev, u32 page, const u8 *data, u32 size)
|
||||
void rtw_write_firmware_page(struct rtw_dev *rtwdev, u32 page,
|
||||
const u8 *data, u32 size)
|
||||
{
|
||||
u32 val32;
|
||||
u32 block_nr;
|
||||
@@ -884,6 +887,7 @@ write_firmware_page(struct rtw_dev *rtwdev, u32 page, const u8 *data, u32 size)
|
||||
rtw_write32(rtwdev, write_addr, le32_to_cpu(remain_data));
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(rtw_write_firmware_page);
|
||||
|
||||
static int
|
||||
download_firmware_legacy(struct rtw_dev *rtwdev, const u8 *data, u32 size)
|
||||
@@ -901,11 +905,13 @@ download_firmware_legacy(struct rtw_dev *rtwdev, const u8 *data, u32 size)
|
||||
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_FWDL_CHK_RPT);
|
||||
|
||||
for (page = 0; page < total_page; page++) {
|
||||
write_firmware_page(rtwdev, page, data, DLFW_PAGE_SIZE_LEGACY);
|
||||
rtw_hci_write_firmware_page(rtwdev, page, data,
|
||||
DLFW_PAGE_SIZE_LEGACY);
|
||||
data += DLFW_PAGE_SIZE_LEGACY;
|
||||
}
|
||||
if (last_page_size)
|
||||
write_firmware_page(rtwdev, page, data, last_page_size);
|
||||
rtw_hci_write_firmware_page(rtwdev, page, data,
|
||||
last_page_size);
|
||||
|
||||
if (!check_hw_ready(rtwdev, REG_MCUFW_CTRL, BIT_FWDL_CHK_RPT, 1)) {
|
||||
rtw_err(rtwdev, "failed to check download firmware report\n");
|
||||
@@ -975,7 +981,7 @@ static int __rtw_download_firmware_legacy(struct rtw_dev *rtwdev,
|
||||
static
|
||||
int _rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw)
|
||||
{
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
return __rtw_download_firmware_legacy(rtwdev, fw);
|
||||
|
||||
return __rtw_download_firmware(rtwdev, fw);
|
||||
@@ -1116,7 +1122,7 @@ static int txdma_queue_mapping(struct rtw_dev *rtwdev)
|
||||
|
||||
rtw_write8(rtwdev, REG_CR, 0);
|
||||
rtw_write8(rtwdev, REG_CR, MAC_TRX_ENABLE);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL);
|
||||
|
||||
if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) {
|
||||
@@ -1139,7 +1145,7 @@ int rtw_set_trx_fifo_info(struct rtw_dev *rtwdev)
|
||||
/* config rsvd page num */
|
||||
fifo->rsvd_drv_pg_num = chip->rsvd_drv_pg_num;
|
||||
fifo->txff_pg_num = chip->txff_size / chip->page_size;
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
fifo->rsvd_pg_num = fifo->rsvd_drv_pg_num;
|
||||
else
|
||||
fifo->rsvd_pg_num = fifo->rsvd_drv_pg_num +
|
||||
@@ -1157,7 +1163,7 @@ int rtw_set_trx_fifo_info(struct rtw_dev *rtwdev)
|
||||
fifo->rsvd_boundary = fifo->txff_pg_num - fifo->rsvd_pg_num;
|
||||
|
||||
cur_pg_addr = fifo->txff_pg_num;
|
||||
if (rtw_chip_wcpu_11ac(rtwdev)) {
|
||||
if (rtw_chip_wcpu_3081(rtwdev)) {
|
||||
cur_pg_addr -= csi_buf_pg_num;
|
||||
fifo->rsvd_csibuf_addr = cur_pg_addr;
|
||||
cur_pg_addr -= RSVD_PG_FW_TXBUF_NUM;
|
||||
@@ -1286,7 +1292,7 @@ static int priority_queue_cfg(struct rtw_dev *rtwdev)
|
||||
|
||||
pubq_num = fifo->acq_pg_num - pg_tbl->hq_num - pg_tbl->lq_num -
|
||||
pg_tbl->nq_num - pg_tbl->exq_num - pg_tbl->gapq_num;
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
return __priority_queue_cfg_legacy(rtwdev, pg_tbl, pubq_num);
|
||||
else
|
||||
return __priority_queue_cfg(rtwdev, pg_tbl, pubq_num);
|
||||
@@ -1302,7 +1308,7 @@ static int init_h2c(struct rtw_dev *rtwdev)
|
||||
u32 h2cq_free;
|
||||
u32 wp, rp;
|
||||
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
return 0;
|
||||
|
||||
h2cq_addr = fifo->rsvd_h2cq_addr << TX_PAGE_SIZE_SHIFT;
|
||||
@@ -1369,7 +1375,7 @@ static int rtw_drv_info_cfg(struct rtw_dev *rtwdev)
|
||||
u8 value8;
|
||||
|
||||
rtw_write8(rtwdev, REG_RX_DRVINFO_SZ, PHY_STATUS_SIZE);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev)) {
|
||||
if (rtw_chip_wcpu_3081(rtwdev)) {
|
||||
value8 = rtw_read8(rtwdev, REG_TRXFF_BNDY + 1);
|
||||
value8 &= 0xF0;
|
||||
/* For rxdesc len = 0 issue */
|
||||
@@ -1403,3 +1409,13 @@ int rtw_mac_init(struct rtw_dev *rtwdev)
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int rtw_mac_postinit(struct rtw_dev *rtwdev)
|
||||
{
|
||||
const struct rtw_chip_info *chip = rtwdev->chip;
|
||||
|
||||
if (!chip->ops->mac_postinit)
|
||||
return 0;
|
||||
|
||||
return chip->ops->mac_postinit(rtwdev);
|
||||
}
|
||||
|
||||
@@ -34,8 +34,11 @@ int rtw_pwr_seq_parser(struct rtw_dev *rtwdev,
|
||||
const struct rtw_pwr_seq_cmd * const *cmd_seq);
|
||||
int rtw_mac_power_on(struct rtw_dev *rtwdev);
|
||||
void rtw_mac_power_off(struct rtw_dev *rtwdev);
|
||||
void rtw_write_firmware_page(struct rtw_dev *rtwdev, u32 page,
|
||||
const u8 *data, u32 size);
|
||||
int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw);
|
||||
int rtw_mac_init(struct rtw_dev *rtwdev);
|
||||
int rtw_mac_postinit(struct rtw_dev *rtwdev);
|
||||
void rtw_mac_flush_queues(struct rtw_dev *rtwdev, u32 queues, bool drop);
|
||||
int rtw_set_trx_fifo_info(struct rtw_dev *rtwdev);
|
||||
int rtw_ddma_to_fw_fifo(struct rtw_dev *rtwdev, u32 ocp_src, u32 size);
|
||||
|
||||
@@ -71,7 +71,7 @@ static void rtw_ops_stop(struct ieee80211_hw *hw, bool suspend)
|
||||
mutex_unlock(&rtwdev->mutex);
|
||||
}
|
||||
|
||||
static int rtw_ops_config(struct ieee80211_hw *hw, u32 changed)
|
||||
static int rtw_ops_config(struct ieee80211_hw *hw, int radio_idx, u32 changed)
|
||||
{
|
||||
struct rtw_dev *rtwdev = hw->priv;
|
||||
int ret = 0;
|
||||
@@ -411,6 +411,8 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw,
|
||||
if (rtw_bf_support)
|
||||
rtw_bf_assoc(rtwdev, vif, conf);
|
||||
|
||||
rtw_set_ampdu_factor(rtwdev, vif, conf);
|
||||
|
||||
rtw_fw_beacon_filter_config(rtwdev, true, vif);
|
||||
} else {
|
||||
rtw_leave_lps(rtwdev);
|
||||
@@ -721,7 +723,8 @@ static void rtw_ops_mgd_prepare_tx(struct ieee80211_hw *hw,
|
||||
mutex_unlock(&rtwdev->mutex);
|
||||
}
|
||||
|
||||
static int rtw_ops_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
||||
static int rtw_ops_set_rts_threshold(struct ieee80211_hw *hw, int radio_idx,
|
||||
u32 value)
|
||||
{
|
||||
struct rtw_dev *rtwdev = hw->priv;
|
||||
|
||||
@@ -810,6 +813,7 @@ static int rtw_ops_set_bitrate_mask(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
static int rtw_ops_set_antenna(struct ieee80211_hw *hw,
|
||||
int radio_idx,
|
||||
u32 tx_antenna,
|
||||
u32 rx_antenna)
|
||||
{
|
||||
@@ -821,13 +825,14 @@ static int rtw_ops_set_antenna(struct ieee80211_hw *hw,
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
mutex_lock(&rtwdev->mutex);
|
||||
ret = chip->ops->set_antenna(rtwdev, tx_antenna, rx_antenna);
|
||||
ret = chip->ops->set_antenna(rtwdev, -1, tx_antenna, rx_antenna);
|
||||
mutex_unlock(&rtwdev->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rtw_ops_get_antenna(struct ieee80211_hw *hw,
|
||||
int radio_idx,
|
||||
u32 *tx_antenna,
|
||||
u32 *rx_antenna)
|
||||
{
|
||||
|
||||
@@ -207,7 +207,7 @@ u16 rtw_desc_to_bitrate(u8 desc_rate)
|
||||
return rate.bitrate;
|
||||
}
|
||||
|
||||
static struct ieee80211_supported_band rtw_band_2ghz = {
|
||||
static const struct ieee80211_supported_band rtw_band_2ghz = {
|
||||
.band = NL80211_BAND_2GHZ,
|
||||
|
||||
.channels = rtw_channeltable_2g,
|
||||
@@ -220,7 +220,7 @@ static struct ieee80211_supported_band rtw_band_2ghz = {
|
||||
.vht_cap = {0},
|
||||
};
|
||||
|
||||
static struct ieee80211_supported_band rtw_band_5ghz = {
|
||||
static const struct ieee80211_supported_band rtw_band_5ghz = {
|
||||
.band = NL80211_BAND_5GHZ,
|
||||
|
||||
.channels = rtw_channeltable_5g,
|
||||
@@ -420,7 +420,7 @@ int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
|
||||
struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
|
||||
int i;
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_STATION) {
|
||||
if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
|
||||
si->mac_id = rtwvif->mac_id;
|
||||
} else {
|
||||
si->mac_id = rtw_acquire_macid(rtwdev);
|
||||
@@ -462,7 +462,7 @@ void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
|
||||
|
||||
cancel_work_sync(&si->rc_work);
|
||||
|
||||
if (vif->type != NL80211_IFTYPE_STATION)
|
||||
if (vif->type != NL80211_IFTYPE_STATION || sta->tdls)
|
||||
rtw_release_macid(rtwdev, si->mac_id);
|
||||
if (fw_exist)
|
||||
rtw_fw_media_status_report(rtwdev, si->mac_id, false);
|
||||
@@ -717,6 +717,7 @@ void rtw_fw_recovery(struct rtw_dev *rtwdev)
|
||||
if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
|
||||
ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
|
||||
}
|
||||
EXPORT_SYMBOL(rtw_fw_recovery);
|
||||
|
||||
static void __fw_recovery_work(struct rtw_dev *rtwdev)
|
||||
{
|
||||
@@ -1315,7 +1316,9 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
|
||||
if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
|
||||
ldpc_en = VHT_LDPC_EN;
|
||||
} else if (sta->deflink.ht_cap.ht_supported) {
|
||||
ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
|
||||
ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 36) |
|
||||
((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 28) |
|
||||
(sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
|
||||
(sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
|
||||
if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
|
||||
stbc_en = HT_STBC_EN;
|
||||
@@ -1325,6 +1328,9 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
|
||||
|
||||
if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
|
||||
ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
|
||||
else if (efuse->hw_cap.nss == 2)
|
||||
ra_mask &= RA_MASK_VHT_RATES_2SS | RA_MASK_HT_RATES_2SS |
|
||||
RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
|
||||
|
||||
if (hal->current_band_type == RTW_BAND_5G) {
|
||||
ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
|
||||
@@ -1387,10 +1393,9 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
|
||||
break;
|
||||
}
|
||||
|
||||
if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000)
|
||||
tx_num = 2;
|
||||
else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000)
|
||||
tx_num = 2;
|
||||
if (sta->deflink.vht_cap.vht_supported ||
|
||||
sta->deflink.ht_cap.ht_supported)
|
||||
tx_num = efuse->hw_cap.nss;
|
||||
|
||||
rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
|
||||
|
||||
@@ -1492,6 +1497,12 @@ int rtw_power_on(struct rtw_dev *rtwdev)
|
||||
|
||||
chip->ops->phy_set_param(rtwdev);
|
||||
|
||||
ret = rtw_mac_postinit(rtwdev);
|
||||
if (ret) {
|
||||
rtw_err(rtwdev, "failed to configure mac in postinit\n");
|
||||
goto err_off;
|
||||
}
|
||||
|
||||
ret = rtw_hci_start(rtwdev);
|
||||
if (ret) {
|
||||
rtw_err(rtwdev, "failed to start hci\n");
|
||||
@@ -1646,6 +1657,7 @@ static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
|
||||
{
|
||||
const struct rtw_chip_info *chip = rtwdev->chip;
|
||||
struct rtw_efuse *efuse = &rtwdev->efuse;
|
||||
int i;
|
||||
|
||||
ht_cap->ht_supported = true;
|
||||
ht_cap->cap = 0;
|
||||
@@ -1665,25 +1677,20 @@ static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
|
||||
ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
|
||||
ht_cap->ampdu_density = chip->ampdu_density;
|
||||
ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
|
||||
if (efuse->hw_cap.nss > 1) {
|
||||
ht_cap->mcs.rx_mask[0] = 0xFF;
|
||||
ht_cap->mcs.rx_mask[1] = 0xFF;
|
||||
ht_cap->mcs.rx_mask[4] = 0x01;
|
||||
ht_cap->mcs.rx_highest = cpu_to_le16(300);
|
||||
} else {
|
||||
ht_cap->mcs.rx_mask[0] = 0xFF;
|
||||
ht_cap->mcs.rx_mask[1] = 0x00;
|
||||
ht_cap->mcs.rx_mask[4] = 0x01;
|
||||
ht_cap->mcs.rx_highest = cpu_to_le16(150);
|
||||
}
|
||||
|
||||
for (i = 0; i < efuse->hw_cap.nss; i++)
|
||||
ht_cap->mcs.rx_mask[i] = 0xFF;
|
||||
ht_cap->mcs.rx_mask[4] = 0x01;
|
||||
ht_cap->mcs.rx_highest = cpu_to_le16(150 * efuse->hw_cap.nss);
|
||||
}
|
||||
|
||||
static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
|
||||
struct ieee80211_sta_vht_cap *vht_cap)
|
||||
{
|
||||
struct rtw_efuse *efuse = &rtwdev->efuse;
|
||||
u16 mcs_map;
|
||||
u16 mcs_map = 0;
|
||||
__le16 highest;
|
||||
int i;
|
||||
|
||||
if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
|
||||
efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
|
||||
@@ -1706,21 +1713,15 @@ static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
|
||||
if (rtw_chip_has_rx_ldpc(rtwdev))
|
||||
vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
|
||||
|
||||
mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
|
||||
IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
|
||||
if (efuse->hw_cap.nss > 1) {
|
||||
highest = cpu_to_le16(780);
|
||||
mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
|
||||
} else {
|
||||
highest = cpu_to_le16(390);
|
||||
mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (i < efuse->hw_cap.nss)
|
||||
mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
|
||||
else
|
||||
mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
|
||||
}
|
||||
|
||||
highest = cpu_to_le16(390 * efuse->hw_cap.nss);
|
||||
|
||||
vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
|
||||
vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
|
||||
vht_cap->vht_mcs.rx_highest = highest;
|
||||
@@ -1872,7 +1873,7 @@ static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
|
||||
static void update_firmware_info(struct rtw_dev *rtwdev,
|
||||
struct rtw_fw_state *fw)
|
||||
{
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
__update_firmware_info_legacy(rtwdev, fw);
|
||||
else
|
||||
__update_firmware_info(rtwdev, fw);
|
||||
@@ -2329,7 +2330,6 @@ EXPORT_SYMBOL(rtw_core_deinit);
|
||||
|
||||
int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
|
||||
{
|
||||
bool sta_mode_only = rtwdev->hci.type == RTW_HCI_TYPE_SDIO;
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
int max_tx_headroom = 0;
|
||||
int ret;
|
||||
@@ -2353,17 +2353,15 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
|
||||
ieee80211_hw_set(hw, SUPPORTS_PS);
|
||||
ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
|
||||
ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
|
||||
ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
|
||||
if (rtwdev->chip->amsdu_in_ampdu)
|
||||
ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
|
||||
ieee80211_hw_set(hw, HAS_RATE_CONTROL);
|
||||
ieee80211_hw_set(hw, TX_AMSDU);
|
||||
ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
|
||||
|
||||
if (sta_mode_only)
|
||||
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
|
||||
else
|
||||
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_AP) |
|
||||
BIT(NL80211_IFTYPE_ADHOC);
|
||||
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_AP) |
|
||||
BIT(NL80211_IFTYPE_ADHOC);
|
||||
hw->wiphy->available_antennas_tx = hal->antenna_tx;
|
||||
hw->wiphy->available_antennas_rx = hal->antenna_rx;
|
||||
|
||||
@@ -2374,7 +2372,7 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
|
||||
hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
|
||||
hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
|
||||
|
||||
if (!sta_mode_only && rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
|
||||
if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
|
||||
hw->wiphy->iface_combinations = rtw_iface_combs;
|
||||
hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);
|
||||
}
|
||||
@@ -2558,6 +2556,38 @@ void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)
|
||||
}
|
||||
}
|
||||
|
||||
void rtw_set_ampdu_factor(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
|
||||
struct ieee80211_bss_conf *bss_conf)
|
||||
{
|
||||
const struct rtw_chip_ops *ops = rtwdev->chip->ops;
|
||||
struct ieee80211_sta *sta;
|
||||
u8 factor = 0xff;
|
||||
|
||||
if (!ops->set_ampdu_factor)
|
||||
return;
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
sta = ieee80211_find_sta(vif, bss_conf->bssid);
|
||||
if (!sta) {
|
||||
rcu_read_unlock();
|
||||
rtw_warn(rtwdev, "%s: failed to find station %pM\n",
|
||||
__func__, bss_conf->bssid);
|
||||
return;
|
||||
}
|
||||
|
||||
if (sta->deflink.vht_cap.vht_supported)
|
||||
factor = u32_get_bits(sta->deflink.vht_cap.cap,
|
||||
IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);
|
||||
else if (sta->deflink.ht_cap.ht_supported)
|
||||
factor = sta->deflink.ht_cap.ampdu_factor;
|
||||
|
||||
rcu_read_unlock();
|
||||
|
||||
if (factor != 0xff)
|
||||
ops->set_ampdu_factor(rtwdev, factor);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Realtek Corporation");
|
||||
MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
||||
@@ -70,7 +70,7 @@ enum rtw_hci_type {
|
||||
};
|
||||
|
||||
struct rtw_hci {
|
||||
struct rtw_hci_ops *ops;
|
||||
const struct rtw_hci_ops *ops;
|
||||
enum rtw_hci_type type;
|
||||
|
||||
u32 rpwm_addr;
|
||||
@@ -175,9 +175,14 @@ enum rtw_rate_section {
|
||||
RTW_RATE_SECTION_HT_2S,
|
||||
RTW_RATE_SECTION_VHT_1S,
|
||||
RTW_RATE_SECTION_VHT_2S,
|
||||
__RTW_RATE_SECTION_2SS_MAX = RTW_RATE_SECTION_VHT_2S,
|
||||
RTW_RATE_SECTION_HT_3S,
|
||||
RTW_RATE_SECTION_HT_4S,
|
||||
RTW_RATE_SECTION_VHT_3S,
|
||||
RTW_RATE_SECTION_VHT_4S,
|
||||
|
||||
/* keep last */
|
||||
RTW_RATE_SECTION_MAX,
|
||||
RTW_RATE_SECTION_NUM,
|
||||
};
|
||||
|
||||
enum rtw_wireless_set {
|
||||
@@ -200,6 +205,7 @@ enum rtw_chip_type {
|
||||
RTW_CHIP_TYPE_8703B,
|
||||
RTW_CHIP_TYPE_8821A,
|
||||
RTW_CHIP_TYPE_8812A,
|
||||
RTW_CHIP_TYPE_8814A,
|
||||
};
|
||||
|
||||
enum rtw_tx_queue_type {
|
||||
@@ -389,6 +395,9 @@ enum rtw_evm {
|
||||
RTW_EVM_1SS,
|
||||
RTW_EVM_2SS_A,
|
||||
RTW_EVM_2SS_B,
|
||||
RTW_EVM_3SS_A,
|
||||
RTW_EVM_3SS_B,
|
||||
RTW_EVM_3SS_C,
|
||||
/* keep it last */
|
||||
RTW_EVM_NUM
|
||||
};
|
||||
@@ -406,6 +415,10 @@ enum rtw_snr {
|
||||
RTW_SNR_2SS_B,
|
||||
RTW_SNR_2SS_C,
|
||||
RTW_SNR_2SS_D,
|
||||
RTW_SNR_3SS_A,
|
||||
RTW_SNR_3SS_B,
|
||||
RTW_SNR_3SS_C,
|
||||
RTW_SNR_3SS_D,
|
||||
/* keep it last */
|
||||
RTW_SNR_NUM
|
||||
};
|
||||
@@ -831,7 +844,7 @@ struct rtw_vif {
|
||||
};
|
||||
|
||||
struct rtw_regulatory {
|
||||
char alpha2[2];
|
||||
char alpha2[2] __nonstring;
|
||||
u8 txpwr_regd_2g;
|
||||
u8 txpwr_regd_5g;
|
||||
};
|
||||
@@ -854,6 +867,7 @@ struct rtw_chip_ops {
|
||||
int (*power_on)(struct rtw_dev *rtwdev);
|
||||
void (*power_off)(struct rtw_dev *rtwdev);
|
||||
int (*mac_init)(struct rtw_dev *rtwdev);
|
||||
int (*mac_postinit)(struct rtw_dev *rtwdev);
|
||||
int (*dump_fw_crash)(struct rtw_dev *rtwdev);
|
||||
void (*shutdown)(struct rtw_dev *rtwdev);
|
||||
int (*read_efuse)(struct rtw_dev *rtwdev, u8 *map);
|
||||
@@ -869,11 +883,12 @@ struct rtw_chip_ops {
|
||||
void (*set_tx_power_index)(struct rtw_dev *rtwdev);
|
||||
int (*rsvd_page_dump)(struct rtw_dev *rtwdev, u8 *buf, u32 offset,
|
||||
u32 size);
|
||||
int (*set_antenna)(struct rtw_dev *rtwdev,
|
||||
int (*set_antenna)(struct rtw_dev *rtwdev, int radio_idx,
|
||||
u32 antenna_tx,
|
||||
u32 antenna_rx);
|
||||
void (*cfg_ldo25)(struct rtw_dev *rtwdev, bool enable);
|
||||
void (*efuse_grant)(struct rtw_dev *rtwdev, bool enable);
|
||||
void (*set_ampdu_factor)(struct rtw_dev *rtwdev, u8 factor);
|
||||
void (*false_alarm_statistics)(struct rtw_dev *rtwdev);
|
||||
void (*phy_calibration)(struct rtw_dev *rtwdev);
|
||||
void (*dpk_track)(struct rtw_dev *rtwdev);
|
||||
@@ -1139,14 +1154,26 @@ struct rtw_rfe_def {
|
||||
* For 2G there are cck rate and ofdm rate with different settings.
|
||||
*/
|
||||
struct rtw_pwr_track_tbl {
|
||||
const u8 *pwrtrk_5gd_n[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5gd_p[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5gc_n[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5gc_p[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5gb_n[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5gb_p[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5ga_n[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_5ga_p[RTW_PWR_TRK_5G_NUM];
|
||||
const u8 *pwrtrk_2gd_n;
|
||||
const u8 *pwrtrk_2gd_p;
|
||||
const u8 *pwrtrk_2gc_n;
|
||||
const u8 *pwrtrk_2gc_p;
|
||||
const u8 *pwrtrk_2gb_n;
|
||||
const u8 *pwrtrk_2gb_p;
|
||||
const u8 *pwrtrk_2ga_n;
|
||||
const u8 *pwrtrk_2ga_p;
|
||||
const u8 *pwrtrk_2g_cckd_n;
|
||||
const u8 *pwrtrk_2g_cckd_p;
|
||||
const u8 *pwrtrk_2g_cckc_n;
|
||||
const u8 *pwrtrk_2g_cckc_p;
|
||||
const u8 *pwrtrk_2g_cckb_n;
|
||||
const u8 *pwrtrk_2g_cckb_p;
|
||||
const u8 *pwrtrk_2g_ccka_n;
|
||||
@@ -1156,8 +1183,8 @@ struct rtw_pwr_track_tbl {
|
||||
};
|
||||
|
||||
enum rtw_wlan_cpu {
|
||||
RTW_WCPU_11AC,
|
||||
RTW_WCPU_11N,
|
||||
RTW_WCPU_3081,
|
||||
RTW_WCPU_8051,
|
||||
};
|
||||
|
||||
enum rtw_fw_fifo_sel {
|
||||
@@ -1213,6 +1240,7 @@ struct rtw_chip_info {
|
||||
u16 fw_fifo_addr[RTW_FW_FIFO_MAX];
|
||||
const struct rtw_fwcd_segs *fwcd_segs;
|
||||
|
||||
bool amsdu_in_ampdu;
|
||||
u8 usb_tx_agg_desc_num;
|
||||
bool hw_feature_report;
|
||||
u8 c2h_ra_report_size;
|
||||
@@ -1236,8 +1264,8 @@ struct rtw_chip_info {
|
||||
|
||||
const struct rtw_hw_reg *dig;
|
||||
const struct rtw_hw_reg *dig_cck;
|
||||
u32 rf_base_addr[2];
|
||||
u32 rf_sipi_addr[2];
|
||||
u32 rf_base_addr[RTW_RF_PATH_MAX];
|
||||
u32 rf_sipi_addr[RTW_RF_PATH_MAX];
|
||||
const struct rtw_rf_sipi_addr *rf_sipi_read_addr;
|
||||
u8 fix_rf_phy_num;
|
||||
const struct rtw_ltecoex_addr *ltecoex_addr;
|
||||
@@ -1933,7 +1961,7 @@ union rtw_sar_cfg {
|
||||
|
||||
struct rtw_sar {
|
||||
enum rtw_sar_sources src;
|
||||
union rtw_sar_cfg cfg[RTW_RF_PATH_MAX][RTW_RATE_SECTION_MAX];
|
||||
union rtw_sar_cfg cfg[RTW_RF_PATH_MAX][RTW_RATE_SECTION_NUM];
|
||||
};
|
||||
|
||||
struct rtw_hal {
|
||||
@@ -1977,16 +2005,16 @@ struct rtw_hal {
|
||||
s8 tx_pwr_by_rate_offset_5g[RTW_RF_PATH_MAX]
|
||||
[DESC_RATE_MAX];
|
||||
s8 tx_pwr_by_rate_base_2g[RTW_RF_PATH_MAX]
|
||||
[RTW_RATE_SECTION_MAX];
|
||||
[RTW_RATE_SECTION_NUM];
|
||||
s8 tx_pwr_by_rate_base_5g[RTW_RF_PATH_MAX]
|
||||
[RTW_RATE_SECTION_MAX];
|
||||
[RTW_RATE_SECTION_NUM];
|
||||
s8 tx_pwr_limit_2g[RTW_REGD_MAX]
|
||||
[RTW_CHANNEL_WIDTH_MAX]
|
||||
[RTW_RATE_SECTION_MAX]
|
||||
[RTW_RATE_SECTION_NUM]
|
||||
[RTW_MAX_CHANNEL_NUM_2G];
|
||||
s8 tx_pwr_limit_5g[RTW_REGD_MAX]
|
||||
[RTW_CHANNEL_WIDTH_MAX]
|
||||
[RTW_RATE_SECTION_MAX]
|
||||
[RTW_RATE_SECTION_NUM]
|
||||
[RTW_MAX_CHANNEL_NUM_5G];
|
||||
s8 tx_pwr_tbl[RTW_RF_PATH_MAX]
|
||||
[DESC_RATE_MAX];
|
||||
@@ -2148,14 +2176,14 @@ static inline void rtw_chip_efuse_grant_off(struct rtw_dev *rtwdev)
|
||||
rtwdev->chip->ops->efuse_grant(rtwdev, false);
|
||||
}
|
||||
|
||||
static inline bool rtw_chip_wcpu_11n(struct rtw_dev *rtwdev)
|
||||
static inline bool rtw_chip_wcpu_8051(struct rtw_dev *rtwdev)
|
||||
{
|
||||
return rtwdev->chip->wlan_cpu == RTW_WCPU_11N;
|
||||
return rtwdev->chip->wlan_cpu == RTW_WCPU_8051;
|
||||
}
|
||||
|
||||
static inline bool rtw_chip_wcpu_11ac(struct rtw_dev *rtwdev)
|
||||
static inline bool rtw_chip_wcpu_3081(struct rtw_dev *rtwdev)
|
||||
{
|
||||
return rtwdev->chip->wlan_cpu == RTW_WCPU_11AC;
|
||||
return rtwdev->chip->wlan_cpu == RTW_WCPU_3081;
|
||||
}
|
||||
|
||||
static inline bool rtw_chip_has_rx_ldpc(struct rtw_dev *rtwdev)
|
||||
@@ -2256,6 +2284,9 @@ void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
|
||||
void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif);
|
||||
bool rtw_core_check_sta_active(struct rtw_dev *rtwdev);
|
||||
void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable);
|
||||
void rtw_set_ampdu_factor(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
|
||||
struct ieee80211_bss_conf *bss_conf);
|
||||
|
||||
#if defined(__linux__)
|
||||
#define rtw88_static_assert(_x) static_assert(_x)
|
||||
#elif defined(__FreeBSD__)
|
||||
|
||||
@@ -16,6 +16,7 @@
|
||||
#include "fw.h"
|
||||
#include "ps.h"
|
||||
#include "debug.h"
|
||||
#include "mac.h"
|
||||
#if defined(__FreeBSD__)
|
||||
#include <sys/rman.h>
|
||||
#include <linux/pm.h>
|
||||
@@ -28,7 +29,7 @@ module_param_named(disable_aspm, rtw_pci_disable_aspm, bool, 0644);
|
||||
MODULE_PARM_DESC(disable_msi, "Set Y to disable MSI interrupt support");
|
||||
MODULE_PARM_DESC(disable_aspm, "Set Y to disable PCI ASPM support");
|
||||
|
||||
static u32 rtw_pci_tx_queue_idx_addr[] = {
|
||||
static const u32 rtw_pci_tx_queue_idx_addr[] = {
|
||||
[RTW_TX_QUEUE_BK] = RTK_PCI_TXBD_IDX_BKQ,
|
||||
[RTW_TX_QUEUE_BE] = RTK_PCI_TXBD_IDX_BEQ,
|
||||
[RTW_TX_QUEUE_VI] = RTK_PCI_TXBD_IDX_VIQ,
|
||||
@@ -451,7 +452,7 @@ static void rtw_pci_reset_buf_desc(struct rtw_dev *rtwdev)
|
||||
dma = rtwpci->tx_rings[RTW_TX_QUEUE_BCN].r.dma;
|
||||
rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BCNQ, dma);
|
||||
|
||||
if (!rtw_chip_wcpu_11n(rtwdev)) {
|
||||
if (!rtw_chip_wcpu_8051(rtwdev)) {
|
||||
len = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.len;
|
||||
dma = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.dma;
|
||||
rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.rp = 0;
|
||||
@@ -513,7 +514,7 @@ static void rtw_pci_reset_buf_desc(struct rtw_dev *rtwdev)
|
||||
rtw_write32(rtwdev, RTK_PCI_TXBD_RWPTR_CLR, 0xffffffff);
|
||||
|
||||
/* reset H2C Queue index in a single write */
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
rtw_write32_set(rtwdev, RTK_PCI_TXBD_H2CQ_CSR,
|
||||
BIT_CLR_H2CQ_HOST_IDX | BIT_CLR_H2CQ_HW_IDX);
|
||||
}
|
||||
@@ -533,7 +534,7 @@ static void rtw_pci_enable_interrupt(struct rtw_dev *rtwdev,
|
||||
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0] & ~imr0_unmask);
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR1, rtwpci->irq_mask[1]);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR3, rtwpci->irq_mask[3]);
|
||||
|
||||
rtwpci->irq_enabled = true;
|
||||
@@ -553,7 +554,7 @@ static void rtw_pci_disable_interrupt(struct rtw_dev *rtwdev,
|
||||
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR0, 0);
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR1, 0);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
rtw_write32(rtwdev, RTK_PCI_HIMR3, 0);
|
||||
|
||||
rtwpci->irq_enabled = false;
|
||||
@@ -1181,7 +1182,7 @@ static void rtw_pci_irq_recognized(struct rtw_dev *rtwdev,
|
||||
|
||||
irq_status[0] = rtw_read32(rtwdev, RTK_PCI_HISR0);
|
||||
irq_status[1] = rtw_read32(rtwdev, RTK_PCI_HISR1);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
irq_status[3] = rtw_read32(rtwdev, RTK_PCI_HISR3);
|
||||
else
|
||||
irq_status[3] = 0;
|
||||
@@ -1190,7 +1191,7 @@ static void rtw_pci_irq_recognized(struct rtw_dev *rtwdev,
|
||||
irq_status[3] &= rtwpci->irq_mask[3];
|
||||
rtw_write32(rtwdev, RTK_PCI_HISR0, irq_status[0]);
|
||||
rtw_write32(rtwdev, RTK_PCI_HISR1, irq_status[1]);
|
||||
if (rtw_chip_wcpu_11ac(rtwdev))
|
||||
if (rtw_chip_wcpu_3081(rtwdev))
|
||||
rtw_write32(rtwdev, RTK_PCI_HISR3, irq_status[3]);
|
||||
|
||||
spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags);
|
||||
@@ -1670,7 +1671,7 @@ static void rtw_pci_destroy(struct rtw_dev *rtwdev, struct pci_dev *pdev)
|
||||
rtw_pci_io_unmapping(rtwdev, pdev);
|
||||
}
|
||||
|
||||
static struct rtw_hci_ops rtw_pci_ops = {
|
||||
static const struct rtw_hci_ops rtw_pci_ops = {
|
||||
.tx_write = rtw_pci_tx_write,
|
||||
.tx_kick_off = rtw_pci_tx_kick_off,
|
||||
.flush_queues = rtw_pci_flush_queues,
|
||||
@@ -1681,6 +1682,7 @@ static struct rtw_hci_ops rtw_pci_ops = {
|
||||
.link_ps = rtw_pci_link_ps,
|
||||
.interface_cfg = rtw_pci_interface_cfg,
|
||||
.dynamic_rx_agg = NULL,
|
||||
.write_firmware_page = rtw_write_firmware_page,
|
||||
|
||||
.read8 = rtw_pci_read8,
|
||||
.read16 = rtw_pci_read16,
|
||||
@@ -1784,6 +1786,43 @@ static void rtw_pci_napi_deinit(struct rtw_dev *rtwdev)
|
||||
free_netdev(rtwpci->netdev);
|
||||
}
|
||||
|
||||
static pci_ers_result_t rtw_pci_io_err_detected(struct pci_dev *pdev,
|
||||
pci_channel_state_t state)
|
||||
{
|
||||
struct net_device *netdev = pci_get_drvdata(pdev);
|
||||
|
||||
netif_device_detach(netdev);
|
||||
|
||||
return PCI_ERS_RESULT_NEED_RESET;
|
||||
}
|
||||
|
||||
static pci_ers_result_t rtw_pci_io_slot_reset(struct pci_dev *pdev)
|
||||
{
|
||||
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
||||
struct rtw_dev *rtwdev = hw->priv;
|
||||
|
||||
rtw_fw_recovery(rtwdev);
|
||||
|
||||
return PCI_ERS_RESULT_RECOVERED;
|
||||
}
|
||||
|
||||
static void rtw_pci_io_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct net_device *netdev = pci_get_drvdata(pdev);
|
||||
|
||||
/* ack any pending wake events, disable PME */
|
||||
pci_enable_wake(pdev, PCI_D0, 0);
|
||||
|
||||
netif_device_attach(netdev);
|
||||
}
|
||||
|
||||
const struct pci_error_handlers rtw_pci_err_handler = {
|
||||
.error_detected = rtw_pci_io_err_detected,
|
||||
.slot_reset = rtw_pci_io_slot_reset,
|
||||
.resume = rtw_pci_io_resume,
|
||||
};
|
||||
EXPORT_SYMBOL(rtw_pci_err_handler);
|
||||
|
||||
int rtw_pci_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *id)
|
||||
{
|
||||
|
||||
@@ -231,6 +231,7 @@ struct rtw_pci {
|
||||
};
|
||||
|
||||
extern const struct dev_pm_ops rtw_pm_ops;
|
||||
extern const struct pci_error_handlers rtw_pci_err_handler;
|
||||
|
||||
int rtw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id);
|
||||
void rtw_pci_remove(struct pci_dev *pdev);
|
||||
|
||||
+148
-67
@@ -52,60 +52,93 @@ static const u32 db_invert_table[12][8] = {
|
||||
1995262315, 2511886432U, 3162277660U, 3981071706U}
|
||||
};
|
||||
|
||||
u8 rtw_cck_rates[] = { DESC_RATE1M, DESC_RATE2M, DESC_RATE5_5M, DESC_RATE11M };
|
||||
u8 rtw_ofdm_rates[] = {
|
||||
const u8 rtw_cck_rates[] = { DESC_RATE1M, DESC_RATE2M, DESC_RATE5_5M, DESC_RATE11M };
|
||||
|
||||
const u8 rtw_ofdm_rates[] = {
|
||||
DESC_RATE6M, DESC_RATE9M, DESC_RATE12M,
|
||||
DESC_RATE18M, DESC_RATE24M, DESC_RATE36M,
|
||||
DESC_RATE48M, DESC_RATE54M
|
||||
};
|
||||
u8 rtw_ht_1s_rates[] = {
|
||||
|
||||
const u8 rtw_ht_1s_rates[] = {
|
||||
DESC_RATEMCS0, DESC_RATEMCS1, DESC_RATEMCS2,
|
||||
DESC_RATEMCS3, DESC_RATEMCS4, DESC_RATEMCS5,
|
||||
DESC_RATEMCS6, DESC_RATEMCS7
|
||||
};
|
||||
u8 rtw_ht_2s_rates[] = {
|
||||
|
||||
const u8 rtw_ht_2s_rates[] = {
|
||||
DESC_RATEMCS8, DESC_RATEMCS9, DESC_RATEMCS10,
|
||||
DESC_RATEMCS11, DESC_RATEMCS12, DESC_RATEMCS13,
|
||||
DESC_RATEMCS14, DESC_RATEMCS15
|
||||
};
|
||||
u8 rtw_vht_1s_rates[] = {
|
||||
|
||||
const u8 rtw_vht_1s_rates[] = {
|
||||
DESC_RATEVHT1SS_MCS0, DESC_RATEVHT1SS_MCS1,
|
||||
DESC_RATEVHT1SS_MCS2, DESC_RATEVHT1SS_MCS3,
|
||||
DESC_RATEVHT1SS_MCS4, DESC_RATEVHT1SS_MCS5,
|
||||
DESC_RATEVHT1SS_MCS6, DESC_RATEVHT1SS_MCS7,
|
||||
DESC_RATEVHT1SS_MCS8, DESC_RATEVHT1SS_MCS9
|
||||
};
|
||||
u8 rtw_vht_2s_rates[] = {
|
||||
|
||||
const u8 rtw_vht_2s_rates[] = {
|
||||
DESC_RATEVHT2SS_MCS0, DESC_RATEVHT2SS_MCS1,
|
||||
DESC_RATEVHT2SS_MCS2, DESC_RATEVHT2SS_MCS3,
|
||||
DESC_RATEVHT2SS_MCS4, DESC_RATEVHT2SS_MCS5,
|
||||
DESC_RATEVHT2SS_MCS6, DESC_RATEVHT2SS_MCS7,
|
||||
DESC_RATEVHT2SS_MCS8, DESC_RATEVHT2SS_MCS9
|
||||
};
|
||||
u8 *rtw_rate_section[RTW_RATE_SECTION_MAX] = {
|
||||
|
||||
const u8 rtw_ht_3s_rates[] = {
|
||||
DESC_RATEMCS16, DESC_RATEMCS17, DESC_RATEMCS18,
|
||||
DESC_RATEMCS19, DESC_RATEMCS20, DESC_RATEMCS21,
|
||||
DESC_RATEMCS22, DESC_RATEMCS23
|
||||
};
|
||||
|
||||
const u8 rtw_ht_4s_rates[] = {
|
||||
DESC_RATEMCS24, DESC_RATEMCS25, DESC_RATEMCS26,
|
||||
DESC_RATEMCS27, DESC_RATEMCS28, DESC_RATEMCS29,
|
||||
DESC_RATEMCS30, DESC_RATEMCS31
|
||||
};
|
||||
|
||||
const u8 rtw_vht_3s_rates[] = {
|
||||
DESC_RATEVHT3SS_MCS0, DESC_RATEVHT3SS_MCS1,
|
||||
DESC_RATEVHT3SS_MCS2, DESC_RATEVHT3SS_MCS3,
|
||||
DESC_RATEVHT3SS_MCS4, DESC_RATEVHT3SS_MCS5,
|
||||
DESC_RATEVHT3SS_MCS6, DESC_RATEVHT3SS_MCS7,
|
||||
DESC_RATEVHT3SS_MCS8, DESC_RATEVHT3SS_MCS9
|
||||
};
|
||||
|
||||
const u8 rtw_vht_4s_rates[] = {
|
||||
DESC_RATEVHT4SS_MCS0, DESC_RATEVHT4SS_MCS1,
|
||||
DESC_RATEVHT4SS_MCS2, DESC_RATEVHT4SS_MCS3,
|
||||
DESC_RATEVHT4SS_MCS4, DESC_RATEVHT4SS_MCS5,
|
||||
DESC_RATEVHT4SS_MCS6, DESC_RATEVHT4SS_MCS7,
|
||||
DESC_RATEVHT4SS_MCS8, DESC_RATEVHT4SS_MCS9
|
||||
};
|
||||
|
||||
const u8 * const rtw_rate_section[RTW_RATE_SECTION_NUM] = {
|
||||
rtw_cck_rates, rtw_ofdm_rates,
|
||||
rtw_ht_1s_rates, rtw_ht_2s_rates,
|
||||
rtw_vht_1s_rates, rtw_vht_2s_rates
|
||||
rtw_vht_1s_rates, rtw_vht_2s_rates,
|
||||
rtw_ht_3s_rates, rtw_ht_4s_rates,
|
||||
rtw_vht_3s_rates, rtw_vht_4s_rates
|
||||
};
|
||||
EXPORT_SYMBOL(rtw_rate_section);
|
||||
|
||||
u8 rtw_rate_size[RTW_RATE_SECTION_MAX] = {
|
||||
const u8 rtw_rate_size[RTW_RATE_SECTION_NUM] = {
|
||||
ARRAY_SIZE(rtw_cck_rates),
|
||||
ARRAY_SIZE(rtw_ofdm_rates),
|
||||
ARRAY_SIZE(rtw_ht_1s_rates),
|
||||
ARRAY_SIZE(rtw_ht_2s_rates),
|
||||
ARRAY_SIZE(rtw_vht_1s_rates),
|
||||
ARRAY_SIZE(rtw_vht_2s_rates)
|
||||
ARRAY_SIZE(rtw_vht_2s_rates),
|
||||
ARRAY_SIZE(rtw_ht_3s_rates),
|
||||
ARRAY_SIZE(rtw_ht_4s_rates),
|
||||
ARRAY_SIZE(rtw_vht_3s_rates),
|
||||
ARRAY_SIZE(rtw_vht_4s_rates)
|
||||
};
|
||||
EXPORT_SYMBOL(rtw_rate_size);
|
||||
|
||||
static const u8 rtw_cck_size = ARRAY_SIZE(rtw_cck_rates);
|
||||
static const u8 rtw_ofdm_size = ARRAY_SIZE(rtw_ofdm_rates);
|
||||
static const u8 rtw_ht_1s_size = ARRAY_SIZE(rtw_ht_1s_rates);
|
||||
static const u8 rtw_ht_2s_size = ARRAY_SIZE(rtw_ht_2s_rates);
|
||||
static const u8 rtw_vht_1s_size = ARRAY_SIZE(rtw_vht_1s_rates);
|
||||
static const u8 rtw_vht_2s_size = ARRAY_SIZE(rtw_vht_2s_rates);
|
||||
|
||||
enum rtw_phy_band_type {
|
||||
PHY_BAND_2G = 0,
|
||||
PHY_BAND_5G = 1,
|
||||
@@ -1590,7 +1623,7 @@ static void rtw_phy_set_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 band,
|
||||
ch_idx = rtw_channel_to_idx(band, ch);
|
||||
|
||||
if (regd >= RTW_REGD_MAX || bw >= RTW_CHANNEL_WIDTH_MAX ||
|
||||
rs >= RTW_RATE_SECTION_MAX || ch_idx < 0) {
|
||||
rs >= RTW_RATE_SECTION_NUM || ch_idx < 0) {
|
||||
WARN(1,
|
||||
"wrong txpwr_lmt regd=%u, band=%u bw=%u, rs=%u, ch_idx=%u, pwr_limit=%d\n",
|
||||
regd, band, bw, rs, ch_idx, pwr_limit);
|
||||
@@ -1634,11 +1667,15 @@ rtw_xref_5g_txpwr_lmt(struct rtw_dev *rtwdev, u8 regd,
|
||||
static void
|
||||
rtw_xref_txpwr_lmt_by_rs(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx)
|
||||
{
|
||||
static const u8 rs_cmp[4][2] = {
|
||||
{RTW_RATE_SECTION_HT_1S, RTW_RATE_SECTION_VHT_1S},
|
||||
{RTW_RATE_SECTION_HT_2S, RTW_RATE_SECTION_VHT_2S},
|
||||
{RTW_RATE_SECTION_HT_3S, RTW_RATE_SECTION_VHT_3S},
|
||||
{RTW_RATE_SECTION_HT_4S, RTW_RATE_SECTION_VHT_4S}
|
||||
};
|
||||
u8 rs_idx, rs_ht, rs_vht;
|
||||
u8 rs_cmp[2][2] = {{RTW_RATE_SECTION_HT_1S, RTW_RATE_SECTION_VHT_1S},
|
||||
{RTW_RATE_SECTION_HT_2S, RTW_RATE_SECTION_VHT_2S} };
|
||||
|
||||
for (rs_idx = 0; rs_idx < 2; rs_idx++) {
|
||||
for (rs_idx = 0; rs_idx < 4; rs_idx++) {
|
||||
rs_ht = rs_cmp[rs_idx][0];
|
||||
rs_vht = rs_cmp[rs_idx][1];
|
||||
|
||||
@@ -1695,7 +1732,7 @@ rtw_cfg_txpwr_lmt_by_alt(struct rtw_dev *rtwdev, u8 regd, u8 regd_alt)
|
||||
u8 bw, rs;
|
||||
|
||||
for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_NUM; rs++)
|
||||
__cfg_txpwr_lmt_by_alt(&rtwdev->hal, regd, regd_alt,
|
||||
bw, rs);
|
||||
}
|
||||
@@ -1959,10 +1996,10 @@ static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
u8 rate, u8 group)
|
||||
{
|
||||
const struct rtw_chip_info *chip = rtwdev->chip;
|
||||
u8 tx_power;
|
||||
bool mcs_rate;
|
||||
bool above_2ss;
|
||||
bool above_2ss, above_3ss, above_4ss;
|
||||
u8 factor = chip->txgi_factor;
|
||||
bool mcs_rate;
|
||||
u8 tx_power;
|
||||
|
||||
if (rate <= DESC_RATE11M)
|
||||
tx_power = pwr_idx_2g->cck_base[group];
|
||||
@@ -1972,11 +2009,15 @@ static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
if (rate >= DESC_RATE6M && rate <= DESC_RATE54M)
|
||||
tx_power += pwr_idx_2g->ht_1s_diff.ofdm * factor;
|
||||
|
||||
mcs_rate = (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
|
||||
mcs_rate = (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT1SS_MCS0 &&
|
||||
rate <= DESC_RATEVHT2SS_MCS9);
|
||||
above_2ss = (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
|
||||
rate <= DESC_RATEVHT4SS_MCS9);
|
||||
above_2ss = (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT2SS_MCS0);
|
||||
above_3ss = (rate >= DESC_RATEMCS16 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT3SS_MCS0);
|
||||
above_4ss = (rate >= DESC_RATEMCS24 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT4SS_MCS0);
|
||||
|
||||
if (!mcs_rate)
|
||||
return tx_power;
|
||||
@@ -1989,11 +2030,19 @@ static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
tx_power += pwr_idx_2g->ht_1s_diff.bw20 * factor;
|
||||
if (above_2ss)
|
||||
tx_power += pwr_idx_2g->ht_2s_diff.bw20 * factor;
|
||||
if (above_3ss)
|
||||
tx_power += pwr_idx_2g->ht_3s_diff.bw20 * factor;
|
||||
if (above_4ss)
|
||||
tx_power += pwr_idx_2g->ht_4s_diff.bw20 * factor;
|
||||
break;
|
||||
case RTW_CHANNEL_WIDTH_40:
|
||||
/* bw40 is the base power */
|
||||
if (above_2ss)
|
||||
tx_power += pwr_idx_2g->ht_2s_diff.bw40 * factor;
|
||||
if (above_3ss)
|
||||
tx_power += pwr_idx_2g->ht_3s_diff.bw40 * factor;
|
||||
if (above_4ss)
|
||||
tx_power += pwr_idx_2g->ht_4s_diff.bw40 * factor;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -2006,19 +2055,23 @@ static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
u8 rate, u8 group)
|
||||
{
|
||||
const struct rtw_chip_info *chip = rtwdev->chip;
|
||||
u8 tx_power;
|
||||
bool above_2ss, above_3ss, above_4ss;
|
||||
u8 factor = chip->txgi_factor;
|
||||
u8 upper, lower;
|
||||
bool mcs_rate;
|
||||
bool above_2ss;
|
||||
u8 factor = chip->txgi_factor;
|
||||
u8 tx_power;
|
||||
|
||||
tx_power = pwr_idx_5g->bw40_base[group];
|
||||
|
||||
mcs_rate = (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
|
||||
mcs_rate = (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT1SS_MCS0 &&
|
||||
rate <= DESC_RATEVHT2SS_MCS9);
|
||||
above_2ss = (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
|
||||
rate <= DESC_RATEVHT4SS_MCS9);
|
||||
above_2ss = (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT2SS_MCS0);
|
||||
above_3ss = (rate >= DESC_RATEMCS16 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT3SS_MCS0);
|
||||
above_4ss = (rate >= DESC_RATEMCS24 && rate <= DESC_RATEMCS31) ||
|
||||
(rate >= DESC_RATEVHT4SS_MCS0);
|
||||
|
||||
if (!mcs_rate) {
|
||||
tx_power += pwr_idx_5g->ht_1s_diff.ofdm * factor;
|
||||
@@ -2033,11 +2086,19 @@ static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
tx_power += pwr_idx_5g->ht_1s_diff.bw20 * factor;
|
||||
if (above_2ss)
|
||||
tx_power += pwr_idx_5g->ht_2s_diff.bw20 * factor;
|
||||
if (above_3ss)
|
||||
tx_power += pwr_idx_5g->ht_3s_diff.bw20 * factor;
|
||||
if (above_4ss)
|
||||
tx_power += pwr_idx_5g->ht_4s_diff.bw20 * factor;
|
||||
break;
|
||||
case RTW_CHANNEL_WIDTH_40:
|
||||
/* bw40 is the base power */
|
||||
if (above_2ss)
|
||||
tx_power += pwr_idx_5g->ht_2s_diff.bw40 * factor;
|
||||
if (above_3ss)
|
||||
tx_power += pwr_idx_5g->ht_3s_diff.bw40 * factor;
|
||||
if (above_4ss)
|
||||
tx_power += pwr_idx_5g->ht_4s_diff.bw40 * factor;
|
||||
break;
|
||||
case RTW_CHANNEL_WIDTH_80:
|
||||
/* the base idx of bw80 is the average of bw40+/bw40- */
|
||||
@@ -2048,13 +2109,17 @@ static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
|
||||
tx_power += pwr_idx_5g->vht_1s_diff.bw80 * factor;
|
||||
if (above_2ss)
|
||||
tx_power += pwr_idx_5g->vht_2s_diff.bw80 * factor;
|
||||
if (above_3ss)
|
||||
tx_power += pwr_idx_5g->vht_3s_diff.bw80 * factor;
|
||||
if (above_4ss)
|
||||
tx_power += pwr_idx_5g->vht_4s_diff.bw80 * factor;
|
||||
break;
|
||||
}
|
||||
|
||||
return tx_power;
|
||||
}
|
||||
|
||||
/* return RTW_RATE_SECTION_MAX to indicate rate is invalid */
|
||||
/* return RTW_RATE_SECTION_NUM to indicate rate is invalid */
|
||||
static u8 rtw_phy_rate_to_rate_section(u8 rate)
|
||||
{
|
||||
if (rate >= DESC_RATE1M && rate <= DESC_RATE11M)
|
||||
@@ -2065,12 +2130,20 @@ static u8 rtw_phy_rate_to_rate_section(u8 rate)
|
||||
return RTW_RATE_SECTION_HT_1S;
|
||||
else if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15)
|
||||
return RTW_RATE_SECTION_HT_2S;
|
||||
else if (rate >= DESC_RATEMCS16 && rate <= DESC_RATEMCS23)
|
||||
return RTW_RATE_SECTION_HT_3S;
|
||||
else if (rate >= DESC_RATEMCS24 && rate <= DESC_RATEMCS31)
|
||||
return RTW_RATE_SECTION_HT_4S;
|
||||
else if (rate >= DESC_RATEVHT1SS_MCS0 && rate <= DESC_RATEVHT1SS_MCS9)
|
||||
return RTW_RATE_SECTION_VHT_1S;
|
||||
else if (rate >= DESC_RATEVHT2SS_MCS0 && rate <= DESC_RATEVHT2SS_MCS9)
|
||||
return RTW_RATE_SECTION_VHT_2S;
|
||||
else if (rate >= DESC_RATEVHT3SS_MCS0 && rate <= DESC_RATEVHT3SS_MCS9)
|
||||
return RTW_RATE_SECTION_VHT_3S;
|
||||
else if (rate >= DESC_RATEVHT4SS_MCS0 && rate <= DESC_RATEVHT4SS_MCS9)
|
||||
return RTW_RATE_SECTION_VHT_4S;
|
||||
else
|
||||
return RTW_RATE_SECTION_MAX;
|
||||
return RTW_RATE_SECTION_NUM;
|
||||
}
|
||||
|
||||
static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
|
||||
@@ -2088,7 +2161,7 @@ static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
|
||||
if (regd > RTW_REGD_WW)
|
||||
return power_limit;
|
||||
|
||||
if (rs == RTW_RATE_SECTION_MAX)
|
||||
if (rs == RTW_RATE_SECTION_NUM)
|
||||
goto err;
|
||||
|
||||
/* only 20M BW with cck and ofdm */
|
||||
@@ -2096,7 +2169,7 @@ static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
|
||||
bw = RTW_CHANNEL_WIDTH_20;
|
||||
|
||||
/* only 20/40M BW with ht */
|
||||
if (rs == RTW_RATE_SECTION_HT_1S || rs == RTW_RATE_SECTION_HT_2S)
|
||||
if (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS31)
|
||||
bw = min_t(u8, bw, RTW_CHANNEL_WIDTH_40);
|
||||
|
||||
/* select min power limit among [20M BW ~ current BW] */
|
||||
@@ -2132,7 +2205,7 @@ static s8 rtw_phy_get_tx_power_sar(struct rtw_dev *rtwdev, u8 sar_band,
|
||||
.rs = rs,
|
||||
};
|
||||
|
||||
if (rs == RTW_RATE_SECTION_MAX)
|
||||
if (rs == RTW_RATE_SECTION_NUM)
|
||||
goto err;
|
||||
|
||||
return rtw_query_sar(rtwdev, &arg);
|
||||
@@ -2214,14 +2287,14 @@ static void rtw_phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
|
||||
{
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
u8 regd = rtw_regd_get(rtwdev);
|
||||
u8 *rates;
|
||||
const u8 *rates;
|
||||
u8 size;
|
||||
u8 rate;
|
||||
u8 pwr_idx;
|
||||
u8 bw;
|
||||
int i;
|
||||
|
||||
if (rs >= RTW_RATE_SECTION_MAX)
|
||||
if (rs >= RTW_RATE_SECTION_NUM)
|
||||
return;
|
||||
|
||||
rates = rtw_rate_section[rs];
|
||||
@@ -2252,7 +2325,7 @@ static void rtw_phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev,
|
||||
else
|
||||
rs = RTW_RATE_SECTION_OFDM;
|
||||
|
||||
for (; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||
for (; rs < RTW_RATE_SECTION_NUM; rs++)
|
||||
rtw_phy_set_tx_power_index_by_rs(rtwdev, ch, path, rs);
|
||||
}
|
||||
|
||||
@@ -2274,13 +2347,13 @@ EXPORT_SYMBOL(rtw_phy_set_tx_power_level);
|
||||
|
||||
static void
|
||||
rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
|
||||
u8 rs, u8 size, u8 *rates)
|
||||
u8 rs, u8 size, const u8 *rates)
|
||||
{
|
||||
u8 rate;
|
||||
u8 base_idx, rate_idx;
|
||||
s8 base_2g, base_5g;
|
||||
|
||||
if (rs >= RTW_RATE_SECTION_VHT_1S)
|
||||
if (size == 10) /* VHT rates */
|
||||
base_idx = rates[size - 3];
|
||||
else
|
||||
base_idx = rates[size - 1];
|
||||
@@ -2297,28 +2370,12 @@ rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
|
||||
|
||||
void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal)
|
||||
{
|
||||
u8 path;
|
||||
u8 path, rs;
|
||||
|
||||
for (path = 0; path < RTW_RF_PATH_MAX; path++) {
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_CCK,
|
||||
rtw_cck_size, rtw_cck_rates);
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_OFDM,
|
||||
rtw_ofdm_size, rtw_ofdm_rates);
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_HT_1S,
|
||||
rtw_ht_1s_size, rtw_ht_1s_rates);
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_HT_2S,
|
||||
rtw_ht_2s_size, rtw_ht_2s_rates);
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_VHT_1S,
|
||||
rtw_vht_1s_size, rtw_vht_1s_rates);
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path,
|
||||
RTW_RATE_SECTION_VHT_2S,
|
||||
rtw_vht_2s_size, rtw_vht_2s_rates);
|
||||
}
|
||||
for (path = 0; path < RTW_RF_PATH_MAX; path++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_NUM; rs++)
|
||||
rtw_phy_tx_power_by_rate_config_by_path(hal, path, rs,
|
||||
rtw_rate_size[rs], rtw_rate_section[rs]);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -2347,7 +2404,7 @@ void rtw_phy_tx_power_limit_config(struct rtw_hal *hal)
|
||||
|
||||
for (regd = 0; regd < RTW_REGD_MAX; regd++)
|
||||
for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_NUM; rs++)
|
||||
__rtw_phy_tx_power_limit_config(hal, regd, bw, rs);
|
||||
}
|
||||
|
||||
@@ -2383,7 +2440,7 @@ void rtw_phy_init_tx_power(struct rtw_dev *rtwdev)
|
||||
/* init tx power limit */
|
||||
for (regd = 0; regd < RTW_REGD_MAX; regd++)
|
||||
for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_NUM; rs++)
|
||||
rtw_phy_init_tx_power_limit(rtwdev, regd, bw,
|
||||
rs);
|
||||
}
|
||||
@@ -2401,32 +2458,56 @@ void rtw_phy_config_swing_table(struct rtw_dev *rtwdev,
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_2g_ccka_n;
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_2g_cckb_p;
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_2g_cckb_n;
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_2g_cckc_p;
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_2g_cckc_n;
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_2g_cckd_p;
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_2g_cckd_n;
|
||||
} else {
|
||||
swing_table->p[RF_PATH_A] = tbl->pwrtrk_2ga_p;
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_2ga_n;
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_2gb_p;
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_2gb_n;
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_2gc_p;
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_2gc_n;
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_2gd_p;
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_2gd_n;
|
||||
}
|
||||
} else if (IS_CH_5G_BAND_1(channel) || IS_CH_5G_BAND_2(channel)) {
|
||||
swing_table->p[RF_PATH_A] = tbl->pwrtrk_5ga_p[RTW_PWR_TRK_5G_1];
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_5ga_n[RTW_PWR_TRK_5G_1];
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_5gb_p[RTW_PWR_TRK_5G_1];
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_5gb_n[RTW_PWR_TRK_5G_1];
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_5gc_p[RTW_PWR_TRK_5G_1];
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_5gc_n[RTW_PWR_TRK_5G_1];
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_5gd_p[RTW_PWR_TRK_5G_1];
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_5gd_n[RTW_PWR_TRK_5G_1];
|
||||
} else if (IS_CH_5G_BAND_3(channel)) {
|
||||
swing_table->p[RF_PATH_A] = tbl->pwrtrk_5ga_p[RTW_PWR_TRK_5G_2];
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_5ga_n[RTW_PWR_TRK_5G_2];
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_5gb_p[RTW_PWR_TRK_5G_2];
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_5gb_n[RTW_PWR_TRK_5G_2];
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_5gc_p[RTW_PWR_TRK_5G_2];
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_5gc_n[RTW_PWR_TRK_5G_2];
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_5gd_p[RTW_PWR_TRK_5G_2];
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_5gd_n[RTW_PWR_TRK_5G_2];
|
||||
} else if (IS_CH_5G_BAND_4(channel)) {
|
||||
swing_table->p[RF_PATH_A] = tbl->pwrtrk_5ga_p[RTW_PWR_TRK_5G_3];
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_5ga_n[RTW_PWR_TRK_5G_3];
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_5gb_p[RTW_PWR_TRK_5G_3];
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_5gb_n[RTW_PWR_TRK_5G_3];
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_5gc_p[RTW_PWR_TRK_5G_3];
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_5gc_n[RTW_PWR_TRK_5G_3];
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_5gd_p[RTW_PWR_TRK_5G_3];
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_5gd_n[RTW_PWR_TRK_5G_3];
|
||||
} else {
|
||||
swing_table->p[RF_PATH_A] = tbl->pwrtrk_2ga_p;
|
||||
swing_table->n[RF_PATH_A] = tbl->pwrtrk_2ga_n;
|
||||
swing_table->p[RF_PATH_B] = tbl->pwrtrk_2gb_p;
|
||||
swing_table->n[RF_PATH_B] = tbl->pwrtrk_2gb_n;
|
||||
swing_table->p[RF_PATH_C] = tbl->pwrtrk_2gc_p;
|
||||
swing_table->n[RF_PATH_C] = tbl->pwrtrk_2gc_n;
|
||||
swing_table->p[RF_PATH_D] = tbl->pwrtrk_2gd_p;
|
||||
swing_table->n[RF_PATH_D] = tbl->pwrtrk_2gd_n;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(rtw_phy_config_swing_table);
|
||||
|
||||
@@ -7,14 +7,18 @@
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
extern u8 rtw_cck_rates[];
|
||||
extern u8 rtw_ofdm_rates[];
|
||||
extern u8 rtw_ht_1s_rates[];
|
||||
extern u8 rtw_ht_2s_rates[];
|
||||
extern u8 rtw_vht_1s_rates[];
|
||||
extern u8 rtw_vht_2s_rates[];
|
||||
extern u8 *rtw_rate_section[];
|
||||
extern u8 rtw_rate_size[];
|
||||
extern const u8 rtw_cck_rates[];
|
||||
extern const u8 rtw_ofdm_rates[];
|
||||
extern const u8 rtw_ht_1s_rates[];
|
||||
extern const u8 rtw_ht_2s_rates[];
|
||||
extern const u8 rtw_vht_1s_rates[];
|
||||
extern const u8 rtw_vht_2s_rates[];
|
||||
extern const u8 rtw_ht_3s_rates[];
|
||||
extern const u8 rtw_ht_4s_rates[];
|
||||
extern const u8 rtw_vht_3s_rates[];
|
||||
extern const u8 rtw_vht_4s_rates[];
|
||||
extern const u8 * const rtw_rate_section[];
|
||||
extern const u8 rtw_rate_size[];
|
||||
|
||||
void rtw_phy_init(struct rtw_dev *rtwdev);
|
||||
void rtw_phy_dynamic_mechanism(struct rtw_dev *rtwdev);
|
||||
|
||||
@@ -8,6 +8,7 @@
|
||||
#define REG_SYS_FUNC_EN 0x0002
|
||||
#define BIT_FEN_EN_25_1 BIT(13)
|
||||
#define BIT_FEN_ELDR BIT(12)
|
||||
#define BIT_FEN_PCIEA BIT(6)
|
||||
#define BIT_FEN_CPUEN BIT(2)
|
||||
#define BIT_FEN_USBA BIT(2)
|
||||
#define BIT_FEN_BB_GLB_RST BIT(1)
|
||||
@@ -39,6 +40,9 @@
|
||||
#define BIT_RF_RSTB BIT(1)
|
||||
#define BIT_RF_EN BIT(0)
|
||||
|
||||
#define REG_RF_CTRL1 0x0020
|
||||
#define REG_RF_CTRL2 0x0021
|
||||
|
||||
#define REG_AFE_CTRL1 0x0024
|
||||
#define BIT_MAC_CLK_SEL (BIT(20) | BIT(21))
|
||||
#define REG_EFUSE_CTRL 0x0030
|
||||
@@ -73,6 +77,8 @@
|
||||
#define BIT_BT_PTA_EN BIT(5)
|
||||
#define BIT_WLRFE_4_5_EN BIT(2)
|
||||
|
||||
#define REG_GPIO_PIN_CTRL 0x0044
|
||||
|
||||
#define REG_LED_CFG 0x004C
|
||||
#define BIT_LNAON_SEL_EN BIT(26)
|
||||
#define BIT_PAPE_SEL_EN BIT(25)
|
||||
@@ -110,6 +116,7 @@
|
||||
#define BIT_SDIO_PAD_E5 BIT(18)
|
||||
|
||||
#define REG_RF_B_CTRL 0x76
|
||||
#define REG_RF_CTRL3 0x0076
|
||||
|
||||
#define REG_AFE_CTRL_4 0x0078
|
||||
#define BIT_CK320M_AFE_EN BIT(4)
|
||||
@@ -130,6 +137,7 @@
|
||||
#define BIT_SHIFT_ROM_PGE 16
|
||||
#define BIT_FW_INIT_RDY BIT(15)
|
||||
#define BIT_FW_DW_RDY BIT(14)
|
||||
#define BIT_CPU_CLK_SEL (BIT(12) | BIT(13))
|
||||
#define BIT_RPWM_TOGGLE BIT(7)
|
||||
#define BIT_RAM_DL_SEL BIT(7) /* legacy only */
|
||||
#define BIT_DMEM_CHKSUM_OK BIT(6)
|
||||
@@ -147,7 +155,7 @@
|
||||
BIT_CHECK_SUM_OK)
|
||||
#define FW_READY_LEGACY (BIT_MCUFWDL_RDY | BIT_FWDL_CHK_RPT | \
|
||||
BIT_WINTINI_RDY | BIT_RAM_DL_SEL)
|
||||
#define FW_READY_MASK 0xffff
|
||||
#define FW_READY_MASK (0xffff & ~BIT_CPU_CLK_SEL)
|
||||
|
||||
#define REG_MCU_TST_CFG 0x84
|
||||
#define VAL_FW_TRIGGER 0x1
|
||||
@@ -602,15 +610,25 @@
|
||||
#define REG_CCA2ND 0x0838
|
||||
#define REG_L1PKTH 0x0848
|
||||
#define REG_CLKTRK 0x0860
|
||||
#define REG_CSI_MASK_SETTING1 0x0874
|
||||
#define REG_NBI_SETTING 0x087c
|
||||
#define BIT_NBI_ENABLE BIT(13)
|
||||
#define REG_CSI_FIX_MASK0 0x0880
|
||||
#define REG_CSI_FIX_MASK1 0x0884
|
||||
#define REG_CSI_FIX_MASK6 0x0898
|
||||
#define REG_CSI_FIX_MASK7 0x089c
|
||||
#define REG_ADCCLK 0x08AC
|
||||
#define REG_HSSI_READ 0x08B0
|
||||
#define REG_FPGA0_XCD_RF_PARA 0x08B4
|
||||
#define REG_RX_MCS_LIMIT 0x08BC
|
||||
#define REG_ADC160 0x08C4
|
||||
#define REG_DBGSEL 0x08fc
|
||||
#define REG_ANTSEL_SW 0x0900
|
||||
#define REG_DAC_RSTB 0x090c
|
||||
#define REG_PSD 0x0910
|
||||
#define BIT_PSD_INI GENMASK(23, 22)
|
||||
#define REG_SINGLE_TONE_CONT_TX 0x0914
|
||||
|
||||
#define REG_AGC_TABLE 0x0958
|
||||
#define REG_RFE_CTRL_E 0x0974
|
||||
#define REG_2ND_CCA_CTRL 0x0976
|
||||
#define REG_IQK_COM00 0x0978
|
||||
@@ -620,10 +638,18 @@
|
||||
|
||||
#define REG_FAS 0x09a4
|
||||
#define REG_RXSB 0x0a00
|
||||
#define BIT_RXSB_ANA_DIV BIT(15)
|
||||
#define REG_CCK_RX 0x0a04
|
||||
#define REG_CCK_PD_TH 0x0a0a
|
||||
|
||||
#define REG_CCK0_FAREPORT 0xa2c
|
||||
#define REG_PRECTRL 0x0a14
|
||||
#define BIT_DIS_CO_PATHSEL BIT(7)
|
||||
#define BIT_IQ_WGT GENMASK(9, 8)
|
||||
#define REG_CCA_MF 0x0a20
|
||||
#define BIT_MBC_WIN GENMASK(5, 4)
|
||||
#define REG_CCK0_TX_FILTER1 0x0a20
|
||||
#define REG_CCK0_TX_FILTER2 0x0a24
|
||||
#define REG_CCK0_DEBUG_PORT 0x0a28
|
||||
#define REG_CCK0_FAREPORT 0x0a2c
|
||||
#define BIT_CCK0_2RX BIT(18)
|
||||
#define BIT_CCK0_MRC BIT(22)
|
||||
#define REG_FA_CCK 0x0a5c
|
||||
@@ -642,10 +668,18 @@
|
||||
#define DIS_DPD_RATEVHT2SS_MCS1 BIT(9)
|
||||
#define DIS_DPD_RATEALL GENMASK(9, 0)
|
||||
|
||||
#define REG_CCA 0x0a70
|
||||
#define BIT_CCA_CO BIT(7)
|
||||
#define REG_ANTSEL 0x0a74
|
||||
#define BIT_ANT_BYCO BIT(8)
|
||||
#define REG_CCKTX 0x0a84
|
||||
#define BIT_CMB_CCA_2R BIT(28)
|
||||
|
||||
#define REG_CNTRST 0x0b58
|
||||
|
||||
#define REG_3WIRE_SWA 0x0c00
|
||||
#define REG_RX_IQC_AB_A 0x0c10
|
||||
#define REG_RX_IQC_CD_A 0x0c14
|
||||
#define REG_TXSCALE_A 0x0c1c
|
||||
#define BB_SWING_MASK GENMASK(31, 21)
|
||||
#define REG_TX_AGC_A_CCK_11_CCK_1 0xc20
|
||||
@@ -673,7 +707,7 @@
|
||||
#define REG_LSSI_WRITE_A 0x0c90
|
||||
#define REG_PREDISTA 0x0c90
|
||||
#define REG_TXAGCIDX 0x0c94
|
||||
|
||||
#define REG_TX_AGC_A 0x0c94
|
||||
#define REG_RFE_PINMUX_A 0x0cb0
|
||||
#define REG_RFE_INV_A 0x0cb4
|
||||
#define REG_RFE_CTRL8 0x0cb4
|
||||
@@ -682,6 +716,7 @@
|
||||
#define DPDT_CTRL_PIN 0x77
|
||||
#define RFE_INV_MASK 0x3ff00000
|
||||
#define REG_RFECTL_A 0x0cb8
|
||||
#define REG_RFE_INV0 0x0cbc
|
||||
#define REG_RFE_INV8 0x0cbd
|
||||
#define BIT_MASK_RFE_INV89 GENMASK(1, 0)
|
||||
#define REG_RFE_INV16 0x0cbe
|
||||
@@ -702,6 +737,7 @@
|
||||
|
||||
#define REG_3WIRE_SWB 0x0e00
|
||||
#define REG_RX_IQC_AB_B 0x0e10
|
||||
#define REG_RX_IQC_CD_B 0x0e14
|
||||
#define REG_TXSCALE_B 0x0e1c
|
||||
#define REG_TX_AGC_B_CCK_11_CCK_1 0xe20
|
||||
#define REG_TX_AGC_B_OFDM18_OFDM6 0xe24
|
||||
@@ -728,6 +764,7 @@
|
||||
#define REG_LSSI_WRITE_B 0x0e90
|
||||
#define REG_PREDISTB 0x0e90
|
||||
#define REG_INIDLYB 0x0e94
|
||||
#define REG_TX_AGC_B 0x0e94
|
||||
#define REG_RFE_PINMUX_B 0x0eb0
|
||||
#define REG_RFE_INV_B 0x0eb4
|
||||
#define REG_RFECTL_B 0x0eb8
|
||||
@@ -743,8 +780,11 @@
|
||||
#define REG_CRC_HT 0x0f10
|
||||
#define REG_CRC_OFDM 0x0f14
|
||||
#define REG_FA_OFDM 0x0f48
|
||||
#define REG_DBGRPT 0x0fa0
|
||||
#define REG_CCA_CCK 0x0fcc
|
||||
|
||||
#define REG_SYS_CFG3_8814A 0x1000
|
||||
|
||||
#define REG_ANAPARSW_MAC_0 0x1010
|
||||
#define BIT_CF_L_V2 GENMASK(29, 28)
|
||||
|
||||
@@ -862,9 +902,27 @@
|
||||
#define LTECOEX_WRITE_DATA REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1
|
||||
#define LTECOEX_READ_DATA REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1
|
||||
|
||||
#define REG_RX_IQC_AB_C 0x1810
|
||||
#define REG_RX_IQC_CD_C 0x1814
|
||||
#define REG_TXSCALE_C 0x181c
|
||||
#define REG_CK_MONHC 0x185c
|
||||
#define REG_AFE_PWR1_C 0x1860
|
||||
#define REG_IGN_GNT_BT1 0x1860
|
||||
#define REG_TX_AGC_C 0x1894
|
||||
#define REG_RFE_PINMUX_C 0x18b4
|
||||
|
||||
#define REG_RFESEL_CTRL 0x1990
|
||||
#define REG_AGC_TBL 0x1998
|
||||
|
||||
#define REG_RX_IQC_AB_D 0x1a10
|
||||
#define REG_RX_IQC_CD_D 0x1a14
|
||||
#define REG_TXSCALE_D 0x1a1c
|
||||
#define REG_CK_MONHD 0x1a5c
|
||||
#define REG_AFE_PWR1_D 0x1a60
|
||||
#define REG_TX_AGC_D 0x1a94
|
||||
#define REG_RFE_PINMUX_D 0x1ab4
|
||||
#define REG_RFE_INVSEL_D 0x1abc
|
||||
#define BIT_RFE_SELSW0_D GENMASK(27, 20)
|
||||
|
||||
#define REG_NOMASK_TXBT 0x1ca7
|
||||
#define REG_ANAPAR 0x1c30
|
||||
@@ -905,6 +963,7 @@
|
||||
#define RF18_BAND_MASK (BIT(16) | BIT(9) | BIT(8))
|
||||
#define RF18_CHANNEL_MASK (MASKBYTE0)
|
||||
#define RF18_RFSI_MASK (BIT(18) | BIT(17))
|
||||
#define RF_RCK1_V1 0x1c
|
||||
#define RF_RCK 0x1d
|
||||
#define RF_MODE_TABLE_ADDR 0x30
|
||||
#define RF_MODE_TABLE_DATA0 0x31
|
||||
|
||||
@@ -519,15 +519,6 @@ static const struct rtw_rqpn rqpn_table_8703b[] = {
|
||||
RTW_DMA_MAPPING_EXTRA, RTW_DMA_MAPPING_HIGH},
|
||||
};
|
||||
|
||||
/* Default power index table for RTL8703B, used if EFUSE does not
|
||||
* contain valid data. Replaces EFUSE data from offset 0x10 (start of
|
||||
* txpwr_idx_table).
|
||||
*/
|
||||
static const u8 rtw8703b_txpwr_idx_table[] = {
|
||||
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
|
||||
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02
|
||||
};
|
||||
|
||||
static void try_mac_from_devicetree(struct rtw_dev *rtwdev)
|
||||
{
|
||||
#if defined(CONFIG_OF)
|
||||
@@ -546,15 +537,9 @@ static void try_mac_from_devicetree(struct rtw_dev *rtwdev)
|
||||
#endif
|
||||
}
|
||||
|
||||
#define DBG_EFUSE_FIX(rtwdev, name) \
|
||||
rtw_dbg(rtwdev, RTW_DBG_EFUSE, "Fixed invalid EFUSE value: " \
|
||||
# name "=0x%x\n", rtwdev->efuse.name)
|
||||
|
||||
static int rtw8703b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
|
||||
{
|
||||
struct rtw_efuse *efuse = &rtwdev->efuse;
|
||||
u8 *pwr = (u8 *)efuse->txpwr_idx_table;
|
||||
bool valid = false;
|
||||
int ret;
|
||||
|
||||
ret = rtw8723x_read_efuse(rtwdev, log_map);
|
||||
@@ -564,51 +549,6 @@ static int rtw8703b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
|
||||
if (!is_valid_ether_addr(efuse->addr))
|
||||
try_mac_from_devicetree(rtwdev);
|
||||
|
||||
/* If TX power index table in EFUSE is invalid, fall back to
|
||||
* built-in table.
|
||||
*/
|
||||
for (int i = 0; i < ARRAY_SIZE(rtw8703b_txpwr_idx_table); i++)
|
||||
if (pwr[i] != 0xff) {
|
||||
valid = true;
|
||||
break;
|
||||
}
|
||||
if (!valid) {
|
||||
for (int i = 0; i < ARRAY_SIZE(rtw8703b_txpwr_idx_table); i++)
|
||||
pwr[i] = rtw8703b_txpwr_idx_table[i];
|
||||
rtw_dbg(rtwdev, RTW_DBG_EFUSE,
|
||||
"Replaced invalid EFUSE TX power index table.");
|
||||
rtw8723x_debug_txpwr_limit(rtwdev,
|
||||
efuse->txpwr_idx_table, 2);
|
||||
}
|
||||
|
||||
/* Override invalid antenna settings. */
|
||||
if (efuse->bt_setting == 0xff) {
|
||||
/* shared antenna */
|
||||
efuse->bt_setting |= BIT(0);
|
||||
/* RF path A */
|
||||
efuse->bt_setting &= ~BIT(6);
|
||||
DBG_EFUSE_FIX(rtwdev, bt_setting);
|
||||
}
|
||||
|
||||
/* Override invalid board options: The coex code incorrectly
|
||||
* assumes that if bits 6 & 7 are set the board doesn't
|
||||
* support coex. Regd is also derived from rf_board_option and
|
||||
* should be 0 if there's no valid data.
|
||||
*/
|
||||
if (efuse->rf_board_option == 0xff) {
|
||||
efuse->regd = 0;
|
||||
efuse->rf_board_option &= GENMASK(5, 0);
|
||||
DBG_EFUSE_FIX(rtwdev, rf_board_option);
|
||||
}
|
||||
|
||||
/* Override invalid crystal cap setting, default comes from
|
||||
* vendor driver. Chip specific.
|
||||
*/
|
||||
if (efuse->crystal_cap == 0xff) {
|
||||
efuse->crystal_cap = 0x20;
|
||||
DBG_EFUSE_FIX(rtwdev, crystal_cap);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1904,6 +1844,7 @@ static const struct rtw_chip_ops rtw8703b_ops = {
|
||||
.power_on = rtw_power_on,
|
||||
.power_off = rtw_power_off,
|
||||
.mac_init = rtw8723x_mac_init,
|
||||
.mac_postinit = rtw8723x_mac_postinit,
|
||||
.dump_fw_crash = NULL,
|
||||
.shutdown = NULL,
|
||||
.read_efuse = rtw8703b_read_efuse,
|
||||
@@ -1916,6 +1857,7 @@ static const struct rtw_chip_ops rtw8703b_ops = {
|
||||
.set_antenna = NULL,
|
||||
.cfg_ldo25 = rtw8723x_cfg_ldo25,
|
||||
.efuse_grant = rtw8723x_efuse_grant,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw8723x_false_alarm_statistics,
|
||||
.phy_calibration = rtw8703b_phy_calibration,
|
||||
.dpk_track = NULL,
|
||||
@@ -1953,7 +1895,7 @@ const struct rtw_chip_info rtw8703b_hw_spec = {
|
||||
.id = RTW_CHIP_TYPE_8703B,
|
||||
|
||||
.fw_name = "rtw88/rtw8703b_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11N,
|
||||
.wlan_cpu = RTW_WCPU_8051,
|
||||
.tx_pkt_desc_sz = 40,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
|
||||
@@ -19,7 +19,7 @@ static const struct sdio_device_id rtw_8723cs_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(sdio, rtw_8723cs_id_table);
|
||||
|
||||
static struct sdio_driver rtw_8723cs_driver = {
|
||||
.name = "rtw8723cs",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8723cs_id_table,
|
||||
.probe = rtw_sdio_probe,
|
||||
.remove = rtw_sdio_remove,
|
||||
|
||||
@@ -444,7 +444,7 @@ static u8 rtw8723d_iqk_check_tx_failed(struct rtw_dev *rtwdev,
|
||||
rtw_read32(rtwdev, REG_IQK_RES_TX),
|
||||
rtw_read32(rtwdev, REG_IQK_RES_TY));
|
||||
rtw_dbg(rtwdev, RTW_DBG_RFK,
|
||||
"[IQK] 0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
|
||||
"[IQK] 0xe90(before IQK)= 0x%x, 0xe98(after IQK) = 0x%x\n",
|
||||
rtw_read32(rtwdev, 0xe90),
|
||||
rtw_read32(rtwdev, 0xe98));
|
||||
|
||||
@@ -472,7 +472,7 @@ static u8 rtw8723d_iqk_check_rx_failed(struct rtw_dev *rtwdev,
|
||||
rtw_read32(rtwdev, REG_IQK_RES_RY));
|
||||
|
||||
rtw_dbg(rtwdev, RTW_DBG_RFK,
|
||||
"[IQK] 0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n",
|
||||
"[IQK] 0xea0(before IQK)= 0x%x, 0xea8(after IQK) = 0x%x\n",
|
||||
rtw_read32(rtwdev, 0xea0),
|
||||
rtw_read32(rtwdev, 0xea8));
|
||||
|
||||
@@ -1397,6 +1397,7 @@ static const struct rtw_chip_ops rtw8723d_ops = {
|
||||
.query_phy_status = query_phy_status,
|
||||
.set_channel = rtw8723d_set_channel,
|
||||
.mac_init = rtw8723x_mac_init,
|
||||
.mac_postinit = rtw8723x_mac_postinit,
|
||||
.shutdown = rtw8723d_shutdown,
|
||||
.read_rf = rtw_phy_read_rf_sipi,
|
||||
.write_rf = rtw_phy_write_rf_reg_sipi,
|
||||
@@ -1404,6 +1405,7 @@ static const struct rtw_chip_ops rtw8723d_ops = {
|
||||
.set_antenna = NULL,
|
||||
.cfg_ldo25 = rtw8723x_cfg_ldo25,
|
||||
.efuse_grant = rtw8723x_efuse_grant,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw8723x_false_alarm_statistics,
|
||||
.phy_calibration = rtw8723d_phy_calibration,
|
||||
.cck_pd_set = rtw8723d_phy_cck_pd_set,
|
||||
@@ -2115,7 +2117,7 @@ const struct rtw_chip_info rtw8723d_hw_spec = {
|
||||
.ops = &rtw8723d_ops,
|
||||
.id = RTW_CHIP_TYPE_8723D,
|
||||
.fw_name = "rtw88/rtw8723d_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11N,
|
||||
.wlan_cpu = RTW_WCPU_8051,
|
||||
.tx_pkt_desc_sz = 40,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
|
||||
@@ -17,12 +17,13 @@ static const struct pci_device_id rtw_8723de_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(pci, rtw_8723de_id_table);
|
||||
|
||||
static struct pci_driver rtw_8723de_driver = {
|
||||
.name = "rtw_8723de",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8723de_id_table,
|
||||
.probe = rtw_pci_probe,
|
||||
.remove = rtw_pci_remove,
|
||||
.driver.pm = &rtw_pm_ops,
|
||||
.shutdown = rtw_pci_shutdown,
|
||||
.err_handler = &rtw_pci_err_handler,
|
||||
#if defined(__FreeBSD__)
|
||||
.bsddriver.name = KBUILD_MODNAME,
|
||||
#endif
|
||||
|
||||
@@ -25,7 +25,7 @@ static const struct sdio_device_id rtw_8723ds_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(sdio, rtw_8723ds_id_table);
|
||||
|
||||
static struct sdio_driver rtw_8723ds_driver = {
|
||||
.name = "rtw_8723ds",
|
||||
.name = KBUILD_MODNAME,
|
||||
.probe = rtw_sdio_probe,
|
||||
.remove = rtw_sdio_remove,
|
||||
.id_table = rtw_8723ds_id_table,
|
||||
|
||||
@@ -24,7 +24,7 @@ static int rtw8723du_probe(struct usb_interface *intf,
|
||||
}
|
||||
|
||||
static struct usb_driver rtw_8723du_driver = {
|
||||
.name = "rtw_8723du",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8723du_id_table,
|
||||
.probe = rtw8723du_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
@@ -72,6 +72,9 @@ static void __rtw8723x_lck(struct rtw_dev *rtwdev)
|
||||
#define DBG_EFUSE_2BYTE(rtwdev, map, name) \
|
||||
rtw_dbg(rtwdev, RTW_DBG_EFUSE, # name "=0x%02x%02x\n", \
|
||||
(map)->name[0], (map)->name[1])
|
||||
#define DBG_EFUSE_FIX(rtwdev, name) \
|
||||
rtw_dbg(rtwdev, RTW_DBG_EFUSE, "Fixed invalid EFUSE value: " \
|
||||
# name "=0x%x\n", rtwdev->efuse.name)
|
||||
|
||||
static void rtw8723xe_efuse_debug(struct rtw_dev *rtwdev,
|
||||
struct rtw8723x_efuse *map)
|
||||
@@ -241,10 +244,21 @@ static void rtw8723xs_efuse_parsing(struct rtw_efuse *efuse,
|
||||
ether_addr_copy(efuse->addr, map->s.mac_addr);
|
||||
}
|
||||
|
||||
/* Default power index table for RTL8703B/RTL8723D, used if EFUSE does
|
||||
* not contain valid data. Replaces EFUSE data from offset 0x10 (start
|
||||
* of txpwr_idx_table).
|
||||
*/
|
||||
static const u8 rtw8723x_txpwr_idx_table[] = {
|
||||
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
|
||||
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02
|
||||
};
|
||||
|
||||
static int __rtw8723x_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
|
||||
{
|
||||
struct rtw_efuse *efuse = &rtwdev->efuse;
|
||||
u8 *pwr = (u8 *)efuse->txpwr_idx_table;
|
||||
struct rtw8723x_efuse *map;
|
||||
bool valid = false;
|
||||
int i;
|
||||
|
||||
map = (struct rtw8723x_efuse *)log_map;
|
||||
@@ -282,6 +296,51 @@ static int __rtw8723x_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/* If TX power index table in EFUSE is invalid, fall back to
|
||||
* built-in table.
|
||||
*/
|
||||
for (i = 0; i < ARRAY_SIZE(rtw8723x_txpwr_idx_table); i++)
|
||||
if (pwr[i] != 0xff) {
|
||||
valid = true;
|
||||
break;
|
||||
}
|
||||
if (!valid) {
|
||||
for (i = 0; i < ARRAY_SIZE(rtw8723x_txpwr_idx_table); i++)
|
||||
pwr[i] = rtw8723x_txpwr_idx_table[i];
|
||||
rtw_dbg(rtwdev, RTW_DBG_EFUSE,
|
||||
"Replaced invalid EFUSE TX power index table.");
|
||||
rtw8723x_debug_txpwr_limit(rtwdev,
|
||||
efuse->txpwr_idx_table, 2);
|
||||
}
|
||||
|
||||
/* Override invalid antenna settings. */
|
||||
if (efuse->bt_setting == 0xff) {
|
||||
/* shared antenna */
|
||||
efuse->bt_setting |= BIT(0);
|
||||
/* RF path A */
|
||||
efuse->bt_setting &= ~BIT(6);
|
||||
DBG_EFUSE_FIX(rtwdev, bt_setting);
|
||||
}
|
||||
|
||||
/* Override invalid board options: The coex code incorrectly
|
||||
* assumes that if bits 6 & 7 are set the board doesn't
|
||||
* support coex. Regd is also derived from rf_board_option and
|
||||
* should be 0 if there's no valid data.
|
||||
*/
|
||||
if (efuse->rf_board_option == 0xff) {
|
||||
efuse->regd = 0;
|
||||
efuse->rf_board_option &= GENMASK(5, 0);
|
||||
DBG_EFUSE_FIX(rtwdev, rf_board_option);
|
||||
}
|
||||
|
||||
/* Override invalid crystal cap setting, default comes from
|
||||
* vendor driver. Chip specific.
|
||||
*/
|
||||
if (efuse->crystal_cap == 0xff) {
|
||||
efuse->crystal_cap = 0x20;
|
||||
DBG_EFUSE_FIX(rtwdev, crystal_cap);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -297,7 +356,6 @@ static int __rtw8723x_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
|
||||
|
||||
static int __rtw8723x_mac_init(struct rtw_dev *rtwdev)
|
||||
{
|
||||
rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 1, WLAN_TXQ_RPT_EN);
|
||||
rtw_write32(rtwdev, REG_TCR, BIT_TCR_CFG);
|
||||
|
||||
rtw_write16(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0);
|
||||
@@ -314,6 +372,13 @@ static int __rtw8723x_mac_init(struct rtw_dev *rtwdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __rtw8723x_mac_postinit(struct rtw_dev *rtwdev)
|
||||
{
|
||||
rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 1, WLAN_TXQ_RPT_EN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __rtw8723x_cfg_ldo25(struct rtw_dev *rtwdev, bool enable)
|
||||
{
|
||||
u8 ldo_pwr;
|
||||
@@ -704,6 +769,7 @@ const struct rtw8723x_common rtw8723x_common = {
|
||||
.lck = __rtw8723x_lck,
|
||||
.read_efuse = __rtw8723x_read_efuse,
|
||||
.mac_init = __rtw8723x_mac_init,
|
||||
.mac_postinit = __rtw8723x_mac_postinit,
|
||||
.cfg_ldo25 = __rtw8723x_cfg_ldo25,
|
||||
.set_tx_power_index = __rtw8723x_set_tx_power_index,
|
||||
.efuse_grant = __rtw8723x_efuse_grant,
|
||||
|
||||
@@ -137,6 +137,7 @@ struct rtw8723x_common {
|
||||
void (*lck)(struct rtw_dev *rtwdev);
|
||||
int (*read_efuse)(struct rtw_dev *rtwdev, u8 *log_map);
|
||||
int (*mac_init)(struct rtw_dev *rtwdev);
|
||||
int (*mac_postinit)(struct rtw_dev *rtwdev);
|
||||
void (*cfg_ldo25)(struct rtw_dev *rtwdev, bool enable);
|
||||
void (*set_tx_power_index)(struct rtw_dev *rtwdev);
|
||||
void (*efuse_grant)(struct rtw_dev *rtwdev, bool on);
|
||||
@@ -383,6 +384,11 @@ static inline int rtw8723x_mac_init(struct rtw_dev *rtwdev)
|
||||
return rtw8723x_common.mac_init(rtwdev);
|
||||
}
|
||||
|
||||
static inline int rtw8723x_mac_postinit(struct rtw_dev *rtwdev)
|
||||
{
|
||||
return rtw8723x_common.mac_postinit(rtwdev);
|
||||
}
|
||||
|
||||
static inline void rtw8723x_cfg_ldo25(struct rtw_dev *rtwdev, bool enable)
|
||||
{
|
||||
rtw8723x_common.cfg_ldo25(rtwdev, enable);
|
||||
|
||||
@@ -919,12 +919,14 @@ static const struct rtw_chip_ops rtw8812a_ops = {
|
||||
.query_phy_status = rtw8812a_query_phy_status,
|
||||
.set_channel = rtw88xxa_set_channel,
|
||||
.mac_init = NULL,
|
||||
.mac_postinit = NULL,
|
||||
.read_rf = rtw88xxa_phy_read_rf,
|
||||
.write_rf = rtw_phy_write_rf_reg_sipi,
|
||||
.set_antenna = NULL,
|
||||
.set_tx_power_index = rtw88xxa_set_tx_power_index,
|
||||
.cfg_ldo25 = rtw8812a_cfg_ldo25,
|
||||
.efuse_grant = rtw88xxa_efuse_grant,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw88xxa_false_alarm_statistics,
|
||||
.phy_calibration = rtw8812a_phy_calibration,
|
||||
.cck_pd_set = rtw88xxa_phy_cck_pd_set,
|
||||
@@ -1037,7 +1039,7 @@ const struct rtw_chip_info rtw8812a_hw_spec = {
|
||||
.ops = &rtw8812a_ops,
|
||||
.id = RTW_CHIP_TYPE_8812A,
|
||||
.fw_name = "rtw88/rtw8812a_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11N,
|
||||
.wlan_cpu = RTW_WCPU_8051,
|
||||
.tx_pkt_desc_sz = 40,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
@@ -1075,6 +1077,7 @@ const struct rtw_chip_info rtw8812a_hw_spec = {
|
||||
.rfe_defs = rtw8812a_rfe_defs,
|
||||
.rfe_defs_size = ARRAY_SIZE(rtw8812a_rfe_defs),
|
||||
.rx_ldpc = false,
|
||||
.amsdu_in_ampdu = true,
|
||||
.hw_feature_report = false,
|
||||
.c2h_ra_report_size = 4,
|
||||
.old_datarate_fb_limit = true,
|
||||
|
||||
@@ -82,7 +82,7 @@ static const struct usb_device_id rtw_8812au_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(usb, rtw_8812au_id_table);
|
||||
|
||||
static struct usb_driver rtw_8812au_driver = {
|
||||
.name = "rtw_8812au",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8812au_id_table,
|
||||
.probe = rtw_usb_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,62 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/* Copyright(c) 2025 Realtek Corporation
|
||||
*/
|
||||
|
||||
#ifndef __RTW8814A_H__
|
||||
#define __RTW8814A_H__
|
||||
|
||||
struct rtw8814au_efuse {
|
||||
u8 vid[2]; /* 0xd0 */
|
||||
u8 pid[2]; /* 0xd2 */
|
||||
u8 res[4]; /* 0xd4 */
|
||||
u8 mac_addr[ETH_ALEN]; /* 0xd8 */
|
||||
} __packed;
|
||||
|
||||
struct rtw8814ae_efuse {
|
||||
u8 mac_addr[ETH_ALEN]; /* 0xd0 */
|
||||
u8 vid[2]; /* 0xd6 */
|
||||
u8 did[2]; /* 0xd8 */
|
||||
u8 svid[2]; /* 0xda */
|
||||
u8 smid[2]; /* 0xdc */
|
||||
} __packed;
|
||||
|
||||
struct rtw8814a_efuse {
|
||||
__le16 rtl_id;
|
||||
u8 res0[0x0c];
|
||||
u8 usb_mode; /* 0x0e */
|
||||
u8 res1;
|
||||
|
||||
/* power index for four RF paths */
|
||||
struct rtw_txpwr_idx txpwr_idx_table[4];
|
||||
|
||||
u8 channel_plan; /* 0xb8 */
|
||||
u8 xtal_k; /* 0xb9 */
|
||||
u8 thermal_meter; /* 0xba */
|
||||
u8 iqk_lck; /* 0xbb */
|
||||
u8 pa_type; /* 0xbc */
|
||||
u8 lna_type_2g[2]; /* 0xbd */
|
||||
u8 lna_type_5g[2]; /* 0xbf */
|
||||
u8 rf_board_option; /* 0xc1 */
|
||||
u8 res2;
|
||||
u8 rf_bt_setting; /* 0xc3 */
|
||||
u8 eeprom_version; /* 0xc4 */
|
||||
u8 eeprom_customer_id; /* 0xc5 */
|
||||
u8 tx_bb_swing_setting_2g; /* 0xc6 */
|
||||
u8 tx_bb_swing_setting_5g; /* 0xc7 */
|
||||
u8 res3;
|
||||
u8 trx_antenna_option; /* 0xc9 */
|
||||
u8 rfe_option; /* 0xca */
|
||||
u8 country_code[2]; /* 0xcb */
|
||||
u8 res4[3];
|
||||
union {
|
||||
struct rtw8814au_efuse u;
|
||||
struct rtw8814ae_efuse e;
|
||||
};
|
||||
u8 res5[0x122]; /* 0xde */
|
||||
} __packed;
|
||||
|
||||
static_assert(sizeof(struct rtw8814a_efuse) == 512);
|
||||
|
||||
extern const struct rtw_chip_info rtw8814a_hw_spec;
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,40 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/* Copyright(c) 2025 Realtek Corporation
|
||||
*/
|
||||
|
||||
#ifndef __RTW8814A_TABLE_H__
|
||||
#define __RTW8814A_TABLE_H__
|
||||
|
||||
extern const struct rtw_table rtw8814a_mac_tbl;
|
||||
extern const struct rtw_table rtw8814a_agc_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type0_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type2_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type3_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type4_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type5_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type7_tbl;
|
||||
extern const struct rtw_table rtw8814a_bb_pg_type8_tbl;
|
||||
extern const struct rtw_table rtw8814a_rf_a_tbl;
|
||||
extern const struct rtw_table rtw8814a_rf_b_tbl;
|
||||
extern const struct rtw_table rtw8814a_rf_c_tbl;
|
||||
extern const struct rtw_table rtw8814a_rf_d_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type0_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type1_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type2_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type3_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type5_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type7_tbl;
|
||||
extern const struct rtw_table rtw8814a_txpwr_lmt_type8_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_type0_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_type2_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_type5_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_type7_tbl;
|
||||
extern const struct rtw_pwr_track_tbl rtw8814a_rtw_pwrtrk_type8_tbl;
|
||||
extern const struct rtw_pwr_seq_cmd * const card_disable_flow_8814a[];
|
||||
extern const struct rtw_pwr_seq_cmd * const card_enable_flow_8814a[];
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,34 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/* Copyright(c) 2025 Realtek Corporation
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
#include "pci.h"
|
||||
#include "rtw8814a.h"
|
||||
|
||||
static const struct pci_device_id rtw_8814ae_id_table[] = {
|
||||
{
|
||||
PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8813),
|
||||
.driver_data = (kernel_ulong_t)&rtw8814a_hw_spec
|
||||
},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, rtw_8814ae_id_table);
|
||||
|
||||
static struct pci_driver rtw_8814ae_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8814ae_id_table,
|
||||
.probe = rtw_pci_probe,
|
||||
.remove = rtw_pci_remove,
|
||||
.driver.pm = &rtw_pm_ops,
|
||||
.shutdown = rtw_pci_shutdown,
|
||||
#if defined(__FreeBSD__)
|
||||
.bsddriver.name = KBUILD_MODNAME,
|
||||
#endif
|
||||
};
|
||||
module_pci_driver(rtw_8814ae_driver);
|
||||
|
||||
MODULE_AUTHOR("Bitterblue Smith <rtl8821cerfe2@gmail.com>");
|
||||
MODULE_DESCRIPTION("Realtek 802.11ac wireless 8814ae driver");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
@@ -0,0 +1,54 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/* Copyright(c) 2025 Realtek Corporation
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/usb.h>
|
||||
#include "main.h"
|
||||
#include "rtw8814a.h"
|
||||
#include "usb.h"
|
||||
|
||||
static const struct usb_device_id rtw_8814au_id_table[] = {
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x8813, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x056e, 0x400b, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x056e, 0x400d, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0846, 0x9054, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1817, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1852, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1853, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0e66, 0x0026, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331a, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x20f4, 0x809a, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x20f4, 0x809b, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0106, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xa834, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xa833, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8814a_hw_spec) },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, rtw_8814au_id_table);
|
||||
|
||||
static struct usb_driver rtw_8814au_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8814au_id_table,
|
||||
.probe = rtw_usb_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
};
|
||||
module_usb_driver(rtw_8814au_driver);
|
||||
|
||||
MODULE_AUTHOR("Bitterblue Smith <rtl8821cerfe2@gmail.com>");
|
||||
MODULE_DESCRIPTION("Realtek 802.11ac wireless 8814au driver");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
@@ -865,12 +865,14 @@ static const struct rtw_chip_ops rtw8821a_ops = {
|
||||
.query_phy_status = rtw8821a_query_phy_status,
|
||||
.set_channel = rtw88xxa_set_channel,
|
||||
.mac_init = NULL,
|
||||
.mac_postinit = NULL,
|
||||
.read_rf = rtw88xxa_phy_read_rf,
|
||||
.write_rf = rtw_phy_write_rf_reg_sipi,
|
||||
.set_antenna = NULL,
|
||||
.set_tx_power_index = rtw88xxa_set_tx_power_index,
|
||||
.cfg_ldo25 = rtw8821a_cfg_ldo25,
|
||||
.efuse_grant = rtw88xxa_efuse_grant,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw88xxa_false_alarm_statistics,
|
||||
.phy_calibration = rtw8821a_phy_calibration,
|
||||
.cck_pd_set = rtw88xxa_phy_cck_pd_set,
|
||||
@@ -1137,7 +1139,7 @@ const struct rtw_chip_info rtw8821a_hw_spec = {
|
||||
.ops = &rtw8821a_ops,
|
||||
.id = RTW_CHIP_TYPE_8821A,
|
||||
.fw_name = "rtw88/rtw8821a_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11N,
|
||||
.wlan_cpu = RTW_WCPU_8051,
|
||||
.tx_pkt_desc_sz = 40,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
@@ -1175,6 +1177,7 @@ const struct rtw_chip_info rtw8821a_hw_spec = {
|
||||
.rfe_defs = rtw8821a_rfe_defs,
|
||||
.rfe_defs_size = ARRAY_SIZE(rtw8821a_rfe_defs),
|
||||
.rx_ldpc = false,
|
||||
.amsdu_in_ampdu = true,
|
||||
.hw_feature_report = false,
|
||||
.c2h_ra_report_size = 4,
|
||||
.old_datarate_fb_limit = true,
|
||||
|
||||
@@ -66,7 +66,7 @@ static const struct usb_device_id rtw_8821au_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(usb, rtw_8821au_id_table);
|
||||
|
||||
static struct usb_driver rtw_8821au_driver = {
|
||||
.name = "rtw_8821au",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8821au_id_table,
|
||||
.probe = rtw_usb_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
@@ -680,11 +680,11 @@ static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status,
|
||||
}
|
||||
|
||||
static void
|
||||
rtw8821c_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
rtw8821c_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path,
|
||||
u8 rs, u32 *phy_pwr_idx)
|
||||
{
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
static const u32 offset_txagc[2] = {0x1d00, 0x1d80};
|
||||
static u32 phy_pwr_idx;
|
||||
u8 rate, rate_idx, pwr_index, shift;
|
||||
int j;
|
||||
|
||||
@@ -692,12 +692,12 @@ rtw8821c_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
rate = rtw_rate_section[rs][j];
|
||||
pwr_index = hal->tx_pwr_tbl[path][rate];
|
||||
shift = rate & 0x3;
|
||||
phy_pwr_idx |= ((u32)pwr_index << (shift * 8));
|
||||
*phy_pwr_idx |= ((u32)pwr_index << (shift * 8));
|
||||
if (shift == 0x3 || rate == DESC_RATEVHT1SS_MCS9) {
|
||||
rate_idx = rate & 0xfc;
|
||||
rtw_write32(rtwdev, offset_txagc[path] + rate_idx,
|
||||
phy_pwr_idx);
|
||||
phy_pwr_idx = 0;
|
||||
*phy_pwr_idx);
|
||||
*phy_pwr_idx = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -705,14 +705,16 @@ rtw8821c_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
static void rtw8821c_set_tx_power_index(struct rtw_dev *rtwdev)
|
||||
{
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
u32 phy_pwr_idx = 0;
|
||||
int rs, path;
|
||||
|
||||
for (path = 0; path < hal->rf_path_num; path++) {
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++) {
|
||||
for (rs = 0; rs <= __RTW_RATE_SECTION_2SS_MAX; rs++) {
|
||||
if (rs == RTW_RATE_SECTION_HT_2S ||
|
||||
rs == RTW_RATE_SECTION_VHT_2S)
|
||||
continue;
|
||||
rtw8821c_set_tx_power_index_by_rate(rtwdev, path, rs);
|
||||
rtw8821c_set_tx_power_index_by_rate(rtwdev, path, rs,
|
||||
&phy_pwr_idx);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1661,11 +1663,13 @@ static const struct rtw_chip_ops rtw8821c_ops = {
|
||||
.query_phy_status = query_phy_status,
|
||||
.set_channel = rtw8821c_set_channel,
|
||||
.mac_init = rtw8821c_mac_init,
|
||||
.mac_postinit = NULL,
|
||||
.read_rf = rtw_phy_read_rf,
|
||||
.write_rf = rtw_phy_write_rf_reg_sipi,
|
||||
.set_antenna = NULL,
|
||||
.set_tx_power_index = rtw8821c_set_tx_power_index,
|
||||
.cfg_ldo25 = rtw8821c_cfg_ldo25,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw8821c_false_alarm_statistics,
|
||||
.phy_calibration = rtw8821c_phy_calibration,
|
||||
.cck_pd_set = rtw8821c_phy_cck_pd_set,
|
||||
@@ -1974,7 +1978,7 @@ const struct rtw_chip_info rtw8821c_hw_spec = {
|
||||
.ops = &rtw8821c_ops,
|
||||
.id = RTW_CHIP_TYPE_8821C,
|
||||
.fw_name = "rtw88/rtw8821c_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11AC,
|
||||
.wlan_cpu = RTW_WCPU_3081,
|
||||
.tx_pkt_desc_sz = 48,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
@@ -1992,6 +1996,7 @@ const struct rtw_chip_info rtw8821c_hw_spec = {
|
||||
.band = RTW_BAND_2G | RTW_BAND_5G,
|
||||
.page_size = TX_PAGE_SIZE,
|
||||
.dig_min = 0x1c,
|
||||
.amsdu_in_ampdu = true,
|
||||
.usb_tx_agg_desc_num = 3,
|
||||
.hw_feature_report = true,
|
||||
.c2h_ra_report_size = 7,
|
||||
|
||||
@@ -21,12 +21,13 @@ static const struct pci_device_id rtw_8821ce_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(pci, rtw_8821ce_id_table);
|
||||
|
||||
static struct pci_driver rtw_8821ce_driver = {
|
||||
.name = "rtw_8821ce",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8821ce_id_table,
|
||||
.probe = rtw_pci_probe,
|
||||
.remove = rtw_pci_remove,
|
||||
.driver.pm = &rtw_pm_ops,
|
||||
.shutdown = rtw_pci_shutdown,
|
||||
.err_handler = &rtw_pci_err_handler,
|
||||
#if defined(__FreeBSD__)
|
||||
.bsddriver.name = KBUILD_MODNAME,
|
||||
#endif
|
||||
|
||||
@@ -20,7 +20,7 @@ static const struct sdio_device_id rtw_8821cs_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(sdio, rtw_8821cs_id_table);
|
||||
|
||||
static struct sdio_driver rtw_8821cs_driver = {
|
||||
.name = "rtw_8821cs",
|
||||
.name = KBUILD_MODNAME,
|
||||
.probe = rtw_sdio_probe,
|
||||
.remove = rtw_sdio_remove,
|
||||
.id_table = rtw_8821cs_id_table,
|
||||
|
||||
@@ -48,7 +48,7 @@ static int rtw_8821cu_probe(struct usb_interface *intf,
|
||||
}
|
||||
|
||||
static struct usb_driver rtw_8821cu_driver = {
|
||||
.name = "rtw_8821cu",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8821cu_id_table,
|
||||
.probe = rtw_8821cu_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
@@ -935,11 +935,11 @@ static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status,
|
||||
}
|
||||
|
||||
static void
|
||||
rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path,
|
||||
u8 rs, u32 *phy_pwr_idx)
|
||||
{
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
static const u32 offset_txagc[2] = {0x1d00, 0x1d80};
|
||||
static u32 phy_pwr_idx;
|
||||
u8 rate, rate_idx, pwr_index, shift;
|
||||
int j;
|
||||
|
||||
@@ -947,12 +947,12 @@ rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
rate = rtw_rate_section[rs][j];
|
||||
pwr_index = hal->tx_pwr_tbl[path][rate];
|
||||
shift = rate & 0x3;
|
||||
phy_pwr_idx |= ((u32)pwr_index << (shift * 8));
|
||||
*phy_pwr_idx |= ((u32)pwr_index << (shift * 8));
|
||||
if (shift == 0x3) {
|
||||
rate_idx = rate & 0xfc;
|
||||
rtw_write32(rtwdev, offset_txagc[path] + rate_idx,
|
||||
phy_pwr_idx);
|
||||
phy_pwr_idx = 0;
|
||||
*phy_pwr_idx);
|
||||
*phy_pwr_idx = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -960,11 +960,13 @@ rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs)
|
||||
static void rtw8822b_set_tx_power_index(struct rtw_dev *rtwdev)
|
||||
{
|
||||
struct rtw_hal *hal = &rtwdev->hal;
|
||||
u32 phy_pwr_idx = 0;
|
||||
int rs, path;
|
||||
|
||||
for (path = 0; path < hal->rf_path_num; path++) {
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||
rtw8822b_set_tx_power_index_by_rate(rtwdev, path, rs);
|
||||
for (rs = 0; rs <= __RTW_RATE_SECTION_2SS_MAX; rs++)
|
||||
rtw8822b_set_tx_power_index_by_rate(rtwdev, path, rs,
|
||||
&phy_pwr_idx);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -981,6 +983,7 @@ static bool rtw8822b_check_rf_path(u8 antenna)
|
||||
}
|
||||
|
||||
static int rtw8822b_set_antenna(struct rtw_dev *rtwdev,
|
||||
int radio_idx,
|
||||
u32 antenna_tx,
|
||||
u32 antenna_rx)
|
||||
{
|
||||
@@ -2151,11 +2154,13 @@ static const struct rtw_chip_ops rtw8822b_ops = {
|
||||
.query_phy_status = query_phy_status,
|
||||
.set_channel = rtw8822b_set_channel,
|
||||
.mac_init = rtw8822b_mac_init,
|
||||
.mac_postinit = NULL,
|
||||
.read_rf = rtw_phy_read_rf,
|
||||
.write_rf = rtw_phy_write_rf_reg_sipi,
|
||||
.set_tx_power_index = rtw8822b_set_tx_power_index,
|
||||
.set_antenna = rtw8822b_set_antenna,
|
||||
.cfg_ldo25 = rtw8822b_cfg_ldo25,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw8822b_false_alarm_statistics,
|
||||
.phy_calibration = rtw8822b_phy_calibration,
|
||||
.pwr_track = rtw8822b_pwr_track,
|
||||
@@ -2514,7 +2519,7 @@ const struct rtw_chip_info rtw8822b_hw_spec = {
|
||||
.ops = &rtw8822b_ops,
|
||||
.id = RTW_CHIP_TYPE_8822B,
|
||||
.fw_name = "rtw88/rtw8822b_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11AC,
|
||||
.wlan_cpu = RTW_WCPU_3081,
|
||||
.tx_pkt_desc_sz = 48,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
@@ -2533,6 +2538,7 @@ const struct rtw_chip_info rtw8822b_hw_spec = {
|
||||
.band = RTW_BAND_2G | RTW_BAND_5G,
|
||||
.page_size = TX_PAGE_SIZE,
|
||||
.dig_min = 0x1c,
|
||||
.amsdu_in_ampdu = true,
|
||||
.usb_tx_agg_desc_num = 3,
|
||||
.hw_feature_report = true,
|
||||
.c2h_ra_report_size = 7,
|
||||
|
||||
@@ -17,12 +17,13 @@ static const struct pci_device_id rtw_8822be_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(pci, rtw_8822be_id_table);
|
||||
|
||||
static struct pci_driver rtw_8822be_driver = {
|
||||
.name = "rtw_8822be",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8822be_id_table,
|
||||
.probe = rtw_pci_probe,
|
||||
.remove = rtw_pci_remove,
|
||||
.driver.pm = &rtw_pm_ops,
|
||||
.shutdown = rtw_pci_shutdown,
|
||||
.err_handler = &rtw_pci_err_handler,
|
||||
#if defined(__FreeBSD__)
|
||||
.bsddriver.name = KBUILD_MODNAME,
|
||||
#endif
|
||||
|
||||
@@ -20,7 +20,7 @@ static const struct sdio_device_id rtw_8822bs_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(sdio, rtw_8822bs_id_table);
|
||||
|
||||
static struct sdio_driver rtw_8822bs_driver = {
|
||||
.name = "rtw_8822bs",
|
||||
.name = KBUILD_MODNAME,
|
||||
.probe = rtw_sdio_probe,
|
||||
.remove = rtw_sdio_remove,
|
||||
.id_table = rtw_8822bs_id_table,
|
||||
|
||||
@@ -73,6 +73,12 @@ static const struct usb_device_id rtw_8822bu_id_table[] = {
|
||||
.driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ELECOM WDB-867DU3S */
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x2c4e, 0x0107, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Mercusys MA30H */
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x2c4e, 0x010a, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Mercusys MA30N */
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x3322, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* D-Link DWA-T185 rev. A1 */
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(0x0411, 0x03d1, 0xff, 0xff, 0xff),
|
||||
.driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* BUFFALO WI-U2-866DM */
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, rtw_8822bu_id_table);
|
||||
@@ -84,7 +90,7 @@ static int rtw8822bu_probe(struct usb_interface *intf,
|
||||
}
|
||||
|
||||
static struct usb_driver rtw_8822bu_driver = {
|
||||
.name = "rtw_8822bu",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8822bu_id_table,
|
||||
.probe = rtw8822bu_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
@@ -2750,7 +2750,7 @@ static void rtw8822c_set_tx_power_index(struct rtw_dev *rtwdev)
|
||||
s8 diff_idx[4];
|
||||
|
||||
rtw8822c_set_write_tx_power_ref(rtwdev, pwr_ref_cck, pwr_ref_ofdm);
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++) {
|
||||
for (rs = 0; rs <= __RTW_RATE_SECTION_2SS_MAX; rs++) {
|
||||
for (j = 0; j < rtw_rate_size[rs]; j++) {
|
||||
rate = rtw_rate_section[rs][j];
|
||||
pwr_a = hal->tx_pwr_tbl[RF_PATH_A][rate];
|
||||
@@ -2771,6 +2771,7 @@ static void rtw8822c_set_tx_power_index(struct rtw_dev *rtwdev)
|
||||
}
|
||||
|
||||
static int rtw8822c_set_antenna(struct rtw_dev *rtwdev,
|
||||
int radio_idx,
|
||||
u32 antenna_tx,
|
||||
u32 antenna_rx)
|
||||
{
|
||||
@@ -3959,7 +3960,8 @@ static void rtw8822c_dpk_cal_coef1(struct rtw_dev *rtwdev)
|
||||
rtw_write32(rtwdev, REG_NCTL0, 0x00001148);
|
||||
rtw_write32(rtwdev, REG_NCTL0, 0x00001149);
|
||||
|
||||
check_hw_ready(rtwdev, 0x2d9c, MASKBYTE0, 0x55);
|
||||
if (!check_hw_ready(rtwdev, 0x2d9c, MASKBYTE0, 0x55))
|
||||
rtw_warn(rtwdev, "DPK stuck, performance may be suboptimal");
|
||||
|
||||
rtw_write8(rtwdev, 0x1b10, 0x0);
|
||||
rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c);
|
||||
@@ -4974,12 +4976,14 @@ static const struct rtw_chip_ops rtw8822c_ops = {
|
||||
.query_phy_status = query_phy_status,
|
||||
.set_channel = rtw8822c_set_channel,
|
||||
.mac_init = rtw8822c_mac_init,
|
||||
.mac_postinit = NULL,
|
||||
.dump_fw_crash = rtw8822c_dump_fw_crash,
|
||||
.read_rf = rtw_phy_read_rf,
|
||||
.write_rf = rtw_phy_write_rf_reg_mix,
|
||||
.set_tx_power_index = rtw8822c_set_tx_power_index,
|
||||
.set_antenna = rtw8822c_set_antenna,
|
||||
.cfg_ldo25 = rtw8822c_cfg_ldo25,
|
||||
.set_ampdu_factor = NULL,
|
||||
.false_alarm_statistics = rtw8822c_false_alarm_statistics,
|
||||
.dpk_track = rtw8822c_dpk_track,
|
||||
.phy_calibration = rtw8822c_phy_calibration,
|
||||
@@ -5346,7 +5350,7 @@ const struct rtw_chip_info rtw8822c_hw_spec = {
|
||||
.ops = &rtw8822c_ops,
|
||||
.id = RTW_CHIP_TYPE_8822C,
|
||||
.fw_name = "rtw88/rtw8822c_fw.bin",
|
||||
.wlan_cpu = RTW_WCPU_11AC,
|
||||
.wlan_cpu = RTW_WCPU_3081,
|
||||
.tx_pkt_desc_sz = 48,
|
||||
.tx_buf_desc_sz = 16,
|
||||
.rx_pkt_desc_sz = 24,
|
||||
@@ -5365,6 +5369,7 @@ const struct rtw_chip_info rtw8822c_hw_spec = {
|
||||
.band = RTW_BAND_2G | RTW_BAND_5G,
|
||||
.page_size = TX_PAGE_SIZE,
|
||||
.dig_min = 0x20,
|
||||
.amsdu_in_ampdu = true,
|
||||
.usb_tx_agg_desc_num = 3,
|
||||
.hw_feature_report = true,
|
||||
.c2h_ra_report_size = 7,
|
||||
|
||||
@@ -21,12 +21,13 @@ static const struct pci_device_id rtw_8822ce_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(pci, rtw_8822ce_id_table);
|
||||
|
||||
static struct pci_driver rtw_8822ce_driver = {
|
||||
.name = "rtw_8822ce",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8822ce_id_table,
|
||||
.probe = rtw_pci_probe,
|
||||
.remove = rtw_pci_remove,
|
||||
.driver.pm = &rtw_pm_ops,
|
||||
.shutdown = rtw_pci_shutdown,
|
||||
.err_handler = &rtw_pci_err_handler,
|
||||
#if defined(__FreeBSD__)
|
||||
.bsddriver.name = KBUILD_MODNAME,
|
||||
#endif
|
||||
|
||||
@@ -20,7 +20,7 @@ static const struct sdio_device_id rtw_8822cs_id_table[] = {
|
||||
MODULE_DEVICE_TABLE(sdio, rtw_8822cs_id_table);
|
||||
|
||||
static struct sdio_driver rtw_8822cs_driver = {
|
||||
.name = "rtw_8822cs",
|
||||
.name = KBUILD_MODNAME,
|
||||
.probe = rtw_sdio_probe,
|
||||
.remove = rtw_sdio_remove,
|
||||
.id_table = rtw_8822cs_id_table,
|
||||
|
||||
@@ -32,7 +32,7 @@ static int rtw8822cu_probe(struct usb_interface *intf,
|
||||
}
|
||||
|
||||
static struct usb_driver rtw_8822cu_driver = {
|
||||
.name = "rtw_8822cu",
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = rtw_8822cu_id_table,
|
||||
.probe = rtw8822cu_probe,
|
||||
.disconnect = rtw_usb_disconnect,
|
||||
|
||||
@@ -1637,7 +1637,7 @@ void rtw88xxa_set_tx_power_index(struct rtw_dev *rtwdev)
|
||||
int rs, path;
|
||||
|
||||
for (path = 0; path < hal->rf_path_num; path++) {
|
||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++) {
|
||||
for (rs = 0; rs <= __RTW_RATE_SECTION_2SS_MAX; rs++) {
|
||||
if (hal->rf_path_num == 1 &&
|
||||
(rs == RTW_RATE_SECTION_HT_2S ||
|
||||
rs == RTW_RATE_SECTION_VHT_2S))
|
||||
|
||||
@@ -73,6 +73,12 @@ static void rtw_rx_phy_stat(struct rtw_dev *rtwdev,
|
||||
rate_ss_evm = 2;
|
||||
evm_id = RTW_EVM_2SS_A;
|
||||
break;
|
||||
case DESC_RATEMCS16...DESC_RATEMCS23:
|
||||
case DESC_RATEVHT3SS_MCS0...DESC_RATEVHT3SS_MCS9:
|
||||
rate_ss = 3;
|
||||
rate_ss_evm = 3;
|
||||
evm_id = RTW_EVM_3SS_A;
|
||||
break;
|
||||
default:
|
||||
rtw_warn(rtwdev, "unknown pkt rate = %d\n", pkt_stat->rate);
|
||||
return;
|
||||
|
||||
@@ -101,7 +101,7 @@ int rtw_set_sar_specs(struct rtw_dev *rtwdev,
|
||||
power, BIT(RTW_COMMON_SAR_FCT));
|
||||
|
||||
for (j = 0; j < RTW_RF_PATH_MAX; j++) {
|
||||
for (k = 0; k < RTW_RATE_SECTION_MAX; k++) {
|
||||
for (k = 0; k < RTW_RATE_SECTION_NUM; k++) {
|
||||
arg = (struct rtw_sar_arg){
|
||||
.sar_band = idx,
|
||||
.path = j,
|
||||
|
||||
@@ -10,6 +10,7 @@
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/sdio_func.h>
|
||||
#include "main.h"
|
||||
#include "mac.h"
|
||||
#include "debug.h"
|
||||
#include "fw.h"
|
||||
#include "ps.h"
|
||||
@@ -546,7 +547,7 @@ static int rtw_sdio_check_free_txpg(struct rtw_dev *rtwdev, u8 queue,
|
||||
{
|
||||
unsigned int pages_free, pages_needed;
|
||||
|
||||
if (rtw_chip_wcpu_11n(rtwdev)) {
|
||||
if (rtw_chip_wcpu_8051(rtwdev)) {
|
||||
u32 free_txpg;
|
||||
|
||||
free_txpg = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG);
|
||||
@@ -677,12 +678,22 @@ static void rtw_sdio_enable_rx_aggregation(struct rtw_dev *rtwdev)
|
||||
{
|
||||
u8 size, timeout;
|
||||
|
||||
if (rtw_chip_wcpu_11n(rtwdev)) {
|
||||
switch (rtwdev->chip->id) {
|
||||
case RTW_CHIP_TYPE_8703B:
|
||||
case RTW_CHIP_TYPE_8821A:
|
||||
case RTW_CHIP_TYPE_8812A:
|
||||
size = 0x6;
|
||||
timeout = 0x6;
|
||||
} else {
|
||||
break;
|
||||
case RTW_CHIP_TYPE_8723D:
|
||||
size = 0xa;
|
||||
timeout = 0x3;
|
||||
rtw_write8_set(rtwdev, REG_RXDMA_AGG_PG_TH + 3, BIT(7));
|
||||
break;
|
||||
default:
|
||||
size = 0xff;
|
||||
timeout = 0x1;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Make the firmware honor the size limit configured below */
|
||||
@@ -718,10 +729,7 @@ static u8 rtw_sdio_get_tx_qsel(struct rtw_dev *rtwdev, struct sk_buff *skb,
|
||||
case RTW_TX_QUEUE_H2C:
|
||||
return TX_DESC_QSEL_H2C;
|
||||
case RTW_TX_QUEUE_MGMT:
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
return TX_DESC_QSEL_HIGH;
|
||||
else
|
||||
return TX_DESC_QSEL_MGMT;
|
||||
return TX_DESC_QSEL_MGMT;
|
||||
case RTW_TX_QUEUE_HI0:
|
||||
return TX_DESC_QSEL_HIGH;
|
||||
default:
|
||||
@@ -1022,7 +1030,7 @@ static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev)
|
||||
u32 rx_len, hisr, total_rx_bytes = 0;
|
||||
|
||||
do {
|
||||
if (rtw_chip_wcpu_11n(rtwdev))
|
||||
if (rtw_chip_wcpu_8051(rtwdev))
|
||||
rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN);
|
||||
else
|
||||
rx_len = rtw_read32(rtwdev, REG_SDIO_RX0_REQ_LEN);
|
||||
@@ -1034,7 +1042,7 @@ static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev)
|
||||
|
||||
total_rx_bytes += rx_len;
|
||||
|
||||
if (rtw_chip_wcpu_11n(rtwdev)) {
|
||||
if (rtw_chip_wcpu_8051(rtwdev)) {
|
||||
/* Stop if no more RX requests are pending, even if
|
||||
* rx_len could be greater than zero in the next
|
||||
* iteration. This is needed because the RX buffer may
|
||||
@@ -1046,7 +1054,7 @@ static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev)
|
||||
*/
|
||||
hisr = rtw_read32(rtwdev, REG_SDIO_HISR);
|
||||
} else {
|
||||
/* RTW_WCPU_11AC chips have improved hardware or
|
||||
/* RTW_WCPU_3081 chips have improved hardware or
|
||||
* firmware and can use rx_len unconditionally.
|
||||
*/
|
||||
hisr = REG_SDIO_HISR_RX_REQUEST;
|
||||
@@ -1147,7 +1155,7 @@ static void rtw_sdio_declaim(struct rtw_dev *rtwdev,
|
||||
sdio_release_host(sdio_func);
|
||||
}
|
||||
|
||||
static struct rtw_hci_ops rtw_sdio_ops = {
|
||||
static const struct rtw_hci_ops rtw_sdio_ops = {
|
||||
.tx_write = rtw_sdio_tx_write,
|
||||
.tx_kick_off = rtw_sdio_tx_kick_off,
|
||||
.setup = rtw_sdio_setup,
|
||||
@@ -1157,6 +1165,7 @@ static struct rtw_hci_ops rtw_sdio_ops = {
|
||||
.link_ps = rtw_sdio_link_ps,
|
||||
.interface_cfg = rtw_sdio_interface_cfg,
|
||||
.dynamic_rx_agg = NULL,
|
||||
.write_firmware_page = rtw_write_firmware_page,
|
||||
|
||||
.read8 = rtw_sdio_read8,
|
||||
.read16 = rtw_sdio_read16,
|
||||
@@ -1227,10 +1236,7 @@ static void rtw_sdio_process_tx_queue(struct rtw_dev *rtwdev,
|
||||
return;
|
||||
}
|
||||
|
||||
if (queue <= RTW_TX_QUEUE_VO)
|
||||
rtw_sdio_indicate_tx_status(rtwdev, skb);
|
||||
else
|
||||
dev_kfree_skb_any(skb);
|
||||
rtw_sdio_indicate_tx_status(rtwdev, skb);
|
||||
}
|
||||
|
||||
static void rtw_sdio_tx_handler(struct work_struct *work)
|
||||
@@ -1298,7 +1304,6 @@ static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev)
|
||||
struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv;
|
||||
int i;
|
||||
|
||||
flush_workqueue(rtwsdio->txwq);
|
||||
destroy_workqueue(rtwsdio->txwq);
|
||||
kfree(rtwsdio->tx_handler_data);
|
||||
|
||||
|
||||
@@ -178,7 +178,8 @@ static void rtw_tx_report_enable(struct rtw_dev *rtwdev,
|
||||
|
||||
void rtw_tx_report_purge_timer(struct timer_list *t)
|
||||
{
|
||||
struct rtw_dev *rtwdev = from_timer(rtwdev, t, tx_report.purge_timer);
|
||||
struct rtw_dev *rtwdev = timer_container_of(rtwdev, t,
|
||||
tx_report.purge_timer);
|
||||
struct rtw_tx_report *tx_report = &rtwdev->tx_report;
|
||||
unsigned long flags;
|
||||
|
||||
|
||||
@@ -139,7 +139,7 @@ static void rtw_usb_write(struct rtw_dev *rtwdev, u32 addr, u32 val, int len)
|
||||
|
||||
ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
|
||||
RTW_USB_CMD_REQ, RTW_USB_CMD_WRITE,
|
||||
addr, 0, data, len, 30000);
|
||||
addr, 0, data, len, 500);
|
||||
if (ret < 0 && ret != -ENODEV && count++ < 4)
|
||||
rtw_err(rtwdev, "write register 0x%x failed with %d\n",
|
||||
addr, ret);
|
||||
@@ -165,6 +165,60 @@ static void rtw_usb_write32(struct rtw_dev *rtwdev, u32 addr, u32 val)
|
||||
rtw_usb_write(rtwdev, addr, val, 4);
|
||||
}
|
||||
|
||||
static void rtw_usb_write_firmware_page(struct rtw_dev *rtwdev, u32 page,
|
||||
const u8 *data, u32 size)
|
||||
{
|
||||
struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev);
|
||||
struct usb_device *udev = rtwusb->udev;
|
||||
u32 addr = FW_START_ADDR_LEGACY;
|
||||
u8 *data_dup, *buf;
|
||||
u32 n, block_size;
|
||||
int ret;
|
||||
|
||||
switch (rtwdev->chip->id) {
|
||||
case RTW_CHIP_TYPE_8723D:
|
||||
block_size = 254;
|
||||
break;
|
||||
default:
|
||||
block_size = 196;
|
||||
break;
|
||||
}
|
||||
|
||||
data_dup = kmemdup(data, size, GFP_KERNEL);
|
||||
if (!data_dup)
|
||||
return;
|
||||
|
||||
buf = data_dup;
|
||||
|
||||
rtw_write32_mask(rtwdev, REG_MCUFW_CTRL, BIT_ROM_PGE, page);
|
||||
|
||||
while (size > 0) {
|
||||
if (size >= block_size)
|
||||
n = block_size;
|
||||
else if (size >= 8)
|
||||
n = 8;
|
||||
else
|
||||
n = 1;
|
||||
|
||||
ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
|
||||
RTW_USB_CMD_REQ, RTW_USB_CMD_WRITE,
|
||||
addr, 0, buf, n, 500);
|
||||
if (ret != n) {
|
||||
if (ret != -ENODEV)
|
||||
rtw_err(rtwdev,
|
||||
"write 0x%x len %d failed: %d\n",
|
||||
addr, n, ret);
|
||||
break;
|
||||
}
|
||||
|
||||
addr += n;
|
||||
buf += n;
|
||||
size -= n;
|
||||
}
|
||||
|
||||
kfree(data_dup);
|
||||
}
|
||||
|
||||
static int dma_mapping_to_ep(enum rtw_dma_mapping dma_mapping)
|
||||
{
|
||||
switch (dma_mapping) {
|
||||
@@ -866,6 +920,7 @@ static void rtw_usb_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
|
||||
case RTW_CHIP_TYPE_8822C:
|
||||
case RTW_CHIP_TYPE_8822B:
|
||||
case RTW_CHIP_TYPE_8821C:
|
||||
case RTW_CHIP_TYPE_8814A:
|
||||
rtw_usb_dynamic_rx_agg_v1(rtwdev, enable);
|
||||
break;
|
||||
case RTW_CHIP_TYPE_8821A:
|
||||
@@ -881,7 +936,7 @@ static void rtw_usb_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
|
||||
}
|
||||
}
|
||||
|
||||
static struct rtw_hci_ops rtw_usb_ops = {
|
||||
static const struct rtw_hci_ops rtw_usb_ops = {
|
||||
.tx_write = rtw_usb_tx_write,
|
||||
.tx_kick_off = rtw_usb_tx_kick_off,
|
||||
.setup = rtw_usb_setup,
|
||||
@@ -891,6 +946,7 @@ static struct rtw_hci_ops rtw_usb_ops = {
|
||||
.link_ps = rtw_usb_link_ps,
|
||||
.interface_cfg = rtw_usb_interface_cfg,
|
||||
.dynamic_rx_agg = rtw_usb_dynamic_rx_agg,
|
||||
.write_firmware_page = rtw_usb_write_firmware_page,
|
||||
|
||||
.write8 = rtw_usb_write8,
|
||||
.write16 = rtw_usb_write16,
|
||||
@@ -948,7 +1004,6 @@ static void rtw_usb_deinit_rx(struct rtw_dev *rtwdev)
|
||||
|
||||
skb_queue_purge(&rtwusb->rx_queue);
|
||||
|
||||
flush_workqueue(rtwusb->rxwq);
|
||||
destroy_workqueue(rtwusb->rxwq);
|
||||
|
||||
skb_queue_purge(&rtwusb->rx_free_queue);
|
||||
@@ -977,7 +1032,6 @@ static void rtw_usb_deinit_tx(struct rtw_dev *rtwdev)
|
||||
{
|
||||
struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev);
|
||||
|
||||
flush_workqueue(rtwusb->txwq);
|
||||
destroy_workqueue(rtwusb->txwq);
|
||||
rtw_usb_tx_queue_purge(rtwusb);
|
||||
}
|
||||
@@ -1094,7 +1148,8 @@ static int rtw_usb_switch_mode_new(struct rtw_dev *rtwdev)
|
||||
|
||||
static bool rtw_usb3_chip_old(u8 chip_id)
|
||||
{
|
||||
return chip_id == RTW_CHIP_TYPE_8812A;
|
||||
return chip_id == RTW_CHIP_TYPE_8812A ||
|
||||
chip_id == RTW_CHIP_TYPE_8814A;
|
||||
}
|
||||
|
||||
static bool rtw_usb3_chip_new(u8 chip_id)
|
||||
|
||||
@@ -101,7 +101,8 @@ void rtw_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss)
|
||||
*nss = 4;
|
||||
*mcs = rate - DESC_RATEVHT4SS_MCS0;
|
||||
} else if (rate >= DESC_RATEMCS0 &&
|
||||
rate <= DESC_RATEMCS15) {
|
||||
rate <= DESC_RATEMCS31) {
|
||||
*nss = 0;
|
||||
*mcs = rate - DESC_RATEMCS0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -27,11 +27,14 @@ SRCS+= rtw8723d.c rtw8723d_table.c rtw8723de.c # 11n
|
||||
SRCS+= rtw8821c.c rtw8821c_table.c rtw8821ce.c # 11ac
|
||||
SRCS+= rtw8822b.c rtw8822b_table.c rtw8822be.c # 11ac
|
||||
SRCS+= rtw8822c.c rtw8822c_table.c rtw8822ce.c # 11ac
|
||||
SRCS+= rtw8814a.c rtw8814a_table.c rtw8814ae.c # 11ac
|
||||
|
||||
# USB parts
|
||||
#SRCS+= rtw88xxa.c # 88xxa common
|
||||
#SRCS+= rtw8812a.c rtw8812a_table.c rtw8812au.c
|
||||
#SRCS+= rtw8814au.c
|
||||
#SRCS+= rtw8821a.c rtw8821a_table.c rtw8821au.c
|
||||
#CFLAGS+= -DCONFIG_RTW88_USB
|
||||
|
||||
.if defined(WITH_LEDS) && ${WITH_LEDS} > 0
|
||||
CFLAGS+= -DCONFIG_RTW88_LEDS
|
||||
@@ -43,7 +46,7 @@ SRCS+= ${LINUXKPI_GENSRCS}
|
||||
SRCS+= opt_wlan.h opt_inet6.h opt_inet.h
|
||||
|
||||
CFLAGS+= -DKBUILD_MODNAME='"rtw88"'
|
||||
CFLAGS+= -DLINUXKPI_VERSION=61400
|
||||
CFLAGS+= -DLINUXKPI_VERSION=61700
|
||||
|
||||
CFLAGS+= -I${DEVRTW88DIR}
|
||||
CFLAGS+= ${LINUXKPI_INCLUDES}
|
||||
|
||||
Reference in New Issue
Block a user