asmc: replace hardcoded model table with universal probing
Probe SMC keys at attach time to detect hardware capabilities, supporting all Intel Apple machines without per-model entries. Sensors are discovered by scanning sorted SMC key ranges for known prefixes and types. Capabilities such as SMS, fan safe speed, and ambient light are detected by key presence. A global key description table provides human-readable names for well-known temperature sensors. Tested on: - MacBook Pro (Early 2007, Mid 2014, Mid 2015) - MacBook Air (Early 2015, Mid 2017) - iMac (Mid 2011, Late 2013) - Mac mini (Mid 2011) Reviewed by: adrian Differential Revision: https://reviews.freebsd.org/D56405
This commit is contained in:
Abdelkader Boudih
committed by
Adrian Chadd
Adrian Chadd
parent
59a844b9ce
commit
e7f4269dbf
+529
-642
File diff suppressed because it is too large
Load Diff
+17
-944
@@ -33,6 +33,9 @@
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#define ASMC_TYPELEN 4 /* SMC type string length */
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#define ASMC_MAX_SENSORS 64 /* Max sensors per type */
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/* Maximum number of auto-detected temperature sensors */
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#define ASMC_TEMP_MAX 80
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struct asmc_softc {
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device_t sc_dev;
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struct mtx sc_mtx;
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@@ -45,7 +48,6 @@ struct asmc_softc {
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struct sysctl_oid *sc_temp_tree;
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struct sysctl_oid *sc_sms_tree;
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struct sysctl_oid *sc_light_tree;
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const struct asmc_model *sc_model;
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int sc_rid_port;
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int sc_rid_irq;
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struct resource *sc_ioport;
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@@ -74,6 +76,15 @@ struct asmc_softc {
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int sc_power_count;
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char *sc_light_sensors[ASMC_MAX_SENSORS];
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int sc_light_count;
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/* Auto-detected temperature sensors */
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char *sc_temp_sensors[ASMC_TEMP_MAX];
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int sc_temp_count;
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/* Auto-detected capabilities */
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int sc_has_sms;
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int sc_has_light;
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int sc_light_len; /* ASMC_LIGHT_{SHORT,LONG}LEN */
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int sc_has_safespeed;
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int sc_has_alsl; /* ALSL interrupt source */
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};
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/*
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@@ -150,9 +161,13 @@ struct asmc_softc {
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/*
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* Keyboard backlight.
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*/
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#define ASMC_KEY_LIGHTLEFT "ALV0" /* RO; 6 bytes */
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#define ASMC_LIGHT_SHORTLEN 6 /* ALV0 short format */
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#define ASMC_LIGHT_LONGLEN 10 /* ALV0 long format (10-byte) */
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#define ASMC_KEY_LIGHTLEFT "ALV0" /* RO; 6 or 10 bytes */
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#define ASMC_KEY_LIGHTRIGHT "ALV1" /* RO; 6 bytes */
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#define ASMC_KEY_LIGHTVALUE "LKSB" /* WO; 2 bytes */
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#define ASMC_KEY_LIGHTSRC "ALSL" /* RO; ambient light source */
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#define ASMC_KEY_FANSAFESPEED0 "F0Sf" /* RO; 2 bytes */
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/*
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* Clamshell.
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@@ -168,945 +183,3 @@ struct asmc_softc {
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* Interrupt keys.
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*/
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#define ASMC_KEY_INTOK "NTOK" /* WO; 1 byte */
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/*
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* Temperatures.
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*
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* First for MacBook, second for MacBook Pro, third for Intel Mac Mini,
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* fourth the Mac Pro 8-core and finally the MacBook Air.
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*
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*/
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/* maximum array size for temperatures including the last NULL */
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#define ASMC_TEMP_MAX 80
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#define ASMC_MB_TEMPS { "TB0T", "TN0P", "TN1P", "Th0H", "Th1H", \
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"TM0P", NULL }
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#define ASMC_MB_TEMPNAMES { "enclosure", "northbridge1", \
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"northbridge2", "heatsink1", \
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"heatsink2", "memory", }
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#define ASMC_MB_TEMPDESCS { "Enclosure Bottomside", \
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"Northbridge Point 1", \
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"Northbridge Point 2", "Heatsink 1", \
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"Heatsink 2", "Memory Bank A", }
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#define ASMC_MB31_TEMPS { "TB0T", "TN0P", "Th0H", "Th1H", \
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"TM0P", NULL }
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#define ASMC_MB31_TEMPNAMES { "enclosure", "northbridge1", \
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"heatsink1", "heatsink2", \
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"memory", }
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#define ASMC_MB31_TEMPDESCS { "Enclosure Bottomside", \
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"Northbridge Point 1", \
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"Heatsink 1","Heatsink 2" \
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"Memory Bank A", }
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#define ASMC_MB71_TEMPS { "TB0T", "TB1T", "TB2T", "TC0D", "TC0P", \
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"TH0P", "TN0D", "TN0P", "TN0S", "TN1D", \
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"TN1E", "TN1F", "TN1G", "TN1S", "Th1H", \
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"Ts0P", "Ts0S", NULL }
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#define ASMC_MB71_TEMPNAMES { "enclosure_bottom0", "battery_1", "battery_2", "cpu_package", "cpu_proximity", \
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"hdd_bay", "northbridge0_diode", "northbridge0_proximity", "TN0S", "mpc_die2", \
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"TN1E", "TN1F", "TN1G", "TN1S", "heatsink1", \
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"palm_rest", "memory_proximity", }
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#define ASMC_MB71_TEMPDESCS { "Enclosure Bottom 0", "Battery 1", "Battery 2", "CPU Package", "CPU Proximity", \
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"HDD Bay", "Northbridge Diode", "Northbridge Proximity", "TN0S", "MPC Die 2", \
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"TN1E", "TN1F", "TN1G", "TN1S", "Heatsink 1", \
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"Palm Rest", "Memory Proximity", }
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#define ASMC_MBP_TEMPS { "TB0T", "Th0H", "Th1H", "Tm0P", \
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"TG0H", "TG0P", "TG0T", NULL }
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#define ASMC_MBP_TEMPNAMES { "enclosure", "heatsink1", \
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"heatsink2", "memory", "graphics", \
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"graphicssink", "unknown", }
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#define ASMC_MBP_TEMPDESCS { "Enclosure Bottomside", \
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"Heatsink 1", "Heatsink 2", \
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"Memory Controller", \
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"Graphics Chip", "Graphics Heatsink", \
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"Unknown", }
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#define ASMC_MBP4_TEMPS { "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \
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"TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \
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"TTF0", "TW0P", NULL }
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#define ASMC_MBP4_TEMPNAMES { "enclosure", "heatsink1", "heatsink2", \
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"heatsink3", "memory", "graphicssink", \
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"graphics", "cpu", "cpu2", "unknown1", \
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"unknown2", "wireless", }
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#define ASMC_MBP4_TEMPDESCS { "Enclosure Bottomside", \
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"Main Heatsink 1", "Main Heatsink 2", \
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"Main Heatsink 3", \
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"Memory Controller", \
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"Graphics Chip Heatsink", \
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"Graphics Chip Diode", \
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"CPU Temperature Diode", "CPU Point 2", \
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"Unknown", "Unknown", \
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"Wireless Module", }
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#define ASMC_MBP51_TEMPS { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", \
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"TC0F", "TC0P", "TG0D", "TG0F", "TG0H", \
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"TG0P", "TG0T", "TG1H", "TN0D", "TN0P", \
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"TTF0", "Th2H", "Tm0P", "Ts0P", "Ts0S", \
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NULL }
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#define ASMC_MBP51_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \
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"enclosure_bottom_2", "enclosure_bottom_3", \
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"cpu_diode", "cpu", \
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"cpu_pin", "gpu_diode", \
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"gpu", "gpu_heatsink", \
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"gpu_pin", "gpu_transistor", \
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"gpu_2_heatsink", "northbridge_diode", \
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"northbridge_pin", "unknown", \
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"heatsink_2", "memory_controller", \
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"pci_express_slot_pin", "pci_express_slot_unk" }
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#define ASMC_MBP51_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \
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"Enclosure Bottom 2", "Enclosure Bottom 3", \
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"CPU Diode", "CPU ???", \
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"CPU Pin", "GPU Diode", \
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"GPU ???", "GPU Heatsink", \
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"GPU Pin", "GPU Transistor", \
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"GPU 2 Heatsink", "Northbridge Diode", \
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"Northbridge Pin", "Unknown", \
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"Heatsink 2", "Memory Controller", \
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"PCI Express Slot Pin", "PCI Express Slot (unk)" }
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#define ASMC_MBP62_TEMPS { "TB0T", "TB1T", "TB2T", \
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"TC0C", "TC0D", "TC0P", \
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"TC1C", "TG0D", "TG0P", \
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"TG0T", "TMCD", "TP0P", \
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"TPCD", "Th1H", "Th2H", \
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"Tm0P", "Ts0P", "Ts0S" }
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#define ASMC_MBP62_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \
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"enclosure_bottom_2", "cpu0", \
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"cpu_diode", "cpu_proximity", \
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"cpu1", "gpu_diode", \
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"gpu_pin", "gpu_transistor", \
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"TMCD", "pch_controller_proximity", \
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"pch_die", "heatsink1", \
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"heatsink2", "memory-controller", \
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"palmrest", "memoryproximity" }
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#define ASMC_MBP62_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \
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"Enclosure Bottom 2", "CPU 0", \
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"CPU Diode", "CPU Proximity", \
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"CPU 1", "GPU Diode", \
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"GPU Pin", "GPU Transistor", \
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"TMCD", "PCH Controller Proximity", \
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"PCH Die", "Heat Sink 1", \
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"Heat Sink 2", "Memory Controller", \
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"Palm Rest", "Memory Proximity" }
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#define ASMC_MBP55_TEMPS { "TB0T", "TB1T", \
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"TB2T", "TB3T", \
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"TC0D", "TC0P", \
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"TN0D", "TN0P", \
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"TTF0", \
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"Th0H", "Th1H", "ThFH", \
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"Ts0P", "Ts0S", \
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NULL }
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#define ASMC_MBP55_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \
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"enclosure_bottom_2", "enclosure_bottom_3", \
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"cpu_diode", "cpu_pin", \
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"northbridge_diode", "northbridge_pin", \
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"unknown", \
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"heatsink_0", "heatsink_1", "heatsink_2", \
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"pci_express_slot_pin", "pci_express_slot_unk" }
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#define ASMC_MBP55_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \
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"Enclosure Bottom 2", "Enclosure Bottom 3", \
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"CPU Diode", "CPU Pin", \
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"Northbridge Diode", "Northbridge Pin", \
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"Unknown", \
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"Heatsink 0", "Heatsink 1", "Heatsink 2", \
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"PCI Express Slot Pin", "PCI Express Slot (unk)" }
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#define ASMC_MBP81_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
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"TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
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"Ts0S", NULL }
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#define ASMC_MBP81_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
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"TP0P", "TPCD", "wireless", "Th1H", "Ts0P", \
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"Ts0S" }
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#define ASMC_MBP81_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
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"TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
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"Ts0S" }
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#define ASMC_MBP82_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
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"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
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"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
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"Th2H", "Tm0P", "Ts0P", "Ts0S", NULL }
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#define ASMC_MBP82_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
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"TCTD", "graphics", "TG0P", "THSP", "TM0S", \
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"TMBS", "TP0P", "TPCD", "wireless", "Th1H", \
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"Th2H", "memory", "Ts0P", "Ts0S" }
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#define ASMC_MBP82_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
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"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
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"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
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"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
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"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
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"Th2H", "Tm0P", "Ts0P", "Ts0S" }
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#define ASMC_MBP83_TEMPS { "ALSL", "F0Ac", "F1Ac", "IB0R", "IC0R", \
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"ID0R", "IG0R", "IO0R", "PCPC", "PCPG", \
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"PCPT", "PD0R", "TB1T", "TB2T", "TC0C", \
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"TC0D", "TC0P", "TC1C", "TC2C", "TC3C", \
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"TC4C", "TG0D", "TG0P", "THSP", "TP0P", \
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"TPCD", "Th1H", "Th2H", "Tm0P", "Ts0P", \
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"VC0C", "VD0R", "VG0C", "VN0C", "VP0R", NULL }
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#define ASMC_MBP83_TEMPNAMES { "ambient_light", "fan_leftside", "fan_rightside", \
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"battery_current", "cpu_vcorevtt", "dc_current", \
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"gpu_voltage", "other", "cpu_package_core", \
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"cpu_package_gpu", "cpu_package_total", "dc_in", \
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"battery_1", "battery_2", "cpu_die_digital", \
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"cpu_die_analog", "cpu_proximity", "cpu_core_1", \
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"cpu_core_2", "cpu_core_3", "cpu_core_4", "gpu_die_analog", \
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"gpu_proximity", "thunderbolt", "platform_controller", \
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"pch_die_digital", "right_fin_stack", "left_fin_stack", \
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"dc_in_air_flow", "palm_rest", "cpu_vcore", "dc_in_voltage", \
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"gpu_vcore", "intel_gpu_vcore", "pbus_voltage" }
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#define ASMC_MBP83_TEMPDESCS { "Ambient Light", "Fan Leftside", "Fan Rightside", \
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"Battery BMON Current", "CPU VcoreVTT", "DC In AMON Current", \
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"GPU Voltage", "Other 5V 3V", "CPU Package Core", \
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"CPU Package GPU", "CPU Package Total", "DC In", \
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"Battery Sensor 1", "Battery Sensor 2", "CPU Die Digital", \
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"CPU Die Analog", "CPU Proximity", "CPU Core 1 DTS", \
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"CPU Core 2 DTS", "CPU Core 3 DTS", "CPU Core 4 DTS", \
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"GPU Die Analog", "GPU Proximity", "Thunderbolt Proximity", \
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"Platform Controller Hub", "PCH Die Digital", \
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"Right Fin Stack Proximity", "Left Fin Stack Proximity", \
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"DC In Proximity Air Flow", "Palm Rest", "CPU VCore", \
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"DC In Voltage", "GPU VCore", "Intel GPU VCore", "PBus Voltage" }
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#define ASMC_MBP91_TEMPS { "TA0P", "TB0T", "TB1T", "TB2T", "TC0E", \
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"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
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"TC4C", "TCGC", "TCSA", "TCXC", "TG0D", \
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"TG0P", "TG1D", "TG1F", "TG1d", "TGTC", \
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"TGTD", "TM0P", "TM0S", "TP0P", "TPCD", \
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"Th1H", "Th2H", "Ts0P", "Ts0S", "Tsqf", NULL }
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#define ASMC_MBP91_TEMPNAMES { "ambient", "enclosure_bottom_1", "enclosure_bottom_2", \
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"enclosure_bottom_3", "cpu_die_peci_0", "cpu_die_peci_1", \
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"cpu_proximity", "cpu_core_1", "cpu_core_2", "cpu_core_3", \
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"cpu_core_4", "intel_gpu", "cpu_sys_agent", \
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"cpu_core_peci", "gpu_analog", \
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"gpu_proximity", "geforce_gpu_digital", "tg1f", \
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"gpu_2_die", "tgtc", "tgtd", "memory_proximity", \
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"mem_bank_a1", "platform_ctrl_hub", "pch_digital", \
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"main_heatsink_r", "main_heatsink_l", "palm_rest", \
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"bottom_skin", "tsqf" }
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#define ASMC_MBP91_TEMPDESCS { "Ambient", "Enclosure Bottom 1", "Enclosure Bottom 2", \
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"Enclosure Bottom 3", "CPU Die PECI 0", "CPU Die PECI 1", \
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"CPU Proximity", "CPU Core 1", "CPU Core 2", \
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"CPU Core 3", "CPU Core 4", "Intel GPU", \
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"CPU System Agent Core", "CPU Core - PECI", \
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"GPU Die - Analog", "GPU Proximity", \
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"GeForce GPU Die - Digital", "TG1F", "GPU 2 Die" \
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"TGTC", "TGTD", "Memory Proximity", \
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"Memory Bank A1", "Platform Controller Hub", "PCH Die - Digital", \
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"Main Heatsink Right", "Main Heatsink Left", "Palm Rest", \
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"Bottom Skin", "Tsqf" }
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#define ASMC_MBP92_TEMPS { "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \
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"TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \
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"TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \
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"TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \
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"TPCD", NULL }
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#define ASMC_MBP92_TEMPNAMES { "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \
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"TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \
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"TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \
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"TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \
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"TPCD" }
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|
||||
#define ASMC_MBP92_TEMPDESCS { "Palm Rest", "Memory Proximity", "Airflow 1", \
|
||||
"Battery 1", "Battery 2", "Battery TS_MAX", \
|
||||
"CPU Core 1", "CPU Core 2", "CPU1", "CPU1", \
|
||||
"TC0J", "CPU 1 Proximity", "TCFC", \
|
||||
"PECI GPU", "PECI SA", "TCTD", "PECI CPU", \
|
||||
"GPU Die", "Memory Bank A1", "Memory Module A1", \
|
||||
"PCH Die" }
|
||||
|
||||
#define ASMC_MBP112_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S", NULL }
|
||||
|
||||
#define ASMC_MBP112_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S" }
|
||||
|
||||
#define ASMC_MBP112_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S" }
|
||||
|
||||
#define ASMC_MBP113_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \
|
||||
"TG1d", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S", NULL }
|
||||
|
||||
#define ASMC_MBP113_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \
|
||||
"TG1d", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S" }
|
||||
|
||||
#define ASMC_MBP113_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
|
||||
"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
|
||||
"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \
|
||||
"TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \
|
||||
"TG1d", "TH0A", "TH0B", "TH0F", "TH0R", \
|
||||
"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
|
||||
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
|
||||
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
|
||||
"Ts1S" }
|
||||
|
||||
#define ASMC_MBP114_TEMPS { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
|
||||
"IO3R", "IO5R", "IM0C", "IC1C", "IC2C", \
|
||||
"IC3C", "ILDC", "IBLC", "IAPC", "IHSC", \
|
||||
"ICMC", "TC0P", "TP0P", "TM0P", \
|
||||
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
|
||||
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
|
||||
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
|
||||
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
|
||||
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
|
||||
"PCPG", "PCPT", "PSTR", "PDTR", NULL }
|
||||
|
||||
#define ASMC_MBP114_TEMPNAMES { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
|
||||
"IO3R", "IO5R", "IM0C", "IC1C", "IC2C", \
|
||||
"IC3C", "ILDC", "IBLC", "IAPC", "IHSC", \
|
||||
"ICMC", "TC0P", "TP0P", "TM0P", \
|
||||
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
|
||||
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
|
||||
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
|
||||
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
|
||||
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
|
||||
"PCPG", "PCPT", "PSTR", "PDTR" }
|
||||
|
||||
#define ASMC_MBP114_TEMPDESCS { "CPU High (CPU, I/O)", "DC In", "SSD", "Charger (BMON)", "CPU", \
|
||||
"Other 3.3V", "Other 5V", "Memory", "Platform Controller Hub Core", "CPU Load Current Monitor", \
|
||||
"CPU DDR", "LCD Panel", "LCD Backlight", "Airport", "Thunderbolt", \
|
||||
"S2", "CPU Proximity", "Platform Controller Hub", "Memory Proximity", "Air Flow Proximity", \
|
||||
"Left Fin Stack", "Right Fin Stack", "Airport Proximity", "Palm Rest", "Palm Rest Actuator", \
|
||||
"Battery Max", "Battery Sensor 1", "Battery Sensor 2", "SSD A", "SSD B", \
|
||||
"CPU Core 1", "CPU Core 2", "CPU Core 3", "CPU Core 4", "CPU PECI Die", \
|
||||
"Intel GPU", "Platform Controller Hub PECI", "CPU System Agent Core", "CPU VCore", "DC In", \
|
||||
"Pbus", "Ambient Light", "Leftside", "Rightside", "CPU Package Core", \
|
||||
"CPU Package GPU", "CPU Package Total", "System Total", "DC In" }
|
||||
|
||||
/* MacBookPro11,5 - same as 11,4 but without IBLC, ICMC, and IC2C keys */
|
||||
#define ASMC_MBP115_TEMPS { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
|
||||
"IO3R", "IO5R", "IM0C", "IC1C", \
|
||||
"IC3C", "ILDC", "IAPC", "IHSC", \
|
||||
"TC0P", "TP0P", "TM0P", \
|
||||
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
|
||||
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
|
||||
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
|
||||
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
|
||||
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
|
||||
"PCPG", "PCPT", "PSTR", "PDTR", NULL }
|
||||
|
||||
|
||||
#define ASMC_MBP115_TEMPNAMES { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
|
||||
"IO3R", "IO5R", "IM0C", "IC1C", \
|
||||
"IC3C", "ILDC", "IAPC", "IHSC", \
|
||||
"TC0P", "TP0P", "TM0P", \
|
||||
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
|
||||
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
|
||||
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
|
||||
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
|
||||
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
|
||||
"PCPG", "PCPT", "PSTR", "PDTR" }
|
||||
|
||||
#define ASMC_MBP115_TEMPDESCS { "CPU High (CPU, I/O)", "DC In", "SSD", "Charger (BMON)", "CPU", \
|
||||
"Other 3.3V", "Other 5V", "Memory", "Platform Controller Hub Core", \
|
||||
"CPU DDR", "LCD Panel", "Airport", "Thunderbolt", \
|
||||
"CPU Proximity", "Platform Controller Hub", "Memory Proximity", "Air Flow Proximity", \
|
||||
"Left Fin Stack", "Right Fin Stack", "Airport Proximity", "Palm Rest", "Palm Rest Actuator", \
|
||||
"Battery Max", "Battery Sensor 1", "Battery Sensor 2", "SSD A", "SSD B", \
|
||||
"CPU Core 1", "CPU Core 2", "CPU Core 3", "CPU Core 4", "CPU PECI Die", \
|
||||
"Intel GPU", "Platform Controller Hub PECI", "CPU System Agent Core", "CPU VCore", "DC In", \
|
||||
"Pbus", "Ambient Light", "Leftside", "Rightside", "CPU Package Core", \
|
||||
"CPU Package GPU", "CPU Package Total", "System Total", "DC In" }
|
||||
|
||||
#define ASMC_MBP131_TEMPS { "TB0T", "TB1T", "TB2T", "TC0F", \
|
||||
"TC0P", "TC1C", "TC2C", "TCGC", \
|
||||
"TCSA", "TCXC", "Th1H", "TM0P", \
|
||||
"TPCD", "Ts0P", "Ts0S", "TaLC", \
|
||||
"Ts1P", NULL }
|
||||
|
||||
#define ASMC_MBP131_TEMPNAMES { "battery", "battery_1", "battery_2", "cpu_die_peci", \
|
||||
"cpu_proximity", "cpu_core_1", "cpu_core_2", "intel_gpu", \
|
||||
"cpu_sys_agent", "cpu_core_peci", "right_fin_stack", "memory_proximity", \
|
||||
"platform_ctrl_hub", "trackpad", "bottom_skin", "air_flow", \
|
||||
"trackpad_act" }
|
||||
|
||||
#define ASMC_MBP131_TEMPDESCS { "Battery", "Battery Sensor 1", "Battery Sensor 2", "CPU Die (PECI)", \
|
||||
"CPU Proximity", "CPU Core 1", "CPU Core 2", "Intel GPU", \
|
||||
"CPU System Agent Core (PECI)", "CPU Core (PECI)", "Right Fin Stack", "DDR3 Proximity", \
|
||||
"Platform Controller Hub Die", "Trackpad", "Bottom Skin", "Air Flow", \
|
||||
"Trackpad Actuator" }
|
||||
|
||||
#define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL }
|
||||
#define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" }
|
||||
#define ASMC_MM_TEMPDESCS { "Northbridge Point 1", \
|
||||
"Northbridge Point 2" }
|
||||
|
||||
#define ASMC_MM21_TEMPS { "TA0P", "TC0D", \
|
||||
"TC0H", "TC0P", \
|
||||
"TC1P", "TN0P", \
|
||||
"TN1P", NULL }
|
||||
|
||||
#define ASMC_MM21_TEMPNAMES { "ambient_air", "cpu_die", \
|
||||
"cpu_heatsink", "cpu_proximity1", \
|
||||
"cpu_proximity2", "northbridge_proximity1", \
|
||||
"northbridge_proximity2", }
|
||||
|
||||
#define ASMC_MM21_TEMPDESCS { "Ambient Air Temperature" \
|
||||
"CPU Die Core Temperature", \
|
||||
"CPU Heatsink Temperature", \
|
||||
"CPU Proximity 1 Temperature", \
|
||||
"CPU Proximity 2 Temperature", \
|
||||
"Northbridge Proximity 1 Temperature", \
|
||||
"Northbridge Proximity 2 Temperature", }
|
||||
|
||||
#define ASMC_MM31_TEMPS { "TC0D", "TC0H", \
|
||||
"TC0P", "TH0P", \
|
||||
"TN0D", "TN0P", \
|
||||
"TW0P", NULL }
|
||||
|
||||
#define ASMC_MM31_TEMPNAMES { "cpu0_die", "cpu0_heatsink", \
|
||||
"cpu0_proximity", "hdd_bay", \
|
||||
"northbridge_die", \
|
||||
"northbridge_proximity", \
|
||||
"wireless_proximity", }
|
||||
|
||||
#define ASMC_MM31_TEMPDESCS { "CPU0 Die Core Temperature", \
|
||||
"CPU0 Heatsink Temperature", \
|
||||
"CPU0 Proximity Temperature", \
|
||||
"HDD Bay Temperature", \
|
||||
"Northbridge Die Core Temperature", \
|
||||
"Northbridge Proximity Temperature", \
|
||||
"Wireless Module Proximity Temperature", }
|
||||
|
||||
#define ASMC_MM41_TEMPS { "TA0P", "TC0D", "TC0G", "TC0H", "TC0P", \
|
||||
"TC0p", "TCPG", "TH0G", "TH0P", "TH0p", \
|
||||
"TM0G", "TM0P", "TM0p", "TN0D", "TN0G", \
|
||||
"TN0P", "TN0p", "TN1D", "TN1E", "TN1F", \
|
||||
"TN1G", "TN1S", "TNPG", "TO0P", "TO0p", \
|
||||
"TW0P", "Tm0P", "Tp0C", NULL }
|
||||
|
||||
#define ASMC_MM41_TEMPNAMES { "TA0P", "TC0D", "TC0G", "TC0H", "TC0P", \
|
||||
"TC0p", "TCPG", "TH0G", "TH0P", "TH0p", \
|
||||
"TM0G", "TM0P", "TM0p", "TN0D", "TN0G", \
|
||||
"TN0P", "TN0p", "TN1D", "TN1E", "TN1F", \
|
||||
"TN1G", "TN1S", "TNPG", "TO0P", "TO0p", \
|
||||
"TW0P", "Tm0P", "Tp0C", NULL }
|
||||
|
||||
#define ASMC_MM41_TEMPDESCS { "TA0P", "TC0D", "TC0G", "TC0H", "TC0P", \
|
||||
"TC0p", "TCPG", "TH0G", "TH0P", "TH0p", \
|
||||
"TM0G", "TM0P", "TM0p", "TN0D", "TN0G", \
|
||||
"TN0P", "TN0p", "TN1D", "TN1E", "TN1F", \
|
||||
"TN1G", "TN1S", "TNPG", "TO0P", "TO0p", \
|
||||
"TW0P", "Tm0P", "Tp0C", NULL }
|
||||
|
||||
#define ASMC_MM52_TEMPS { "TA0P", "TA1P", \
|
||||
"TC0D", "TC0P", \
|
||||
"TG0D", "TG1D", \
|
||||
"TG0P", "TG0M", \
|
||||
"TI0P", \
|
||||
"TM0S", "TMBS", \
|
||||
"TM0P", "TP0P", \
|
||||
"TPCD", "Tp0C", \
|
||||
"TW0P", NULL }
|
||||
|
||||
#define ASMC_MM52_TEMPNAMES { "ambient_air_proximity", "ambient_cpu_pch_wireless_dimm", \
|
||||
"cpu_die", "cpu_proximity", \
|
||||
"gpu_diode1", "gpu_diode2", \
|
||||
"gpu_proximity", "gpu_integrated_switcher", \
|
||||
"thunderbolt_proximity", \
|
||||
"memory_slot1", "memory_slot2", \
|
||||
"memory_proximity", "pch_controller_proximity", \
|
||||
"pch_controller_die", "pwr_supply", \
|
||||
"wireless_proximity", }
|
||||
|
||||
#define ASMC_MM52_TEMPDESCS { "Ambient Air Proximity Temperature", \
|
||||
"Combo Ambient CPU PCH Wireless DIMM Temperature", \
|
||||
"CPU Die Temperature", "CPU Proximity Temperature", \
|
||||
"GPU Diode 1 Temperature" , "GPU Diode 2 Temperature", \
|
||||
"GPU Proximity Temperature", \
|
||||
"Integrated Graphics/GPU Switcher Temperature", \
|
||||
"Thunderbolt Proximity Temperature", \
|
||||
"Memory Slot 1 Temperature", \
|
||||
"Memory Slot 2 Temperature", \
|
||||
"Memory Slots Proximity Temperature", \
|
||||
"Platform Controller Hub Proximity Temperature", \
|
||||
"Platform Controller Hub Die Temperature", \
|
||||
"Power Supply Temperature", \
|
||||
"Wireless Module Proximity Temperature", }
|
||||
|
||||
#define ASMC_MM61_TEMPS { "TA0P", "TA1P", \
|
||||
"TC0D", "TC0G", "TC0P", "TCPG", \
|
||||
"TI0P", \
|
||||
"TM0S", "TMBS", "TM0P", \
|
||||
"TP0P", "TPCD", \
|
||||
"Tp0C", \
|
||||
"TW0P", NULL }
|
||||
|
||||
#define ASMC_MM61_TEMPNAMES { "ambient_air_proximity", "ambient_cpu_pch_wireless_dimm", \
|
||||
"cpu_die", "TC0G", "cpu_proximity", "TCPG", \
|
||||
"thunderbolt_proximity", \
|
||||
"memory_slot1", "memory_slot2", "memory_proximity", \
|
||||
"pch_controller_proximity", "pch_controller_die", \
|
||||
"pwr_supply", \
|
||||
"wireless_proximity", NULL }
|
||||
|
||||
#define ASMC_MM61_TEMPDESCS { "Ambient Air Proximity Temperature", \
|
||||
"Combo Ambient CPU PCH Wireless DIMM Temperature", \
|
||||
"CPU Die Temperature", \
|
||||
NULL, \
|
||||
"CPU Proximity Temperature", \
|
||||
NULL, \
|
||||
"Thunderbolt Proximity Temperature", \
|
||||
"Memory Slot 1 Temperature", \
|
||||
"Memory Slot 2 Temperature", \
|
||||
"Memory Slots Proximity Temperature", \
|
||||
"Platform Controller Hub Proximity Temperature", \
|
||||
"Platform Controller Hub Die Temperature", \
|
||||
"Power Supply Temperature", \
|
||||
"Wireless Module Proximity Temperature", NULL }
|
||||
|
||||
#define ASMC_MM62_TEMPS { "TA0P", "TA1P", \
|
||||
"TC0D", "TC0G", "TC0P", "TCPG", \
|
||||
"TI0P", \
|
||||
"TM0S", "TMBS", "TM0P", \
|
||||
"TP0P", "TPCD", \
|
||||
"Tp0C", \
|
||||
"TW0P", NULL }
|
||||
|
||||
#define ASMC_MM62_TEMPNAMES { "ambient_air_proximity", "ambient_cpu_pch_wireless_dimm", \
|
||||
"cpu_die", "TC0G", "cpu_proximity", "TCPG", \
|
||||
"thunderbolt_proximity", \
|
||||
"memory_slot1", "memory_slot2", "memory_proximity", \
|
||||
"pch_controller_proximity", "pch_controller_die", \
|
||||
"pwr_supply", \
|
||||
"wireless_proximity", NULL }
|
||||
|
||||
#define ASMC_MM62_TEMPDESCS { "Ambient Air Proximity Temperature", \
|
||||
"Combo Ambient CPU PCH Wireless DIMM Temperature", \
|
||||
"CPU Die Temperature", \
|
||||
NULL, \
|
||||
"CPU Proximity Temperature", \
|
||||
NULL, \
|
||||
"Thunderbolt Proximity Temperature", \
|
||||
"Memory Slot 1 Temperature", \
|
||||
"Memory Slot 2 Temperature", \
|
||||
"Memory Slots Proximity Temperature", \
|
||||
"Platform Controller Hub Proximity Temperature", \
|
||||
"Platform Controller Hub Die Temperature", \
|
||||
"Power Supply Temperature", \
|
||||
"Wireless Module Proximity Temperature", NULL }
|
||||
|
||||
#define ASMC_MM71_TEMPS { "TA0p", "TA1p", \
|
||||
"TA2p", "TC0c", \
|
||||
"TC0p", "TC1c", \
|
||||
"TCGc", "TCSc", \
|
||||
"TCXC", "TCXR", \
|
||||
"TM0p", "TPCd", \
|
||||
"TW0p", "Te0T", \
|
||||
"Tm0P", NULL }
|
||||
|
||||
#define ASMC_MM71_TEMPNAMES { "ambient_air1", "ambient_air2", \
|
||||
"ambient_air3", "cpu_core1_peci", \
|
||||
"cpu_proximity", "cpu_core2_peci", \
|
||||
"intel_gpu", "cpu_sa_core_peci", \
|
||||
"cpu_core", "cpu_peci_dts", \
|
||||
"memory_proximity", "pch_controller_die", \
|
||||
"wireless_proximity", "thunderbolt_diode", \
|
||||
"logic_board", }
|
||||
|
||||
#define ASMC_MM71_TEMPDESCS { "Ambient Air Temperature 1", \
|
||||
"Ambient Air Temperature 2", \
|
||||
"Ambient Air Temperature 3", \
|
||||
"CPU Core 1 PECI Temperature", "CPU Proximity Temperature", \
|
||||
"CPU Core 2 PECI Temperature", "Intel GPU Temperature", \
|
||||
"CPU System Agent Core PECI Temperature", \
|
||||
"CPU Core Temperature", "CPU PECI DTS Temperature", \
|
||||
"Memory Proximity Temperature", \
|
||||
"Platform Controller Hub Die Temperature", \
|
||||
"Wireless Module Proximity Temperature", \
|
||||
"Thunderbolt Diode Temperature", \
|
||||
"Logic Board temperature", }
|
||||
|
||||
#define ASMC_MP1_TEMPS { "TA0P", \
|
||||
"TCAH", "TCBH", \
|
||||
"TC0P", "TC0C", "TC1C", \
|
||||
"TC2C", "TC3C", "THTG", \
|
||||
"TH0P", "TH1P", \
|
||||
"TH2P", "TH3P", \
|
||||
"TM0P", "TM1P", "TM2P", \
|
||||
"TM8P", "TM9P", "TMAP", \
|
||||
"TM0S", "TM1S", "TM2P", "TM3S", \
|
||||
"TM8S", "TM9S", "TMAS", "TMBS", \
|
||||
"TN0H", "TS0C", \
|
||||
"Tp0C", "Tp1C", "Tv0S", "Tv1S", NULL }
|
||||
|
||||
#define ASMC_MP1_TEMPNAMES { "ambient", \
|
||||
"cpu_a_heatsink", "cpu_b_heatsink", \
|
||||
"cpu_a_proximity", "cpu_core0", "cpu_core1", \
|
||||
"cpu_core2", "cpu_core3", "THTG", \
|
||||
"hdd_bay0", "hdd_bay1", \
|
||||
"hdd_bay2", "hdd_bay3", \
|
||||
"memory_card_a_proximity0", \
|
||||
"memory_card_a_proximity1", \
|
||||
"memory_card_a_proximity2", \
|
||||
"memory_card_b_proximity0", \
|
||||
"memory_card_b_proximity1", \
|
||||
"memory_card_b_proximity2", \
|
||||
"memory_card_a_slot0", \
|
||||
"memory_card_a_slot1", \
|
||||
"memory_card_a_slot2", \
|
||||
"memory_card_a_slot3", \
|
||||
"memory_card_b_slot0", \
|
||||
"memory_card_b_slot1", \
|
||||
"memory_card_b_slot2", \
|
||||
"memory_card_b_slot3", \
|
||||
"mch_heatsink", "expansion_slots", \
|
||||
"power_supply_loc0", "power_supply_loc1", \
|
||||
"Tv0S", "Tv1S", }
|
||||
|
||||
#define ASMC_MP1_TEMPDESCS { "Ambient Air", \
|
||||
"CPU A Heatsink", "CPU B Heatsink", \
|
||||
"CPU A Proximity", \
|
||||
"CPU Core 1", "CPU Core 2", \
|
||||
"CPU Core 3", "CPU Core 4", "THTG", \
|
||||
"Hard Drive Bay 1", "Hard Drive Bay 2", \
|
||||
"Hard Drive Bay 3", "Hard Drive Bay 4", \
|
||||
"Memory Riser A, Proximity 1", \
|
||||
"Memory Riser A, Proximity 2", \
|
||||
"Memory Riser A, Proximity 3", \
|
||||
"Memory Riser B, Proximity 1", \
|
||||
"Memory Riser B, Proximity 2", \
|
||||
"Memory Riser B, Proximity 3", \
|
||||
"Memory Riser A, Slot 1", \
|
||||
"Memory Riser A, Slot 2", \
|
||||
"Memory Riser A, Slot 3", \
|
||||
"Memory Riser A, Slot 4", \
|
||||
"Memory Riser B, Slot 1", \
|
||||
"Memory Riser B, Slot 2", \
|
||||
"Memory Riser B, Slot 3", \
|
||||
"Memory Riser B, Slot 4", \
|
||||
"MCH Heatsink", "Expansion Slots", \
|
||||
"Power Supply, Location 1", \
|
||||
"Power Supply, Location 2", \
|
||||
"Tv0S", "Tv1S", }
|
||||
|
||||
#define ASMC_MP31_TEMPS { "TA0P", \
|
||||
"TC0C", "TC0D", "TC0P", \
|
||||
"TC1C", "TC1D", \
|
||||
"TC2C", "TC2D", \
|
||||
"TC3C", "TC3D", \
|
||||
"TCAG", "TCAH", "TCBG", "TCBH", \
|
||||
"TH0P", "TH1P", "TH2P", "TH3P", \
|
||||
"TM0P", "TM0S", "TM1P", "TM1S", \
|
||||
"TM2P", "TM2S", "TM3S", \
|
||||
"TM8P", "TM8S", "TM9P", "TM9S", \
|
||||
"TMAP", "TMAS", "TMBS", \
|
||||
"TN0C", "TN0D", "TN0H", \
|
||||
"TS0C", \
|
||||
"Tp0C", "Tp1C", \
|
||||
"Tv0S", "Tv1S", NULL }
|
||||
|
||||
#define ASMC_MP31_TEMPNAMES { "ambient", \
|
||||
"cpu_core0", "cpu_diode0", "cpu_a_proximity", \
|
||||
"cpu_core1", "cpu_diode1", \
|
||||
"cpu_core2", "cpu_diode2", \
|
||||
"cpu_core3", "cpu_diode3", \
|
||||
"cpu_a_pkg", "cpu_a_heatsink", \
|
||||
"cpu_b_pkg", "cpu_b_heatsink", \
|
||||
"hdd_bay0", "hdd_bay1", \
|
||||
"hdd_bay2", "hdd_bay3", \
|
||||
"mem_riser_a_prox0", "mem_riser_a_slot0", \
|
||||
"mem_riser_a_prox1", "mem_riser_a_slot1", \
|
||||
"mem_riser_a_prox2", "mem_riser_a_slot2", \
|
||||
"mem_riser_a_slot3", \
|
||||
"mem_riser_b_prox0", "mem_riser_b_slot0", \
|
||||
"mem_riser_b_prox1", "mem_riser_b_slot1", \
|
||||
"mem_riser_b_prox2", "mem_riser_b_slot2", \
|
||||
"mem_riser_b_slot3", \
|
||||
"northbridge_core", "northbridge_diode", \
|
||||
"northbridge_heatsink", \
|
||||
"expansion_slots", \
|
||||
"power_supply0", "power_supply1", \
|
||||
"vrm0", "vrm1", }
|
||||
|
||||
#define ASMC_MP31_TEMPDESCS { "Ambient Air", \
|
||||
"CPU Core 1", "CPU Diode 1", \
|
||||
"CPU A Proximity", \
|
||||
"CPU Core 2", "CPU Diode 2", \
|
||||
"CPU Core 3", "CPU Diode 3", \
|
||||
"CPU Core 4", "CPU Diode 4", \
|
||||
"CPU A Package", "CPU A Heatsink", \
|
||||
"CPU B Package", "CPU B Heatsink", \
|
||||
"Hard Drive Bay 1", "Hard Drive Bay 2", \
|
||||
"Hard Drive Bay 3", "Hard Drive Bay 4", \
|
||||
"Memory Riser A, Proximity 1", \
|
||||
"Memory Riser A, Slot 1", \
|
||||
"Memory Riser A, Proximity 2", \
|
||||
"Memory Riser A, Slot 2", \
|
||||
"Memory Riser A, Proximity 3", \
|
||||
"Memory Riser A, Slot 3", \
|
||||
"Memory Riser A, Slot 4", \
|
||||
"Memory Riser B, Proximity 1", \
|
||||
"Memory Riser B, Slot 1", \
|
||||
"Memory Riser B, Proximity 2", \
|
||||
"Memory Riser B, Slot 2", \
|
||||
"Memory Riser B, Proximity 3", \
|
||||
"Memory Riser B, Slot 3", \
|
||||
"Memory Riser B, Slot 4", \
|
||||
"Northbridge Core", "Northbridge Diode", \
|
||||
"Northbridge Heatsink", \
|
||||
"Expansion Slots", \
|
||||
"Power Supply 1", "Power Supply 2", \
|
||||
"VRM 1", "VRM 2", }
|
||||
|
||||
#define ASMC_MP2_TEMPS { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
|
||||
"TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
|
||||
"TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
|
||||
"TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
|
||||
"TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
|
||||
"TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
|
||||
"TM8S", "TM9P", "TM9S", "TN0H", "TS0C", \
|
||||
NULL }
|
||||
|
||||
#define ASMC_MP2_TEMPNAMES { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
|
||||
"TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
|
||||
"TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
|
||||
"TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
|
||||
"TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
|
||||
"TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
|
||||
"TM8S", "TM9P", "TM9S", "TN0H", "TS0C", }
|
||||
|
||||
#define ASMC_MP2_TEMPDESCS { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \
|
||||
"TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \
|
||||
"TC2C", "TC2D", "TC3C", "TC3D", "THTG", \
|
||||
"TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \
|
||||
"TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \
|
||||
"TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \
|
||||
"TM8S", "TM9P", "TM9S", "TN0H", "TS0C", }
|
||||
|
||||
#define ASMC_MP5_TEMPS { "TA0P", "TCAC", "TCAD", "TCAG", "TCAH", \
|
||||
"TCAS", "TCBC", "TCBD", "TCBG", "TCBH", \
|
||||
"TCBS", "TH1F", "TH1P", "TH1V", "TH2F", \
|
||||
"TH2P", "TH2V", "TH3F", "TH3P", "TH3V", \
|
||||
"TH4F", "TH4P", "TH4V", "THPS", "THTG", \
|
||||
"TM1P", "TM2P", "TM2V", "TM3P", "TM3V", \
|
||||
"TM4P", "TM5P", "TM6P", "TM6V", "TM7P", \
|
||||
"TM7V", "TM8P", "TM8V", "TM9V", "TMA1", \
|
||||
"TMA2", "TMA3", "TMA4", "TMB1", "TMB2", \
|
||||
"TMB3", "TMB4", "TMHS", "TMLS", "TMPS", \
|
||||
"TMPV", "TMTG", "TN0D", "TN0H", "TNTG", \
|
||||
"Te1F", "Te1P", "Te1S", "Te2F", "Te2S", \
|
||||
"Te3F", "Te3S", "Te4F", "Te4S", "Te5F", \
|
||||
"Te5S", "TeGG", "TeGP", "TeRG", "TeRP", \
|
||||
"TeRV", "Tp0C", "Tp1C", "TpPS", "TpTG", \
|
||||
NULL }
|
||||
|
||||
#define ASMC_MP5_TEMPNAMES { "ambient", "TCAC", "TCAD", "TCAG", "TCAH", \
|
||||
"TCAS", "TCBC", "TCBD", "TCBG", "TCBH", \
|
||||
"TCBS", "TH1F", "TH1P", "TH1V", "TH2F", \
|
||||
"TH2P", "TH2V", "TH3F", "TH3P", "TH3V", \
|
||||
"TH4F", "TH4P", "TH4V", "THPS", "THTG", \
|
||||
"TM1P", "TM2P", "TM2V", "TM3P", "TM3V", \
|
||||
"TM4P", "TM5P", "TM6P", "TM6V", "TM7P", \
|
||||
"TM7V", "TM8P", "TM8V", "TM9V", "ram_a1", \
|
||||
"ram_a2", "ram_a3", "ram_a4", "ram_b1", "ram_b2", \
|
||||
"ram_b3", "ram_b4", "TMHS", "TMLS", "TMPS", \
|
||||
"TMPV", "TMTG", "TN0D", "TN0H", "TNTG", \
|
||||
"Te1F", "Te1P", "Te1S", "Te2F", "Te2S", \
|
||||
"Te3F", "Te3S", "Te4F", "Te4S", "Te5F", \
|
||||
"Te5S", "TeGG", "TeGP", "TeRG", "TeRP", \
|
||||
"TeRV", "Tp0C", "Tp1C", "TpPS", "TpTG", }
|
||||
|
||||
#define ASMC_MP5_TEMPDESCS { "TA0P", "TCAC", "TCAD", "TCAG", "TCAH", \
|
||||
"TCAS", "TCBC", "TCBD", "TCBG", "TCBH", \
|
||||
"TCBS", "TH1F", "TH1P", "TH1V", "TH2F", \
|
||||
"TH2P", "TH2V", "TH3F", "TH3P", "TH3V", \
|
||||
"TH4F", "TH4P", "TH4V", "THPS", "THTG", \
|
||||
"TM1P", "TM2P", "TM2V", "TM3P", "TM3V", \
|
||||
"TM4P", "TM5P", "TM6P", "TM6V", "TM7P", \
|
||||
"TM7V", "TM8P", "TM8V", "TM9V", "TMA1", \
|
||||
"TMA2", "TMA3", "TMA4", "TMB1", "TMB2", \
|
||||
"TMB3", "TMB4", "TMHS", "TMLS", "TMPS", \
|
||||
"TMPV", "TMTG", "TN0D", "TN0H", "TNTG", \
|
||||
"Te1F", "Te1P", "Te1S", "Te2F", "Te2S", \
|
||||
"Te3F", "Te3S", "Te4F", "Te4S", "Te5F", \
|
||||
"Te5S", "TeGG", "TeGP", "TeRG", "TeRP", \
|
||||
"TeRV", "Tp0C", "Tp1C", "TpPS", "TpTG", }
|
||||
|
||||
#define ASMC_MP6_TEMPS { "TA0P", "TA1P", "TC0P", "TG0D", "TG0P", \
|
||||
"TG1D", "TG1P", "TM0P", "TM1P", NULL }
|
||||
|
||||
#define ASMC_MP6_TEMPNAMES { "ambient_air_1", "ambient_air_2", \
|
||||
"cpu_proximity", "gpu_diode_1", \
|
||||
"gpu_proximity_1", "gpu_diode_2", \
|
||||
"gpu_proximity_2", "mem_proximity_1", \
|
||||
"mem_proximity_2" }
|
||||
|
||||
#define ASMC_MP6_TEMPDESCS { "Ambient Air 1", "Ambient Air 2", \
|
||||
"CPU Proximity", "GPU Diode 1", \
|
||||
"GPU Proximity 1", "GPU Diode 2", \
|
||||
"GPU Proximity 2", "Memory Bank A", \
|
||||
"Memory Bank B" }
|
||||
|
||||
#define ASMC_MBA_TEMPS { "TB0T", NULL }
|
||||
#define ASMC_MBA_TEMPNAMES { "enclosure" }
|
||||
#define ASMC_MBA_TEMPDESCS { "Enclosure Bottom" }
|
||||
|
||||
#define ASMC_MBA3_TEMPS { "TB0T", "TB1T", "TB2T", \
|
||||
"TC0D", "TC0E", "TC0P", NULL }
|
||||
|
||||
#define ASMC_MBA3_TEMPNAMES { "enclosure", "TB1T", "TB2T", \
|
||||
"TC0D", "TC0E", "TC0P" }
|
||||
|
||||
#define ASMC_MBA3_TEMPDESCS { "Enclosure Bottom", "TB1T", "TB2T", \
|
||||
"TC0D", "TC0E", "TC0P" }
|
||||
|
||||
#define ASMC_MBA4_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", \
|
||||
"TC0D", "TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", "TCGC", "TCSA", \
|
||||
"TH0F", "TH0J", "TH0O", "TH0o", \
|
||||
"TM0P", "TPCD", "Ta0P", "Th1H", \
|
||||
"Tm0P", "Tm1P", "Ts0P", "Ts0S", \
|
||||
NULL }
|
||||
|
||||
#define ASMC_MBA4_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TC0C", \
|
||||
"TC0D", "TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", "TCGC", "TCSA", \
|
||||
"TH0F", "TH0J", "TH0O", "TH0o", \
|
||||
"TM0P", "TPCD", "Ta0P", "Th1H", \
|
||||
"Tm0P", "Tm1P", "Ts0P", "Ts0S", \
|
||||
NULL }
|
||||
|
||||
#define ASMC_MBA4_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TC0C", \
|
||||
"TC0D", "TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", "TCGC", "TCSA", \
|
||||
"TH0F", "TH0J", "TH0O", "TH0o", \
|
||||
"TM0P", "TPCD", "Ta0P", "Th1H", \
|
||||
"Tm0P", "Tm1P", "Ts0P", "Ts0S", \
|
||||
NULL }
|
||||
|
||||
#define ASMC_MBA5_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", \
|
||||
"TC0D", "TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", "TCGC", "TCSA", \
|
||||
"TCXC", "THSP", "TM0P", "TPCD", \
|
||||
"Ta0P", "Th1H", "Tm0P", "Tm1P", \
|
||||
"Ts0P", "Ts0S", NULL }
|
||||
|
||||
#define ASMC_MBA5_TEMPNAMES { "enclosure1", "enclosure2", "enclosure3", "TC0C", \
|
||||
"cpudiode", "cputemp1", "cputemp2", "cpuproximity", \
|
||||
"cpucore1", "cpucore2", "cpupeci", "pecisa", \
|
||||
"TCXC", "THSP", "memorybank", "pchdie", \
|
||||
"Ta0P", "heatpipe", "mainboardproximity1", "mainboardproximity2", \
|
||||
"palmrest", "memoryproximity" }
|
||||
|
||||
#define ASMC_MBA5_TEMPDESCS { "Enclosure Bottom 1", "Enclosure Bottom 2", "Enclosure Bottom 3", "TC0C",\
|
||||
"CPU Diode", "CPU Temp 1", "CPU Temp 2", "CPU Proximity", \
|
||||
"CPU Core 1", "CPU Core 2", "CPU Peci Core", "PECI SA", \
|
||||
"TCXC", "THSP", "Memory Bank A", "PCH Die", \
|
||||
"Ta0P", "Heatpipe", "Mainboard Proximity 1", "Mainboard Proximity 2", \
|
||||
"Palm Rest", "Memory Proximity" }
|
||||
|
||||
/*
|
||||
* TODO: validate the temp zones for MBA 6.x !
|
||||
*/
|
||||
#define ASMC_MBA6_TEMPS { "TB0T", "TB1T", "TB2T", \
|
||||
"TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", "TCGC", "TCSA", \
|
||||
"TCXC", "THSP", "TM0P", "TPCD", \
|
||||
"Ta0P", "Th1H", "Tm0P", \
|
||||
"Ts0P", "Ts0S", NULL }
|
||||
|
||||
#define ASMC_MBA6_TEMPNAMES { "enclosure1", "enclosure2", "enclosure3", \
|
||||
"cputemp1", "cputemp2", "cpuproximity", \
|
||||
"cpucore1", "cpucore2", "cpupeci", "pecisa", \
|
||||
"TCXC", "THSP", "memorybank", "pchdie", \
|
||||
"Ta0P", "heatpipe", "mainboardproximity1", \
|
||||
"palmrest", "memoryproximity" }
|
||||
|
||||
#define ASMC_MBA6_TEMPDESCS { "Enclosure Bottom 1", "Enclosure Bottom 2", "Enclosure Bottom 3", \
|
||||
"CPU Temp 1", "CPU Temp 2", "CPU Proximity", \
|
||||
"CPU Core 1", "CPU Core 2", "CPU Peci Core", "PECI SA", \
|
||||
"TCXC", "THSP", "Memory Bank A", "PCH Die", \
|
||||
"Ta0P", "Heatpipe", "Mainboard Proximity 1", \
|
||||
"Palm Rest", "Memory Proximity" }
|
||||
|
||||
|
||||
#define ASMC_MBA7_TEMPS { "TB0T", "TB1T", "TB2T", \
|
||||
"TC0E", "TC0F", "TC0P", \
|
||||
"TC1C", "TC2C", \
|
||||
"TCGC", "TCSA", "TCXC", \
|
||||
"THSP", "TM0P", "TPCD", \
|
||||
"TW0P" "Ta0P", "Th1H", \
|
||||
"Tm0P", "Ts0P", "Ts0S", NULL }
|
||||
|
||||
#define ASMC_MBA7_TEMPNAMES { "enclosure1", "enclosure2", "enclosure3", \
|
||||
"cputemp1", "cputemp2", "cpuproximity", \
|
||||
"cpucore1", "cpucore2", \
|
||||
"pecigpu", "pecisa", "pecicpu", \
|
||||
"thunderboltproximity", "memorybank", "pchdie", \
|
||||
"wirelessproximity", "airflowproximity", "heatpipe", \
|
||||
"mainboardproximity", "palmrest", "memoryproximity" }
|
||||
|
||||
#define ASMC_MBA7_TEMPDESCS { "Enclosure Bottom 1", "Enclosure Bottom 2", "Enclosure Bottom 3", \
|
||||
"CPU Temp 1", "CPU Temp 2", "CPU Proximity", \
|
||||
"CPU Core 1", "CPU Core 2", \
|
||||
"PECI GPU", "PECI SA", "PECI CPU", \
|
||||
"Thunderbolt Proximity", "Memory Bank A", "PCH Die", \
|
||||
"Wireless Proximity", "Airflow Proxmity", "Heatpipe", \
|
||||
"Mainboard Proximity", "Palm Rest", "Memory Proximity" }
|
||||
|
||||
Reference in New Issue
Block a user