Remove bt(4) driver
The buslogic scsi driver has been tagged as gone in 12 for some time now. Remove it. The nycbug dmesg database shows only one sighting in 6 for this driver. It was very popular in the early days of the project, but that popularity seems to have died by 2004 when the nycbug database started up. Relnotes: yes
This commit is contained in:
@@ -348,7 +348,6 @@ for details.
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.Xr ahci 4 ,
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.Xr ahd 4 ,
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.Xr ata 4 ,
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.Xr bt 4 ,
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.Xr cd 4 ,
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.Xr ch 4 ,
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.Xr da 4 ,
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@@ -1551,8 +1551,6 @@ options TERMINAL_KERN_ATTR=(FG_LIGHTRED|BG_BLACK)
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# ahc: Adaptec 274x/284x/2910/293x/294x/394x/3950x/3960x/398X/4944/
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# 19160x/29160x, aic7770/aic78xx
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# ahd: Adaptec 29320/39320 Controllers.
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# bt: Most Buslogic controllers: including BT-445, BT-54x, BT-64x, BT-74x,
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# BT-75x, BT-946, BT-948, BT-956, BT-958, SDC3211B, SDC3211F, SDC3222F
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# esp: Emulex ESP, NCR 53C9x and QLogic FAS families based controllers
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# including the AMD Am53C974 (found on devices such as the Tekram
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# DC-390(T)) and the Sun ESP and FAS families of controllers
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@@ -1572,13 +1570,6 @@ options TERMINAL_KERN_ATTR=(FG_LIGHTRED|BG_BLACK)
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# 53C1010-33, 53C1010-66.
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# trm: Tekram DC395U/UW/F DC315U adapters.
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#
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# Note that the order is important in order for Buslogic ISA cards to be
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# probed correctly.
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#
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device bt
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hint.bt.0.at="isa"
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hint.bt.0.port="0x330"
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device ahc
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device ahd
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device esp
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@@ -1327,9 +1327,6 @@ dev/bnxt/bnxt_hwrm.c optional bnxt iflib pci
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dev/bnxt/bnxt_sysctl.c optional bnxt iflib pci
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dev/bnxt/bnxt_txrx.c optional bnxt iflib pci
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dev/bnxt/if_bnxt.c optional bnxt iflib pci
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dev/buslogic/bt.c optional bt
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dev/buslogic/bt_isa.c optional bt isa
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dev/buslogic/bt_pci.c optional bt pci
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dev/bwi/bwimac.c optional bwi
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dev/bwi/bwiphy.c optional bwi
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dev/bwi/bwirf.c optional bwi
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File diff suppressed because it is too large
Load Diff
@@ -1,358 +0,0 @@
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/*-
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* Product specific probe and attach routines for:
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* Buslogic BT-54X and BT-445 cards
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*
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 1998, 1999 Justin T. Gibbs
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <isa/isavar.h>
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#include <dev/buslogic/btreg.h>
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#include <cam/scsi/scsi_all.h>
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static bus_dma_filter_t btvlbouncefilter;
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static bus_dmamap_callback_t btmapsensebuffers;
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static int
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bt_isa_alloc_resources(device_t dev, u_long portstart, u_long portend)
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{
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int rid;
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struct resource *port;
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struct resource *irq;
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struct resource *drq;
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rid = 0;
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port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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portstart, portend, BT_NREGS, RF_ACTIVE);
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if (!port)
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return (ENOMEM);
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if (isa_get_irq(dev) != -1) {
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rid = 0;
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irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (!irq) {
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if (port)
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bus_release_resource(dev, SYS_RES_IOPORT,
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0, port);
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return (ENOMEM);
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}
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} else
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irq = NULL;
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if (isa_get_drq(dev) != -1) {
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rid = 0;
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drq = bus_alloc_resource_any(dev, SYS_RES_DRQ, &rid, RF_ACTIVE);
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if (!drq) {
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if (port)
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bus_release_resource(dev, SYS_RES_IOPORT,
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0, port);
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if (irq)
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bus_release_resource(dev, SYS_RES_IRQ,
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0, irq);
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return (ENOMEM);
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}
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} else
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drq = NULL;
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bt_init_softc(dev, port, irq, drq);
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return (0);
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}
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static void
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bt_isa_release_resources(device_t dev)
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{
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struct bt_softc *bt = device_get_softc(dev);
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if (bt->port)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, bt->port);
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if (bt->irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, bt->irq);
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if (bt->drq)
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bus_release_resource(dev, SYS_RES_DRQ, 0, bt->drq);
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bt_free_softc(dev);
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}
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/*
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* Check if the device can be found at the port given
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* and if so, set it up ready for further work
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* as an argument, takes the isa_device structure from
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* autoconf.c
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*/
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static int
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bt_isa_probe(device_t dev)
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{
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/*
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* find unit and check we have that many defined
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*/
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int port_index;
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int max_port_index;
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/* No pnp support */
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if (isa_get_vendorid(dev))
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return (ENXIO);
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port_index = 0;
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max_port_index = BT_NUM_ISAPORTS - 1;
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/*
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* Bound our board search if the user has
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* specified an exact port.
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*/
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bt_find_probe_range(isa_get_port(dev), &port_index, &max_port_index);
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if (port_index < 0)
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return (ENXIO);
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/* Attempt to find an adapter */
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for (;port_index <= max_port_index; port_index++) {
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struct bt_probe_info info;
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u_int ioport;
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ioport = bt_iop_from_bio(port_index);
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/*
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* Ensure this port has not already been claimed already
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* by a PCI, ISA adapter.
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*/
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if (bt_check_probed_iop(ioport) != 0)
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continue;
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/* Initialise the softc for use during probing */
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if (bt_isa_alloc_resources(dev, ioport,
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ioport + BT_NREGS -1) != 0)
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continue;
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/* We're going to attempt to probe it now, so mark it probed */
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bt_mark_probed_bio(port_index);
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if (bt_port_probe(dev, &info) != 0) {
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if (bootverbose)
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printf("bt_isa_probe: Probe failed at 0x%x\n",
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ioport);
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bt_isa_release_resources(dev);
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continue;
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}
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bt_isa_release_resources(dev);
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bus_set_resource(dev, SYS_RES_DRQ, 0, info.drq, 1);
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bus_set_resource(dev, SYS_RES_IRQ, 0, info.irq, 1);
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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/*
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* Attach all the sub-devices we can find
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*/
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static int
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bt_isa_attach(device_t dev)
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{
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struct bt_softc *bt = device_get_softc(dev);
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bus_dma_filter_t *filter;
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void *filter_arg;
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bus_addr_t lowaddr;
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int error, drq;
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/* Initialise softc */
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error = bt_isa_alloc_resources(dev, 0, ~0);
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if (error) {
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device_printf(dev, "can't allocate resources in bt_isa_attach\n");
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return error;
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}
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/* Program the DMA channel for external control */
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if ((drq = isa_get_drq(dev)) != -1)
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isa_dmacascade(drq);
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/* Allocate our parent dmatag */
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filter = NULL;
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filter_arg = NULL;
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lowaddr = BUS_SPACE_MAXADDR_24BIT;
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if (bt->model[0] == '4') {
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/*
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* This is a VL adapter. Typically, VL devices have access
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* to the full 32bit address space. On BT-445S adapters
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* prior to revision E, there is a hardware bug that causes
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* corruption of transfers to/from addresses in the range of
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* the BIOS modulo 16MB. The only properly functioning
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* BT-445S Host Adapters have firmware version 3.37.
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* If we encounter one of these adapters and the BIOS is
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* installed, install a filter function for our bus_dma_map
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* that will catch these accesses and bounce them to a safe
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* region of memory.
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*/
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if (bt->bios_addr != 0
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&& strcmp(bt->model, "445S") == 0
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&& strcmp(bt->firmware_ver, "3.37") < 0) {
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filter = btvlbouncefilter;
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filter_arg = bt;
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} else {
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lowaddr = BUS_SPACE_MAXADDR_32BIT;
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}
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}
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/* XXX Should be a child of the ISA or VL bus dma tag */
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if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(dev),
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/* alignemnt */ 1,
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/* boundary */ 0,
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/* lowaddr */ lowaddr,
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/* highaddr */ BUS_SPACE_MAXADDR,
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/* filter */ filter,
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/* filterarg */ filter_arg,
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/* maxsize */ BUS_SPACE_MAXSIZE_32BIT,
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/* nsegments */ ~0,
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/* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
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/* flags */ 0,
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/* lockfunc */ NULL,
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/* lockarg */ NULL,
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&bt->parent_dmat) != 0) {
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bt_isa_release_resources(dev);
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return (ENOMEM);
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}
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error = bt_init(dev);
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if (error) {
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bt_isa_release_resources(dev);
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return (ENOMEM);
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}
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if (lowaddr != BUS_SPACE_MAXADDR_32BIT) {
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/* DMA tag for our sense buffers */
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if (bus_dma_tag_create(
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/* parent */ bt->parent_dmat,
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/* alignment */ 1,
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/* boundary */ 0,
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/* lowaddr */ BUS_SPACE_MAXADDR,
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/* highaddr */ BUS_SPACE_MAXADDR,
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/* filter */ NULL,
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/* filterarg */ NULL,
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/* maxsize */ bt->max_ccbs *
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sizeof(struct scsi_sense_data),
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/* nsegments */ 1,
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/* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
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/* flags */ 0,
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/* lockfunc */ NULL,
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/* lockarg */ NULL,
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&bt->sense_dmat) != 0) {
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bt_isa_release_resources(dev);
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return (ENOMEM);
|
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}
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bt->init_level++;
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/* Allocation of sense buffers */
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if (bus_dmamem_alloc(bt->sense_dmat,
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(void **)&bt->sense_buffers,
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BUS_DMA_NOWAIT, &bt->sense_dmamap) != 0) {
|
||||
bt_isa_release_resources(dev);
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||||
return (ENOMEM);
|
||||
}
|
||||
|
||||
bt->init_level++;
|
||||
|
||||
/* And permanently map them */
|
||||
bus_dmamap_load(bt->sense_dmat, bt->sense_dmamap,
|
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bt->sense_buffers,
|
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bt->max_ccbs * sizeof(*bt->sense_buffers),
|
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btmapsensebuffers, bt, /*flags*/0);
|
||||
|
||||
bt->init_level++;
|
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}
|
||||
|
||||
error = bt_attach(dev);
|
||||
if (error) {
|
||||
bt_isa_release_resources(dev);
|
||||
return (error);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
#define BIOS_MAP_SIZE (16 * 1024)
|
||||
|
||||
static int
|
||||
btvlbouncefilter(void *arg, bus_addr_t addr)
|
||||
{
|
||||
struct bt_softc *bt;
|
||||
|
||||
bt = (struct bt_softc *)arg;
|
||||
|
||||
addr &= BUS_SPACE_MAXADDR_24BIT;
|
||||
|
||||
if (addr == 0
|
||||
|| (addr >= bt->bios_addr
|
||||
&& addr < (bt->bios_addr + BIOS_MAP_SIZE)))
|
||||
return (1);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
btmapsensebuffers(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
||||
{
|
||||
struct bt_softc* bt;
|
||||
|
||||
bt = (struct bt_softc*)arg;
|
||||
bt->sense_buffers_physbase = segs->ds_addr;
|
||||
}
|
||||
|
||||
static device_method_t bt_isa_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, bt_isa_probe),
|
||||
DEVMETHOD(device_attach, bt_isa_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t bt_isa_driver = {
|
||||
"bt",
|
||||
bt_isa_methods,
|
||||
sizeof(struct bt_softc),
|
||||
};
|
||||
|
||||
static devclass_t bt_devclass;
|
||||
|
||||
DRIVER_MODULE(bt, isa, bt_isa_driver, bt_devclass, 0, 0);
|
||||
MODULE_DEPEND(bt, isa, 1, 1, 1);
|
||||
@@ -1,221 +0,0 @@
|
||||
/*-
|
||||
* Product specific probe and attach routines for:
|
||||
* Buslogic BT946, BT948, BT956, BT958 SCSI controllers
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
|
||||
*
|
||||
* Copyright (c) 1995, 1997, 1998 Justin T. Gibbs
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification, immediately at the beginning of the file.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/bus.h>
|
||||
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcivar.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <dev/buslogic/btreg.h>
|
||||
|
||||
#define BT_PCI_IOADDR PCIR_BAR(0)
|
||||
#define BT_PCI_MEMADDR PCIR_BAR(1)
|
||||
|
||||
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040104Bul
|
||||
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140104Bul
|
||||
#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130104Bul
|
||||
|
||||
static int
|
||||
bt_pci_alloc_resources(device_t dev)
|
||||
{
|
||||
int type = 0, rid, zero;
|
||||
struct resource *regs = NULL;
|
||||
struct resource *irq = NULL;
|
||||
|
||||
#if 0
|
||||
/* XXX Memory Mapped I/O seems to cause problems */
|
||||
type = SYS_RES_MEMORY;
|
||||
rid = BT_PCI_MEMADDR;
|
||||
regs = bus_alloc_resource_any(dev, type, &rid, RF_ACTIVE);
|
||||
#else
|
||||
type = SYS_RES_IOPORT;
|
||||
rid = BT_PCI_IOADDR;
|
||||
regs = bus_alloc_resource_any(dev, type, &rid, RF_ACTIVE);
|
||||
#endif
|
||||
if (!regs)
|
||||
return (ENOMEM);
|
||||
|
||||
zero = 0;
|
||||
irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &zero,
|
||||
RF_ACTIVE | RF_SHAREABLE);
|
||||
if (!irq) {
|
||||
bus_release_resource(dev, type, rid, regs);
|
||||
return (ENOMEM);
|
||||
}
|
||||
|
||||
bt_init_softc(dev, regs, irq, 0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
bt_pci_release_resources(device_t dev)
|
||||
{
|
||||
struct bt_softc *bt = device_get_softc(dev);
|
||||
|
||||
if (bt->port)
|
||||
/* XXX can't cope with memory registers anyway */
|
||||
bus_release_resource(dev, SYS_RES_IOPORT,
|
||||
BT_PCI_IOADDR, bt->port);
|
||||
if (bt->irq)
|
||||
bus_release_resource(dev, SYS_RES_IRQ, 0, bt->irq);
|
||||
bt_free_softc(dev);
|
||||
}
|
||||
|
||||
static int
|
||||
bt_pci_probe(device_t dev)
|
||||
{
|
||||
switch (pci_get_devid(dev)) {
|
||||
case PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER:
|
||||
case PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC:
|
||||
{
|
||||
struct bt_softc *bt = device_get_softc(dev);
|
||||
pci_info_data_t pci_info;
|
||||
int error;
|
||||
|
||||
error = bt_pci_alloc_resources(dev);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
/*
|
||||
* Determine if an ISA compatible I/O port has been
|
||||
* enabled. If so, record the port so it will not
|
||||
* be probed by our ISA probe. If the PCI I/O port
|
||||
* was not set to the compatibility port, disable it.
|
||||
*/
|
||||
error = bt_cmd(bt, BOP_INQUIRE_PCI_INFO,
|
||||
/*param*/NULL, /*paramlen*/0,
|
||||
(u_int8_t*)&pci_info, sizeof(pci_info),
|
||||
DEFAULT_CMD_TIMEOUT);
|
||||
if (error == 0
|
||||
&& pci_info.io_port < BIO_DISABLED) {
|
||||
bt_mark_probed_bio(pci_info.io_port);
|
||||
if (rman_get_start(bt->port) !=
|
||||
bt_iop_from_bio(pci_info.io_port)) {
|
||||
u_int8_t new_addr;
|
||||
|
||||
new_addr = BIO_DISABLED;
|
||||
bt_cmd(bt, BOP_MODIFY_IO_ADDR,
|
||||
/*param*/&new_addr,
|
||||
/*paramlen*/1, /*reply_buf*/NULL,
|
||||
/*reply_len*/0,
|
||||
DEFAULT_CMD_TIMEOUT);
|
||||
}
|
||||
}
|
||||
bt_pci_release_resources(dev);
|
||||
device_set_desc(dev, "Buslogic Multi-Master SCSI Host Adapter");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
bt_pci_attach(device_t dev)
|
||||
{
|
||||
struct bt_softc *bt = device_get_softc(dev);
|
||||
int error;
|
||||
|
||||
/* Initialize softc */
|
||||
error = bt_pci_alloc_resources(dev);
|
||||
if (error) {
|
||||
device_printf(dev, "can't allocate resources in bt_pci_attach\n");
|
||||
return error;
|
||||
}
|
||||
|
||||
/* Allocate a dmatag for our CCB DMA maps */
|
||||
if (bus_dma_tag_create( /* PCI parent */ bus_get_dma_tag(dev),
|
||||
/* alignemnt */ 1,
|
||||
/* boundary */ 0,
|
||||
/* lowaddr */ BUS_SPACE_MAXADDR_32BIT,
|
||||
/* highaddr */ BUS_SPACE_MAXADDR,
|
||||
/* filter */ NULL,
|
||||
/* filterarg */ NULL,
|
||||
/* maxsize */ BUS_SPACE_MAXSIZE_32BIT,
|
||||
/* nsegments */ ~0,
|
||||
/* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
|
||||
/* flags */ 0,
|
||||
/* lockfunc */ NULL,
|
||||
/* lockarg */ NULL,
|
||||
&bt->parent_dmat) != 0) {
|
||||
bt_pci_release_resources(dev);
|
||||
return (ENOMEM);
|
||||
}
|
||||
|
||||
if (bt_probe(dev) || bt_fetch_adapter_info(dev) || bt_init(dev)) {
|
||||
bt_pci_release_resources(dev);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
error = bt_attach(dev);
|
||||
|
||||
if (error) {
|
||||
bt_pci_release_resources(dev);
|
||||
return (error);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t bt_pci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, bt_pci_probe),
|
||||
DEVMETHOD(device_attach, bt_pci_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t bt_pci_driver = {
|
||||
"bt",
|
||||
bt_pci_methods,
|
||||
sizeof(struct bt_softc),
|
||||
};
|
||||
|
||||
static devclass_t bt_devclass;
|
||||
|
||||
DRIVER_MODULE(bt, pci, bt_pci_driver, bt_devclass, 0, 0);
|
||||
MODULE_DEPEND(bt, pci, 1, 1, 1);
|
||||
@@ -1,694 +0,0 @@
|
||||
/*-
|
||||
* Generic register and struct definitions for the BusLogic
|
||||
* MultiMaster SCSI host adapters. Product specific probe and
|
||||
* attach routines can be found in:
|
||||
* sys/dev/buslogic/bt_isa.c BT-54X, BT-445 cards
|
||||
* sys/dev/buslogic/bt_mca.c BT-64X, SDC3211B, SDC3211F
|
||||
* sys/dev/buslogic/bt_pci.c BT-946, BT-948, BT-956, BT-958 cards
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
|
||||
*
|
||||
* Copyright (c) 1998, 1999 Justin T. Gibbs.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification, immediately at the beginning of the file.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _BTREG_H_
|
||||
#define _BTREG_H_
|
||||
|
||||
#include <sys/queue.h>
|
||||
|
||||
#define BT_MAXTRANSFER_SIZE 0xffffffff /* limited by 32bit counter */
|
||||
#define BT_NSEG 32 /* The number of dma segments supported.
|
||||
* BT_NSEG can be maxed out at 8192 entries,
|
||||
* but the kernel will never need to transfer
|
||||
* such a large request. To reduce the
|
||||
* driver's memory consumption, we reduce the
|
||||
* max to 32. 16 would work if all transfers
|
||||
* are paged alined since the kernel will only
|
||||
* generate at most a 64k transfer, but to
|
||||
* handle non-page aligned transfers, you need
|
||||
* 17, so we round to the next power of two
|
||||
* to make allocating SG space easy and
|
||||
* efficient.
|
||||
*/
|
||||
|
||||
#define ALL_TARGETS (~0)
|
||||
|
||||
/*
|
||||
* Control Register pp. 1-8, 1-9 (Write Only)
|
||||
*/
|
||||
#define CONTROL_REG 0x00
|
||||
#define HARD_RESET 0x80 /* Hard Reset - return to POST state */
|
||||
#define SOFT_RESET 0x40 /* Soft Reset - Clears Adapter state */
|
||||
#define RESET_INTR 0x20 /* Reset/Ack Interrupt */
|
||||
#define RESET_SBUS 0x10 /* Drive SCSI bus reset signal */
|
||||
|
||||
/*
|
||||
* Status Register pp. 1-9, 1-10 (Read Only)
|
||||
*/
|
||||
#define STATUS_REG 0x00
|
||||
#define DIAG_ACTIVE 0x80 /* Performing Internal Diags */
|
||||
#define DIAG_FAIL 0x40 /* Internal Diags failed */
|
||||
#define INIT_REQUIRED 0x20 /* MBOXes need initialization */
|
||||
#define HA_READY 0x10 /* HA ready for new commands */
|
||||
#define CMD_REG_BUSY 0x08 /* HA busy with last cmd byte */
|
||||
#define DATAIN_REG_READY 0x04 /* Data-in Byte available */
|
||||
#define STATUS_REG_RSVD 0x02
|
||||
#define CMD_INVALID 0x01 /* Invalid Command detected */
|
||||
|
||||
/*
|
||||
* Command/Parameter Register pp. 1-10, 1-11 (Write Only)
|
||||
*/
|
||||
#define COMMAND_REG 0x01
|
||||
|
||||
/*
|
||||
* Data in Register p. 1-11 (Read Only)
|
||||
*/
|
||||
#define DATAIN_REG 0x01
|
||||
|
||||
/*
|
||||
* Interrupt Status Register pp. 1-12 -> 1-14 (Read Only)
|
||||
*/
|
||||
#define INTSTAT_REG 0x02
|
||||
#define INTR_PENDING 0x80 /* There is a pending INTR */
|
||||
#define INTSTAT_REG_RSVD 0x70
|
||||
#define SCSI_BUS_RESET 0x08 /* Bus Reset detected */
|
||||
#define CMD_COMPLETE 0x04
|
||||
#define OMB_READY 0x02 /* Outgoin Mailbox Ready */
|
||||
#define IMB_LOADED 0x01 /* Incoming Mailbox loaded */
|
||||
|
||||
/*
|
||||
* Definitions for the "undocumented" geometry register
|
||||
*/
|
||||
typedef enum {
|
||||
GEOM_NODISK,
|
||||
GEOM_64x32,
|
||||
GEOM_128x32,
|
||||
GEOM_255x32
|
||||
} disk_geom_t;
|
||||
|
||||
#define GEOMETRY_REG 0x03
|
||||
#define DISK0_GEOMETRY 0x03
|
||||
#define DISK1_GEOMETRY 0x0c
|
||||
#define EXTENDED_TRANSLATION 0x80
|
||||
#define GEOMETRY_DISK0(g_reg) (greg & DISK0_GEOMETRY)
|
||||
#define GEOMETRY_DISK1(g_reg) ((greg & DISK1_GEOMETRY) >> 2)
|
||||
|
||||
#define BT_NREGS (4)
|
||||
/*
|
||||
* Opcodes for Adapter commands.
|
||||
* pp 1-18 -> 1-20
|
||||
*/
|
||||
typedef enum {
|
||||
BOP_TEST_CMDC_INTR = 0x00,
|
||||
BOP_INITIALIZE_24BMBOX = 0x01,
|
||||
BOP_START_MBOX = 0x02,
|
||||
BOP_EXECUTE_BIOS_CMD = 0x03,
|
||||
BOP_INQUIRE_BOARD_ID = 0x04,
|
||||
BOP_ENABLE_OMBR_INT = 0x05,
|
||||
BOP_SET_SEL_TIMOUT = 0x06,
|
||||
BOP_SET_TIME_ON_BUS = 0x07,
|
||||
BOP_SET_TIME_OFF_BUS = 0x08,
|
||||
BOP_SET_BUS_TRANS_RATE = 0x09,
|
||||
BOP_INQUIRE_INST_LDEVS = 0x0A,
|
||||
BOP_INQUIRE_CONFIG = 0x0B,
|
||||
BOP_ENABLE_TARGET_MODE = 0x0C,
|
||||
BOP_INQUIRE_SETUP_INFO = 0x0D,
|
||||
BOP_WRITE_LRAM = 0x1A,
|
||||
BOP_READ_LRAM = 0x1B,
|
||||
BOP_WRITE_CHIP_FIFO = 0x1C,
|
||||
BOP_READ_CHIP_FIFO = 0x1C,
|
||||
BOP_ECHO_DATA_BYTE = 0x1F,
|
||||
BOP_ADAPTER_DIAGNOSTICS = 0x20,
|
||||
BOP_SET_ADAPTER_OPTIONS = 0x21,
|
||||
BOP_INQUIRE_INST_HDEVS = 0x23,
|
||||
BOP_INQUIRE_TARG_DEVS = 0x24,
|
||||
BOP_DISABLE_HAC_INTR = 0x25,
|
||||
BOP_INITIALIZE_32BMBOX = 0x81,
|
||||
BOP_EXECUTE_SCSI_CMD = 0x83,
|
||||
BOP_INQUIRE_FW_VER_3DIG = 0x84,
|
||||
BOP_INQUIRE_FW_VER_4DIG = 0x85,
|
||||
BOP_INQUIRE_PCI_INFO = 0x86,
|
||||
BOP_INQUIRE_MODEL = 0x8B,
|
||||
BOP_TARG_SYNC_INFO = 0x8C,
|
||||
BOP_INQUIRE_ESETUP_INFO = 0x8D,
|
||||
BOP_ENABLE_STRICT_RR = 0x8F,
|
||||
BOP_STORE_LRAM = 0x90,
|
||||
BOP_FETCH_LRAM = 0x91,
|
||||
BOP_SAVE_TO_EEPROM = 0x92,
|
||||
BOP_UPLOAD_AUTO_SCSI = 0x94,
|
||||
BOP_MODIFY_IO_ADDR = 0x95,
|
||||
BOP_SET_CCB_FORMAT = 0x96,
|
||||
BOP_FLASH_ROM_DOWNLOAD = 0x97,
|
||||
BOP_FLASH_WRITE_ENABLE = 0x98,
|
||||
BOP_WRITE_INQ_BUFFER = 0x9A,
|
||||
BOP_READ_INQ_BUFFER = 0x9B,
|
||||
BOP_FLASH_UP_DOWNLOAD = 0xA7,
|
||||
BOP_READ_SCAM_DATA = 0xA8,
|
||||
BOP_WRITE_SCAM_DATA = 0xA9
|
||||
} bt_op_t;
|
||||
|
||||
/************** Definitions of Multi-byte commands and responses ************/
|
||||
|
||||
typedef struct {
|
||||
u_int8_t num_mboxes;
|
||||
u_int8_t base_addr[3];
|
||||
} init_24b_mbox_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t board_type;
|
||||
#define BOARD_TYPE_NON_MCA 0x41
|
||||
#define BOARD_TYPE_MCA 0x42
|
||||
u_int8_t cust_features;
|
||||
#define FEATURES_STANDARD 0x41
|
||||
u_int8_t firmware_rev_major;
|
||||
u_int8_t firmware_rev_minor;
|
||||
} board_id_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t enable;
|
||||
} enable_ombr_intr_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t enable;
|
||||
u_int8_t reserved;
|
||||
u_int8_t timeout[2]; /* timeout in milliseconds */
|
||||
} set_selto_parmas_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t time; /* time in milliseconds (2-15) */
|
||||
} set_timeon_bus_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t time; /* time in milliseconds (2-15) */
|
||||
} set_timeoff_bus_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t rate;
|
||||
} set_bus_trasfer_rate_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t targets[8];
|
||||
} installed_ldevs_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t dma_chan;
|
||||
#define DMA_CHAN_5 0x20
|
||||
#define DMA_CHAN_6 0x40
|
||||
#define DMA_CHAN_7 0x80
|
||||
u_int8_t irq;
|
||||
#define IRQ_9 0x01
|
||||
#define IRQ_10 0x02
|
||||
#define IRQ_11 0x04
|
||||
#define IRQ_12 0x08
|
||||
#define IRQ_14 0x20
|
||||
#define IRQ_15 0x40
|
||||
u_int8_t scsi_id;
|
||||
} config_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t enable;
|
||||
} target_mode_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t offset : 4,
|
||||
period : 3,
|
||||
sync : 1;
|
||||
} targ_syncinfo_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t initiate_sync : 1,
|
||||
parity_enable : 1,
|
||||
: 6;
|
||||
|
||||
u_int8_t bus_transfer_rate;
|
||||
u_int8_t time_on_bus;
|
||||
u_int8_t time_off_bus;
|
||||
u_int8_t num_mboxes;
|
||||
u_int8_t mbox_base_addr[3];
|
||||
targ_syncinfo_t low_syncinfo[8]; /* For fast and ultra, use 8C */
|
||||
u_int8_t low_discinfo;
|
||||
u_int8_t customer_sig;
|
||||
u_int8_t letter_d;
|
||||
u_int8_t ha_type;
|
||||
u_int8_t low_wide_allowed;
|
||||
u_int8_t low_wide_active;
|
||||
targ_syncinfo_t high_syncinfo[8];
|
||||
u_int8_t high_discinfo;
|
||||
u_int8_t high_wide_allowed;
|
||||
u_int8_t high_wide_active;
|
||||
} setup_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t phys_addr[3];
|
||||
} write_adapter_lram_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t phys_addr[3];
|
||||
} read_adapter_lram_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t phys_addr[3];
|
||||
} write_chip_fifo_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t phys_addr[3];
|
||||
} read_chip_fifo_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t length; /* Excludes this member */
|
||||
u_int8_t low_disc_disable;
|
||||
u_int8_t low_busy_retry_disable;
|
||||
u_int8_t high_disc_disable;
|
||||
u_int8_t high_busy_retry_disable;
|
||||
} set_adapter_options_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t targets[8];
|
||||
} installed_hdevs_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t low_devs;
|
||||
u_int8_t high_devs;
|
||||
} target_devs_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t enable;
|
||||
} enable_hac_interrupt_params_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t num_boxes;
|
||||
u_int8_t base_addr[4];
|
||||
} init_32b_mbox_params_t;
|
||||
|
||||
typedef u_int8_t fw_ver_3dig_data_t;
|
||||
|
||||
typedef u_int8_t fw_ver_4dig_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t offset;
|
||||
u_int8_t response_len;
|
||||
} fetch_lram_params_t;
|
||||
|
||||
#define AUTO_SCSI_BYTE_OFFSET 64
|
||||
typedef struct {
|
||||
u_int8_t factory_sig[2];
|
||||
u_int8_t auto_scsi_data_size; /* 2 -> 64 bytes */
|
||||
u_int8_t model_num[6];
|
||||
u_int8_t adapter_ioport;
|
||||
u_int8_t floppy_enabled :1,
|
||||
floppy_secondary :1,
|
||||
level_trigger :1,
|
||||
:2,
|
||||
system_ram_area :3;
|
||||
u_int8_t dma_channel :7,
|
||||
dma_autoconf :1;
|
||||
u_int8_t irq_channel :7,
|
||||
irq_autoconf :1;
|
||||
u_int8_t dma_trans_rate;
|
||||
u_int8_t scsi_id;
|
||||
u_int8_t low_termination :1,
|
||||
scsi_parity :1,
|
||||
high_termination :1,
|
||||
req_ack_filter :1,
|
||||
fast_sync :1,
|
||||
bus_reset :1,
|
||||
:1,
|
||||
active_negation :1;
|
||||
u_int8_t bus_on_delay;
|
||||
u_int8_t bus_off_delay;
|
||||
u_int8_t bios_enabled :1,
|
||||
int19h_redirect :1,
|
||||
extended_trans :1,
|
||||
removable_drives :1,
|
||||
:1,
|
||||
morethan2disks :1,
|
||||
interrupt_mode :1,
|
||||
floptical_support:1;
|
||||
u_int8_t low_device_enabled;
|
||||
u_int8_t high_device_enabled;
|
||||
u_int8_t low_wide_permitted;
|
||||
u_int8_t high_wide_permitted;
|
||||
u_int8_t low_fast_permitted;
|
||||
u_int8_t high_fast_permitted;
|
||||
u_int8_t low_sync_permitted;
|
||||
u_int8_t high_sync_permitted;
|
||||
u_int8_t low_disc_permitted;
|
||||
u_int8_t high_disc_permitted;
|
||||
u_int8_t low_send_start_unit;
|
||||
u_int8_t high_send_start_unit;
|
||||
u_int8_t low_ignore_in_bios_scan;
|
||||
u_int8_t high_ignore_in_bios_scan;
|
||||
u_int8_t pci_int_pin :2,
|
||||
host_ioport :2,
|
||||
round_robin :1,
|
||||
vesa_bus_over_33 :1,
|
||||
vesa_burst_write :1,
|
||||
vesa_burst_read :1;
|
||||
u_int8_t low_ultra_permitted;
|
||||
u_int8_t high_ultra_permitted;
|
||||
u_int8_t reserved[5];
|
||||
u_int8_t auto_scsi_max_lun;
|
||||
u_int8_t :1,
|
||||
scam_dominant :1,
|
||||
scam_enabled :1,
|
||||
scam_level2 :1,
|
||||
:4;
|
||||
u_int8_t int13_extensions :1,
|
||||
:1,
|
||||
cdrom_boot :1,
|
||||
:2,
|
||||
multi_boot :1,
|
||||
:2;
|
||||
u_int8_t boot_target_id :4,
|
||||
boot_channel :4;
|
||||
u_int8_t force_dev_scan :1,
|
||||
:7;
|
||||
u_int8_t low_tagged_lun_independance;
|
||||
u_int8_t high_tagged_lun_independance;
|
||||
u_int8_t low_renegotiate_after_cc;
|
||||
u_int8_t high_renegotiate_after_cc;
|
||||
u_int8_t reserverd2[10];
|
||||
u_int8_t manufacturing_diagnotic[2];
|
||||
u_int8_t checksum[2];
|
||||
} auto_scsi_data_t;
|
||||
|
||||
struct bt_isa_port {
|
||||
u_int16_t addr;
|
||||
u_int8_t probed;
|
||||
u_int8_t bio;
|
||||
};
|
||||
|
||||
extern struct bt_isa_port bt_isa_ports[];
|
||||
|
||||
#define BT_NUM_ISAPORTS 6
|
||||
|
||||
typedef enum {
|
||||
BIO_330 = 0,
|
||||
BIO_334 = 1,
|
||||
BIO_230 = 2,
|
||||
BIO_234 = 3,
|
||||
BIO_130 = 4,
|
||||
BIO_134 = 5,
|
||||
BIO_DISABLED = 6,
|
||||
BIO_DISABLED2 = 7
|
||||
} isa_compat_io_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t io_port;
|
||||
u_int8_t irq_num;
|
||||
u_int8_t low_byte_term :1,
|
||||
high_byte_term :1,
|
||||
:2,
|
||||
jp1_status :1,
|
||||
jp2_status :1,
|
||||
jp3_status :1,
|
||||
:1;
|
||||
u_int8_t reserved;
|
||||
} pci_info_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t ascii_model[5]; /* Fifth byte is always 0 */
|
||||
} ha_model_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t sync_rate[16]; /* Sync in 10ns units */
|
||||
} target_sync_info_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int8_t bus_type;
|
||||
u_int8_t bios_addr;
|
||||
u_int16_t max_sg;
|
||||
u_int8_t num_mboxes;
|
||||
u_int8_t mbox_base[4];
|
||||
u_int8_t :2,
|
||||
sync_neg10MB :1,
|
||||
floppy_disable :1,
|
||||
floppy_secondary_port :1,
|
||||
burst_mode_enabled :1,
|
||||
level_trigger_ints :1,
|
||||
:1;
|
||||
u_int8_t fw_ver_bytes_2_to_4[3];
|
||||
u_int8_t wide_bus :1,
|
||||
diff_bus :1,
|
||||
scam_capable :1,
|
||||
ultra_scsi :1,
|
||||
auto_term :1,
|
||||
:3;
|
||||
} esetup_info_data_t;
|
||||
|
||||
typedef struct {
|
||||
u_int32_t len;
|
||||
u_int32_t addr;
|
||||
} bt_sg_t;
|
||||
|
||||
/********************** Mail Box definitions *******************************/
|
||||
|
||||
typedef enum {
|
||||
BMBO_FREE = 0x0, /* MBO intry is free */
|
||||
BMBO_START = 0x1, /* MBO activate entry */
|
||||
BMBO_ABORT = 0x2 /* MBO abort entry */
|
||||
} bt_mbo_action_code_t;
|
||||
|
||||
typedef struct bt_mbox_out {
|
||||
u_int32_t ccb_addr;
|
||||
u_int8_t reserved[3];
|
||||
u_int8_t action_code;
|
||||
} bt_mbox_out_t;
|
||||
|
||||
typedef enum {
|
||||
BMBI_FREE = 0x0, /* MBI entry is free */
|
||||
BMBI_OK = 0x1, /* completed without error */
|
||||
BMBI_ABORT = 0x2, /* aborted ccb */
|
||||
BMBI_NOT_FOUND = 0x3, /* Tried to abort invalid CCB */
|
||||
BMBI_ERROR = 0x4 /* Completed with error */
|
||||
} bt_mbi_comp_code_t;
|
||||
|
||||
typedef struct bt_mbox_in {
|
||||
u_int32_t ccb_addr;
|
||||
u_int8_t btstat;
|
||||
u_int8_t sdstat;
|
||||
u_int8_t reserved;
|
||||
u_int8_t comp_code;
|
||||
} bt_mbox_in_t;
|
||||
|
||||
/***************** Compiled Probe Information *******************************/
|
||||
struct bt_probe_info {
|
||||
int drq;
|
||||
int irq;
|
||||
};
|
||||
|
||||
/****************** Hardware CCB definition *********************************/
|
||||
typedef enum {
|
||||
INITIATOR_CCB = 0x00,
|
||||
INITIATOR_SG_CCB = 0x02,
|
||||
INITIATOR_CCB_WRESID = 0x03,
|
||||
INITIATOR_SG_CCB_WRESID = 0x04,
|
||||
INITIATOR_BUS_DEV_RESET = 0x81
|
||||
} bt_ccb_opcode_t;
|
||||
|
||||
typedef enum {
|
||||
BTSTAT_NOERROR = 0x00,
|
||||
BTSTAT_LINKED_CMD_COMPLETE = 0x0A,
|
||||
BTSTAT_LINKED_CMD_FLAG_COMPLETE = 0x0B,
|
||||
BTSTAT_DATAUNDERUN_ERROR = 0x0C,
|
||||
BTSTAT_SELTIMEOUT = 0x11,
|
||||
BTSTAT_DATARUN_ERROR = 0x12,
|
||||
BTSTAT_UNEXPECTED_BUSFREE = 0x13,
|
||||
BTSTAT_INVALID_PHASE = 0x14,
|
||||
BTSTAT_INVALID_ACTION_CODE = 0x15,
|
||||
BTSTAT_INVALID_OPCODE = 0x16,
|
||||
BTSTAT_LINKED_CCB_LUN_MISMATCH = 0x17,
|
||||
BTSTAT_INVALID_CCB_OR_SG_PARAM = 0x1A,
|
||||
BTSTAT_AUTOSENSE_FAILED = 0x1B,
|
||||
BTSTAT_TAGGED_MSG_REJECTED = 0x1C,
|
||||
BTSTAT_UNSUPPORTED_MSG_RECEIVED = 0x1D,
|
||||
BTSTAT_HARDWARE_FAILURE = 0x20,
|
||||
BTSTAT_TARGET_IGNORED_ATN = 0x21,
|
||||
BTSTAT_HA_SCSI_BUS_RESET = 0x22,
|
||||
BTSTAT_OTHER_SCSI_BUS_RESET = 0x23,
|
||||
BTSTAT_INVALID_RECONNECT = 0x24,
|
||||
BTSTAT_HA_BDR = 0x25,
|
||||
BTSTAT_ABORT_QUEUE_GENERATED = 0x26,
|
||||
BTSTAT_HA_SOFTWARE_ERROR = 0x27,
|
||||
BTSTAT_HA_WATCHDOG_ERROR = 0x28,
|
||||
BTSTAT_SCSI_PERROR_DETECTED = 0x30
|
||||
} btstat_t;
|
||||
|
||||
struct bt_hccb {
|
||||
u_int8_t opcode;
|
||||
u_int8_t :3,
|
||||
datain :1,
|
||||
dataout :1,
|
||||
wide_tag_enable :1, /* Wide Lun CCB format */
|
||||
wide_tag_type :2; /* Wide Lun CCB format */
|
||||
u_int8_t cmd_len;
|
||||
u_int8_t sense_len;
|
||||
int32_t data_len; /* residuals can be negative */
|
||||
u_int32_t data_addr;
|
||||
u_int8_t reserved[2];
|
||||
u_int8_t btstat;
|
||||
u_int8_t sdstat;
|
||||
u_int8_t target_id;
|
||||
u_int8_t target_lun :5,
|
||||
tag_enable :1,
|
||||
tag_type :2;
|
||||
u_int8_t scsi_cdb[12];
|
||||
u_int8_t reserved2[6];
|
||||
u_int32_t sense_addr;
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
BCCB_FREE = 0x0,
|
||||
BCCB_ACTIVE = 0x1,
|
||||
BCCB_DEVICE_RESET = 0x2,
|
||||
BCCB_RELEASE_SIMQ = 0x4
|
||||
} bccb_flags_t;
|
||||
|
||||
struct bt_ccb {
|
||||
struct bt_hccb hccb;
|
||||
SLIST_ENTRY(bt_ccb) links;
|
||||
u_int32_t flags;
|
||||
union ccb *ccb;
|
||||
bus_dmamap_t dmamap;
|
||||
struct callout timer;
|
||||
bt_sg_t *sg_list;
|
||||
u_int32_t sg_list_phys;
|
||||
};
|
||||
|
||||
struct sg_map_node {
|
||||
bus_dmamap_t sg_dmamap;
|
||||
bus_addr_t sg_physaddr;
|
||||
bt_sg_t* sg_vaddr;
|
||||
SLIST_ENTRY(sg_map_node) links;
|
||||
};
|
||||
|
||||
struct bt_softc {
|
||||
device_t dev;
|
||||
struct resource *port;
|
||||
struct resource *irq;
|
||||
struct resource *drq;
|
||||
void *ih;
|
||||
struct mtx lock;
|
||||
struct cam_sim *sim;
|
||||
struct cam_path *path;
|
||||
bt_mbox_out_t *cur_outbox;
|
||||
bt_mbox_in_t *cur_inbox;
|
||||
bt_mbox_out_t *last_outbox;
|
||||
bt_mbox_in_t *last_inbox;
|
||||
struct bt_ccb *bt_ccb_array;
|
||||
SLIST_HEAD(,bt_ccb) free_bt_ccbs;
|
||||
LIST_HEAD(,ccb_hdr) pending_ccbs;
|
||||
u_int active_ccbs;
|
||||
u_int32_t bt_ccb_physbase;
|
||||
bt_mbox_in_t *in_boxes;
|
||||
bt_mbox_out_t *out_boxes;
|
||||
struct scsi_sense_data *sense_buffers;
|
||||
u_int32_t sense_buffers_physbase;
|
||||
struct bt_ccb *recovery_bccb;
|
||||
u_int num_boxes;
|
||||
bus_dma_tag_t parent_dmat; /*
|
||||
* All dmat's derive from
|
||||
* the dmat defined by our
|
||||
* bus.
|
||||
*/
|
||||
bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */
|
||||
bus_dma_tag_t mailbox_dmat; /* dmat for our mailboxes */
|
||||
bus_dmamap_t mailbox_dmamap;
|
||||
bus_dma_tag_t ccb_dmat; /* dmat for our ccb array */
|
||||
bus_dmamap_t ccb_dmamap;
|
||||
bus_dma_tag_t sg_dmat; /* dmat for our sg segments */
|
||||
bus_dma_tag_t sense_dmat; /* dmat for our sense buffers */
|
||||
bus_dmamap_t sense_dmamap;
|
||||
SLIST_HEAD(, sg_map_node) sg_maps;
|
||||
bus_addr_t mailbox_physbase;
|
||||
bus_addr_t mailbox_addrlimit;
|
||||
u_int num_ccbs; /* Number of CCBs malloc'd */
|
||||
u_int max_ccbs; /* Maximum allocatable CCBs */
|
||||
u_int max_sg;
|
||||
u_int scsi_id;
|
||||
u_int32_t extended_trans :1,
|
||||
wide_bus :1,
|
||||
diff_bus :1,
|
||||
ultra_scsi :1,
|
||||
extended_lun :1,
|
||||
strict_rr :1,
|
||||
tag_capable :1,
|
||||
wide_lun_ccb :1,
|
||||
resource_shortage :1,
|
||||
level_trigger_ints:1,
|
||||
:22;
|
||||
u_int16_t tags_permitted;
|
||||
u_int16_t disc_permitted;
|
||||
u_int16_t sync_permitted;
|
||||
u_int16_t fast_permitted;
|
||||
u_int16_t ultra_permitted;
|
||||
u_int16_t wide_permitted;
|
||||
u_int8_t init_level;
|
||||
volatile u_int8_t command_cmp;
|
||||
volatile u_int8_t latched_status;
|
||||
u_int32_t bios_addr;
|
||||
char firmware_ver[6];
|
||||
char model[5];
|
||||
};
|
||||
|
||||
#define BT_TEMP_UNIT 0xFF /* Unit for probes */
|
||||
void bt_init_softc(device_t dev,
|
||||
struct resource *port,
|
||||
struct resource *irq,
|
||||
struct resource *drq);
|
||||
void bt_free_softc(device_t dev);
|
||||
int bt_port_probe(device_t dev,
|
||||
struct bt_probe_info *info);
|
||||
int bt_probe(device_t dev);
|
||||
int bt_fetch_adapter_info(device_t dev);
|
||||
int bt_init(device_t dev);
|
||||
int bt_attach(device_t dev);
|
||||
void bt_intr(void *arg);
|
||||
int bt_check_probed_iop(u_int ioport);
|
||||
void bt_mark_probed_bio(isa_compat_io_t port);
|
||||
void bt_mark_probed_iop(u_int ioport);
|
||||
void bt_find_probe_range(int ioport,
|
||||
int *port_index,
|
||||
int *max_port_index);
|
||||
|
||||
int bt_iop_from_bio(isa_compat_io_t bio_index);
|
||||
|
||||
#define DEFAULT_CMD_TIMEOUT 100000 /* 10 sec */
|
||||
int bt_cmd(struct bt_softc *bt, bt_op_t opcode,
|
||||
u_int8_t *params, u_int param_len,
|
||||
u_int8_t *reply_data, u_int reply_len,
|
||||
u_int cmd_timeout);
|
||||
|
||||
#define bt_name(bt) device_get_nameunit(bt->dev)
|
||||
|
||||
#define bt_inb(bt, reg) \
|
||||
bus_read_1((bt)->port, reg)
|
||||
|
||||
#define bt_outb(bt, reg, value) \
|
||||
bus_write_1((bt)->port, reg, value)
|
||||
|
||||
#endif /* _BT_H_ */
|
||||
@@ -12,7 +12,6 @@ SYS?= ${.CURDIR}/..
|
||||
|
||||
COMM= ${SYS}/sys/vnode.h \
|
||||
${SYS}/dev/alc/*.[ch] \
|
||||
${SYS}/dev/buslogic/*.[ch] \
|
||||
${SYS}/dev/dpt/*.[ch] \
|
||||
${SYS}/dev/en/*.[ch] \
|
||||
${SYS}/dev/iicbus/*.[ch] \
|
||||
@@ -67,7 +66,6 @@ COMMDIR1= ${SYS}/conf \
|
||||
${SYS}/sys
|
||||
|
||||
COMMDIR2= ${SYS}/dev/alc \
|
||||
${SYS}/dev/buslogic \
|
||||
${SYS}/dev/dpt \
|
||||
${SYS}/dev/en \
|
||||
${SYS}/dev/iicbus \
|
||||
|
||||
@@ -119,7 +119,6 @@ nodevice snd_via8233
|
||||
nodevice snd_via82c686
|
||||
nodevice snd_vibes
|
||||
nodevice snd_uaudio
|
||||
nodevice bt
|
||||
nodevice ep
|
||||
nodevice ex
|
||||
|
||||
|
||||
Reference in New Issue
Block a user