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Merge ^/head r304537 through r304699.

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This commit is contained in:
Dimitry Andric
2016-08-23 19:55:02 +00:00
parent 703f2cb2eb e99472e0d6
commit 7d0ce7aa30
186 changed files with 19288 additions and 3156 deletions
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Makefile.inc1
+19 -5
View File
@@ -550,8 +550,18 @@ CROSSENV+= CC="${XCC} ${XCFLAGS}" CXX="${XCXX} ${XCXXFLAGS} ${XCFLAGS}" \
BFLAGS+= -B${CROSS_BINUTILS_PREFIX}
.endif
# External compiler needs sysroot and target flags.
.if ${MK_CLANG_BOOTSTRAP} == "no" && ${MK_GCC_BOOTSTRAP} == "no"
# The internal bootstrap compiler has a default sysroot set by TOOLS_PREFIX
# and target set by TARGET/TARGET_ARCH. However, there are several needs to
# always pass an explicit --sysroot and -target.
# - External compiler needs sysroot and target flags.
# - External ld needs sysroot.
# - To be clear about the use of a sysroot when using the internal compiler.
# - Easier debugging.
# - Allowing WITH_SYSTEM_COMPILER+WITH_META_MODE to work together due to
# the flip-flopping build command when sometimes using external and
# sometimes using internal.
# - Allow using lld which has no support for default paths.
.if !defined(CROSS_BINUTILS_PREFIX) || !exists(${CROSS_BINUTILS_PREFIX})
BFLAGS+= -B${WORLDTMP}/usr/bin
.endif
@@ -562,24 +572,28 @@ TARGET_ABI= gnueabihf
TARGET_ABI= gnueabi
.endif
.endif
.if defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == gcc
.if ${WANT_COMPILER_TYPE} == gcc || \
(defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == gcc)
# GCC requires -isystem and -L when using a cross-compiler. --sysroot
# won't set header path and -L is used to ensure the base library path
# is added before the port PREFIX library path.
XCFLAGS+= -isystem ${WORLDTMP}/usr/include -L${WORLDTMP}/usr/lib
# GCC requires -B to find /usr/lib/crti.o when using a cross-compiler
# combined with --sysroot.
XCFLAGS+= -B${WORLDTMP}/usr/lib
# Force using libc++ for external GCC.
# XXX: This should be checking MK_GNUCXX == no
.if ${X_COMPILER_VERSION} >= 40800
XCXXFLAGS+= -isystem ${WORLDTMP}/usr/include/c++/v1 -std=c++11 \
-nostdinc++ -L${WORLDTMP}/../lib/libc++
.endif
.else
.elif ${WANT_COMPILER_TYPE} == clang || \
(defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == clang)
TARGET_ABI?= unknown
TARGET_TRIPLE?= ${TARGET_ARCH:C/amd64/x86_64/}-${TARGET_ABI}-freebsd12.0
XCFLAGS+= -target ${TARGET_TRIPLE}
.endif
XCFLAGS+= --sysroot=${WORLDTMP}
.endif # ${MK_CLANG_BOOTSTRAP} == "no" && ${MK_GCC_BOOTSTRAP} == "no"
.if !empty(BFLAGS)
XCFLAGS+= ${BFLAGS}
Makefile.libcompat
+2 -1
View File
@@ -73,7 +73,8 @@ LIBCOMPATCFLAGS+= ${LIBCOMPATCPUFLAGS} \
# Clang/GCC.
LIBCOMPATCFLAGS+= -B${LIBCOMPATTMP}/usr/lib${libcompat}
.if defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == gcc
.if ${WANT_COMPILER_TYPE} == gcc || \
(defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == gcc)
# GCC requires -isystem when using a cross-compiler and --sysroot. Note that
# Makefile.inc1 only applies this with an external compiler but libcompat
# always does since even in-tree GCC 4.2 needs this to override the built-in
crypto/heimdal/lib/hx509/version-script.map
-1
View File
@@ -23,7 +23,6 @@ HEIMDAL_X509_1.2 {
_hx509_request_print;
_hx509_request_set_email;
_hx509_request_to_pkcs10;
_hx509_request_to_pkcs10;
_hx509_unmap_file_os;
_hx509_write_file;
hx509_bitstring_print;
crypto/openssl/crypto/bn/asm/armv4-gf2m.pl
+2 -2
View File
@@ -213,8 +213,8 @@ $code.=<<___;
.align 5
.LNEON:
ldr r12, [sp] @ 5th argument
vmov.32 $a, r2, r1
vmov.32 $b, r12, r3
vmov $a, r2, r1
vmov $b, r12, r3
vmov.i64 $k48, #0x0000ffffffffffff
vmov.i64 $k32, #0x00000000ffffffff
vmov.i64 $k16, #0x000000000000ffff
crypto/openssl/crypto/sha/asm/sha256-armv4.pl
+1 -1
View File
@@ -595,7 +595,7 @@ sha256_block_data_order_armv8:
adr $Ktbl,.LARMv8
sub $Ktbl,$Ktbl,#.LARMv8-K256
# else
adrl $Ktbl,K256
sub $Ktbl,$Ktbl,#256+32
# endif
add $len,$inp,$len,lsl#6 @ len to point at the end of inp
lib/Makefile
+4 -3
View File
@@ -3,12 +3,13 @@
.include <src.opts.mk>
# The SUBDIR_ORDERED list is a small set of libraries which are used by many
# The SUBDIR_BOOTSTRAP list is a small set of libraries which are used by many
# of the other libraries. These are built first with a .WAIT between them
# and the main list to avoid needing a SUBDIR_DEPEND line on every library
# naming just these few items.
SUBDIR_ORDERED= csu \
SUBDIR_BOOTSTRAP= \
csu \
.WAIT \
libc \
libc_nonshared \
@@ -21,7 +22,7 @@ SUBDIR_ORDERED= csu \
# The main list; please keep these sorted alphabetically.
SUBDIR= ${SUBDIR_ORDERED} \
SUBDIR= ${SUBDIR_BOOTSTRAP} \
.WAIT \
libalias \
libarchive \
lib/libc/stdio/fgetwc.c
+2 -11
View File
@@ -79,18 +79,9 @@ __fgetwc_mbs(FILE *fp, mbstate_t *mbs, int *nread, locale_t locale)
size_t nconv;
struct xlocale_ctype *l = XLOCALE_CTYPE(locale);
if (fp->_r <= 0 && __srefill(fp)) {
*nread = 0;
return (WEOF);
}
if (MB_CUR_MAX == 1) {
/* Fast path for single-byte encodings. */
wc = *fp->_p++;
fp->_r--;
*nread = 1;
return (wc);
}
*nread = 0;
if (fp->_r <= 0 && __srefill(fp))
return (WEOF);
do {
nconv = l->__mbrtowc(&wc, fp->_p, fp->_r, mbs);
if (nconv == (size_t)-1)
lib/libc/stdio/fgetwln.c
+5 -1
View File
@@ -53,11 +53,14 @@ fgetwln_l(FILE * __restrict fp, size_t *lenp, locale_t locale)
ORIENT(fp, 1);
len = 0;
/* WEOF or error: return partial line, see fgetln(3). */
while ((wc = __fgetwc(fp, locale)) != WEOF) {
#define GROW 512
if (len * sizeof(wchar_t) >= fp->_lb._size &&
__slbexpand(fp, (len + GROW) * sizeof(wchar_t)))
__slbexpand(fp, (len + GROW) * sizeof(wchar_t))) {
fp->_flags |= __SERR;
goto error;
}
*((wchar_t *)fp->_lb._base + len++) = wc;
if (wc == L'\n')
break;
@@ -74,6 +77,7 @@ fgetwln_l(FILE * __restrict fp, size_t *lenp, locale_t locale)
*lenp = 0;
return (NULL);
}
wchar_t *
fgetwln(FILE * __restrict fp, size_t *lenp)
{
lib/libpam/modules/pam_ssh/pam_ssh.8
+3 -3
View File
@@ -128,15 +128,15 @@ Start an agent even if no keys were decrypted during the
authentication phase.
.El
.Sh FILES
.Bl -tag -width ".Pa $HOME/.ssh/identity" -compact
.It Pa $HOME/.ssh/identity
SSH1 RSA key
.Bl -tag -width ".Pa $HOME/.ssh/id_ed25519" -compact
.It Pa $HOME/.ssh/id_rsa
SSH2 RSA key
.It Pa $HOME/.ssh/id_dsa
SSH2 DSA key
.It Pa $HOME/.ssh/id_ecdsa
SSH2 ECDSA key
.It Pa $HOME/.ssh/id_ed25519
SSH2 Ed25519 key
.El
.Sh SEE ALSO
.Xr ssh-agent 1 ,
lib/libpam/modules/pam_ssh/pam_ssh.c
+1 -1
View File
@@ -77,10 +77,10 @@ static const char *pam_ssh_prompt = "SSH passphrase: ";
static const char *pam_ssh_have_keys = "pam_ssh_have_keys";
static const char *pam_ssh_keyfiles[] = {
".ssh/identity", /* SSH1 RSA key */
".ssh/id_rsa", /* SSH2 RSA key */
".ssh/id_dsa", /* SSH2 DSA key */
".ssh/id_ecdsa", /* SSH2 ECDSA key */
".ssh/id_ed25519", /* SSH2 Ed25519 key */
NULL
};
release/doc/en_US.ISO8859-1/hardware/article.xml
-2
View File
@@ -836,8 +836,6 @@
&hwlist.hme;
&hwlist.ie;
&hwlist.igb;
&hwlist.ipheth;
sbin/ipfw/ipfw.8
+2 -3
View File
@@ -1,7 +1,7 @@
.\"
.\" $FreeBSD$
.\"
.Dd August 13, 2016
.Dd August 21, 2016
.Dt IPFW 8
.Os
.Sh NAME
@@ -1588,8 +1588,7 @@ Matches IPv4 packets whose precedence field is equal to
.It Cm ipsec
Matches packets that have IPSEC history associated with them
(i.e., the packet comes encapsulated in IPSEC, the kernel
has IPSEC support and IPSEC_FILTERTUNNEL option, and can correctly
decapsulate it).
has IPSEC support, and can correctly decapsulate it).
.Pp
Note that specifying
.Cm ipsec
sbin/resolvconf/Makefile
+3 -2
View File
@@ -16,6 +16,7 @@ CLEANFILES= ${SCRIPTS} ${FILES} ${MAN}
SYSCONFDIR= /etc
RCDIR= ${SYSCONFDIR}/rc.d
VARDIR= /var/run/resolvconf
SBINDIR= /sbin
# We don't assume to restart the services in /sbin. So, though
# our service(8) is in /usr/sbin, we can use it, here.
@@ -28,13 +29,13 @@ RESTARTCMD= "/usr/sbin/service ${CMD1} \&\& /usr/sbin/service ${CMD2}"
.for f in ${SCRIPTS} ${FILES} ${MAN}
${f}: ${f}.in
sed -e 's:@PREFIX@::g' \
-e 's:@SYSCONFDIR@:${SYSCONFDIR}:g' \
sed -e 's:@SYSCONFDIR@:${SYSCONFDIR}:g' \
-e 's:@LIBEXECDIR@:${FILESDIR}:g' \
-e 's:@VARDIR@:${VARDIR}:g' \
-e 's:@RESTARTCMD \(.*\)@:${RESTARTCMD_WITH_ARG}:g' \
-e 's:@RESTARTCMD@:${RESTARTCMD}:g' \
-e 's:@RCDIR@:${RCDIR}:g' \
-e 's:@SBINDIR@:${SBINDIR}:g' \
-e 's: vpn : ng[0-9]*&:g' \
${DIST}/$@.in > $@
.endfor
secure/lib/libcrypto/Makefile
+10
View File
@@ -24,6 +24,8 @@ SRCS= cpt_err.c cryptlib.c cversion.c ex_data.c mem.c mem_dbg.c o_dir.c \
o_fips.c o_init.c o_str.c o_time.c uid.c
.if defined(ASM_amd64)
SRCS+= x86_64cpuid.S
.elif defined(ASM_arm)
SRCS+= armcap.c armv4cpuid.S
.elif defined(ASM_i386)
SRCS+= x86cpuid.S
.else
@@ -36,6 +38,8 @@ SRCS+= aes_cfb.c aes_ctr.c aes_ecb.c aes_ige.c aes_misc.c aes_ofb.c aes_wrap.c
.if defined(ASM_amd64)
SRCS+= aes-x86_64.S aesni-mb-x86_64.S aesni-sha1-x86_64.S \
aesni-sha256-x86_64.S aesni-x86_64.S bsaes-x86_64.S vpaes-x86_64.S
.elif defined(ASM_arm)
SRCS+= aes-armv4.S aes_cbc.c aesv8-armx.S bsaes-armv7.S
.elif defined(ASM_i386)
SRCS+= aes-586.S aesni-x86.S vpaes-x86.S
.else
@@ -85,6 +89,8 @@ SRCS+= bn_add.c bn_blind.c bn_const.c bn_ctx.c bn_depr.c bn_div.c bn_err.c \
.if defined(ASM_amd64)
SRCS+= rsaz-avx2.S rsaz-x86_64.S rsaz_exp.c x86_64-gcc.c x86_64-gf2m.S \
x86_64-mont.S x86_64-mont5.S
.elif defined(ASM_arm)
SRCS+= armv4-mont.S armv4-gf2m.S bn_asm.c
.elif defined(ASM_i386)
SRCS+= bn-586.S co-586.S x86-gf2m.S x86-mont.S
.else
@@ -234,6 +240,8 @@ SRCS+= cbc128.c ccm128.c cfb128.c ctr128.c cts128.c gcm128.c ofb128.c \
wrap128.c xts128.c
.if defined(ASM_amd64)
SRCS+= aesni-gcm-x86_64.S ghash-x86_64.S
.elif defined(ASM_arm)
SRCS+= ghash-armv4.S ghashv8-armx.S
.elif defined(ASM_i386)
SRCS+= ghash-x86.S
.endif
@@ -319,6 +327,8 @@ SRCS+= sha1_one.c sha1dgst.c sha256.c sha512.c sha_dgst.c sha_one.c
.if defined(ASM_amd64)
SRCS+= sha1-mb-x86_64.S sha1-x86_64.S sha256-mb-x86_64.S sha256-x86_64.S \
sha512-x86_64.S
.elif defined(ASM_arm)
SRCS+= sha1-armv4-large.S sha256-armv4.S sha512-armv4.S
.elif defined(ASM_i386)
SRCS+= sha1-586.S sha256-586.S sha512-586.S
.endif
secure/lib/libcrypto/Makefile.asm
+46 -6
View File
@@ -64,8 +64,8 @@ CLEANFILES= ${ASM} ${SHA_ASM:S/$/.s/}
.SUFFIXES: .pl
.pl.S:
( echo '# $$'FreeBSD'$$' ;\
echo '# Do not modify. This file is auto-generated from ${.IMPSRC:T}.' ;\
( echo '/* $$'FreeBSD'$$ */' ;\
echo '/* Do not modify. This file is auto-generated from ${.IMPSRC:T}. */' ;\
env CC=cc perl ${.IMPSRC} elf ) > ${.TARGET}
${SHA_TMP}: ${SHA_SRC}
@@ -73,11 +73,51 @@ ${SHA_TMP}: ${SHA_SRC}
.for s in ${SHA_ASM}
${s}.S: ${s}.s
( echo ' # $$'FreeBSD'$$' ;\
echo ' # Do not modify. This file is auto-generated from ${SHA_SRC}.' ;\
( echo '/* $$'FreeBSD'$$ */' ;\
echo '/* Do not modify. This file is auto-generated from ${SHA_SRC}. */' ;\
cat ${s}.s ) > ${.TARGET}
.endfor
.elif defined(ASM_arm)
.PATH: ${LCRYPTO_SRC}/crypto \
${LCRYPTO_SRC}/crypto/aes/asm \
${LCRYPTO_SRC}/crypto/bn/asm \
${LCRYPTO_SRC}/crypto/modes/asm \
${LCRYPTO_SRC}/crypto/sha/asm
PERLPATH= -I${LCRYPTO_SRC}/crypto/perlasm
# aes
SRCS= aesv8-armx.pl bsaes-armv7.pl
# bn
SRCS+= armv4-mont.pl armv4-gf2m.pl
# modes
SRCS+= ghash-armv4.pl ghashv8-armx.pl
# sha
SRCS+= sha1-armv4-large.pl sha256-armv4.pl sha512-armv4.pl
ASM= aes-armv4.S ${SRCS:R:S/$/.S/}
all: ${ASM}
CLEANFILES= ${ASM} ${SRCS:R:S/$/.s/}
.SUFFIXES: .pl
aes-armv4.S: aes-armv4.pl
( echo '/* $$'FreeBSD'$$ */' ;\
echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\
env CC=cc perl ${.ALLSRC} elf ) > ${.TARGET}
.pl.S:
env CC=cc perl ${.IMPSRC} elf ${.TARGET:R:S/$/.s/}
( echo '/* $$'FreeBSD'$$ */' ;\
echo '/* Do not modify. This file is auto-generated from ${.IMPSRC:T:R:S/$/.pl/}. */' ;\
cat ${.TARGET:R:S/$/.s/}) > ${.TARGET}
.elif defined(ASM_i386)
.PATH: ${LCRYPTO_SRC}/crypto \
@@ -143,8 +183,8 @@ CLEANFILES= ${ASM}
.SUFFIXES: .pl
.pl.S:
( echo '# $$'FreeBSD'$$' ;\
echo '# Do not modify. This file is auto-generated from ${.IMPSRC:T}.' ;\
( echo '/* $$'FreeBSD'$$ */' ;\
echo '/* Do not modify. This file is auto-generated from ${.IMPSRC:T}. */' ;\
echo '#ifdef PIC' ;\
env CC=cc perl ${PERLPATH} ${.IMPSRC} elf ${CFLAGS} -fpic -DPIC ;\
echo '#else' ;\
secure/lib/libcrypto/Makefile.inc
+7
View File
@@ -29,6 +29,8 @@ _ASM_AVX!= { \
.if ${_ASM_AVX} == yes
ASM_${MACHINE_CPUARCH}=
.endif
.elif ${MACHINE_CPUARCH} == "arm"
ASM_arm=
.endif
.if defined(ASM_amd64)
@@ -40,6 +42,11 @@ CFLAGS+=-DMD5_ASM
CFLAGS+=-DGHASH_ASM
CFLAGS+=-DSHA1_ASM -DSHA256_ASM -DSHA512_ASM
CFLAGS+=-DWHIRLPOOL_ASM
.elif defined(ASM_arm)
CFLAGS+=-DAES_ASM -DBSAES_ASM
CFLAGS+=-DOPENSSL_BN_ASM_MONT -DOPENSSL_BN_ASM_GF2m
CFLAGS+=-DGHASH_ASM
CFLAGS+=-DSHA1_ASM -DSHA256_ASM -DSHA512_ASM
.elif defined(ASM_i386)
CFLAGS+=-DOPENSSL_IA32_SSE2
CFLAGS+=-DAES_ASM -DVPAES_ASM
secure/lib/libcrypto/amd64/aes-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aes-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aes-x86_64.pl. */
.text
.type _x86_64_AES_encrypt,@function
.align 16
secure/lib/libcrypto/amd64/aesni-gcm-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-gcm-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-gcm-x86_64.pl. */
.text
.type _aesni_ctr32_ghash_6x,@function
secure/lib/libcrypto/amd64/aesni-mb-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-mb-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-mb-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/aesni-sha1-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-sha1-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-sha1-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/aesni-sha256-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-sha256-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-sha256-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/aesni-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-x86_64.pl. */
.text
.globl aesni_encrypt
secure/lib/libcrypto/amd64/bsaes-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from bsaes-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from bsaes-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/cmll-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from cmll-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from cmll-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/ecp_nistz256-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from ecp_nistz256-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from ecp_nistz256-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/ghash-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from ghash-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from ghash-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/md5-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from md5-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from md5-x86_64.pl. */
.text
.align 16
secure/lib/libcrypto/amd64/rc4-md5-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rc4-md5-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rc4-md5-x86_64.pl. */
.text
.align 16
secure/lib/libcrypto/amd64/rc4-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rc4-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rc4-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/rsaz-avx2.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rsaz-avx2.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rsaz-avx2.pl. */
.text
.globl rsaz_1024_sqr_avx2
secure/lib/libcrypto/amd64/rsaz-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rsaz-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rsaz-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/sha1-mb-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha1-mb-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha1-mb-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/sha1-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha1-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha1-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/sha256-mb-x86_64.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha256-mb-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha256-mb-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/sha256-x86_64.S
+2 -2
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@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha512-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha512-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/sha512-x86_64.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from sha512-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha512-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/vpaes-x86_64.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from vpaes-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from vpaes-x86_64.pl. */
.text
secure/lib/libcrypto/amd64/wp-x86_64.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from wp-x86_64.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from wp-x86_64.pl. */
.text
.globl whirlpool_block
secure/lib/libcrypto/amd64/x86_64-gf2m.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from x86_64-gf2m.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86_64-gf2m.pl. */
.text
.type _mul_1x1,@function
secure/lib/libcrypto/amd64/x86_64-mont.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from x86_64-mont.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86_64-mont.pl. */
.text
secure/lib/libcrypto/amd64/x86_64-mont5.S
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@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from x86_64-mont5.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86_64-mont5.pl. */
.text
secure/lib/libcrypto/amd64/x86_64cpuid.S
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# $FreeBSD$
# Do not modify. This file is auto-generated from x86_64cpuid.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86_64cpuid.pl. */
.hidden OPENSSL_cpuid_setup
.section .init
secure/lib/libcrypto/arm/aes-armv4.S
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secure/lib/libcrypto/arm/aesv8-armx.S
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/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesv8-armx.pl. */
#include "arm_arch.h"
#if __ARM_MAX_ARCH__>=7
.text
.arch armv7-a
.fpu neon
.code 32
.align 5
rcon:
.long 0x01,0x01,0x01,0x01
.long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
.long 0x1b,0x1b,0x1b,0x1b
.globl aes_v8_set_encrypt_key
.type aes_v8_set_encrypt_key,%function
.align 5
aes_v8_set_encrypt_key:
.Lenc_key:
mov r3,#-1
cmp r0,#0
beq .Lenc_key_abort
cmp r2,#0
beq .Lenc_key_abort
mov r3,#-2
cmp r1,#128
blt .Lenc_key_abort
cmp r1,#256
bgt .Lenc_key_abort
tst r1,#0x3f
bne .Lenc_key_abort
adr r3,rcon
cmp r1,#192
veor q0,q0,q0
vld1.8 {q3},[r0]!
mov r1,#8 @ reuse r1
vld1.32 {q1,q2},[r3]!
blt .Loop128
beq .L192
b .L256
.align 4
.Loop128:
vtbl.8 d20,{q3},d4
vtbl.8 d21,{q3},d5
vext.8 q9,q0,q3,#12
vst1.32 {q3},[r2]!
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
subs r1,r1,#1
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q10,q10,q1
veor q3,q3,q9
vshl.u8 q1,q1,#1
veor q3,q3,q10
bne .Loop128
vld1.32 {q1},[r3]
vtbl.8 d20,{q3},d4
vtbl.8 d21,{q3},d5
vext.8 q9,q0,q3,#12
vst1.32 {q3},[r2]!
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q10,q10,q1
veor q3,q3,q9
vshl.u8 q1,q1,#1
veor q3,q3,q10
vtbl.8 d20,{q3},d4
vtbl.8 d21,{q3},d5
vext.8 q9,q0,q3,#12
vst1.32 {q3},[r2]!
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q10,q10,q1
veor q3,q3,q9
veor q3,q3,q10
vst1.32 {q3},[r2]
add r2,r2,#0x50
mov r12,#10
b .Ldone
.align 4
.L192:
vld1.8 {d16},[r0]!
vmov.i8 q10,#8 @ borrow q10
vst1.32 {q3},[r2]!
vsub.i8 q2,q2,q10 @ adjust the mask
.Loop192:
vtbl.8 d20,{q8},d4
vtbl.8 d21,{q8},d5
vext.8 q9,q0,q3,#12
vst1.32 {d16},[r2]!
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
subs r1,r1,#1
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vdup.32 q9,d7[1]
veor q9,q9,q8
veor q10,q10,q1
vext.8 q8,q0,q8,#12
vshl.u8 q1,q1,#1
veor q8,q8,q9
veor q3,q3,q10
veor q8,q8,q10
vst1.32 {q3},[r2]!
bne .Loop192
mov r12,#12
add r2,r2,#0x20
b .Ldone
.align 4
.L256:
vld1.8 {q8},[r0]
mov r1,#7
mov r12,#14
vst1.32 {q3},[r2]!
.Loop256:
vtbl.8 d20,{q8},d4
vtbl.8 d21,{q8},d5
vext.8 q9,q0,q3,#12
vst1.32 {q8},[r2]!
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
subs r1,r1,#1
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q3,q3,q9
vext.8 q9,q0,q9,#12
veor q10,q10,q1
veor q3,q3,q9
vshl.u8 q1,q1,#1
veor q3,q3,q10
vst1.32 {q3},[r2]!
beq .Ldone
vdup.32 q10,d7[1]
vext.8 q9,q0,q8,#12
.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
veor q8,q8,q9
vext.8 q9,q0,q9,#12
veor q8,q8,q9
vext.8 q9,q0,q9,#12
veor q8,q8,q9
veor q8,q8,q10
b .Loop256
.Ldone:
str r12,[r2]
mov r3,#0
.Lenc_key_abort:
mov r0,r3 @ return value
bx lr
.size aes_v8_set_encrypt_key,.-aes_v8_set_encrypt_key
.globl aes_v8_set_decrypt_key
.type aes_v8_set_decrypt_key,%function
.align 5
aes_v8_set_decrypt_key:
stmdb sp!,{r4,lr}
bl .Lenc_key
cmp r0,#0
bne .Ldec_key_abort
sub r2,r2,#240 @ restore original r2
mov r4,#-16
add r0,r2,r12,lsl#4 @ end of key schedule
vld1.32 {q0},[r2]
vld1.32 {q1},[r0]
vst1.32 {q0},[r0],r4
vst1.32 {q1},[r2]!
.Loop_imc:
vld1.32 {q0},[r2]
vld1.32 {q1},[r0]
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
vst1.32 {q0},[r0],r4
vst1.32 {q1},[r2]!
cmp r0,r2
bhi .Loop_imc
vld1.32 {q0},[r2]
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
vst1.32 {q0},[r0]
eor r0,r0,r0 @ return value
.Ldec_key_abort:
ldmia sp!,{r4,pc}
.size aes_v8_set_decrypt_key,.-aes_v8_set_decrypt_key
.globl aes_v8_encrypt
.type aes_v8_encrypt,%function
.align 5
aes_v8_encrypt:
ldr r3,[r2,#240]
vld1.32 {q0},[r2]!
vld1.8 {q2},[r0]
sub r3,r3,#2
vld1.32 {q1},[r2]!
.Loop_enc:
.byte 0x00,0x43,0xb0,0xf3 @ aese q2,q0
.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
vld1.32 {q0},[r2]!
subs r3,r3,#2
.byte 0x02,0x43,0xb0,0xf3 @ aese q2,q1
.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
vld1.32 {q1},[r2]!
bgt .Loop_enc
.byte 0x00,0x43,0xb0,0xf3 @ aese q2,q0
.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
vld1.32 {q0},[r2]
.byte 0x02,0x43,0xb0,0xf3 @ aese q2,q1
veor q2,q2,q0
vst1.8 {q2},[r1]
bx lr
.size aes_v8_encrypt,.-aes_v8_encrypt
.globl aes_v8_decrypt
.type aes_v8_decrypt,%function
.align 5
aes_v8_decrypt:
ldr r3,[r2,#240]
vld1.32 {q0},[r2]!
vld1.8 {q2},[r0]
sub r3,r3,#2
vld1.32 {q1},[r2]!
.Loop_dec:
.byte 0x40,0x43,0xb0,0xf3 @ aesd q2,q0
.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
vld1.32 {q0},[r2]!
subs r3,r3,#2
.byte 0x42,0x43,0xb0,0xf3 @ aesd q2,q1
.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
vld1.32 {q1},[r2]!
bgt .Loop_dec
.byte 0x40,0x43,0xb0,0xf3 @ aesd q2,q0
.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
vld1.32 {q0},[r2]
.byte 0x42,0x43,0xb0,0xf3 @ aesd q2,q1
veor q2,q2,q0
vst1.8 {q2},[r1]
bx lr
.size aes_v8_decrypt,.-aes_v8_decrypt
.globl aes_v8_cbc_encrypt
.type aes_v8_cbc_encrypt,%function
.align 5
aes_v8_cbc_encrypt:
mov ip,sp
stmdb sp!,{r4-r8,lr}
vstmdb sp!,{d8-d15} @ ABI specification says so
ldmia ip,{r4-r5} @ load remaining args
subs r2,r2,#16
mov r8,#16
blo .Lcbc_abort
moveq r8,#0
cmp r5,#0 @ en- or decrypting?
ldr r5,[r3,#240]
and r2,r2,#-16
vld1.8 {q6},[r4]
vld1.8 {q0},[r0],r8
vld1.32 {q8-q9},[r3] @ load key schedule...
sub r5,r5,#6
add r7,r3,r5,lsl#4 @ pointer to last 7 round keys
sub r5,r5,#2
vld1.32 {q10-q11},[r7]!
vld1.32 {q12-q13},[r7]!
vld1.32 {q14-q15},[r7]!
vld1.32 {q7},[r7]
add r7,r3,#32
mov r6,r5
beq .Lcbc_dec
cmp r5,#2
veor q0,q0,q6
veor q5,q8,q7
beq .Lcbc_enc128
vld1.32 {q2-q3},[r7]
add r7,r3,#16
add r6,r3,#16*4
add r12,r3,#16*5
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
add r14,r3,#16*6
add r3,r3,#16*7
b .Lenter_cbc_enc
.align 4
.Loop_cbc_enc:
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vst1.8 {q6},[r1]!
.Lenter_cbc_enc:
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x04,0x03,0xb0,0xf3 @ aese q0,q2
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.32 {q8},[r6]
cmp r5,#4
.byte 0x06,0x03,0xb0,0xf3 @ aese q0,q3
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.32 {q9},[r12]
beq .Lcbc_enc192
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.32 {q8},[r14]
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.32 {q9},[r3]
nop
.Lcbc_enc192:
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
subs r2,r2,#16
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
moveq r8,#0
.byte 0x24,0x03,0xb0,0xf3 @ aese q0,q10
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x26,0x03,0xb0,0xf3 @ aese q0,q11
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.8 {q8},[r0],r8
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
veor q8,q8,q5
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.32 {q9},[r7] @ re-pre-load rndkey[1]
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
veor q6,q0,q7
bhs .Loop_cbc_enc
vst1.8 {q6},[r1]!
b .Lcbc_done
.align 5
.Lcbc_enc128:
vld1.32 {q2-q3},[r7]
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
b .Lenter_cbc_enc128
.Loop_cbc_enc128:
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vst1.8 {q6},[r1]!
.Lenter_cbc_enc128:
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
subs r2,r2,#16
.byte 0x04,0x03,0xb0,0xf3 @ aese q0,q2
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
moveq r8,#0
.byte 0x06,0x03,0xb0,0xf3 @ aese q0,q3
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x24,0x03,0xb0,0xf3 @ aese q0,q10
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x26,0x03,0xb0,0xf3 @ aese q0,q11
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
vld1.8 {q8},[r0],r8
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
veor q8,q8,q5
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
veor q6,q0,q7
bhs .Loop_cbc_enc128
vst1.8 {q6},[r1]!
b .Lcbc_done
.align 5
.Lcbc_dec:
vld1.8 {q10},[r0]!
subs r2,r2,#32 @ bias
add r6,r5,#2
vorr q3,q0,q0
vorr q1,q0,q0
vorr q11,q10,q10
blo .Lcbc_dec_tail
vorr q1,q10,q10
vld1.8 {q10},[r0]!
vorr q2,q0,q0
vorr q3,q1,q1
vorr q11,q10,q10
.Loop3x_cbc_dec:
.byte 0x60,0x03,0xb0,0xf3 @ aesd q0,q8
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.32 {q8},[r7]!
subs r6,r6,#2
.byte 0x62,0x03,0xb0,0xf3 @ aesd q0,q9
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.32 {q9},[r7]!
bgt .Loop3x_cbc_dec
.byte 0x60,0x03,0xb0,0xf3 @ aesd q0,q8
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
veor q4,q6,q7
subs r2,r2,#0x30
veor q5,q2,q7
movlo r6,r2 @ r6, r6, is zero at this point
.byte 0x62,0x03,0xb0,0xf3 @ aesd q0,q9
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
veor q9,q3,q7
add r0,r0,r6 @ r0 is adjusted in such way that
@ at exit from the loop q1-q10
@ are loaded with last "words"
vorr q6,q11,q11
mov r7,r3
.byte 0x68,0x03,0xb0,0xf3 @ aesd q0,q12
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x68,0x23,0xb0,0xf3 @ aesd q1,q12
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x68,0x43,0xf0,0xf3 @ aesd q10,q12
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.8 {q2},[r0]!
.byte 0x6a,0x03,0xb0,0xf3 @ aesd q0,q13
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x6a,0x23,0xb0,0xf3 @ aesd q1,q13
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x6a,0x43,0xf0,0xf3 @ aesd q10,q13
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.8 {q3},[r0]!
.byte 0x6c,0x03,0xb0,0xf3 @ aesd q0,q14
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
.byte 0x6c,0x23,0xb0,0xf3 @ aesd q1,q14
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x6c,0x43,0xf0,0xf3 @ aesd q10,q14
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.8 {q11},[r0]!
.byte 0x6e,0x03,0xb0,0xf3 @ aesd q0,q15
.byte 0x6e,0x23,0xb0,0xf3 @ aesd q1,q15
.byte 0x6e,0x43,0xf0,0xf3 @ aesd q10,q15
vld1.32 {q8},[r7]! @ re-pre-load rndkey[0]
add r6,r5,#2
veor q4,q4,q0
veor q5,q5,q1
veor q10,q10,q9
vld1.32 {q9},[r7]! @ re-pre-load rndkey[1]
vst1.8 {q4},[r1]!
vorr q0,q2,q2
vst1.8 {q5},[r1]!
vorr q1,q3,q3
vst1.8 {q10},[r1]!
vorr q10,q11,q11
bhs .Loop3x_cbc_dec
cmn r2,#0x30
beq .Lcbc_done
nop
.Lcbc_dec_tail:
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.32 {q8},[r7]!
subs r6,r6,#2
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
vld1.32 {q9},[r7]!
bgt .Lcbc_dec_tail
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
.byte 0x68,0x23,0xb0,0xf3 @ aesd q1,q12
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x68,0x43,0xf0,0xf3 @ aesd q10,q12
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
cmn r2,#0x20
.byte 0x6a,0x23,0xb0,0xf3 @ aesd q1,q13
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x6a,0x43,0xf0,0xf3 @ aesd q10,q13
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
veor q5,q6,q7
.byte 0x6c,0x23,0xb0,0xf3 @ aesd q1,q14
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
.byte 0x6c,0x43,0xf0,0xf3 @ aesd q10,q14
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
veor q9,q3,q7
.byte 0x6e,0x23,0xb0,0xf3 @ aesd q1,q15
.byte 0x6e,0x43,0xf0,0xf3 @ aesd q10,q15
beq .Lcbc_dec_one
veor q5,q5,q1
veor q9,q9,q10
vorr q6,q11,q11
vst1.8 {q5},[r1]!
vst1.8 {q9},[r1]!
b .Lcbc_done
.Lcbc_dec_one:
veor q5,q5,q10
vorr q6,q11,q11
vst1.8 {q5},[r1]!
.Lcbc_done:
vst1.8 {q6},[r4]
.Lcbc_abort:
vldmia sp!,{d8-d15}
ldmia sp!,{r4-r8,pc}
.size aes_v8_cbc_encrypt,.-aes_v8_cbc_encrypt
.globl aes_v8_ctr32_encrypt_blocks
.type aes_v8_ctr32_encrypt_blocks,%function
.align 5
aes_v8_ctr32_encrypt_blocks:
mov ip,sp
stmdb sp!,{r4-r10,lr}
vstmdb sp!,{d8-d15} @ ABI specification says so
ldr r4, [ip] @ load remaining arg
ldr r5,[r3,#240]
ldr r8, [r4, #12]
vld1.32 {q0},[r4]
vld1.32 {q8-q9},[r3] @ load key schedule...
sub r5,r5,#4
mov r12,#16
cmp r2,#2
add r7,r3,r5,lsl#4 @ pointer to last 5 round keys
sub r5,r5,#2
vld1.32 {q12-q13},[r7]!
vld1.32 {q14-q15},[r7]!
vld1.32 {q7},[r7]
add r7,r3,#32
mov r6,r5
movlo r12,#0
#ifndef __ARMEB__
rev r8, r8
#endif
vorr q1,q0,q0
add r10, r8, #1
vorr q10,q0,q0
add r8, r8, #2
vorr q6,q0,q0
rev r10, r10
vmov.32 d3[1],r10
bls .Lctr32_tail
rev r12, r8
sub r2,r2,#3 @ bias
vmov.32 d21[1],r12
b .Loop3x_ctr32
.align 4
.Loop3x_ctr32:
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
.byte 0x20,0x43,0xf0,0xf3 @ aese q10,q8
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
vld1.32 {q8},[r7]!
subs r6,r6,#2
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
.byte 0x22,0x43,0xf0,0xf3 @ aese q10,q9
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
vld1.32 {q9},[r7]!
bgt .Loop3x_ctr32
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x83,0xb0,0xf3 @ aesmc q4,q0
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
.byte 0x82,0xa3,0xb0,0xf3 @ aesmc q5,q1
vld1.8 {q2},[r0]!
vorr q0,q6,q6
.byte 0x20,0x43,0xf0,0xf3 @ aese q10,q8
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
vld1.8 {q3},[r0]!
vorr q1,q6,q6
.byte 0x22,0x83,0xb0,0xf3 @ aese q4,q9
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
.byte 0x22,0xa3,0xb0,0xf3 @ aese q5,q9
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
vld1.8 {q11},[r0]!
mov r7,r3
.byte 0x22,0x43,0xf0,0xf3 @ aese q10,q9
.byte 0xa4,0x23,0xf0,0xf3 @ aesmc q9,q10
vorr q10,q6,q6
add r9,r8,#1
.byte 0x28,0x83,0xb0,0xf3 @ aese q4,q12
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
.byte 0x28,0xa3,0xb0,0xf3 @ aese q5,q12
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
veor q2,q2,q7
add r10,r8,#2
.byte 0x28,0x23,0xf0,0xf3 @ aese q9,q12
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
veor q3,q3,q7
add r8,r8,#3
.byte 0x2a,0x83,0xb0,0xf3 @ aese q4,q13
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
.byte 0x2a,0xa3,0xb0,0xf3 @ aese q5,q13
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
veor q11,q11,q7
rev r9,r9
.byte 0x2a,0x23,0xf0,0xf3 @ aese q9,q13
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
vmov.32 d1[1], r9
rev r10,r10
.byte 0x2c,0x83,0xb0,0xf3 @ aese q4,q14
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
.byte 0x2c,0xa3,0xb0,0xf3 @ aese q5,q14
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
vmov.32 d3[1], r10
rev r12,r8
.byte 0x2c,0x23,0xf0,0xf3 @ aese q9,q14
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
vmov.32 d21[1], r12
subs r2,r2,#3
.byte 0x2e,0x83,0xb0,0xf3 @ aese q4,q15
.byte 0x2e,0xa3,0xb0,0xf3 @ aese q5,q15
.byte 0x2e,0x23,0xf0,0xf3 @ aese q9,q15
veor q2,q2,q4
vld1.32 {q8},[r7]! @ re-pre-load rndkey[0]
vst1.8 {q2},[r1]!
veor q3,q3,q5
mov r6,r5
vst1.8 {q3},[r1]!
veor q11,q11,q9
vld1.32 {q9},[r7]! @ re-pre-load rndkey[1]
vst1.8 {q11},[r1]!
bhs .Loop3x_ctr32
adds r2,r2,#3
beq .Lctr32_done
cmp r2,#1
mov r12,#16
moveq r12,#0
.Lctr32_tail:
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
vld1.32 {q8},[r7]!
subs r6,r6,#2
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
vld1.32 {q9},[r7]!
bgt .Lctr32_tail
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
vld1.8 {q2},[r0],r12
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x28,0x23,0xb0,0xf3 @ aese q1,q12
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
vld1.8 {q3},[r0]
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x2a,0x23,0xb0,0xf3 @ aese q1,q13
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
veor q2,q2,q7
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
.byte 0x2c,0x23,0xb0,0xf3 @ aese q1,q14
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
veor q3,q3,q7
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
.byte 0x2e,0x23,0xb0,0xf3 @ aese q1,q15
cmp r2,#1
veor q2,q2,q0
veor q3,q3,q1
vst1.8 {q2},[r1]!
beq .Lctr32_done
vst1.8 {q3},[r1]
.Lctr32_done:
vldmia sp!,{d8-d15}
ldmia sp!,{r4-r10,pc}
.size aes_v8_ctr32_encrypt_blocks,.-aes_v8_ctr32_encrypt_blocks
#endif
secure/lib/libcrypto/arm/armv4-gf2m.S
+205
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@@ -0,0 +1,205 @@
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from armv4-gf2m.pl. */
#include "arm_arch.h"
.text
.code 32
.type mul_1x1_ialu,%function
.align 5
mul_1x1_ialu:
mov r4,#0
bic r5,r1,#3<<30 @ a1=a&0x3fffffff
str r4,[sp,#0] @ tab[0]=0
add r6,r5,r5 @ a2=a1<<1
str r5,[sp,#4] @ tab[1]=a1
eor r7,r5,r6 @ a1^a2
str r6,[sp,#8] @ tab[2]=a2
mov r8,r5,lsl#2 @ a4=a1<<2
str r7,[sp,#12] @ tab[3]=a1^a2
eor r9,r5,r8 @ a1^a4
str r8,[sp,#16] @ tab[4]=a4
eor r4,r6,r8 @ a2^a4
str r9,[sp,#20] @ tab[5]=a1^a4
eor r7,r7,r8 @ a1^a2^a4
str r4,[sp,#24] @ tab[6]=a2^a4
and r8,r12,r0,lsl#2
str r7,[sp,#28] @ tab[7]=a1^a2^a4
and r9,r12,r0,lsr#1
ldr r5,[sp,r8] @ tab[b & 0x7]
and r8,r12,r0,lsr#4
ldr r7,[sp,r9] @ tab[b >> 3 & 0x7]
and r9,r12,r0,lsr#7
ldr r6,[sp,r8] @ tab[b >> 6 & 0x7]
eor r5,r5,r7,lsl#3 @ stall
mov r4,r7,lsr#29
ldr r7,[sp,r9] @ tab[b >> 9 & 0x7]
and r8,r12,r0,lsr#10
eor r5,r5,r6,lsl#6
eor r4,r4,r6,lsr#26
ldr r6,[sp,r8] @ tab[b >> 12 & 0x7]
and r9,r12,r0,lsr#13
eor r5,r5,r7,lsl#9
eor r4,r4,r7,lsr#23
ldr r7,[sp,r9] @ tab[b >> 15 & 0x7]
and r8,r12,r0,lsr#16
eor r5,r5,r6,lsl#12
eor r4,r4,r6,lsr#20
ldr r6,[sp,r8] @ tab[b >> 18 & 0x7]
and r9,r12,r0,lsr#19
eor r5,r5,r7,lsl#15
eor r4,r4,r7,lsr#17
ldr r7,[sp,r9] @ tab[b >> 21 & 0x7]
and r8,r12,r0,lsr#22
eor r5,r5,r6,lsl#18
eor r4,r4,r6,lsr#14
ldr r6,[sp,r8] @ tab[b >> 24 & 0x7]
and r9,r12,r0,lsr#25
eor r5,r5,r7,lsl#21
eor r4,r4,r7,lsr#11
ldr r7,[sp,r9] @ tab[b >> 27 & 0x7]
tst r1,#1<<30
and r8,r12,r0,lsr#28
eor r5,r5,r6,lsl#24
eor r4,r4,r6,lsr#8
ldr r6,[sp,r8] @ tab[b >> 30 ]
eorne r5,r5,r0,lsl#30
eorne r4,r4,r0,lsr#2
tst r1,#1<<31
eor r5,r5,r7,lsl#27
eor r4,r4,r7,lsr#5
eorne r5,r5,r0,lsl#31
eorne r4,r4,r0,lsr#1
eor r5,r5,r6,lsl#30
eor r4,r4,r6,lsr#2
mov pc,lr
.size mul_1x1_ialu,.-mul_1x1_ialu
.global bn_GF2m_mul_2x2
.type bn_GF2m_mul_2x2,%function
.align 5
bn_GF2m_mul_2x2:
#if __ARM_MAX_ARCH__>=7
ldr r12,.LOPENSSL_armcap
.Lpic: ldr r12,[pc,r12]
tst r12,#1
bne .LNEON
#endif
stmdb sp!,{r4-r10,lr}
mov r10,r0 @ reassign 1st argument
mov r0,r3 @ r0=b1
ldr r3,[sp,#32] @ load b0
mov r12,#7<<2
sub sp,sp,#32 @ allocate tab[8]
bl mul_1x1_ialu @ a1·b1
str r5,[r10,#8]
str r4,[r10,#12]
eor r0,r0,r3 @ flip b0 and b1
eor r1,r1,r2 @ flip a0 and a1
eor r3,r3,r0
eor r2,r2,r1
eor r0,r0,r3
eor r1,r1,r2
bl mul_1x1_ialu @ a0·b0
str r5,[r10]
str r4,[r10,#4]
eor r1,r1,r2
eor r0,r0,r3
bl mul_1x1_ialu @ (a1+a0)·(b1+b0)
ldmia r10,{r6-r9}
eor r5,r5,r4
eor r4,r4,r7
eor r5,r5,r6
eor r4,r4,r8
eor r5,r5,r9
eor r4,r4,r9
str r4,[r10,#8]
eor r5,r5,r4
add sp,sp,#32 @ destroy tab[8]
str r5,[r10,#4]
#if __ARM_ARCH__>=5
ldmia sp!,{r4-r10,pc}
#else
ldmia sp!,{r4-r10,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
#if __ARM_MAX_ARCH__>=7
.arch armv7-a
.fpu neon
.align 5
.LNEON:
ldr r12, [sp] @ 5th argument
vmov d26, r2, r1
vmov d27, r12, r3
vmov.i64 d28, #0x0000ffffffffffff
vmov.i64 d29, #0x00000000ffffffff
vmov.i64 d30, #0x000000000000ffff
vext.8 d2, d26, d26, #1 @ A1
vmull.p8 q1, d2, d27 @ F = A1*B
vext.8 d0, d27, d27, #1 @ B1
vmull.p8 q0, d26, d0 @ E = A*B1
vext.8 d4, d26, d26, #2 @ A2
vmull.p8 q2, d4, d27 @ H = A2*B
vext.8 d16, d27, d27, #2 @ B2
vmull.p8 q8, d26, d16 @ G = A*B2
vext.8 d6, d26, d26, #3 @ A3
veor q1, q1, q0 @ L = E + F
vmull.p8 q3, d6, d27 @ J = A3*B
vext.8 d0, d27, d27, #3 @ B3
veor q2, q2, q8 @ M = G + H
vmull.p8 q0, d26, d0 @ I = A*B3
veor d2, d2, d3 @ t0 = (L) (P0 + P1) << 8
vand d3, d3, d28
vext.8 d16, d27, d27, #4 @ B4
veor d4, d4, d5 @ t1 = (M) (P2 + P3) << 16
vand d5, d5, d29
vmull.p8 q8, d26, d16 @ K = A*B4
veor q3, q3, q0 @ N = I + J
veor d2, d2, d3
veor d4, d4, d5
veor d6, d6, d7 @ t2 = (N) (P4 + P5) << 24
vand d7, d7, d30
vext.8 q1, q1, q1, #15
veor d16, d16, d17 @ t3 = (K) (P6 + P7) << 32
vmov.i64 d17, #0
vext.8 q2, q2, q2, #14
veor d6, d6, d7
vmull.p8 q0, d26, d27 @ D = A*B
vext.8 q8, q8, q8, #12
vext.8 q3, q3, q3, #13
veor q1, q1, q2
veor q3, q3, q8
veor q0, q0, q1
veor q0, q0, q3
vst1.32 {q0}, [r0]
bx lr @ bx lr
#endif
.size bn_GF2m_mul_2x2,.-bn_GF2m_mul_2x2
#if __ARM_MAX_ARCH__>=7
.align 5
.LOPENSSL_armcap:
.word OPENSSL_armcap_P-(.Lpic+8)
#endif
.asciz "GF(2^m) Multiplication for ARMv4/NEON, CRYPTOGAMS by <appro@openssl.org>"
.align 5
#if __ARM_MAX_ARCH__>=7
.comm OPENSSL_armcap_P,4,4
#endif
secure/lib/libcrypto/arm/armv4-mont.S
+582
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@@ -0,0 +1,582 @@
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from armv4-mont.pl. */
#include "arm_arch.h"
.text
.code 32
#if __ARM_MAX_ARCH__>=7
.align 5
.LOPENSSL_armcap:
.word OPENSSL_armcap_P-bn_mul_mont
#endif
.global bn_mul_mont
.type bn_mul_mont,%function
.align 5
bn_mul_mont:
ldr ip,[sp,#4] @ load num
stmdb sp!,{r0,r2} @ sp points at argument block
#if __ARM_MAX_ARCH__>=7
tst ip,#7
bne .Lialu
adr r0,bn_mul_mont
ldr r2,.LOPENSSL_armcap
ldr r0,[r0,r2]
tst r0,#1 @ NEON available?
ldmia sp, {r0,r2}
beq .Lialu
add sp,sp,#8
b bn_mul8x_mont_neon
.align 4
.Lialu:
#endif
cmp ip,#2
mov r0,ip @ load num
movlt r0,#0
addlt sp,sp,#2*4
blt .Labrt
stmdb sp!,{r4-r12,lr} @ save 10 registers
mov r0,r0,lsl#2 @ rescale r0 for byte count
sub sp,sp,r0 @ alloca(4*num)
sub sp,sp,#4 @ +extra dword
sub r0,r0,#4 @ "num=num-1"
add r4,r2,r0 @ &bp[num-1]
add r0,sp,r0 @ r0 to point at &tp[num-1]
ldr r8,[r0,#14*4] @ &n0
ldr r2,[r2] @ bp[0]
ldr r5,[r1],#4 @ ap[0],ap++
ldr r6,[r3],#4 @ np[0],np++
ldr r8,[r8] @ *n0
str r4,[r0,#15*4] @ save &bp[num]
umull r10,r11,r5,r2 @ ap[0]*bp[0]
str r8,[r0,#14*4] @ save n0 value
mul r8,r10,r8 @ "tp[0]"*n0
mov r12,#0
umlal r10,r12,r6,r8 @ np[0]*n0+"t[0]"
mov r4,sp
.L1st:
ldr r5,[r1],#4 @ ap[j],ap++
mov r10,r11
ldr r6,[r3],#4 @ np[j],np++
mov r11,#0
umlal r10,r11,r5,r2 @ ap[j]*bp[0]
mov r14,#0
umlal r12,r14,r6,r8 @ np[j]*n0
adds r12,r12,r10
str r12,[r4],#4 @ tp[j-1]=,tp++
adc r12,r14,#0
cmp r4,r0
bne .L1st
adds r12,r12,r11
ldr r4,[r0,#13*4] @ restore bp
mov r14,#0
ldr r8,[r0,#14*4] @ restore n0
adc r14,r14,#0
str r12,[r0] @ tp[num-1]=
str r14,[r0,#4] @ tp[num]=
.Louter:
sub r7,r0,sp @ "original" r0-1 value
sub r1,r1,r7 @ "rewind" ap to &ap[1]
ldr r2,[r4,#4]! @ *(++bp)
sub r3,r3,r7 @ "rewind" np to &np[1]
ldr r5,[r1,#-4] @ ap[0]
ldr r10,[sp] @ tp[0]
ldr r6,[r3,#-4] @ np[0]
ldr r7,[sp,#4] @ tp[1]
mov r11,#0
umlal r10,r11,r5,r2 @ ap[0]*bp[i]+tp[0]
str r4,[r0,#13*4] @ save bp
mul r8,r10,r8
mov r12,#0
umlal r10,r12,r6,r8 @ np[0]*n0+"tp[0]"
mov r4,sp
.Linner:
ldr r5,[r1],#4 @ ap[j],ap++
adds r10,r11,r7 @ +=tp[j]
ldr r6,[r3],#4 @ np[j],np++
mov r11,#0
umlal r10,r11,r5,r2 @ ap[j]*bp[i]
mov r14,#0
umlal r12,r14,r6,r8 @ np[j]*n0
adc r11,r11,#0
ldr r7,[r4,#8] @ tp[j+1]
adds r12,r12,r10
str r12,[r4],#4 @ tp[j-1]=,tp++
adc r12,r14,#0
cmp r4,r0
bne .Linner
adds r12,r12,r11
mov r14,#0
ldr r4,[r0,#13*4] @ restore bp
adc r14,r14,#0
ldr r8,[r0,#14*4] @ restore n0
adds r12,r12,r7
ldr r7,[r0,#15*4] @ restore &bp[num]
adc r14,r14,#0
str r12,[r0] @ tp[num-1]=
str r14,[r0,#4] @ tp[num]=
cmp r4,r7
bne .Louter
ldr r2,[r0,#12*4] @ pull rp
add r0,r0,#4 @ r0 to point at &tp[num]
sub r5,r0,sp @ "original" num value
mov r4,sp @ "rewind" r4
mov r1,r4 @ "borrow" r1
sub r3,r3,r5 @ "rewind" r3 to &np[0]
subs r7,r7,r7 @ "clear" carry flag
.Lsub: ldr r7,[r4],#4
ldr r6,[r3],#4
sbcs r7,r7,r6 @ tp[j]-np[j]
str r7,[r2],#4 @ rp[j]=
teq r4,r0 @ preserve carry
bne .Lsub
sbcs r14,r14,#0 @ upmost carry
mov r4,sp @ "rewind" r4
sub r2,r2,r5 @ "rewind" r2
and r1,r4,r14
bic r3,r2,r14
orr r1,r1,r3 @ ap=borrow?tp:rp
.Lcopy: ldr r7,[r1],#4 @ copy or in-place refresh
str sp,[r4],#4 @ zap tp
str r7,[r2],#4
cmp r4,r0
bne .Lcopy
add sp,r0,#4 @ skip over tp[num+1]
ldmia sp!,{r4-r12,lr} @ restore registers
add sp,sp,#2*4 @ skip over {r0,r2}
mov r0,#1
.Labrt:
#if __ARM_ARCH__>=5
bx lr @ .word 0xe12fff1e
#else
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.size bn_mul_mont,.-bn_mul_mont
#if __ARM_MAX_ARCH__>=7
.arch armv7-a
.fpu neon
.type bn_mul8x_mont_neon,%function
.align 5
bn_mul8x_mont_neon:
mov ip,sp
stmdb sp!,{r4-r11}
vstmdb sp!,{d8-d15} @ ABI specification says so
ldmia ip,{r4-r5} @ load rest of parameter block
sub r7,sp,#16
vld1.32 {d28[0]}, [r2,:32]!
sub r7,r7,r5,lsl#4
vld1.32 {d0-d3}, [r1]! @ can't specify :32 :-(
and r7,r7,#-64
vld1.32 {d30[0]}, [r4,:32]
mov sp,r7 @ alloca
veor d8,d8,d8
subs r8,r5,#8
vzip.16 d28,d8
vmull.u32 q6,d28,d0[0]
vmull.u32 q7,d28,d0[1]
vmull.u32 q8,d28,d1[0]
vshl.i64 d10,d13,#16
vmull.u32 q9,d28,d1[1]
vadd.u64 d10,d10,d12
veor d8,d8,d8
vmul.u32 d29,d10,d30
vmull.u32 q10,d28,d2[0]
vld1.32 {d4-d7}, [r3]!
vmull.u32 q11,d28,d2[1]
vmull.u32 q12,d28,d3[0]
vzip.16 d29,d8
vmull.u32 q13,d28,d3[1]
bne .LNEON_1st
@ special case for num=8, everything is in register bank...
vmlal.u32 q6,d29,d4[0]
sub r9,r5,#1
vmlal.u32 q7,d29,d4[1]
vmlal.u32 q8,d29,d5[0]
vmlal.u32 q9,d29,d5[1]
vmlal.u32 q10,d29,d6[0]
vmov q5,q6
vmlal.u32 q11,d29,d6[1]
vmov q6,q7
vmlal.u32 q12,d29,d7[0]
vmov q7,q8
vmlal.u32 q13,d29,d7[1]
vmov q8,q9
vmov q9,q10
vshr.u64 d10,d10,#16
vmov q10,q11
vmov q11,q12
vadd.u64 d10,d10,d11
vmov q12,q13
veor q13,q13
vshr.u64 d10,d10,#16
b .LNEON_outer8
.align 4
.LNEON_outer8:
vld1.32 {d28[0]}, [r2,:32]!
veor d8,d8,d8
vzip.16 d28,d8
vadd.u64 d12,d12,d10
vmlal.u32 q6,d28,d0[0]
vmlal.u32 q7,d28,d0[1]
vmlal.u32 q8,d28,d1[0]
vshl.i64 d10,d13,#16
vmlal.u32 q9,d28,d1[1]
vadd.u64 d10,d10,d12
veor d8,d8,d8
subs r9,r9,#1
vmul.u32 d29,d10,d30
vmlal.u32 q10,d28,d2[0]
vmlal.u32 q11,d28,d2[1]
vmlal.u32 q12,d28,d3[0]
vzip.16 d29,d8
vmlal.u32 q13,d28,d3[1]
vmlal.u32 q6,d29,d4[0]
vmlal.u32 q7,d29,d4[1]
vmlal.u32 q8,d29,d5[0]
vmlal.u32 q9,d29,d5[1]
vmlal.u32 q10,d29,d6[0]
vmov q5,q6
vmlal.u32 q11,d29,d6[1]
vmov q6,q7
vmlal.u32 q12,d29,d7[0]
vmov q7,q8
vmlal.u32 q13,d29,d7[1]
vmov q8,q9
vmov q9,q10
vshr.u64 d10,d10,#16
vmov q10,q11
vmov q11,q12
vadd.u64 d10,d10,d11
vmov q12,q13
veor q13,q13
vshr.u64 d10,d10,#16
bne .LNEON_outer8
vadd.u64 d12,d12,d10
mov r7,sp
vshr.u64 d10,d12,#16
mov r8,r5
vadd.u64 d13,d13,d10
add r6,sp,#16
vshr.u64 d10,d13,#16
vzip.16 d12,d13
b .LNEON_tail2
.align 4
.LNEON_1st:
vmlal.u32 q6,d29,d4[0]
vld1.32 {d0-d3}, [r1]!
vmlal.u32 q7,d29,d4[1]
subs r8,r8,#8
vmlal.u32 q8,d29,d5[0]
vmlal.u32 q9,d29,d5[1]
vmlal.u32 q10,d29,d6[0]
vld1.32 {d4-d5}, [r3]!
vmlal.u32 q11,d29,d6[1]
vst1.64 {q6-q7}, [r7,:256]!
vmlal.u32 q12,d29,d7[0]
vmlal.u32 q13,d29,d7[1]
vst1.64 {q8-q9}, [r7,:256]!
vmull.u32 q6,d28,d0[0]
vld1.32 {d6-d7}, [r3]!
vmull.u32 q7,d28,d0[1]
vst1.64 {q10-q11}, [r7,:256]!
vmull.u32 q8,d28,d1[0]
vmull.u32 q9,d28,d1[1]
vst1.64 {q12-q13}, [r7,:256]!
vmull.u32 q10,d28,d2[0]
vmull.u32 q11,d28,d2[1]
vmull.u32 q12,d28,d3[0]
vmull.u32 q13,d28,d3[1]
bne .LNEON_1st
vmlal.u32 q6,d29,d4[0]
add r6,sp,#16
vmlal.u32 q7,d29,d4[1]
sub r1,r1,r5,lsl#2 @ rewind r1
vmlal.u32 q8,d29,d5[0]
vld1.64 {q5}, [sp,:128]
vmlal.u32 q9,d29,d5[1]
sub r9,r5,#1
vmlal.u32 q10,d29,d6[0]
vst1.64 {q6-q7}, [r7,:256]!
vmlal.u32 q11,d29,d6[1]
vshr.u64 d10,d10,#16
vld1.64 {q6}, [r6, :128]!
vmlal.u32 q12,d29,d7[0]
vst1.64 {q8-q9}, [r7,:256]!
vmlal.u32 q13,d29,d7[1]
vst1.64 {q10-q11}, [r7,:256]!
vadd.u64 d10,d10,d11
veor q4,q4,q4
vst1.64 {q12-q13}, [r7,:256]!
vld1.64 {q7-q8}, [r6, :256]!
vst1.64 {q4}, [r7,:128]
vshr.u64 d10,d10,#16
b .LNEON_outer
.align 4
.LNEON_outer:
vld1.32 {d28[0]}, [r2,:32]!
sub r3,r3,r5,lsl#2 @ rewind r3
vld1.32 {d0-d3}, [r1]!
veor d8,d8,d8
mov r7,sp
vzip.16 d28,d8
sub r8,r5,#8
vadd.u64 d12,d12,d10
vmlal.u32 q6,d28,d0[0]
vld1.64 {q9-q10},[r6,:256]!
vmlal.u32 q7,d28,d0[1]
vmlal.u32 q8,d28,d1[0]
vld1.64 {q11-q12},[r6,:256]!
vmlal.u32 q9,d28,d1[1]
vshl.i64 d10,d13,#16
veor d8,d8,d8
vadd.u64 d10,d10,d12
vld1.64 {q13},[r6,:128]!
vmul.u32 d29,d10,d30
vmlal.u32 q10,d28,d2[0]
vld1.32 {d4-d7}, [r3]!
vmlal.u32 q11,d28,d2[1]
vmlal.u32 q12,d28,d3[0]
vzip.16 d29,d8
vmlal.u32 q13,d28,d3[1]
.LNEON_inner:
vmlal.u32 q6,d29,d4[0]
vld1.32 {d0-d3}, [r1]!
vmlal.u32 q7,d29,d4[1]
subs r8,r8,#8
vmlal.u32 q8,d29,d5[0]
vmlal.u32 q9,d29,d5[1]
vst1.64 {q6-q7}, [r7,:256]!
vmlal.u32 q10,d29,d6[0]
vld1.64 {q6}, [r6, :128]!
vmlal.u32 q11,d29,d6[1]
vst1.64 {q8-q9}, [r7,:256]!
vmlal.u32 q12,d29,d7[0]
vld1.64 {q7-q8}, [r6, :256]!
vmlal.u32 q13,d29,d7[1]
vst1.64 {q10-q11}, [r7,:256]!
vmlal.u32 q6,d28,d0[0]
vld1.64 {q9-q10}, [r6, :256]!
vmlal.u32 q7,d28,d0[1]
vst1.64 {q12-q13}, [r7,:256]!
vmlal.u32 q8,d28,d1[0]
vld1.64 {q11-q12}, [r6, :256]!
vmlal.u32 q9,d28,d1[1]
vld1.32 {d4-d7}, [r3]!
vmlal.u32 q10,d28,d2[0]
vld1.64 {q13}, [r6, :128]!
vmlal.u32 q11,d28,d2[1]
vmlal.u32 q12,d28,d3[0]
vmlal.u32 q13,d28,d3[1]
bne .LNEON_inner
vmlal.u32 q6,d29,d4[0]
add r6,sp,#16
vmlal.u32 q7,d29,d4[1]
sub r1,r1,r5,lsl#2 @ rewind r1
vmlal.u32 q8,d29,d5[0]
vld1.64 {q5}, [sp,:128]
vmlal.u32 q9,d29,d5[1]
subs r9,r9,#1
vmlal.u32 q10,d29,d6[0]
vst1.64 {q6-q7}, [r7,:256]!
vmlal.u32 q11,d29,d6[1]
vld1.64 {q6}, [r6, :128]!
vshr.u64 d10,d10,#16
vst1.64 {q8-q9}, [r7,:256]!
vmlal.u32 q12,d29,d7[0]
vld1.64 {q7-q8}, [r6, :256]!
vmlal.u32 q13,d29,d7[1]
vst1.64 {q10-q11}, [r7,:256]!
vadd.u64 d10,d10,d11
vst1.64 {q12-q13}, [r7,:256]!
vshr.u64 d10,d10,#16
bne .LNEON_outer
mov r7,sp
mov r8,r5
.LNEON_tail:
vadd.u64 d12,d12,d10
vld1.64 {q9-q10}, [r6, :256]!
vshr.u64 d10,d12,#16
vadd.u64 d13,d13,d10
vld1.64 {q11-q12}, [r6, :256]!
vshr.u64 d10,d13,#16
vld1.64 {q13}, [r6, :128]!
vzip.16 d12,d13
.LNEON_tail2:
vadd.u64 d14,d14,d10
vst1.32 {d12[0]}, [r7, :32]!
vshr.u64 d10,d14,#16
vadd.u64 d15,d15,d10
vshr.u64 d10,d15,#16
vzip.16 d14,d15
vadd.u64 d16,d16,d10
vst1.32 {d14[0]}, [r7, :32]!
vshr.u64 d10,d16,#16
vadd.u64 d17,d17,d10
vshr.u64 d10,d17,#16
vzip.16 d16,d17
vadd.u64 d18,d18,d10
vst1.32 {d16[0]}, [r7, :32]!
vshr.u64 d10,d18,#16
vadd.u64 d19,d19,d10
vshr.u64 d10,d19,#16
vzip.16 d18,d19
vadd.u64 d20,d20,d10
vst1.32 {d18[0]}, [r7, :32]!
vshr.u64 d10,d20,#16
vadd.u64 d21,d21,d10
vshr.u64 d10,d21,#16
vzip.16 d20,d21
vadd.u64 d22,d22,d10
vst1.32 {d20[0]}, [r7, :32]!
vshr.u64 d10,d22,#16
vadd.u64 d23,d23,d10
vshr.u64 d10,d23,#16
vzip.16 d22,d23
vadd.u64 d24,d24,d10
vst1.32 {d22[0]}, [r7, :32]!
vshr.u64 d10,d24,#16
vadd.u64 d25,d25,d10
vld1.64 {q6}, [r6, :128]!
vshr.u64 d10,d25,#16
vzip.16 d24,d25
vadd.u64 d26,d26,d10
vst1.32 {d24[0]}, [r7, :32]!
vshr.u64 d10,d26,#16
vadd.u64 d27,d27,d10
vld1.64 {q7-q8}, [r6, :256]!
vshr.u64 d10,d27,#16
vzip.16 d26,d27
subs r8,r8,#8
vst1.32 {d26[0]}, [r7, :32]!
bne .LNEON_tail
vst1.32 {d10[0]}, [r7, :32] @ top-most bit
sub r3,r3,r5,lsl#2 @ rewind r3
subs r1,sp,#0 @ clear carry flag
add r2,sp,r5,lsl#2
.LNEON_sub:
ldmia r1!, {r4-r7}
ldmia r3!, {r8-r11}
sbcs r8, r4,r8
sbcs r9, r5,r9
sbcs r10,r6,r10
sbcs r11,r7,r11
teq r1,r2 @ preserves carry
stmia r0!, {r8-r11}
bne .LNEON_sub
ldr r10, [r1] @ load top-most bit
veor q0,q0,q0
sub r11,r2,sp @ this is num*4
veor q1,q1,q1
mov r1,sp
sub r0,r0,r11 @ rewind r0
mov r3,r2 @ second 3/4th of frame
sbcs r10,r10,#0 @ result is carry flag
.LNEON_copy_n_zap:
ldmia r1!, {r4-r7}
ldmia r0, {r8-r11}
movcc r8, r4
vst1.64 {q0-q1}, [r3,:256]! @ wipe
movcc r9, r5
movcc r10,r6
vst1.64 {q0-q1}, [r3,:256]! @ wipe
movcc r11,r7
ldmia r1, {r4-r7}
stmia r0!, {r8-r11}
sub r1,r1,#16
ldmia r0, {r8-r11}
movcc r8, r4
vst1.64 {q0-q1}, [r1,:256]! @ wipe
movcc r9, r5
movcc r10,r6
vst1.64 {q0-q1}, [r3,:256]! @ wipe
movcc r11,r7
teq r1,r2 @ preserves carry
stmia r0!, {r8-r11}
bne .LNEON_copy_n_zap
sub sp,ip,#96
vldmia sp!,{d8-d15}
ldmia sp!,{r4-r11}
bx lr @ .word 0xe12fff1e
.size bn_mul8x_mont_neon,.-bn_mul8x_mont_neon
#endif
.asciz "Montgomery multiplication for ARMv4/NEON, CRYPTOGAMS by <appro@openssl.org>"
.align 2
#if __ARM_MAX_ARCH__>=7
.comm OPENSSL_armcap_P,4,4
#endif
secure/lib/libcrypto/arm/bsaes-armv7.S
+2548
View File
File diff suppressed because it is too large Load Diff
secure/lib/libcrypto/arm/ghash-armv4.S
+530
View File
@@ -0,0 +1,530 @@
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from ghash-armv4.pl. */
#include "arm_arch.h"
.text
.code 32
#ifdef __clang__
#define ldrplb ldrbpl
#define ldrneb ldrbne
#endif
.type rem_4bit,%object
.align 5
rem_4bit:
.short 0x0000,0x1C20,0x3840,0x2460
.short 0x7080,0x6CA0,0x48C0,0x54E0
.short 0xE100,0xFD20,0xD940,0xC560
.short 0x9180,0x8DA0,0xA9C0,0xB5E0
.size rem_4bit,.-rem_4bit
.type rem_4bit_get,%function
rem_4bit_get:
sub r2,pc,#8
sub r2,r2,#32 @ &rem_4bit
b .Lrem_4bit_got
nop
.size rem_4bit_get,.-rem_4bit_get
.global gcm_ghash_4bit
.type gcm_ghash_4bit,%function
gcm_ghash_4bit:
sub r12,pc,#8
add r3,r2,r3 @ r3 to point at the end
stmdb sp!,{r3-r11,lr} @ save r3/end too
sub r12,r12,#48 @ &rem_4bit
ldmia r12,{r4-r11} @ copy rem_4bit ...
stmdb sp!,{r4-r11} @ ... to stack
ldrb r12,[r2,#15]
ldrb r14,[r0,#15]
.Louter:
eor r12,r12,r14
and r14,r12,#0xf0
and r12,r12,#0x0f
mov r3,#14
add r7,r1,r12,lsl#4
ldmia r7,{r4-r7} @ load Htbl[nlo]
add r11,r1,r14
ldrb r12,[r2,#14]
and r14,r4,#0xf @ rem
ldmia r11,{r8-r11} @ load Htbl[nhi]
add r14,r14,r14
eor r4,r8,r4,lsr#4
ldrh r8,[sp,r14] @ rem_4bit[rem]
eor r4,r4,r5,lsl#28
ldrb r14,[r0,#14]
eor r5,r9,r5,lsr#4
eor r5,r5,r6,lsl#28
eor r6,r10,r6,lsr#4
eor r6,r6,r7,lsl#28
eor r7,r11,r7,lsr#4
eor r12,r12,r14
and r14,r12,#0xf0
and r12,r12,#0x0f
eor r7,r7,r8,lsl#16
.Linner:
add r11,r1,r12,lsl#4
and r12,r4,#0xf @ rem
subs r3,r3,#1
add r12,r12,r12
ldmia r11,{r8-r11} @ load Htbl[nlo]
eor r4,r8,r4,lsr#4
eor r4,r4,r5,lsl#28
eor r5,r9,r5,lsr#4
eor r5,r5,r6,lsl#28
ldrh r8,[sp,r12] @ rem_4bit[rem]
eor r6,r10,r6,lsr#4
ldrplb r12,[r2,r3]
eor r6,r6,r7,lsl#28
eor r7,r11,r7,lsr#4
add r11,r1,r14
and r14,r4,#0xf @ rem
eor r7,r7,r8,lsl#16 @ ^= rem_4bit[rem]
add r14,r14,r14
ldmia r11,{r8-r11} @ load Htbl[nhi]
eor r4,r8,r4,lsr#4
ldrplb r8,[r0,r3]
eor r4,r4,r5,lsl#28
eor r5,r9,r5,lsr#4
ldrh r9,[sp,r14]
eor r5,r5,r6,lsl#28
eor r6,r10,r6,lsr#4
eor r6,r6,r7,lsl#28
eorpl r12,r12,r8
eor r7,r11,r7,lsr#4
andpl r14,r12,#0xf0
andpl r12,r12,#0x0f
eor r7,r7,r9,lsl#16 @ ^= rem_4bit[rem]
bpl .Linner
ldr r3,[sp,#32] @ re-load r3/end
add r2,r2,#16
mov r14,r4
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r4,r4
str r4,[r0,#12]
#elif defined(__ARMEB__)
str r4,[r0,#12]
#else
mov r9,r4,lsr#8
strb r4,[r0,#12+3]
mov r10,r4,lsr#16
strb r9,[r0,#12+2]
mov r11,r4,lsr#24
strb r10,[r0,#12+1]
strb r11,[r0,#12]
#endif
cmp r2,r3
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r5,r5
str r5,[r0,#8]
#elif defined(__ARMEB__)
str r5,[r0,#8]
#else
mov r9,r5,lsr#8
strb r5,[r0,#8+3]
mov r10,r5,lsr#16
strb r9,[r0,#8+2]
mov r11,r5,lsr#24
strb r10,[r0,#8+1]
strb r11,[r0,#8]
#endif
ldrneb r12,[r2,#15]
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r6,r6
str r6,[r0,#4]
#elif defined(__ARMEB__)
str r6,[r0,#4]
#else
mov r9,r6,lsr#8
strb r6,[r0,#4+3]
mov r10,r6,lsr#16
strb r9,[r0,#4+2]
mov r11,r6,lsr#24
strb r10,[r0,#4+1]
strb r11,[r0,#4]
#endif
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r7,r7
str r7,[r0,#0]
#elif defined(__ARMEB__)
str r7,[r0,#0]
#else
mov r9,r7,lsr#8
strb r7,[r0,#0+3]
mov r10,r7,lsr#16
strb r9,[r0,#0+2]
mov r11,r7,lsr#24
strb r10,[r0,#0+1]
strb r11,[r0,#0]
#endif
bne .Louter
add sp,sp,#36
#if __ARM_ARCH__>=5
ldmia sp!,{r4-r11,pc}
#else
ldmia sp!,{r4-r11,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.size gcm_ghash_4bit,.-gcm_ghash_4bit
.global gcm_gmult_4bit
.type gcm_gmult_4bit,%function
gcm_gmult_4bit:
stmdb sp!,{r4-r11,lr}
ldrb r12,[r0,#15]
b rem_4bit_get
.Lrem_4bit_got:
and r14,r12,#0xf0
and r12,r12,#0x0f
mov r3,#14
add r7,r1,r12,lsl#4
ldmia r7,{r4-r7} @ load Htbl[nlo]
ldrb r12,[r0,#14]
add r11,r1,r14
and r14,r4,#0xf @ rem
ldmia r11,{r8-r11} @ load Htbl[nhi]
add r14,r14,r14
eor r4,r8,r4,lsr#4
ldrh r8,[r2,r14] @ rem_4bit[rem]
eor r4,r4,r5,lsl#28
eor r5,r9,r5,lsr#4
eor r5,r5,r6,lsl#28
eor r6,r10,r6,lsr#4
eor r6,r6,r7,lsl#28
eor r7,r11,r7,lsr#4
and r14,r12,#0xf0
eor r7,r7,r8,lsl#16
and r12,r12,#0x0f
.Loop:
add r11,r1,r12,lsl#4
and r12,r4,#0xf @ rem
subs r3,r3,#1
add r12,r12,r12
ldmia r11,{r8-r11} @ load Htbl[nlo]
eor r4,r8,r4,lsr#4
eor r4,r4,r5,lsl#28
eor r5,r9,r5,lsr#4
eor r5,r5,r6,lsl#28
ldrh r8,[r2,r12] @ rem_4bit[rem]
eor r6,r10,r6,lsr#4
ldrplb r12,[r0,r3]
eor r6,r6,r7,lsl#28
eor r7,r11,r7,lsr#4
add r11,r1,r14
and r14,r4,#0xf @ rem
eor r7,r7,r8,lsl#16 @ ^= rem_4bit[rem]
add r14,r14,r14
ldmia r11,{r8-r11} @ load Htbl[nhi]
eor r4,r8,r4,lsr#4
eor r4,r4,r5,lsl#28
eor r5,r9,r5,lsr#4
ldrh r8,[r2,r14] @ rem_4bit[rem]
eor r5,r5,r6,lsl#28
eor r6,r10,r6,lsr#4
eor r6,r6,r7,lsl#28
eor r7,r11,r7,lsr#4
andpl r14,r12,#0xf0
andpl r12,r12,#0x0f
eor r7,r7,r8,lsl#16 @ ^= rem_4bit[rem]
bpl .Loop
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r4,r4
str r4,[r0,#12]
#elif defined(__ARMEB__)
str r4,[r0,#12]
#else
mov r9,r4,lsr#8
strb r4,[r0,#12+3]
mov r10,r4,lsr#16
strb r9,[r0,#12+2]
mov r11,r4,lsr#24
strb r10,[r0,#12+1]
strb r11,[r0,#12]
#endif
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r5,r5
str r5,[r0,#8]
#elif defined(__ARMEB__)
str r5,[r0,#8]
#else
mov r9,r5,lsr#8
strb r5,[r0,#8+3]
mov r10,r5,lsr#16
strb r9,[r0,#8+2]
mov r11,r5,lsr#24
strb r10,[r0,#8+1]
strb r11,[r0,#8]
#endif
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r6,r6
str r6,[r0,#4]
#elif defined(__ARMEB__)
str r6,[r0,#4]
#else
mov r9,r6,lsr#8
strb r6,[r0,#4+3]
mov r10,r6,lsr#16
strb r9,[r0,#4+2]
mov r11,r6,lsr#24
strb r10,[r0,#4+1]
strb r11,[r0,#4]
#endif
#if __ARM_ARCH__>=7 && defined(__ARMEL__)
rev r7,r7
str r7,[r0,#0]
#elif defined(__ARMEB__)
str r7,[r0,#0]
#else
mov r9,r7,lsr#8
strb r7,[r0,#0+3]
mov r10,r7,lsr#16
strb r9,[r0,#0+2]
mov r11,r7,lsr#24
strb r10,[r0,#0+1]
strb r11,[r0,#0]
#endif
#if __ARM_ARCH__>=5
ldmia sp!,{r4-r11,pc}
#else
ldmia sp!,{r4-r11,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.size gcm_gmult_4bit,.-gcm_gmult_4bit
#if __ARM_MAX_ARCH__>=7
.arch armv7-a
.fpu neon
.global gcm_init_neon
.type gcm_init_neon,%function
.align 4
gcm_init_neon:
vld1.64 d7,[r1,:64]! @ load H
vmov.i8 q8,#0xe1
vld1.64 d6,[r1,:64]
vshl.i64 d17,#57
vshr.u64 d16,#63 @ t0=0xc2....01
vdup.8 q9,d7[7]
vshr.u64 d26,d6,#63
vshr.s8 q9,#7 @ broadcast carry bit
vshl.i64 q3,q3,#1
vand q8,q8,q9
vorr d7,d26 @ H<<<=1
veor q3,q3,q8 @ twisted H
vstmia r0,{q3}
bx lr @ bx lr
.size gcm_init_neon,.-gcm_init_neon
.global gcm_gmult_neon
.type gcm_gmult_neon,%function
.align 4
gcm_gmult_neon:
vld1.64 d7,[r0,:64]! @ load Xi
vld1.64 d6,[r0,:64]!
vmov.i64 d29,#0x0000ffffffffffff
vldmia r1,{d26-d27} @ load twisted H
vmov.i64 d30,#0x00000000ffffffff
#ifdef __ARMEL__
vrev64.8 q3,q3
#endif
vmov.i64 d31,#0x000000000000ffff
veor d28,d26,d27 @ Karatsuba pre-processing
mov r3,#16
b .Lgmult_neon
.size gcm_gmult_neon,.-gcm_gmult_neon
.global gcm_ghash_neon
.type gcm_ghash_neon,%function
.align 4
gcm_ghash_neon:
vld1.64 d1,[r0,:64]! @ load Xi
vld1.64 d0,[r0,:64]!
vmov.i64 d29,#0x0000ffffffffffff
vldmia r1,{d26-d27} @ load twisted H
vmov.i64 d30,#0x00000000ffffffff
#ifdef __ARMEL__
vrev64.8 q0,q0
#endif
vmov.i64 d31,#0x000000000000ffff
veor d28,d26,d27 @ Karatsuba pre-processing
.Loop_neon:
vld1.64 d7,[r2]! @ load inp
vld1.64 d6,[r2]!
#ifdef __ARMEL__
vrev64.8 q3,q3
#endif
veor q3,q0 @ inp^=Xi
.Lgmult_neon:
vext.8 d16, d26, d26, #1 @ A1
vmull.p8 q8, d16, d6 @ F = A1*B
vext.8 d0, d6, d6, #1 @ B1
vmull.p8 q0, d26, d0 @ E = A*B1
vext.8 d18, d26, d26, #2 @ A2
vmull.p8 q9, d18, d6 @ H = A2*B
vext.8 d22, d6, d6, #2 @ B2
vmull.p8 q11, d26, d22 @ G = A*B2
vext.8 d20, d26, d26, #3 @ A3
veor q8, q8, q0 @ L = E + F
vmull.p8 q10, d20, d6 @ J = A3*B
vext.8 d0, d6, d6, #3 @ B3
veor q9, q9, q11 @ M = G + H
vmull.p8 q0, d26, d0 @ I = A*B3
veor d16, d16, d17 @ t0 = (L) (P0 + P1) << 8
vand d17, d17, d29
vext.8 d22, d6, d6, #4 @ B4
veor d18, d18, d19 @ t1 = (M) (P2 + P3) << 16
vand d19, d19, d30
vmull.p8 q11, d26, d22 @ K = A*B4
veor q10, q10, q0 @ N = I + J
veor d16, d16, d17
veor d18, d18, d19
veor d20, d20, d21 @ t2 = (N) (P4 + P5) << 24
vand d21, d21, d31
vext.8 q8, q8, q8, #15
veor d22, d22, d23 @ t3 = (K) (P6 + P7) << 32
vmov.i64 d23, #0
vext.8 q9, q9, q9, #14
veor d20, d20, d21
vmull.p8 q0, d26, d6 @ D = A*B
vext.8 q11, q11, q11, #12
vext.8 q10, q10, q10, #13
veor q8, q8, q9
veor q10, q10, q11
veor q0, q0, q8
veor q0, q0, q10
veor d6,d6,d7 @ Karatsuba pre-processing
vext.8 d16, d28, d28, #1 @ A1
vmull.p8 q8, d16, d6 @ F = A1*B
vext.8 d2, d6, d6, #1 @ B1
vmull.p8 q1, d28, d2 @ E = A*B1
vext.8 d18, d28, d28, #2 @ A2
vmull.p8 q9, d18, d6 @ H = A2*B
vext.8 d22, d6, d6, #2 @ B2
vmull.p8 q11, d28, d22 @ G = A*B2
vext.8 d20, d28, d28, #3 @ A3
veor q8, q8, q1 @ L = E + F
vmull.p8 q10, d20, d6 @ J = A3*B
vext.8 d2, d6, d6, #3 @ B3
veor q9, q9, q11 @ M = G + H
vmull.p8 q1, d28, d2 @ I = A*B3
veor d16, d16, d17 @ t0 = (L) (P0 + P1) << 8
vand d17, d17, d29
vext.8 d22, d6, d6, #4 @ B4
veor d18, d18, d19 @ t1 = (M) (P2 + P3) << 16
vand d19, d19, d30
vmull.p8 q11, d28, d22 @ K = A*B4
veor q10, q10, q1 @ N = I + J
veor d16, d16, d17
veor d18, d18, d19
veor d20, d20, d21 @ t2 = (N) (P4 + P5) << 24
vand d21, d21, d31
vext.8 q8, q8, q8, #15
veor d22, d22, d23 @ t3 = (K) (P6 + P7) << 32
vmov.i64 d23, #0
vext.8 q9, q9, q9, #14
veor d20, d20, d21
vmull.p8 q1, d28, d6 @ D = A*B
vext.8 q11, q11, q11, #12
vext.8 q10, q10, q10, #13
veor q8, q8, q9
veor q10, q10, q11
veor q1, q1, q8
veor q1, q1, q10
vext.8 d16, d27, d27, #1 @ A1
vmull.p8 q8, d16, d7 @ F = A1*B
vext.8 d4, d7, d7, #1 @ B1
vmull.p8 q2, d27, d4 @ E = A*B1
vext.8 d18, d27, d27, #2 @ A2
vmull.p8 q9, d18, d7 @ H = A2*B
vext.8 d22, d7, d7, #2 @ B2
vmull.p8 q11, d27, d22 @ G = A*B2
vext.8 d20, d27, d27, #3 @ A3
veor q8, q8, q2 @ L = E + F
vmull.p8 q10, d20, d7 @ J = A3*B
vext.8 d4, d7, d7, #3 @ B3
veor q9, q9, q11 @ M = G + H
vmull.p8 q2, d27, d4 @ I = A*B3
veor d16, d16, d17 @ t0 = (L) (P0 + P1) << 8
vand d17, d17, d29
vext.8 d22, d7, d7, #4 @ B4
veor d18, d18, d19 @ t1 = (M) (P2 + P3) << 16
vand d19, d19, d30
vmull.p8 q11, d27, d22 @ K = A*B4
veor q10, q10, q2 @ N = I + J
veor d16, d16, d17
veor d18, d18, d19
veor d20, d20, d21 @ t2 = (N) (P4 + P5) << 24
vand d21, d21, d31
vext.8 q8, q8, q8, #15
veor d22, d22, d23 @ t3 = (K) (P6 + P7) << 32
vmov.i64 d23, #0
vext.8 q9, q9, q9, #14
veor d20, d20, d21
vmull.p8 q2, d27, d7 @ D = A*B
vext.8 q11, q11, q11, #12
vext.8 q10, q10, q10, #13
veor q8, q8, q9
veor q10, q10, q11
veor q2, q2, q8
veor q2, q2, q10
veor q1,q1,q0 @ Karatsuba post-processing
veor q1,q1,q2
veor d1,d1,d2
veor d4,d4,d3 @ Xh|Xl - 256-bit result
@ equivalent of reduction_avx from ghash-x86_64.pl
vshl.i64 q9,q0,#57 @ 1st phase
vshl.i64 q10,q0,#62
veor q10,q10,q9 @
vshl.i64 q9,q0,#63
veor q10, q10, q9 @
veor d1,d1,d20 @
veor d4,d4,d21
vshr.u64 q10,q0,#1 @ 2nd phase
veor q2,q2,q0
veor q0,q0,q10 @
vshr.u64 q10,q10,#6
vshr.u64 q0,q0,#1 @
veor q0,q0,q2 @
veor q0,q0,q10 @
subs r3,#16
bne .Loop_neon
#ifdef __ARMEL__
vrev64.8 q0,q0
#endif
sub r0,#16
vst1.64 d1,[r0,:64]! @ write out Xi
vst1.64 d0,[r0,:64]
bx lr @ bx lr
.size gcm_ghash_neon,.-gcm_ghash_neon
#endif
.asciz "GHASH for ARMv4/NEON, CRYPTOGAMS by <appro@openssl.org>"
.align 2
secure/lib/libcrypto/arm/ghashv8-armx.S
+232
View File
@@ -0,0 +1,232 @@
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from ghashv8-armx.pl. */
#include "arm_arch.h"
.text
.fpu neon
.code 32
.global gcm_init_v8
.type gcm_init_v8,%function
.align 4
gcm_init_v8:
vld1.64 {q9},[r1] @ load input H
vmov.i8 q11,#0xe1
vshl.i64 q11,q11,#57 @ 0xc2.0
vext.8 q3,q9,q9,#8
vshr.u64 q10,q11,#63
vdup.32 q9,d18[1]
vext.8 q8,q10,q11,#8 @ t0=0xc2....01
vshr.u64 q10,q3,#63
vshr.s32 q9,q9,#31 @ broadcast carry bit
vand q10,q10,q8
vshl.i64 q3,q3,#1
vext.8 q10,q10,q10,#8
vand q8,q8,q9
vorr q3,q3,q10 @ H<<<=1
veor q12,q3,q8 @ twisted H
vst1.64 {q12},[r0]! @ store Htable[0]
@ calculate H^2
vext.8 q8,q12,q12,#8 @ Karatsuba pre-processing
.byte 0xa8,0x0e,0xa8,0xf2 @ pmull q0,q12,q12
veor q8,q8,q12
.byte 0xa9,0x4e,0xa9,0xf2 @ pmull2 q2,q12,q12
.byte 0xa0,0x2e,0xa0,0xf2 @ pmull q1,q8,q8
vext.8 q9,q0,q2,#8 @ Karatsuba post-processing
veor q10,q0,q2
veor q1,q1,q9
veor q1,q1,q10
.byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase
vmov d4,d3 @ Xh|Xm - 256-bit result
vmov d3,d0 @ Xm is rotated Xl
veor q0,q1,q10
vext.8 q10,q0,q0,#8 @ 2nd phase
.byte 0x26,0x0e,0xa0,0xf2 @ pmull q0,q0,q11
veor q10,q10,q2
veor q14,q0,q10
vext.8 q9,q14,q14,#8 @ Karatsuba pre-processing
veor q9,q9,q14
vext.8 q13,q8,q9,#8 @ pack Karatsuba pre-processed
vst1.64 {q13-q14},[r0] @ store Htable[1..2]
bx lr
.size gcm_init_v8,.-gcm_init_v8
.global gcm_gmult_v8
.type gcm_gmult_v8,%function
.align 4
gcm_gmult_v8:
vld1.64 {q9},[r0] @ load Xi
vmov.i8 q11,#0xe1
vld1.64 {q12-q13},[r1] @ load twisted H, ...
vshl.u64 q11,q11,#57
#ifndef __ARMEB__
vrev64.8 q9,q9
#endif
vext.8 q3,q9,q9,#8
.byte 0x86,0x0e,0xa8,0xf2 @ pmull q0,q12,q3 @ H.lo·Xi.lo
veor q9,q9,q3 @ Karatsuba pre-processing
.byte 0x87,0x4e,0xa9,0xf2 @ pmull2 q2,q12,q3 @ H.hi·Xi.hi
.byte 0xa2,0x2e,0xaa,0xf2 @ pmull q1,q13,q9 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
vext.8 q9,q0,q2,#8 @ Karatsuba post-processing
veor q10,q0,q2
veor q1,q1,q9
veor q1,q1,q10
.byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
vmov d4,d3 @ Xh|Xm - 256-bit result
vmov d3,d0 @ Xm is rotated Xl
veor q0,q1,q10
vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
.byte 0x26,0x0e,0xa0,0xf2 @ pmull q0,q0,q11
veor q10,q10,q2
veor q0,q0,q10
#ifndef __ARMEB__
vrev64.8 q0,q0
#endif
vext.8 q0,q0,q0,#8
vst1.64 {q0},[r0] @ write out Xi
bx lr
.size gcm_gmult_v8,.-gcm_gmult_v8
.global gcm_ghash_v8
.type gcm_ghash_v8,%function
.align 4
gcm_ghash_v8:
vstmdb sp!,{d8-d15} @ 32-bit ABI says so
vld1.64 {q0},[r0] @ load [rotated] Xi
@ "[rotated]" means that
@ loaded value would have
@ to be rotated in order to
@ make it appear as in
@ alorithm specification
subs r3,r3,#32 @ see if r3 is 32 or larger
mov r12,#16 @ r12 is used as post-
@ increment for input pointer;
@ as loop is modulo-scheduled
@ r12 is zeroed just in time
@ to preclude oversteping
@ inp[len], which means that
@ last block[s] are actually
@ loaded twice, but last
@ copy is not processed
vld1.64 {q12-q13},[r1]! @ load twisted H, ..., H^2
vmov.i8 q11,#0xe1
vld1.64 {q14},[r1]
moveq r12,#0 @ is it time to zero r12?
vext.8 q0,q0,q0,#8 @ rotate Xi
vld1.64 {q8},[r2]! @ load [rotated] I[0]
vshl.u64 q11,q11,#57 @ compose 0xc2.0 constant
#ifndef __ARMEB__
vrev64.8 q8,q8
vrev64.8 q0,q0
#endif
vext.8 q3,q8,q8,#8 @ rotate I[0]
blo .Lodd_tail_v8 @ r3 was less than 32
vld1.64 {q9},[r2],r12 @ load [rotated] I[1]
#ifndef __ARMEB__
vrev64.8 q9,q9
#endif
vext.8 q7,q9,q9,#8
veor q3,q3,q0 @ I[i]^=Xi
.byte 0x8e,0x8e,0xa8,0xf2 @ pmull q4,q12,q7 @ H·Ii+1
veor q9,q9,q7 @ Karatsuba pre-processing
.byte 0x8f,0xce,0xa9,0xf2 @ pmull2 q6,q12,q7
b .Loop_mod2x_v8
.align 4
.Loop_mod2x_v8:
vext.8 q10,q3,q3,#8
subs r3,r3,#32 @ is there more data?
.byte 0x86,0x0e,0xac,0xf2 @ pmull q0,q14,q3 @ H^2.lo·Xi.lo
movlo r12,#0 @ is it time to zero r12?
.byte 0xa2,0xae,0xaa,0xf2 @ pmull q5,q13,q9
veor q10,q10,q3 @ Karatsuba pre-processing
.byte 0x87,0x4e,0xad,0xf2 @ pmull2 q2,q14,q3 @ H^2.hi·Xi.hi
veor q0,q0,q4 @ accumulate
.byte 0xa5,0x2e,0xab,0xf2 @ pmull2 q1,q13,q10 @ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
vld1.64 {q8},[r2],r12 @ load [rotated] I[i+2]
veor q2,q2,q6
moveq r12,#0 @ is it time to zero r12?
veor q1,q1,q5
vext.8 q9,q0,q2,#8 @ Karatsuba post-processing
veor q10,q0,q2
veor q1,q1,q9
vld1.64 {q9},[r2],r12 @ load [rotated] I[i+3]
#ifndef __ARMEB__
vrev64.8 q8,q8
#endif
veor q1,q1,q10
.byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
#ifndef __ARMEB__
vrev64.8 q9,q9
#endif
vmov d4,d3 @ Xh|Xm - 256-bit result
vmov d3,d0 @ Xm is rotated Xl
vext.8 q7,q9,q9,#8
vext.8 q3,q8,q8,#8
veor q0,q1,q10
.byte 0x8e,0x8e,0xa8,0xf2 @ pmull q4,q12,q7 @ H·Ii+1
veor q3,q3,q2 @ accumulate q3 early
vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
.byte 0x26,0x0e,0xa0,0xf2 @ pmull q0,q0,q11
veor q3,q3,q10
veor q9,q9,q7 @ Karatsuba pre-processing
veor q3,q3,q0
.byte 0x8f,0xce,0xa9,0xf2 @ pmull2 q6,q12,q7
bhs .Loop_mod2x_v8 @ there was at least 32 more bytes
veor q2,q2,q10
vext.8 q3,q8,q8,#8 @ re-construct q3
adds r3,r3,#32 @ re-construct r3
veor q0,q0,q2 @ re-construct q0
beq .Ldone_v8 @ is r3 zero?
.Lodd_tail_v8:
vext.8 q10,q0,q0,#8
veor q3,q3,q0 @ inp^=Xi
veor q9,q8,q10 @ q9 is rotated inp^Xi
.byte 0x86,0x0e,0xa8,0xf2 @ pmull q0,q12,q3 @ H.lo·Xi.lo
veor q9,q9,q3 @ Karatsuba pre-processing
.byte 0x87,0x4e,0xa9,0xf2 @ pmull2 q2,q12,q3 @ H.hi·Xi.hi
.byte 0xa2,0x2e,0xaa,0xf2 @ pmull q1,q13,q9 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
vext.8 q9,q0,q2,#8 @ Karatsuba post-processing
veor q10,q0,q2
veor q1,q1,q9
veor q1,q1,q10
.byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
vmov d4,d3 @ Xh|Xm - 256-bit result
vmov d3,d0 @ Xm is rotated Xl
veor q0,q1,q10
vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
.byte 0x26,0x0e,0xa0,0xf2 @ pmull q0,q0,q11
veor q10,q10,q2
veor q0,q0,q10
.Ldone_v8:
#ifndef __ARMEB__
vrev64.8 q0,q0
#endif
vext.8 q0,q0,q0,#8
vst1.64 {q0},[r0] @ write out Xi
vldmia sp!,{d8-d15} @ 32-bit ABI says so
bx lr
.size gcm_ghash_v8,.-gcm_ghash_v8
.asciz "GHASH for ARMv8, CRYPTOGAMS by <appro@openssl.org>"
.align 2
secure/lib/libcrypto/arm/sha1-armv4-large.S
+1457
View File
File diff suppressed because it is too large Load Diff
secure/lib/libcrypto/arm/sha256-armv4.S
+2777
View File
File diff suppressed because it is too large Load Diff
secure/lib/libcrypto/arm/sha512-armv4.S
+1777
View File
File diff suppressed because it is too large Load Diff
secure/lib/libcrypto/i386/aes-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aes-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aes-586.pl. */
#ifdef PIC
.file "aes-586.S"
.text
secure/lib/libcrypto/i386/aesni-x86.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from aesni-x86.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from aesni-x86.pl. */
#ifdef PIC
.file "aesni-x86.S"
.text
secure/lib/libcrypto/i386/bf-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from bf-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from bf-586.pl. */
#ifdef PIC
.file "bf-586.S"
.text
secure/lib/libcrypto/i386/bf-686.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from bf-686.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from bf-686.pl. */
#ifdef PIC
.file "bf-686.S"
.text
secure/lib/libcrypto/i386/bn-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from bn-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from bn-586.pl. */
#ifdef PIC
.file "bn-586.S"
.text
secure/lib/libcrypto/i386/cmll-x86.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from cmll-x86.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from cmll-x86.pl. */
#ifdef PIC
.file "cmll-x86.S"
.text
secure/lib/libcrypto/i386/co-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from co-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from co-586.pl. */
#ifdef PIC
.file "co-586.S"
.text
secure/lib/libcrypto/i386/crypt586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from crypt586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from crypt586.pl. */
#ifdef PIC
.file "crypt586.S"
.text
secure/lib/libcrypto/i386/des-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from des-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from des-586.pl. */
#ifdef PIC
.file "des-586.S"
.text
secure/lib/libcrypto/i386/ghash-x86.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from ghash-x86.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from ghash-x86.pl. */
#ifdef PIC
.file "ghash-x86.S"
.text
secure/lib/libcrypto/i386/md5-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from md5-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from md5-586.pl. */
#ifdef PIC
.file "md5-586.S"
.text
secure/lib/libcrypto/i386/rc4-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rc4-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rc4-586.pl. */
#ifdef PIC
.file "rc4-586.S"
.text
secure/lib/libcrypto/i386/rc5-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rc5-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rc5-586.pl. */
#ifdef PIC
.file "rc5-586.S"
.text
secure/lib/libcrypto/i386/rmd-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from rmd-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from rmd-586.pl. */
#ifdef PIC
.file "rmd-586.S"
.text
secure/lib/libcrypto/i386/sha1-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha1-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha1-586.pl. */
#ifdef PIC
.file "sha1-586.S"
.text
secure/lib/libcrypto/i386/sha256-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha256-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha256-586.pl. */
#ifdef PIC
.file "sha256-586.S"
.text
secure/lib/libcrypto/i386/sha512-586.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from sha512-586.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from sha512-586.pl. */
#ifdef PIC
.file "sha512-586.S"
.text
secure/lib/libcrypto/i386/vpaes-x86.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from vpaes-x86.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from vpaes-x86.pl. */
#ifdef PIC
.file "vpaes-x86.S"
.text
secure/lib/libcrypto/i386/wp-mmx.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from wp-mmx.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from wp-mmx.pl. */
#ifdef PIC
.file "wp-mmx.S"
.text
secure/lib/libcrypto/i386/x86-gf2m.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from x86-gf2m.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86-gf2m.pl. */
#ifdef PIC
.file "x86-gf2m.S"
.text
secure/lib/libcrypto/i386/x86-mont.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from x86-mont.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86-mont.pl. */
#ifdef PIC
.file "x86-mont.S"
.text
secure/lib/libcrypto/i386/x86cpuid.S
+2 -2
View File
@@ -1,5 +1,5 @@
# $FreeBSD$
# Do not modify. This file is auto-generated from x86cpuid.pl.
/* $FreeBSD$ */
/* Do not modify. This file is auto-generated from x86cpuid.pl. */
#ifdef PIC
.file "x86cpuid.S"
.text
share/i18n/esdb/Makefile.part
+2
View File
@@ -67,9 +67,11 @@ codesets: ${ESDB}
.if !defined(NO_PREPROC)
.for i in ${PART}
.if !exists(${.CURDIR}/${EPREFIX}${i:S/:/@/}.src)
${EPREFIX}${i:S/:/@/}.src: ${CODE}.src
sed ${SED_EXP:S@%%PART%%@${i}@} ${.ALLSRC} > ${.TARGET}
@echo ${.TARGET} >>.tmpfiles
.endif
.endfor
.endif
share/man/man4/alc.4
+3 -1
View File
@@ -24,7 +24,7 @@
.\"
.\" $FreeBSD$
.\"
.Dd October 8, 2014
.Dd August 22, 2016
.Dt ALC 4
.Os
.Sh NAME
@@ -122,6 +122,8 @@ Atheros AR8171 PCI Express Gigabit Ethernet controller
Atheros AR8172 PCI Express Fast Ethernet controller
.It
Killer E2200 Gigabit Ethernet controller
.It
Killer E2400 Gigabit Ethernet controller
.El
.Sh LOADER TUNABLES
Tunables can be set at the
share/man/man4/man4.i386/ep.4
-2
View File
@@ -200,8 +200,6 @@ This should never happen.
.Sh SEE ALSO
.Xr altq 4 ,
.Xr ed 4 ,
.Xr el 4 ,
.Xr ie 4 ,
.Xr intro 4 ,
.Xr ng_ether 4 ,
.Xr sn 4 ,
share/man/man4/sn.4
-1
View File
@@ -97,7 +97,6 @@ driver.
.Sh SEE ALSO
.Xr ed 4 ,
.Xr ep 4 ,
.Xr ie 4 ,
.Xr intro 4 ,
.Xr ng_ether 4 ,
.Xr vx 4 ,
share/man/man5/src.conf.5
+7 -13
View File
@@ -1,7 +1,7 @@
.\" DO NOT EDIT-- this file is automatically generated.
.\" from FreeBSD: head/tools/build/options/makeman 292283 2015-12-15 18:42:30Z bdrewery
.\" $FreeBSD$
.Dd July 28, 2016
.Dd August 23, 2016
.Dt SRC.CONF 5
.Os
.Sh NAME
@@ -479,9 +479,15 @@ When set, it also enforces the following options:
.It
.Va WITHOUT_CLANG_FULL
.It
.Va WITHOUT_DTRACE_TESTS
.It
.Va WITHOUT_GNUCXX
.It
.Va WITHOUT_GROFF
.It
.Va WITHOUT_TESTS
.It
.Va WITHOUT_TESTS_SUPPORT
.El
.It Va WITHOUT_DEBUG_FILES
.\" from FreeBSD: head/tools/build/options/WITHOUT_DEBUG_FILES 290059 2015-10-27 20:49:56Z emaste
@@ -536,10 +542,6 @@ When set, it also enforces the following options:
When set, the following options are also in effect:
.Pp
.Bl -inset -compact
.It Va WITHOUT_SYSTEM_COMPILER
(unless
.Va WITH_SYSTEM_COMPILER
is set explicitly)
.It Va WITH_AUTO_OBJ
(unless
.Va WITHOUT_AUTO_OBJ
@@ -1141,14 +1143,6 @@ to
.Pp
Currently this also enforces
.Va WITHOUT_SYSTEM_COMPILER .
When set, the following options are also in effect:
.Pp
.Bl -inset -compact
.It Va WITHOUT_SYSTEM_COMPILER
(unless
.Va WITH_SYSTEM_COMPILER
is set explicitly)
.El
.Pp
This must be set in the environment, make command line, or
.Pa /etc/src-env.conf ,
share/mk/bsd.dep.mk
+4 -3
View File
@@ -76,12 +76,13 @@ tags: ${SRCS}
_meta_filemon= 1
.endif
# Skip reading .depend when not needed to speed up tree-walks
# and simple lookups.
# Skip reading .depend when not needed to speed up tree-walks and simple
# lookups. For install, only do this if no other targets are specified.
# Also skip generating or including .depend.* files if in meta+filemon mode
# since it will track dependencies itself. OBJS_DEPEND_GUESS is still used.
.if !empty(.MAKEFLAGS:M-V${_V_READ_DEPEND}) || make(obj) || make(clean*) || \
make(install*) || make(analyze) || defined(_meta_filemon)
${.TARGETS:M*install*} == ${.TARGETS} || \
make(analyze) || defined(_meta_filemon)
_SKIP_READ_DEPEND= 1
.if ${MK_DIRDEPS_BUILD} == "no"
.MAKE.DEPENDFILE= /dev/null
share/mk/bsd.obj.mk
+1 -1
View File
@@ -102,7 +102,7 @@ obj: .PHONY
fi; \
${ECHO} "${CANONICALOBJDIR} created for ${.CURDIR}"; \
fi
.for dir in ${SRCS:H:O:u}
.for dir in ${SRCS:H:O:u} ${DPSRCS:H:O:u}
@if ! test -d ${CANONICALOBJDIR}/${dir}/; then \
mkdir -p ${CANONICALOBJDIR}/${dir}; \
if ! test -d ${CANONICALOBJDIR}/${dir}/; then \
share/mk/bsd.subdir.mk
+23 -17
View File
@@ -114,24 +114,20 @@ _SUBDIR_SH= \
cd ${.CURDIR}/$${dir}; \
${MAKE} $${target} DIRPRFX=${DIRPRFX}$${dir}/
# This is kept for compatibility only. The normal handling of attaching to
# SUBDIR_TARGETS will create a target for each directory.
_SUBDIR: .USEBEFORE
.if defined(SUBDIR) && !empty(SUBDIR) && !defined(NO_SUBDIR)
@${_+_}target=${.TARGET:realinstall=install}; \
for dir in ${SUBDIR:N.WAIT}; do ( ${_SUBDIR_SH} ); done
.endif
${SUBDIR:N.WAIT}: .PHONY .MAKE
${_+_}@target=all; \
dir=${.TARGET}; \
${_SUBDIR_SH};
# Create 'make subdir' targets to run the real 'all' target.
.for __dir in ${SUBDIR:N.WAIT}
${__dir}: all_subdir_${DIRPRFX}${__dir} .PHONY
.endfor
.for __target in ${SUBDIR_TARGETS}
# Only recurse on directly-called targets. I.e., don't recurse on dependencies
# such as 'install' becoming {before,real,after}install, just recurse
# 'install'. Despite that, 'realinstall' is special due to ordering issues
# with 'afterinstall'.
.if !defined(NO_SUBDIR) && (make(${__target}) || \
(${__target} == realinstall && make(install)))
# Can ordering be skipped for this and SUBDIR_PARALLEL forced?
.if ${STANDALONE_SUBDIR_TARGETS:M${__target}}
_is_standalone_target= 1
@@ -139,29 +135,39 @@ SUBDIR:= ${SUBDIR:N.WAIT}
.else
_is_standalone_target= 0
.endif
.if defined(SUBDIR_PARALLEL) || ${_is_standalone_target} == 1
__subdir_targets=
.for __dir in ${SUBDIR}
.if ${__dir} == .WAIT
__subdir_targets+= .WAIT
.else
__subdir_targets+= ${__target}_subdir_${DIRPRFX}${__dir}
__deps=
.if ${_is_standalone_target} == 0
.if defined(SUBDIR_PARALLEL)
# Apply SUBDIR_DEPEND dependencies for SUBDIR_PARALLEL.
.for __dep in ${SUBDIR_DEPEND_${__dir}}
__deps+= ${__target}_subdir_${DIRPRFX}${__dep}
.endfor
.endif
.else
# For non-parallel builds, directories depend on all targets before them.
__deps:= ${__subdir_targets}
.endif # defined(SUBDIR_PARALLEL)
.endif # ${_is_standalone_target} == 0
${__target}_subdir_${DIRPRFX}${__dir}: .PHONY .MAKE .SILENT ${__deps}
@${_+_}target=${__target:realinstall=install}; \
dir=${__dir}; \
${_SUBDIR_SH};
.endif
__subdir_targets+= ${__target}_subdir_${DIRPRFX}${__dir}
.endif # ${__dir} == .WAIT
.endfor # __dir in ${SUBDIR}
# Attach the subdir targets to the real target.
# Only recurse on directly-called targets. I.e., don't recurse on dependencies
# such as 'install' becoming {before,real,after}install, just recurse
# 'install'. Despite that, 'realinstall' is special due to ordering issues
# with 'afterinstall'.
.if !defined(NO_SUBDIR) && (make(${__target}) || \
(${__target} == realinstall && make(install)))
${__target}: ${__subdir_targets} .PHONY
.else
${__target}: _SUBDIR .PHONY
.endif # SUBDIR_PARALLEL || _is_standalone_target
.endif # make(${__target})
.endfor # __target in ${SUBDIR_TARGETS}
share/mk/src.opts.mk
+1 -4
View File
@@ -318,6 +318,7 @@ MK_KERBEROS:= no
MK_CLANG:= no
MK_GROFF:= no
MK_GNUCXX:= no
MK_TESTS:= no
.endif
.if ${MK_MAIL} == "no"
@@ -355,10 +356,6 @@ MK_ELFTOOLCHAIN_BOOTSTRAP:= no
MK_GCC_BOOTSTRAP:= no
.endif
.if ${MK_META_MODE} == "yes"
MK_SYSTEM_COMPILER:= no
.endif
.if ${MK_TOOLCHAIN} == "no"
MK_BINUTILS:= no
MK_CLANG:= no
sys/amd64/include/intr_machdep.h
+2 -1
View File
@@ -148,8 +148,9 @@ extern cpuset_t intr_cpus;
#endif
extern struct mtx icu_lock;
extern int elcr_found;
#ifdef SMP
extern int msix_disable_migration;
#endif
#ifndef DEV_ATPIC
void atpic_reset(void);
sys/arm/allwinner/a10_gpio.c
+2 -4
View File
@@ -57,8 +57,6 @@ __FBSDID("$FreeBSD$");
#include <dev/extres/clk/clk.h>
#include <dev/extres/hwreset/hwreset.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#if defined(__aarch64__)
#include "opt_soc.h"
#endif
@@ -602,8 +600,8 @@ aw_fdt_configure_pins(device_t dev, phandle_t cfgxref)
if (a10_gpio_get_drv(sc, pin_num) != pin_drive)
a10_gpio_set_drv(sc, pin_num, pin_drive);
if (a10_gpio_get_pud(sc, pin_num) != pin_pull &&
(pin_pull == SUN4I_PINCTRL_PULL_UP ||
pin_pull == SUN4I_PINCTRL_PULL_DOWN))
(pin_pull == A10_GPIO_PULLUP ||
pin_pull == A10_GPIO_PULLDOWN))
a10_gpio_set_pud(sc, pin_num, pin_pull);
A10_GPIO_UNLOCK(sc);
}
sys/arm/allwinner/files.allwinner
-1
View File
@@ -15,7 +15,6 @@ arm/allwinner/aw_if_dwc.c optional dwc
arm/allwinner/aw_rsb.c optional rsb
arm/allwinner/aw_rtc.c standard
arm/allwinner/aw_wdog.c standard
arm/allwinner/a20/a20_cpu_cfg.c standard
arm/allwinner/aw_machdep.c standard
arm/allwinner/aw_mp.c optional smp
arm/allwinner/axp209.c optional axp209
sys/arm/arm/elf_trampoline.c
+1 -1
View File
@@ -228,7 +228,7 @@ _startC(unsigned r0, unsigned r1, unsigned r2, unsigned r3)
"mov pc, %0\n"
: : "r" (target_addr), "r" (tmp_sp),
"r" (s_boot_params.abp_r0), "r" (s_boot_params.abp_r1),
"r" (s_boot_params.abp_r2), "r" (s_boot_params.abp_r3),
"r" (s_boot_params.abp_r2), "r" (s_boot_params.abp_r3)
: "r0", "r1", "r2", "r3");
}
sys/arm64/arm64/gic_v3.c
+2 -2
View File
@@ -408,8 +408,8 @@ arm_gic_v3_intr(void *arg)
#ifdef SMP
intr_ipi_dispatch(sgi_to_ipi[gi->gi_irq], tf);
#else
device_printf(sc->dev, "SGI %u on UP system detected\n",
active_irq - GIC_FIRST_SGI);
device_printf(sc->dev, "SGI %ju on UP system detected\n",
(uintmax_t)(active_irq - GIC_FIRST_SGI));
#endif
} else if (active_irq >= GIC_FIRST_PPI &&
active_irq <= GIC_LAST_SPI) {
sys/arm64/arm64/pmap.c
+124 -51
View File
@@ -874,6 +874,21 @@ pmap_init(void)
rw_init(&pv_list_locks[i], "pmap pv list");
}
static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
"2MB page mapping counters");
static u_long pmap_l2_demotions;
SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
&pmap_l2_demotions, 0, "2MB page demotions");
static u_long pmap_l2_p_failures;
SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
&pmap_l2_p_failures, 0, "2MB page promotion failures");
static u_long pmap_l2_promotions;
SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
&pmap_l2_promotions, 0, "2MB page promotions");
/*
* Invalidate a single TLB entry.
*/
@@ -980,6 +995,7 @@ vm_page_t
pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
{
pt_entry_t *pte, tpte;
vm_offset_t off;
vm_paddr_t pa;
vm_page_t m;
int lvl;
@@ -1001,9 +1017,21 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
tpte & ATTR_DESCR_MASK));
if (((tpte & ATTR_AP_RW_BIT) == ATTR_AP(ATTR_AP_RW)) ||
((prot & VM_PROT_WRITE) == 0)) {
if (vm_page_pa_tryrelock(pmap, tpte & ~ATTR_MASK, &pa))
switch(lvl) {
case 1:
off = va & L1_OFFSET;
break;
case 2:
off = va & L2_OFFSET;
break;
case 3:
default:
off = 0;
}
if (vm_page_pa_tryrelock(pmap,
(tpte & ~ATTR_MASK) | off, &pa))
goto retry;
m = PHYS_TO_VM_PAGE(tpte & ~ATTR_MASK);
m = PHYS_TO_VM_PAGE((tpte & ~ATTR_MASK) | off);
vm_page_hold(m);
}
}
@@ -1537,6 +1565,9 @@ pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
{
vm_pindex_t ptepindex;
pd_entry_t *pde, tpde;
#ifdef INVARIANTS
pt_entry_t *pte;
#endif
vm_page_t m;
int lvl;
@@ -1555,13 +1586,33 @@ pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
* and activate it. If we get a level 2 pde it will point to a level 3
* table.
*/
if (lvl == 2) {
switch (lvl) {
case -1:
break;
case 0:
#ifdef INVARIANTS
pte = pmap_l0_to_l1(pde, va);
KASSERT(pmap_load(pte) == 0,
("pmap_alloc_l3: TODO: l0 superpages"));
#endif
break;
case 1:
#ifdef INVARIANTS
pte = pmap_l1_to_l2(pde, va);
KASSERT(pmap_load(pte) == 0,
("pmap_alloc_l3: TODO: l1 superpages"));
#endif
break;
case 2:
tpde = pmap_load(pde);
if (tpde != 0) {
m = PHYS_TO_VM_PAGE(tpde & ~ATTR_MASK);
m->wire_count++;
return (m);
}
break;
default:
panic("pmap_alloc_l3: Invalid level %d", lvl);
}
/*
@@ -2235,7 +2286,7 @@ pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
*/
static void
pmap_update_entry(pmap_t pmap, pd_entry_t *pte, pd_entry_t newpte,
vm_offset_t va)
vm_offset_t va, vm_size_t size)
{
register_t intr;
@@ -2252,7 +2303,7 @@ pmap_update_entry(pmap_t pmap, pd_entry_t *pte, pd_entry_t newpte,
/* Clear the old mapping */
pmap_load_clear(pte);
PTE_SYNC(pte);
pmap_invalidate_page(pmap, va);
pmap_invalidate_range(pmap, va, va + size);
/* Create the new mapping */
pmap_load_store(pte, newpte);
@@ -2274,51 +2325,43 @@ pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
struct rwlock **lockp)
{
pt_entry_t *firstl3, *l3, newl2, oldl3, pa;
register_t intr;
vm_offset_t sva;
PMAP_LOCK_ASSERT(pmap, MA_OWNED);
firstl3 = (pt_entry_t *)PHYS_TO_DMAP(pmap_load(l2) & ~ATTR_MASK);
sva = va & ~L2_OFFSET;
firstl3 = pmap_l2_to_l3(l2, sva);
newl2 = pmap_load(firstl3);
/* Ignore managed pages for now */
if ((newl2 & ATTR_SW_MANAGED) != 0)
return;
/* Check the alingment is valid */
if (((newl2 & ~ATTR_MASK) & L2_OFFSET) != 0)
if (((newl2 & ~ATTR_MASK) & L2_OFFSET) != 0) {
atomic_add_long(&pmap_l2_p_failures, 1);
CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx"
" in pmap %p", va, pmap);
return;
}
pa = newl2 + L2_SIZE - PAGE_SIZE;
for (l3 = firstl3 + NL3PG - 1; l3 > firstl3; l3--) {
oldl3 = pmap_load(l3);
if (oldl3 != pa)
if (oldl3 != pa) {
atomic_add_long(&pmap_l2_p_failures, 1);
CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx"
" in pmap %p", va, pmap);
return;
}
pa -= PAGE_SIZE;
}
newl2 &= ~ATTR_DESCR_MASK;
newl2 |= L2_BLOCK;
/*
* Ensure we don't get switched out with the page table in an
* inconsistent state. We also need to ensure no interrupts fire
* as they may make use of an address we are about to invalidate.
*/
intr = intr_disable();
critical_enter();
pmap_update_entry(pmap, l2, newl2, sva, L2_SIZE);
/* Clear the old mapping */
pmap_load_clear(l2);
PTE_SYNC(l2);
pmap_invalidate_range(pmap, rounddown2(va, L2_SIZE),
roundup2(va, L2_SIZE));
/* Create the new mapping */
pmap_load_store(l2, newl2);
PTE_SYNC(l2);
critical_exit();
intr_restore(intr);
atomic_add_long(&pmap_l2_promotions, 1);
}
/*
@@ -2399,7 +2442,6 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
l3 = pmap_l2_to_l3(pde, va);
} else {
pde = pmap_pde(pmap, va, &lvl);
/*
* If we get a level 2 pde it must point to a level 3 entry
* otherwise we will need to create the intermediate tables
@@ -2542,10 +2584,11 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
*/
if (orig_l3 != 0) {
validate:
orig_l3 = pmap_load_store(l3, new_l3);
orig_l3 = pmap_load(l3);
opa = orig_l3 & ~ATTR_MASK;
if (opa != pa) {
pmap_update_entry(pmap, l3, new_l3, va, PAGE_SIZE);
if ((orig_l3 & ATTR_SW_MANAGED) != 0) {
om = PHYS_TO_VM_PAGE(opa);
if (pmap_page_dirty(orig_l3))
@@ -2555,8 +2598,11 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
pmap_pvh_free(&om->md, pmap, va);
}
} else if (pmap_page_dirty(orig_l3)) {
if ((orig_l3 & ATTR_SW_MANAGED) != 0)
} else {
pmap_load_store(l3, new_l3);
PTE_SYNC(l3);
pmap_invalidate_page(pmap, va);
if (pmap_page_dirty(orig_l3) && (orig_l3 & ATTR_SW_MANAGED) != 0)
vm_page_dirty(m);
}
} else {
@@ -2651,7 +2697,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
{
struct spglist free;
pd_entry_t *pde;
pt_entry_t *l3;
pt_entry_t *l2, *l3;
vm_paddr_t pa;
int lvl;
@@ -2686,6 +2732,12 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
* attempt to allocate a page table page. If this
* attempt fails, we don't retry. Instead, we give up.
*/
if (lvl == 1) {
l2 = pmap_l1_to_l2(pde, va);
if ((pmap_load(l2) & ATTR_DESCR_MASK) ==
L2_BLOCK)
return (NULL);
}
if (lvl == 2 && pmap_load(pde) != 0) {
mpte =
PHYS_TO_VM_PAGE(pmap_load(pde) & ~ATTR_MASK);
@@ -2743,7 +2795,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
pmap_resident_count_inc(pmap, 1);
pa = VM_PAGE_TO_PHYS(m) | ATTR_DEFAULT | ATTR_IDX(m->md.pv_memattr) |
ATTR_AP(ATTR_AP_RW) | L3_PAGE;
ATTR_AP(ATTR_AP_RO) | L3_PAGE;
/*
* Now validate mapping with RO protection
@@ -3082,14 +3134,21 @@ pmap_remove_pages(pmap_t pmap)
pde = pmap_pde(pmap, pv->pv_va, &lvl);
KASSERT(pde != NULL,
("Attempting to remove an unmapped page"));
KASSERT(lvl == 2,
("Invalid page directory level: %d", lvl));
pte = pmap_l2_to_l3(pde, pv->pv_va);
KASSERT(pte != NULL,
("Attempting to remove an unmapped page"));
tpte = pmap_load(pte);
switch(lvl) {
case 2:
pte = pmap_l2_to_l3(pde, pv->pv_va);
tpte = pmap_load(pte);
KASSERT((tpte & ATTR_DESCR_MASK) ==
L3_PAGE,
("Attempting to remove an invalid "
"page: %lx", tpte));
break;
default:
panic(
"Invalid page directory level: %d",
lvl);
}
/*
* We cannot remove wired pages from a process' mapping at this time
@@ -3123,18 +3182,27 @@ pmap_remove_pages(pmap_t pmap)
/*
* Update the vm_page_t clean/reference bits.
*/
if ((tpte & ATTR_AP_RW_BIT) == ATTR_AP(ATTR_AP_RW))
vm_page_dirty(m);
if ((tpte & ATTR_AP_RW_BIT) ==
ATTR_AP(ATTR_AP_RW)) {
switch (lvl) {
case 2:
vm_page_dirty(m);
break;
}
}
CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
/* Mark free */
pc->pc_map[field] |= bitmask;
pmap_resident_count_dec(pmap, 1);
TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
m->md.pv_gen++;
switch (lvl) {
case 2:
pmap_resident_count_dec(pmap, 1);
TAILQ_REMOVE(&m->md.pv_list, pv,
pv_next);
m->md.pv_gen++;
break;
}
pmap_unuse_l3(pmap, pv->pv_va, pmap_load(pde),
&free);
freed++;
@@ -3598,7 +3666,8 @@ pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode)
l3 &= ~ATTR_IDX_MASK;
l3 |= ATTR_IDX(mode);
pmap_update_entry(kernel_pmap, pte, l3, tmpva);
pmap_update_entry(kernel_pmap, pte, l3, tmpva,
PAGE_SIZE);
/*
* If moving to a non-cacheable entry flush
@@ -3670,7 +3739,7 @@ pmap_demote_l1(pmap_t pmap, pt_entry_t *l1, vm_offset_t va)
l1 = (pt_entry_t *)(tmpl1 + ((vm_offset_t)l1 & PAGE_MASK));
}
pmap_update_entry(pmap, l1, l2phys | L1_TABLE, va);
pmap_update_entry(pmap, l1, l2phys | L1_TABLE, va, PAGE_SIZE);
if (tmpl1 != 0) {
pmap_kremove(tmpl1);
@@ -3737,7 +3806,11 @@ pmap_demote_l2_locked(pmap_t pmap, pt_entry_t *l2, vm_offset_t va,
l2 = (pt_entry_t *)(tmpl2 + ((vm_offset_t)l2 & PAGE_MASK));
}
pmap_update_entry(pmap, l2, l3phys | L2_TABLE, va);
pmap_update_entry(pmap, l2, l3phys | L2_TABLE, va, PAGE_SIZE);
atomic_add_long(&pmap_l2_demotions, 1);
CTR3(KTR_PMAP, "pmap_demote_l2: success for va %#lx"
" in pmap %p %lx", va, pmap, l3[0]);
if (tmpl2 != 0) {
pmap_kremove(tmpl2);
sys/arm64/arm64/trap.c
+5 -2
View File
@@ -184,10 +184,13 @@ data_abort(struct trapframe *frame, uint64_t esr, uint64_t far, int lower)
map = &p->p_vmspace->vm_map;
else {
/* The top bit tells us which range to use */
if ((far >> 63) == 1)
if ((far >> 63) == 1) {
map = kernel_map;
else
} else {
map = &p->p_vmspace->vm_map;
if (map == NULL)
map = kernel_map;
}
}
if (pmap_fault(map->pmap, esr, far) == KERN_SUCCESS)
sys/boot/common/dev_net.c
+5
View File
@@ -167,8 +167,13 @@ net_open(struct open_file *f, ...)
setenv("boot.netif.ip", inet_ntoa(myip), 1);
setenv("boot.netif.netmask", intoa(netmask), 1);
setenv("boot.netif.gateway", inet_ntoa(gateip), 1);
#ifdef LOADER_TFTP_SUPPORT
setenv("boot.tftproot.server", inet_ntoa(rootip), 1);
setenv("boot.tftproot.path", rootpath, 1);
#else
setenv("boot.nfsroot.server", inet_ntoa(rootip), 1);
setenv("boot.nfsroot.path", rootpath, 1);
#endif
if (intf_mtu != 0) {
char mtu[16];
sprintf(mtu, "%u", intf_mtu);
sys/boot/efi/libefi/Makefile
+4
View File
@@ -13,6 +13,10 @@ SRCS+= time.c
SRCS+= time_event.c
.endif
.if defined(LOADER_TFTP_SUPPORT)
CFLAGS+= -DLOADER_TFTP_SUPPORT -DNETIF_OPEN_CLOSE_ONCE
.endif
# We implement a slightly non-standard %S in that it always takes a
# CHAR16 that's common in UEFI-land instead of a wchar_t. This only
# seems to matter on arm64 where wchar_t defaults to an int instead
sys/boot/efi/loader/Makefile
+4
View File
@@ -21,6 +21,10 @@ SRCS= autoload.c \
smbios.c \
vers.c
.if defined(LOADER_TFTP_SUPPORT)
CFLAGS+= -DLOADER_TFTP_SUPPORT -DNETIF_OPEN_CLOSE_ONCE
.endif
.if ${MK_ZFS} != "no"
SRCS+= zfs.c
.PATH: ${.CURDIR}/../../zfs
sys/boot/efi/loader/conf.c
+4
View File
@@ -51,7 +51,11 @@ struct fs_ops *file_system[] = {
&dosfs_fsops,
&ufs_fsops,
&cd9660_fsops,
#ifdef LOADER_TFTP_SUPPORT
&tftp_fsops,
#else
&nfs_fsops,
#endif
&gzipfs_fsops,
&bzipfs_fsops,
NULL
sys/compat/cloudabi/cloudabi_clock.c
+2 -2
View File
@@ -117,7 +117,7 @@ cloudabi_sys_clock_res_get(struct thread *td,
error = cloudabi_convert_timespec(&ts, &cts);
if (error != 0)
return (error);
td->td_retval[0] = cts;
memcpy(td->td_retval, &cts, sizeof(cts));
return (0);
}
@@ -129,6 +129,6 @@ cloudabi_sys_clock_time_get(struct thread *td,
int error;
error = cloudabi_clock_time_get(td, uap->clock_id, &ts);
td->td_retval[0] = ts;
memcpy(td->td_retval, &ts, sizeof(ts));
return (error);
}
sys/compat/cloudabi64/cloudabi64_vdso.lds.s → sys/compat/cloudabi/cloudabi_vdso.lds
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Linker script for 64-bit vDSO for CloudABI.
* Linker script for the vDSO for CloudABI.
* Based on sys/amd64/linux/linux_vdso.lds.s
*
* $FreeBSD$
sys/compat/cloudabi32/Makefile
+14
View File
@@ -0,0 +1,14 @@
# $FreeBSD$
all:
@echo "make sysent only"
sysent: cloudabi32_sysent.c cloudabi32_syscall.h cloudabi32_proto.h \
cloudabi32_syscalls.c cloudabi32_systrace_args.c
cloudabi32_sysent.c cloudabi32_syscall.h cloudabi32_proto.h \
cloudabi32_syscalls.c cloudabi32_systrace_args.c: \
../../kern/makesyscalls.sh ../../contrib/cloudabi/syscalls32.master \
syscalls.conf
sh ../../kern/makesyscalls.sh ../../contrib/cloudabi/syscalls32.master \
syscalls.conf
sys/compat/cloudabi32/cloudabi32_fd.c
+145
View File
@@ -0,0 +1,145 @@
/*-
* Copyright (c) 2015 Nuxi, https://nuxi.nl/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/limits.h>
#include <sys/malloc.h>
#include <sys/syscallsubr.h>
#include <sys/systm.h>
#include <sys/uio.h>
#include <contrib/cloudabi/cloudabi32_types.h>
#include <compat/cloudabi32/cloudabi32_proto.h>
#include <compat/cloudabi32/cloudabi32_util.h>
/* Copies in 32-bit iovec structures from userspace. */
static int
cloudabi32_copyinuio(const cloudabi32_iovec_t *iovp, size_t iovcnt,
struct uio **uiop)
{
cloudabi32_iovec_t iovobj;
struct uio *uio;
struct iovec *iov;
size_t i;
int error;
/* Allocate uio and iovecs. */
if (iovcnt > UIO_MAXIOV)
return (EINVAL);
uio = malloc(sizeof(struct uio) + iovcnt * sizeof(struct iovec),
M_IOV, M_WAITOK);
iov = (struct iovec *)(uio + 1);
/* Initialize uio. */
uio->uio_iov = iov;
uio->uio_iovcnt = iovcnt;
uio->uio_segflg = UIO_USERSPACE;
uio->uio_offset = -1;
uio->uio_resid = 0;
/* Copy in iovecs. */
for (i = 0; i < iovcnt; i++) {
error = copyin(&iovp[i], &iovobj, sizeof(iovobj));
if (error != 0) {
free(uio, M_IOV);
return (error);
}
iov[i].iov_base = TO_PTR(iovobj.iov_base);
iov[i].iov_len = iovobj.iov_len;
if (iov[i].iov_len > INT32_MAX - uio->uio_resid) {
free(uio, M_IOV);
return (EINVAL);
}
uio->uio_resid += iov[i].iov_len;
}
*uiop = uio;
return (0);
}
int
cloudabi32_sys_fd_pread(struct thread *td,
struct cloudabi32_sys_fd_pread_args *uap)
{
struct uio *uio;
int error;
error = cloudabi32_copyinuio(uap->iov, uap->iovcnt, &uio);
if (error != 0)
return (error);
error = kern_preadv(td, uap->fd, uio, uap->offset);
free(uio, M_IOV);
return (error);
}
int
cloudabi32_sys_fd_pwrite(struct thread *td,
struct cloudabi32_sys_fd_pwrite_args *uap)
{
struct uio *uio;
int error;
error = cloudabi32_copyinuio(TO_PTR(uap->iov), uap->iovcnt, &uio);
if (error != 0)
return (error);
error = kern_pwritev(td, uap->fd, uio, uap->offset);
free(uio, M_IOV);
return (error);
}
int
cloudabi32_sys_fd_read(struct thread *td,
struct cloudabi32_sys_fd_read_args *uap)
{
struct uio *uio;
int error;
error = cloudabi32_copyinuio(uap->iov, uap->iovcnt, &uio);
if (error != 0)
return (error);
error = kern_readv(td, uap->fd, uio);
free(uio, M_IOV);
return (error);
}
int
cloudabi32_sys_fd_write(struct thread *td,
struct cloudabi32_sys_fd_write_args *uap)
{
struct uio *uio;
int error;
error = cloudabi32_copyinuio(TO_PTR(uap->iov), uap->iovcnt, &uio);
if (error != 0)
return (error);
error = kern_writev(td, uap->fd, uio);
free(uio, M_IOV);
return (error);
}
sys/compat/cloudabi32/cloudabi32_module.c
+167
View File
@@ -0,0 +1,167 @@
/*-
* Copyright (c) 2015 Nuxi, https://nuxi.nl/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/imgact.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/proc.h>
#include <sys/smp.h>
#include <sys/sysctl.h>
#include <sys/sysent.h>
#include <sys/systm.h>
#include <contrib/cloudabi/cloudabi32_types.h>
#include <compat/cloudabi/cloudabi_util.h>
#include <compat/cloudabi32/cloudabi32_util.h>
extern char _binary_cloudabi32_vdso_o_start[];
extern char _binary_cloudabi32_vdso_o_end[];
register_t *
cloudabi32_copyout_strings(struct image_params *imgp)
{
struct image_args *args;
uintptr_t begin;
size_t len;
/* Copy out program arguments. */
args = imgp->args;
len = args->begin_envv - args->begin_argv;
begin = rounddown2(imgp->sysent->sv_usrstack - len, sizeof(register_t));
copyout(args->begin_argv, (void *)begin, len);
return ((register_t *)begin);
}
int
cloudabi32_fixup(register_t **stack_base, struct image_params *imgp)
{
char canarybuf[64];
Elf32_Auxargs *args;
struct thread *td;
void *argdata, *canary;
size_t argdatalen;
int error;
/*
* CloudABI executables do not store the FreeBSD OS release
* number in their header. Set the OS release number to the
* latest version of FreeBSD, so that system calls behave as if
* called natively.
*/
td = curthread;
td->td_proc->p_osrel = __FreeBSD_version;
/* Store canary for stack smashing protection. */
argdata = *stack_base;
arc4rand(canarybuf, sizeof(canarybuf), 0);
*stack_base -= howmany(sizeof(canarybuf), sizeof(register_t));
canary = *stack_base;
error = copyout(canarybuf, canary, sizeof(canarybuf));
if (error != 0)
return (error);
/*
* Compute length of program arguments. As the argument data is
* binary safe, we had to add a trailing null byte in
* exec_copyin_data_fds(). Undo this by reducing the length.
*/
args = (Elf32_Auxargs *)imgp->auxargs;
argdatalen = imgp->args->begin_envv - imgp->args->begin_argv;
if (argdatalen > 0)
--argdatalen;
/* Write out an auxiliary vector. */
cloudabi32_auxv_t auxv[] = {
#define VAL(type, val) { .a_type = (type), .a_val = (val) }
#define PTR(type, ptr) { .a_type = (type), .a_ptr = (uintptr_t)(ptr) }
PTR(CLOUDABI_AT_ARGDATA, argdata),
VAL(CLOUDABI_AT_ARGDATALEN, argdatalen),
VAL(CLOUDABI_AT_BASE, args->base),
PTR(CLOUDABI_AT_CANARY, canary),
VAL(CLOUDABI_AT_CANARYLEN, sizeof(canarybuf)),
VAL(CLOUDABI_AT_NCPUS, mp_ncpus),
VAL(CLOUDABI_AT_PAGESZ, args->pagesz),
PTR(CLOUDABI_AT_PHDR, args->phdr),
VAL(CLOUDABI_AT_PHNUM, args->phnum),
VAL(CLOUDABI_AT_TID, td->td_tid),
PTR(CLOUDABI_AT_SYSINFO_EHDR,
imgp->proc->p_sysent->sv_shared_page_base),
#undef VAL
#undef PTR
{ .a_type = CLOUDABI_AT_NULL },
};
*stack_base -= howmany(sizeof(auxv), sizeof(register_t));
error = copyout(auxv, *stack_base, sizeof(auxv));
if (error != 0)
return (error);
/* Reserve space for storing the TCB. */
*stack_base -= howmany(sizeof(cloudabi32_tcb_t), sizeof(register_t));
return (0);
}
static int
cloudabi32_modevent(module_t mod, int type, void *data)
{
switch (type) {
case MOD_LOAD:
cloudabi_vdso_init(cloudabi32_brand.sysvec,
_binary_cloudabi32_vdso_o_start,
_binary_cloudabi32_vdso_o_end);
if (elf32_insert_brand_entry(&cloudabi32_brand) < 0) {
printf("Failed to add CloudABI ELF brand handler\n");
return (EINVAL);
}
return (0);
case MOD_UNLOAD:
if (elf32_brand_inuse(&cloudabi32_brand))
return (EBUSY);
if (elf32_remove_brand_entry(&cloudabi32_brand) < 0) {
printf("Failed to remove CloudABI ELF brand handler\n");
return (EINVAL);
}
cloudabi_vdso_destroy(cloudabi32_brand.sysvec);
return (0);
default:
return (EOPNOTSUPP);
}
}
static moduledata_t cloudabi32_module = {
"cloudabi32",
cloudabi32_modevent,
NULL
};
DECLARE_MODULE_TIED(cloudabi32, cloudabi32_module, SI_SUB_EXEC, SI_ORDER_ANY);
MODULE_DEPEND(cloudabi32, cloudabi, 1, 1, 1);
FEATURE(cloudabi32, "CloudABI 32bit support");
sys/compat/cloudabi32/cloudabi32_poll.c
+408
View File
@@ -0,0 +1,408 @@
/*-
* Copyright (c) 2015 Nuxi, https://nuxi.nl/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/proc.h>
#include <sys/syscallsubr.h>
#include <contrib/cloudabi/cloudabi32_types.h>
#include <compat/cloudabi/cloudabi_util.h>
#include <compat/cloudabi32/cloudabi32_proto.h>
#include <compat/cloudabi32/cloudabi32_util.h>
/* Converts a FreeBSD signal number to a CloudABI signal number. */
static cloudabi_signal_t
convert_signal(int sig)
{
static const cloudabi_signal_t signals[] = {
[SIGABRT] = CLOUDABI_SIGABRT,
[SIGALRM] = CLOUDABI_SIGALRM,
[SIGBUS] = CLOUDABI_SIGBUS,
[SIGCHLD] = CLOUDABI_SIGCHLD,
[SIGCONT] = CLOUDABI_SIGCONT,
[SIGFPE] = CLOUDABI_SIGFPE,
[SIGHUP] = CLOUDABI_SIGHUP,
[SIGILL] = CLOUDABI_SIGILL,
[SIGINT] = CLOUDABI_SIGINT,
[SIGKILL] = CLOUDABI_SIGKILL,
[SIGPIPE] = CLOUDABI_SIGPIPE,
[SIGQUIT] = CLOUDABI_SIGQUIT,
[SIGSEGV] = CLOUDABI_SIGSEGV,
[SIGSTOP] = CLOUDABI_SIGSTOP,
[SIGSYS] = CLOUDABI_SIGSYS,
[SIGTERM] = CLOUDABI_SIGTERM,
[SIGTRAP] = CLOUDABI_SIGTRAP,
[SIGTSTP] = CLOUDABI_SIGTSTP,
[SIGTTIN] = CLOUDABI_SIGTTIN,
[SIGTTOU] = CLOUDABI_SIGTTOU,
[SIGURG] = CLOUDABI_SIGURG,
[SIGUSR1] = CLOUDABI_SIGUSR1,
[SIGUSR2] = CLOUDABI_SIGUSR2,
[SIGVTALRM] = CLOUDABI_SIGVTALRM,
[SIGXCPU] = CLOUDABI_SIGXCPU,
[SIGXFSZ] = CLOUDABI_SIGXFSZ,
};
/* Convert unknown signals to SIGABRT. */
if (sig < 0 || sig >= nitems(signals) || signals[sig] == 0)
return (SIGABRT);
return (signals[sig]);
}
struct cloudabi32_kevent_args {
const cloudabi32_subscription_t *in;
cloudabi32_event_t *out;
bool once;
};
/* Converts CloudABI's subscription objects to FreeBSD's struct kevent. */
static int
cloudabi32_kevent_copyin(void *arg, struct kevent *kevp, int count)
{
cloudabi32_subscription_t sub;
struct cloudabi32_kevent_args *args;
cloudabi_timestamp_t ts;
int error;
args = arg;
while (count-- > 0) {
/* TODO(ed): Copy in multiple entries at once. */
error = copyin(args->in++, &sub, sizeof(sub));
if (error != 0)
return (error);
memset(kevp, 0, sizeof(*kevp));
kevp->udata = TO_PTR(sub.userdata);
switch (sub.type) {
case CLOUDABI_EVENTTYPE_CLOCK:
kevp->filter = EVFILT_TIMER;
kevp->ident = sub.clock.identifier;
kevp->fflags = NOTE_NSECONDS;
if ((sub.clock.flags &
CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0 &&
sub.clock.timeout > 0) {
/* Convert absolute timestamp to a relative. */
error = cloudabi_clock_time_get(curthread,
sub.clock.clock_id, &ts);
if (error != 0)
return (error);
ts = ts > sub.clock.timeout ? 0 :
sub.clock.timeout - ts;
} else {
/* Relative timestamp. */
ts = sub.clock.timeout;
}
kevp->data = ts > INTPTR_MAX ? INTPTR_MAX : ts;
break;
case CLOUDABI_EVENTTYPE_FD_READ:
kevp->filter = EVFILT_READ;
kevp->ident = sub.fd_readwrite.fd;
if ((sub.fd_readwrite.flags &
CLOUDABI_SUBSCRIPTION_FD_READWRITE_POLL) != 0)
kevp->fflags = NOTE_FILE_POLL;
break;
case CLOUDABI_EVENTTYPE_FD_WRITE:
kevp->filter = EVFILT_WRITE;
kevp->ident = sub.fd_readwrite.fd;
break;
case CLOUDABI_EVENTTYPE_PROC_TERMINATE:
kevp->filter = EVFILT_PROCDESC;
kevp->ident = sub.proc_terminate.fd;
kevp->fflags = NOTE_EXIT;
break;
}
if (args->once) {
/* Ignore flags. Simply use oneshot mode. */
kevp->flags = EV_ADD | EV_ONESHOT;
} else {
/* Translate flags. */
if ((sub.flags & CLOUDABI_SUBSCRIPTION_ADD) != 0)
kevp->flags |= EV_ADD;
if ((sub.flags & CLOUDABI_SUBSCRIPTION_CLEAR) != 0)
kevp->flags |= EV_CLEAR;
if ((sub.flags & CLOUDABI_SUBSCRIPTION_DELETE) != 0)
kevp->flags |= EV_DELETE;
if ((sub.flags & CLOUDABI_SUBSCRIPTION_DISABLE) != 0)
kevp->flags |= EV_DISABLE;
if ((sub.flags & CLOUDABI_SUBSCRIPTION_ENABLE) != 0)
kevp->flags |= EV_ENABLE;
if ((sub.flags & CLOUDABI_SUBSCRIPTION_ONESHOT) != 0)
kevp->flags |= EV_ONESHOT;
}
++kevp;
}
return (0);
}
/* Converts FreeBSD's struct kevent to CloudABI's event objects. */
static int
cloudabi32_kevent_copyout(void *arg, struct kevent *kevp, int count)
{
cloudabi32_event_t ev;
struct cloudabi32_kevent_args *args;
int error;
args = arg;
while (count-- > 0) {
/* Convert fields that should always be present. */
memset(&ev, 0, sizeof(ev));
ev.userdata = (uintptr_t)kevp->udata;
switch (kevp->filter) {
case EVFILT_TIMER:
ev.type = CLOUDABI_EVENTTYPE_CLOCK;
ev.clock.identifier = kevp->ident;
break;
case EVFILT_READ:
ev.type = CLOUDABI_EVENTTYPE_FD_READ;
ev.fd_readwrite.fd = kevp->ident;
break;
case EVFILT_WRITE:
ev.type = CLOUDABI_EVENTTYPE_FD_WRITE;
ev.fd_readwrite.fd = kevp->ident;
break;
case EVFILT_PROCDESC:
ev.type = CLOUDABI_EVENTTYPE_PROC_TERMINATE;
ev.proc_terminate.fd = kevp->ident;
break;
}
if ((kevp->flags & EV_ERROR) == 0) {
/* Success. */
switch (kevp->filter) {
case EVFILT_READ:
case EVFILT_WRITE:
ev.fd_readwrite.nbytes = kevp->data;
if ((kevp->flags & EV_EOF) != 0) {
ev.fd_readwrite.flags |=
CLOUDABI_EVENT_FD_READWRITE_HANGUP;
}
break;
case EVFILT_PROCDESC:
if (WIFSIGNALED(kevp->data)) {
/* Process got signalled. */
ev.proc_terminate.signal =
convert_signal(WTERMSIG(kevp->data));
ev.proc_terminate.exitcode = 0;
} else {
/* Process exited. */
ev.proc_terminate.signal = 0;
ev.proc_terminate.exitcode =
WEXITSTATUS(kevp->data);
}
break;
}
} else {
/* Error. */
ev.error = cloudabi_convert_errno(kevp->data);
}
++kevp;
/* TODO(ed): Copy out multiple entries at once. */
error = copyout(&ev, args->out++, sizeof(ev));
if (error != 0)
return (error);
}
return (0);
}
int
cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
{
struct cloudabi32_kevent_args args = {
.in = uap->in,
.out = uap->out,
.once = true,
};
struct kevent_copyops copyops = {
.k_copyin = cloudabi32_kevent_copyin,
.k_copyout = cloudabi32_kevent_copyout,
.arg = &args,
};
/*
* Bandaid to support CloudABI futex constructs that are not
* implemented through FreeBSD's kqueue().
*/
if (uap->nsubscriptions == 1) {
cloudabi32_subscription_t sub;
cloudabi32_event_t ev = {};
int error;
error = copyin(uap->in, &sub, sizeof(sub));
if (error != 0)
return (error);
ev.userdata = sub.userdata;
ev.type = sub.type;
if (sub.type == CLOUDABI_EVENTTYPE_CONDVAR) {
/* Wait on a condition variable. */
ev.condvar.condvar = sub.condvar.condvar;
ev.error = cloudabi_convert_errno(
cloudabi_futex_condvar_wait(
td, TO_PTR(sub.condvar.condvar),
sub.condvar.condvar_scope,
TO_PTR(sub.condvar.lock),
sub.condvar.lock_scope,
CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0));
td->td_retval[0] = 1;
return (copyout(&ev, uap->out, sizeof(ev)));
} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK) {
/* Acquire a read lock. */
ev.lock.lock = sub.lock.lock;
ev.error = cloudabi_convert_errno(
cloudabi_futex_lock_rdlock(
td, TO_PTR(sub.lock.lock),
sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
UINT64_MAX, 0));
td->td_retval[0] = 1;
return (copyout(&ev, uap->out, sizeof(ev)));
} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK) {
/* Acquire a write lock. */
ev.lock.lock = sub.lock.lock;
ev.error = cloudabi_convert_errno(
cloudabi_futex_lock_wrlock(
td, TO_PTR(sub.lock.lock),
sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
UINT64_MAX, 0));
td->td_retval[0] = 1;
return (copyout(&ev, uap->out, sizeof(ev)));
}
} else if (uap->nsubscriptions == 2) {
cloudabi32_subscription_t sub[2];
cloudabi32_event_t ev[2] = {};
int error;
error = copyin(uap->in, &sub, sizeof(sub));
if (error != 0)
return (error);
ev[0].userdata = sub[0].userdata;
ev[0].type = sub[0].type;
ev[1].userdata = sub[1].userdata;
ev[1].type = sub[1].type;
if (sub[0].type == CLOUDABI_EVENTTYPE_CONDVAR &&
sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
/* Wait for a condition variable with timeout. */
ev[0].condvar.condvar = sub[0].condvar.condvar;
ev[1].clock.identifier = sub[1].clock.identifier;
error = cloudabi_futex_condvar_wait(
td, TO_PTR(sub[0].condvar.condvar),
sub[0].condvar.condvar_scope,
TO_PTR(sub[0].condvar.lock),
sub[0].condvar.lock_scope, sub[1].clock.clock_id,
sub[1].clock.timeout, sub[1].clock.precision);
if (error == ETIMEDOUT) {
td->td_retval[0] = 1;
return (copyout(&ev[1], uap->out,
sizeof(ev[1])));
}
ev[0].error = cloudabi_convert_errno(error);
td->td_retval[0] = 1;
return (copyout(&ev[0], uap->out, sizeof(ev[0])));
} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK &&
sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
/* Acquire a read lock with a timeout. */
ev[0].lock.lock = sub[0].lock.lock;
ev[1].clock.identifier = sub[1].clock.identifier;
error = cloudabi_futex_lock_rdlock(
td, TO_PTR(sub[0].lock.lock),
sub[0].lock.lock_scope, sub[1].clock.clock_id,
sub[1].clock.timeout, sub[1].clock.precision);
if (error == ETIMEDOUT) {
td->td_retval[0] = 1;
return (copyout(&ev[1], uap->out,
sizeof(ev[1])));
}
ev[0].error = cloudabi_convert_errno(error);
td->td_retval[0] = 1;
return (copyout(&ev[0], uap->out, sizeof(ev[0])));
} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK &&
sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
/* Acquire a write lock with a timeout. */
ev[0].lock.lock = sub[0].lock.lock;
ev[1].clock.identifier = sub[1].clock.identifier;
error = cloudabi_futex_lock_wrlock(
td, TO_PTR(sub[0].lock.lock),
sub[0].lock.lock_scope, sub[1].clock.clock_id,
sub[1].clock.timeout, sub[1].clock.precision);
if (error == ETIMEDOUT) {
td->td_retval[0] = 1;
return (copyout(&ev[1], uap->out,
sizeof(ev[1])));
}
ev[0].error = cloudabi_convert_errno(error);
td->td_retval[0] = 1;
return (copyout(&ev[0], uap->out, sizeof(ev[0])));
}
}
return (kern_kevent_anonymous(td, uap->nsubscriptions, &copyops));
}
int
cloudabi32_sys_poll_fd(struct thread *td,
struct cloudabi32_sys_poll_fd_args *uap)
{
struct cloudabi32_kevent_args args = {
.in = uap->in,
.out = uap->out,
.once = false,
};
struct kevent_copyops copyops = {
.k_copyin = cloudabi32_kevent_copyin,
.k_copyout = cloudabi32_kevent_copyout,
.arg = &args,
};
cloudabi32_subscription_t subtimo;
struct timespec timeout;
int error;
if (uap->timeout != NULL) {
/* Poll with a timeout. */
error = copyin(uap->timeout, &subtimo, sizeof(subtimo));
if (error != 0)
return (error);
if (subtimo.type != CLOUDABI_EVENTTYPE_CLOCK ||
subtimo.clock.flags != 0)
return (EINVAL);
timeout.tv_sec = subtimo.clock.timeout / 1000000000;
timeout.tv_nsec = subtimo.clock.timeout % 1000000000;
return (kern_kevent(td, uap->fd, uap->nin, uap->nout, &copyops,
&timeout));
} else {
/* Poll without a timeout. */
return (kern_kevent(td, uap->fd, uap->nin, uap->nout, &copyops,
NULL));
}
}

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