puc: Add support for Systembase SB16C1054, SB16C1058.

The Systembase SB16C1054 and SB16C1058 are PCI quad- and octal-UART
complexes, based on multiple Systembase SB16C1050 cores, which appear to
be compatible with the NS8250 family (except for the "enable interrupts"
bit in the other BAR).

The SB16C105x family are one of two families of PCIe UART complexes on
cards by StarTech.com, such as the PEX4S1050 and PEX8S1050. (Other
StarTech.com serial offerings use the ASIX AX99100 or ASIX MCS990x.)

This is derived from the NetBSD driver.

Reviewed by:    imp
Tested by:      Jashank Jeremy <jashank@rulingia.com.au>
Obtained from:  Jashank Jeremy <jashank@rulingia.com.au>
MFC after:      1 week
Differential Revision:  <https://reviews.freebsd.org/D52150

share/man/man4/puc.4

@@ -257,6 +257,8 @@ Sunix SER5xxxx 8/4/2 port serial
 .It
 Syba Tech Ltd PCI-4S2P-550-ECP
 .It
+Systembase SB16C1054/8 4/8 port serial
+.It
 Titan PCI-800H/PCI-200H
 .It
 VScom:

sys/dev/puc/pucdata.c

@@ -64,6 +64,7 @@ static puc_config_f puc_config_quatech;
 static puc_config_f puc_config_syba;
 static puc_config_f puc_config_siig;
 static puc_config_f puc_config_sunix;
+static puc_config_f puc_config_systembase;
 static puc_config_f puc_config_timedia;
 static puc_config_f puc_config_titan;
 
@@ -1705,6 +1706,23 @@ const struct puc_cfg puc_pci_devices[] = {
 	    PUC_PORT_4S, 0x10, 0, 8,
 	    .config_function = puc_config_icbook
 	},
+
+	/*
+	 * Systembase cards using SB16C1050 UARTs:
+	 */
+	{   0x14a1, 0x0008, 0x14a1, 0x0008,
+	    "Systembase SB16C1058",
+	    DEFAULT_RCLK * 8,
+	    PUC_PORT_8S, 0x10, 0, 8,
+	    .config_function = puc_config_systembase,
+	},
+	{   0x14a1, 0x0004, 0x14a1, 0x0004,
+	    "Systembase SB16C1054",
+	    DEFAULT_RCLK * 8,
+	    PUC_PORT_4S, 0x10, 0, 8,
+	    .config_function = puc_config_systembase,
+	},
+
 	{ 0xffff, 0, 0xffff, 0, NULL, 0 }
 };
 
@@ -2294,3 +2312,28 @@ puc_config_titan(struct puc_softc *sc __unused, enum puc_cfg_cmd cmd,
 	}
 	return (ENXIO);
 }
+
+static int
+puc_config_systembase(struct puc_softc *sc __unused,
+		      enum puc_cfg_cmd cmd, int port, intptr_t *res)
+{
+	struct puc_bar *bar;
+
+	switch (cmd) {
+	case PUC_CFG_SETUP:
+		bar = puc_get_bar(sc, 0x14);
+		if (bar == NULL)
+			return (ENXIO);
+
+		/*
+		 * The Systembase SB16C1058 (and probably other devices
+		 * based on the SB16C1050 UART core) require poking a
+		 * register in the *other* RID to turn on interrupts.
+		 */
+		bus_write_1(bar->b_res, /* OPT_IMRREG0 */ 0xc, 0xff);
+		return (0);
+	default:
+		break;
+	}
+	return (ENXIO);
+}

sys/dev/uart/uart_bus_pci.c

@@ -141,6 +141,8 @@ static const struct pci_id pci_ns8250_ids[] = {
 	0x10, 16384000 },
 { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
 	0x10 },
+{ 0x14a1, 0x0008, 0x14a1, 0x0008, "Systembase SB16C1058",
+	0x10, 8 * DEFAULT_RCLK, },
 { 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10,
 	128 * DEFAULT_RCLK, 2},
 { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},