Merge from head

Makefile.inc1

@@ -333,6 +333,19 @@ LOCALBASE?=	/usr/local
 CROSS_COMPILER_PREFIX?=${CROSS_TOOLCHAIN_PREFIX}
 CROSS_BINUTILS_PREFIX?=${CROSS_TOOLCHAIN_PREFIX}
 .endif
+
+# If we do not have a bootstrap binutils (because the in-tree one does not
+# support the target architecture), provide a default cross-binutils prefix.
+# This allows aarch64 builds, for example, to automatically use the
+# aarch64-binutils port or package.
+.if !empty(BROKEN_OPTIONS:MBINUTILS_BOOTSTRAP) && \
+    !defined(CROSS_BINUTILS_PREFIX)
+CROSS_BINUTILS_PREFIX=/usr/local/${TARGET_ARCH}-freebsd/bin/
+.if !exists(${CROSS_BINUTILS_PREFIX})
+.error In-tree binutils does not support the ${TARGET_ARCH} architecture. Install the ${TARGET_ARCH}-binutils port or package or set CROSS_BINUTILS_PREFIX.
+.endif
+.endif
+
 XCOMPILERS=	CC CXX CPP
 .for COMPILER in ${XCOMPILERS}
 .if defined(CROSS_COMPILER_PREFIX)
@@ -1599,7 +1612,6 @@ cross-tools: .MAKE
     ${_binutils} \
     ${_elftctools} \
     ${_cc} \
-    usr.bin/xlint/lint1 usr.bin/xlint/lint2 usr.bin/xlint/xlint \
     ${_btxld} \
     ${_crunchide} \
     ${_kgzip} \

UPDATING

@@ -31,6 +31,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 11.x IS SLOW:
 	disable the most expensive debugging functionality run
 	"ln -s 'abort:false,junk:false' /etc/malloc.conf".)
 
+20150307:
+	The 32-bit PowerPC kernel has been changed to a position-independent
+	executable. This can only be booted with a version of loader(8)
+	newer than January 31, 2015, so make sure to update both world and
+	kernel before rebooting.
+
 20150217:
 	If you are running a -CURRENT kernel since r273872 (Oct 30th, 2014),
 	but before r278950, the RNG was not seeded properly.  Immediately

bin/rcp/Makefile

@@ -7,6 +7,5 @@ CFLAGS+=-DBINDIR=${BINDIR}
 
 BINOWN=	root
 BINMODE=4555
-PRECIOUSPROG=
 
 .include <bsd.prog.mk>

cddl/contrib/dtracetoolkit/Proc/pidpersec.d

@@ -41,7 +41,7 @@
 
 dtrace:::BEGIN
 {
-	printf("%-22s %8s %6s\n", "TIME", "LASTPID", "PID/s");
+	printf("%-22s %6s\n", "TIME", "PID/s");
 	pids = 0;
 }
 
@@ -52,6 +52,6 @@ proc:::exec-success
 
 profile:::tick-1sec
 {
-	printf("%-22Y %8d %6d\n", walltimestamp, `mpid, pids);
+	printf("%-22Y %6d\n", walltimestamp, pids);
 	pids = 0;
 }

cddl/contrib/opensolaris/common/ctf/ctf_create.c

@@ -583,10 +583,10 @@ ctf_discard(ctf_file_t *fp)
 		return (0); /* no update required */
 
 	for (dtd = ctf_list_prev(&fp->ctf_dtdefs); dtd != NULL; dtd = ntd) {
-		if (dtd->dtd_type <= fp->ctf_dtoldid)
+		ntd = ctf_list_prev(dtd);
+		if (CTF_TYPE_TO_INDEX(dtd->dtd_type) <= fp->ctf_dtoldid)
 			continue; /* skip types that have been committed */
 
-		ntd = ctf_list_prev(dtd);
 		ctf_dtd_delete(fp, dtd);
 	}
 
@@ -1313,10 +1313,13 @@ ctf_add_type(ctf_file_t *dst_fp, ctf_file_t *src_fp, ctf_id_t src_type)
 	 * unless dst_type is a forward declaration and src_type is a struct,
 	 * union, or enum (i.e. the definition of the previous forward decl).
 	 */
-	if (dst_type != CTF_ERR && dst_kind != kind && (
+	if (dst_type != CTF_ERR && dst_kind != kind) {
-	    dst_kind != CTF_K_FORWARD || (kind != CTF_K_ENUM &&
+		if (dst_kind != CTF_K_FORWARD || (kind != CTF_K_ENUM &&
-	    kind != CTF_K_STRUCT && kind != CTF_K_UNION)))
+		    kind != CTF_K_STRUCT && kind != CTF_K_UNION))
 			return (ctf_set_errno(dst_fp, ECTF_CONFLICT));
+		else
+			dst_type = CTF_ERR;
+	}
 
 	/*
 	 * If the non-empty name was not found in the appropriate hash, search
@@ -1328,7 +1331,7 @@ ctf_add_type(ctf_file_t *dst_fp, ctf_file_t *src_fp, ctf_id_t src_type)
 	 */
 	if (dst_type == CTF_ERR && name[0] != '\0') {
 		for (dtd = ctf_list_prev(&dst_fp->ctf_dtdefs); dtd != NULL &&
-		    dtd->dtd_type > dst_fp->ctf_dtoldid;
+		    CTF_TYPE_TO_INDEX(dtd->dtd_type) > dst_fp->ctf_dtoldid;
 		    dtd = ctf_list_prev(dtd)) {
 			if (CTF_INFO_KIND(dtd->dtd_data.ctt_info) == kind &&
 			    dtd->dtd_name != NULL &&

cddl/contrib/opensolaris/tools/ctf/cvt/output.c

@@ -23,8 +23,6 @@
  * Use is subject to license terms.
  */
 
-#pragma ident	"%Z%%M%	%I%	%E% SMI"
-
 /*
  * Routines for preparing tdata trees for conversion into CTF data, and
  * for placing the resulting data into an output file.

contrib/bmake/meta.c

@@ -169,7 +169,7 @@ filemon_read(FILE *mfp, int fd)
     if ((fp = fdopen(fd, "r")) == NULL)
 	err(1, "Could not read build monitor file '%d'", fd);
 
-    fprintf(mfp, "-- filemon acquired metadata --\n");
+    fprintf(mfp, "\n-- filemon acquired metadata --\n");
 
     while (fgets(buf, sizeof(buf), fp)) {
 	fprintf(mfp, "%s", buf);

contrib/compiler-rt/lib/builtins/fixdfdi.c

@@ -6,40 +6,17 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixdfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define DOUBLE_PRECISION
-
+#include "fp_lib.h"
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *            su_int is a 32 bit integral type
- *            value in double is representable in di_int (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
-
 ARM_EABI_FNALIAS(d2lz, fixdfdi)
 
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
 COMPILER_RT_ABI di_int
-__fixdfdi(double a)
+__fixdfdi(fp_t a) {
-{
+    return __fixint(a);
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0)
-        return 0;
-    di_int s = (si_int)(fb.u.s.high & 0x80000000) >> 31;
-    dwords r;
-    r.s.high = (fb.u.s.high & 0x000FFFFF) | 0x00100000;
-    r.s.low = fb.u.s.low;
-    if (e > 52)
-        r.all <<= (e - 52);
-    else
-        r.all >>= (52 - e);
-    return (r.all ^ s) - s;
 }

contrib/compiler-rt/lib/builtins/fixdfsi.c

@@ -1,50 +1,22 @@
-//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
+/* ===-- fixdfsi.c - Implement __fixdfsi -----------------------------------===
-//
+ *
-//                     The LLVM Compiler Infrastructure
+ *                     The LLVM Compiler Infrastructure
-//
+ *
-// This file is dual licensed under the MIT and the University of Illinois Open
+ * This file is dual licensed under the MIT and the University of Illinois Open
-// Source Licenses. See LICENSE.TXT for details.
+ * Source Licenses. See LICENSE.TXT for details.
-//
+ *
-//===----------------------------------------------------------------------===//
+ * ===----------------------------------------------------------------------===
-//
+ */
-// This file implements double-precision to integer conversion for the
-// compiler-rt library.  No range checking is performed; the behavior of this
-// conversion is undefined for out of range values in the C standard.
-//
-//===----------------------------------------------------------------------===//
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
-
+typedef si_int fixint_t;
-#include "int_lib.h"
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 ARM_EABI_FNALIAS(d2iz, fixdfsi)
 
-COMPILER_RT_ABI int
+COMPILER_RT_ABI si_int
 __fixdfsi(fp_t a) {
-    
+    return __fixint(a);
-    // Break a into sign, exponent, significand
-    const rep_t aRep = toRep(a);
-    const rep_t aAbs = aRep & absMask;
-    const int sign = aRep & signBit ? -1 : 1;
-    const int exponent = (aAbs >> significandBits) - exponentBias;
-    const rep_t significand = (aAbs & significandMask) | implicitBit;
-    
-    // If 0 < exponent < significandBits, right shift to get the result.
-    if ((unsigned int)exponent < significandBits) {
-        return sign * (significand >> (significandBits - exponent));
-    }
-    
-    // If exponent is negative, the result is zero.
-    else if (exponent < 0) {
-        return 0;
-    }
-    
-    // If significandBits < exponent, left shift to get the result.  This shift
-    // may end up being larger than the type width, which incurs undefined
-    // behavior, but the conversion itself is undefined in that case, so
-    // whatever the compiler decides to do is fine.
-    else {
-        return sign * (significand << (exponent - significandBits));
-    }
 }

contrib/compiler-rt/lib/builtins/fixdfti.c

@@ -6,40 +6,21 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixdfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
 
-/* Returns: convert a to a signed long long, rounding toward zero. */
+typedef ti_int fixint_t;
-
+typedef tu_int fixuint_t;
-/* Assumption: double is a IEEE 64 bit floating point type 
+#include "fp_fixint_impl.inc"
- *             su_int is a 32 bit integral type
- *             value in double is representable in ti_int (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
 
 COMPILER_RT_ABI ti_int
-__fixdfti(double a)
+__fixdfti(fp_t a) {
-{
+    return __fixint(a);
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0)
-        return 0;
-    ti_int s = (si_int)(fb.u.s.high & 0x80000000) >> 31;
-    ti_int r = 0x0010000000000000uLL | (0x000FFFFFFFFFFFFFuLL & fb.u.all);
-    if (e > 52)
-        r <<= (e - 52);
-    else
-        r >>= (52 - e);
-    return (r ^ s) - s;
 }
 
 #endif /* CRT_HAS_128BIT */

contrib/compiler-rt/lib/builtins/fixsfdi.c

@@ -6,38 +6,18 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixsfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define SINGLE_PRECISION
-
+#include "fp_lib.h"
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in float is representable in di_int (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
 
 ARM_EABI_FNALIAS(f2lz, fixsfdi)
 
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
 COMPILER_RT_ABI di_int
-__fixsfdi(float a)
+__fixsfdi(fp_t a) {
-{
+    return __fixint(a);
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0)
-        return 0;
-    di_int s = (si_int)(fb.u & 0x80000000) >> 31;
-    di_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return (r ^ s) - s;
 }

contrib/compiler-rt/lib/builtins/fixsfsi.c

@@ -1,47 +1,22 @@
-//===-- lib/fixsfsi.c - Single-precision -> integer conversion ----*- C -*-===//
+/* ===-- fixsfsi.c - Implement __fixsfsi -----------------------------------===
-//
+ *
-//                     The LLVM Compiler Infrastructure
+ *                     The LLVM Compiler Infrastructure
-//
+ *
-// This file is dual licensed under the MIT and the University of Illinois Open
+ * This file is dual licensed under the MIT and the University of Illinois Open
-// Source Licenses. See LICENSE.TXT for details.
+ * Source Licenses. See LICENSE.TXT for details.
-//
+ *
-//===----------------------------------------------------------------------===//
+ * ===----------------------------------------------------------------------===
-//
+ */
-// This file implements single-precision to integer conversion for the
-// compiler-rt library.  No range checking is performed; the behavior of this
-// conversion is undefined for out of range values in the C standard.
-//
-//===----------------------------------------------------------------------===//
 
 #define SINGLE_PRECISION
 #include "fp_lib.h"
+typedef si_int fixint_t;
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 ARM_EABI_FNALIAS(f2iz, fixsfsi)
 
-COMPILER_RT_ABI int
+COMPILER_RT_ABI si_int
 __fixsfsi(fp_t a) {
-    // Break a into sign, exponent, significand
+    return __fixint(a);
-    const rep_t aRep = toRep(a);
-    const rep_t aAbs = aRep & absMask;
-    const int sign = aRep & signBit ? -1 : 1;
-    const int exponent = (aAbs >> significandBits) - exponentBias;
-    const rep_t significand = (aAbs & significandMask) | implicitBit;
-    
-    // If 0 < exponent < significandBits, right shift to get the result.
-    if ((unsigned int)exponent < significandBits) {
-        return sign * (significand >> (significandBits - exponent));
-    }
-    
-    // If exponent is negative, the result is zero.
-    else if (exponent < 0) {
-        return 0;
-    }
-    
-    // If significandBits < exponent, left shift to get the result.  This shift
-    // may end up being larger than the type width, which incurs undefined
-    // behavior, but the conversion itself is undefined in that case, so
-    // whatever the compiler decides to do is fine.
-    else {
-        return sign * (significand << (exponent - significandBits));
-    }
 }

contrib/compiler-rt/lib/builtins/fixsfti.c

@@ -6,40 +6,21 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixsfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
+#define SINGLE_PRECISION
+#include "fp_lib.h"
 
-/* Returns: convert a to a signed long long, rounding toward zero. */
+typedef ti_int fixint_t;
-
+typedef tu_int fixuint_t;
-/* Assumption: float is a IEEE 32 bit floating point type 
+#include "fp_fixint_impl.inc"
- *             su_int is a 32 bit integral type
- *             value in float is representable in ti_int (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
 
 COMPILER_RT_ABI ti_int
-__fixsfti(float a)
+__fixsfti(fp_t a) {
-{
+    return __fixint(a);
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0)
-        return 0;
-    ti_int s = (si_int)(fb.u & 0x80000000) >> 31;
-    ti_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return (r ^ s) - s;
 }
 
 #endif /* CRT_HAS_128BIT */

contrib/compiler-rt/lib/builtins/fixtfdi.c

@@ -0,0 +1,23 @@
+/* ===-- fixtfdi.c - Implement __fixtfdi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI di_int
+__fixtfdi(fp_t a) {
+    return __fixint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixtfsi.c

@@ -0,0 +1,23 @@
+/* ===-- fixtfsi.c - Implement __fixtfsi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef si_int fixint_t;
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI si_int
+__fixtfsi(fp_t a) {
+    return __fixint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixtfti.c

@@ -0,0 +1,23 @@
+/* ===-- fixtfti.c - Implement __fixtfti -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef ti_int fixint_t;
+typedef tu_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI ti_int
+__fixtfti(fp_t a) {
+    return __fixint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixunsdfdi.c

@@ -6,42 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define DOUBLE_PRECISION
-
+#include "fp_lib.h"
-/* Returns: convert a to a unsigned long long, rounding toward zero.
+typedef du_int fixuint_t;
- *          Negative values all become zero.
+#include "fp_fixuint_impl.inc"
- */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             du_int is a 64 bit integral type
- *             value in double is representable in du_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
 
 ARM_EABI_FNALIAS(d2ulz, fixunsdfdi)
 
 COMPILER_RT_ABI du_int
-__fixunsdfdi(double a)
+__fixunsdfdi(fp_t a) {
-{
+    return __fixuint(a);
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    udwords r;
-    r.s.high = (fb.u.s.high & 0x000FFFFF) | 0x00100000;
-    r.s.low = fb.u.s.low;
-    if (e > 52)
-        r.all <<= (e - 52);
-    else
-        r.all >>= (52 - e);
-    return r.all;
 }

contrib/compiler-rt/lib/builtins/fixunsdfsi.c

@@ -6,39 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfsi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define DOUBLE_PRECISION
-
+#include "fp_lib.h"
-/* Returns: convert a to a unsigned int, rounding toward zero.
+typedef su_int fixuint_t;
- *          Negative values all become zero.
+#include "fp_fixuint_impl.inc"
- */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in double is representable in su_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
 
 ARM_EABI_FNALIAS(d2uiz, fixunsdfsi)
 
 COMPILER_RT_ABI su_int
-__fixunsdfsi(double a)
+__fixunsdfsi(fp_t a) {
-{
+    return __fixuint(a);
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    return (
-                0x80000000u                      |
-                ((fb.u.s.high & 0x000FFFFF) << 11) |
-                (fb.u.s.low >> 21)
-           ) >> (31 - e);
 }

contrib/compiler-rt/lib/builtins/fixunsdfti.c

@@ -6,42 +6,18 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
-
+#define DOUBLE_PRECISION
-/* Returns: convert a to a unsigned long long, rounding toward zero.
+#include "fp_lib.h"
- *          Negative values all become zero.
+typedef tu_int fixuint_t;
- */
+#include "fp_fixuint_impl.inc"
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             tu_int is a 64 bit integral type
- *             value in double is representable in tu_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
 
 COMPILER_RT_ABI tu_int
-__fixunsdfti(double a)
+__fixunsdftti(fp_t a) {
-{
+    return __fixuint(a);
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    tu_int r = 0x0010000000000000uLL | (fb.u.all & 0x000FFFFFFFFFFFFFuLL);
-    if (e > 52)
-        r <<= (e - 52);
-    else
-        r >>= (52 - e);
-    return r;
 }
-
 #endif /* CRT_HAS_128BIT */

contrib/compiler-rt/lib/builtins/fixunssfdi.c

@@ -6,39 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunssfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define SINGLE_PRECISION
-/* Returns: convert a to a unsigned long long, rounding toward zero.
+#include "fp_lib.h"
- *          Negative values all become zero.
+typedef du_int fixuint_t;
- */
+#include "fp_fixuint_impl.inc"
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             du_int is a 64 bit integral type
- *             value in float is representable in du_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
 
 ARM_EABI_FNALIAS(f2ulz, fixunssfdi)
 
 COMPILER_RT_ABI du_int
-__fixunssfdi(float a)
+__fixunssfdi(fp_t a) {
-{
+    return __fixuint(a);
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    du_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
 }

contrib/compiler-rt/lib/builtins/fixunssfsi.c

@@ -12,34 +12,14 @@
  * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#define SINGLE_PRECISION
-
+#include "fp_lib.h"
-/* Returns: convert a to a unsigned int, rounding toward zero.
+typedef su_int fixuint_t;
- *          Negative values all become zero.
+#include "fp_fixuint_impl.inc"
- */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in float is representable in su_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
 
 ARM_EABI_FNALIAS(f2uiz, fixunssfsi)
 
 COMPILER_RT_ABI su_int
-__fixunssfsi(float a)
+__fixunssfsi(fp_t a) {
-{
+    return __fixuint(a);
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    su_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
 }

contrib/compiler-rt/lib/builtins/fixunssfti.c

@@ -12,36 +12,12 @@
  * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
+#if defined(CRT_HAS_128BIT)
-
+typedef tu_int fixuint_t;
-#ifdef CRT_HAS_128BIT
+#include "fp_fixuint_impl.inc"
-
-/* Returns: convert a to a unsigned long long, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             tu_int is a 64 bit integral type
- *             value in float is representable in tu_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
 
 COMPILER_RT_ABI tu_int
-__fixunssfti(float a)
+__fixunssfti(fp_t a) {
-{
+    return __fixuint(a);
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    tu_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
 }
-
+#endif
-#endif /* CRT_HAS_128BIT */

contrib/compiler-rt/lib/builtins/fixunstfdi.c

@@ -0,0 +1,22 @@
+/* ===-- fixunstfdi.c - Implement __fixunstfdi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef du_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI du_int
+__fixunstfdi(fp_t a) {
+    return __fixuint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixunstfsi.c

@@ -0,0 +1,22 @@
+/* ===-- fixunstfsi.c - Implement __fixunstfsi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef su_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI su_int
+__fixunstfsi(fp_t a) {
+    return __fixuint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixunstfti.c

@@ -0,0 +1,22 @@
+/* ===-- fixunstfsi.c - Implement __fixunstfsi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef tu_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI tu_int
+__fixunstfti(fp_t a) {
+    return __fixuint(a);
+}
+#endif

contrib/compiler-rt/lib/builtins/fixunsxfdi.c

@@ -38,6 +38,8 @@ __fixunsxfdi(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(du_int) * CHAR_BIT)
+        return ~(du_int)0;
     return fb.u.low.all >> (63 - e);
 }
 

contrib/compiler-rt/lib/builtins/fixunsxfsi.c

@@ -23,7 +23,6 @@
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
  *             su_int is a 32 bit integral type
  *             value in long double is representable in su_int or is negative 
- *                 (no range checking performed)
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -38,6 +37,8 @@ __fixunsxfsi(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(su_int) * CHAR_BIT)
+        return ~(su_int)0;
     return fb.u.low.s.high >> (31 - e);
 }
 

contrib/compiler-rt/lib/builtins/fixunsxfti.c

@@ -21,9 +21,8 @@
  */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             tu_int is a 64 bit integral type
+ *             tu_int is a 128 bit integral type
  *             value in long double is representable in tu_int or is negative 
- *                 (no range checking performed)
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -38,6 +37,8 @@ __fixunsxfti(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(tu_int) * CHAR_BIT)
+        return ~(tu_int)0;
     tu_int r = fb.u.low.all;
     if (e > 63)
         r <<= (e - 63);

contrib/compiler-rt/lib/builtins/fixxfdi.c

@@ -19,7 +19,7 @@
 /* Returns: convert a to a signed long long, rounding toward zero. */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             su_int is a 32 bit integral type
+ *             di_int is a 64 bit integral type
  *             value in long double is representable in di_int (no range checking performed)
  */
 
@@ -30,11 +30,15 @@
 COMPILER_RT_ABI di_int
 __fixxfdi(long double a)
 {
+    const di_int di_max = (di_int)((~(du_int)0) / 2);
+    const di_int di_min = -di_max - 1;
     long_double_bits fb;
     fb.f = a;
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0)
         return 0;
+    if ((unsigned)e >= sizeof(di_int) * CHAR_BIT)
+        return a > 0 ? di_max : di_min;
     di_int s = -(si_int)((fb.u.high.s.low & 0x00008000) >> 15);
     di_int r = fb.u.low.all;
     r = (du_int)r >> (63 - e);

contrib/compiler-rt/lib/builtins/fixxfti.c

@@ -19,8 +19,8 @@
 /* Returns: convert a to a signed long long, rounding toward zero. */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             su_int is a 32 bit integral type
+ *             ti_int is a 128 bit integral type
- *             value in long double is representable in ti_int (no range checking performed)
+ *             value in long double is representable in ti_int
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -30,6 +30,8 @@
 COMPILER_RT_ABI ti_int
 __fixxfti(long double a)
 {
+    const ti_int ti_max = (ti_int)((~(tu_int)0) / 2);
+    const ti_int ti_min = -ti_max - 1;
     long_double_bits fb;
     fb.f = a;
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
@@ -37,6 +39,8 @@ __fixxfti(long double a)
         return 0;
     ti_int s = -(si_int)((fb.u.high.s.low & 0x00008000) >> 15);
     ti_int r = fb.u.low.all;
+    if ((unsigned)e >= sizeof(ti_int) * CHAR_BIT)
+        return a > 0 ? ti_max : ti_min;
     if (e > 63)
         r <<= (e - 63);
     else

contrib/compiler-rt/lib/builtins/fp_fixint_impl.inc

@@ -0,0 +1,41 @@
+//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements float to integer conversion for the
+// compiler-rt library.
+//
+//===----------------------------------------------------------------------===//
+
+#include "fp_lib.h"
+
+static inline fixint_t __fixint(fp_t a) {
+    const fixint_t fixint_max = (fixint_t)((~(fixuint_t)0) / 2);
+    const fixint_t fixint_min = -fixint_max - 1;
+    // Break a into sign, exponent, significand
+    const rep_t aRep = toRep(a);
+    const rep_t aAbs = aRep & absMask;
+    const fixint_t sign = aRep & signBit ? -1 : 1;
+    const int exponent = (aAbs >> significandBits) - exponentBias;
+    const rep_t significand = (aAbs & significandMask) | implicitBit;
+
+    // If exponent is negative, the result is zero.
+    if (exponent < 0)
+        return 0;
+
+    // If the value is too large for the integer type, saturate.
+    if ((unsigned)exponent >= sizeof(fixint_t) * CHAR_BIT)
+        return sign == 1 ? fixint_max : fixint_min;
+
+    // If 0 <= exponent < significandBits, right shift to get the result.
+    // Otherwise, shift left.
+    if (exponent < significandBits)
+        return sign * (significand >> (significandBits - exponent));
+    else
+        return sign * ((fixint_t)significand << (exponent - significandBits));
+}

contrib/compiler-rt/lib/builtins/fp_fixuint_impl.inc

@@ -0,0 +1,39 @@
+//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements float to unsigned integer conversion for the
+// compiler-rt library.
+//
+//===----------------------------------------------------------------------===//
+
+#include "fp_lib.h"
+
+static inline fixuint_t __fixuint(fp_t a) {
+    // Break a into sign, exponent, significand
+    const rep_t aRep = toRep(a);
+    const rep_t aAbs = aRep & absMask;
+    const int sign = aRep & signBit ? -1 : 1;
+    const int exponent = (aAbs >> significandBits) - exponentBias;
+    const rep_t significand = (aAbs & significandMask) | implicitBit;
+
+    // If either the value or the exponent is negative, the result is zero.
+    if (sign == -1 || exponent < 0)
+        return 0;
+
+    // If the value is too large for the integer type, saturate.
+    if ((unsigned)exponent > sizeof(fixuint_t) * CHAR_BIT)
+        return ~(fixuint_t)0;
+
+    // If 0 <= exponent < significandBits, right shift to get the result.
+    // Otherwise, shift left.
+    if (exponent < significandBits)
+        return significand >> (significandBits - exponent);
+    else
+        return (fixuint_t)significand << (exponent - significandBits);
+}

contrib/jemalloc/include/jemalloc/jemalloc_FreeBSD.h

@@ -40,6 +40,9 @@
 #ifdef __arm__
 #  define LG_SIZEOF_PTR		2
 #endif
+#ifdef __aarch64__
+#  define LG_SIZEOF_PTR		3
+#endif
 #ifdef __mips__
 #ifdef __mips_n64
 #  define LG_SIZEOF_PTR		3

contrib/libc++/include/__bit_reference

@@ -906,7 +906,6 @@ rotate(__bit_iterator<_Cp, false> __first, __bit_iterator<_Cp, false> __middle,
 {
     typedef __bit_iterator<_Cp, false> _I1;
     typedef  typename _I1::difference_type difference_type;
-    typedef typename _I1::__storage_type __storage_type;
     difference_type __d1 = __middle - __first;
     difference_type __d2 = __last - __middle;
     _I1 __r = __first + __d2;

contrib/libc++/include/__tree

@@ -2069,7 +2069,6 @@ template <class _Key>
 typename __tree<_Tp, _Compare, _Allocator>::size_type
 __tree<_Tp, _Compare, _Allocator>::__count_multi(const _Key& __k) const
 {
-    typedef pair<const_iterator, const_iterator> _Pp;
     __node_const_pointer __result = __end_node();
     __node_const_pointer __rt = __root();
     while (__rt != nullptr)

contrib/libc++/include/algorithm

@@ -4365,8 +4365,6 @@ __buffered_inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator
                 typename iterator_traits<_BidirectionalIterator>::value_type* __buff)
 {
     typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
-    typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
-    typedef typename iterator_traits<_BidirectionalIterator>::pointer pointer;
     __destruct_n __d(0);
     unique_ptr<value_type, __destruct_n&> __h2(__buff, __d);
     if (__len1 <= __len2)
@@ -4400,7 +4398,6 @@ __inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator __middle,
                                  typename iterator_traits<_BidirectionalIterator>::difference_type __len2,
                 typename iterator_traits<_BidirectionalIterator>::value_type* __buff, ptrdiff_t __buff_size)
 {
-    typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
     typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
     while (true)
     {
@@ -4799,7 +4796,6 @@ void
 __sift_up(_RandomAccessIterator __first, _RandomAccessIterator __last, _Compare __comp,
           typename iterator_traits<_RandomAccessIterator>::difference_type __len)
 {
-    typedef typename iterator_traits<_RandomAccessIterator>::difference_type difference_type;
     typedef typename iterator_traits<_RandomAccessIterator>::value_type value_type;
     if (__len > 1)
     {

contrib/libxo/libxo/xo.h

@@ -272,13 +272,13 @@ void
 xo_warnx (const char *fmt, ...);
 
 void
-xo_err (int eval, const char *fmt, ...);
+xo_err (int eval, const char *fmt, ...) __dead2;
 
 void
-xo_errx (int eval, const char *fmt, ...);
+xo_errx (int eval, const char *fmt, ...) __dead2;
 
 void
-xo_errc (int eval, int code, const char *fmt, ...);
+xo_errc (int eval, int code, const char *fmt, ...) __dead2;
 
 void
 xo_message_hcv (xo_handle_t *xop, int code, const char *fmt, va_list vap);

contrib/tzdata/antarctica

@@ -47,8 +47,8 @@ Rule	ChileAQ	2009	only	-	Mar	Sun>=9	3:00u	0	-
 Rule	ChileAQ	2010	only	-	Apr	Sun>=1	3:00u	0	-
 Rule	ChileAQ	2011	only	-	May	Sun>=2	3:00u	0	-
 Rule	ChileAQ	2011	only	-	Aug	Sun>=16	4:00u	1:00	S
-Rule	ChileAQ	2012	max	-	Apr	Sun>=23	3:00u	0	-
+Rule	ChileAQ	2012	2015	-	Apr	Sun>=23	3:00u	0	-
-Rule	ChileAQ	2012	max	-	Sep	Sun>=2	4:00u	1:00	S
+Rule	ChileAQ	2012	2014	-	Sep	Sun>=2	4:00u	1:00	S
 
 # Argentina - year-round bases
 # Belgrano II, Confin Coast, -770227-0343737, since 1972-02-05
@@ -356,7 +356,8 @@ Zone Antarctica/Rothera	0	-	zzz	1976 Dec  1
 Zone Antarctica/Palmer	0	-	zzz	1965
 			-4:00	ArgAQ	AR%sT	1969 Oct  5
 			-3:00	ArgAQ	AR%sT	1982 May
-			-4:00	ChileAQ	CL%sT
+			-4:00	ChileAQ	CL%sT	2015 Apr 26 3:00u
+			-3:00	-	CLT
 #
 #
 # McMurdo Station, Ross Island, since 1955-12

contrib/tzdata/asia

@@ -145,10 +145,7 @@ Zone	Asia/Baku	3:19:24 -	LMT	1924 May  2
 			4:00	Azer	AZ%sT
 
 # Bahrain
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
+# See Asia/Qatar.
-Zone	Asia/Bahrain	3:22:20 -	LMT	1920     # Manamah
-			4:00	-	GST	1972 Jun
-			3:00	-	AST
 
 # Bangladesh
 # From Alexander Krivenyshev (2009-05-13):
@@ -1731,9 +1728,7 @@ Zone	Asia/Pyongyang	8:23:00 -	LMT	1908 Apr  1
 ###############################################################################
 
 # Kuwait
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
+# See Asia/Riyadh.
-Zone	Asia/Kuwait	3:11:56 -	LMT	1950
-			3:00	-	AST
 
 # Laos
 # See Asia/Bangkok.
@@ -1954,12 +1949,7 @@ Zone	Asia/Kathmandu	5:41:16 -	LMT	1920
 			5:45	-	NPT	# Nepal Time
 
 # Oman
-
+# See Asia/Dubai.
-# Milne says 3:54:24 was the meridian of the Muscat Tidal Observatory.
-
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Muscat	3:54:24 -	LMT	1920
-			4:00	-	GST
 
 # Pakistan
 
@@ -2453,6 +2443,7 @@ Zone	Asia/Manila	-15:56:00 -	LMT	1844 Dec 31
 Zone	Asia/Qatar	3:26:08 -	LMT	1920     # Al Dawhah / Doha
 			4:00	-	GST	1972 Jun
 			3:00	-	AST
+Link Asia/Qatar Asia/Bahrain
 
 # Saudi Arabia
 #
@@ -2479,6 +2470,8 @@ Zone	Asia/Qatar	3:26:08 -	LMT	1920     # Al Dawhah / Doha
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone	Asia/Riyadh	3:06:52 -	LMT	1947 Mar 14
 			3:00	-	AST
+Link Asia/Riyadh Asia/Aden	# Yemen
+Link Asia/Riyadh Asia/Kuwait
 
 # Singapore
 # taken from Mok Ly Yng (2003-10-30)
@@ -2767,6 +2760,7 @@ Zone	Asia/Ashgabat	3:53:32 -	LMT	1924 May  2 # or Ashkhabad
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone	Asia/Dubai	3:41:12 -	LMT	1920
 			4:00	-	GST
+Link Asia/Dubai Asia/Muscat	# Oman
 
 # Uzbekistan
 # Byalokoz 1919 says Uzbekistan was 4:27:53.
@@ -2851,10 +2845,4 @@ Zone Asia/Ho_Chi_Minh	7:06:40 -	LMT	1906 Jul  1
 			7:00	-	ICT
 
 # Yemen
-
+# See Asia/Riyadh.
-# Milne says 2:59:54 was the meridian of the saluting battery at Aden,
-# and that Yemen was at 1:55:56, the meridian of the Hagia Sophia.
-
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Aden	2:59:54	-	LMT	1950
-			3:00	-	AST

contrib/tzdata/backward

@@ -5,7 +5,7 @@
 # and their old names.  Many names changed in late 1993.
 
 # Link	TARGET			LINK-NAME
-Link	Africa/Asmara		Africa/Asmera
+Link	Africa/Nairobi		Africa/Asmera
 Link	Africa/Abidjan		Africa/Timbuktu
 Link	America/Argentina/Catamarca	America/Argentina/ComodRivadavia
 Link	America/Adak		America/Atka

contrib/tzdata/europe

@@ -1407,35 +1407,32 @@ Zone	Europe/Budapest	1:16:20 -	LMT	1890 Oct
 # might be a reference to the Julian calendar as opposed to Gregorian, or it
 # might mean something else (???).
 #
-# From Paul Eggert (2006-03-22):
+# From Paul Eggert (2014-11-22):
-# The Iceland Almanak, Shanks & Pottenger, and Whitman disagree on many points.
+# The information below is taken from the 1988 Almanak; see
-# We go with the Almanak, except for one claim from Shanks & Pottenger, namely
+# http://www.almanak.hi.is/klukkan.html
-# that Reykavik was 21W57 from 1837 to 1908, local mean time before that.
 #
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
-Rule	Iceland	1917	1918	-	Feb	19	23:00	1:00	S
+Rule	Iceland	1917	1919	-	Feb	19	23:00	1:00	S
 Rule	Iceland	1917	only	-	Oct	21	 1:00	0	-
-Rule	Iceland	1918	only	-	Nov	16	 1:00	0	-
+Rule	Iceland	1918	1919	-	Nov	16	 1:00	0	-
+Rule	Iceland	1921	only	-	Mar	19	23:00	1:00	S
+Rule	Iceland	1921	only	-	Jun	23	 1:00	0	-
 Rule	Iceland	1939	only	-	Apr	29	23:00	1:00	S
-Rule	Iceland	1939	only	-	Nov	29	 2:00	0	-
+Rule	Iceland	1939	only	-	Oct	29	 2:00	0	-
 Rule	Iceland	1940	only	-	Feb	25	 2:00	1:00	S
-Rule	Iceland	1940	only	-	Nov	 3	 2:00	0	-
+Rule	Iceland	1940	1941	-	Nov	Sun>=2	 1:00s	0	-
-Rule	Iceland	1941	only	-	Mar	 2	 1:00s	1:00	S
+Rule	Iceland	1941	1942	-	Mar	Sun>=2	 1:00s	1:00	S
-Rule	Iceland	1941	only	-	Nov	 2	 1:00s	0	-
-Rule	Iceland	1942	only	-	Mar	 8	 1:00s	1:00	S
-Rule	Iceland	1942	only	-	Oct	25	 1:00s	0	-
 # 1943-1946 - first Sunday in March until first Sunday in winter
 Rule	Iceland	1943	1946	-	Mar	Sun>=1	 1:00s	1:00	S
-Rule	Iceland	1943	1948	-	Oct	Sun>=22	 1:00s	0	-
+Rule	Iceland	1942	1948	-	Oct	Sun>=22	 1:00s	0	-
 # 1947-1967 - first Sunday in April until first Sunday in winter
 Rule	Iceland	1947	1967	-	Apr	Sun>=1	 1:00s	1:00	S
-# 1949 Oct transition delayed by 1 week
+# 1949 and 1967 Oct transitions delayed by 1 week
 Rule	Iceland	1949	only	-	Oct	30	 1:00s	0	-
 Rule	Iceland	1950	1966	-	Oct	Sun>=22	 1:00s	0	-
 Rule	Iceland	1967	only	-	Oct	29	 1:00s	0	-
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone Atlantic/Reykjavik	-1:27:24 -	LMT	1837
+Zone Atlantic/Reykjavik	-1:28	-	LMT	1908
-			-1:27:48 -	RMT	1908 # Reykjavik Mean Time?
 			-1:00	Iceland	IS%sT	1968 Apr  7  1:00s
 			 0:00	-	GMT
 

contrib/tzdata/leap-seconds.list

@@ -47,7 +47,7 @@
 #	and can be ignored for many purposes. These differences
 #	are tabulated in Circular T, which is published monthly
 #	by the International Bureau of Weights and Measures
-#	(BIPM). See www.bipm.fr for more information.
+#	(BIPM). See www.bipm.org for more information.
 #
 #	3. The current definition of the relationship between UTC
 #	and TAI dates from 1 January 1972. A number of different
@@ -127,6 +127,15 @@
 #	with, since the difficulty of unambiguously representing the epoch
 #	during the leap second does not arise.
 #
+#	Some systems implement leap seconds by amortizing the leap second
+#	over the last few minutes of the day. The frequency of the local
+#	clock is decreased (or increased) to realize the positive (or
+#	negative) leap second. This method removes the time step described
+#	above. Although the long-term behavior of the time scale is correct 
+#	in this case, this method introduces an error during the adjustment 
+#	period both in time and in frequency with respect to the official 
+#	defintion of UTC.
+#
 #	Questions or comments to:
 #		Judah Levine
 #		Time and Frequency Division
@@ -134,7 +143,7 @@
 #		Boulder, Colorado
 #		Judah.Levine@nist.gov
 #
-#	Last Update of leap second values:   11 January 2012
+#	Last Update of leap second values:   5 January 2015
 #
 #	The following line shows this last update date in NTP timestamp
 #	format. This is the date on which the most recent change to
@@ -142,7 +151,7 @@
 #	be identified by the unique pair of characters in the first two
 #	columns as shown below.
 #
-#$	 3535228800
+#$	 3629404800
 #
 #	The NTP timestamps are in units of seconds since the NTP epoch,
 #	which is 1 January 1900, 00:00:00. The Modified Julian Day number
@@ -190,10 +199,10 @@
 #	current -- the update time stamp, the data and the name of the file
 #	will not change.
 #
-#	Updated through IERS Bulletin C48
+#	Updated through IERS Bulletin C49
-#	File expires on:  28 June 2015
+#	File expires on:  28 December 2015
 #
-#@	3644438400
+#@	3660249600
 #
 2272060800	10	# 1 Jan 1972
 2287785600	11	# 1 Jul 1972
@@ -221,6 +230,7 @@
 3345062400	33	# 1 Jan 2006
 3439756800	34	# 1 Jan 2009
 3550089600	35	# 1 Jul 2012
+3644697600	36	# 1 Jul 2015
 #
 #	the following special comment contains the
 #	hash value of the data in this file computed
@@ -236,4 +246,4 @@
 #	the hash line is also ignored in the
 #	computation.
 #
-#h	a4862ccd c6f43c6 964f3604 85944a26 b5cfad4e
+#h	45e70fa7 a9df2033 f4a49ab0 ec648273 7b6c22c

contrib/tzdata/northamerica

@@ -124,7 +124,7 @@ Rule	US	1918	1919	-	Mar	lastSun	2:00	1:00	D
 Rule	US	1918	1919	-	Oct	lastSun	2:00	0	S
 Rule	US	1942	only	-	Feb	9	2:00	1:00	W # War
 Rule	US	1945	only	-	Aug	14	23:00u	1:00	P # Peace
-Rule	US	1945	only	-	Sep	30	2:00	0	S
+Rule	US	1945	only	-	Sep	lastSun	2:00	0	S
 Rule	US	1967	2006	-	Oct	lastSun	2:00	0	S
 Rule	US	1967	1973	-	Apr	lastSun	2:00	1:00	D
 Rule	US	1974	only	-	Jan	6	2:00	1:00	D
@@ -2124,11 +2124,11 @@ Zone America/Dawson	-9:17:40 -	LMT	1900 Aug 20
 
 # Mexico
 
-# From Paul Eggert (2001-03-05):
+# From Paul Eggert (2014-12-07):
 # The Investigation and Analysis Service of the
 # Mexican Library of Congress (MLoC) has published a
 # history of Mexican local time (in Spanish)
-# http://www.cddhcu.gob.mx/bibliot/publica/inveyana/polisoc/horver/
+# http://www.diputados.gob.mx/bibliot/publica/inveyana/polisoc/horver/index.htm
 #
 # Here are the discrepancies between Shanks & Pottenger (S&P) and the MLoC.
 # (In all cases we go with the MLoC.)
@@ -2297,6 +2297,24 @@ Zone America/Dawson	-9:17:40 -	LMT	1900 Aug 20
 # efecto desde las dos horas del segundo domingo de marzo y concluirá a
 # las dos horas del primer domingo de noviembre.
 
+# From Steffen Thorsen (2014-12-08), translated by Gwillim Law:
+# The Mexican state of Quintana Roo will likely change to EST in 2015.
+#
+# http://www.unioncancun.mx/articulo/2014/12/04/medio-ambiente/congreso-aprueba-una-hora-mas-de-sol-en-qroo
+# "With this change, the time conflict that has existed between the municipios
+# of Quintana Roo and the municipio of Felipe Carrillo Puerto may come to an
+# end. The latter declared itself in rebellion 15 years ago when a time change
+# was initiated in Mexico, and since then it has refused to change its time
+# zone along with the rest of the country."
+#
+# From Steffen Thorsen (2015-01-14), translated by Gwillim Law:
+# http://sipse.com/novedades/confirman-aplicacion-de-nueva-zona-horaria-para-quintana-roo-132331.html
+# "...the new time zone will come into effect at two o'clock on the first Sunday
+# of February, when we will have to advance the clock one hour from its current
+# time..."
+#
+# Also, the new zone will not use DST.
+
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
 Rule	Mexico	1939	only	-	Feb	5	0:00	1:00	D
 Rule	Mexico	1939	only	-	Jun	25	0:00	0	S
@@ -2317,7 +2335,8 @@ Rule	Mexico	2002	max	-	Oct	lastSun	2:00	0	S
 Zone America/Cancun	-5:47:04 -	LMT	1922 Jan  1  0:12:56
 			-6:00	-	CST	1981 Dec 23
 			-5:00	Mexico	E%sT	1998 Aug  2  2:00
-			-6:00	Mexico	C%sT
+			-6:00	Mexico	C%sT	2015 Feb  1  2:00
+			-5:00	-	EST
 # Campeche, Yucatán; represented by Mérida
 Zone America/Merida	-5:58:28 -	LMT	1922 Jan  1  0:01:32
 			-6:00	-	CST	1981 Dec 23

contrib/tzdata/southamerica

@@ -1206,6 +1206,11 @@ Zone America/Rio_Branco	-4:31:12 -	LMT	1914
 # DST Start: first Saturday of September 2014 (Sun 07 Sep 2014 04:00 UTC)
 # http://www.diariooficial.interior.gob.cl//media/2014/02/19/do-20140219.pdf
 
+# From Juan Correa (2015-01-28):
+# ... today the Ministry of Energy announced that Chile will drop DST, will keep
+# "summer time" (UTC -3 / UTC -5) all year round....
+# http://www.minenergia.cl/ministerio/noticias/generales/ministerio-de-energia-anuncia.html
+
 # NOTE: ChileAQ rules for Antarctic bases are stored separately in the
 # 'antarctica' file.
 
@@ -1247,8 +1252,8 @@ Rule	Chile	2009	only	-	Mar	Sun>=9	3:00u	0	-
 Rule	Chile	2010	only	-	Apr	Sun>=1	3:00u	0	-
 Rule	Chile	2011	only	-	May	Sun>=2	3:00u	0	-
 Rule	Chile	2011	only	-	Aug	Sun>=16	4:00u	1:00	S
-Rule	Chile	2012	max	-	Apr	Sun>=23	3:00u	0	-
+Rule	Chile	2012	2015	-	Apr	Sun>=23	3:00u	0	-
-Rule	Chile	2012	max	-	Sep	Sun>=2	4:00u	1:00	S
+Rule	Chile	2012	2014	-	Sep	Sun>=2	4:00u	1:00	S
 # IATA SSIM anomalies: (1992-02) says 1992-03-14;
 # (1996-09) says 1998-03-08.  Ignore these.
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
@@ -1259,11 +1264,13 @@ Zone America/Santiago	-4:42:46 -	LMT	1890
 			-4:00	-	CLT	1919 Jul  1 # Chile Time
 			-4:42:46 -	SMT	1927 Sep  1 # Santiago Mean Time
 			-5:00	Chile	CL%sT	1947 May 22 # Chile Time
-			-4:00	Chile	CL%sT
+			-4:00	Chile	CL%sT	2015 Apr 26  3:00u
+			-3:00	-	CLT
 Zone Pacific/Easter	-7:17:44 -	LMT	1890
 			-7:17:28 -	EMT	1932 Sep    # Easter Mean Time
-			-7:00	Chile	EAS%sT	1982 Mar 13 21:00 # Easter Time
+			-7:00	Chile	EAS%sT	1982 Mar 13 3:00u # Easter Time
-			-6:00	Chile	EAS%sT
+			-6:00	Chile	EAS%sT	2015 Apr 26 3:00u
+			-5:00	-	EAST
 #
 # Salas y Gómez Island is uninhabited.
 # Other Chilean locations, including Juan Fernández Is, Desventuradas Is,

contrib/tzdata/zone.tab

@@ -274,7 +274,7 @@ MU	-2010+05730	Indian/Mauritius
 MV	+0410+07330	Indian/Maldives
 MW	-1547+03500	Africa/Blantyre
 MX	+1924-09909	America/Mexico_City	Central Time - most locations
-MX	+2105-08646	America/Cancun	Central Time - Quintana Roo
+MX	+2105-08646	America/Cancun	Eastern Standard Time - Quintana Roo
 MX	+2058-08937	America/Merida	Central Time - Campeche, Yucatan
 MX	+2540-10019	America/Monterrey	Mexican Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas away from US border
 MX	+2550-09730	America/Matamoros	US Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas near US border

contrib/tzdata/zone1970.tab

@@ -234,7 +234,7 @@ MT	+3554+01431	Europe/Malta
 MU	-2010+05730	Indian/Mauritius
 MV	+0410+07330	Indian/Maldives
 MX	+1924-09909	America/Mexico_City	Central Time - most locations
-MX	+2105-08646	America/Cancun	Central Time - Quintana Roo
+MX	+2105-08646	America/Cancun	Eastern Standard Time - Quintana Roo
 MX	+2058-08937	America/Merida	Central Time - Campeche, Yucatán
 MX	+2540-10019	America/Monterrey	Mexican Central Time - Coahuila, Durango, Nuevo León, Tamaulipas away from US border
 MX	+2550-09730	America/Matamoros	US Central Time - Coahuila, Durango, Nuevo León, Tamaulipas near US border

etc/auto_master

@@ -6,3 +6,4 @@
 # When using the -media special map, make sure to edit devd.conf(5)
 # to move the call to "automount -c" out of the comments section.
 #/media		-media		-nosuid
+#/-		-noauto

etc/autofs/Makefile

@@ -1,6 +1,6 @@
 # $FreeBSD$
 
-FILES=		include_ldap special_hosts special_media special_null
+FILES=		include_ldap special_hosts special_media special_noauto special_null
 
 NO_OBJ=
 FILESDIR=	/etc/autofs

etc/autofs/special_noauto

@@ -0,0 +1,29 @@
+#!/bin/sh
+#
+# $FreeBSD$
+#
+
+print_available() {
+	sed 's/#.*//' /etc/fstab | awk '$4 ~ /noauto/ { print $2 }'
+}
+
+print_one() {
+	local _mntpoint
+
+	_mntpoint="${1%/}"
+	
+	sed 's/#.*//' /etc/fstab | awk '
+	$2 == "'"${_mntpoint}"'" && $4 ~ /noauto/ {
+		if ($1 ~ /:/) { dev=$1 } else { dev=":"$1 }
+		print "-fstype=" $3 "," $4, dev
+	}'
+}
+
+if [ $# -eq 0 ]; then
+	print_available
+	exit 0
+fi
+
+print_one "$1"
+exit 0
+

lib/libc/gen/getpwent.c

@@ -1942,7 +1942,7 @@ compat_passwd(void *retval, void *mdata, va_list ap)
 			break;
 	}
 fin:
-	if (!stayopen && st->db != NULL) {
+	if (st->db != NULL && !stayopen) {
 		(void)st->db->close(st->db);
 		st->db = NULL;
 	}

lib/libc/net/sctp_sys_calls.c

@@ -383,6 +383,9 @@ sctp_opt_info(int sd, sctp_assoc_t id, int opt, void *arg, socklen_t * size)
 	case SCTP_PR_ASSOC_STATUS:
 		((struct sctp_prstatus *)arg)->sprstat_assoc_id = id;
 		break;
+	case SCTP_MAX_CWND:
+		((struct sctp_assoc_value *)arg)->assoc_id = id;
+		break;
 	default:
 		break;
 	}

lib/libc/posix1e/acl_calc_mask.c

@@ -104,6 +104,7 @@ acl_calc_mask(acl_t *acl_p)
 		/* if no mask exists, check acl_cnt... */
 		if (acl_int_new->acl_cnt == ACL_MAX_ENTRIES) {
 			errno = ENOMEM;
+			acl_free(acl_new);
 			return (-1);
 		}
 		/* ...and add the mask entry */

lib/libc/posix1e/acl_strip.c

@@ -82,8 +82,10 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 
 	have_mask_entry = 0;
 	acl_new = acl_init(ACL_MAX_ENTRIES);
-	if (acl_new == NULL)
+	if (acl_new == NULL) {
+		acl_free(acl_old);
 		return (NULL);
+	}
 	tag = ACL_UNDEFINED_TAG;
 
 	/* only save the default user/group/other entries */
@@ -94,16 +96,16 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 		assert(_entry_brand(entry) == ACL_BRAND_POSIX);
 
 		if (acl_get_tag_type(entry, &tag) == -1)
-			return (NULL);
+			goto fail;
 
 		switch(tag) {
 		case ACL_USER_OBJ:
 		case ACL_GROUP_OBJ:
 		case ACL_OTHER:
 			if (acl_get_tag_type(entry, &tag) == -1)
-				return (NULL);
+				goto fail;
 			if (acl_get_permset(entry, &perm) == -1)
-				return (NULL);
+				goto fail;
 			if (acl_create_entry(&acl_new, &entry_new) == -1)
 				return (NULL);
 			if (acl_set_tag_type(entry_new, tag) == -1)
@@ -120,6 +122,10 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 		default:
 			break;
 		}
+fail:
+	acl_free(acl_new);
+	acl_free(acl_old);
+	return (NULL);
 	}
 
 	assert(_acl_brand(acl_new) == ACL_BRAND_POSIX);

lib/libc/powerpc/gen/_setjmp.S

@@ -56,12 +56,54 @@ ENTRY(_setjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	stmw	%r9,20(%r3)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r3)
+	stfd	%f15,92+1*8(%r3)
+	stfd	%f16,92+2*8(%r3)
+	stfd	%f17,92+3*8(%r3)
+	stfd	%f18,92+4*8(%r3)
+	stfd	%f19,92+5*8(%r3)
+	stfd	%f20,92+6*8(%r3)
+	stfd	%f21,92+7*8(%r3)
+	stfd	%f22,92+8*8(%r3)
+	stfd	%f23,92+9*8(%r3)
+	stfd	%f24,92+10*8(%r3)
+	stfd	%f25,92+11*8(%r3)
+	stfd	%f26,92+12*8(%r3)
+	stfd	%f27,92+13*8(%r3)
+	stfd	%f28,93+13*8(%r3)
+	stfd	%f29,93+14*8(%r3)
+	stfd	%f30,93+15*8(%r3)
+	stfd	%f31,93+16*8(%r3)
+
 	li	%r3,0
 	blr
 END(_setjmp)
 
 ENTRY(_longjmp)
 	lmw	%r9,20(%r3)
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	mtlr	%r11
 	mtcr	%r12
 	mr	%r1,%r10

lib/libc/powerpc/gen/setjmp.S

@@ -66,6 +66,27 @@ ENTRY(setjmp)
 	mr	%r10,%r1		/* r10 <- stackptr */
 	mr	%r9,%r2			/*  r9 <- global ptr */
 	stmw	%r9,20(%r6)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r6)
+	stfd	%f15,92+1*8(%r6)
+	stfd	%f16,92+2*8(%r6)
+	stfd	%f17,92+3*8(%r6)
+	stfd	%f18,92+4*8(%r6)
+	stfd	%f19,92+5*8(%r6)
+	stfd	%f20,92+6*8(%r6)
+	stfd	%f21,92+7*8(%r6)
+	stfd	%f22,92+8*8(%r6)
+	stfd	%f23,92+9*8(%r6)
+	stfd	%f24,92+10*8(%r6)
+	stfd	%f25,92+11*8(%r6)
+	stfd	%f26,92+12*8(%r6)
+	stfd	%f27,92+13*8(%r6)
+	stfd	%f28,93+13*8(%r6)
+	stfd	%f29,93+14*8(%r6)
+	stfd	%f30,93+15*8(%r6)
+	stfd	%f31,93+16*8(%r6)
+
 	li	%r3,0			/* return (0) */
 	blr
 END(setjmp)
@@ -73,6 +94,27 @@ END(setjmp)
 	WEAK_REFERENCE(CNAME(__longjmp), longjmp)
 ENTRY(__longjmp)
 	lmw	%r9,20(%r3)		/* restore regs */
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	mr	%r6,%r4			/* save val param */
 	mtlr	%r11			/* r11 -> link reg */
 	mtcr	%r12			/* r12 -> condition reg */

lib/libc/powerpc/gen/sigsetjmp.S

@@ -71,12 +71,54 @@ ENTRY(sigsetjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	stmw	%r9,20(%r6)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r6)
+	stfd	%f15,92+1*8(%r6)
+	stfd	%f16,92+2*8(%r6)
+	stfd	%f17,92+3*8(%r6)
+	stfd	%f18,92+4*8(%r6)
+	stfd	%f19,92+5*8(%r6)
+	stfd	%f20,92+6*8(%r6)
+	stfd	%f21,92+7*8(%r6)
+	stfd	%f22,92+8*8(%r6)
+	stfd	%f23,92+9*8(%r6)
+	stfd	%f24,92+10*8(%r6)
+	stfd	%f25,92+11*8(%r6)
+	stfd	%f26,92+12*8(%r6)
+	stfd	%f27,92+13*8(%r6)
+	stfd	%f28,93+13*8(%r6)
+	stfd	%f29,93+14*8(%r6)
+	stfd	%f30,93+15*8(%r6)
+	stfd	%f31,93+16*8(%r6)
+
 	li	%r3,0
 	blr
 END(sigsetjmp)
 
 ENTRY(siglongjmp)
 	lmw	%r9,20(%r3)
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	lwz	%r7,0(%r3)
 	mr	%r6,%r4
 	mtlr	%r11

lib/libc/powerpc64/gen/_setjmp.S

@@ -56,23 +56,41 @@ ENTRY(_setjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	std	%r9,40 + 0*8(%r3)
+	stfd	%f14,40 + 23*8(%r3)
 	std	%r10,40 + 1*8(%r3)
+	stfd	%f15,40 + 24*8(%r3)
 	std	%r11,40 + 2*8(%r3)
+	stfd	%f16,40 + 25*8(%r3)
 	std	%r12,40 + 3*8(%r3)
+	stfd	%f17,40 + 26*8(%r3)
 	std	%r13,40 + 4*8(%r3)
+	stfd	%f18,40 + 27*8(%r3)
 	std	%r14,40 + 5*8(%r3)
+	stfd	%f19,40 + 28*8(%r3)
 	std	%r15,40 + 6*8(%r3)
+	stfd	%f20,40 + 29*8(%r3)
 	std	%r16,40 + 7*8(%r3)
+	stfd	%f21,40 + 30*8(%r3)
 	std	%r17,40 + 8*8(%r3)
+	stfd	%f22,40 + 31*8(%r3)
 	std	%r18,40 + 9*8(%r3)
+	stfd	%f23,40 + 32*8(%r3)
 	std	%r19,40 + 10*8(%r3)
+	stfd	%f24,40 + 33*8(%r3)
 	std	%r20,40 + 11*8(%r3)
+	stfd	%f25,40 + 34*8(%r3)
 	std	%r21,40 + 12*8(%r3)
+	stfd	%f26,40 + 35*8(%r3)
 	std	%r22,40 + 13*8(%r3)
+	stfd	%f27,40 + 36*8(%r3)
 	std	%r23,40 + 14*8(%r3)
+	stfd	%f28,40 + 37*8(%r3)
 	std	%r24,40 + 15*8(%r3)
+	stfd	%f29,40 + 38*8(%r3)
 	std	%r25,40 + 16*8(%r3)
+	stfd	%f30,40 + 39*8(%r3)
 	std	%r26,40 + 17*8(%r3)
+	stfd	%f31,40 + 40*8(%r3)
 	std	%r27,40 + 18*8(%r3)
 	std	%r28,40 + 19*8(%r3)
 	std	%r29,40 + 20*8(%r3)
@@ -84,23 +102,41 @@ END(_setjmp)
 
 ENTRY(_longjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)

lib/libc/powerpc64/gen/setjmp.S

@@ -67,29 +67,49 @@ ENTRY(setjmp)
 	mr	%r9,%r2			/*  r9 <- global ptr */
 
 	std	%r9,40 + 0*8(%r6)
+	stfd	%f14,40 + 23*8(%r6)
 	std	%r10,40 + 1*8(%r6)
+	stfd	%f15,40 + 24*8(%r6)
 	std	%r11,40 + 2*8(%r6)
+	stfd	%f16,40 + 25*8(%r6)
 	std	%r12,40 + 3*8(%r6)
+	stfd	%f17,40 + 26*8(%r6)
 	std	%r13,40 + 4*8(%r6)
+	stfd	%f18,40 + 27*8(%r6)
 	std	%r14,40 + 5*8(%r6)
+	stfd	%f19,40 + 28*8(%r6)
 	std	%r15,40 + 6*8(%r6)
+	stfd	%f20,40 + 29*8(%r6)
 	std	%r16,40 + 7*8(%r6)
+	stfd	%f21,40 + 30*8(%r6)
 	std	%r17,40 + 8*8(%r6)
+	stfd	%f22,40 + 31*8(%r6)
 	std	%r18,40 + 9*8(%r6)
+	stfd	%f23,40 + 32*8(%r6)
 	std	%r19,40 + 10*8(%r6)
+	stfd	%f24,40 + 33*8(%r6)
 	std	%r20,40 + 11*8(%r6)
+	stfd	%f25,40 + 34*8(%r6)
 	std	%r21,40 + 12*8(%r6)
+	stfd	%f26,40 + 35*8(%r6)
 	std	%r22,40 + 13*8(%r6)
+	stfd	%f27,40 + 36*8(%r6)
 	std	%r23,40 + 14*8(%r6)
+	stfd	%f28,40 + 37*8(%r6)
 	std	%r24,40 + 15*8(%r6)
+	stfd	%f29,40 + 38*8(%r6)
 	std	%r25,40 + 16*8(%r6)
+	stfd	%f30,40 + 39*8(%r6)
 	std	%r26,40 + 17*8(%r6)
+	stfd	%f31,40 + 40*8(%r6)
 	std	%r27,40 + 18*8(%r6)
 	std	%r28,40 + 19*8(%r6)
 	std	%r29,40 + 20*8(%r6)
 	std	%r30,40 + 21*8(%r6)
 	std	%r31,40 + 22*8(%r6)
 
+	/* XXX Altivec regs */
+
 	li	%r3,0			/* return (0) */
 	blr
 END(setjmp)
@@ -97,23 +117,41 @@ END(setjmp)
 	WEAK_REFERENCE(__longjmp, longjmp)
 ENTRY(__longjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)

lib/libc/powerpc64/gen/sigsetjmp.S

@@ -72,23 +72,41 @@ ENTRY(sigsetjmp)
 	mr	%r9,%r2
 
 	std	%r9,40 + 0*8(%r6)
+	stfd	%f14,40 + 23*8(%r6)
 	std	%r10,40 + 1*8(%r6)
+	stfd	%f15,40 + 24*8(%r6)
 	std	%r11,40 + 2*8(%r6)
+	stfd	%f16,40 + 25*8(%r6)
 	std	%r12,40 + 3*8(%r6)
+	stfd	%f17,40 + 26*8(%r6)
 	std	%r13,40 + 4*8(%r6)
+	stfd	%f18,40 + 27*8(%r6)
 	std	%r14,40 + 5*8(%r6)
+	stfd	%f19,40 + 28*8(%r6)
 	std	%r15,40 + 6*8(%r6)
+	stfd	%f20,40 + 29*8(%r6)
 	std	%r16,40 + 7*8(%r6)
+	stfd	%f21,40 + 30*8(%r6)
 	std	%r17,40 + 8*8(%r6)
+	stfd	%f22,40 + 31*8(%r6)
 	std	%r18,40 + 9*8(%r6)
+	stfd	%f23,40 + 32*8(%r6)
 	std	%r19,40 + 10*8(%r6)
+	stfd	%f24,40 + 33*8(%r6)
 	std	%r20,40 + 11*8(%r6)
+	stfd	%f25,40 + 34*8(%r6)
 	std	%r21,40 + 12*8(%r6)
+	stfd	%f26,40 + 35*8(%r6)
 	std	%r22,40 + 13*8(%r6)
+	stfd	%f27,40 + 36*8(%r6)
 	std	%r23,40 + 14*8(%r6)
+	stfd	%f28,40 + 37*8(%r6)
 	std	%r24,40 + 15*8(%r6)
+	stfd	%f29,40 + 38*8(%r6)
 	std	%r25,40 + 16*8(%r6)
+	stfd	%f30,40 + 39*8(%r6)
 	std	%r26,40 + 17*8(%r6)
+	stfd	%f31,40 + 40*8(%r6)
 	std	%r27,40 + 18*8(%r6)
 	std	%r28,40 + 19*8(%r6)
 	std	%r29,40 + 20*8(%r6)
@@ -101,23 +119,41 @@ END(sigsetjmp)
 
 ENTRY(siglongjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)

lib/libc/stdlib/qsort.c

@@ -41,9 +41,9 @@ typedef int		 cmp_t(void *, const void *, const void *);
 typedef int		 cmp_t(const void *, const void *);
 #endif
 static inline char	*med3(char *, char *, char *, cmp_t *, void *);
-static inline void	 swapfunc(char *, char *, int, int);
+static inline void	 swapfunc(char *, char *, int, int, int);
 
-#define min(a, b)	(a) < (b) ? a : b
+#define	MIN(a, b)	((a) < (b) ? a : b)
 
 /*
  * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
@@ -59,29 +59,37 @@ static inline void	 swapfunc(char *, char *, int, int);
 	} while (--i > 0);				\
 }
 
-#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \
+#define	SWAPINIT(TYPE, a, es) swaptype_ ## TYPE =	\
-	es % sizeof(long) ? 2 : es == sizeof(long)? 0 : 1;
+	((char *)a - (char *)0) % sizeof(TYPE) ||	\
+	es % sizeof(TYPE) ? 2 : es == sizeof(TYPE) ? 0 : 1;
 
 static inline void
-swapfunc(a, b, n, swaptype)
+swapfunc(a, b, n, swaptype_long, swaptype_int)
 	char *a, *b;
-	int n, swaptype;
+	int n, swaptype_long, swaptype_int;
 {
-	if(swaptype <= 1)
+	if (swaptype_long <= 1)
 		swapcode(long, a, b, n)
+	else if (swaptype_int <= 1)
+		swapcode(int, a, b, n)
 	else
 		swapcode(char, a, b, n)
 }
 
 #define	swap(a, b)					\
-	if (swaptype == 0) {				\
+	if (swaptype_long == 0) {			\
 		long t = *(long *)(a);			\
 		*(long *)(a) = *(long *)(b);		\
 		*(long *)(b) = t;			\
+	} else if (swaptype_int == 0) {			\
+		int t = *(int *)(a);			\
+		*(int *)(a) = *(int *)(b);		\
+		*(int *)(b) = t;			\
 	} else						\
-		swapfunc(a, b, es, swaptype)
+		swapfunc(a, b, es, swaptype_long, swaptype_int)
 
-#define vecswap(a, b, n) 	if ((n) > 0) swapfunc(a, b, n, swaptype)
+#define	vecswap(a, b, n)				\
+	if ((n) > 0) swapfunc(a, b, n, swaptype_long, swaptype_int)
 
 #ifdef I_AM_QSORT_R
 #define	CMP(t, x, y) (cmp((t), (x), (y)))
@@ -113,9 +121,10 @@ qsort(void *a, size_t n, size_t es, cmp_t *cmp)
 	char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
 	size_t d, r;
 	int cmp_result;
-	int swaptype, swap_cnt;
+	int swaptype_long, swaptype_int, swap_cnt;
 
-loop:	SWAPINIT(a, es);
+loop:	SWAPINIT(long, a, es);
+	SWAPINIT(int, a, es);
 	swap_cnt = 0;
 	if (n < 7) {
 		for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
@@ -175,9 +184,9 @@ loop:	SWAPINIT(a, es);
 	}
 
 	pn = (char *)a + n * es;
-	r = min(pa - (char *)a, pb - pa);
+	r = MIN(pa - (char *)a, pb - pa);
 	vecswap(a, pb - r, r);
-	r = min(pd - pc, pn - pd - es);
+	r = MIN(pd - pc, pn - pd - es);
 	vecswap(pb, pn - r, r);
 	if ((r = pb - pa) > es)
 #ifdef I_AM_QSORT_R

lib/libc/sys/cap_ioctls_limit.2

@@ -28,7 +28,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd March 27, 2014
+.Dd March 6, 2015
 .Dt CAP_IOCTLS_LIMIT 2
 .Os
 .Sh NAME
@@ -61,6 +61,8 @@ argument specifies the number of elements in the array.
 There can be up to
 .Va 256
 elements in the array.
+Including an element that has been previously revoked will generate an error.
+After a successful call only those listed in the array may be used.
 .Pp
 The list of allowed ioctl commands for a given file descriptor can be obtained
 with the
@@ -92,7 +94,7 @@ system call was never called for this file descriptor), the
 .Fn cap_ioctls_get
 system call will return
 .Dv CAP_IOCTLS_ALL
-and won't modify the buffer pointed to by the
+and will not modify the buffer pointed to by the
 .Fa cmds
 argument.
 .Sh RETURN VALUES

lib/libcompiler_rt/Makefile

@@ -55,12 +55,18 @@ SRCF=	absvdi2 \
 	fixdfti \
 	fixsfdi \
 	fixsfti \
+	fixtfdi \
+	fixtfsi \
+	fixtfti \
 	fixunsdfdi \
 	fixunsdfsi \
 	fixunsdfti \
 	fixunssfdi \
 	fixunssfsi \
 	fixunssfti \
+	fixunstfdi \
+	fixunstfsi \
+	fixunstfti \
 	fixunsxfdi \
 	fixunsxfsi \
 	fixunsxfti \

lib/libgpio/gpio.3

@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 17, 2014
+.Dd March 8, 2015
 .Dt GPIO 3
 .Os
 .Sh NAME
@@ -43,41 +43,43 @@
 .Ft void
 .Fn gpio_close "gpio_handle_t handle"
 .Ft int
-.Fn gpio_pin_list "gpio_handle_t handle, gpio_config_t **pcfgs"
+.Fn gpio_pin_list "gpio_handle_t handle" "gpio_config_t **pcfgs"
 .Ft int
-.Fn gpio_pin_config "gpio_handle_t handle, gpio_config *cfg"
+.Fn gpio_pin_config "gpio_handle_t handle" "gpio_config_t *cfg"
 .Ft int
-.Fn gpio_pin_set_flags "gpio_handle_t handle, gpio_config_t *cfg"
+.Fn gpio_pin_set_name "gpio_handle_t handle" "gpio_pin_t pin" "char *name"
+.Ft int
+.Fn gpio_pin_set_flags "gpio_handle_t handle" "gpio_config_t *cfg"
 .Ft gpio_value_t
-.Fn gpio_pin_get "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_get "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_set "gpio_handle_t handle, gpio_pin_t pin, gpio_value_t value"
+.Fn gpio_pin_set "gpio_handle_t handle" "gpio_pin_t pin" "gpio_value_t value"
 .Ft int
-.Fn gpio_pin_toggle "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_toggle "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_low "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_low "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_high "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_high "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_input "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_input "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_output "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_output "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_opendrain "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_opendrain "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pushpull "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pushpull "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_tristate "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_tristate "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pullup "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pullup "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pulldown "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pulldown "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_invin "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_invin "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_invout "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_invout "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pulsate "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pulsate "gpio_handle_t handle" "gpio_pin_t pin"
 .Sh DESCRIPTION
 The
 .Nm libgpio
@@ -99,7 +101,7 @@ This function takes a pointer to a
 which is dynamically allocated.
 This pointer should be freed with
 .Xr free 3
-when it's no longer necessary.
+when it is no longer necessary.
 .Pp
 The function
 .Fn gpio_pin_config
@@ -111,6 +113,10 @@ variable which is part of the
 structure.
 .Pp
 The function
+.Fn gpio_pin_set_name
+sets the name used to describe a pin.
+.Pp
+The function
 .Fn gpio_pin_set_flags
 configures a pin with the flags passed in by the
 .Ft gpio_config_t

lib/libgpio/gpio.c

@@ -118,6 +118,22 @@ gpio_pin_config(gpio_handle_t handle, gpio_config_t *cfg)
 	return (0);
 }
 
+int
+gpio_pin_set_name(gpio_handle_t handle, gpio_pin_t pin, char *name)
+{
+	struct gpio_pin gppin;
+
+	if (name == NULL)
+		return (-1);
+	bzero(&gppin, sizeof(gppin));
+	gppin.gp_pin = pin;
+	strlcpy(gppin.gp_name, name, GPIOMAXNAME);
+	if (ioctl(handle, GPIOSETNAME, &gppin) < 0)
+		return (-1);
+
+	return (0);
+}
+
 int
 gpio_pin_set_flags(gpio_handle_t handle, gpio_config_t *cfg)
 {

lib/libgpio/libgpio.h

@@ -70,6 +70,11 @@ int		gpio_pin_list(gpio_handle_t, gpio_config_t **);
  * passed through the gpio_config_t structure.
  */
 int		gpio_pin_config(gpio_handle_t, gpio_config_t *);
+/*
+ * Sets the GPIO pin name.  The pin number and pin name to be set are passed
+ * as parameters.
+ */
+int		gpio_pin_set_name(gpio_handle_t, gpio_pin_t, char *);
 /*
  * Sets the GPIO flags on a specific GPIO pin.  The pin number and the flags
  * to be set are passed through the gpio_config_t structure.

lib/libnv/tests/dnv_tests.cc

@@ -450,7 +450,7 @@ ATF_TEST_CASE_BODY(dnvlist_take_nvlist__empty)
 	nvl = nvlist_create(0);
 
 	actual_val = dnvlist_take_nvlist(nvl, "123", NULL);
-	ATF_REQUIRE_EQ(actual_val, NULL);
+	ATF_REQUIRE_EQ(actual_val, static_cast<nvlist_t *>(NULL));
 
 	free(actual_val);
 	nvlist_destroy(nvl);

lib/libnv/tests/nv_tests.cc

@@ -54,7 +54,7 @@ ATF_TEST_CASE_BODY(nvlist_create__is_empty)
 	ATF_REQUIRE(nvlist_empty(nvl));
 
 	it = NULL;
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -85,7 +85,7 @@ ATF_TEST_CASE_BODY(nvlist_add_null__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NULL);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -118,7 +118,7 @@ ATF_TEST_CASE_BODY(nvlist_add_bool__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_BOOL);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -153,7 +153,7 @@ ATF_TEST_CASE_BODY(nvlist_add_number__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NUMBER);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -191,7 +191,7 @@ ATF_TEST_CASE_BODY(nvlist_add_string__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_STRING);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -237,7 +237,7 @@ ATF_TEST_CASE_BODY(nvlist_add_nvlist__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NVLIST);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(sublist);
 	nvlist_destroy(nvl);
@@ -303,7 +303,7 @@ ATF_TEST_CASE_BODY(nvlist_add_binary__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_BINARY);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 	free(value);
@@ -352,7 +352,7 @@ ATF_TEST_CASE_BODY(nvlist_clone__nonempty_nvlist)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(clone, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NUMBER);
-	ATF_REQUIRE_EQ(nvlist_next(clone, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(clone, &type, &it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(clone);
 	nvlist_destroy(nvl);
@@ -400,13 +400,13 @@ verify_test_nvlist(const nvlist_t *nvl)
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(value, &type, &it),
 	    test_string_key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_STRING);
-	ATF_REQUIRE_EQ(nvlist_next(value, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(value, &type, &it), static_cast<const char *>(NULL));
 
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it),
 	    test_subnvlist_key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NVLIST);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), static_cast<const char *>(NULL));
 }
 
 ATF_TEST_CASE_WITHOUT_HEAD(nvlist_clone__nested_nvlist);

lib/libpmc/libpmc.c

@@ -325,7 +325,7 @@ PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
 PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);
 PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap);
 PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap);
-PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell, iap);
+PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell_xeon, iap);
 PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap);
 PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap);
 PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap);

lib/libpmc/pmc.3

@@ -527,6 +527,7 @@ API is
 .Xr pmc.core2 3 ,
 .Xr pmc.haswell 3 ,
 .Xr pmc.haswelluc 3 ,
+.Xr pmc.haswellxeon 3 ,
 .Xr pmc.iaf 3 ,
 .Xr pmc.ivybridge 3 ,
 .Xr pmc.ivybridgexeon 3 ,

lib/libpmc/pmc.haswell.3

@@ -529,73 +529,60 @@ instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
+.It Li BR_INST_EXEC.NONTAKEN_COND
-.Pq Event 88H , Umask 01H
+.Pq Event 88H , Umask 41H
-Qualify conditional near branch instructions
+Count conditional near branch instructions that were executed (but not
-executed, but not necessarily retired.
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
+.Pq Event 88H , Umask 82H
-Qualify all unconditional near branch instructions
+Count all unconditional near branch instructions excluding calls and
-excluding calls and indirect branches.
+indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
+.Pq Event 88H , Umask 84H
-Qualify executed indirect near branch instructions
+Count executed indirect near branch instructions that are not calls nor
-that are not calls nor returns.
+returns.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
+.Pq Event 88H , Umask 88H
-Qualify indirect near branches that have a return
+Count indirect near branches that have a return mnemonic.
-mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
+.Pq Event 88H , Umask 90H
-Qualify unconditional near call branch instructions,
+Count unconditional near call branch instructions, excluding non call
-excluding non call branch, executed.
+branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
+.Pq Event 88H , Umask A0H
-Qualify indirect near calls, including both register and
+Count indirect near calls, including both register and memory indirect,
-memory indirect, executed.
+executed.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine
-with 01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
-Counts all near executed branches (not necessarily
+Counts all near executed branches (not necessarily retired).
-retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
-.It Li BR_MISP_EXEC.COND
+.Pq Event 89H , Umask 41H
-.Pq Event 89H , Umask 01H
+Count conditional near branch instructions mispredicted as nontaken.
-Qualify conditional near branch instructions
+.It Li BR_MISP_EXEC.TAKEN_COND
-mispredicted.
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
+.Pq Event 89H , Umask 84H
-Qualify mispredicted indirect near branch
+Count mispredicted indirect near branch instructions that are not calls
-instructions that are not calls nor returns.
+nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
+.Pq Event 89H , Umask 88H
-Qualify mispredicted indirect near branches that
+Count mispredicted indirect near branches that have a return mnemonic.
-have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
+.Pq Event 89H , Umask 90H
-Qualify mispredicted unconditional near call branch
+Count mispredicted unconditional near call branch instructions, excluding
-instructions, excluding non call branch, executed.
+non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
+.Pq Event 89H , Umask A0H
-Qualify mispredicted indirect near calls, including
+Count mispredicted indirect near calls, including both register and memory
-both register and memory indirect, executed.
+indirect, executed.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches
-executed.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily
+Counts all mispredicted near executed branches (not necessarily retired).
-retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per
@@ -821,30 +808,24 @@ Count cases of saving new LBR records by hardware.
 Randomly sampled loads whose latency is above a
 user defined threshold. A small fraction of the overall
 loads are sampled due to randomization.
-.It Li MEM_UOP_RETIRED.LOADS
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
-.Pq Event D0H , Umask 01H
+.Pq Event D0H , Umask 11H
-Qualify retired memory uops that are loads. Combine Supports PEBS and
+Count retired load uops that missed the STLB.
-with umask 10H, 20H, 40H, 80H.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
-.It Li MEM_UOP_RETIRED.STORES
+.Pq Event D0H , Umask 12H
-.Pq Event D0H , Umask 02H
+Count retired store uops that missed the STLB.
-Qualify retired memory uops that are stores.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
-Combine with umask 10H, 20H, 40H, 80H.
+.Pq Event D0H , Umask 41H
-.It Li MEM_UOP_RETIRED.STLB_MISS
+Count retired load uops that were split across a cache line.
-.Pq Event D0H , Umask 10H
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
-Qualify retired memory uops with STLB miss. Must
+.Pq Event D0H , Umask 42H
-combine with umask 01H, 02H, to produce counts.
+Count retired store uops that were split across a cache line.
-.It Li MEM_UOP_RETIRED.LOCK
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
-.Pq Event D0H , Umask 20H
+.Pq Event D0H , Umask 81H
-Qualify retired memory uops with lock. Must combine Supports PEBS and
+Count all retired load uops.
-with umask 01H, 02H, to produce counts.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
-.It Li MEM_UOP_RETIRED.SPLIT
+.Pq Event D0H , Umask 82H
-.Pq Event D0H , Umask 40H
+Count all retired store uops.
-Qualify retired memory uops with line split. Must
-combine with umask 01H, 02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with Supports PEBS and
-umask 01H, 02H, to produce counts.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.

lib/libpmc/pmc.haswellxeon.3

@@ -0,0 +1,956 @@
+.\"
+.\" Copyright (c) 2013 Hiren Panchasara <hiren.panchasara@gmail.com>
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $FreeBSD$
+.\"
+.Dd 21 November, 2014
+.Dt PMC.HASWELLXEON 3
+.Os
+.Sh NAME
+.Nm pmc.haswellxeon
+.Nd measurement events for
+.Tn Intel
+.Tn Haswell Xeon
+family CPUs
+.Sh LIBRARY
+.Lb libpmc
+.Sh SYNOPSIS
+.In pmc.h
+.Sh DESCRIPTION
+.Tn Intel
+.Tn "Haswell"
+CPUs contain PMCs conforming to version 2 of the
+.Tn Intel
+performance measurement architecture.
+These CPUs may contain up to two classes of PMCs:
+.Bl -tag -width "Li PMC_CLASS_IAP"
+.It Li PMC_CLASS_IAF
+Fixed-function counters that count only one hardware event per counter.
+.It Li PMC_CLASS_IAP
+Programmable counters that may be configured to count one of a defined
+set of hardware events.
+.El
+.Pp
+The number of PMCs available in each class and their widths need to be
+determined at run time by calling
+.Xr pmc_cpuinfo 3 .
+.Pp
+Intel Haswell Xeon PMCs are documented in
+.Rs
+.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
+.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C"
+.%N "Order Number: 325462-052US"
+.%D September 2014
+.%Q "Intel Corporation"
+.Re
+.Ss HASWELL FIXED FUNCTION PMCS
+These PMCs and their supported events are documented in
+.Xr pmc.iaf 3 .
+.Ss HASWELL PROGRAMMABLE PMCS
+The programmable PMCs support the following capabilities:
+.Bl -column "PMC_CAP_INTERRUPT" "Support"
+.It Em Capability Ta Em Support
+.It PMC_CAP_CASCADE Ta \&No
+.It PMC_CAP_EDGE Ta Yes
+.It PMC_CAP_INTERRUPT Ta Yes
+.It PMC_CAP_INVERT Ta Yes
+.It PMC_CAP_READ Ta Yes
+.It PMC_CAP_PRECISE Ta \&No
+.It PMC_CAP_SYSTEM Ta Yes
+.It PMC_CAP_TAGGING Ta \&No
+.It PMC_CAP_THRESHOLD Ta Yes
+.It PMC_CAP_USER Ta Yes
+.It PMC_CAP_WRITE Ta Yes
+.El
+.Ss Event Qualifiers
+Event specifiers for these PMCs support the following common
+qualifiers:
+.Bl -tag -width indent
+.It Li rsp= Ns Ar value
+Configure the Off-core Response bits.
+.Bl -tag -width indent
+.It Li DMND_DATA_RD
+Counts the number of demand and DCU prefetch data reads of full
+and partial cachelines as well as demand data page table entry
+cacheline reads. Does not count L2 data read prefetches or
+instruction fetches.
+.It Li REQ_DMND_RFO
+Counts the number of demand and DCU prefetch reads for ownership (RFO)
+requests generated by a write to data cacheline. Does not count L2 RFO
+prefetches.
+.It Li REQ_DMND_IFETCH
+Counts the number of demand and DCU prefetch instruction cacheline reads.
+Does not count L2 code read prefetches.
+.It Li REQ_WB
+Counts the number of writeback (modified to exclusive) transactions.
+.It Li REQ_PF_DATA_RD
+Counts the number of data cacheline reads generated by L2 prefetchers.
+.It Li REQ_PF_RFO
+Counts the number of RFO requests generated by L2 prefetchers.
+.It Li REQ_PF_IFETCH
+Counts the number of code reads generated by L2 prefetchers.
+.It Li REQ_PF_LLC_DATA_RD
+L2 prefetcher to L3 for loads.
+.It Li REQ_PF_LLC_RFO
+RFO requests generated by L2 prefetcher
+.It Li REQ_PF_LLC_IFETCH
+L2 prefetcher to L3 for instruction fetches.
+.It Li REQ_BUS_LOCKS
+Bus lock and split lock requests.
+.It Li REQ_STRM_ST
+Streaming store requests.
+.It Li REQ_OTHER
+Any other request that crosses IDI, including I/O.
+.It Li RES_ANY
+Catch all value for any response types.
+.It Li RES_SUPPLIER_NO_SUPP
+No Supplier Information available.
+.It Li RES_SUPPLIER_LLC_HITM
+M-state initial lookup stat in L3.
+.It Li RES_SUPPLIER_LLC_HITE
+E-state.
+.It Li RES_SUPPLIER_LLC_HITS
+S-state.
+.It Li RES_SUPPLIER_LLC_HITF
+F-state.
+.It Li RES_SUPPLIER_LOCAL
+Local DRAM Controller.
+.It Li RES_SNOOP_SNP_NONE
+No details on snoop-related information.
+.It Li RES_SNOOP_SNP_NO_NEEDED
+No snoop was needed to satisfy the request.
+.It Li RES_SNOOP_SNP_MISS
+A snoop was needed and it missed all snooped caches:
+-For LLC Hit, ReslHitl was returned by all cores
+-For LLC Miss, Rspl was returned by all sockets and data was returned from
+DRAM.
+.It Li RES_SNOOP_HIT_NO_FWD
+A snoop was needed and it hits in at least one snooped cache. Hit denotes a
+cache-line was valid before snoop effect. This includes:
+-Snoop Hit w/ Invalidation (LLC Hit, RFO)
+-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD)
+-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S)
+In the LLC Miss case, data is returned from DRAM.
+.It Li RES_SNOOP_HIT_FWD
+A snoop was needed and data was forwarded from a remote socket.
+This includes:
+-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT).
+.It Li RES_SNOOP_HITM
+A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a
+cache-line was in modified state before effect as a results of snoop. This
+includes:
+-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD)
+-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO)
+-Snoop MtoS (LLC Hit, IFetch/Data_RD).
+.It Li RES_NON_DRAM
+Target was non-DRAM system address. This includes MMIO transactions.
+.El
+.It Li cmask= Ns Ar value
+Configure the PMC to increment only if the number of configured
+events measured in a cycle is greater than or equal to
+.Ar value .
+.It Li edge
+Configure the PMC to count the number of de-asserted to asserted
+transitions of the conditions expressed by the other qualifiers.
+If specified, the counter will increment only once whenever a
+condition becomes true, irrespective of the number of clocks during
+which the condition remains true.
+.It Li inv
+Invert the sense of comparison when the
+.Dq Li cmask
+qualifier is present, making the counter increment when the number of
+events per cycle is less than the value specified by the
+.Dq Li cmask
+qualifier.
+.It Li os
+Configure the PMC to count events happening at processor privilege
+level 0.
+.It Li usr
+Configure the PMC to count events occurring at privilege levels 1, 2
+or 3.
+.El
+.Pp
+If neither of the
+.Dq Li os
+or
+.Dq Li usr
+qualifiers are specified, the default is to enable both.
+.Ss Event Specifiers (Programmable PMCs)
+Haswell programmable PMCs support the following events:
+.Bl -tag -width indent
+.It Li LD_BLOCKS.STORE_FORWARD
+.Pq Event 03H , Umask 02H
+Loads blocked by overlapping with store buffer that
+cannot be forwarded.
+.It Li MISALIGN_MEM_REF.LOADS
+.Pq Event 05H , Umask 01H
+Speculative cache-line split load uops dispatched to
+L1D.
+.It Li MISALIGN_MEM_REF.STORES
+.Pq Event 05H , Umask 02H
+Speculative cache-line split Store-address uops
+dispatched to L1D.
+.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS
+.Pq Event 07H , Umask 01H
+False dependencies in MOB due to partial compare
+on address.
+.It Li DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 08H , Umask 01H
+Misses in all TLB levels that cause a page walk of any
+page size.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_4K
+.Pq Event 08H , Umask 02H
+Completed page walks due to demand load misses
+that caused 4K page walks in any TLB levels.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K
+.Pq Event 08H , Umask 02H
+Completed page walks due to demand load misses
+that caused 2M/4M page walks in any TLB levels.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED
+.Pq Event 08H , Umask 0EH
+Completed page walks in any TLB of any page size
+due to demand load misses
+.It Li DTLB_LOAD_MISSES.WALK_DURATION
+.Pq Event 08H , Umask 10H
+Cycle PMH is busy with a walk.
+.It Li DTLB_LOAD_MISSES.STLB_HIT_4K
+.Pq Event 08H , Umask 20H
+Load misses that missed DTLB but hit STLB (4K).
+.It Li DTLB_LOAD_MISSES.STLB_HIT_2M
+.Pq Event 08H , Umask 40H
+Load misses that missed DTLB but hit STLB (2M).
+.It Li DTLB_LOAD_MISSES.STLB_HIT
+.Pq Event 08H , Umask 60H
+Number of cache load STLB hits. No page walk.
+.It Li DTLB_LOAD_MISSES.PDE_CACHE_MISS
+.Pq Event 08H , Umask 80H
+DTLB demand load misses with low part of linear-to-
+physical address translation missed
+.It Li INT_MISC.RECOVERY_CYCLES
+.Pq Event 0DH , Umask 03H
+Cycles waiting to recover after Machine Clears
+except JEClear. Set Cmask= 1.
+.It Li UOPS_ISSUED.ANY
+.Pq Event 0EH , Umask 01H
+ncrements each cycle the # of Uops issued by the
+RAT to RS.
+Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles
+of this core.
+.It Li UOPS_ISSUED.FLAGS_MERGE
+.Pq Event 0EH , Umask 10H
+Number of flags-merge uops allocated. Such uops
+adds delay.
+.It Li UOPS_ISSUED.SLOW_LEA
+.Pq Event 0EH , Umask 20H
+Number of slow LEA or similar uops allocated. Such
+uop has 3 sources (e.g. 2 sources + immediate)
+regardless if as a result of LEA instruction or not.
+.It Li UOPS_ISSUED.SiNGLE_MUL
+.Pq Event 0EH , Umask 40H
+Number of multiply packed/scalar single precision
+uops allocated.
+.It Li L2_RQSTS.DEMAND_DATA_RD_MISS
+.Pq Event 24H , Umask 21H
+Demand Data Read requests that missed L2, no
+rejects.
+.It Li L2_RQSTS.DEMAND_DATA_RD_HIT
+.Pq Event 24H , Umask 41H
+Demand Data Read requests that hit L2 cache.
+.It Li L2_RQSTS.ALL_DEMAND_DATA_RD
+.Pq Event 24H , Umask E1H	
+Counts any demand and L1 HW prefetch data load
+requests to L2.
+.It Li L2_RQSTS.RFO_HIT
+.Pq Event 24H , Umask 42H
+Counts the number of store RFO requests that hit
+the L2 cache.
+.It Li L2_RQSTS.RFO_MISS
+.Pq Event 24H , Umask 22H
+Counts the number of store RFO requests that miss
+the L2 cache.
+.It Li L2_RQSTS.ALL_RFO
+.Pq Event 24H , Umask E2H
+Counts all L2 store RFO requests.
+.It Li L2_RQSTS.CODE_RD_HIT
+.Pq Event 24H , Umask 44H
+Number of instruction fetches that hit the L2 cache.
+.It Li L2_RQSTS.CODE_RD_MISS
+.Pq Event 24H , Umask 24H
+Number of instruction fetches that missed the L2
+cache.
+.It Li L2_RQSTS.ALL_DEMAND_MISS
+.Pq Event 24H , Umask 27H
+Demand requests that miss L2 cache.
+.It Li L2_RQSTS.ALL_DEMAND_REFERENCES
+.Pq Event 24H , Umask E7H
+Demand requests to L2 cache.
+.It Li L2_RQSTS.ALL_CODE_RD
+.Pq Event 24H , Umask E4H
+Counts all L2 code requests.
+.It Li L2_RQSTS.L2_PF_HIT
+.Pq Event 24H , Umask 50H
+Counts all L2 HW prefetcher requests that hit L2.
+.It Li L2_RQSTS.L2_PF_MISS
+.Pq Event 24H , Umask 30H
+Counts all L2 HW prefetcher requests that missed
+L2.
+.It Li L2_RQSTS.ALL_PF
+.Pq Event 24H , Umask F8H
+Counts all L2 HW prefetcher requests.
+.It Li L2_RQSTS.MISS
+.Pq Event 24H , Umask 3FH
+All requests that missed L2.
+.It Li L2_RQSTS.REFERENCES
+.Pq Event 24H , Umask FFH
+All requests to L2 cache.
+.It Li L2_DEMAND_RQSTS.WB_HIT
+.Pq Event 27H , Umask 50H
+Not rejected writebacks that hit L2 cache
+.It Li LONGEST_LAT_CACHE.REFERENCE
+.Pq Event 2EH , Umask 4FH
+This event counts requests originating from the core
+that reference a cache line in the last level cache.
+.It Li LONGEST_LAT_CACHE.MISS
+.Pq Event 2EH , Umask 41H
+This event counts each cache miss condition for
+references to the last level cache.
+.It Li CPU_CLK_UNHALTED.THREAD_P
+.Pq Event 3CH , Umask 00H
+Counts the number of thread cycles while the thread
+is not in a halt state. The thread enters the halt state
+when it is running the HLT instruction. The core
+frequency may change from time to time due to
+power or thermal throttling.
+.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK
+.Pq Event 3CH , Umask 01H
+Increments at the frequency of XCLK (100 MHz)
+when not halted.
+.It Li L1D_PEND_MISS.PENDING
+.Pq Event 48H , Umask 01H
+Increments the number of outstanding L1D misses
+every cycle. Set Cmaks = 1 and Edge =1 to count
+occurrences.
+.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 49H , Umask 01H
+Miss in all TLB levels causes an page walk of any
+page size (4K/2M/4M/1G).
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED_4K
+.Pq Event 49H , Umask 02H
+Completed page walks due to store misses in one or
+more TLB levels of 4K page structure.
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M
+.Pq Event 49H , Umask 04H
+Completed page walks due to store misses in one or
+more TLB levels of 2M/4M page structure.
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED
+.Pq Event 49H , Umask 0EH
+Completed page walks due to store miss in any TLB
+levels of any page size (4K/2M/4M/1G).
+.It Li DTLB_STORE_MISSES.WALK_DURATION
+.Pq Event 49H , Umask 10H
+Cycles PMH is busy with this walk.
+.It Li DTLB_STORE_MISSES.STLB_HIT_4K
+.Pq Event 49H , Umask 20H
+Store misses that missed DTLB but hit STLB (4K).
+.It Li DTLB_STORE_MISSES.STLB_HIT_2M
+.Pq Event 49H , Umask 40H
+Store misses that missed DTLB but hit STLB (2M).
+.It Li DTLB_STORE_MISSES.STLB_HIT
+.Pq Event 49H , Umask 60H
+Store operations that miss the first TLB level but hit
+the second and do not cause page walks.
+.It Li DTLB_STORE_MISSES.PDE_CACHE_MISS
+.Pq Event 49H , Umask 80H
+DTLB store misses with low part of linear-to-physical
+address translation missed.
+.It Li LOAD_HIT_PRE.SW_PF
+.Pq Event 4CH , Umask 01H
+Non-SW-prefetch load dispatches that hit fill buffer
+allocated for S/W prefetch.
+.It Li LOAD_HIT_PRE.HW_PF
+.Pq Event 4CH , Umask 02H
+Non-SW-prefetch load dispatches that hit fill buffer
+allocated for H/W prefetch.
+.It Li L1D.REPLACEMENT
+.Pq Event 51H , Umask 01H
+Counts the number of lines brought into the L1 data
+cache.
+.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED
+.Pq Event 58H , Umask 04H
+Number of integer Move Elimination candidate uops
+that were not eliminated.
+.It Li MOVE_ELIMINATION.SMID_NOT_ELIMINATED
+.Pq Event 58H , Umask 08H
+Number of SIMD Move Elimination candidate uops
+that were not eliminated.
+.It Li MOVE_ELIMINATION.INT_ELIMINATED
+.Pq Event 58H , Umask 01H
+Unhalted core cycles when the thread is in ring 0.
+.It Li MOVE_ELIMINATION.SMID_ELIMINATED
+.Pq Event 58H , Umask 02H
+Number of SIMD Move Elimination candidate uops
+that were eliminated.
+.It Li CPL_CYCLES.RING0
+.Pq Event 5CH , Umask 02H
+Unhalted core cycles when the thread is in ring 0.
+.It Li CPL_CYCLES.RING123
+.Pq Event 5CH , Umask 01H
+Unhalted core cycles when the thread is not in ring 0.
+.It Li RS_EVENTS.EMPTY_CYCLES
+.Pq Event 5EH , Umask 01H
+Cycles the RS is empty for the thread.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD
+.Pq Event 60H , Umask 01H
+Offcore outstanding Demand Data Read transactions
+in SQ to uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD
+.Pq Event 60H , Umask 02H
+Offcore outstanding Demand code Read transactions
+in SQ to uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO
+.Pq Event 60H , Umask 04H
+Offcore outstanding RFO store transactions in SQ to
+uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD
+.Pq Event 60H , Umask 08H
+Offcore outstanding cacheable data read
+transactions in SQ to uncore. Set Cmask=1 to count
+cycles.
+.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION
+.Pq Event 63H , Umask 01H
+Cycles in which the L1D and L2 are locked, due to a
+UC lock or split lock.
+.It Li LOCK_CYCLES.CACHE_LOCK_DURATION
+.Pq Event 63H , Umask 02H
+Cycles in which the L1D is locked.
+.It Li IDQ.EMPTY
+.Pq Event 79H , Umask 02H
+Counts cycles the IDQ is empty.
+.It Li IDQ.MITE_UOPS
+.Pq Event 79H , Umask 04H
+Increment each cycle # of uops delivered to IDQ from
+MITE path.
+Set Cmask = 1 to count cycles.
+.It Li IDQ.DSB_UOPS
+.Pq Event 79H , Umask 08H
+Increment each cycle. # of uops delivered to IDQ
+from DSB path.
+Set Cmask = 1 to count cycles.
+.It Li IDQ.MS_DSB_UOPS
+.Pq Event 79H , Umask 10H
+Increment each cycle # of uops delivered to IDQ
+when MS_busy by DSB. Set Cmask = 1 to count
+cycles. Add Edge=1 to count # of delivery.
+.It Li IDQ.MS_MITE_UOPS
+.Pq Event 79H , Umask 20H
+ncrement each cycle # of uops delivered to IDQ
+when MS_busy by MITE. Set Cmask = 1 to count
+cycles.
+.It Li IDQ.MS_UOPS
+.Pq Event 79H , Umask 30H
+Increment each cycle # of uops delivered to IDQ from
+MS by either DSB or MITE. Set Cmask = 1 to count
+cycles.
+.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS
+.Pq Event 79H , Umask 18H
+Counts cycles DSB is delivered at least one uops. Set
+Cmask = 1.
+.It Li IDQ.ALL_DSB_CYCLES_4_UOPS
+.Pq Event 79H , Umask 18H
+Counts cycles DSB is delivered four uops. Set Cmask
+=4.
+.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS
+.Pq Event 79H , Umask 24H
+Counts cycles MITE is delivered at least one uops. Set
+Cmask = 1.
+.It Li IDQ.ALL_MITE_CYCLES_4_UOPS
+.Pq Event 79H , Umask 24H
+Counts cycles MITE is delivered four uops. Set Cmask
+=4.
+.It Li IDQ.MITE_ALL_UOPS
+.Pq Event 79H , Umask 3CH
+# of uops delivered to IDQ from any path.
+.It Li ICACHE.MISSES
+.Pq Event 80H , Umask 02H
+Number of Instruction Cache, Streaming Buffer and
+Victim Cache Misses. Includes UC accesses.
+.It Li ITLB_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 85H , Umask 01H
+Misses in ITLB that causes a page walk of any page
+size.
+.It Li ITLB_MISSES.WALK_COMPLETED_4K
+.Pq Event 85H , Umask 02H
+Completed page walks due to misses in ITLB 4K page
+entries.
+.It Li TLB_MISSES.WALK_COMPLETED_2M_4M
+.Pq Event 85H , Umask 04H
+Completed page walks due to misses in ITLB 2M/4M
+page entries.
+.It Li ITLB_MISSES.WALK_COMPLETED
+.Pq Event 85H , Umask 0EH
+Completed page walks in ITLB of any page size.
+.It Li ITLB_MISSES.WALK_DURATION
+.Pq Event 85H , Umask 10H
+Cycle PMH is busy with a walk.
+.It Li ITLB_MISSES.STLB_HIT_4K
+.Pq Event 85H , Umask 20H
+ITLB misses that hit STLB (4K).
+.It Li ITLB_MISSES.STLB_HIT_2M
+.Pq Event 85H , Umask 40H
+ITLB misses that hit STLB (2K).
+.It Li ITLB_MISSES.STLB_HIT
+.Pq Event 85H , Umask 60H
+TLB misses that hit STLB. No page walk.
+.It Li ILD_STALL.LCP
+.Pq Event 87H , Umask 01H
+Stalls caused by changing prefix length of the
+instruction.
+.It Li ILD_STALL.IQ_FULL
+.Pq Event 87H , Umask 04H
+Stall cycles due to IQ is full.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
+.It Li BR_INST_EXEC.DIRECT_JMP
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
+indirect branches.
+.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
+returns.
+.It Li BR_INST_EXEC.RETURN_NEAR
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
+.It Li BR_INST_EXEC.DIRECT_NEAR_CALL
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
+branch, executed.
+.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
+executed.
+.It Li BR_INST_EXEC.ALL_BRANCHES
+.Pq Event 88H , Umask FFH
+Counts all near executed branches (not necessarily retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
+.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
+nor returns.
+.It Li BR_MISP_EXEC.RETURN_NEAR
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
+.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
+non call branch, executed.
+.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
+indirect, executed.
+.It Li BR_MISP_EXEC.ALL_BRANCHES
+.Pq Event 89H , Umask FFH
+Counts all mispredicted near executed branches (not necessarily retired).
+.It Li IDQ_UOPS_NOT_DELIVERED.CORE
+.Pq Event 9CH , Umask 01H
+Count number of non-delivered uops to RAT per
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_0
+.Pq Event A1H , Umask 01H
+Cycles which a Uop is dispatched on port 0 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_1
+.Pq Event A1H , Umask 02H
+Cycles which a Uop is dispatched on port 1 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_2
+.Pq Event A1H , Umask 04H
+Cycles which a Uop is dispatched on port 2 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_3
+.Pq Event A1H , Umask 08H
+Cycles which a Uop is dispatched on port 3 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_4
+.Pq Event A1H , Umask 10H
+Cycles which a Uop is dispatched on port 4 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_5
+.Pq Event A1H , Umask 20H
+Cycles which a Uop is dispatched on port 5 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_6
+.Pq Event A1H , Umask 40H
+Cycles which a Uop is dispatched on port 6 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_7
+.Pq Event A1H , Umask 80H
+Cycles which a Uop is dispatched on port 7 in this
+thread.
+.It Li RESOURCE_STALLS.ANY
+.Pq Event A2H , Umask 01H
+Cycles Allocation is stalled due to Resource Related
+reason.
+.It Li RESOURCE_STALLS.RS
+.Pq Event A2H , Umask 04H
+Cycles stalled due to no eligible RS entry available.
+.It Li RESOURCE_STALLS.SB
+.Pq Event A2H , Umask 08H
+Cycles stalled due to no store buffers available (not
+including draining form sync).
+.It Li RESOURCE_STALLS.ROB
+.Pq Event A2H , Umask 10H
+Cycles stalled due to re-order buffer full.
+.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING
+.Pq Event A3H , Umask 01H
+Cycles with pending L2 miss loads. Set Cmask=2 to
+count cycle.
+.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING
+.Pq Event A3H , Umask 02H
+Cycles with pending memory loads. Set Cmask=2 to
+count cycle.
+.It Li CYCLE_ACTIVITY.STALLS_L2_PENDING
+.Pq Event A3H , Umask 05H
+Number of loads missed L2.
+.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING
+.Pq Event A3H , Umask 08H
+Cycles with pending L1 cache miss loads. Set
+Cmask=8 to count cycle.
+.It Li ITLB.ITLB_FLUSH
+.Pq Event AEH , Umask 01H
+Counts the number of ITLB flushes, includes
+4k/2M/4M pages.
+.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD
+.Pq Event B0H , Umask 01H
+Demand data read requests sent to uncore.
+.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD
+.Pq Event B0H , Umask 02H
+Demand code read requests sent to uncore.
+.It Li OFFCORE_REQUESTS.DEMAND_RFO
+.Pq Event B0H , Umask 04H
+Demand RFO read requests sent to uncore, including
+regular RFOs, locks, ItoM.
+.It Li OFFCORE_REQUESTS.ALL_DATA_RD
+.Pq Event B0H , Umask 08H
+Data read requests sent to uncore (demand and
+prefetch).
+.It Li UOPS_EXECUTED.CORE
+.Pq Event B1H , Umask 02H
+Counts total number of uops to be executed per-core
+each cycle.
+.It Li OFF_CORE_RESPONSE_0
+.Pq Event B7H , Umask 01H
+Requires MSR 01A6H
+.It Li OFF_CORE_RESPONSE_1
+.Pq Event BBH , Umask 01H
+Requires MSR 01A7H
+.It Li PAGE_WALKER_LOADS.DTLB_L1
+.Pq Event BCH , Umask 11H
+Number of DTLB page walker loads that hit in the
+L1+FB.
+.It Li PAGE_WALKER_LOADS.ITLB_L1
+.Pq Event BCH , Umask 21H
+Number of ITLB page walker loads that hit in the
+L1+FB.
+.It Li PAGE_WALKER_LOADS.DTLB_L2
+.Pq Event BCH , Umask 12H
+Number of DTLB page walker loads that hit in the L2.
+.It Li PAGE_WALKER_LOADS.ITLB_L2
+.Pq Event BCH , Umask 22H
+Number of ITLB page walker loads that hit in the L2.
+.It Li PAGE_WALKER_LOADS.DTLB_L3
+.Pq Event BCH , Umask 14H
+Number of DTLB page walker loads that hit in the L3.
+.It Li PAGE_WALKER_LOADS.ITLB_L3
+.Pq Event BCH , Umask 24H
+Number of ITLB page walker loads that hit in the L3.
+.It Li PAGE_WALKER_LOADS.DTLB_MEMORY
+.Pq Event BCH , Umask 18H
+Number of DTLB page walker loads from memory.
+.It Li PAGE_WALKER_LOADS.ITLB_MEMORY
+.Pq Event BCH , Umask 28H
+Number of ITLB page walker loads from memory.
+.It Li TLB_FLUSH.DTLB_THREAD
+.Pq Event BDH , Umask 01H
+DTLB flush attempts of the thread-specific entries.
+.It Li TLB_FLUSH.STLB_ANY
+.Pq Event BDH , Umask 20H
+Count number of STLB flush attempts.
+.It Li INST_RETIRED.ANY_P
+.Pq Event C0H , Umask 00H
+Number of instructions at retirement.
+.It Li INST_RETIRED.ALL
+.Pq Event C0H , Umask 01H
+Precise instruction retired event with HW to reduce
+effect of PEBS shadow in IP distribution.
+.It Li OTHER_ASSISTS.AVX_TO_SSE
+.Pq Event C1H , Umask 08H
+Number of transitions from AVX-256 to legacy SSE
+when penalty applicable.
+.It Li OTHER_ASSISTS.SSE_TO_AVX
+.Pq Event C1H , Umask 10H
+Number of transitions from SSE to AVX-256 when
+penalty applicable.
+.It Li OTHER_ASSISTS.ANY_WB_ASSIST
+.Pq Event C1H , Umask 40H
+Number of microcode assists invoked by HW upon
+uop writeback.
+.It Li UOPS_RETIRED.ALL
+.Pq Event C2H , Umask 01H
+Counts the number of micro-ops retired, Use
+cmask=1 and invert to count active cycles or stalled
+cycles.
+.It Li UOPS_RETIRED.RETIRE_SLOTS
+.Pq Event C2H , Umask 02H
+Counts the number of retirement slots used each
+cycle.
+.It Li MACHINE_CLEARS.MEMORY_ORDERING
+.Pq Event C3H , Umask 02H
+Counts the number of machine clears due to memory
+order conflicts.
+.It Li MACHINE_CLEARS.SMC
+.Pq Event C3H , Umask 04H
+Number of self-modifying-code machine clears
+detected.
+.It Li MACHINE_CLEARS.MASKMOV
+.Pq Event C3H , Umask 20H
+Counts the number of executed AVX masked load
+operations that refer to an illegal address range with
+the mask bits set to 0.
+.It Li BR_INST_RETIRED.ALL_BRANCHES
+.Pq Event C4H , Umask 00H
+Branch instructions at retirement.
+.It Li BR_INST_RETIRED.CONDITIONAL
+.Pq Event C4H , Umask 01H
+Counts the number of conditional branch instructions Supports PEBS
+retired.
+.It Li BR_INST_RETIRED.NEAR_CALL
+.Pq Event C4H , Umask 02H
+Direct and indirect near call instructions retired.
+.It Li BR_INST_RETIRED.ALL_BRANCHES
+.Pq Event C4H , Umask 04H
+Counts the number of branch instructions retired.
+.It Li BR_INST_RETIRED.NEAR_RETURN
+.Pq Event C4H , Umask 08H
+Counts the number of near return instructions
+retired.
+.It Li BR_INST_RETIRED.NOT_TAKEN
+.Pq Event C4H , Umask 10H
+Counts the number of not taken branch instructions
+retired.
+ It Li BR_INST_RETIRED.NEAR_TAKEN
+.Pq Event C4H , Umask 20H
+Number of near taken branches retired.
+.It Li BR_INST_RETIRED.FAR_BRANCH
+.Pq Event C4H , Umask 40H
+Number of far branches retired.
+.It Li BR_MISP_RETIRED.ALL_BRANCHES
+.Pq Event C5H , Umask 00H
+Mispredicted branch instructions at retirement
+.It Li BR_MISP_RETIRED.CONDITIONAL
+.Pq Event C5H , Umask 01H
+Mispredicted conditional branch instructions retired.
+.It Li BR_MISP_RETIRED.CONDITIONAL
+.Pq Event C5H , Umask 04H
+Mispredicted macro branch instructions retired.
+.It Li FP_ASSIST.X87_OUTPUT
+.Pq Event CAH , Umask 02H
+Number of X87 FP assists due to Output values.
+.It Li FP_ASSIST.X87_INPUT
+.Pq Event CAH , Umask 04H
+Number of X87 FP assists due to input values.
+.It Li FP_ASSIST.SIMD_OUTPUT
+.Pq Event CAH , Umask 08H
+Number of SIMD FP assists due to Output values.
+.It Li FP_ASSIST.SIMD_INPUT
+.Pq Event CAH , Umask 10H
+Number of SIMD FP assists due to input values.
+.It Li FP_ASSIST.ANY
+.Pq Event CAH , Umask 1EH
+Cycles with any input/output SSE* or FP assists.
+.It Li ROB_MISC_EVENTS.LBR_INSERTS
+.Pq Event CCH , Umask 20H
+Count cases of saving new LBR records by hardware.
+.It Li MEM_TRANS_RETIRED.LOAD_LATENCY
+.Pq Event CDH , Umask 01H
+Randomly sampled loads whose latency is above a
+user defined threshold. A small fraction of the overall
+loads are sampled due to randomization.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
+.Pq Event D0H , Umask 11H
+Count retired load uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
+.Pq Event D0H , Umask 12H
+Count retired store uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
+.Pq Event D0H , Umask 41H
+Count retired load uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
+.Pq Event D0H , Umask 42H
+Count retired store uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
+.Pq Event D0H , Umask 81H
+Count all retired load uops.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
+.Pq Event D0H , Umask 82H
+Count all retired store uops.
+.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
+.Pq Event D1H , Umask 01H
+Retired load uops with L1 cache hits as data sources.
+.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT
+.Pq Event D1H , Umask 02H
+Retired load uops with L2 cache hits as data sources.
+.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT
+.Pq Event D1H , Umask 04H
+Retired load uops with LLC cache hits as data
+sources.
+.It Li MEM_LOAD_UOPS_RETIRED.L2_MISS
+.Pq Event D1H , Umask 10H
+Retired load uops missed L2. Unknown data source
+excluded.
+.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB
+.Pq Event D1H , Umask 40H
+Retired load uops which data sources were load uops
+missed L1 but hit FB due to preceding miss to the
+same cache line with data not ready.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS
+.Pq Event D2H , Umask 01H
+Retired load uops which data sources were LLC hit
+and cross-core snoop missed in on-pkg core cache.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT
+.Pq Event D2H , Umask 02H
+Retired load uops which data sources were LLC and
+cross-core snoop hits in on-pkg core cache.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM
+.Pq Event D2H , Umask 04H
+Retired load uops which data sources were HitM
+responses from shared LLC.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE
+.Pq Event D2H , Umask 08H
+Retired load uops which data sources were hits in
+LLC without snoops required.
+.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM
+.Pq Event D3H , Umask 01H
+Retired load uops which data sources missed LLC but
+serviced from local dram.
+.It Li BACLEARS.ANY
+.Pq Event E6H , Umask 1FH
+Number of front end re-steers due to BPU
+misprediction.
+.It Li L2_TRANS.DEMAND_DATA_RD
+.Pq Event F0H , Umask 01H
+Demand Data Read requests that access L2 cache.
+.It Li L2_TRANS.RFO
+.Pq Event F0H , Umask 02H
+RFO requests that access L2 cache.
+.It Li L2_TRANS.CODE_RD
+.Pq Event F0H , Umask 04H
+L2 cache accesses when fetching instructions.
+.It Li L2_TRANS.ALL_PF
+.Pq Event F0H , Umask 08H
+Any MLC or LLC HW prefetch accessing L2, including
+rejects.
+.It Li L2_TRANS.L1D_WB
+.Pq Event F0H , Umask 10H
+L1D writebacks that access L2 cache.
+.It Li L2_TRANS.L2_FILL
+.Pq Event F0H , Umask 20H
+L2 fill requests that access L2 cache.
+.It Li L2_TRANS.L2_WB
+.Pq Event F0H , Umask 40H
+L2 writebacks that access L2 cache.
+.It Li L2_TRANS.ALL_REQUESTS
+.Pq Event F0H , Umask 80H
+Transactions accessing L2 pipe.
+.It Li L2_LINES_IN.I
+.Pq Event F1H , Umask 01H
+L2 cache lines in I state filling L2.
+.It Li L2_LINES_IN.S
+.Pq Event F1H , Umask 02H
+L2 cache lines in S state filling L2.
+.It Li L2_LINES_IN.E
+.Pq Event F1H , Umask 04H
+L2 cache lines in E state filling L2.
+.It Li L2_LINES_IN.ALL
+.Pq Event F1H , Umask 07H
+L2 cache lines filling L2.
+.It Li L2_LINES_OUT.DEMAND_CLEAN
+.Pq Event F2H , Umask 05H
+Clean L2 cache lines evicted by demand.
+.It Li L2_LINES_OUT.DEMAND_DIRTY
+.Pq Event F2H , Umask 06H
+Dirty L2 cache lines evicted by demand.
+.El
+.Sh SEE ALSO
+.Xr pmc 3 ,
+.Xr pmc.atom 3 ,
+.Xr pmc.core 3 ,
+.Xr pmc.iaf 3 ,
+.Xr pmc.ucf 3 ,
+.Xr pmc.k7 3 ,
+.Xr pmc.k8 3 ,
+.Xr pmc.p4 3 ,
+.Xr pmc.p5 3 ,
+.Xr pmc.p6 3 ,
+.Xr pmc.corei7 3 ,
+.Xr pmc.corei7uc 3 ,
+.Xr pmc.haswell 3 ,
+.Xr pmc.haswelluc 3 ,
+.Xr pmc.ivybridge 3 ,
+.Xr pmc.ivybridgexeon 3 ,
+.Xr pmc.sandybridge 3 ,
+.Xr pmc.sandybridgeuc 3 ,
+.Xr pmc.sandybridgexeon 3 ,
+.Xr pmc.westmere 3 ,
+.Xr pmc.westmereuc 3 ,
+.Xr pmc.soft 3 ,
+.Xr pmc.tsc 3 ,
+.Xr pmc_cpuinfo 3 ,
+.Xr pmclog 3 ,
+.Xr hwpmc 4
+.Sh HISTORY
+Support for the Haswell Xeon microarchitecture first appeared in
+.Fx 10.2 .
+.Sh AUTHORS
+The
+.Lb libpmc
+library was written by
+.An "Joseph Koshy"
+.Aq jkoshy@FreeBSD.org .
+The support for the Haswell Xeon
+microarchitecture was written by
+.An "Randall Stewart"
+.Aq rrs@FreeBSD.org .

lib/libpmc/pmc.ivybridge.3

@@ -449,80 +449,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
+.It Li BR_INST_EXEC.NONTAKEN_COND
-.Pq Event 88H , Umask 01H
+.Pq Event 88H , Umask 41H
-Qualify conditional near branch instructions executed, but not necessarily
+Count conditional near branch instructions that were executed (but not
-retired.
+necessarily retired) and not taken.
-Must combine with umask 40H, 80H.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
+.Pq Event 88H , Umask 82H
-Qualify all unconditional near branch instructions excluding calls and
+Count all unconditional near branch instructions excluding calls and
 indirect branches.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
+.Pq Event 88H , Umask 84H
-Qualify executed indirect near branch instructions that are not calls nor
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
+.Pq Event 88H , Umask 88H
-Qualify indirect near branches that have a return mnemonic.
+Count indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
+.Pq Event 88H , Umask 90H
-Qualify unconditional near call branch instructions, excluding non call
+Count unconditional near call branch instructions, excluding non call
 branch, executed.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
+.Pq Event 88H , Umask A0H
-Qualify indirect near calls, including both register and memory indirect,
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H,
-10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
+.It Li BR_MISP_EXEC.NONTAKEN_COND
-.Pq Event 89H , Umask 01H
+.Pq Event 89H , Umask 41H
-Qualify conditional near branch instructions mispredicted.
+Count conditional near branch instructions mispredicted as nontaken.
-Must combine with umask 40H, 80H.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
+.Pq Event 89H , Umask 84H
-Qualify mispredicted indirect near branch instructions that are not calls
+Count mispredicted indirect near branch instructions that are not calls
 nor returns.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
+.Pq Event 89H , Umask 88H
-Qualify mispredicted indirect near branches that have a return mnemonic.
+Count mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
+.Pq Event 89H , Umask 90H
-Qualify mispredicted unconditional near call branch instructions, excluding
+Count mispredicted unconditional near call branch instructions, excluding
 non call branch, executed.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
+.Pq Event 89H , Umask A0H
-Qualify mispredicted indirect near calls, including both register and memory
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed. Must combine with
-01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per thread.
@@ -726,31 +706,24 @@ Specify threshold in MSR 0x3F6.
 .Pq Event CDH , Umask 02H
 Sample stores and collect precise store operation via PEBS record.
 PMC3 only.
-.It Li MEM_UOP_RETIRED.LOADS
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
-.Pq Event D0H , Umask 01H
+.Pq Event D0H , Umask 11H
-Qualify retired memory uops that are loads. Combine with umask 10H, 20H,
+Count retired load uops that missed the STLB.
-40H, 80H.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
-Supports PEBS.
+.Pq Event D0H , Umask 12H
-.It Li MEM_UOP_RETIRED.STORES
+Count retired store uops that missed the STLB.
-.Pq Event D0H , Umask 02H
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
-Qualify retired memory uops that are stores. Combine with umask 10H, 20H,
+.Pq Event D0H , Umask 41H
-40H, 80H.
+Count retired load uops that were split across a cache line.
-.It Li MEM_UOP_RETIRED.STLB_MISS
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
-.Pq Event D0H , Umask 10H
+.Pq Event D0H , Umask 42H
-Qualify retired memory uops with STLB miss. Must combine with umask 01H,
+Count retired store uops that were split across a cache line.
-02H, to produce counts.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
-.It Li MEM_UOP_RETIRED.LOCK
+.Pq Event D0H , Umask 81H
-.Pq Event D0H , Umask 20H
+Count all retired load uops.
-Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to
+.It Li MEM_UOPS_RETIRED.ALL_STORES
-produce counts.
+.Pq Event D0H , Umask 82H
-.It Li MEM_UOP_RETIRED.SPLIT
+Count all retired store uops.
-.Pq Event D0H , Umask 40H
-Qualify retired memory uops with line split. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with umask 01H, 02H, to
-produce counts.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.

lib/libpmc/pmc.ivybridgexeon.3

@@ -449,80 +449,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
+.It Li BR_INST_EXEC.NONTAKEN_COND
-.Pq Event 88H , Umask 01H
+.Pq Event 88H , Umask 41H
-Qualify conditional near branch instructions executed, but not necessarily
+Count conditional near branch instructions that were executed (but not
-retired.
+necessarily retired) and not taken.
-Must combine with umask 40H, 80H.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
+.Pq Event 88H , Umask 82H
-Qualify all unconditional near branch instructions excluding calls and
+Count all unconditional near branch instructions excluding calls and
 indirect branches.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
+.Pq Event 88H , Umask 84H
-Qualify executed indirect near branch instructions that are not calls nor
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
+.Pq Event 88H , Umask 88H
-Qualify indirect near branches that have a return mnemonic.
+Count indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
+.Pq Event 88H , Umask 90H
-Qualify unconditional near call branch instructions, excluding non call
+Count unconditional near call branch instructions, excluding non call
 branch, executed.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
+.Pq Event 88H , Umask A0H
-Qualify indirect near calls, including both register and memory indirect,
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H,
-10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
+.It Li BR_MISP_EXEC.NONTAKEN_COND
-.Pq Event 89H , Umask 01H
+.Pq Event 89H , Umask 41H
-Qualify conditional near branch instructions mispredicted.
+Count conditional near branch instructions mispredicted as nontaken.
-Must combine with umask 40H, 80H.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
+.Pq Event 89H , Umask 84H
-Qualify mispredicted indirect near branch instructions that are not calls
+Count mispredicted indirect near branch instructions that are not calls
 nor returns.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
+.Pq Event 89H , Umask 88H
-Qualify mispredicted indirect near branches that have a return mnemonic.
+Count mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
+.Pq Event 89H , Umask 90H
-Qualify mispredicted unconditional near call branch instructions, excluding
+Count mispredicted unconditional near call branch instructions, excluding
 non call branch, executed.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
+.Pq Event 89H , Umask A0H
-Qualify mispredicted indirect near calls, including both register and memory
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed. Must combine with
-01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per thread.
@@ -738,31 +718,24 @@ Specify threshold in MSR 0x3F6.
 .Pq Event CDH , Umask 02H
 Sample stores and collect precise store operation via PEBS record.
 PMC3 only.
-.It Li MEM_UOP_RETIRED.LOADS
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
-.Pq Event D0H , Umask 01H
+.Pq Event D0H , Umask 11H
-Qualify retired memory uops that are loads. Combine with umask 10H, 20H,
+Count retired load uops that missed the STLB.
-40H, 80H.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
-Supports PEBS.
+.Pq Event D0H , Umask 12H
-.It Li MEM_UOP_RETIRED.STORES
+Count retired store uops that missed the STLB.
-.Pq Event D0H , Umask 02H
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
-Qualify retired memory uops that are stores. Combine with umask 10H, 20H,
+.Pq Event D0H , Umask 41H
-40H, 80H.
+Count retired load uops that were split across a cache line.
-.It Li MEM_UOP_RETIRED.STLB_MISS
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
-.Pq Event D0H , Umask 10H
+.Pq Event D0H , Umask 42H
-Qualify retired memory uops with STLB miss. Must combine with umask 01H,
+Count retired store uops that were split across a cache line.
-02H, to produce counts.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
-.It Li MEM_UOP_RETIRED.LOCK
+.Pq Event D0H , Umask 81H
-.Pq Event D0H , Umask 20H
+Count all retired load uops.
-Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to
+.It Li MEM_UOPS_RETIRED.ALL_STORES
-produce counts.
+.Pq Event D0H , Umask 82H
-.It Li MEM_UOP_RETIRED.SPLIT
+Count all retired store uops.
-.Pq Event D0H , Umask 40H
-Qualify retired memory uops with line split. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with umask 01H, 02H, to
-produce counts.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.

lib/libpmc/pmc.sandybridge.3

@@ -497,80 +497,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H, Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
+.It Li BR_INST_EXEC.NONTAKEN_COND
-.Pq Event 88H, Umask 01H
+.Pq Event 88H , Umask 41H
-Qualify conditional near branch instructions executed, but not necessarily
+Count conditional near branch instructions that were executed (but not
-retired.
+necessarily retired) and not taken.
-Must combine with umask 40H, 80H
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H, Umask 02H
+.Pq Event 88H , Umask 82H
-Qualify all unconditional near branch instructions excluding calls and indirect
+Count all unconditional near branch instructions excluding calls and
-branches.
+indirect branches.
-Must combine with umask 80H
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H, Umask 04H
+.Pq Event 88H , Umask 84H
-Qualify executed indirect near branch instructions that are not calls nor
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H, Umask 08H
+.Pq Event 88H , Umask 88H
-Qualify indirect near branches that have a return mnemonic.
+Count indirect near branches that have a return mnemonic.
-Must combine with umask 80H
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H, Umask 10H
+.Pq Event 88H , Umask 90H
-Qualify unconditional near call branch instructions, excluding non call branch,
+Count unconditional near call branch instructions, excluding non call
-executed.
+branch, executed.
-Must combine with umask 80H
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H, Umask 20H
+.Pq Event 88H , Umask A0H
-Qualify indirect near calls, including both register and memory indirect,
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H
+.It Li BR_INST_EXEC.ALL_BRANCHES
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H, Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H, Umask 80H
-Qualify taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
-.It Li BR_INST_EXE.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
+.It Li BR_MISP_EXEC.NONTAKEN_COND
-.Pq Event 89H, Umask 01H
+.Pq Event 89H , Umask 41H
-Qualify conditional near branch instructions mispredicted.
+Count conditional near branch instructions mispredicted as nontaken.
-Must combine with umask 40H, 80H
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H, Umask 04H
+.Pq Event 89H , Umask 84H
-Qualify mispredicted indirect near branch instructions that are not calls nor
+Count mispredicted indirect near branch instructions that are not calls
-returns.
+nor returns.
-Must combine with umask 80H
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H, Umask 08H
+.Pq Event 89H , Umask 88H
-Qualify mispredicted indirect near branches that have a return mnemonic.
+Count mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H, Umask 10H
+.Pq Event 89H , Umask 90H
-Qualify mispredicted unconditional near call branch instructions, excluding non
+Count mispredicted unconditional near call branch instructions, excluding
-call branch, executed.
+non call branch, executed.
-Must combine with umask 80H
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H, Umask 20H
+.Pq Event 89H , Umask A0H
-Qualify mispredicted indirect near calls, including both register and memory
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H, Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H, Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH, Umask 01H
 Count number of non-delivered uops to RAT per thread.

lib/libpmc/pmc.sandybridgexeon.3

@@ -543,73 +543,60 @@ instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
+.It Li BR_INST_EXEC.NONTAKEN_COND
-.Pq Event 88H , Umask 01H
+.Pq Event 88H , Umask 41H
-Qualify conditional near branch instructions
+Count conditional near branch instructions that were executed (but not
-executed, but not necessarily retired.
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
+.Pq Event 88H , Umask 82H
-Qualify all unconditional near branch instructions
+Count all unconditional near branch instructions excluding calls and
-excluding calls and indirect branches.
+indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
+.Pq Event 88H , Umask 84H
-Qualify executed indirect near branch instructions
+Count executed indirect near branch instructions that are not calls nor
-that are not calls nor returns.
+returns.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
+.Pq Event 88H , Umask 88H
-Qualify indirect near branches that have a return
+Count indirect near branches that have a return mnemonic.
-mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
+.Pq Event 88H , Umask 90H
-Qualify unconditional near call branch instructions,
+Count unconditional near call branch instructions, excluding non call
-excluding non call branch, executed.
+branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
+.Pq Event 88H , Umask A0H
-Qualify indirect near calls, including both register
+Count indirect near calls, including both register and memory indirect,
-and memory indirect, executed.
+executed.
-.It Li BR_INST_EXEC.NONTAKEN
+.It Li BR_INST_EXEC.ALL_BRANCHES
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must
-combine with 01H,02H, 04H, 08H, 10H, 20H.
-.It Li BR_INST_EXE.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
-Counts all near executed branches (not necessarily
+Counts all near executed branches (not necessarily retired).
-retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
-.It Li BR_MISP_EXEC.COND
+.Pq Event 89H , Umask 41H
-.Pq Event 89H , Umask 01H
+Count conditional near branch instructions mispredicted as nontaken.
-Qualify conditional near branch instructions
+.It Li BR_MISP_EXEC.TAKEN_COND
-mispredicted.
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
+.Pq Event 89H , Umask 84H
-Qualify mispredicted indirect near branch
+Count mispredicted indirect near branch instructions that are not calls
-instructions that are not calls nor returns.
+nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
+.Pq Event 89H , Umask 88H
-Qualify mispredicted indirect near branches that
+Count mispredicted indirect near branches that have a return mnemonic.
-have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
+.Pq Event 89H , Umask 90H
-Qualify mispredicted unconditional near call branch
+Count mispredicted unconditional near call branch instructions, excluding
-instructions, excluding non call branch, executed.
+non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
+.Pq Event 89H , Umask A0H
-Qualify mispredicted indirect near calls, including
+Count mispredicted indirect near calls, including both register and memory
-both register and memory indirect, executed.
+indirect, executed.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches
-executed,.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily
+Counts all mispredicted near executed branches (not necessarily retired).
-retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per

lib/libproc/proc_sym.c

@@ -91,7 +91,7 @@ find_dbg_obj(const char *path)
 	snprintf(dbg_path, sizeof(dbg_path),
 	    "/usr/lib/debug/%s.debug", path);
 	fd = open(dbg_path, O_RDONLY);
-	if (fd > 0)
+	if (fd >= 0)
 		return (fd);
 	else
 		return (open(path, O_RDONLY));

lib/libstand/Makefile

@@ -28,7 +28,7 @@ CFLAGS+=	-mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 -msoft-float
 CFLAGS.gcc+=	-mpreferred-stack-boundary=2
 .endif
 .if ${MACHINE_CPUARCH} == "amd64"
-CFLAGS+=	-fPIC
+CFLAGS+=	-fPIC -mno-red-zone
 .endif
 .if ${MACHINE} == "pc98"
 CFLAGS+=	-Os
@@ -80,7 +80,6 @@ SRCS+=	aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S
 .if ${MACHINE_CPUARCH} == "powerpc"
 .PATH: ${.CURDIR}/../libc/quad
 SRCS+=	ashldi3.c ashrdi3.c
-.PATH: ${.CURDIR}/../libc/powerpc/gen
 SRCS+=	syncicache.c
 .endif
 
@@ -89,11 +88,7 @@ SRCS+=	syncicache.c
 SRCS+= uuid_equal.c uuid_is_nil.c
 
 # _setjmp/_longjmp
-.if ${MACHINE_ARCH} == "powerpc64"
-.PATH: ${.CURDIR}/powerpc
-.else
 .PATH: ${.CURDIR}/${MACHINE_CPUARCH}
-.endif
 SRCS+=	_setjmp.S
 
 # decompression functionality from libbz2

lib/libstand/dosfs.c

@@ -787,6 +787,7 @@ ioget(struct open_file *fd, u_int lsec, void *buf, u_int nsec)
 {
     int	err;
 
+    twiddle(1);
     if ((err = (fd->f_dev->dv_strategy)(fd->f_devdata, F_READ, lsec, 
 					secbyt(nsec), buf, NULL)))
 	return(err);

lib/libstand/powerpc/_setjmp.S

@@ -42,7 +42,7 @@
 #define JMP_xer	24*REGWIDTH
 #define JMP_sig	25*REGWIDTH
 
-ASENTRY_NOPROF(setjmp)
+ASENTRY_NOPROF(_setjmp)
 	ST_REG 31, JMP_r31(3)
 	/* r1, r2, r14-r30 */
 	ST_REG 1,  JMP_r1 (3)
@@ -79,7 +79,7 @@ ASENTRY_NOPROF(setjmp)
 
 
 .extern sigsetmask
-ASENTRY_NOPROF(longjmp)
+ASENTRY_NOPROF(_longjmp)
 	LD_REG 31, JMP_r31(3)
 	/* r1, r2, r14-r30 */
 	LD_REG 1,  JMP_r1 (3)

lib/libstand/powerpc/syncicache.c

@@ -0,0 +1,103 @@
+/*-
+ * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
+ * Copyright (C) 1995-1997, 1999 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
+ */
+
+#ifndef lint
+static const char rcsid[] =
+  "$FreeBSD$";
+#endif /* not lint */
+
+#include <sys/param.h>
+#if	defined(_KERNEL) || defined(_STANDALONE)
+#include <sys/time.h>
+#include <sys/proc.h>
+#include <vm/vm.h>
+#endif
+#include <sys/sysctl.h>
+
+#include <machine/cpu.h>
+#include <machine/md_var.h>
+
+#ifdef _STANDALONE
+int cacheline_size = 32;
+#endif
+
+#if	!defined(_KERNEL) && !defined(_STANDALONE)
+#include <stdlib.h>
+
+int cacheline_size = 0;
+
+static void getcachelinesize(void);
+
+static void
+getcachelinesize()
+{
+	static int	cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
+	int		clen;
+
+	clen = sizeof(cacheline_size);
+
+	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
+	    &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size) {
+		abort();
+	}
+}
+#endif
+
+void
+__syncicache(void *from, int len)
+{
+	int	l, off;
+	char	*p;
+
+#if	!defined(_KERNEL) && !defined(_STANDALONE)
+	if (!cacheline_size)
+		getcachelinesize();
+#endif	
+
+	off = (u_int)from & (cacheline_size - 1);
+	l = len += off;
+	p = (char *)from - off;
+
+	do {
+		__asm __volatile ("dcbst 0,%0" :: "r"(p));
+		p += cacheline_size;
+	} while ((l -= cacheline_size) > 0);
+	__asm __volatile ("sync");
+	p = (char *)from - off;
+	do {
+		__asm __volatile ("icbi 0,%0" :: "r"(p));
+		p += cacheline_size;
+	} while ((len -= cacheline_size) > 0);
+	__asm __volatile ("sync; isync");
+}
+

lib/libthr/thread/thr_private.h

@@ -337,7 +337,7 @@ struct pthread_key {
 
 /*
  * lwpid_t is 32bit but kernel thr API exports tid as long type
- * in very earily date.
+ * to preserve the ABI for M:N model in very early date (r131431).
  */
 #define TID(thread)	((uint32_t) ((thread)->tid))
 

lib/msun/man/j0.3

@@ -28,7 +28,7 @@
 .\"     from: @(#)j0.3	6.7 (Berkeley) 4/19/91
 .\" $FreeBSD$
 .\"
-.Dd February 18, 2008
+.Dd March 10, 2015
 .Dt J0 3
 .Os
 .Sh NAME
@@ -77,24 +77,17 @@
 The functions
 .Fn j0 ,
 .Fn j0f ,
-.Fn j1
+.Fn j1 ,
 and
 .Fn j1f
-compute the
+compute the Bessel function of the first kind of orders
-.Em Bessel function of the first kind of the order
+0 and 1 for the real value
-0 and the
-.Em order
-1, respectively,
-for the
-real value
 .Fa x ;
 the functions
 .Fn jn
 and
 .Fn jnf
-compute the
+compute the Bessel function of the first kind of the integer order
-.Em Bessel function of the first kind of the integer
-.Em order
 .Fa n
 for the real value
 .Fa x .
@@ -105,13 +98,8 @@ The functions
 .Fn y1 ,
 and
 .Fn y1f
-compute the linearly independent
+compute the linearly independent Bessel function of the second kind 
-.Em Bessel function of the second kind of the order
+of orders 0 and 1 for the positive
-0 and the
-.Em order
-1, respectively,
-for the
-positive
 .Em real
 value
 .Fa x ;
@@ -119,9 +107,7 @@ the functions
 .Fn yn
 and
 .Fn ynf
-compute the
+compute the Bessel function of the second kind for the integer order
-.Em Bessel function of the second kind for the integer
-.Em order
 .Fa n
 for the positive
 .Em real
@@ -141,11 +127,20 @@ and
 .Fn ynf .
 If
 .Fa x
-is negative, these routines will generate an invalid exception and
+is negative, including -\*(If, these routines will generate an invalid
-return \*(Na.
+exception and return \*(Na.
 If
 .Fa x
-is 0 or a sufficiently small positive number, these routines
+is \*(Pm0, these routines
+will generate a divide-by-zero exception and return -\*(If.
+If
+.Fa x
+is a sufficiently small positive number, then 
+.Fn y1 ,
+.Fn y1f ,
+.Fn yn ,
+and
+.Fn ynf 
 will generate an overflow exception and return -\*(If.
 .Sh SEE ALSO
 .Xr math 3

lib/msun/src/e_j0.c

@@ -64,6 +64,8 @@ __FBSDID("$FreeBSD$");
 
 static double pzero(double), qzero(double);
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 huge 	= 1e300,
 one	= 1.0,
@@ -150,10 +152,16 @@ __ieee754_y0(double x)
 
 	EXTRACT_WORDS(hx,lx,x);
         ix = 0x7fffffff&hx;
-    /* Y0(NaN) is NaN, y0(-inf) is Nan, y0(inf) is 0  */
+	/*
-	if(ix>=0x7ff00000) return  one/(x+x*x); 
+	 * y0(NaN) = NaN.
-        if((ix|lx)==0) return -one/zero;
+	 * y0(Inf) = 0.
-        if(hx<0) return zero/zero;
+	 * y0(-Inf) = NaN and raise invalid exception.
+	 */
+	if(ix>=0x7ff00000) return vone/(x+x*x); 
+	/* y0(+-0) = -inf and raise divide-by-zero exception. */
+	if((ix|lx)==0) return -one/vzero;
+	/* y0(x<0) = NaN and raise invalid exception. */
+	if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
         /* y0(x) = sqrt(2/(pi*x))*(p0(x)*sin(x0)+q0(x)*cos(x0))
          * where x0 = x-pi/4

lib/msun/src/e_j0f.c

@@ -16,11 +16,17 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_j0.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
 static float pzerof(float), qzerof(float);
 
+static const volatile float vone = 1,  vzero = 0;
+
 static const float
 huge 	= 1e30,
 one	= 1.0,
@@ -107,10 +113,9 @@ __ieee754_y0f(float x)
 
 	GET_FLOAT_WORD(hx,x);
         ix = 0x7fffffff&hx;
-    /* Y0(NaN) is NaN, y0(-inf) is Nan, y0(inf) is 0  */
+	if(ix>=0x7f800000) return  vone/(x+x*x);
-	if(ix>=0x7f800000) return  one/(x+x*x);
+	if(ix==0) return -one/vzero;
-        if(ix==0) return -one/zero;
+	if(hx<0) return vzero/vzero;
-        if(hx<0) return zero/zero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
         /* y0(x) = sqrt(2/(pi*x))*(p0(x)*sin(x0)+q0(x)*cos(x0))
          * where x0 = x-pi/4

lib/msun/src/e_j1.c

@@ -64,6 +64,8 @@ __FBSDID("$FreeBSD$");
 
 static double pone(double), qone(double);
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 huge    = 1e300,
 one	= 1.0,
@@ -147,10 +149,16 @@ __ieee754_y1(double x)
 
 	EXTRACT_WORDS(hx,lx,x);
         ix = 0x7fffffff&hx;
-    /* if Y1(NaN) is NaN, Y1(-inf) is NaN, Y1(inf) is 0 */
+	/*
-	if(ix>=0x7ff00000) return  one/(x+x*x); 
+	 * y1(NaN) = NaN.
-        if((ix|lx)==0) return -one/zero;
+	 * y1(Inf) = 0.
-        if(hx<0) return zero/zero;
+	 * y1(-Inf) = NaN and raise invalid exception.
+	 */
+	if(ix>=0x7ff00000) return  vone/(x+x*x); 
+	/* y1(+-0) = -inf and raise divide-by-zero exception. */
+        if((ix|lx)==0) return -one/vzero;
+	/* y1(x<0) = NaN and raise invalid exception. */
+        if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
                 s = sin(x);
                 c = cos(x);

lib/msun/src/e_j1f.c

@@ -16,11 +16,17 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_j1.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
 static float ponef(float), qonef(float);
 
+static const volatile float vone = 1, vzero = 0;
+
 static const float
 huge    = 1e30,
 one	= 1.0,
@@ -104,10 +110,9 @@ __ieee754_y1f(float x)
 
 	GET_FLOAT_WORD(hx,x);
         ix = 0x7fffffff&hx;
-    /* if Y1(NaN) is NaN, Y1(-inf) is NaN, Y1(inf) is 0 */
+	if(ix>=0x7f800000) return  vone/(x+x*x);
-	if(ix>=0x7f800000) return  one/(x+x*x);
+	if(ix==0) return -one/vzero;
-        if(ix==0) return -one/zero;
+	if(hx<0) return vzero/vzero;
-        if(hx<0) return zero/zero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
                 s = sinf(x);
                 c = cosf(x);

lib/msun/src/e_jn.c

@@ -43,6 +43,8 @@ __FBSDID("$FreeBSD$");
 #include "math.h"
 #include "math_private.h"
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 invsqrtpi=  5.64189583547756279280e-01, /* 0x3FE20DD7, 0x50429B6D */
 two   =  2.00000000000000000000e+00, /* 0x40000000, 0x00000000 */
@@ -220,10 +222,12 @@ __ieee754_yn(int n, double x)
 
 	EXTRACT_WORDS(hx,lx,x);
 	ix = 0x7fffffff&hx;
-    /* if Y(n,NaN) is NaN */
+	/* yn(n,NaN) = NaN */
 	if((ix|((u_int32_t)(lx|-lx))>>31)>0x7ff00000) return x+x;
-	if((ix|lx)==0) return -one/zero;
+	/* yn(n,+-0) = -inf and raise divide-by-zero exception. */
-	if(hx<0) return zero/zero;
+	if((ix|lx)==0) return -one/vzero;
+	/* yn(n,x<0) = NaN and raise invalid exception. */
+	if(hx<0) return vzero/vzero;
 	sign = 1;
 	if(n<0){
 		n = -n;

lib/msun/src/e_jnf.c

@@ -16,9 +16,15 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_jn.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
+static const volatile float vone = 1, vzero = 0;
+
 static const float
 two   =  2.0000000000e+00, /* 0x40000000 */
 one   =  1.0000000000e+00; /* 0x3F800000 */
@@ -172,10 +178,9 @@ __ieee754_ynf(int n, float x)
 
 	GET_FLOAT_WORD(hx,x);
 	ix = 0x7fffffff&hx;
-    /* if Y(n,NaN) is NaN */
 	if(ix>0x7f800000) return x+x;
-	if(ix==0) return -one/zero;
+	if(ix==0) return -one/vzero;
-	if(hx<0) return zero/zero;
+	if(hx<0) return vzero/vzero;
 	sign = 1;
 	if(n<0){
 		n = -n;

sbin/geom/class/part/gpart.8

@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd August 12, 2014
+.Dd March 12, 2015
 .Dt GPART 8
 .Os
 .Sh NAME
@@ -659,6 +659,12 @@ Another symbolic names that can be used with
 .Cm gpart
 utility are:
 .Bl -tag -width ".Cm dragonfly-disklabel64"
+.It Cm apple-core-storage
+An Apple Mac OS X partition used by logical volume manager known as
+Core Storage.
+The scheme-specific type is
+.Qq Li "!53746f72-6167-11aa-aa11-00306543ecac"
+for GPT.
 .It Cm apple-hfs
 An Apple Mac OS X partition that contains a HFS or HFS+ filesystem.
 The scheme-specific types are

sbin/ifconfig/af_inet6.c

@@ -485,6 +485,10 @@ static struct cmd inet6_cmds[] = {
 	DEF_CMD("-auto_linklocal",-ND6_IFF_AUTO_LINKLOCAL,setnd6flags),
 	DEF_CMD("no_prefer_iface",ND6_IFF_NO_PREFER_IFACE,setnd6flags),
 	DEF_CMD("-no_prefer_iface",-ND6_IFF_NO_PREFER_IFACE,setnd6flags),
+	DEF_CMD("no_dad",	ND6_IFF_NO_DAD,		setnd6flags),
+	DEF_CMD("-no_dad",	-ND6_IFF_NO_DAD,	setnd6flags),
+	DEF_CMD("ignoreloop",	ND6_IFF_IGNORELOOP,	setnd6flags),
+	DEF_CMD("-ignoreloop",	-ND6_IFF_IGNORELOOP,	setnd6flags),
 	DEF_CMD_ARG("pltime",        			setip6pltime),
 	DEF_CMD_ARG("vltime",        			setip6vltime),
 	DEF_CMD("eui64",	0,			setip6eui64),

sbin/ifconfig/af_nd6.c

@@ -58,7 +58,8 @@ static const char rcsid[] =
 #define	MAX_SYSCTL_TRY	5
 #define	ND6BITS	"\020\001PERFORMNUD\002ACCEPT_RTADV\003PREFER_SOURCE" \
 		"\004IFDISABLED\005DONT_SET_IFROUTE\006AUTO_LINKLOCAL" \
-		"\007NO_RADR\010NO_PREFER_IFACE\020DEFAULTIF"
+		"\007NO_RADR\010NO_PREFER_IFACE\011IGNORELOOP\012NO_DAD" \
+		"\020DEFAULTIF"
 
 static int isnd6defif(int);
 void setnd6flags(const char *, int, int, const struct afswtch *);

sbin/ifconfig/ifconfig.8

@@ -28,7 +28,7 @@
 .\"     From: @(#)ifconfig.8	8.3 (Berkeley) 1/5/94
 .\" $FreeBSD$
 .\"
-.Dd December 16, 2014
+.Dd March 6, 2015
 .Dt IFCONFIG 8
 .Os
 .Sh NAME
@@ -687,6 +687,20 @@ policy table, configurable with
 .It Cm -no_prefer_iface
 Clear a flag
 .Cm no_prefer_iface .
+.It Cm no_dad
+Set a flag to disable Duplicate Address Detection.
+.It Cm -no_dad
+Clear a flag
+.Cm no_dad .
+.It Cm ignoreloop
+Set a flag to disable loopback detection in Enhanced Duplicate Address
+Detection Algorithm.
+When this flag is set,
+Duplicate Address Detection will stop in a finite number of probings
+even if a loopback configuration is detected.
+.It Cm -ignoreloop
+Clear a flag
+.Cm ignoreloop .
 .El
 .Pp
 The following parameters are specific for IPv6 addresses.

sbin/ifconfig/ifconfig.c

@@ -1280,9 +1280,8 @@ ifmaybeload(const char *name)
 		}
 
 	/* turn interface and unit into module name */
-	strcpy(ifkind, "if_");
+	strlcpy(ifkind, "if_", sizeof(ifkind));
-	strlcpy(ifkind + MOD_PREFIX_LEN, ifname,
+	strlcat(ifkind, ifname, sizeof(ifkind));
-	    sizeof(ifkind) - MOD_PREFIX_LEN);
 
 	/* scan files in kernel */
 	mstat.version = sizeof(struct module_stat);
@@ -1299,8 +1298,8 @@ ifmaybeload(const char *name)
 				cp = mstat.name;
 			}
 			/* already loaded? */
-			if (strncmp(ifname, cp, strlen(ifname) + 1) == 0 ||
+			if (strcmp(ifname, cp) == 0 ||
-			    strncmp(ifkind, cp, strlen(ifkind) + 1) == 0)
+			    strcmp(ifkind, cp) == 0)
 				return;
 		}
 	}

sbin/ipfw/ipfw.8

@@ -1,7 +1,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd Aug 13, 2014
+.Dd March 13, 2015
 .Dt IPFW 8
 .Os
 .Sh NAME
@@ -2078,6 +2078,8 @@ hook number to move packet to.
 maximum number of connections.
 .It Cm ipv4
 IPv4 nexthop to fwd packets to.
+.It Cm ipv6
+IPv6 nexthop to fwd packets to.
 .El
 .Pp
 The

sbin/ipfw/ipfw2.c

@@ -1525,11 +1525,14 @@ show_static_rule(struct cmdline_opts *co, struct format_opts *fo,
 
 		case O_FORWARD_IP6:
 		    {
-			char buf[4 + INET6_ADDRSTRLEN + 1];
+			char buf[INET6_ADDRSTRLEN + IF_NAMESIZE + 2];
 			ipfw_insn_sa6 *s = (ipfw_insn_sa6 *)cmd;
 
-			bprintf(bp, "fwd %s", inet_ntop(AF_INET6,
+			bprintf(bp, "fwd ");
-			    &s->sa.sin6_addr, buf, sizeof(buf)));
+			if (getnameinfo((const struct sockaddr *)&s->sa,
+			    sizeof(struct sockaddr_in6), buf, sizeof(buf),
+			    NULL, 0, NI_NUMERICHOST) == 0)
+				bprintf(bp, "%s", buf);
 			if (s->sa.sin6_port)
 				bprintf(bp, ",%d", s->sa.sin6_port);
 		    }
@@ -3741,8 +3744,8 @@ compile_rule(char *av[], uint32_t *rbuf, int *rbufsize, struct tidx *tstate)
 			p->sa.sin6_family = AF_INET6;
 			p->sa.sin6_port = port_number;
 			p->sa.sin6_flowinfo = 0;
-			p->sa.sin6_scope_id = 0;
+			p->sa.sin6_scope_id =
-			/* No table support for v6 yet. */
+			    ((struct sockaddr_in6 *)&result)->sin6_scope_id;
 			bcopy(&((struct sockaddr_in6*)&result)->sin6_addr,
 			    &p->sa.sin6_addr, sizeof(p->sa.sin6_addr));
 		} else {

sbin/ipfw/tables.c

@@ -35,6 +35,7 @@
 #include <netinet/in.h>
 #include <netinet/ip_fw.h>
 #include <arpa/inet.h>
+#include <netdb.h>
 
 #include "ipfw2.h"
 
@@ -1384,6 +1385,7 @@ static void
 tentry_fill_value(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *arg,
     uint8_t type, uint32_t vmask)
 {
+	struct addrinfo hints, *res;
 	uint32_t a4, flag, val, vm;
 	ipfw_table_value *v;
 	uint32_t i;
@@ -1494,9 +1496,19 @@ tentry_fill_value(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *arg,
 			}
 			break;
 		case IPFW_VTYPE_NH6:
-			if (strchr(n, ':') != NULL &&
+			if (strchr(n, ':') != NULL) {
-			    inet_pton(AF_INET6, n, &v->nh6) == 1)
+				memset(&hints, 0, sizeof(hints));
+				hints.ai_family = AF_INET6;
+				hints.ai_flags = AI_NUMERICHOST;
+				if (getaddrinfo(n, NULL, &hints, &res) == 0) {
+					v->nh6 = ((struct sockaddr_in6 *)
+					    res->ai_addr)->sin6_addr;
+					v->zoneid = ((struct sockaddr_in6 *)
+					    res->ai_addr)->sin6_scope_id;
+					freeaddrinfo(res);
 					break;
+				}
+			}
 			etype = "ipv6";
 			break;
 		}
@@ -1643,10 +1655,11 @@ static void
 table_show_value(char *buf, size_t bufsize, ipfw_table_value *v,
     uint32_t vmask, int print_ip)
 {
+	char abuf[INET6_ADDRSTRLEN + IF_NAMESIZE + 2];
+	struct sockaddr_in6 sa6;
 	uint32_t flag, i, l;
 	size_t sz;
 	struct in_addr a4;
-	char abuf[INET6_ADDRSTRLEN];
 
 	sz = bufsize;
 
@@ -1702,7 +1715,14 @@ table_show_value(char *buf, size_t bufsize, ipfw_table_value *v,
 			l = snprintf(buf, sz, "%d,", v->dscp);
 			break;
 		case IPFW_VTYPE_NH6:
-			inet_ntop(AF_INET6, &v->nh6, abuf, sizeof(abuf));
+			sa6.sin6_family = AF_INET6;
+			sa6.sin6_len = sizeof(sa6);
+			sa6.sin6_addr = v->nh6;
+			sa6.sin6_port = 0;
+			sa6.sin6_scope_id = v->zoneid;
+			if (getnameinfo((const struct sockaddr *)&sa6,
+			    sa6.sin6_len, abuf, sizeof(abuf), NULL, 0,
+			    NI_NUMERICHOST) == 0)
 				l = snprintf(buf, sz, "%s,", abuf);
 			break;
 		}
@@ -1862,11 +1882,12 @@ struct _table_value {
 	uint32_t	nat;		/* O_NAT */
 	uint32_t	nh4;
 	uint8_t		dscp;
-	uint8_t		spare0[3];
+	uint8_t		spare0;
+	uint16_t	spare1;
 	/* -- 32 bytes -- */
 	struct in6_addr	nh6;
 	uint32_t	limit;		/* O_LIMIT */
-	uint32_t	spare1;
+	uint32_t	zoneid;
 	uint64_t	refcnt;		/* Number of references */
 };
 

sbin/restore/dirs.c

@@ -80,8 +80,8 @@ static struct inotab *inotab[HASHSIZE];
  */
 struct modeinfo {
 	ino_t ino;
-	struct timeval ctimep[2];
+	struct timespec ctimep[2];
-	struct timeval mtimep[2];
+	struct timespec mtimep[2];
 	mode_t mode;
 	uid_t uid;
 	gid_t gid;
@@ -656,8 +656,8 @@ setdirmodes(int flags)
 			else
 				(void) chown(cp, node.uid, node.gid);
 			(void) chmod(cp, node.mode);
-			utimes(cp, node.ctimep);
+			utimensat(AT_FDCWD, cp, node.ctimep, 0);
-			utimes(cp, node.mtimep);
+			utimensat(AT_FDCWD, cp, node.mtimep, 0);
 			(void) chflags(cp, node.flags);
 		}
 		ep->e_flags &= ~NEW;
@@ -746,13 +746,13 @@ allocinotab(struct context *ctxp, long seekpt)
 		return (itp);
 	node.ino = ctxp->ino;
 	node.mtimep[0].tv_sec = ctxp->atime_sec;
-	node.mtimep[0].tv_usec = ctxp->atime_nsec / 1000;
+	node.mtimep[0].tv_nsec = ctxp->atime_nsec;
 	node.mtimep[1].tv_sec = ctxp->mtime_sec;
-	node.mtimep[1].tv_usec = ctxp->mtime_nsec / 1000;
+	node.mtimep[1].tv_nsec = ctxp->mtime_nsec;
 	node.ctimep[0].tv_sec = ctxp->atime_sec;
-	node.ctimep[0].tv_usec = ctxp->atime_nsec / 1000;
+	node.ctimep[0].tv_nsec = ctxp->atime_nsec;
 	node.ctimep[1].tv_sec = ctxp->birthtime_sec;
-	node.ctimep[1].tv_usec = ctxp->birthtime_nsec / 1000;
+	node.ctimep[1].tv_nsec = ctxp->birthtime_nsec;
 	node.extsize = ctxp->extsize;
 	node.mode = ctxp->mode;
 	node.flags = ctxp->file_flags;

sbin/restore/tape.c

@@ -569,20 +569,20 @@ extractfile(char *name)
 	gid_t gid;
 	mode_t mode;
 	int extsize;
-	struct timeval mtimep[2], ctimep[2];
+	struct timespec mtimep[2], ctimep[2];
 	struct entry *ep;
 	char *buf;
 
 	curfile.name = name;
 	curfile.action = USING;
 	mtimep[0].tv_sec = curfile.atime_sec;
-	mtimep[0].tv_usec = curfile.atime_nsec / 1000;
+	mtimep[0].tv_nsec = curfile.atime_nsec;
 	mtimep[1].tv_sec = curfile.mtime_sec;
-	mtimep[1].tv_usec = curfile.mtime_nsec / 1000;
+	mtimep[1].tv_nsec = curfile.mtime_nsec;
 	ctimep[0].tv_sec = curfile.atime_sec;
-	ctimep[0].tv_usec = curfile.atime_nsec / 1000;
+	ctimep[0].tv_nsec = curfile.atime_nsec;
 	ctimep[1].tv_sec = curfile.birthtime_sec;
-	ctimep[1].tv_usec = curfile.birthtime_nsec / 1000;
+	ctimep[1].tv_nsec = curfile.birthtime_nsec;
 	extsize = curfile.extsize;
 	uid = getuid();
 	if (uid == 0)
@@ -628,8 +628,10 @@ extractfile(char *name)
 				set_extattr_link(name, buf, extsize);
 			(void) lchown(name, uid, gid);
 			(void) lchmod(name, mode);
-			(void) lutimes(name, ctimep);
+			(void) utimensat(AT_FDCWD, name, ctimep,
-			(void) lutimes(name, mtimep);
+			    AT_SYMLINK_NOFOLLOW);
+			(void) utimensat(AT_FDCWD, name, mtimep,
+			    AT_SYMLINK_NOFOLLOW);
 			(void) lchflags(name, flags);
 			return (GOOD);
 		}
@@ -658,8 +660,8 @@ extractfile(char *name)
 		}
 		(void) chown(name, uid, gid);
 		(void) chmod(name, mode);
-		(void) utimes(name, ctimep);
+		(void) utimensat(AT_FDCWD, name, ctimep, 0);
-		(void) utimes(name, mtimep);
+		(void) utimensat(AT_FDCWD, name, mtimep, 0);
 		(void) chflags(name, flags);
 		return (GOOD);
 
@@ -688,8 +690,8 @@ extractfile(char *name)
 		}
 		(void) chown(name, uid, gid);
 		(void) chmod(name, mode);
-		(void) utimes(name, ctimep);
+		(void) utimensat(AT_FDCWD, name, ctimep, 0);
-		(void) utimes(name, mtimep);
+		(void) utimensat(AT_FDCWD, name, mtimep, 0);
 		(void) chflags(name, flags);
 		return (GOOD);
 
@@ -714,8 +716,8 @@ extractfile(char *name)
 			set_extattr_fd(ofile, name, buf, extsize);
 		(void) fchown(ofile, uid, gid);
 		(void) fchmod(ofile, mode);
-		(void) futimes(ofile, ctimep);
+		(void) futimens(ofile, ctimep);
-		(void) futimes(ofile, mtimep);
+		(void) futimens(ofile, mtimep);
 		(void) fchflags(ofile, flags);
 		(void) close(ofile);
 		return (GOOD);

share/doc/psd/title/Title

@@ -9,11 +9,7 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
+.\" 3. Neither the name of the University nor the names of its contributors
-.\"    must display the following acknowledgement:
-.\"	This product includes software developed by the University of
-.\"	California, Berkeley and its contributors.
-.\" 4. Neither the name of the University nor the names of its contributors
 .\"    may be used to endorse or promote products derived from this software
 .\"    without specific prior written permission.
 .\"

share/doc/smm/title/Title

@@ -9,11 +9,7 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
+.\" 3. Neither the name of the University nor the names of its contributors
-.\"    must display the following acknowledgement:
-.\"	This product includes software developed by the University of
-.\"	California, Berkeley and its contributors.
-.\" 4. Neither the name of the University nor the names of its contributors
 .\"    may be used to endorse or promote products derived from this software
 .\"    without specific prior written permission.
 .\"