diff --git a/Makefile.inc1 b/Makefile.inc1
index b76837873fb..31cb5a41be6 100644
--- a/Makefile.inc1
+++ b/Makefile.inc1
@@ -333,6 +333,19 @@ LOCALBASE?=	/usr/local
 CROSS_COMPILER_PREFIX?=${CROSS_TOOLCHAIN_PREFIX}
 CROSS_BINUTILS_PREFIX?=${CROSS_TOOLCHAIN_PREFIX}
 .endif
+
+# If we do not have a bootstrap binutils (because the in-tree one does not
+# support the target architecture), provide a default cross-binutils prefix.
+# This allows aarch64 builds, for example, to automatically use the
+# aarch64-binutils port or package.
+.if !empty(BROKEN_OPTIONS:MBINUTILS_BOOTSTRAP) && \
+    !defined(CROSS_BINUTILS_PREFIX)
+CROSS_BINUTILS_PREFIX=/usr/local/${TARGET_ARCH}-freebsd/bin/
+.if !exists(${CROSS_BINUTILS_PREFIX})
+.error In-tree binutils does not support the ${TARGET_ARCH} architecture. Install the ${TARGET_ARCH}-binutils port or package or set CROSS_BINUTILS_PREFIX.
+.endif
+.endif
+
 XCOMPILERS=	CC CXX CPP
 .for COMPILER in ${XCOMPILERS}
 .if defined(CROSS_COMPILER_PREFIX)
@@ -1599,7 +1612,6 @@ cross-tools: .MAKE
     ${_binutils} \
     ${_elftctools} \
     ${_cc} \
-    usr.bin/xlint/lint1 usr.bin/xlint/lint2 usr.bin/xlint/xlint \
     ${_btxld} \
     ${_crunchide} \
     ${_kgzip} \
diff --git a/UPDATING b/UPDATING
index 05a9e70dd5f..81f47deaf05 100644
--- a/UPDATING
+++ b/UPDATING
@@ -31,6 +31,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 11.x IS SLOW:
 	disable the most expensive debugging functionality run
 	"ln -s 'abort:false,junk:false' /etc/malloc.conf".)
 
+20150307:
+	The 32-bit PowerPC kernel has been changed to a position-independent
+	executable. This can only be booted with a version of loader(8)
+	newer than January 31, 2015, so make sure to update both world and
+	kernel before rebooting.
+
 20150217:
 	If you are running a -CURRENT kernel since r273872 (Oct 30th, 2014),
 	but before r278950, the RNG was not seeded properly.  Immediately
diff --git a/bin/rcp/Makefile b/bin/rcp/Makefile
index 1c156a236d1..886ec01ca0d 100644
--- a/bin/rcp/Makefile
+++ b/bin/rcp/Makefile
@@ -7,6 +7,5 @@ CFLAGS+=-DBINDIR=${BINDIR}
 
 BINOWN=	root
 BINMODE=4555
-PRECIOUSPROG=
 
 .include <bsd.prog.mk>
diff --git a/cddl/contrib/dtracetoolkit/Proc/pidpersec.d b/cddl/contrib/dtracetoolkit/Proc/pidpersec.d
index 71080b9e752..ab57b66ee58 100755
--- a/cddl/contrib/dtracetoolkit/Proc/pidpersec.d
+++ b/cddl/contrib/dtracetoolkit/Proc/pidpersec.d
@@ -41,7 +41,7 @@
 
 dtrace:::BEGIN
 {
-	printf("%-22s %8s %6s\n", "TIME", "LASTPID", "PID/s");
+	printf("%-22s %6s\n", "TIME", "PID/s");
 	pids = 0;
 }
 
@@ -52,6 +52,6 @@ proc:::exec-success
 
 profile:::tick-1sec
 {
-	printf("%-22Y %8d %6d\n", walltimestamp, `mpid, pids);
+	printf("%-22Y %6d\n", walltimestamp, pids);
 	pids = 0;
 }
diff --git a/cddl/contrib/opensolaris/common/ctf/ctf_create.c b/cddl/contrib/opensolaris/common/ctf/ctf_create.c
index 73648148275..1c0988a3878 100644
--- a/cddl/contrib/opensolaris/common/ctf/ctf_create.c
+++ b/cddl/contrib/opensolaris/common/ctf/ctf_create.c
@@ -583,10 +583,10 @@ ctf_discard(ctf_file_t *fp)
 		return (0); /* no update required */
 
 	for (dtd = ctf_list_prev(&fp->ctf_dtdefs); dtd != NULL; dtd = ntd) {
-		if (dtd->dtd_type <= fp->ctf_dtoldid)
+		ntd = ctf_list_prev(dtd);
+		if (CTF_TYPE_TO_INDEX(dtd->dtd_type) <= fp->ctf_dtoldid)
 			continue; /* skip types that have been committed */
 
-		ntd = ctf_list_prev(dtd);
 		ctf_dtd_delete(fp, dtd);
 	}
 
@@ -1313,10 +1313,13 @@ ctf_add_type(ctf_file_t *dst_fp, ctf_file_t *src_fp, ctf_id_t src_type)
 	 * unless dst_type is a forward declaration and src_type is a struct,
 	 * union, or enum (i.e. the definition of the previous forward decl).
 	 */
-	if (dst_type != CTF_ERR && dst_kind != kind && (
-	    dst_kind != CTF_K_FORWARD || (kind != CTF_K_ENUM &&
-	    kind != CTF_K_STRUCT && kind != CTF_K_UNION)))
-		return (ctf_set_errno(dst_fp, ECTF_CONFLICT));
+	if (dst_type != CTF_ERR && dst_kind != kind) {
+		if (dst_kind != CTF_K_FORWARD || (kind != CTF_K_ENUM &&
+		    kind != CTF_K_STRUCT && kind != CTF_K_UNION))
+			return (ctf_set_errno(dst_fp, ECTF_CONFLICT));
+		else
+			dst_type = CTF_ERR;
+	}
 
 	/*
 	 * If the non-empty name was not found in the appropriate hash, search
@@ -1328,7 +1331,7 @@ ctf_add_type(ctf_file_t *dst_fp, ctf_file_t *src_fp, ctf_id_t src_type)
 	 */
 	if (dst_type == CTF_ERR && name[0] != '\0') {
 		for (dtd = ctf_list_prev(&dst_fp->ctf_dtdefs); dtd != NULL &&
-		    dtd->dtd_type > dst_fp->ctf_dtoldid;
+		    CTF_TYPE_TO_INDEX(dtd->dtd_type) > dst_fp->ctf_dtoldid;
 		    dtd = ctf_list_prev(dtd)) {
 			if (CTF_INFO_KIND(dtd->dtd_data.ctt_info) == kind &&
 			    dtd->dtd_name != NULL &&
diff --git a/cddl/contrib/opensolaris/tools/ctf/cvt/output.c b/cddl/contrib/opensolaris/tools/ctf/cvt/output.c
index 3131e7fb85e..3385e4b2d09 100644
--- a/cddl/contrib/opensolaris/tools/ctf/cvt/output.c
+++ b/cddl/contrib/opensolaris/tools/ctf/cvt/output.c
@@ -23,8 +23,6 @@
  * Use is subject to license terms.
  */
 
-#pragma ident	"%Z%%M%	%I%	%E% SMI"
-
 /*
  * Routines for preparing tdata trees for conversion into CTF data, and
  * for placing the resulting data into an output file.
diff --git a/contrib/bmake/meta.c b/contrib/bmake/meta.c
index 3ec0bdca5c6..ddced23b730 100644
--- a/contrib/bmake/meta.c
+++ b/contrib/bmake/meta.c
@@ -169,7 +169,7 @@ filemon_read(FILE *mfp, int fd)
     if ((fp = fdopen(fd, "r")) == NULL)
 	err(1, "Could not read build monitor file '%d'", fd);
 
-    fprintf(mfp, "-- filemon acquired metadata --\n");
+    fprintf(mfp, "\n-- filemon acquired metadata --\n");
 
     while (fgets(buf, sizeof(buf), fp)) {
 	fprintf(mfp, "%s", buf);
diff --git a/contrib/compiler-rt/lib/builtins/fixdfdi.c b/contrib/compiler-rt/lib/builtins/fixdfdi.c
index 86f9f6ce8db..67b124a16bb 100644
--- a/contrib/compiler-rt/lib/builtins/fixdfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixdfdi.c
@@ -6,40 +6,17 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixdfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *            su_int is a 32 bit integral type
- *            value in double is representable in di_int (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
-
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
 ARM_EABI_FNALIAS(d2lz, fixdfdi)
 
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
 COMPILER_RT_ABI di_int
-__fixdfdi(double a)
-{
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0)
-        return 0;
-    di_int s = (si_int)(fb.u.s.high & 0x80000000) >> 31;
-    dwords r;
-    r.s.high = (fb.u.s.high & 0x000FFFFF) | 0x00100000;
-    r.s.low = fb.u.s.low;
-    if (e > 52)
-        r.all <<= (e - 52);
-    else
-        r.all >>= (52 - e);
-    return (r.all ^ s) - s;
-} 
+__fixdfdi(fp_t a) {
+    return __fixint(a);
+}
diff --git a/contrib/compiler-rt/lib/builtins/fixdfsi.c b/contrib/compiler-rt/lib/builtins/fixdfsi.c
index 88b2ff5e74a..704e65bc43a 100644
--- a/contrib/compiler-rt/lib/builtins/fixdfsi.c
+++ b/contrib/compiler-rt/lib/builtins/fixdfsi.c
@@ -1,50 +1,22 @@
-//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is dual licensed under the MIT and the University of Illinois Open
-// Source Licenses. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements double-precision to integer conversion for the
-// compiler-rt library.  No range checking is performed; the behavior of this
-// conversion is undefined for out of range values in the C standard.
-//
-//===----------------------------------------------------------------------===//
+/* ===-- fixdfsi.c - Implement __fixdfsi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
-
-#include "int_lib.h"
+typedef si_int fixint_t;
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 ARM_EABI_FNALIAS(d2iz, fixdfsi)
 
-COMPILER_RT_ABI int
+COMPILER_RT_ABI si_int
 __fixdfsi(fp_t a) {
-    
-    // Break a into sign, exponent, significand
-    const rep_t aRep = toRep(a);
-    const rep_t aAbs = aRep & absMask;
-    const int sign = aRep & signBit ? -1 : 1;
-    const int exponent = (aAbs >> significandBits) - exponentBias;
-    const rep_t significand = (aAbs & significandMask) | implicitBit;
-    
-    // If 0 < exponent < significandBits, right shift to get the result.
-    if ((unsigned int)exponent < significandBits) {
-        return sign * (significand >> (significandBits - exponent));
-    }
-    
-    // If exponent is negative, the result is zero.
-    else if (exponent < 0) {
-        return 0;
-    }
-    
-    // If significandBits < exponent, left shift to get the result.  This shift
-    // may end up being larger than the type width, which incurs undefined
-    // behavior, but the conversion itself is undefined in that case, so
-    // whatever the compiler decides to do is fine.
-    else {
-        return sign * (significand << (exponent - significandBits));
-    }
+    return __fixint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixdfti.c b/contrib/compiler-rt/lib/builtins/fixdfti.c
index 2c27f4bae3b..aaf225e74f8 100644
--- a/contrib/compiler-rt/lib/builtins/fixdfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixdfti.c
@@ -6,40 +6,21 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixdfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
 
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in double is representable in ti_int (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
+typedef ti_int fixint_t;
+typedef tu_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 COMPILER_RT_ABI ti_int
-__fixdfti(double a)
-{
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0)
-        return 0;
-    ti_int s = (si_int)(fb.u.s.high & 0x80000000) >> 31;
-    ti_int r = 0x0010000000000000uLL | (0x000FFFFFFFFFFFFFuLL & fb.u.all);
-    if (e > 52)
-        r <<= (e - 52);
-    else
-        r >>= (52 - e);
-    return (r ^ s) - s;
+__fixdfti(fp_t a) {
+    return __fixint(a);
 }
 
 #endif /* CRT_HAS_128BIT */
diff --git a/contrib/compiler-rt/lib/builtins/fixsfdi.c b/contrib/compiler-rt/lib/builtins/fixsfdi.c
index 4f6cfdd7a5c..835ff852d3e 100644
--- a/contrib/compiler-rt/lib/builtins/fixsfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixsfdi.c
@@ -1,43 +1,23 @@
 /* ===-- fixsfdi.c - Implement __fixsfdi -----------------------------------===
  *
- *                    The LLVM Compiler Infrastructure
+ *                     The LLVM Compiler Infrastructure
  *
  * This file is dual licensed under the MIT and the University of Illinois Open
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixsfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in float is representable in di_int (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
+#define SINGLE_PRECISION
+#include "fp_lib.h"
 
 ARM_EABI_FNALIAS(f2lz, fixsfdi)
 
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
 COMPILER_RT_ABI di_int
-__fixsfdi(float a)
-{
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0)
-        return 0;
-    di_int s = (si_int)(fb.u & 0x80000000) >> 31;
-    di_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return (r ^ s) - s;
+__fixsfdi(fp_t a) {
+    return __fixint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixsfsi.c b/contrib/compiler-rt/lib/builtins/fixsfsi.c
index e3cc42d5255..f045536d685 100644
--- a/contrib/compiler-rt/lib/builtins/fixsfsi.c
+++ b/contrib/compiler-rt/lib/builtins/fixsfsi.c
@@ -1,47 +1,22 @@
-//===-- lib/fixsfsi.c - Single-precision -> integer conversion ----*- C -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is dual licensed under the MIT and the University of Illinois Open
-// Source Licenses. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements single-precision to integer conversion for the
-// compiler-rt library.  No range checking is performed; the behavior of this
-// conversion is undefined for out of range values in the C standard.
-//
-//===----------------------------------------------------------------------===//
+/* ===-- fixsfsi.c - Implement __fixsfsi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
 
 #define SINGLE_PRECISION
 #include "fp_lib.h"
+typedef si_int fixint_t;
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 ARM_EABI_FNALIAS(f2iz, fixsfsi)
 
-COMPILER_RT_ABI int
+COMPILER_RT_ABI si_int
 __fixsfsi(fp_t a) {
-    // Break a into sign, exponent, significand
-    const rep_t aRep = toRep(a);
-    const rep_t aAbs = aRep & absMask;
-    const int sign = aRep & signBit ? -1 : 1;
-    const int exponent = (aAbs >> significandBits) - exponentBias;
-    const rep_t significand = (aAbs & significandMask) | implicitBit;
-    
-    // If 0 < exponent < significandBits, right shift to get the result.
-    if ((unsigned int)exponent < significandBits) {
-        return sign * (significand >> (significandBits - exponent));
-    }
-    
-    // If exponent is negative, the result is zero.
-    else if (exponent < 0) {
-        return 0;
-    }
-    
-    // If significandBits < exponent, left shift to get the result.  This shift
-    // may end up being larger than the type width, which incurs undefined
-    // behavior, but the conversion itself is undefined in that case, so
-    // whatever the compiler decides to do is fine.
-    else {
-        return sign * (significand << (exponent - significandBits));
-    }
+    return __fixint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixsfti.c b/contrib/compiler-rt/lib/builtins/fixsfti.c
index 6a1a1c6d546..3a159b3e18e 100644
--- a/contrib/compiler-rt/lib/builtins/fixsfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixsfti.c
@@ -6,40 +6,21 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixsfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
+#define SINGLE_PRECISION
+#include "fp_lib.h"
 
-/* Returns: convert a to a signed long long, rounding toward zero. */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in float is representable in ti_int (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
+typedef ti_int fixint_t;
+typedef tu_int fixuint_t;
+#include "fp_fixint_impl.inc"
 
 COMPILER_RT_ABI ti_int
-__fixsfti(float a)
-{
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0)
-        return 0;
-    ti_int s = (si_int)(fb.u & 0x80000000) >> 31;
-    ti_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return (r ^ s) - s;
+__fixsfti(fp_t a) {
+    return __fixint(a);
 }
 
 #endif /* CRT_HAS_128BIT */
diff --git a/contrib/compiler-rt/lib/builtins/fixtfdi.c b/contrib/compiler-rt/lib/builtins/fixtfdi.c
new file mode 100644
index 00000000000..bc9dea1f4f8
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixtfdi.c
@@ -0,0 +1,23 @@
+/* ===-- fixtfdi.c - Implement __fixtfdi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef di_int fixint_t;
+typedef du_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI di_int
+__fixtfdi(fp_t a) {
+    return __fixint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixtfsi.c b/contrib/compiler-rt/lib/builtins/fixtfsi.c
new file mode 100644
index 00000000000..feb3de88509
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixtfsi.c
@@ -0,0 +1,23 @@
+/* ===-- fixtfsi.c - Implement __fixtfsi -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef si_int fixint_t;
+typedef su_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI si_int
+__fixtfsi(fp_t a) {
+    return __fixint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixtfti.c b/contrib/compiler-rt/lib/builtins/fixtfti.c
new file mode 100644
index 00000000000..ee4ada85cb4
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixtfti.c
@@ -0,0 +1,23 @@
+/* ===-- fixtfti.c - Implement __fixtfti -----------------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef ti_int fixint_t;
+typedef tu_int fixuint_t;
+#include "fp_fixint_impl.inc"
+
+COMPILER_RT_ABI ti_int
+__fixtfti(fp_t a) {
+    return __fixint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixunsdfdi.c b/contrib/compiler-rt/lib/builtins/fixunsdfdi.c
index 9e6371390d5..f4f689e3993 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsdfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsdfdi.c
@@ -6,42 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-/* Returns: convert a to a unsigned long long, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             du_int is a 64 bit integral type
- *             value in double is representable in du_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
+typedef du_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 ARM_EABI_FNALIAS(d2ulz, fixunsdfdi)
 
 COMPILER_RT_ABI du_int
-__fixunsdfdi(double a)
-{
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    udwords r;
-    r.s.high = (fb.u.s.high & 0x000FFFFF) | 0x00100000;
-    r.s.low = fb.u.s.low;
-    if (e > 52)
-        r.all <<= (e - 52);
-    else
-        r.all >>= (52 - e);
-    return r.all;
+__fixunsdfdi(fp_t a) {
+    return __fixuint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixunsdfsi.c b/contrib/compiler-rt/lib/builtins/fixunsdfsi.c
index c6a3c755e90..232d342d77d 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsdfsi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsdfsi.c
@@ -6,39 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfsi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-/* Returns: convert a to a unsigned int, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in double is representable in su_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
+typedef su_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 ARM_EABI_FNALIAS(d2uiz, fixunsdfsi)
 
 COMPILER_RT_ABI su_int
-__fixunsdfsi(double a)
-{
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    return (
-                0x80000000u                      |
-                ((fb.u.s.high & 0x000FFFFF) << 11) |
-                (fb.u.s.low >> 21)
-           ) >> (31 - e);
+__fixunsdfsi(fp_t a) {
+    return __fixuint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixunsdfti.c b/contrib/compiler-rt/lib/builtins/fixunsdfti.c
index cc6c84ff5cb..c3d7df97fbd 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsdfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsdfti.c
@@ -6,42 +6,18 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunsdfti for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
-
-/* Returns: convert a to a unsigned long long, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: double is a IEEE 64 bit floating point type 
- *             tu_int is a 64 bit integral type
- *             value in double is representable in tu_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */
+#define DOUBLE_PRECISION
+#include "fp_lib.h"
+typedef tu_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 COMPILER_RT_ABI tu_int
-__fixunsdfti(double a)
-{
-    double_bits fb;
-    fb.f = a;
-    int e = ((fb.u.s.high & 0x7FF00000) >> 20) - 1023;
-    if (e < 0 || (fb.u.s.high & 0x80000000))
-        return 0;
-    tu_int r = 0x0010000000000000uLL | (fb.u.all & 0x000FFFFFFFFFFFFFuLL);
-    if (e > 52)
-        r <<= (e - 52);
-    else
-        r >>= (52 - e);
-    return r;
+__fixunsdftti(fp_t a) {
+    return __fixuint(a);
 }
-
 #endif /* CRT_HAS_128BIT */
diff --git a/contrib/compiler-rt/lib/builtins/fixunssfdi.c b/contrib/compiler-rt/lib/builtins/fixunssfdi.c
index 69d5952e960..cd21cfd1859 100644
--- a/contrib/compiler-rt/lib/builtins/fixunssfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunssfdi.c
@@ -6,39 +6,16 @@
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
- *
- * This file implements __fixunssfdi for the compiler_rt library.
- *
- * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-/* Returns: convert a to a unsigned long long, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             du_int is a 64 bit integral type
- *             value in float is representable in du_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
+#define SINGLE_PRECISION
+#include "fp_lib.h"
+typedef du_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 ARM_EABI_FNALIAS(f2ulz, fixunssfdi)
 
 COMPILER_RT_ABI du_int
-__fixunssfdi(float a)
-{
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    du_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
+__fixunssfdi(fp_t a) {
+    return __fixuint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixunssfsi.c b/contrib/compiler-rt/lib/builtins/fixunssfsi.c
index e034139ea27..cc2b05bd84f 100644
--- a/contrib/compiler-rt/lib/builtins/fixunssfsi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunssfsi.c
@@ -12,34 +12,14 @@
  * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-/* Returns: convert a to a unsigned int, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             su_int is a 32 bit integral type
- *             value in float is representable in su_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
+#define SINGLE_PRECISION
+#include "fp_lib.h"
+typedef su_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 ARM_EABI_FNALIAS(f2uiz, fixunssfsi)
 
 COMPILER_RT_ABI su_int
-__fixunssfsi(float a)
-{
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    su_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
+__fixunssfsi(fp_t a) {
+    return __fixuint(a);
 }
diff --git a/contrib/compiler-rt/lib/builtins/fixunssfti.c b/contrib/compiler-rt/lib/builtins/fixunssfti.c
index 4da9e242ad0..9593153745c 100644
--- a/contrib/compiler-rt/lib/builtins/fixunssfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixunssfti.c
@@ -12,36 +12,12 @@
  * ===----------------------------------------------------------------------===
  */
 
-#include "int_lib.h"
-
-#ifdef CRT_HAS_128BIT
-
-/* Returns: convert a to a unsigned long long, rounding toward zero.
- *          Negative values all become zero.
- */
-
-/* Assumption: float is a IEEE 32 bit floating point type 
- *             tu_int is a 64 bit integral type
- *             value in float is representable in tu_int or is negative 
- *                 (no range checking performed)
- */
-
-/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */
+#if defined(CRT_HAS_128BIT)
+typedef tu_int fixuint_t;
+#include "fp_fixuint_impl.inc"
 
 COMPILER_RT_ABI tu_int
-__fixunssfti(float a)
-{
-    float_bits fb;
-    fb.f = a;
-    int e = ((fb.u & 0x7F800000) >> 23) - 127;
-    if (e < 0 || (fb.u & 0x80000000))
-        return 0;
-    tu_int r = (fb.u & 0x007FFFFF) | 0x00800000;
-    if (e > 23)
-        r <<= (e - 23);
-    else
-        r >>= (23 - e);
-    return r;
+__fixunssfti(fp_t a) {
+    return __fixuint(a);
 }
-
-#endif /* CRT_HAS_128BIT */
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixunstfdi.c b/contrib/compiler-rt/lib/builtins/fixunstfdi.c
new file mode 100644
index 00000000000..b2995f65834
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixunstfdi.c
@@ -0,0 +1,22 @@
+/* ===-- fixunstfdi.c - Implement __fixunstfdi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef du_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI du_int
+__fixunstfdi(fp_t a) {
+    return __fixuint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixunstfsi.c b/contrib/compiler-rt/lib/builtins/fixunstfsi.c
new file mode 100644
index 00000000000..b5d3f6a7d38
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixunstfsi.c
@@ -0,0 +1,22 @@
+/* ===-- fixunstfsi.c - Implement __fixunstfsi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef su_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI su_int
+__fixunstfsi(fp_t a) {
+    return __fixuint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixunstfti.c b/contrib/compiler-rt/lib/builtins/fixunstfti.c
new file mode 100644
index 00000000000..22ff9dfc033
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fixunstfti.c
@@ -0,0 +1,22 @@
+/* ===-- fixunstfsi.c - Implement __fixunstfsi -----------------------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define QUAD_PRECISION
+#include "fp_lib.h"
+
+#if defined(CRT_HAS_128BIT) && defined(CRT_LDBL_128BIT)
+typedef tu_int fixuint_t;
+#include "fp_fixuint_impl.inc"
+
+COMPILER_RT_ABI tu_int
+__fixunstfti(fp_t a) {
+    return __fixuint(a);
+}
+#endif
diff --git a/contrib/compiler-rt/lib/builtins/fixunsxfdi.c b/contrib/compiler-rt/lib/builtins/fixunsxfdi.c
index 7224d467e7c..075304e78dc 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsxfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsxfdi.c
@@ -38,6 +38,8 @@ __fixunsxfdi(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(du_int) * CHAR_BIT)
+        return ~(du_int)0;
     return fb.u.low.all >> (63 - e);
 }
 
diff --git a/contrib/compiler-rt/lib/builtins/fixunsxfsi.c b/contrib/compiler-rt/lib/builtins/fixunsxfsi.c
index df0a18e2c1a..c3c70f743de 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsxfsi.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsxfsi.c
@@ -23,7 +23,6 @@
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
  *             su_int is a 32 bit integral type
  *             value in long double is representable in su_int or is negative 
- *                 (no range checking performed)
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -38,6 +37,8 @@ __fixunsxfsi(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(su_int) * CHAR_BIT)
+        return ~(su_int)0;
     return fb.u.low.s.high >> (31 - e);
 }
 
diff --git a/contrib/compiler-rt/lib/builtins/fixunsxfti.c b/contrib/compiler-rt/lib/builtins/fixunsxfti.c
index 42e50730471..fb39d00ff5b 100644
--- a/contrib/compiler-rt/lib/builtins/fixunsxfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixunsxfti.c
@@ -21,9 +21,8 @@
  */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             tu_int is a 64 bit integral type
+ *             tu_int is a 128 bit integral type
  *             value in long double is representable in tu_int or is negative 
- *                 (no range checking performed)
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -38,6 +37,8 @@ __fixunsxfti(long double a)
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0 || (fb.u.high.s.low & 0x00008000))
         return 0;
+    if ((unsigned)e > sizeof(tu_int) * CHAR_BIT)
+        return ~(tu_int)0;
     tu_int r = fb.u.low.all;
     if (e > 63)
         r <<= (e - 63);
diff --git a/contrib/compiler-rt/lib/builtins/fixxfdi.c b/contrib/compiler-rt/lib/builtins/fixxfdi.c
index afc79d8664d..011787f9e4b 100644
--- a/contrib/compiler-rt/lib/builtins/fixxfdi.c
+++ b/contrib/compiler-rt/lib/builtins/fixxfdi.c
@@ -19,7 +19,7 @@
 /* Returns: convert a to a signed long long, rounding toward zero. */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             su_int is a 32 bit integral type
+ *             di_int is a 64 bit integral type
  *             value in long double is representable in di_int (no range checking performed)
  */
 
@@ -30,11 +30,15 @@
 COMPILER_RT_ABI di_int
 __fixxfdi(long double a)
 {
+    const di_int di_max = (di_int)((~(du_int)0) / 2);
+    const di_int di_min = -di_max - 1;
     long_double_bits fb;
     fb.f = a;
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
     if (e < 0)
         return 0;
+    if ((unsigned)e >= sizeof(di_int) * CHAR_BIT)
+        return a > 0 ? di_max : di_min;
     di_int s = -(si_int)((fb.u.high.s.low & 0x00008000) >> 15);
     di_int r = fb.u.low.all;
     r = (du_int)r >> (63 - e);
diff --git a/contrib/compiler-rt/lib/builtins/fixxfti.c b/contrib/compiler-rt/lib/builtins/fixxfti.c
index 3d0a279b384..968a4f0d5ee 100644
--- a/contrib/compiler-rt/lib/builtins/fixxfti.c
+++ b/contrib/compiler-rt/lib/builtins/fixxfti.c
@@ -19,8 +19,8 @@
 /* Returns: convert a to a signed long long, rounding toward zero. */
 
 /* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes
- *             su_int is a 32 bit integral type
- *             value in long double is representable in ti_int (no range checking performed)
+ *             ti_int is a 128 bit integral type
+ *             value in long double is representable in ti_int
  */
 
 /* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee |
@@ -30,6 +30,8 @@
 COMPILER_RT_ABI ti_int
 __fixxfti(long double a)
 {
+    const ti_int ti_max = (ti_int)((~(tu_int)0) / 2);
+    const ti_int ti_min = -ti_max - 1;
     long_double_bits fb;
     fb.f = a;
     int e = (fb.u.high.s.low & 0x00007FFF) - 16383;
@@ -37,6 +39,8 @@ __fixxfti(long double a)
         return 0;
     ti_int s = -(si_int)((fb.u.high.s.low & 0x00008000) >> 15);
     ti_int r = fb.u.low.all;
+    if ((unsigned)e >= sizeof(ti_int) * CHAR_BIT)
+        return a > 0 ? ti_max : ti_min;
     if (e > 63)
         r <<= (e - 63);
     else
diff --git a/contrib/compiler-rt/lib/builtins/fp_fixint_impl.inc b/contrib/compiler-rt/lib/builtins/fp_fixint_impl.inc
new file mode 100644
index 00000000000..035e87ca10e
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fp_fixint_impl.inc
@@ -0,0 +1,41 @@
+//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements float to integer conversion for the
+// compiler-rt library.
+//
+//===----------------------------------------------------------------------===//
+
+#include "fp_lib.h"
+
+static inline fixint_t __fixint(fp_t a) {
+    const fixint_t fixint_max = (fixint_t)((~(fixuint_t)0) / 2);
+    const fixint_t fixint_min = -fixint_max - 1;
+    // Break a into sign, exponent, significand
+    const rep_t aRep = toRep(a);
+    const rep_t aAbs = aRep & absMask;
+    const fixint_t sign = aRep & signBit ? -1 : 1;
+    const int exponent = (aAbs >> significandBits) - exponentBias;
+    const rep_t significand = (aAbs & significandMask) | implicitBit;
+
+    // If exponent is negative, the result is zero.
+    if (exponent < 0)
+        return 0;
+
+    // If the value is too large for the integer type, saturate.
+    if ((unsigned)exponent >= sizeof(fixint_t) * CHAR_BIT)
+        return sign == 1 ? fixint_max : fixint_min;
+
+    // If 0 <= exponent < significandBits, right shift to get the result.
+    // Otherwise, shift left.
+    if (exponent < significandBits)
+        return sign * (significand >> (significandBits - exponent));
+    else
+        return sign * ((fixint_t)significand << (exponent - significandBits));
+}
diff --git a/contrib/compiler-rt/lib/builtins/fp_fixuint_impl.inc b/contrib/compiler-rt/lib/builtins/fp_fixuint_impl.inc
new file mode 100644
index 00000000000..5fefab0e2d8
--- /dev/null
+++ b/contrib/compiler-rt/lib/builtins/fp_fixuint_impl.inc
@@ -0,0 +1,39 @@
+//===-- lib/fixdfsi.c - Double-precision -> integer conversion ----*- C -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is dual licensed under the MIT and the University of Illinois Open
+// Source Licenses. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements float to unsigned integer conversion for the
+// compiler-rt library.
+//
+//===----------------------------------------------------------------------===//
+
+#include "fp_lib.h"
+
+static inline fixuint_t __fixuint(fp_t a) {
+    // Break a into sign, exponent, significand
+    const rep_t aRep = toRep(a);
+    const rep_t aAbs = aRep & absMask;
+    const int sign = aRep & signBit ? -1 : 1;
+    const int exponent = (aAbs >> significandBits) - exponentBias;
+    const rep_t significand = (aAbs & significandMask) | implicitBit;
+
+    // If either the value or the exponent is negative, the result is zero.
+    if (sign == -1 || exponent < 0)
+        return 0;
+
+    // If the value is too large for the integer type, saturate.
+    if ((unsigned)exponent > sizeof(fixuint_t) * CHAR_BIT)
+        return ~(fixuint_t)0;
+
+    // If 0 <= exponent < significandBits, right shift to get the result.
+    // Otherwise, shift left.
+    if (exponent < significandBits)
+        return significand >> (significandBits - exponent);
+    else
+        return (fixuint_t)significand << (exponent - significandBits);
+}
diff --git a/contrib/jemalloc/include/jemalloc/jemalloc_FreeBSD.h b/contrib/jemalloc/include/jemalloc/jemalloc_FreeBSD.h
index 94554bcc5da..75b9b91e75f 100644
--- a/contrib/jemalloc/include/jemalloc/jemalloc_FreeBSD.h
+++ b/contrib/jemalloc/include/jemalloc/jemalloc_FreeBSD.h
@@ -40,6 +40,9 @@
 #ifdef __arm__
 #  define LG_SIZEOF_PTR		2
 #endif
+#ifdef __aarch64__
+#  define LG_SIZEOF_PTR		3
+#endif
 #ifdef __mips__
 #ifdef __mips_n64
 #  define LG_SIZEOF_PTR		3
diff --git a/contrib/libc++/include/__bit_reference b/contrib/libc++/include/__bit_reference
index 4938f44608f..5659ed06824 100644
--- a/contrib/libc++/include/__bit_reference
+++ b/contrib/libc++/include/__bit_reference
@@ -906,7 +906,6 @@ rotate(__bit_iterator<_Cp, false> __first, __bit_iterator<_Cp, false> __middle,
 {
     typedef __bit_iterator<_Cp, false> _I1;
     typedef  typename _I1::difference_type difference_type;
-    typedef typename _I1::__storage_type __storage_type;
     difference_type __d1 = __middle - __first;
     difference_type __d2 = __last - __middle;
     _I1 __r = __first + __d2;
diff --git a/contrib/libc++/include/__tree b/contrib/libc++/include/__tree
index 8e5447a2ffb..9007dbf507d 100644
--- a/contrib/libc++/include/__tree
+++ b/contrib/libc++/include/__tree
@@ -2069,7 +2069,6 @@ template <class _Key>
 typename __tree<_Tp, _Compare, _Allocator>::size_type
 __tree<_Tp, _Compare, _Allocator>::__count_multi(const _Key& __k) const
 {
-    typedef pair<const_iterator, const_iterator> _Pp;
     __node_const_pointer __result = __end_node();
     __node_const_pointer __rt = __root();
     while (__rt != nullptr)
diff --git a/contrib/libc++/include/algorithm b/contrib/libc++/include/algorithm
index 02cbc816f61..61b01438780 100644
--- a/contrib/libc++/include/algorithm
+++ b/contrib/libc++/include/algorithm
@@ -4365,8 +4365,6 @@ __buffered_inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator
                 typename iterator_traits<_BidirectionalIterator>::value_type* __buff)
 {
     typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
-    typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
-    typedef typename iterator_traits<_BidirectionalIterator>::pointer pointer;
     __destruct_n __d(0);
     unique_ptr<value_type, __destruct_n&> __h2(__buff, __d);
     if (__len1 <= __len2)
@@ -4400,7 +4398,6 @@ __inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator __middle,
                                  typename iterator_traits<_BidirectionalIterator>::difference_type __len2,
                 typename iterator_traits<_BidirectionalIterator>::value_type* __buff, ptrdiff_t __buff_size)
 {
-    typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
     typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
     while (true)
     {
@@ -4799,7 +4796,6 @@ void
 __sift_up(_RandomAccessIterator __first, _RandomAccessIterator __last, _Compare __comp,
           typename iterator_traits<_RandomAccessIterator>::difference_type __len)
 {
-    typedef typename iterator_traits<_RandomAccessIterator>::difference_type difference_type;
     typedef typename iterator_traits<_RandomAccessIterator>::value_type value_type;
     if (__len > 1)
     {
diff --git a/contrib/libxo/libxo/xo.h b/contrib/libxo/libxo/xo.h
index 82b965a2920..ea289f088b6 100644
--- a/contrib/libxo/libxo/xo.h
+++ b/contrib/libxo/libxo/xo.h
@@ -272,13 +272,13 @@ void
 xo_warnx (const char *fmt, ...);
 
 void
-xo_err (int eval, const char *fmt, ...);
+xo_err (int eval, const char *fmt, ...) __dead2;
 
 void
-xo_errx (int eval, const char *fmt, ...);
+xo_errx (int eval, const char *fmt, ...) __dead2;
 
 void
-xo_errc (int eval, int code, const char *fmt, ...);
+xo_errc (int eval, int code, const char *fmt, ...) __dead2;
 
 void
 xo_message_hcv (xo_handle_t *xop, int code, const char *fmt, va_list vap);
diff --git a/contrib/tzdata/antarctica b/contrib/tzdata/antarctica
index 1deff8e4ed0..ebae9940717 100644
--- a/contrib/tzdata/antarctica
+++ b/contrib/tzdata/antarctica
@@ -47,8 +47,8 @@ Rule	ChileAQ	2009	only	-	Mar	Sun>=9	3:00u	0	-
 Rule	ChileAQ	2010	only	-	Apr	Sun>=1	3:00u	0	-
 Rule	ChileAQ	2011	only	-	May	Sun>=2	3:00u	0	-
 Rule	ChileAQ	2011	only	-	Aug	Sun>=16	4:00u	1:00	S
-Rule	ChileAQ	2012	max	-	Apr	Sun>=23	3:00u	0	-
-Rule	ChileAQ	2012	max	-	Sep	Sun>=2	4:00u	1:00	S
+Rule	ChileAQ	2012	2015	-	Apr	Sun>=23	3:00u	0	-
+Rule	ChileAQ	2012	2014	-	Sep	Sun>=2	4:00u	1:00	S
 
 # Argentina - year-round bases
 # Belgrano II, Confin Coast, -770227-0343737, since 1972-02-05
@@ -354,9 +354,10 @@ Zone Antarctica/Rothera	0	-	zzz	1976 Dec  1
 #
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone Antarctica/Palmer	0	-	zzz	1965
-			-4:00	ArgAQ	AR%sT	1969 Oct 5
+			-4:00	ArgAQ	AR%sT	1969 Oct  5
 			-3:00	ArgAQ	AR%sT	1982 May
-			-4:00	ChileAQ	CL%sT
+			-4:00	ChileAQ	CL%sT	2015 Apr 26 3:00u
+			-3:00	-	CLT
 #
 #
 # McMurdo Station, Ross Island, since 1955-12
diff --git a/contrib/tzdata/asia b/contrib/tzdata/asia
index 1a2bd12ad2a..8f33b162097 100644
--- a/contrib/tzdata/asia
+++ b/contrib/tzdata/asia
@@ -145,10 +145,7 @@ Zone	Asia/Baku	3:19:24 -	LMT	1924 May  2
 			4:00	Azer	AZ%sT
 
 # Bahrain
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Bahrain	3:22:20 -	LMT	1920     # Manamah
-			4:00	-	GST	1972 Jun
-			3:00	-	AST
+# See Asia/Qatar.
 
 # Bangladesh
 # From Alexander Krivenyshev (2009-05-13):
@@ -1731,9 +1728,7 @@ Zone	Asia/Pyongyang	8:23:00 -	LMT	1908 Apr  1
 ###############################################################################
 
 # Kuwait
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Kuwait	3:11:56 -	LMT	1950
-			3:00	-	AST
+# See Asia/Riyadh.
 
 # Laos
 # See Asia/Bangkok.
@@ -1954,12 +1949,7 @@ Zone	Asia/Kathmandu	5:41:16 -	LMT	1920
 			5:45	-	NPT	# Nepal Time
 
 # Oman
-
-# Milne says 3:54:24 was the meridian of the Muscat Tidal Observatory.
-
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Muscat	3:54:24 -	LMT	1920
-			4:00	-	GST
+# See Asia/Dubai.
 
 # Pakistan
 
@@ -2453,6 +2443,7 @@ Zone	Asia/Manila	-15:56:00 -	LMT	1844 Dec 31
 Zone	Asia/Qatar	3:26:08 -	LMT	1920     # Al Dawhah / Doha
 			4:00	-	GST	1972 Jun
 			3:00	-	AST
+Link Asia/Qatar Asia/Bahrain
 
 # Saudi Arabia
 #
@@ -2479,6 +2470,8 @@ Zone	Asia/Qatar	3:26:08 -	LMT	1920     # Al Dawhah / Doha
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone	Asia/Riyadh	3:06:52 -	LMT	1947 Mar 14
 			3:00	-	AST
+Link Asia/Riyadh Asia/Aden	# Yemen
+Link Asia/Riyadh Asia/Kuwait
 
 # Singapore
 # taken from Mok Ly Yng (2003-10-30)
@@ -2767,6 +2760,7 @@ Zone	Asia/Ashgabat	3:53:32 -	LMT	1924 May  2 # or Ashkhabad
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone	Asia/Dubai	3:41:12 -	LMT	1920
 			4:00	-	GST
+Link Asia/Dubai Asia/Muscat	# Oman
 
 # Uzbekistan
 # Byalokoz 1919 says Uzbekistan was 4:27:53.
@@ -2851,10 +2845,4 @@ Zone Asia/Ho_Chi_Minh	7:06:40 -	LMT	1906 Jul  1
 			7:00	-	ICT
 
 # Yemen
-
-# Milne says 2:59:54 was the meridian of the saluting battery at Aden,
-# and that Yemen was at 1:55:56, the meridian of the Hagia Sophia.
-
-# Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone	Asia/Aden	2:59:54	-	LMT	1950
-			3:00	-	AST
+# See Asia/Riyadh.
diff --git a/contrib/tzdata/backward b/contrib/tzdata/backward
index 00cbfc41642..3ceda884bdc 100644
--- a/contrib/tzdata/backward
+++ b/contrib/tzdata/backward
@@ -5,7 +5,7 @@
 # and their old names.  Many names changed in late 1993.
 
 # Link	TARGET			LINK-NAME
-Link	Africa/Asmara		Africa/Asmera
+Link	Africa/Nairobi		Africa/Asmera
 Link	Africa/Abidjan		Africa/Timbuktu
 Link	America/Argentina/Catamarca	America/Argentina/ComodRivadavia
 Link	America/Adak		America/Atka
diff --git a/contrib/tzdata/europe b/contrib/tzdata/europe
index 5e78c549981..60dfc1dce1f 100644
--- a/contrib/tzdata/europe
+++ b/contrib/tzdata/europe
@@ -1407,35 +1407,32 @@ Zone	Europe/Budapest	1:16:20 -	LMT	1890 Oct
 # might be a reference to the Julian calendar as opposed to Gregorian, or it
 # might mean something else (???).
 #
-# From Paul Eggert (2006-03-22):
-# The Iceland Almanak, Shanks & Pottenger, and Whitman disagree on many points.
-# We go with the Almanak, except for one claim from Shanks & Pottenger, namely
-# that Reykavik was 21W57 from 1837 to 1908, local mean time before that.
+# From Paul Eggert (2014-11-22):
+# The information below is taken from the 1988 Almanak; see
+# http://www.almanak.hi.is/klukkan.html
 #
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
-Rule	Iceland	1917	1918	-	Feb	19	23:00	1:00	S
+Rule	Iceland	1917	1919	-	Feb	19	23:00	1:00	S
 Rule	Iceland	1917	only	-	Oct	21	 1:00	0	-
-Rule	Iceland	1918	only	-	Nov	16	 1:00	0	-
+Rule	Iceland	1918	1919	-	Nov	16	 1:00	0	-
+Rule	Iceland	1921	only	-	Mar	19	23:00	1:00	S
+Rule	Iceland	1921	only	-	Jun	23	 1:00	0	-
 Rule	Iceland	1939	only	-	Apr	29	23:00	1:00	S
-Rule	Iceland	1939	only	-	Nov	29	 2:00	0	-
+Rule	Iceland	1939	only	-	Oct	29	 2:00	0	-
 Rule	Iceland	1940	only	-	Feb	25	 2:00	1:00	S
-Rule	Iceland	1940	only	-	Nov	 3	 2:00	0	-
-Rule	Iceland	1941	only	-	Mar	 2	 1:00s	1:00	S
-Rule	Iceland	1941	only	-	Nov	 2	 1:00s	0	-
-Rule	Iceland	1942	only	-	Mar	 8	 1:00s	1:00	S
-Rule	Iceland	1942	only	-	Oct	25	 1:00s	0	-
+Rule	Iceland	1940	1941	-	Nov	Sun>=2	 1:00s	0	-
+Rule	Iceland	1941	1942	-	Mar	Sun>=2	 1:00s	1:00	S
 # 1943-1946 - first Sunday in March until first Sunday in winter
 Rule	Iceland	1943	1946	-	Mar	Sun>=1	 1:00s	1:00	S
-Rule	Iceland	1943	1948	-	Oct	Sun>=22	 1:00s	0	-
+Rule	Iceland	1942	1948	-	Oct	Sun>=22	 1:00s	0	-
 # 1947-1967 - first Sunday in April until first Sunday in winter
 Rule	Iceland	1947	1967	-	Apr	Sun>=1	 1:00s	1:00	S
-# 1949 Oct transition delayed by 1 week
+# 1949 and 1967 Oct transitions delayed by 1 week
 Rule	Iceland	1949	only	-	Oct	30	 1:00s	0	-
 Rule	Iceland	1950	1966	-	Oct	Sun>=22	 1:00s	0	-
 Rule	Iceland	1967	only	-	Oct	29	 1:00s	0	-
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
-Zone Atlantic/Reykjavik	-1:27:24 -	LMT	1837
-			-1:27:48 -	RMT	1908 # Reykjavik Mean Time?
+Zone Atlantic/Reykjavik	-1:28	-	LMT	1908
 			-1:00	Iceland	IS%sT	1968 Apr  7  1:00s
 			 0:00	-	GMT
 
diff --git a/contrib/tzdata/leap-seconds.list b/contrib/tzdata/leap-seconds.list
index 0980e7bd838..17c04663887 100644
--- a/contrib/tzdata/leap-seconds.list
+++ b/contrib/tzdata/leap-seconds.list
@@ -47,7 +47,7 @@
 #	and can be ignored for many purposes. These differences
 #	are tabulated in Circular T, which is published monthly
 #	by the International Bureau of Weights and Measures
-#	(BIPM). See www.bipm.fr for more information.
+#	(BIPM). See www.bipm.org for more information.
 #
 #	3. The current definition of the relationship between UTC
 #	and TAI dates from 1 January 1972. A number of different
@@ -127,6 +127,15 @@
 #	with, since the difficulty of unambiguously representing the epoch
 #	during the leap second does not arise.
 #
+#	Some systems implement leap seconds by amortizing the leap second
+#	over the last few minutes of the day. The frequency of the local
+#	clock is decreased (or increased) to realize the positive (or
+#	negative) leap second. This method removes the time step described
+#	above. Although the long-term behavior of the time scale is correct 
+#	in this case, this method introduces an error during the adjustment 
+#	period both in time and in frequency with respect to the official 
+#	defintion of UTC.
+#
 #	Questions or comments to:
 #		Judah Levine
 #		Time and Frequency Division
@@ -134,7 +143,7 @@
 #		Boulder, Colorado
 #		Judah.Levine@nist.gov
 #
-#	Last Update of leap second values:   11 January 2012
+#	Last Update of leap second values:   5 January 2015
 #
 #	The following line shows this last update date in NTP timestamp
 #	format. This is the date on which the most recent change to
@@ -142,7 +151,7 @@
 #	be identified by the unique pair of characters in the first two
 #	columns as shown below.
 #
-#$	 3535228800
+#$	 3629404800
 #
 #	The NTP timestamps are in units of seconds since the NTP epoch,
 #	which is 1 January 1900, 00:00:00. The Modified Julian Day number
@@ -190,10 +199,10 @@
 #	current -- the update time stamp, the data and the name of the file
 #	will not change.
 #
-#	Updated through IERS Bulletin C48
-#	File expires on:  28 June 2015
+#	Updated through IERS Bulletin C49
+#	File expires on:  28 December 2015
 #
-#@	3644438400
+#@	3660249600
 #
 2272060800	10	# 1 Jan 1972
 2287785600	11	# 1 Jul 1972
@@ -221,6 +230,7 @@
 3345062400	33	# 1 Jan 2006
 3439756800	34	# 1 Jan 2009
 3550089600	35	# 1 Jul 2012
+3644697600	36	# 1 Jul 2015
 #
 #	the following special comment contains the
 #	hash value of the data in this file computed
@@ -236,4 +246,4 @@
 #	the hash line is also ignored in the
 #	computation.
 #
-#h	a4862ccd c6f43c6 964f3604 85944a26 b5cfad4e
+#h	45e70fa7 a9df2033 f4a49ab0 ec648273 7b6c22c
diff --git a/contrib/tzdata/northamerica b/contrib/tzdata/northamerica
index c91430c0337..cb94c5e502b 100644
--- a/contrib/tzdata/northamerica
+++ b/contrib/tzdata/northamerica
@@ -124,7 +124,7 @@ Rule	US	1918	1919	-	Mar	lastSun	2:00	1:00	D
 Rule	US	1918	1919	-	Oct	lastSun	2:00	0	S
 Rule	US	1942	only	-	Feb	9	2:00	1:00	W # War
 Rule	US	1945	only	-	Aug	14	23:00u	1:00	P # Peace
-Rule	US	1945	only	-	Sep	30	2:00	0	S
+Rule	US	1945	only	-	Sep	lastSun	2:00	0	S
 Rule	US	1967	2006	-	Oct	lastSun	2:00	0	S
 Rule	US	1967	1973	-	Apr	lastSun	2:00	1:00	D
 Rule	US	1974	only	-	Jan	6	2:00	1:00	D
@@ -2124,11 +2124,11 @@ Zone America/Dawson	-9:17:40 -	LMT	1900 Aug 20
 
 # Mexico
 
-# From Paul Eggert (2001-03-05):
+# From Paul Eggert (2014-12-07):
 # The Investigation and Analysis Service of the
 # Mexican Library of Congress (MLoC) has published a
 # history of Mexican local time (in Spanish)
-# http://www.cddhcu.gob.mx/bibliot/publica/inveyana/polisoc/horver/
+# http://www.diputados.gob.mx/bibliot/publica/inveyana/polisoc/horver/index.htm
 #
 # Here are the discrepancies between Shanks & Pottenger (S&P) and the MLoC.
 # (In all cases we go with the MLoC.)
@@ -2297,6 +2297,24 @@ Zone America/Dawson	-9:17:40 -	LMT	1900 Aug 20
 # efecto desde las dos horas del segundo domingo de marzo y concluirá a
 # las dos horas del primer domingo de noviembre.
 
+# From Steffen Thorsen (2014-12-08), translated by Gwillim Law:
+# The Mexican state of Quintana Roo will likely change to EST in 2015.
+#
+# http://www.unioncancun.mx/articulo/2014/12/04/medio-ambiente/congreso-aprueba-una-hora-mas-de-sol-en-qroo
+# "With this change, the time conflict that has existed between the municipios
+# of Quintana Roo and the municipio of Felipe Carrillo Puerto may come to an
+# end. The latter declared itself in rebellion 15 years ago when a time change
+# was initiated in Mexico, and since then it has refused to change its time
+# zone along with the rest of the country."
+#
+# From Steffen Thorsen (2015-01-14), translated by Gwillim Law:
+# http://sipse.com/novedades/confirman-aplicacion-de-nueva-zona-horaria-para-quintana-roo-132331.html
+# "...the new time zone will come into effect at two o'clock on the first Sunday
+# of February, when we will have to advance the clock one hour from its current
+# time..."
+#
+# Also, the new zone will not use DST.
+
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
 Rule	Mexico	1939	only	-	Feb	5	0:00	1:00	D
 Rule	Mexico	1939	only	-	Jun	25	0:00	0	S
@@ -2317,7 +2335,8 @@ Rule	Mexico	2002	max	-	Oct	lastSun	2:00	0	S
 Zone America/Cancun	-5:47:04 -	LMT	1922 Jan  1  0:12:56
 			-6:00	-	CST	1981 Dec 23
 			-5:00	Mexico	E%sT	1998 Aug  2  2:00
-			-6:00	Mexico	C%sT
+			-6:00	Mexico	C%sT	2015 Feb  1  2:00
+			-5:00	-	EST
 # Campeche, Yucatán; represented by Mérida
 Zone America/Merida	-5:58:28 -	LMT	1922 Jan  1  0:01:32
 			-6:00	-	CST	1981 Dec 23
diff --git a/contrib/tzdata/southamerica b/contrib/tzdata/southamerica
index bdc29c214ed..3ab353e329a 100644
--- a/contrib/tzdata/southamerica
+++ b/contrib/tzdata/southamerica
@@ -1206,6 +1206,11 @@ Zone America/Rio_Branco	-4:31:12 -	LMT	1914
 # DST Start: first Saturday of September 2014 (Sun 07 Sep 2014 04:00 UTC)
 # http://www.diariooficial.interior.gob.cl//media/2014/02/19/do-20140219.pdf
 
+# From Juan Correa (2015-01-28):
+# ... today the Ministry of Energy announced that Chile will drop DST, will keep
+# "summer time" (UTC -3 / UTC -5) all year round....
+# http://www.minenergia.cl/ministerio/noticias/generales/ministerio-de-energia-anuncia.html
+
 # NOTE: ChileAQ rules for Antarctic bases are stored separately in the
 # 'antarctica' file.
 
@@ -1247,8 +1252,8 @@ Rule	Chile	2009	only	-	Mar	Sun>=9	3:00u	0	-
 Rule	Chile	2010	only	-	Apr	Sun>=1	3:00u	0	-
 Rule	Chile	2011	only	-	May	Sun>=2	3:00u	0	-
 Rule	Chile	2011	only	-	Aug	Sun>=16	4:00u	1:00	S
-Rule	Chile	2012	max	-	Apr	Sun>=23	3:00u	0	-
-Rule	Chile	2012	max	-	Sep	Sun>=2	4:00u	1:00	S
+Rule	Chile	2012	2015	-	Apr	Sun>=23	3:00u	0	-
+Rule	Chile	2012	2014	-	Sep	Sun>=2	4:00u	1:00	S
 # IATA SSIM anomalies: (1992-02) says 1992-03-14;
 # (1996-09) says 1998-03-08.  Ignore these.
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
@@ -1259,11 +1264,13 @@ Zone America/Santiago	-4:42:46 -	LMT	1890
 			-4:00	-	CLT	1919 Jul  1 # Chile Time
 			-4:42:46 -	SMT	1927 Sep  1 # Santiago Mean Time
 			-5:00	Chile	CL%sT	1947 May 22 # Chile Time
-			-4:00	Chile	CL%sT
+			-4:00	Chile	CL%sT	2015 Apr 26  3:00u
+			-3:00	-	CLT
 Zone Pacific/Easter	-7:17:44 -	LMT	1890
 			-7:17:28 -	EMT	1932 Sep    # Easter Mean Time
-			-7:00	Chile	EAS%sT	1982 Mar 13 21:00 # Easter Time
-			-6:00	Chile	EAS%sT
+			-7:00	Chile	EAS%sT	1982 Mar 13 3:00u # Easter Time
+			-6:00	Chile	EAS%sT	2015 Apr 26 3:00u
+			-5:00	-	EAST
 #
 # Salas y Gómez Island is uninhabited.
 # Other Chilean locations, including Juan Fernández Is, Desventuradas Is,
diff --git a/contrib/tzdata/zone.tab b/contrib/tzdata/zone.tab
index a7373f177df..f418e7ffca1 100644
--- a/contrib/tzdata/zone.tab
+++ b/contrib/tzdata/zone.tab
@@ -274,7 +274,7 @@ MU	-2010+05730	Indian/Mauritius
 MV	+0410+07330	Indian/Maldives
 MW	-1547+03500	Africa/Blantyre
 MX	+1924-09909	America/Mexico_City	Central Time - most locations
-MX	+2105-08646	America/Cancun	Central Time - Quintana Roo
+MX	+2105-08646	America/Cancun	Eastern Standard Time - Quintana Roo
 MX	+2058-08937	America/Merida	Central Time - Campeche, Yucatan
 MX	+2540-10019	America/Monterrey	Mexican Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas away from US border
 MX	+2550-09730	America/Matamoros	US Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas near US border
diff --git a/contrib/tzdata/zone1970.tab b/contrib/tzdata/zone1970.tab
index cc98f64e025..4fe6af04719 100644
--- a/contrib/tzdata/zone1970.tab
+++ b/contrib/tzdata/zone1970.tab
@@ -234,7 +234,7 @@ MT	+3554+01431	Europe/Malta
 MU	-2010+05730	Indian/Mauritius
 MV	+0410+07330	Indian/Maldives
 MX	+1924-09909	America/Mexico_City	Central Time - most locations
-MX	+2105-08646	America/Cancun	Central Time - Quintana Roo
+MX	+2105-08646	America/Cancun	Eastern Standard Time - Quintana Roo
 MX	+2058-08937	America/Merida	Central Time - Campeche, Yucatán
 MX	+2540-10019	America/Monterrey	Mexican Central Time - Coahuila, Durango, Nuevo León, Tamaulipas away from US border
 MX	+2550-09730	America/Matamoros	US Central Time - Coahuila, Durango, Nuevo León, Tamaulipas near US border
diff --git a/etc/auto_master b/etc/auto_master
index 0083b1824bc..255b7f861b8 100644
--- a/etc/auto_master
+++ b/etc/auto_master
@@ -6,3 +6,4 @@
 # When using the -media special map, make sure to edit devd.conf(5)
 # to move the call to "automount -c" out of the comments section.
 #/media		-media		-nosuid
+#/-		-noauto
diff --git a/etc/autofs/Makefile b/etc/autofs/Makefile
index 3aa7e0307a7..6d1c9e85d30 100644
--- a/etc/autofs/Makefile
+++ b/etc/autofs/Makefile
@@ -1,6 +1,6 @@
 # $FreeBSD$
 
-FILES=		include_ldap special_hosts special_media special_null
+FILES=		include_ldap special_hosts special_media special_noauto special_null
 
 NO_OBJ=
 FILESDIR=	/etc/autofs
diff --git a/etc/autofs/special_noauto b/etc/autofs/special_noauto
new file mode 100755
index 00000000000..219ec7ea699
--- /dev/null
+++ b/etc/autofs/special_noauto
@@ -0,0 +1,29 @@
+#!/bin/sh
+#
+# $FreeBSD$
+#
+
+print_available() {
+	sed 's/#.*//' /etc/fstab | awk '$4 ~ /noauto/ { print $2 }'
+}
+
+print_one() {
+	local _mntpoint
+
+	_mntpoint="${1%/}"
+	
+	sed 's/#.*//' /etc/fstab | awk '
+	$2 == "'"${_mntpoint}"'" && $4 ~ /noauto/ {
+		if ($1 ~ /:/) { dev=$1 } else { dev=":"$1 }
+		print "-fstype=" $3 "," $4, dev
+	}'
+}
+
+if [ $# -eq 0 ]; then
+	print_available
+	exit 0
+fi
+
+print_one "$1"
+exit 0
+
diff --git a/etc/defaults/periodic.conf b/etc/defaults/periodic.conf
index 4324cfa3772..97519ca7c41 100644
--- a/etc/defaults/periodic.conf
+++ b/etc/defaults/periodic.conf
@@ -89,7 +89,7 @@ daily_news_expire_enable="YES"				# Run news.expire
 
 # 400.status-disks
 daily_status_disks_enable="YES"				# Check disk status
-daily_status_disks_df_flags="-l -h"		# df(1) flags for check
+daily_status_disks_df_flags="-l -h"			# df(1) flags for check
 
 # 401.status-graid
 daily_status_graid_enable="NO"				# Check graid(8)
diff --git a/lib/libc/gen/getpwent.c b/lib/libc/gen/getpwent.c
index 0cb8ed227f8..09a624785a1 100644
--- a/lib/libc/gen/getpwent.c
+++ b/lib/libc/gen/getpwent.c
@@ -1942,7 +1942,7 @@ compat_passwd(void *retval, void *mdata, va_list ap)
 			break;
 	}
 fin:
-	if (!stayopen && st->db != NULL) {
+	if (st->db != NULL && !stayopen) {
 		(void)st->db->close(st->db);
 		st->db = NULL;
 	}
diff --git a/lib/libc/net/sctp_sys_calls.c b/lib/libc/net/sctp_sys_calls.c
index 6971c606dbc..f07aa4321ca 100644
--- a/lib/libc/net/sctp_sys_calls.c
+++ b/lib/libc/net/sctp_sys_calls.c
@@ -383,6 +383,9 @@ sctp_opt_info(int sd, sctp_assoc_t id, int opt, void *arg, socklen_t * size)
 	case SCTP_PR_ASSOC_STATUS:
 		((struct sctp_prstatus *)arg)->sprstat_assoc_id = id;
 		break;
+	case SCTP_MAX_CWND:
+		((struct sctp_assoc_value *)arg)->assoc_id = id;
+		break;
 	default:
 		break;
 	}
diff --git a/lib/libc/posix1e/acl_calc_mask.c b/lib/libc/posix1e/acl_calc_mask.c
index a2d15276bf3..56215b9094c 100644
--- a/lib/libc/posix1e/acl_calc_mask.c
+++ b/lib/libc/posix1e/acl_calc_mask.c
@@ -104,6 +104,7 @@ acl_calc_mask(acl_t *acl_p)
 		/* if no mask exists, check acl_cnt... */
 		if (acl_int_new->acl_cnt == ACL_MAX_ENTRIES) {
 			errno = ENOMEM;
+			acl_free(acl_new);
 			return (-1);
 		}
 		/* ...and add the mask entry */
diff --git a/lib/libc/posix1e/acl_strip.c b/lib/libc/posix1e/acl_strip.c
index ae37b38a137..85dfb4721a3 100644
--- a/lib/libc/posix1e/acl_strip.c
+++ b/lib/libc/posix1e/acl_strip.c
@@ -82,8 +82,10 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 
 	have_mask_entry = 0;
 	acl_new = acl_init(ACL_MAX_ENTRIES);
-	if (acl_new == NULL)
+	if (acl_new == NULL) {
+		acl_free(acl_old);
 		return (NULL);
+	}
 	tag = ACL_UNDEFINED_TAG;
 
 	/* only save the default user/group/other entries */
@@ -94,16 +96,16 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 		assert(_entry_brand(entry) == ACL_BRAND_POSIX);
 
 		if (acl_get_tag_type(entry, &tag) == -1)
-			return (NULL);
+			goto fail;
 
 		switch(tag) {
 		case ACL_USER_OBJ:
 		case ACL_GROUP_OBJ:
 		case ACL_OTHER:
 			if (acl_get_tag_type(entry, &tag) == -1)
-				return (NULL);
+				goto fail;
 			if (acl_get_permset(entry, &perm) == -1)
-				return (NULL);
+				goto fail;
 			if (acl_create_entry(&acl_new, &entry_new) == -1)
 				return (NULL);
 			if (acl_set_tag_type(entry_new, tag) == -1)
@@ -120,6 +122,10 @@ _posix1e_acl_strip_np(const acl_t aclp, int recalculate_mask)
 		default:
 			break;
 		}
+fail:
+	acl_free(acl_new);
+	acl_free(acl_old);
+	return (NULL);
 	}
 
 	assert(_acl_brand(acl_new) == ACL_BRAND_POSIX);
diff --git a/lib/libc/powerpc/gen/_setjmp.S b/lib/libc/powerpc/gen/_setjmp.S
index e28386c24b9..f7f3d64e1b7 100644
--- a/lib/libc/powerpc/gen/_setjmp.S
+++ b/lib/libc/powerpc/gen/_setjmp.S
@@ -56,12 +56,54 @@ ENTRY(_setjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	stmw	%r9,20(%r3)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r3)
+	stfd	%f15,92+1*8(%r3)
+	stfd	%f16,92+2*8(%r3)
+	stfd	%f17,92+3*8(%r3)
+	stfd	%f18,92+4*8(%r3)
+	stfd	%f19,92+5*8(%r3)
+	stfd	%f20,92+6*8(%r3)
+	stfd	%f21,92+7*8(%r3)
+	stfd	%f22,92+8*8(%r3)
+	stfd	%f23,92+9*8(%r3)
+	stfd	%f24,92+10*8(%r3)
+	stfd	%f25,92+11*8(%r3)
+	stfd	%f26,92+12*8(%r3)
+	stfd	%f27,92+13*8(%r3)
+	stfd	%f28,93+13*8(%r3)
+	stfd	%f29,93+14*8(%r3)
+	stfd	%f30,93+15*8(%r3)
+	stfd	%f31,93+16*8(%r3)
+
 	li	%r3,0
 	blr
 END(_setjmp)
 
 ENTRY(_longjmp)
 	lmw	%r9,20(%r3)
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	mtlr	%r11
 	mtcr	%r12
 	mr	%r1,%r10
diff --git a/lib/libc/powerpc/gen/setjmp.S b/lib/libc/powerpc/gen/setjmp.S
index 9325fc2378c..881c24e1e81 100644
--- a/lib/libc/powerpc/gen/setjmp.S
+++ b/lib/libc/powerpc/gen/setjmp.S
@@ -66,6 +66,27 @@ ENTRY(setjmp)
 	mr	%r10,%r1		/* r10 <- stackptr */
 	mr	%r9,%r2			/*  r9 <- global ptr */
 	stmw	%r9,20(%r6)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r6)
+	stfd	%f15,92+1*8(%r6)
+	stfd	%f16,92+2*8(%r6)
+	stfd	%f17,92+3*8(%r6)
+	stfd	%f18,92+4*8(%r6)
+	stfd	%f19,92+5*8(%r6)
+	stfd	%f20,92+6*8(%r6)
+	stfd	%f21,92+7*8(%r6)
+	stfd	%f22,92+8*8(%r6)
+	stfd	%f23,92+9*8(%r6)
+	stfd	%f24,92+10*8(%r6)
+	stfd	%f25,92+11*8(%r6)
+	stfd	%f26,92+12*8(%r6)
+	stfd	%f27,92+13*8(%r6)
+	stfd	%f28,93+13*8(%r6)
+	stfd	%f29,93+14*8(%r6)
+	stfd	%f30,93+15*8(%r6)
+	stfd	%f31,93+16*8(%r6)
+
 	li	%r3,0			/* return (0) */
 	blr
 END(setjmp)
@@ -73,6 +94,27 @@ END(setjmp)
 	WEAK_REFERENCE(CNAME(__longjmp), longjmp)
 ENTRY(__longjmp)
 	lmw	%r9,20(%r3)		/* restore regs */
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	mr	%r6,%r4			/* save val param */
 	mtlr	%r11			/* r11 -> link reg */
 	mtcr	%r12			/* r12 -> condition reg */
diff --git a/lib/libc/powerpc/gen/sigsetjmp.S b/lib/libc/powerpc/gen/sigsetjmp.S
index c67afc61031..ec7460aacaa 100644
--- a/lib/libc/powerpc/gen/sigsetjmp.S
+++ b/lib/libc/powerpc/gen/sigsetjmp.S
@@ -71,12 +71,54 @@ ENTRY(sigsetjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	stmw	%r9,20(%r6)
+
+	/* FPRs */
+	stfd	%f14,92+0*8(%r6)
+	stfd	%f15,92+1*8(%r6)
+	stfd	%f16,92+2*8(%r6)
+	stfd	%f17,92+3*8(%r6)
+	stfd	%f18,92+4*8(%r6)
+	stfd	%f19,92+5*8(%r6)
+	stfd	%f20,92+6*8(%r6)
+	stfd	%f21,92+7*8(%r6)
+	stfd	%f22,92+8*8(%r6)
+	stfd	%f23,92+9*8(%r6)
+	stfd	%f24,92+10*8(%r6)
+	stfd	%f25,92+11*8(%r6)
+	stfd	%f26,92+12*8(%r6)
+	stfd	%f27,92+13*8(%r6)
+	stfd	%f28,93+13*8(%r6)
+	stfd	%f29,93+14*8(%r6)
+	stfd	%f30,93+15*8(%r6)
+	stfd	%f31,93+16*8(%r6)
+
 	li	%r3,0
 	blr
 END(sigsetjmp)
 
 ENTRY(siglongjmp)
 	lmw	%r9,20(%r3)
+
+	/* FPRs */
+	lfd	%f14,92+0*8(%r3)
+	lfd	%f15,92+1*8(%r3)
+	lfd	%f16,92+2*8(%r3)
+	lfd	%f17,92+3*8(%r3)
+	lfd	%f18,92+4*8(%r3)
+	lfd	%f19,92+5*8(%r3)
+	lfd	%f20,92+6*8(%r3)
+	lfd	%f21,92+7*8(%r3)
+	lfd	%f22,92+8*8(%r3)
+	lfd	%f23,92+9*8(%r3)
+	lfd	%f24,92+10*8(%r3)
+	lfd	%f25,92+11*8(%r3)
+	lfd	%f26,92+12*8(%r3)
+	lfd	%f27,92+13*8(%r3)
+	lfd	%f28,93+13*8(%r3)
+	lfd	%f29,93+14*8(%r3)
+	lfd	%f30,93+15*8(%r3)
+	lfd	%f31,93+16*8(%r3)
+
 	lwz	%r7,0(%r3)
 	mr	%r6,%r4
 	mtlr	%r11
diff --git a/lib/libc/powerpc64/gen/_setjmp.S b/lib/libc/powerpc64/gen/_setjmp.S
index 207c4f7d10d..f7689aeba35 100644
--- a/lib/libc/powerpc64/gen/_setjmp.S
+++ b/lib/libc/powerpc64/gen/_setjmp.S
@@ -56,23 +56,41 @@ ENTRY(_setjmp)
 	mr	%r10,%r1
 	mr	%r9,%r2
 	std	%r9,40 + 0*8(%r3)
+	stfd	%f14,40 + 23*8(%r3)
 	std	%r10,40 + 1*8(%r3)
+	stfd	%f15,40 + 24*8(%r3)
 	std	%r11,40 + 2*8(%r3)
+	stfd	%f16,40 + 25*8(%r3)
 	std	%r12,40 + 3*8(%r3)
+	stfd	%f17,40 + 26*8(%r3)
 	std	%r13,40 + 4*8(%r3)
+	stfd	%f18,40 + 27*8(%r3)
 	std	%r14,40 + 5*8(%r3)
+	stfd	%f19,40 + 28*8(%r3)
 	std	%r15,40 + 6*8(%r3)
+	stfd	%f20,40 + 29*8(%r3)
 	std	%r16,40 + 7*8(%r3)
+	stfd	%f21,40 + 30*8(%r3)
 	std	%r17,40 + 8*8(%r3)
+	stfd	%f22,40 + 31*8(%r3)
 	std	%r18,40 + 9*8(%r3)
+	stfd	%f23,40 + 32*8(%r3)
 	std	%r19,40 + 10*8(%r3)
+	stfd	%f24,40 + 33*8(%r3)
 	std	%r20,40 + 11*8(%r3)
+	stfd	%f25,40 + 34*8(%r3)
 	std	%r21,40 + 12*8(%r3)
+	stfd	%f26,40 + 35*8(%r3)
 	std	%r22,40 + 13*8(%r3)
+	stfd	%f27,40 + 36*8(%r3)
 	std	%r23,40 + 14*8(%r3)
+	stfd	%f28,40 + 37*8(%r3)
 	std	%r24,40 + 15*8(%r3)
+	stfd	%f29,40 + 38*8(%r3)
 	std	%r25,40 + 16*8(%r3)
+	stfd	%f30,40 + 39*8(%r3)
 	std	%r26,40 + 17*8(%r3)
+	stfd	%f31,40 + 40*8(%r3)
 	std	%r27,40 + 18*8(%r3)
 	std	%r28,40 + 19*8(%r3)
 	std	%r29,40 + 20*8(%r3)
@@ -84,23 +102,41 @@ END(_setjmp)
 
 ENTRY(_longjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)
diff --git a/lib/libc/powerpc64/gen/setjmp.S b/lib/libc/powerpc64/gen/setjmp.S
index 14954667b9b..5eb395e7c30 100644
--- a/lib/libc/powerpc64/gen/setjmp.S
+++ b/lib/libc/powerpc64/gen/setjmp.S
@@ -67,29 +67,49 @@ ENTRY(setjmp)
 	mr	%r9,%r2			/*  r9 <- global ptr */
 
 	std	%r9,40 + 0*8(%r6)
+	stfd	%f14,40 + 23*8(%r6)
 	std	%r10,40 + 1*8(%r6)
+	stfd	%f15,40 + 24*8(%r6)
 	std	%r11,40 + 2*8(%r6)
+	stfd	%f16,40 + 25*8(%r6)
 	std	%r12,40 + 3*8(%r6)
+	stfd	%f17,40 + 26*8(%r6)
 	std	%r13,40 + 4*8(%r6)
+	stfd	%f18,40 + 27*8(%r6)
 	std	%r14,40 + 5*8(%r6)
+	stfd	%f19,40 + 28*8(%r6)
 	std	%r15,40 + 6*8(%r6)
+	stfd	%f20,40 + 29*8(%r6)
 	std	%r16,40 + 7*8(%r6)
+	stfd	%f21,40 + 30*8(%r6)
 	std	%r17,40 + 8*8(%r6)
+	stfd	%f22,40 + 31*8(%r6)
 	std	%r18,40 + 9*8(%r6)
+	stfd	%f23,40 + 32*8(%r6)
 	std	%r19,40 + 10*8(%r6)
+	stfd	%f24,40 + 33*8(%r6)
 	std	%r20,40 + 11*8(%r6)
+	stfd	%f25,40 + 34*8(%r6)
 	std	%r21,40 + 12*8(%r6)
+	stfd	%f26,40 + 35*8(%r6)
 	std	%r22,40 + 13*8(%r6)
+	stfd	%f27,40 + 36*8(%r6)
 	std	%r23,40 + 14*8(%r6)
+	stfd	%f28,40 + 37*8(%r6)
 	std	%r24,40 + 15*8(%r6)
+	stfd	%f29,40 + 38*8(%r6)
 	std	%r25,40 + 16*8(%r6)
+	stfd	%f30,40 + 39*8(%r6)
 	std	%r26,40 + 17*8(%r6)
+	stfd	%f31,40 + 40*8(%r6)
 	std	%r27,40 + 18*8(%r6)
 	std	%r28,40 + 19*8(%r6)
 	std	%r29,40 + 20*8(%r6)
 	std	%r30,40 + 21*8(%r6)
 	std	%r31,40 + 22*8(%r6)
 
+	/* XXX Altivec regs */
+
 	li	%r3,0			/* return (0) */
 	blr
 END(setjmp)
@@ -97,23 +117,41 @@ END(setjmp)
 	WEAK_REFERENCE(__longjmp, longjmp)
 ENTRY(__longjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)
diff --git a/lib/libc/powerpc64/gen/sigsetjmp.S b/lib/libc/powerpc64/gen/sigsetjmp.S
index 5cfd684d38d..c0648a632f1 100644
--- a/lib/libc/powerpc64/gen/sigsetjmp.S
+++ b/lib/libc/powerpc64/gen/sigsetjmp.S
@@ -72,23 +72,41 @@ ENTRY(sigsetjmp)
 	mr	%r9,%r2
 
 	std	%r9,40 + 0*8(%r6)
+	stfd	%f14,40 + 23*8(%r6)
 	std	%r10,40 + 1*8(%r6)
+	stfd	%f15,40 + 24*8(%r6)
 	std	%r11,40 + 2*8(%r6)
+	stfd	%f16,40 + 25*8(%r6)
 	std	%r12,40 + 3*8(%r6)
+	stfd	%f17,40 + 26*8(%r6)
 	std	%r13,40 + 4*8(%r6)
+	stfd	%f18,40 + 27*8(%r6)
 	std	%r14,40 + 5*8(%r6)
+	stfd	%f19,40 + 28*8(%r6)
 	std	%r15,40 + 6*8(%r6)
+	stfd	%f20,40 + 29*8(%r6)
 	std	%r16,40 + 7*8(%r6)
+	stfd	%f21,40 + 30*8(%r6)
 	std	%r17,40 + 8*8(%r6)
+	stfd	%f22,40 + 31*8(%r6)
 	std	%r18,40 + 9*8(%r6)
+	stfd	%f23,40 + 32*8(%r6)
 	std	%r19,40 + 10*8(%r6)
+	stfd	%f24,40 + 33*8(%r6)
 	std	%r20,40 + 11*8(%r6)
+	stfd	%f25,40 + 34*8(%r6)
 	std	%r21,40 + 12*8(%r6)
+	stfd	%f26,40 + 35*8(%r6)
 	std	%r22,40 + 13*8(%r6)
+	stfd	%f27,40 + 36*8(%r6)
 	std	%r23,40 + 14*8(%r6)
+	stfd	%f28,40 + 37*8(%r6)
 	std	%r24,40 + 15*8(%r6)
+	stfd	%f29,40 + 38*8(%r6)
 	std	%r25,40 + 16*8(%r6)
+	stfd	%f30,40 + 39*8(%r6)
 	std	%r26,40 + 17*8(%r6)
+	stfd	%f31,40 + 40*8(%r6)
 	std	%r27,40 + 18*8(%r6)
 	std	%r28,40 + 19*8(%r6)
 	std	%r29,40 + 20*8(%r6)
@@ -101,23 +119,41 @@ END(sigsetjmp)
 
 ENTRY(siglongjmp)
 	ld	%r9,40 + 0*8(%r3)
+	lfd	%f14,40 + 23*8(%r3)
 	ld	%r10,40 + 1*8(%r3)
+	lfd	%f15,40 + 24*8(%r3)
 	ld	%r11,40 + 2*8(%r3)
+	lfd	%f16,40 + 25*8(%r3)
 	ld	%r12,40 + 3*8(%r3)
+	lfd	%f17,40 + 26*8(%r3)
 	ld	%r14,40 + 5*8(%r3)
+	lfd	%f18,40 + 27*8(%r3)
 	ld	%r15,40 + 6*8(%r3)
+	lfd	%f19,40 + 28*8(%r3)
 	ld	%r16,40 + 7*8(%r3)
+	lfd	%f20,40 + 29*8(%r3)
 	ld	%r17,40 + 8*8(%r3)
+	lfd	%f21,40 + 30*8(%r3)
 	ld	%r18,40 + 9*8(%r3)
+	lfd	%f22,40 + 31*8(%r3)
 	ld	%r19,40 + 10*8(%r3)
+	lfd	%f23,40 + 32*8(%r3)
 	ld	%r20,40 + 11*8(%r3)
+	lfd	%f24,40 + 33*8(%r3)
 	ld	%r21,40 + 12*8(%r3)
+	lfd	%f25,40 + 34*8(%r3)
 	ld	%r22,40 + 13*8(%r3)
+	lfd	%f26,40 + 35*8(%r3)
 	ld	%r23,40 + 14*8(%r3)
+	lfd	%f27,40 + 36*8(%r3)
 	ld	%r24,40 + 15*8(%r3)
+	lfd	%f28,40 + 37*8(%r3)
 	ld	%r25,40 + 16*8(%r3)
+	lfd	%f29,40 + 38*8(%r3)
 	ld	%r26,40 + 17*8(%r3)
+	lfd	%f30,40 + 39*8(%r3)
 	ld	%r27,40 + 18*8(%r3)
+	lfd	%f31,40 + 40*8(%r3)
 	ld	%r28,40 + 19*8(%r3)
 	ld	%r29,40 + 20*8(%r3)
 	ld	%r30,40 + 21*8(%r3)
diff --git a/lib/libc/stdlib/qsort.c b/lib/libc/stdlib/qsort.c
index 93e22cdf931..e97ea9272dd 100644
--- a/lib/libc/stdlib/qsort.c
+++ b/lib/libc/stdlib/qsort.c
@@ -41,47 +41,55 @@ typedef int		 cmp_t(void *, const void *, const void *);
 typedef int		 cmp_t(const void *, const void *);
 #endif
 static inline char	*med3(char *, char *, char *, cmp_t *, void *);
-static inline void	 swapfunc(char *, char *, int, int);
+static inline void	 swapfunc(char *, char *, int, int, int);
 
-#define min(a, b)	(a) < (b) ? a : b
+#define	MIN(a, b)	((a) < (b) ? a : b)
 
 /*
  * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
  */
-#define swapcode(TYPE, parmi, parmj, n) { 		\
-	long i = (n) / sizeof (TYPE); 			\
-	TYPE *pi = (TYPE *) (parmi); 		\
-	TYPE *pj = (TYPE *) (parmj); 		\
+#define	swapcode(TYPE, parmi, parmj, n) {		\
+	long i = (n) / sizeof (TYPE);			\
+	TYPE *pi = (TYPE *) (parmi);		\
+	TYPE *pj = (TYPE *) (parmj);		\
 	do { 						\
 		TYPE	t = *pi;		\
 		*pi++ = *pj;				\
 		*pj++ = t;				\
-        } while (--i > 0);				\
+	} while (--i > 0);				\
 }
 
-#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \
-	es % sizeof(long) ? 2 : es == sizeof(long)? 0 : 1;
+#define	SWAPINIT(TYPE, a, es) swaptype_ ## TYPE =	\
+	((char *)a - (char *)0) % sizeof(TYPE) ||	\
+	es % sizeof(TYPE) ? 2 : es == sizeof(TYPE) ? 0 : 1;
 
 static inline void
-swapfunc(a, b, n, swaptype)
+swapfunc(a, b, n, swaptype_long, swaptype_int)
 	char *a, *b;
-	int n, swaptype;
+	int n, swaptype_long, swaptype_int;
 {
-	if(swaptype <= 1)
+	if (swaptype_long <= 1)
 		swapcode(long, a, b, n)
+	else if (swaptype_int <= 1)
+		swapcode(int, a, b, n)
 	else
 		swapcode(char, a, b, n)
 }
 
-#define swap(a, b)					\
-	if (swaptype == 0) {				\
+#define	swap(a, b)					\
+	if (swaptype_long == 0) {			\
 		long t = *(long *)(a);			\
 		*(long *)(a) = *(long *)(b);		\
 		*(long *)(b) = t;			\
+	} else if (swaptype_int == 0) {			\
+		int t = *(int *)(a);			\
+		*(int *)(a) = *(int *)(b);		\
+		*(int *)(b) = t;			\
 	} else						\
-		swapfunc(a, b, es, swaptype)
+		swapfunc(a, b, es, swaptype_long, swaptype_int)
 
-#define vecswap(a, b, n) 	if ((n) > 0) swapfunc(a, b, n, swaptype)
+#define	vecswap(a, b, n)				\
+	if ((n) > 0) swapfunc(a, b, n, swaptype_long, swaptype_int)
 
 #ifdef I_AM_QSORT_R
 #define	CMP(t, x, y) (cmp((t), (x), (y)))
@@ -98,14 +106,14 @@ __unused
 {
 	return CMP(thunk, a, b) < 0 ?
 	       (CMP(thunk, b, c) < 0 ? b : (CMP(thunk, a, c) < 0 ? c : a ))
-              :(CMP(thunk, b, c) > 0 ? b : (CMP(thunk, a, c) < 0 ? a : c ));
+	      :(CMP(thunk, b, c) > 0 ? b : (CMP(thunk, a, c) < 0 ? a : c ));
 }
 
 #ifdef I_AM_QSORT_R
 void
 qsort_r(void *a, size_t n, size_t es, void *thunk, cmp_t *cmp)
 #else
-#define thunk NULL
+#define	thunk NULL
 void
 qsort(void *a, size_t n, size_t es, cmp_t *cmp)
 #endif
@@ -113,9 +121,10 @@ qsort(void *a, size_t n, size_t es, cmp_t *cmp)
 	char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
 	size_t d, r;
 	int cmp_result;
-	int swaptype, swap_cnt;
+	int swaptype_long, swaptype_int, swap_cnt;
 
-loop:	SWAPINIT(a, es);
+loop:	SWAPINIT(long, a, es);
+	SWAPINIT(int, a, es);
 	swap_cnt = 0;
 	if (n < 7) {
 		for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
@@ -175,9 +184,9 @@ loop:	SWAPINIT(a, es);
 	}
 
 	pn = (char *)a + n * es;
-	r = min(pa - (char *)a, pb - pa);
+	r = MIN(pa - (char *)a, pb - pa);
 	vecswap(a, pb - r, r);
-	r = min(pd - pc, pn - pd - es);
+	r = MIN(pd - pc, pn - pd - es);
 	vecswap(pb, pn - r, r);
 	if ((r = pb - pa) > es)
 #ifdef I_AM_QSORT_R
diff --git a/lib/libc/sys/cap_ioctls_limit.2 b/lib/libc/sys/cap_ioctls_limit.2
index 2d1eef9724c..39f117f0308 100644
--- a/lib/libc/sys/cap_ioctls_limit.2
+++ b/lib/libc/sys/cap_ioctls_limit.2
@@ -28,7 +28,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd March 27, 2014
+.Dd March 6, 2015
 .Dt CAP_IOCTLS_LIMIT 2
 .Os
 .Sh NAME
@@ -61,6 +61,8 @@ argument specifies the number of elements in the array.
 There can be up to
 .Va 256
 elements in the array.
+Including an element that has been previously revoked will generate an error.
+After a successful call only those listed in the array may be used.
 .Pp
 The list of allowed ioctl commands for a given file descriptor can be obtained
 with the
@@ -92,7 +94,7 @@ system call was never called for this file descriptor), the
 .Fn cap_ioctls_get
 system call will return
 .Dv CAP_IOCTLS_ALL
-and won't modify the buffer pointed to by the
+and will not modify the buffer pointed to by the
 .Fa cmds
 argument.
 .Sh RETURN VALUES
diff --git a/lib/libcompiler_rt/Makefile b/lib/libcompiler_rt/Makefile
index e4eecbff7b2..d70549c6b19 100644
--- a/lib/libcompiler_rt/Makefile
+++ b/lib/libcompiler_rt/Makefile
@@ -55,12 +55,18 @@ SRCF=	absvdi2 \
 	fixdfti \
 	fixsfdi \
 	fixsfti \
+	fixtfdi \
+	fixtfsi \
+	fixtfti \
 	fixunsdfdi \
 	fixunsdfsi \
 	fixunsdfti \
 	fixunssfdi \
 	fixunssfsi \
 	fixunssfti \
+	fixunstfdi \
+	fixunstfsi \
+	fixunstfti \
 	fixunsxfdi \
 	fixunsxfsi \
 	fixunsxfti \
diff --git a/lib/libgpio/gpio.3 b/lib/libgpio/gpio.3
index 12b2d1eeed1..70f6b38c062 100644
--- a/lib/libgpio/gpio.3
+++ b/lib/libgpio/gpio.3
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 17, 2014
+.Dd March 8, 2015
 .Dt GPIO 3
 .Os
 .Sh NAME
@@ -43,41 +43,43 @@
 .Ft void
 .Fn gpio_close "gpio_handle_t handle"
 .Ft int
-.Fn gpio_pin_list "gpio_handle_t handle, gpio_config_t **pcfgs"
+.Fn gpio_pin_list "gpio_handle_t handle" "gpio_config_t **pcfgs"
 .Ft int
-.Fn gpio_pin_config "gpio_handle_t handle, gpio_config *cfg"
+.Fn gpio_pin_config "gpio_handle_t handle" "gpio_config_t *cfg"
 .Ft int
-.Fn gpio_pin_set_flags "gpio_handle_t handle, gpio_config_t *cfg"
+.Fn gpio_pin_set_name "gpio_handle_t handle" "gpio_pin_t pin" "char *name"
+.Ft int
+.Fn gpio_pin_set_flags "gpio_handle_t handle" "gpio_config_t *cfg"
 .Ft gpio_value_t
-.Fn gpio_pin_get "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_get "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_set "gpio_handle_t handle, gpio_pin_t pin, gpio_value_t value"
+.Fn gpio_pin_set "gpio_handle_t handle" "gpio_pin_t pin" "gpio_value_t value"
 .Ft int
-.Fn gpio_pin_toggle "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_toggle "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_low "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_low "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_high "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_high "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_input "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_input "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_output "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_output "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_opendrain "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_opendrain "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pushpull "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pushpull "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_tristate "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_tristate "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pullup "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pullup "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pulldown "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pulldown "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_invin "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_invin "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_invout "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_invout "gpio_handle_t handle" "gpio_pin_t pin"
 .Ft int
-.Fn gpio_pin_pulsate "gpio_handle_t handle, gpio_pin_t pin"
+.Fn gpio_pin_pulsate "gpio_handle_t handle" "gpio_pin_t pin"
 .Sh DESCRIPTION
 The
 .Nm libgpio
@@ -99,7 +101,7 @@ This function takes a pointer to a
 which is dynamically allocated.
 This pointer should be freed with
 .Xr free 3
-when it's no longer necessary.
+when it is no longer necessary.
 .Pp
 The function
 .Fn gpio_pin_config
@@ -111,6 +113,10 @@ variable which is part of the
 structure.
 .Pp
 The function
+.Fn gpio_pin_set_name
+sets the name used to describe a pin.
+.Pp
+The function
 .Fn gpio_pin_set_flags
 configures a pin with the flags passed in by the
 .Ft gpio_config_t
diff --git a/lib/libgpio/gpio.c b/lib/libgpio/gpio.c
index 8eb68712057..7ec0955b096 100644
--- a/lib/libgpio/gpio.c
+++ b/lib/libgpio/gpio.c
@@ -118,6 +118,22 @@ gpio_pin_config(gpio_handle_t handle, gpio_config_t *cfg)
 	return (0);
 }
 
+int
+gpio_pin_set_name(gpio_handle_t handle, gpio_pin_t pin, char *name)
+{
+	struct gpio_pin gppin;
+
+	if (name == NULL)
+		return (-1);
+	bzero(&gppin, sizeof(gppin));
+	gppin.gp_pin = pin;
+	strlcpy(gppin.gp_name, name, GPIOMAXNAME);
+	if (ioctl(handle, GPIOSETNAME, &gppin) < 0)
+		return (-1);
+
+	return (0);
+}
+
 int
 gpio_pin_set_flags(gpio_handle_t handle, gpio_config_t *cfg)
 {
diff --git a/lib/libgpio/libgpio.h b/lib/libgpio/libgpio.h
index b7486ebc547..a832234ca13 100644
--- a/lib/libgpio/libgpio.h
+++ b/lib/libgpio/libgpio.h
@@ -70,6 +70,11 @@ int		gpio_pin_list(gpio_handle_t, gpio_config_t **);
  * passed through the gpio_config_t structure.
  */
 int		gpio_pin_config(gpio_handle_t, gpio_config_t *);
+/*
+ * Sets the GPIO pin name.  The pin number and pin name to be set are passed
+ * as parameters.
+ */
+int		gpio_pin_set_name(gpio_handle_t, gpio_pin_t, char *);
 /*
  * Sets the GPIO flags on a specific GPIO pin.  The pin number and the flags
  * to be set are passed through the gpio_config_t structure.
diff --git a/lib/libnv/tests/dnv_tests.cc b/lib/libnv/tests/dnv_tests.cc
index 9d6987fa255..ad26f38bb07 100644
--- a/lib/libnv/tests/dnv_tests.cc
+++ b/lib/libnv/tests/dnv_tests.cc
@@ -450,7 +450,7 @@ ATF_TEST_CASE_BODY(dnvlist_take_nvlist__empty)
 	nvl = nvlist_create(0);
 
 	actual_val = dnvlist_take_nvlist(nvl, "123", NULL);
-	ATF_REQUIRE_EQ(actual_val, NULL);
+	ATF_REQUIRE_EQ(actual_val, static_cast<nvlist_t *>(NULL));
 
 	free(actual_val);
 	nvlist_destroy(nvl);
diff --git a/lib/libnv/tests/nv_tests.cc b/lib/libnv/tests/nv_tests.cc
index 94d8b56d297..bfdc9723127 100644
--- a/lib/libnv/tests/nv_tests.cc
+++ b/lib/libnv/tests/nv_tests.cc
@@ -54,7 +54,7 @@ ATF_TEST_CASE_BODY(nvlist_create__is_empty)
 	ATF_REQUIRE(nvlist_empty(nvl));
 
 	it = NULL;
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -85,7 +85,7 @@ ATF_TEST_CASE_BODY(nvlist_add_null__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NULL);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -118,7 +118,7 @@ ATF_TEST_CASE_BODY(nvlist_add_bool__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_BOOL);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -153,7 +153,7 @@ ATF_TEST_CASE_BODY(nvlist_add_number__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NUMBER);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -191,7 +191,7 @@ ATF_TEST_CASE_BODY(nvlist_add_string__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_STRING);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 }
@@ -237,7 +237,7 @@ ATF_TEST_CASE_BODY(nvlist_add_nvlist__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NVLIST);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(sublist);
 	nvlist_destroy(nvl);
@@ -303,7 +303,7 @@ ATF_TEST_CASE_BODY(nvlist_add_binary__single_insert)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_BINARY);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type,&it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(nvl);
 	free(value);
@@ -352,7 +352,7 @@ ATF_TEST_CASE_BODY(nvlist_clone__nonempty_nvlist)
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(clone, &type, &it), key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NUMBER);
-	ATF_REQUIRE_EQ(nvlist_next(clone, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(clone, &type, &it), static_cast<const char *>(NULL));
 
 	nvlist_destroy(clone);
 	nvlist_destroy(nvl);
@@ -400,13 +400,13 @@ verify_test_nvlist(const nvlist_t *nvl)
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(value, &type, &it),
 	    test_string_key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_STRING);
-	ATF_REQUIRE_EQ(nvlist_next(value, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(value, &type, &it), static_cast<const char *>(NULL));
 
 	it = NULL;
 	ATF_REQUIRE_EQ(strcmp(nvlist_next(nvl, &type, &it),
 	    test_subnvlist_key), 0);
 	ATF_REQUIRE_EQ(type, NV_TYPE_NVLIST);
-	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), NULL);
+	ATF_REQUIRE_EQ(nvlist_next(nvl, &type, &it), static_cast<const char *>(NULL));
 }
 
 ATF_TEST_CASE_WITHOUT_HEAD(nvlist_clone__nested_nvlist);
diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c
index 693e97711a2..17283d8f02d 100644
--- a/lib/libpmc/libpmc.c
+++ b/lib/libpmc/libpmc.c
@@ -325,7 +325,7 @@ PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
 PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);
 PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap);
 PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap);
-PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell, iap);
+PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell_xeon, iap);
 PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap);
 PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap);
 PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap);
diff --git a/lib/libpmc/pmc.3 b/lib/libpmc/pmc.3
index 8e6db485ae3..f51285e1258 100644
--- a/lib/libpmc/pmc.3
+++ b/lib/libpmc/pmc.3
@@ -527,6 +527,7 @@ API is
 .Xr pmc.core2 3 ,
 .Xr pmc.haswell 3 ,
 .Xr pmc.haswelluc 3 ,
+.Xr pmc.haswellxeon 3 ,
 .Xr pmc.iaf 3 ,
 .Xr pmc.ivybridge 3 ,
 .Xr pmc.ivybridgexeon 3 ,
diff --git a/lib/libpmc/pmc.haswell.3 b/lib/libpmc/pmc.haswell.3
index e535d68824d..a85f7609c9d 100644
--- a/lib/libpmc/pmc.haswell.3
+++ b/lib/libpmc/pmc.haswell.3
@@ -529,73 +529,60 @@ instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
-.Pq Event 88H , Umask 01H
-Qualify conditional near branch instructions
-executed, but not necessarily retired.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
-Qualify all unconditional near branch instructions
-excluding calls and indirect branches.
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
+indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
-Qualify executed indirect near branch instructions
-that are not calls nor returns.
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
+returns.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
-Qualify indirect near branches that have a return
-mnemonic.
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
-Qualify unconditional near call branch instructions,
-excluding non call branch, executed.
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
+branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
-Qualify indirect near calls, including both register and
-memory indirect, executed.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine
-with 01H,02H, 04H, 08H, 10H, 20H.
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
+executed.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
-Counts all near executed branches (not necessarily
-retired).
-.It Li BR_MISP_EXEC.COND
-.Pq Event 89H , Umask 01H
-Qualify conditional near branch instructions
-mispredicted.
+Counts all near executed branches (not necessarily retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
-Qualify mispredicted indirect near branch
-instructions that are not calls nor returns.
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
+nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
-Qualify mispredicted indirect near branches that
-have a return mnemonic.
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
-Qualify mispredicted unconditional near call branch
-instructions, excluding non call branch, executed.
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
+non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
-Qualify mispredicted indirect near calls, including
-both register and memory indirect, executed.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches
-executed.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H.
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
+indirect, executed.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily
-retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per
@@ -821,30 +808,24 @@ Count cases of saving new LBR records by hardware.
 Randomly sampled loads whose latency is above a
 user defined threshold. A small fraction of the overall
 loads are sampled due to randomization.
-.It Li MEM_UOP_RETIRED.LOADS
-.Pq Event D0H , Umask 01H
-Qualify retired memory uops that are loads. Combine Supports PEBS and
-with umask 10H, 20H, 40H, 80H.
-.It Li MEM_UOP_RETIRED.STORES
-.Pq Event D0H , Umask 02H
-Qualify retired memory uops that are stores.
-Combine with umask 10H, 20H, 40H, 80H.
-.It Li MEM_UOP_RETIRED.STLB_MISS
-.Pq Event D0H , Umask 10H
-Qualify retired memory uops with STLB miss. Must
-combine with umask 01H, 02H, to produce counts.
-.It Li MEM_UOP_RETIRED.LOCK
-.Pq Event D0H , Umask 20H
-Qualify retired memory uops with lock. Must combine Supports PEBS and
-with umask 01H, 02H, to produce counts.
-.It Li MEM_UOP_RETIRED.SPLIT
-.Pq Event D0H , Umask 40H
-Qualify retired memory uops with line split. Must
-combine with umask 01H, 02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with Supports PEBS and
-umask 01H, 02H, to produce counts.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
+.Pq Event D0H , Umask 11H
+Count retired load uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
+.Pq Event D0H , Umask 12H
+Count retired store uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
+.Pq Event D0H , Umask 41H
+Count retired load uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
+.Pq Event D0H , Umask 42H
+Count retired store uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
+.Pq Event D0H , Umask 81H
+Count all retired load uops.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
+.Pq Event D0H , Umask 82H
+Count all retired store uops.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.
diff --git a/lib/libpmc/pmc.haswellxeon.3 b/lib/libpmc/pmc.haswellxeon.3
new file mode 100644
index 00000000000..8eb5b7e8018
--- /dev/null
+++ b/lib/libpmc/pmc.haswellxeon.3
@@ -0,0 +1,956 @@
+.\"
+.\" Copyright (c) 2013 Hiren Panchasara <hiren.panchasara@gmail.com>
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $FreeBSD$
+.\"
+.Dd 21 November, 2014
+.Dt PMC.HASWELLXEON 3
+.Os
+.Sh NAME
+.Nm pmc.haswellxeon
+.Nd measurement events for
+.Tn Intel
+.Tn Haswell Xeon
+family CPUs
+.Sh LIBRARY
+.Lb libpmc
+.Sh SYNOPSIS
+.In pmc.h
+.Sh DESCRIPTION
+.Tn Intel
+.Tn "Haswell"
+CPUs contain PMCs conforming to version 2 of the
+.Tn Intel
+performance measurement architecture.
+These CPUs may contain up to two classes of PMCs:
+.Bl -tag -width "Li PMC_CLASS_IAP"
+.It Li PMC_CLASS_IAF
+Fixed-function counters that count only one hardware event per counter.
+.It Li PMC_CLASS_IAP
+Programmable counters that may be configured to count one of a defined
+set of hardware events.
+.El
+.Pp
+The number of PMCs available in each class and their widths need to be
+determined at run time by calling
+.Xr pmc_cpuinfo 3 .
+.Pp
+Intel Haswell Xeon PMCs are documented in
+.Rs
+.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
+.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C"
+.%N "Order Number: 325462-052US"
+.%D September 2014
+.%Q "Intel Corporation"
+.Re
+.Ss HASWELL FIXED FUNCTION PMCS
+These PMCs and their supported events are documented in
+.Xr pmc.iaf 3 .
+.Ss HASWELL PROGRAMMABLE PMCS
+The programmable PMCs support the following capabilities:
+.Bl -column "PMC_CAP_INTERRUPT" "Support"
+.It Em Capability Ta Em Support
+.It PMC_CAP_CASCADE Ta \&No
+.It PMC_CAP_EDGE Ta Yes
+.It PMC_CAP_INTERRUPT Ta Yes
+.It PMC_CAP_INVERT Ta Yes
+.It PMC_CAP_READ Ta Yes
+.It PMC_CAP_PRECISE Ta \&No
+.It PMC_CAP_SYSTEM Ta Yes
+.It PMC_CAP_TAGGING Ta \&No
+.It PMC_CAP_THRESHOLD Ta Yes
+.It PMC_CAP_USER Ta Yes
+.It PMC_CAP_WRITE Ta Yes
+.El
+.Ss Event Qualifiers
+Event specifiers for these PMCs support the following common
+qualifiers:
+.Bl -tag -width indent
+.It Li rsp= Ns Ar value
+Configure the Off-core Response bits.
+.Bl -tag -width indent
+.It Li DMND_DATA_RD
+Counts the number of demand and DCU prefetch data reads of full
+and partial cachelines as well as demand data page table entry
+cacheline reads. Does not count L2 data read prefetches or
+instruction fetches.
+.It Li REQ_DMND_RFO
+Counts the number of demand and DCU prefetch reads for ownership (RFO)
+requests generated by a write to data cacheline. Does not count L2 RFO
+prefetches.
+.It Li REQ_DMND_IFETCH
+Counts the number of demand and DCU prefetch instruction cacheline reads.
+Does not count L2 code read prefetches.
+.It Li REQ_WB
+Counts the number of writeback (modified to exclusive) transactions.
+.It Li REQ_PF_DATA_RD
+Counts the number of data cacheline reads generated by L2 prefetchers.
+.It Li REQ_PF_RFO
+Counts the number of RFO requests generated by L2 prefetchers.
+.It Li REQ_PF_IFETCH
+Counts the number of code reads generated by L2 prefetchers.
+.It Li REQ_PF_LLC_DATA_RD
+L2 prefetcher to L3 for loads.
+.It Li REQ_PF_LLC_RFO
+RFO requests generated by L2 prefetcher
+.It Li REQ_PF_LLC_IFETCH
+L2 prefetcher to L3 for instruction fetches.
+.It Li REQ_BUS_LOCKS
+Bus lock and split lock requests.
+.It Li REQ_STRM_ST
+Streaming store requests.
+.It Li REQ_OTHER
+Any other request that crosses IDI, including I/O.
+.It Li RES_ANY
+Catch all value for any response types.
+.It Li RES_SUPPLIER_NO_SUPP
+No Supplier Information available.
+.It Li RES_SUPPLIER_LLC_HITM
+M-state initial lookup stat in L3.
+.It Li RES_SUPPLIER_LLC_HITE
+E-state.
+.It Li RES_SUPPLIER_LLC_HITS
+S-state.
+.It Li RES_SUPPLIER_LLC_HITF
+F-state.
+.It Li RES_SUPPLIER_LOCAL
+Local DRAM Controller.
+.It Li RES_SNOOP_SNP_NONE
+No details on snoop-related information.
+.It Li RES_SNOOP_SNP_NO_NEEDED
+No snoop was needed to satisfy the request.
+.It Li RES_SNOOP_SNP_MISS
+A snoop was needed and it missed all snooped caches:
+-For LLC Hit, ReslHitl was returned by all cores
+-For LLC Miss, Rspl was returned by all sockets and data was returned from
+DRAM.
+.It Li RES_SNOOP_HIT_NO_FWD
+A snoop was needed and it hits in at least one snooped cache. Hit denotes a
+cache-line was valid before snoop effect. This includes:
+-Snoop Hit w/ Invalidation (LLC Hit, RFO)
+-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD)
+-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S)
+In the LLC Miss case, data is returned from DRAM.
+.It Li RES_SNOOP_HIT_FWD
+A snoop was needed and data was forwarded from a remote socket.
+This includes:
+-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT).
+.It Li RES_SNOOP_HITM
+A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a
+cache-line was in modified state before effect as a results of snoop. This
+includes:
+-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD)
+-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO)
+-Snoop MtoS (LLC Hit, IFetch/Data_RD).
+.It Li RES_NON_DRAM
+Target was non-DRAM system address. This includes MMIO transactions.
+.El
+.It Li cmask= Ns Ar value
+Configure the PMC to increment only if the number of configured
+events measured in a cycle is greater than or equal to
+.Ar value .
+.It Li edge
+Configure the PMC to count the number of de-asserted to asserted
+transitions of the conditions expressed by the other qualifiers.
+If specified, the counter will increment only once whenever a
+condition becomes true, irrespective of the number of clocks during
+which the condition remains true.
+.It Li inv
+Invert the sense of comparison when the
+.Dq Li cmask
+qualifier is present, making the counter increment when the number of
+events per cycle is less than the value specified by the
+.Dq Li cmask
+qualifier.
+.It Li os
+Configure the PMC to count events happening at processor privilege
+level 0.
+.It Li usr
+Configure the PMC to count events occurring at privilege levels 1, 2
+or 3.
+.El
+.Pp
+If neither of the
+.Dq Li os
+or
+.Dq Li usr
+qualifiers are specified, the default is to enable both.
+.Ss Event Specifiers (Programmable PMCs)
+Haswell programmable PMCs support the following events:
+.Bl -tag -width indent
+.It Li LD_BLOCKS.STORE_FORWARD
+.Pq Event 03H , Umask 02H
+Loads blocked by overlapping with store buffer that
+cannot be forwarded.
+.It Li MISALIGN_MEM_REF.LOADS
+.Pq Event 05H , Umask 01H
+Speculative cache-line split load uops dispatched to
+L1D.
+.It Li MISALIGN_MEM_REF.STORES
+.Pq Event 05H , Umask 02H
+Speculative cache-line split Store-address uops
+dispatched to L1D.
+.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS
+.Pq Event 07H , Umask 01H
+False dependencies in MOB due to partial compare
+on address.
+.It Li DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 08H , Umask 01H
+Misses in all TLB levels that cause a page walk of any
+page size.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_4K
+.Pq Event 08H , Umask 02H
+Completed page walks due to demand load misses
+that caused 4K page walks in any TLB levels.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K
+.Pq Event 08H , Umask 02H
+Completed page walks due to demand load misses
+that caused 2M/4M page walks in any TLB levels.
+.It Li DTLB_LOAD_MISSES.WALK_COMPLETED
+.Pq Event 08H , Umask 0EH
+Completed page walks in any TLB of any page size
+due to demand load misses
+.It Li DTLB_LOAD_MISSES.WALK_DURATION
+.Pq Event 08H , Umask 10H
+Cycle PMH is busy with a walk.
+.It Li DTLB_LOAD_MISSES.STLB_HIT_4K
+.Pq Event 08H , Umask 20H
+Load misses that missed DTLB but hit STLB (4K).
+.It Li DTLB_LOAD_MISSES.STLB_HIT_2M
+.Pq Event 08H , Umask 40H
+Load misses that missed DTLB but hit STLB (2M).
+.It Li DTLB_LOAD_MISSES.STLB_HIT
+.Pq Event 08H , Umask 60H
+Number of cache load STLB hits. No page walk.
+.It Li DTLB_LOAD_MISSES.PDE_CACHE_MISS
+.Pq Event 08H , Umask 80H
+DTLB demand load misses with low part of linear-to-
+physical address translation missed
+.It Li INT_MISC.RECOVERY_CYCLES
+.Pq Event 0DH , Umask 03H
+Cycles waiting to recover after Machine Clears
+except JEClear. Set Cmask= 1.
+.It Li UOPS_ISSUED.ANY
+.Pq Event 0EH , Umask 01H
+ncrements each cycle the # of Uops issued by the
+RAT to RS.
+Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles
+of this core.
+.It Li UOPS_ISSUED.FLAGS_MERGE
+.Pq Event 0EH , Umask 10H
+Number of flags-merge uops allocated. Such uops
+adds delay.
+.It Li UOPS_ISSUED.SLOW_LEA
+.Pq Event 0EH , Umask 20H
+Number of slow LEA or similar uops allocated. Such
+uop has 3 sources (e.g. 2 sources + immediate)
+regardless if as a result of LEA instruction or not.
+.It Li UOPS_ISSUED.SiNGLE_MUL
+.Pq Event 0EH , Umask 40H
+Number of multiply packed/scalar single precision
+uops allocated.
+.It Li L2_RQSTS.DEMAND_DATA_RD_MISS
+.Pq Event 24H , Umask 21H
+Demand Data Read requests that missed L2, no
+rejects.
+.It Li L2_RQSTS.DEMAND_DATA_RD_HIT
+.Pq Event 24H , Umask 41H
+Demand Data Read requests that hit L2 cache.
+.It Li L2_RQSTS.ALL_DEMAND_DATA_RD
+.Pq Event 24H , Umask E1H	
+Counts any demand and L1 HW prefetch data load
+requests to L2.
+.It Li L2_RQSTS.RFO_HIT
+.Pq Event 24H , Umask 42H
+Counts the number of store RFO requests that hit
+the L2 cache.
+.It Li L2_RQSTS.RFO_MISS
+.Pq Event 24H , Umask 22H
+Counts the number of store RFO requests that miss
+the L2 cache.
+.It Li L2_RQSTS.ALL_RFO
+.Pq Event 24H , Umask E2H
+Counts all L2 store RFO requests.
+.It Li L2_RQSTS.CODE_RD_HIT
+.Pq Event 24H , Umask 44H
+Number of instruction fetches that hit the L2 cache.
+.It Li L2_RQSTS.CODE_RD_MISS
+.Pq Event 24H , Umask 24H
+Number of instruction fetches that missed the L2
+cache.
+.It Li L2_RQSTS.ALL_DEMAND_MISS
+.Pq Event 24H , Umask 27H
+Demand requests that miss L2 cache.
+.It Li L2_RQSTS.ALL_DEMAND_REFERENCES
+.Pq Event 24H , Umask E7H
+Demand requests to L2 cache.
+.It Li L2_RQSTS.ALL_CODE_RD
+.Pq Event 24H , Umask E4H
+Counts all L2 code requests.
+.It Li L2_RQSTS.L2_PF_HIT
+.Pq Event 24H , Umask 50H
+Counts all L2 HW prefetcher requests that hit L2.
+.It Li L2_RQSTS.L2_PF_MISS
+.Pq Event 24H , Umask 30H
+Counts all L2 HW prefetcher requests that missed
+L2.
+.It Li L2_RQSTS.ALL_PF
+.Pq Event 24H , Umask F8H
+Counts all L2 HW prefetcher requests.
+.It Li L2_RQSTS.MISS
+.Pq Event 24H , Umask 3FH
+All requests that missed L2.
+.It Li L2_RQSTS.REFERENCES
+.Pq Event 24H , Umask FFH
+All requests to L2 cache.
+.It Li L2_DEMAND_RQSTS.WB_HIT
+.Pq Event 27H , Umask 50H
+Not rejected writebacks that hit L2 cache
+.It Li LONGEST_LAT_CACHE.REFERENCE
+.Pq Event 2EH , Umask 4FH
+This event counts requests originating from the core
+that reference a cache line in the last level cache.
+.It Li LONGEST_LAT_CACHE.MISS
+.Pq Event 2EH , Umask 41H
+This event counts each cache miss condition for
+references to the last level cache.
+.It Li CPU_CLK_UNHALTED.THREAD_P
+.Pq Event 3CH , Umask 00H
+Counts the number of thread cycles while the thread
+is not in a halt state. The thread enters the halt state
+when it is running the HLT instruction. The core
+frequency may change from time to time due to
+power or thermal throttling.
+.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK
+.Pq Event 3CH , Umask 01H
+Increments at the frequency of XCLK (100 MHz)
+when not halted.
+.It Li L1D_PEND_MISS.PENDING
+.Pq Event 48H , Umask 01H
+Increments the number of outstanding L1D misses
+every cycle. Set Cmaks = 1 and Edge =1 to count
+occurrences.
+.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 49H , Umask 01H
+Miss in all TLB levels causes an page walk of any
+page size (4K/2M/4M/1G).
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED_4K
+.Pq Event 49H , Umask 02H
+Completed page walks due to store misses in one or
+more TLB levels of 4K page structure.
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M
+.Pq Event 49H , Umask 04H
+Completed page walks due to store misses in one or
+more TLB levels of 2M/4M page structure.
+.It Li DTLB_STORE_MISSES.WALK_COMPLETED
+.Pq Event 49H , Umask 0EH
+Completed page walks due to store miss in any TLB
+levels of any page size (4K/2M/4M/1G).
+.It Li DTLB_STORE_MISSES.WALK_DURATION
+.Pq Event 49H , Umask 10H
+Cycles PMH is busy with this walk.
+.It Li DTLB_STORE_MISSES.STLB_HIT_4K
+.Pq Event 49H , Umask 20H
+Store misses that missed DTLB but hit STLB (4K).
+.It Li DTLB_STORE_MISSES.STLB_HIT_2M
+.Pq Event 49H , Umask 40H
+Store misses that missed DTLB but hit STLB (2M).
+.It Li DTLB_STORE_MISSES.STLB_HIT
+.Pq Event 49H , Umask 60H
+Store operations that miss the first TLB level but hit
+the second and do not cause page walks.
+.It Li DTLB_STORE_MISSES.PDE_CACHE_MISS
+.Pq Event 49H , Umask 80H
+DTLB store misses with low part of linear-to-physical
+address translation missed.
+.It Li LOAD_HIT_PRE.SW_PF
+.Pq Event 4CH , Umask 01H
+Non-SW-prefetch load dispatches that hit fill buffer
+allocated for S/W prefetch.
+.It Li LOAD_HIT_PRE.HW_PF
+.Pq Event 4CH , Umask 02H
+Non-SW-prefetch load dispatches that hit fill buffer
+allocated for H/W prefetch.
+.It Li L1D.REPLACEMENT
+.Pq Event 51H , Umask 01H
+Counts the number of lines brought into the L1 data
+cache.
+.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED
+.Pq Event 58H , Umask 04H
+Number of integer Move Elimination candidate uops
+that were not eliminated.
+.It Li MOVE_ELIMINATION.SMID_NOT_ELIMINATED
+.Pq Event 58H , Umask 08H
+Number of SIMD Move Elimination candidate uops
+that were not eliminated.
+.It Li MOVE_ELIMINATION.INT_ELIMINATED
+.Pq Event 58H , Umask 01H
+Unhalted core cycles when the thread is in ring 0.
+.It Li MOVE_ELIMINATION.SMID_ELIMINATED
+.Pq Event 58H , Umask 02H
+Number of SIMD Move Elimination candidate uops
+that were eliminated.
+.It Li CPL_CYCLES.RING0
+.Pq Event 5CH , Umask 02H
+Unhalted core cycles when the thread is in ring 0.
+.It Li CPL_CYCLES.RING123
+.Pq Event 5CH , Umask 01H
+Unhalted core cycles when the thread is not in ring 0.
+.It Li RS_EVENTS.EMPTY_CYCLES
+.Pq Event 5EH , Umask 01H
+Cycles the RS is empty for the thread.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD
+.Pq Event 60H , Umask 01H
+Offcore outstanding Demand Data Read transactions
+in SQ to uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD
+.Pq Event 60H , Umask 02H
+Offcore outstanding Demand code Read transactions
+in SQ to uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO
+.Pq Event 60H , Umask 04H
+Offcore outstanding RFO store transactions in SQ to
+uncore. Set Cmask=1 to count cycles.
+.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD
+.Pq Event 60H , Umask 08H
+Offcore outstanding cacheable data read
+transactions in SQ to uncore. Set Cmask=1 to count
+cycles.
+.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION
+.Pq Event 63H , Umask 01H
+Cycles in which the L1D and L2 are locked, due to a
+UC lock or split lock.
+.It Li LOCK_CYCLES.CACHE_LOCK_DURATION
+.Pq Event 63H , Umask 02H
+Cycles in which the L1D is locked.
+.It Li IDQ.EMPTY
+.Pq Event 79H , Umask 02H
+Counts cycles the IDQ is empty.
+.It Li IDQ.MITE_UOPS
+.Pq Event 79H , Umask 04H
+Increment each cycle # of uops delivered to IDQ from
+MITE path.
+Set Cmask = 1 to count cycles.
+.It Li IDQ.DSB_UOPS
+.Pq Event 79H , Umask 08H
+Increment each cycle. # of uops delivered to IDQ
+from DSB path.
+Set Cmask = 1 to count cycles.
+.It Li IDQ.MS_DSB_UOPS
+.Pq Event 79H , Umask 10H
+Increment each cycle # of uops delivered to IDQ
+when MS_busy by DSB. Set Cmask = 1 to count
+cycles. Add Edge=1 to count # of delivery.
+.It Li IDQ.MS_MITE_UOPS
+.Pq Event 79H , Umask 20H
+ncrement each cycle # of uops delivered to IDQ
+when MS_busy by MITE. Set Cmask = 1 to count
+cycles.
+.It Li IDQ.MS_UOPS
+.Pq Event 79H , Umask 30H
+Increment each cycle # of uops delivered to IDQ from
+MS by either DSB or MITE. Set Cmask = 1 to count
+cycles.
+.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS
+.Pq Event 79H , Umask 18H
+Counts cycles DSB is delivered at least one uops. Set
+Cmask = 1.
+.It Li IDQ.ALL_DSB_CYCLES_4_UOPS
+.Pq Event 79H , Umask 18H
+Counts cycles DSB is delivered four uops. Set Cmask
+=4.
+.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS
+.Pq Event 79H , Umask 24H
+Counts cycles MITE is delivered at least one uops. Set
+Cmask = 1.
+.It Li IDQ.ALL_MITE_CYCLES_4_UOPS
+.Pq Event 79H , Umask 24H
+Counts cycles MITE is delivered four uops. Set Cmask
+=4.
+.It Li IDQ.MITE_ALL_UOPS
+.Pq Event 79H , Umask 3CH
+# of uops delivered to IDQ from any path.
+.It Li ICACHE.MISSES
+.Pq Event 80H , Umask 02H
+Number of Instruction Cache, Streaming Buffer and
+Victim Cache Misses. Includes UC accesses.
+.It Li ITLB_MISSES.MISS_CAUSES_A_WALK
+.Pq Event 85H , Umask 01H
+Misses in ITLB that causes a page walk of any page
+size.
+.It Li ITLB_MISSES.WALK_COMPLETED_4K
+.Pq Event 85H , Umask 02H
+Completed page walks due to misses in ITLB 4K page
+entries.
+.It Li TLB_MISSES.WALK_COMPLETED_2M_4M
+.Pq Event 85H , Umask 04H
+Completed page walks due to misses in ITLB 2M/4M
+page entries.
+.It Li ITLB_MISSES.WALK_COMPLETED
+.Pq Event 85H , Umask 0EH
+Completed page walks in ITLB of any page size.
+.It Li ITLB_MISSES.WALK_DURATION
+.Pq Event 85H , Umask 10H
+Cycle PMH is busy with a walk.
+.It Li ITLB_MISSES.STLB_HIT_4K
+.Pq Event 85H , Umask 20H
+ITLB misses that hit STLB (4K).
+.It Li ITLB_MISSES.STLB_HIT_2M
+.Pq Event 85H , Umask 40H
+ITLB misses that hit STLB (2K).
+.It Li ITLB_MISSES.STLB_HIT
+.Pq Event 85H , Umask 60H
+TLB misses that hit STLB. No page walk.
+.It Li ILD_STALL.LCP
+.Pq Event 87H , Umask 01H
+Stalls caused by changing prefix length of the
+instruction.
+.It Li ILD_STALL.IQ_FULL
+.Pq Event 87H , Umask 04H
+Stall cycles due to IQ is full.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
+.It Li BR_INST_EXEC.DIRECT_JMP
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
+indirect branches.
+.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
+returns.
+.It Li BR_INST_EXEC.RETURN_NEAR
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
+.It Li BR_INST_EXEC.DIRECT_NEAR_CALL
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
+branch, executed.
+.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
+executed.
+.It Li BR_INST_EXEC.ALL_BRANCHES
+.Pq Event 88H , Umask FFH
+Counts all near executed branches (not necessarily retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
+.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
+nor returns.
+.It Li BR_MISP_EXEC.RETURN_NEAR
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
+.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
+non call branch, executed.
+.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
+indirect, executed.
+.It Li BR_MISP_EXEC.ALL_BRANCHES
+.Pq Event 89H , Umask FFH
+Counts all mispredicted near executed branches (not necessarily retired).
+.It Li IDQ_UOPS_NOT_DELIVERED.CORE
+.Pq Event 9CH , Umask 01H
+Count number of non-delivered uops to RAT per
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_0
+.Pq Event A1H , Umask 01H
+Cycles which a Uop is dispatched on port 0 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_1
+.Pq Event A1H , Umask 02H
+Cycles which a Uop is dispatched on port 1 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_2
+.Pq Event A1H , Umask 04H
+Cycles which a Uop is dispatched on port 2 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_3
+.Pq Event A1H , Umask 08H
+Cycles which a Uop is dispatched on port 3 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_4
+.Pq Event A1H , Umask 10H
+Cycles which a Uop is dispatched on port 4 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_5
+.Pq Event A1H , Umask 20H
+Cycles which a Uop is dispatched on port 5 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_6
+.Pq Event A1H , Umask 40H
+Cycles which a Uop is dispatched on port 6 in this
+thread.
+.It Li UOPS_EXECUTED_PORT.PORT_7
+.Pq Event A1H , Umask 80H
+Cycles which a Uop is dispatched on port 7 in this
+thread.
+.It Li RESOURCE_STALLS.ANY
+.Pq Event A2H , Umask 01H
+Cycles Allocation is stalled due to Resource Related
+reason.
+.It Li RESOURCE_STALLS.RS
+.Pq Event A2H , Umask 04H
+Cycles stalled due to no eligible RS entry available.
+.It Li RESOURCE_STALLS.SB
+.Pq Event A2H , Umask 08H
+Cycles stalled due to no store buffers available (not
+including draining form sync).
+.It Li RESOURCE_STALLS.ROB
+.Pq Event A2H , Umask 10H
+Cycles stalled due to re-order buffer full.
+.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING
+.Pq Event A3H , Umask 01H
+Cycles with pending L2 miss loads. Set Cmask=2 to
+count cycle.
+.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING
+.Pq Event A3H , Umask 02H
+Cycles with pending memory loads. Set Cmask=2 to
+count cycle.
+.It Li CYCLE_ACTIVITY.STALLS_L2_PENDING
+.Pq Event A3H , Umask 05H
+Number of loads missed L2.
+.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING
+.Pq Event A3H , Umask 08H
+Cycles with pending L1 cache miss loads. Set
+Cmask=8 to count cycle.
+.It Li ITLB.ITLB_FLUSH
+.Pq Event AEH , Umask 01H
+Counts the number of ITLB flushes, includes
+4k/2M/4M pages.
+.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD
+.Pq Event B0H , Umask 01H
+Demand data read requests sent to uncore.
+.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD
+.Pq Event B0H , Umask 02H
+Demand code read requests sent to uncore.
+.It Li OFFCORE_REQUESTS.DEMAND_RFO
+.Pq Event B0H , Umask 04H
+Demand RFO read requests sent to uncore, including
+regular RFOs, locks, ItoM.
+.It Li OFFCORE_REQUESTS.ALL_DATA_RD
+.Pq Event B0H , Umask 08H
+Data read requests sent to uncore (demand and
+prefetch).
+.It Li UOPS_EXECUTED.CORE
+.Pq Event B1H , Umask 02H
+Counts total number of uops to be executed per-core
+each cycle.
+.It Li OFF_CORE_RESPONSE_0
+.Pq Event B7H , Umask 01H
+Requires MSR 01A6H
+.It Li OFF_CORE_RESPONSE_1
+.Pq Event BBH , Umask 01H
+Requires MSR 01A7H
+.It Li PAGE_WALKER_LOADS.DTLB_L1
+.Pq Event BCH , Umask 11H
+Number of DTLB page walker loads that hit in the
+L1+FB.
+.It Li PAGE_WALKER_LOADS.ITLB_L1
+.Pq Event BCH , Umask 21H
+Number of ITLB page walker loads that hit in the
+L1+FB.
+.It Li PAGE_WALKER_LOADS.DTLB_L2
+.Pq Event BCH , Umask 12H
+Number of DTLB page walker loads that hit in the L2.
+.It Li PAGE_WALKER_LOADS.ITLB_L2
+.Pq Event BCH , Umask 22H
+Number of ITLB page walker loads that hit in the L2.
+.It Li PAGE_WALKER_LOADS.DTLB_L3
+.Pq Event BCH , Umask 14H
+Number of DTLB page walker loads that hit in the L3.
+.It Li PAGE_WALKER_LOADS.ITLB_L3
+.Pq Event BCH , Umask 24H
+Number of ITLB page walker loads that hit in the L3.
+.It Li PAGE_WALKER_LOADS.DTLB_MEMORY
+.Pq Event BCH , Umask 18H
+Number of DTLB page walker loads from memory.
+.It Li PAGE_WALKER_LOADS.ITLB_MEMORY
+.Pq Event BCH , Umask 28H
+Number of ITLB page walker loads from memory.
+.It Li TLB_FLUSH.DTLB_THREAD
+.Pq Event BDH , Umask 01H
+DTLB flush attempts of the thread-specific entries.
+.It Li TLB_FLUSH.STLB_ANY
+.Pq Event BDH , Umask 20H
+Count number of STLB flush attempts.
+.It Li INST_RETIRED.ANY_P
+.Pq Event C0H , Umask 00H
+Number of instructions at retirement.
+.It Li INST_RETIRED.ALL
+.Pq Event C0H , Umask 01H
+Precise instruction retired event with HW to reduce
+effect of PEBS shadow in IP distribution.
+.It Li OTHER_ASSISTS.AVX_TO_SSE
+.Pq Event C1H , Umask 08H
+Number of transitions from AVX-256 to legacy SSE
+when penalty applicable.
+.It Li OTHER_ASSISTS.SSE_TO_AVX
+.Pq Event C1H , Umask 10H
+Number of transitions from SSE to AVX-256 when
+penalty applicable.
+.It Li OTHER_ASSISTS.ANY_WB_ASSIST
+.Pq Event C1H , Umask 40H
+Number of microcode assists invoked by HW upon
+uop writeback.
+.It Li UOPS_RETIRED.ALL
+.Pq Event C2H , Umask 01H
+Counts the number of micro-ops retired, Use
+cmask=1 and invert to count active cycles or stalled
+cycles.
+.It Li UOPS_RETIRED.RETIRE_SLOTS
+.Pq Event C2H , Umask 02H
+Counts the number of retirement slots used each
+cycle.
+.It Li MACHINE_CLEARS.MEMORY_ORDERING
+.Pq Event C3H , Umask 02H
+Counts the number of machine clears due to memory
+order conflicts.
+.It Li MACHINE_CLEARS.SMC
+.Pq Event C3H , Umask 04H
+Number of self-modifying-code machine clears
+detected.
+.It Li MACHINE_CLEARS.MASKMOV
+.Pq Event C3H , Umask 20H
+Counts the number of executed AVX masked load
+operations that refer to an illegal address range with
+the mask bits set to 0.
+.It Li BR_INST_RETIRED.ALL_BRANCHES
+.Pq Event C4H , Umask 00H
+Branch instructions at retirement.
+.It Li BR_INST_RETIRED.CONDITIONAL
+.Pq Event C4H , Umask 01H
+Counts the number of conditional branch instructions Supports PEBS
+retired.
+.It Li BR_INST_RETIRED.NEAR_CALL
+.Pq Event C4H , Umask 02H
+Direct and indirect near call instructions retired.
+.It Li BR_INST_RETIRED.ALL_BRANCHES
+.Pq Event C4H , Umask 04H
+Counts the number of branch instructions retired.
+.It Li BR_INST_RETIRED.NEAR_RETURN
+.Pq Event C4H , Umask 08H
+Counts the number of near return instructions
+retired.
+.It Li BR_INST_RETIRED.NOT_TAKEN
+.Pq Event C4H , Umask 10H
+Counts the number of not taken branch instructions
+retired.
+ It Li BR_INST_RETIRED.NEAR_TAKEN
+.Pq Event C4H , Umask 20H
+Number of near taken branches retired.
+.It Li BR_INST_RETIRED.FAR_BRANCH
+.Pq Event C4H , Umask 40H
+Number of far branches retired.
+.It Li BR_MISP_RETIRED.ALL_BRANCHES
+.Pq Event C5H , Umask 00H
+Mispredicted branch instructions at retirement
+.It Li BR_MISP_RETIRED.CONDITIONAL
+.Pq Event C5H , Umask 01H
+Mispredicted conditional branch instructions retired.
+.It Li BR_MISP_RETIRED.CONDITIONAL
+.Pq Event C5H , Umask 04H
+Mispredicted macro branch instructions retired.
+.It Li FP_ASSIST.X87_OUTPUT
+.Pq Event CAH , Umask 02H
+Number of X87 FP assists due to Output values.
+.It Li FP_ASSIST.X87_INPUT
+.Pq Event CAH , Umask 04H
+Number of X87 FP assists due to input values.
+.It Li FP_ASSIST.SIMD_OUTPUT
+.Pq Event CAH , Umask 08H
+Number of SIMD FP assists due to Output values.
+.It Li FP_ASSIST.SIMD_INPUT
+.Pq Event CAH , Umask 10H
+Number of SIMD FP assists due to input values.
+.It Li FP_ASSIST.ANY
+.Pq Event CAH , Umask 1EH
+Cycles with any input/output SSE* or FP assists.
+.It Li ROB_MISC_EVENTS.LBR_INSERTS
+.Pq Event CCH , Umask 20H
+Count cases of saving new LBR records by hardware.
+.It Li MEM_TRANS_RETIRED.LOAD_LATENCY
+.Pq Event CDH , Umask 01H
+Randomly sampled loads whose latency is above a
+user defined threshold. A small fraction of the overall
+loads are sampled due to randomization.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
+.Pq Event D0H , Umask 11H
+Count retired load uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
+.Pq Event D0H , Umask 12H
+Count retired store uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
+.Pq Event D0H , Umask 41H
+Count retired load uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
+.Pq Event D0H , Umask 42H
+Count retired store uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
+.Pq Event D0H , Umask 81H
+Count all retired load uops.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
+.Pq Event D0H , Umask 82H
+Count all retired store uops.
+.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
+.Pq Event D1H , Umask 01H
+Retired load uops with L1 cache hits as data sources.
+.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT
+.Pq Event D1H , Umask 02H
+Retired load uops with L2 cache hits as data sources.
+.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT
+.Pq Event D1H , Umask 04H
+Retired load uops with LLC cache hits as data
+sources.
+.It Li MEM_LOAD_UOPS_RETIRED.L2_MISS
+.Pq Event D1H , Umask 10H
+Retired load uops missed L2. Unknown data source
+excluded.
+.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB
+.Pq Event D1H , Umask 40H
+Retired load uops which data sources were load uops
+missed L1 but hit FB due to preceding miss to the
+same cache line with data not ready.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS
+.Pq Event D2H , Umask 01H
+Retired load uops which data sources were LLC hit
+and cross-core snoop missed in on-pkg core cache.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT
+.Pq Event D2H , Umask 02H
+Retired load uops which data sources were LLC and
+cross-core snoop hits in on-pkg core cache.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM
+.Pq Event D2H , Umask 04H
+Retired load uops which data sources were HitM
+responses from shared LLC.
+.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE
+.Pq Event D2H , Umask 08H
+Retired load uops which data sources were hits in
+LLC without snoops required.
+.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM
+.Pq Event D3H , Umask 01H
+Retired load uops which data sources missed LLC but
+serviced from local dram.
+.It Li BACLEARS.ANY
+.Pq Event E6H , Umask 1FH
+Number of front end re-steers due to BPU
+misprediction.
+.It Li L2_TRANS.DEMAND_DATA_RD
+.Pq Event F0H , Umask 01H
+Demand Data Read requests that access L2 cache.
+.It Li L2_TRANS.RFO
+.Pq Event F0H , Umask 02H
+RFO requests that access L2 cache.
+.It Li L2_TRANS.CODE_RD
+.Pq Event F0H , Umask 04H
+L2 cache accesses when fetching instructions.
+.It Li L2_TRANS.ALL_PF
+.Pq Event F0H , Umask 08H
+Any MLC or LLC HW prefetch accessing L2, including
+rejects.
+.It Li L2_TRANS.L1D_WB
+.Pq Event F0H , Umask 10H
+L1D writebacks that access L2 cache.
+.It Li L2_TRANS.L2_FILL
+.Pq Event F0H , Umask 20H
+L2 fill requests that access L2 cache.
+.It Li L2_TRANS.L2_WB
+.Pq Event F0H , Umask 40H
+L2 writebacks that access L2 cache.
+.It Li L2_TRANS.ALL_REQUESTS
+.Pq Event F0H , Umask 80H
+Transactions accessing L2 pipe.
+.It Li L2_LINES_IN.I
+.Pq Event F1H , Umask 01H
+L2 cache lines in I state filling L2.
+.It Li L2_LINES_IN.S
+.Pq Event F1H , Umask 02H
+L2 cache lines in S state filling L2.
+.It Li L2_LINES_IN.E
+.Pq Event F1H , Umask 04H
+L2 cache lines in E state filling L2.
+.It Li L2_LINES_IN.ALL
+.Pq Event F1H , Umask 07H
+L2 cache lines filling L2.
+.It Li L2_LINES_OUT.DEMAND_CLEAN
+.Pq Event F2H , Umask 05H
+Clean L2 cache lines evicted by demand.
+.It Li L2_LINES_OUT.DEMAND_DIRTY
+.Pq Event F2H , Umask 06H
+Dirty L2 cache lines evicted by demand.
+.El
+.Sh SEE ALSO
+.Xr pmc 3 ,
+.Xr pmc.atom 3 ,
+.Xr pmc.core 3 ,
+.Xr pmc.iaf 3 ,
+.Xr pmc.ucf 3 ,
+.Xr pmc.k7 3 ,
+.Xr pmc.k8 3 ,
+.Xr pmc.p4 3 ,
+.Xr pmc.p5 3 ,
+.Xr pmc.p6 3 ,
+.Xr pmc.corei7 3 ,
+.Xr pmc.corei7uc 3 ,
+.Xr pmc.haswell 3 ,
+.Xr pmc.haswelluc 3 ,
+.Xr pmc.ivybridge 3 ,
+.Xr pmc.ivybridgexeon 3 ,
+.Xr pmc.sandybridge 3 ,
+.Xr pmc.sandybridgeuc 3 ,
+.Xr pmc.sandybridgexeon 3 ,
+.Xr pmc.westmere 3 ,
+.Xr pmc.westmereuc 3 ,
+.Xr pmc.soft 3 ,
+.Xr pmc.tsc 3 ,
+.Xr pmc_cpuinfo 3 ,
+.Xr pmclog 3 ,
+.Xr hwpmc 4
+.Sh HISTORY
+Support for the Haswell Xeon microarchitecture first appeared in
+.Fx 10.2 .
+.Sh AUTHORS
+The
+.Lb libpmc
+library was written by
+.An "Joseph Koshy"
+.Aq jkoshy@FreeBSD.org .
+The support for the Haswell Xeon
+microarchitecture was written by
+.An "Randall Stewart"
+.Aq rrs@FreeBSD.org .
diff --git a/lib/libpmc/pmc.ivybridge.3 b/lib/libpmc/pmc.ivybridge.3
index a4d9f949845..b693b30ca73 100644
--- a/lib/libpmc/pmc.ivybridge.3
+++ b/lib/libpmc/pmc.ivybridge.3
@@ -449,80 +449,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
-.Pq Event 88H , Umask 01H
-Qualify conditional near branch instructions executed, but not necessarily
-retired.
-Must combine with umask 40H, 80H.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
-Qualify all unconditional near branch instructions excluding calls and
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
 indirect branches.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
-Qualify executed indirect near branch instructions that are not calls nor
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
-Qualify indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
-Qualify unconditional near call branch instructions, excluding non call
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
 branch, executed.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
-Qualify indirect near calls, including both register and memory indirect,
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H,
-10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
-.Pq Event 89H , Umask 01H
-Qualify conditional near branch instructions mispredicted.
-Must combine with umask 40H, 80H.
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
-Qualify mispredicted indirect near branch instructions that are not calls
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
 nor returns.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
-Qualify mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
-Qualify mispredicted unconditional near call branch instructions, excluding
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
 non call branch, executed.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
-Qualify mispredicted indirect near calls, including both register and memory
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed. Must combine with
-01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per thread.
@@ -726,31 +706,24 @@ Specify threshold in MSR 0x3F6.
 .Pq Event CDH , Umask 02H
 Sample stores and collect precise store operation via PEBS record.
 PMC3 only.
-.It Li MEM_UOP_RETIRED.LOADS
-.Pq Event D0H , Umask 01H
-Qualify retired memory uops that are loads. Combine with umask 10H, 20H,
-40H, 80H.
-Supports PEBS.
-.It Li MEM_UOP_RETIRED.STORES
-.Pq Event D0H , Umask 02H
-Qualify retired memory uops that are stores. Combine with umask 10H, 20H,
-40H, 80H.
-.It Li MEM_UOP_RETIRED.STLB_MISS
-.Pq Event D0H , Umask 10H
-Qualify retired memory uops with STLB miss. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.LOCK
-.Pq Event D0H , Umask 20H
-Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to
-produce counts.
-.It Li MEM_UOP_RETIRED.SPLIT
-.Pq Event D0H , Umask 40H
-Qualify retired memory uops with line split. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with umask 01H, 02H, to
-produce counts.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
+.Pq Event D0H , Umask 11H
+Count retired load uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
+.Pq Event D0H , Umask 12H
+Count retired store uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
+.Pq Event D0H , Umask 41H
+Count retired load uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
+.Pq Event D0H , Umask 42H
+Count retired store uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
+.Pq Event D0H , Umask 81H
+Count all retired load uops.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
+.Pq Event D0H , Umask 82H
+Count all retired store uops.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.
diff --git a/lib/libpmc/pmc.ivybridgexeon.3 b/lib/libpmc/pmc.ivybridgexeon.3
index 31a4caa6e34..2ee5b782cc4 100644
--- a/lib/libpmc/pmc.ivybridgexeon.3
+++ b/lib/libpmc/pmc.ivybridgexeon.3
@@ -449,80 +449,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
-.Pq Event 88H , Umask 01H
-Qualify conditional near branch instructions executed, but not necessarily
-retired.
-Must combine with umask 40H, 80H.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
-Qualify all unconditional near branch instructions excluding calls and
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
 indirect branches.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
-Qualify executed indirect near branch instructions that are not calls nor
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
-Qualify indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
-Qualify unconditional near call branch instructions, excluding non call
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
 branch, executed.
-Must combine with umask 80H.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
-Qualify indirect near calls, including both register and memory indirect,
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H,
-10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
-.Pq Event 89H , Umask 01H
-Qualify conditional near branch instructions mispredicted.
-Must combine with umask 40H, 80H.
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
-Qualify mispredicted indirect near branch instructions that are not calls
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
 nor returns.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
-Qualify mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H.
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
-Qualify mispredicted unconditional near call branch instructions, excluding
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
 non call branch, executed.
-Must combine with umask 80H.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
-Qualify mispredicted indirect near calls, including both register and memory
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed. Must combine with
-01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per thread.
@@ -738,31 +718,24 @@ Specify threshold in MSR 0x3F6.
 .Pq Event CDH , Umask 02H
 Sample stores and collect precise store operation via PEBS record.
 PMC3 only.
-.It Li MEM_UOP_RETIRED.LOADS
-.Pq Event D0H , Umask 01H
-Qualify retired memory uops that are loads. Combine with umask 10H, 20H,
-40H, 80H.
-Supports PEBS.
-.It Li MEM_UOP_RETIRED.STORES
-.Pq Event D0H , Umask 02H
-Qualify retired memory uops that are stores. Combine with umask 10H, 20H,
-40H, 80H.
-.It Li MEM_UOP_RETIRED.STLB_MISS
-.Pq Event D0H , Umask 10H
-Qualify retired memory uops with STLB miss. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.LOCK
-.Pq Event D0H , Umask 20H
-Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to
-produce counts.
-.It Li MEM_UOP_RETIRED.SPLIT
-.Pq Event D0H , Umask 40H
-Qualify retired memory uops with line split. Must combine with umask 01H,
-02H, to produce counts.
-.It Li MEM_UOP_RETIRED.ALL
-.Pq Event D0H , Umask 80H
-Qualify any retired memory uops. Must combine with umask 01H, 02H, to
-produce counts.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS
+.Pq Event D0H , Umask 11H
+Count retired load uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES
+.Pq Event D0H , Umask 12H
+Count retired store uops that missed the STLB.
+.It Li MEM_UOPS_RETIRED.SPLIT_LOADS
+.Pq Event D0H , Umask 41H
+Count retired load uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.SPLIT_STORES
+.Pq Event D0H , Umask 42H
+Count retired store uops that were split across a cache line.
+.It Li MEM_UOPS_RETIRED.ALL_LOADS
+.Pq Event D0H , Umask 81H
+Count all retired load uops.
+.It Li MEM_UOPS_RETIRED.ALL_STORES
+.Pq Event D0H , Umask 82H
+Count all retired store uops.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
 Retired load uops with L1 cache hits as data sources.
diff --git a/lib/libpmc/pmc.sandybridge.3 b/lib/libpmc/pmc.sandybridge.3
index 0b8f6b2f09a..0e219ae3aea 100644
--- a/lib/libpmc/pmc.sandybridge.3
+++ b/lib/libpmc/pmc.sandybridge.3
@@ -497,80 +497,60 @@ Stalls caused by changing prefix length of the instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H, Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
-.Pq Event 88H, Umask 01H
-Qualify conditional near branch instructions executed, but not necessarily
-retired.
-Must combine with umask 40H, 80H
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H, Umask 02H
-Qualify all unconditional near branch instructions excluding calls and indirect
-branches.
-Must combine with umask 80H
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
+indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H, Umask 04H
-Qualify executed indirect near branch instructions that are not calls nor
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
 returns.
-Must combine with umask 80H
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H, Umask 08H
-Qualify indirect near branches that have a return mnemonic.
-Must combine with umask 80H
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H, Umask 10H
-Qualify unconditional near call branch instructions, excluding non call branch,
-executed.
-Must combine with umask 80H
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
+branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H, Umask 20H
-Qualify indirect near calls, including both register and memory indirect,
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
 executed.
-Must combine with umask 80H
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H, Umask 40H
-Qualify non-taken near branches executed.
-Applicable to umask 01H only
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H, Umask 80H
-Qualify taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
-.It Li BR_INST_EXE.ALL_BRANCHES
-.Pq Event 88H, Umask FFH
+.It Li BR_INST_EXEC.ALL_BRANCHES
+.Pq Event 88H , Umask FFH
 Counts all near executed branches (not necessarily retired).
-.It Li BR_MISP_EXEC.COND
-.Pq Event 89H, Umask 01H
-Qualify conditional near branch instructions mispredicted.
-Must combine with umask 40H, 80H
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H, Umask 04H
-Qualify mispredicted indirect near branch instructions that are not calls nor
-returns.
-Must combine with umask 80H
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
+nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H, Umask 08H
-Qualify mispredicted indirect near branches that have a return mnemonic.
-Must combine with umask 80H
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H, Umask 10H
-Qualify mispredicted unconditional near call branch instructions, excluding non
-call branch, executed.
-Must combine with umask 80H
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
+non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H, Umask 20H
-Qualify mispredicted indirect near calls, including both register and memory
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
 indirect, executed.
-Must combine with umask 80H
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H, Umask 40H
-Qualify mispredicted non-taken near branches executed.
-Applicable to umask 01H only
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H, Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
 .It Li BR_MISP_EXEC.ALL_BRANCHES
-.Pq Event 89H, Umask FFH
-Counts all near executed branches (not necessarily retired).
+.Pq Event 89H , Umask FFH
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH, Umask 01H
 Count number of non-delivered uops to RAT per thread.
diff --git a/lib/libpmc/pmc.sandybridgexeon.3 b/lib/libpmc/pmc.sandybridgexeon.3
index 17a1bf9fcd6..b334c16265f 100644
--- a/lib/libpmc/pmc.sandybridgexeon.3
+++ b/lib/libpmc/pmc.sandybridgexeon.3
@@ -543,73 +543,60 @@ instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
 Stall cycles due to IQ is full.
-.It Li BR_INST_EXEC.COND
-.Pq Event 88H , Umask 01H
-Qualify conditional near branch instructions
-executed, but not necessarily retired.
+.It Li BR_INST_EXEC.NONTAKEN_COND
+.Pq Event 88H , Umask 41H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and not taken.
+.It Li BR_INST_EXEC.TAKEN_COND
+.Pq Event 88H , Umask 81H
+Count conditional near branch instructions that were executed (but not
+necessarily retired) and taken.
 .It Li BR_INST_EXEC.DIRECT_JMP
-.Pq Event 88H , Umask 02H
-Qualify all unconditional near branch instructions
-excluding calls and indirect branches.
+.Pq Event 88H , Umask 82H
+Count all unconditional near branch instructions excluding calls and
+indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 88H , Umask 04H
-Qualify executed indirect near branch instructions
-that are not calls nor returns.
+.Pq Event 88H , Umask 84H
+Count executed indirect near branch instructions that are not calls nor
+returns.
 .It Li BR_INST_EXEC.RETURN_NEAR
-.Pq Event 88H , Umask 08H
-Qualify indirect near branches that have a return
-mnemonic.
+.Pq Event 88H , Umask 88H
+Count indirect near branches that have a return mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
-.Pq Event 88H , Umask 10H
-Qualify unconditional near call branch instructions,
-excluding non call branch, executed.
+.Pq Event 88H , Umask 90H
+Count unconditional near call branch instructions, excluding non call
+branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 88H , Umask 20H
-Qualify indirect near calls, including both register
-and memory indirect, executed.
-.It Li BR_INST_EXEC.NONTAKEN
-.Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed.
-.It Li BR_INST_EXEC.TAKEN
-.Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must
-combine with 01H,02H, 04H, 08H, 10H, 20H.
-.It Li BR_INST_EXE.ALL_BRANCHES
+.Pq Event 88H , Umask A0H
+Count indirect near calls, including both register and memory indirect,
+executed.
+.It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
-Counts all near executed branches (not necessarily
-retired).
-.It Li BR_MISP_EXEC.COND
-.Pq Event 89H , Umask 01H
-Qualify conditional near branch instructions
-mispredicted.
+Counts all near executed branches (not necessarily retired).
+.It Li BR_MISP_EXEC.NONTAKEN_COND
+.Pq Event 89H , Umask 41H
+Count conditional near branch instructions mispredicted as nontaken.
+.It Li BR_MISP_EXEC.TAKEN_COND
+.Pq Event 89H , Umask 81H
+Count conditional near branch instructions mispredicted as taken.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
-.Pq Event 89H , Umask 04H
-Qualify mispredicted indirect near branch
-instructions that are not calls nor returns.
+.Pq Event 89H , Umask 84H
+Count mispredicted indirect near branch instructions that are not calls
+nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
-.Pq Event 89H , Umask 08H
-Qualify mispredicted indirect near branches that
-have a return mnemonic.
+.Pq Event 89H , Umask 88H
+Count mispredicted indirect near branches that have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
-.Pq Event 89H , Umask 10H
-Qualify mispredicted unconditional near call branch
-instructions, excluding non call branch, executed.
+.Pq Event 89H , Umask 90H
+Count mispredicted unconditional near call branch instructions, excluding
+non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
-.Pq Event 89H , Umask 20H
-Qualify mispredicted indirect near calls, including
-both register and memory indirect, executed.
-.It Li BR_MISP_EXEC.NONTAKEN
-.Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches
-executed,.
-.It Li BR_MISP_EXEC.TAKEN
-.Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed.
-Must combine with 01H,02H, 04H, 08H, 10H, 20H
+.Pq Event 89H , Umask A0H
+Count mispredicted indirect near calls, including both register and memory
+indirect, executed.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily
-retired).
+Counts all mispredicted near executed branches (not necessarily retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
 Count number of non-delivered uops to RAT per
diff --git a/lib/libproc/proc_sym.c b/lib/libproc/proc_sym.c
index 5c5ac558bf6..dd52638ce3b 100644
--- a/lib/libproc/proc_sym.c
+++ b/lib/libproc/proc_sym.c
@@ -91,7 +91,7 @@ find_dbg_obj(const char *path)
 	snprintf(dbg_path, sizeof(dbg_path),
 	    "/usr/lib/debug/%s.debug", path);
 	fd = open(dbg_path, O_RDONLY);
-	if (fd > 0)
+	if (fd >= 0)
 		return (fd);
 	else
 		return (open(path, O_RDONLY));
diff --git a/lib/libstand/Makefile b/lib/libstand/Makefile
index fad9aa603c4..a5a135f7fd3 100644
--- a/lib/libstand/Makefile
+++ b/lib/libstand/Makefile
@@ -28,7 +28,7 @@ CFLAGS+=	-mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 -msoft-float
 CFLAGS.gcc+=	-mpreferred-stack-boundary=2
 .endif
 .if ${MACHINE_CPUARCH} == "amd64"
-CFLAGS+=	-fPIC
+CFLAGS+=	-fPIC -mno-red-zone
 .endif
 .if ${MACHINE} == "pc98"
 CFLAGS+=	-Os
@@ -80,7 +80,6 @@ SRCS+=	aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S
 .if ${MACHINE_CPUARCH} == "powerpc"
 .PATH: ${.CURDIR}/../libc/quad
 SRCS+=	ashldi3.c ashrdi3.c
-.PATH: ${.CURDIR}/../libc/powerpc/gen
 SRCS+=	syncicache.c
 .endif
 
@@ -89,11 +88,7 @@ SRCS+=	syncicache.c
 SRCS+= uuid_equal.c uuid_is_nil.c
 
 # _setjmp/_longjmp
-.if ${MACHINE_ARCH} == "powerpc64"
-.PATH: ${.CURDIR}/powerpc
-.else
 .PATH: ${.CURDIR}/${MACHINE_CPUARCH}
-.endif
 SRCS+=	_setjmp.S
 
 # decompression functionality from libbz2
diff --git a/lib/libstand/dosfs.c b/lib/libstand/dosfs.c
index 72205a2c648..b75d752fdc2 100644
--- a/lib/libstand/dosfs.c
+++ b/lib/libstand/dosfs.c
@@ -786,7 +786,8 @@ static int
 ioget(struct open_file *fd, u_int lsec, void *buf, u_int nsec)
 {
     int	err;
-    
+
+    twiddle(1);
     if ((err = (fd->f_dev->dv_strategy)(fd->f_devdata, F_READ, lsec, 
 					secbyt(nsec), buf, NULL)))
 	return(err);
diff --git a/lib/libstand/powerpc/_setjmp.S b/lib/libstand/powerpc/_setjmp.S
index 3884b114274..7c7c24b1237 100644
--- a/lib/libstand/powerpc/_setjmp.S
+++ b/lib/libstand/powerpc/_setjmp.S
@@ -42,7 +42,7 @@
 #define JMP_xer	24*REGWIDTH
 #define JMP_sig	25*REGWIDTH
 
-ASENTRY_NOPROF(setjmp)
+ASENTRY_NOPROF(_setjmp)
 	ST_REG 31, JMP_r31(3)
 	/* r1, r2, r14-r30 */
 	ST_REG 1,  JMP_r1 (3)
@@ -79,7 +79,7 @@ ASENTRY_NOPROF(setjmp)
 
 
 .extern sigsetmask
-ASENTRY_NOPROF(longjmp)
+ASENTRY_NOPROF(_longjmp)
 	LD_REG 31, JMP_r31(3)
 	/* r1, r2, r14-r30 */
 	LD_REG 1,  JMP_r1 (3)
diff --git a/lib/libstand/powerpc/syncicache.c b/lib/libstand/powerpc/syncicache.c
new file mode 100644
index 00000000000..434dcec6341
--- /dev/null
+++ b/lib/libstand/powerpc/syncicache.c
@@ -0,0 +1,103 @@
+/*-
+ * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
+ * Copyright (C) 1995-1997, 1999 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
+ */
+
+#ifndef lint
+static const char rcsid[] =
+  "$FreeBSD$";
+#endif /* not lint */
+
+#include <sys/param.h>
+#if	defined(_KERNEL) || defined(_STANDALONE)
+#include <sys/time.h>
+#include <sys/proc.h>
+#include <vm/vm.h>
+#endif
+#include <sys/sysctl.h>
+
+#include <machine/cpu.h>
+#include <machine/md_var.h>
+
+#ifdef _STANDALONE
+int cacheline_size = 32;
+#endif
+
+#if	!defined(_KERNEL) && !defined(_STANDALONE)
+#include <stdlib.h>
+
+int cacheline_size = 0;
+
+static void getcachelinesize(void);
+
+static void
+getcachelinesize()
+{
+	static int	cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
+	int		clen;
+
+	clen = sizeof(cacheline_size);
+
+	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
+	    &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size) {
+		abort();
+	}
+}
+#endif
+
+void
+__syncicache(void *from, int len)
+{
+	int	l, off;
+	char	*p;
+
+#if	!defined(_KERNEL) && !defined(_STANDALONE)
+	if (!cacheline_size)
+		getcachelinesize();
+#endif	
+
+	off = (u_int)from & (cacheline_size - 1);
+	l = len += off;
+	p = (char *)from - off;
+
+	do {
+		__asm __volatile ("dcbst 0,%0" :: "r"(p));
+		p += cacheline_size;
+	} while ((l -= cacheline_size) > 0);
+	__asm __volatile ("sync");
+	p = (char *)from - off;
+	do {
+		__asm __volatile ("icbi 0,%0" :: "r"(p));
+		p += cacheline_size;
+	} while ((len -= cacheline_size) > 0);
+	__asm __volatile ("sync; isync");
+}
+
diff --git a/lib/libthr/thread/thr_private.h b/lib/libthr/thread/thr_private.h
index 3cfbc6333dc..ed24c389912 100644
--- a/lib/libthr/thread/thr_private.h
+++ b/lib/libthr/thread/thr_private.h
@@ -337,7 +337,7 @@ struct pthread_key {
 
 /*
  * lwpid_t is 32bit but kernel thr API exports tid as long type
- * in very earily date.
+ * to preserve the ABI for M:N model in very early date (r131431).
  */
 #define TID(thread)	((uint32_t) ((thread)->tid))
 
diff --git a/lib/msun/man/j0.3 b/lib/msun/man/j0.3
index 91849da47a2..7e1b79058e2 100644
--- a/lib/msun/man/j0.3
+++ b/lib/msun/man/j0.3
@@ -28,7 +28,7 @@
 .\"     from: @(#)j0.3	6.7 (Berkeley) 4/19/91
 .\" $FreeBSD$
 .\"
-.Dd February 18, 2008
+.Dd March 10, 2015
 .Dt J0 3
 .Os
 .Sh NAME
@@ -77,24 +77,17 @@
 The functions
 .Fn j0 ,
 .Fn j0f ,
-.Fn j1
+.Fn j1 ,
 and
 .Fn j1f
-compute the
-.Em Bessel function of the first kind of the order
-0 and the
-.Em order
-1, respectively,
-for the
-real value
+compute the Bessel function of the first kind of orders
+0 and 1 for the real value
 .Fa x ;
 the functions
 .Fn jn
 and
 .Fn jnf
-compute the
-.Em Bessel function of the first kind of the integer
-.Em order
+compute the Bessel function of the first kind of the integer order
 .Fa n
 for the real value
 .Fa x .
@@ -105,13 +98,8 @@ The functions
 .Fn y1 ,
 and
 .Fn y1f
-compute the linearly independent
-.Em Bessel function of the second kind of the order
-0 and the
-.Em order
-1, respectively,
-for the
-positive
+compute the linearly independent Bessel function of the second kind 
+of orders 0 and 1 for the positive
 .Em real
 value
 .Fa x ;
@@ -119,9 +107,7 @@ the functions
 .Fn yn
 and
 .Fn ynf
-compute the
-.Em Bessel function of the second kind for the integer
-.Em order
+compute the Bessel function of the second kind for the integer order
 .Fa n
 for the positive
 .Em real
@@ -141,11 +127,20 @@ and
 .Fn ynf .
 If
 .Fa x
-is negative, these routines will generate an invalid exception and
-return \*(Na.
+is negative, including -\*(If, these routines will generate an invalid
+exception and return \*(Na.
 If
 .Fa x
-is 0 or a sufficiently small positive number, these routines
+is \*(Pm0, these routines
+will generate a divide-by-zero exception and return -\*(If.
+If
+.Fa x
+is a sufficiently small positive number, then 
+.Fn y1 ,
+.Fn y1f ,
+.Fn yn ,
+and
+.Fn ynf 
 will generate an overflow exception and return -\*(If.
 .Sh SEE ALSO
 .Xr math 3
diff --git a/lib/msun/src/e_j0.c b/lib/msun/src/e_j0.c
index 9e269e79cf1..365ffe5ee4b 100644
--- a/lib/msun/src/e_j0.c
+++ b/lib/msun/src/e_j0.c
@@ -64,6 +64,8 @@ __FBSDID("$FreeBSD$");
 
 static double pzero(double), qzero(double);
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 huge 	= 1e300,
 one	= 1.0,
@@ -150,10 +152,16 @@ __ieee754_y0(double x)
 
 	EXTRACT_WORDS(hx,lx,x);
         ix = 0x7fffffff&hx;
-    /* Y0(NaN) is NaN, y0(-inf) is Nan, y0(inf) is 0  */
-	if(ix>=0x7ff00000) return  one/(x+x*x); 
-        if((ix|lx)==0) return -one/zero;
-        if(hx<0) return zero/zero;
+	/*
+	 * y0(NaN) = NaN.
+	 * y0(Inf) = 0.
+	 * y0(-Inf) = NaN and raise invalid exception.
+	 */
+	if(ix>=0x7ff00000) return vone/(x+x*x); 
+	/* y0(+-0) = -inf and raise divide-by-zero exception. */
+	if((ix|lx)==0) return -one/vzero;
+	/* y0(x<0) = NaN and raise invalid exception. */
+	if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
         /* y0(x) = sqrt(2/(pi*x))*(p0(x)*sin(x0)+q0(x)*cos(x0))
          * where x0 = x-pi/4
diff --git a/lib/msun/src/e_j0f.c b/lib/msun/src/e_j0f.c
index 0479957c9db..e86ed640b3c 100644
--- a/lib/msun/src/e_j0f.c
+++ b/lib/msun/src/e_j0f.c
@@ -16,11 +16,17 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_j0.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
 static float pzerof(float), qzerof(float);
 
+static const volatile float vone = 1,  vzero = 0;
+
 static const float
 huge 	= 1e30,
 one	= 1.0,
@@ -107,10 +113,9 @@ __ieee754_y0f(float x)
 
 	GET_FLOAT_WORD(hx,x);
         ix = 0x7fffffff&hx;
-    /* Y0(NaN) is NaN, y0(-inf) is Nan, y0(inf) is 0  */
-	if(ix>=0x7f800000) return  one/(x+x*x);
-        if(ix==0) return -one/zero;
-        if(hx<0) return zero/zero;
+	if(ix>=0x7f800000) return  vone/(x+x*x);
+	if(ix==0) return -one/vzero;
+	if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
         /* y0(x) = sqrt(2/(pi*x))*(p0(x)*sin(x0)+q0(x)*cos(x0))
          * where x0 = x-pi/4
diff --git a/lib/msun/src/e_j1.c b/lib/msun/src/e_j1.c
index 2dc0ba1c7f2..49220586122 100644
--- a/lib/msun/src/e_j1.c
+++ b/lib/msun/src/e_j1.c
@@ -64,6 +64,8 @@ __FBSDID("$FreeBSD$");
 
 static double pone(double), qone(double);
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 huge    = 1e300,
 one	= 1.0,
@@ -147,10 +149,16 @@ __ieee754_y1(double x)
 
 	EXTRACT_WORDS(hx,lx,x);
         ix = 0x7fffffff&hx;
-    /* if Y1(NaN) is NaN, Y1(-inf) is NaN, Y1(inf) is 0 */
-	if(ix>=0x7ff00000) return  one/(x+x*x); 
-        if((ix|lx)==0) return -one/zero;
-        if(hx<0) return zero/zero;
+	/*
+	 * y1(NaN) = NaN.
+	 * y1(Inf) = 0.
+	 * y1(-Inf) = NaN and raise invalid exception.
+	 */
+	if(ix>=0x7ff00000) return  vone/(x+x*x); 
+	/* y1(+-0) = -inf and raise divide-by-zero exception. */
+        if((ix|lx)==0) return -one/vzero;
+	/* y1(x<0) = NaN and raise invalid exception. */
+        if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
                 s = sin(x);
                 c = cos(x);
diff --git a/lib/msun/src/e_j1f.c b/lib/msun/src/e_j1f.c
index 6077a6924d3..c39c548a0a2 100644
--- a/lib/msun/src/e_j1f.c
+++ b/lib/msun/src/e_j1f.c
@@ -16,11 +16,17 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_j1.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
 static float ponef(float), qonef(float);
 
+static const volatile float vone = 1, vzero = 0;
+
 static const float
 huge    = 1e30,
 one	= 1.0,
@@ -104,10 +110,9 @@ __ieee754_y1f(float x)
 
 	GET_FLOAT_WORD(hx,x);
         ix = 0x7fffffff&hx;
-    /* if Y1(NaN) is NaN, Y1(-inf) is NaN, Y1(inf) is 0 */
-	if(ix>=0x7f800000) return  one/(x+x*x);
-        if(ix==0) return -one/zero;
-        if(hx<0) return zero/zero;
+	if(ix>=0x7f800000) return  vone/(x+x*x);
+	if(ix==0) return -one/vzero;
+	if(hx<0) return vzero/vzero;
         if(ix >= 0x40000000) {  /* |x| >= 2.0 */
                 s = sinf(x);
                 c = cosf(x);
diff --git a/lib/msun/src/e_jn.c b/lib/msun/src/e_jn.c
index 8b0bc62efc2..eefd4ff751d 100644
--- a/lib/msun/src/e_jn.c
+++ b/lib/msun/src/e_jn.c
@@ -43,6 +43,8 @@ __FBSDID("$FreeBSD$");
 #include "math.h"
 #include "math_private.h"
 
+static const volatile double vone = 1, vzero = 0;
+
 static const double
 invsqrtpi=  5.64189583547756279280e-01, /* 0x3FE20DD7, 0x50429B6D */
 two   =  2.00000000000000000000e+00, /* 0x40000000, 0x00000000 */
@@ -220,10 +222,12 @@ __ieee754_yn(int n, double x)
 
 	EXTRACT_WORDS(hx,lx,x);
 	ix = 0x7fffffff&hx;
-    /* if Y(n,NaN) is NaN */
+	/* yn(n,NaN) = NaN */
 	if((ix|((u_int32_t)(lx|-lx))>>31)>0x7ff00000) return x+x;
-	if((ix|lx)==0) return -one/zero;
-	if(hx<0) return zero/zero;
+	/* yn(n,+-0) = -inf and raise divide-by-zero exception. */
+	if((ix|lx)==0) return -one/vzero;
+	/* yn(n,x<0) = NaN and raise invalid exception. */
+	if(hx<0) return vzero/vzero;
 	sign = 1;
 	if(n<0){
 		n = -n;
diff --git a/lib/msun/src/e_jnf.c b/lib/msun/src/e_jnf.c
index f564aeccd65..965feeb666d 100644
--- a/lib/msun/src/e_jnf.c
+++ b/lib/msun/src/e_jnf.c
@@ -16,9 +16,15 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+/*
+ * See e_jn.c for complete comments.
+ */
+
 #include "math.h"
 #include "math_private.h"
 
+static const volatile float vone = 1, vzero = 0;
+
 static const float
 two   =  2.0000000000e+00, /* 0x40000000 */
 one   =  1.0000000000e+00; /* 0x3F800000 */
@@ -172,10 +178,9 @@ __ieee754_ynf(int n, float x)
 
 	GET_FLOAT_WORD(hx,x);
 	ix = 0x7fffffff&hx;
-    /* if Y(n,NaN) is NaN */
 	if(ix>0x7f800000) return x+x;
-	if(ix==0) return -one/zero;
-	if(hx<0) return zero/zero;
+	if(ix==0) return -one/vzero;
+	if(hx<0) return vzero/vzero;
 	sign = 1;
 	if(n<0){
 		n = -n;
diff --git a/sbin/geom/class/part/gpart.8 b/sbin/geom/class/part/gpart.8
index e8c4dab2f43..520f0491d5c 100644
--- a/sbin/geom/class/part/gpart.8
+++ b/sbin/geom/class/part/gpart.8
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd August 12, 2014
+.Dd March 12, 2015
 .Dt GPART 8
 .Os
 .Sh NAME
@@ -659,6 +659,12 @@ Another symbolic names that can be used with
 .Cm gpart
 utility are:
 .Bl -tag -width ".Cm dragonfly-disklabel64"
+.It Cm apple-core-storage
+An Apple Mac OS X partition used by logical volume manager known as
+Core Storage.
+The scheme-specific type is
+.Qq Li "!53746f72-6167-11aa-aa11-00306543ecac"
+for GPT.
 .It Cm apple-hfs
 An Apple Mac OS X partition that contains a HFS or HFS+ filesystem.
 The scheme-specific types are
diff --git a/sbin/ifconfig/af_inet6.c b/sbin/ifconfig/af_inet6.c
index 37494000bc2..bff66e0d121 100644
--- a/sbin/ifconfig/af_inet6.c
+++ b/sbin/ifconfig/af_inet6.c
@@ -485,6 +485,10 @@ static struct cmd inet6_cmds[] = {
 	DEF_CMD("-auto_linklocal",-ND6_IFF_AUTO_LINKLOCAL,setnd6flags),
 	DEF_CMD("no_prefer_iface",ND6_IFF_NO_PREFER_IFACE,setnd6flags),
 	DEF_CMD("-no_prefer_iface",-ND6_IFF_NO_PREFER_IFACE,setnd6flags),
+	DEF_CMD("no_dad",	ND6_IFF_NO_DAD,		setnd6flags),
+	DEF_CMD("-no_dad",	-ND6_IFF_NO_DAD,	setnd6flags),
+	DEF_CMD("ignoreloop",	ND6_IFF_IGNORELOOP,	setnd6flags),
+	DEF_CMD("-ignoreloop",	-ND6_IFF_IGNORELOOP,	setnd6flags),
 	DEF_CMD_ARG("pltime",        			setip6pltime),
 	DEF_CMD_ARG("vltime",        			setip6vltime),
 	DEF_CMD("eui64",	0,			setip6eui64),
diff --git a/sbin/ifconfig/af_nd6.c b/sbin/ifconfig/af_nd6.c
index b3db0a8204e..3a510a5576d 100644
--- a/sbin/ifconfig/af_nd6.c
+++ b/sbin/ifconfig/af_nd6.c
@@ -58,7 +58,8 @@ static const char rcsid[] =
 #define	MAX_SYSCTL_TRY	5
 #define	ND6BITS	"\020\001PERFORMNUD\002ACCEPT_RTADV\003PREFER_SOURCE" \
 		"\004IFDISABLED\005DONT_SET_IFROUTE\006AUTO_LINKLOCAL" \
-		"\007NO_RADR\010NO_PREFER_IFACE\020DEFAULTIF"
+		"\007NO_RADR\010NO_PREFER_IFACE\011IGNORELOOP\012NO_DAD" \
+		"\020DEFAULTIF"
 
 static int isnd6defif(int);
 void setnd6flags(const char *, int, int, const struct afswtch *);
diff --git a/sbin/ifconfig/ifconfig.8 b/sbin/ifconfig/ifconfig.8
index fdd398bdb2b..1e4870dada1 100644
--- a/sbin/ifconfig/ifconfig.8
+++ b/sbin/ifconfig/ifconfig.8
@@ -28,7 +28,7 @@
 .\"     From: @(#)ifconfig.8	8.3 (Berkeley) 1/5/94
 .\" $FreeBSD$
 .\"
-.Dd December 16, 2014
+.Dd March 6, 2015
 .Dt IFCONFIG 8
 .Os
 .Sh NAME
@@ -687,6 +687,20 @@ policy table, configurable with
 .It Cm -no_prefer_iface
 Clear a flag
 .Cm no_prefer_iface .
+.It Cm no_dad
+Set a flag to disable Duplicate Address Detection.
+.It Cm -no_dad
+Clear a flag
+.Cm no_dad .
+.It Cm ignoreloop
+Set a flag to disable loopback detection in Enhanced Duplicate Address
+Detection Algorithm.
+When this flag is set,
+Duplicate Address Detection will stop in a finite number of probings
+even if a loopback configuration is detected.
+.It Cm -ignoreloop
+Clear a flag
+.Cm ignoreloop .
 .El
 .Pp
 The following parameters are specific for IPv6 addresses.
diff --git a/sbin/ifconfig/ifconfig.c b/sbin/ifconfig/ifconfig.c
index 5a805a7e60f..9d38a27f5ec 100644
--- a/sbin/ifconfig/ifconfig.c
+++ b/sbin/ifconfig/ifconfig.c
@@ -1280,9 +1280,8 @@ ifmaybeload(const char *name)
 		}
 
 	/* turn interface and unit into module name */
-	strcpy(ifkind, "if_");
-	strlcpy(ifkind + MOD_PREFIX_LEN, ifname,
-	    sizeof(ifkind) - MOD_PREFIX_LEN);
+	strlcpy(ifkind, "if_", sizeof(ifkind));
+	strlcat(ifkind, ifname, sizeof(ifkind));
 
 	/* scan files in kernel */
 	mstat.version = sizeof(struct module_stat);
@@ -1299,8 +1298,8 @@ ifmaybeload(const char *name)
 				cp = mstat.name;
 			}
 			/* already loaded? */
-			if (strncmp(ifname, cp, strlen(ifname) + 1) == 0 ||
-			    strncmp(ifkind, cp, strlen(ifkind) + 1) == 0)
+			if (strcmp(ifname, cp) == 0 ||
+			    strcmp(ifkind, cp) == 0)
 				return;
 		}
 	}
diff --git a/sbin/ipfw/ipfw.8 b/sbin/ipfw/ipfw.8
index 6d25174b8a8..63f04cf9690 100644
--- a/sbin/ipfw/ipfw.8
+++ b/sbin/ipfw/ipfw.8
@@ -1,7 +1,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd Aug 13, 2014
+.Dd March 13, 2015
 .Dt IPFW 8
 .Os
 .Sh NAME
@@ -2078,6 +2078,8 @@ hook number to move packet to.
 maximum number of connections.
 .It Cm ipv4
 IPv4 nexthop to fwd packets to.
+.It Cm ipv6
+IPv6 nexthop to fwd packets to.
 .El
 .Pp
 The
diff --git a/sbin/ipfw/ipfw2.c b/sbin/ipfw/ipfw2.c
index d16d9e7909b..9a0bd9e5d7d 100644
--- a/sbin/ipfw/ipfw2.c
+++ b/sbin/ipfw/ipfw2.c
@@ -1525,11 +1525,14 @@ show_static_rule(struct cmdline_opts *co, struct format_opts *fo,
 
 		case O_FORWARD_IP6:
 		    {
-			char buf[4 + INET6_ADDRSTRLEN + 1];
+			char buf[INET6_ADDRSTRLEN + IF_NAMESIZE + 2];
 			ipfw_insn_sa6 *s = (ipfw_insn_sa6 *)cmd;
 
-			bprintf(bp, "fwd %s", inet_ntop(AF_INET6,
-			    &s->sa.sin6_addr, buf, sizeof(buf)));
+			bprintf(bp, "fwd ");
+			if (getnameinfo((const struct sockaddr *)&s->sa,
+			    sizeof(struct sockaddr_in6), buf, sizeof(buf),
+			    NULL, 0, NI_NUMERICHOST) == 0)
+				bprintf(bp, "%s", buf);
 			if (s->sa.sin6_port)
 				bprintf(bp, ",%d", s->sa.sin6_port);
 		    }
@@ -3741,8 +3744,8 @@ compile_rule(char *av[], uint32_t *rbuf, int *rbufsize, struct tidx *tstate)
 			p->sa.sin6_family = AF_INET6;
 			p->sa.sin6_port = port_number;
 			p->sa.sin6_flowinfo = 0;
-			p->sa.sin6_scope_id = 0;
-			/* No table support for v6 yet. */
+			p->sa.sin6_scope_id =
+			    ((struct sockaddr_in6 *)&result)->sin6_scope_id;
 			bcopy(&((struct sockaddr_in6*)&result)->sin6_addr,
 			    &p->sa.sin6_addr, sizeof(p->sa.sin6_addr));
 		} else {
diff --git a/sbin/ipfw/tables.c b/sbin/ipfw/tables.c
index 4829fecdc41..4ea5b7b84fd 100644
--- a/sbin/ipfw/tables.c
+++ b/sbin/ipfw/tables.c
@@ -35,6 +35,7 @@
 #include <netinet/in.h>
 #include <netinet/ip_fw.h>
 #include <arpa/inet.h>
+#include <netdb.h>
 
 #include "ipfw2.h"
 
@@ -1384,6 +1385,7 @@ static void
 tentry_fill_value(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *arg,
     uint8_t type, uint32_t vmask)
 {
+	struct addrinfo hints, *res;
 	uint32_t a4, flag, val, vm;
 	ipfw_table_value *v;
 	uint32_t i;
@@ -1494,9 +1496,19 @@ tentry_fill_value(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *arg,
 			}
 			break;
 		case IPFW_VTYPE_NH6:
-			if (strchr(n, ':') != NULL &&
-			    inet_pton(AF_INET6, n, &v->nh6) == 1)
-				break;
+			if (strchr(n, ':') != NULL) {
+				memset(&hints, 0, sizeof(hints));
+				hints.ai_family = AF_INET6;
+				hints.ai_flags = AI_NUMERICHOST;
+				if (getaddrinfo(n, NULL, &hints, &res) == 0) {
+					v->nh6 = ((struct sockaddr_in6 *)
+					    res->ai_addr)->sin6_addr;
+					v->zoneid = ((struct sockaddr_in6 *)
+					    res->ai_addr)->sin6_scope_id;
+					freeaddrinfo(res);
+					break;
+				}
+			}
 			etype = "ipv6";
 			break;
 		}
@@ -1643,10 +1655,11 @@ static void
 table_show_value(char *buf, size_t bufsize, ipfw_table_value *v,
     uint32_t vmask, int print_ip)
 {
+	char abuf[INET6_ADDRSTRLEN + IF_NAMESIZE + 2];
+	struct sockaddr_in6 sa6;
 	uint32_t flag, i, l;
 	size_t sz;
 	struct in_addr a4;
-	char abuf[INET6_ADDRSTRLEN];
 
 	sz = bufsize;
 
@@ -1702,8 +1715,15 @@ table_show_value(char *buf, size_t bufsize, ipfw_table_value *v,
 			l = snprintf(buf, sz, "%d,", v->dscp);
 			break;
 		case IPFW_VTYPE_NH6:
-			inet_ntop(AF_INET6, &v->nh6, abuf, sizeof(abuf));
-			l = snprintf(buf, sz, "%s,", abuf);
+			sa6.sin6_family = AF_INET6;
+			sa6.sin6_len = sizeof(sa6);
+			sa6.sin6_addr = v->nh6;
+			sa6.sin6_port = 0;
+			sa6.sin6_scope_id = v->zoneid;
+			if (getnameinfo((const struct sockaddr *)&sa6,
+			    sa6.sin6_len, abuf, sizeof(abuf), NULL, 0,
+			    NI_NUMERICHOST) == 0)
+				l = snprintf(buf, sz, "%s,", abuf);
 			break;
 		}
 
@@ -1862,11 +1882,12 @@ struct _table_value {
 	uint32_t	nat;		/* O_NAT */
 	uint32_t	nh4;
 	uint8_t		dscp;
-	uint8_t		spare0[3];
+	uint8_t		spare0;
+	uint16_t	spare1;
 	/* -- 32 bytes -- */
 	struct in6_addr	nh6;
 	uint32_t	limit;		/* O_LIMIT */
-	uint32_t	spare1;
+	uint32_t	zoneid;
 	uint64_t	refcnt;		/* Number of references */
 };
 
diff --git a/sbin/restore/dirs.c b/sbin/restore/dirs.c
index b2cd8fd2886..7b308cd0241 100644
--- a/sbin/restore/dirs.c
+++ b/sbin/restore/dirs.c
@@ -80,8 +80,8 @@ static struct inotab *inotab[HASHSIZE];
  */
 struct modeinfo {
 	ino_t ino;
-	struct timeval ctimep[2];
-	struct timeval mtimep[2];
+	struct timespec ctimep[2];
+	struct timespec mtimep[2];
 	mode_t mode;
 	uid_t uid;
 	gid_t gid;
@@ -656,8 +656,8 @@ setdirmodes(int flags)
 			else
 				(void) chown(cp, node.uid, node.gid);
 			(void) chmod(cp, node.mode);
-			utimes(cp, node.ctimep);
-			utimes(cp, node.mtimep);
+			utimensat(AT_FDCWD, cp, node.ctimep, 0);
+			utimensat(AT_FDCWD, cp, node.mtimep, 0);
 			(void) chflags(cp, node.flags);
 		}
 		ep->e_flags &= ~NEW;
@@ -746,13 +746,13 @@ allocinotab(struct context *ctxp, long seekpt)
 		return (itp);
 	node.ino = ctxp->ino;
 	node.mtimep[0].tv_sec = ctxp->atime_sec;
-	node.mtimep[0].tv_usec = ctxp->atime_nsec / 1000;
+	node.mtimep[0].tv_nsec = ctxp->atime_nsec;
 	node.mtimep[1].tv_sec = ctxp->mtime_sec;
-	node.mtimep[1].tv_usec = ctxp->mtime_nsec / 1000;
+	node.mtimep[1].tv_nsec = ctxp->mtime_nsec;
 	node.ctimep[0].tv_sec = ctxp->atime_sec;
-	node.ctimep[0].tv_usec = ctxp->atime_nsec / 1000;
+	node.ctimep[0].tv_nsec = ctxp->atime_nsec;
 	node.ctimep[1].tv_sec = ctxp->birthtime_sec;
-	node.ctimep[1].tv_usec = ctxp->birthtime_nsec / 1000;
+	node.ctimep[1].tv_nsec = ctxp->birthtime_nsec;
 	node.extsize = ctxp->extsize;
 	node.mode = ctxp->mode;
 	node.flags = ctxp->file_flags;
diff --git a/sbin/restore/tape.c b/sbin/restore/tape.c
index 225fe3250bd..9c9890f1b8a 100644
--- a/sbin/restore/tape.c
+++ b/sbin/restore/tape.c
@@ -569,20 +569,20 @@ extractfile(char *name)
 	gid_t gid;
 	mode_t mode;
 	int extsize;
-	struct timeval mtimep[2], ctimep[2];
+	struct timespec mtimep[2], ctimep[2];
 	struct entry *ep;
 	char *buf;
 
 	curfile.name = name;
 	curfile.action = USING;
 	mtimep[0].tv_sec = curfile.atime_sec;
-	mtimep[0].tv_usec = curfile.atime_nsec / 1000;
+	mtimep[0].tv_nsec = curfile.atime_nsec;
 	mtimep[1].tv_sec = curfile.mtime_sec;
-	mtimep[1].tv_usec = curfile.mtime_nsec / 1000;
+	mtimep[1].tv_nsec = curfile.mtime_nsec;
 	ctimep[0].tv_sec = curfile.atime_sec;
-	ctimep[0].tv_usec = curfile.atime_nsec / 1000;
+	ctimep[0].tv_nsec = curfile.atime_nsec;
 	ctimep[1].tv_sec = curfile.birthtime_sec;
-	ctimep[1].tv_usec = curfile.birthtime_nsec / 1000;
+	ctimep[1].tv_nsec = curfile.birthtime_nsec;
 	extsize = curfile.extsize;
 	uid = getuid();
 	if (uid == 0)
@@ -628,8 +628,10 @@ extractfile(char *name)
 				set_extattr_link(name, buf, extsize);
 			(void) lchown(name, uid, gid);
 			(void) lchmod(name, mode);
-			(void) lutimes(name, ctimep);
-			(void) lutimes(name, mtimep);
+			(void) utimensat(AT_FDCWD, name, ctimep,
+			    AT_SYMLINK_NOFOLLOW);
+			(void) utimensat(AT_FDCWD, name, mtimep,
+			    AT_SYMLINK_NOFOLLOW);
 			(void) lchflags(name, flags);
 			return (GOOD);
 		}
@@ -658,8 +660,8 @@ extractfile(char *name)
 		}
 		(void) chown(name, uid, gid);
 		(void) chmod(name, mode);
-		(void) utimes(name, ctimep);
-		(void) utimes(name, mtimep);
+		(void) utimensat(AT_FDCWD, name, ctimep, 0);
+		(void) utimensat(AT_FDCWD, name, mtimep, 0);
 		(void) chflags(name, flags);
 		return (GOOD);
 
@@ -688,8 +690,8 @@ extractfile(char *name)
 		}
 		(void) chown(name, uid, gid);
 		(void) chmod(name, mode);
-		(void) utimes(name, ctimep);
-		(void) utimes(name, mtimep);
+		(void) utimensat(AT_FDCWD, name, ctimep, 0);
+		(void) utimensat(AT_FDCWD, name, mtimep, 0);
 		(void) chflags(name, flags);
 		return (GOOD);
 
@@ -714,8 +716,8 @@ extractfile(char *name)
 			set_extattr_fd(ofile, name, buf, extsize);
 		(void) fchown(ofile, uid, gid);
 		(void) fchmod(ofile, mode);
-		(void) futimes(ofile, ctimep);
-		(void) futimes(ofile, mtimep);
+		(void) futimens(ofile, ctimep);
+		(void) futimens(ofile, mtimep);
 		(void) fchflags(ofile, flags);
 		(void) close(ofile);
 		return (GOOD);
diff --git a/share/doc/psd/title/Title b/share/doc/psd/title/Title
index 014b3d54dcd..eb1ad942274 100644
--- a/share/doc/psd/title/Title
+++ b/share/doc/psd/title/Title
@@ -9,11 +9,7 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
-.\"    must display the following acknowledgement:
-.\"	This product includes software developed by the University of
-.\"	California, Berkeley and its contributors.
-.\" 4. Neither the name of the University nor the names of its contributors
+.\" 3. Neither the name of the University nor the names of its contributors
 .\"    may be used to endorse or promote products derived from this software
 .\"    without specific prior written permission.
 .\"
diff --git a/share/doc/smm/title/Title b/share/doc/smm/title/Title
index 5faa11f6960..221bdceaff6 100644
--- a/share/doc/smm/title/Title
+++ b/share/doc/smm/title/Title
@@ -9,11 +9,7 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
-.\"    must display the following acknowledgement:
-.\"	This product includes software developed by the University of
-.\"	California, Berkeley and its contributors.
-.\" 4. Neither the name of the University nor the names of its contributors
+.\" 3. Neither the name of the University nor the names of its contributors
 .\"    may be used to endorse or promote products derived from this software
 .\"    without specific prior written permission.
 .\"
diff --git a/share/doc/usd/title/Title b/share/doc/usd/title/Title
index 1de72972dd6..4c140a42c2b 100644
--- a/share/doc/usd/title/Title
+++ b/share/doc/usd/title/Title
@@ -9,11 +9,7 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
-.\"    must display the following acknowledgement:
-.\"	This product includes software developed by the University of
-.\"	California, Berkeley and its contributors.
-.\" 4. Neither the name of the University nor the names of its contributors
+.\" 3. Neither the name of the University nor the names of its contributors
 .\"    may be used to endorse or promote products derived from this software
 .\"    without specific prior written permission.
 .\"
diff --git a/share/dtrace/Makefile b/share/dtrace/Makefile
index 328f806f7a3..e4f69d4cab7 100644
--- a/share/dtrace/Makefile
+++ b/share/dtrace/Makefile
@@ -15,7 +15,11 @@ _toolkit=	toolkit
 SCRIPTS=	disklatency \
 		disklatencycmd \
 		hotopen \
-		nfsclienttime
+		nfsclienttime \
+		udptrack \
+		tcpstate \
+		tcptrack \
+		tcpconn 
 
 SCRIPTSDIR= ${SHAREDIR}/dtrace
 
diff --git a/sys/amd64/vmm/vmm_support.S b/share/dtrace/tcpconn
old mode 100644
new mode 100755
similarity index 67%
rename from sys/amd64/vmm/vmm_support.S
rename to share/dtrace/tcpconn
index 7919511c3ea..5cf3c1cfa47
--- a/sys/amd64/vmm/vmm_support.S
+++ b/share/dtrace/tcpconn
@@ -1,5 +1,6 @@
-/*-
- * Copyright (c) 2011 NetApp, Inc.
+#!/usr/sbin/dtrace -s
+/*
+ * Copyright (c) 2015 George V. Neville-Neil
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -11,10 +12,10 @@
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
- * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
@@ -24,20 +25,23 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD$
+ *
+ * The tcpconn D script shows histograms of the source of TCP connections
+ *
+ * Usage: tcpconn
  */
 
-#define	LOCORE
-
-#include <machine/asmacros.h>
-
-	.text
-	SUPERALIGN_TEXT
-IDTVEC(justreturn)
-	pushq	%rdx
-	pushq	%rax
-	pushq	%rcx
-	call	as_lapic_eoi
-	popq	%rcx
-	popq	%rax
-	popq	%rdx
-	jmp	doreti_iret
+#pragma D option quiet
+BEGIN
+{
+	printf("Press Ctrl-C for output\n");
+	printf("Source IP");
+}
+tcp:kernel::accept-established
+{
+	@sources[args[2]->ip_daddr] = count();	
+}
+tcp:kernel::accept-refused
+{
+	@sources[args[2]->ip_daddr] = count();	
+}
diff --git a/share/dtrace/tcpstate b/share/dtrace/tcpstate
new file mode 100755
index 00000000000..4528bd7fe43
--- /dev/null
+++ b/share/dtrace/tcpstate
@@ -0,0 +1,46 @@
+#!/usr/sbin/dtrace -s
+/*
+ * Copyright (c) 2015 George V. Neville-Neil
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ * The tcpstate D script shows TCP sockets transitioning between states.
+ *
+ * Usage: tcpstate
+ */
+
+#pragma D option quiet
+BEGIN
+{
+	printf("Old State\t\tNew State\n");
+}
+
+tcp:kernel::state-change
+{
+	newstate = args[3]->tcps_state;
+	oldstate = args[5]->tcps_state;
+	printf("%s\t\t%s\n", tcp_state_string[oldstate],
+			     tcp_state_string[newstate]);
+}
diff --git a/share/dtrace/tcptrack b/share/dtrace/tcptrack
new file mode 100755
index 00000000000..4974a27a603
--- /dev/null
+++ b/share/dtrace/tcptrack
@@ -0,0 +1,83 @@
+#!/usr/sbin/dtrace -s
+/*
+ * Copyright (c) 2015 George V. Neville-Neil
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ * The tcptrack D script shows various information about TCP
+ * connections including acceptance and refusal of inbound and
+ * outbound connections as well as state changes.
+ *
+ * Usage: tcptrack
+ */
+
+#pragma D option quiet
+tcp:kernel::accept-established
+{
+	printf("Accept connection from %s:%d\tto %s:%d\n",
+		       args[2]->ip_saddr,
+		       args[4]->tcp_sport,
+		       args[2]->ip_daddr,
+		       args[4]->tcp_dport);
+
+}
+
+tcp:kernel::accept-refused
+{
+	printf("Refused connection from %s:%d\tto %s:%d\n", 
+		       args[2]->ip_daddr,
+		       args[4]->tcp_dport,
+		       args[2]->ip_saddr,
+		       args[4]->tcp_sport);
+
+}
+
+tcp:kernel::connect-established
+{
+	printf("Connection established to %s:%d from %s:%d\n",
+		       args[2]->ip_saddr,
+		       args[4]->tcp_sport,
+		       args[2]->ip_daddr,
+		       args[4]->tcp_dport);
+
+}
+
+tcp:kernel::connect-refused
+{
+	printf("Connection refused by %s:%d from %s:%d\n", 
+		       args[2]->ip_saddr,
+		       args[4]->tcp_sport,
+		       args[2]->ip_daddr,
+		       args[4]->tcp_dport);
+}
+
+tcp:kernel::state-change
+{
+	newstate = args[3]->tcps_state;
+	oldstate = args[5]->tcps_state;
+	printf("State changed from %s\t\t%s\n", tcp_state_string[oldstate],
+				     tcp_state_string[newstate]);
+}
+
diff --git a/share/dtrace/udptrack b/share/dtrace/udptrack
new file mode 100755
index 00000000000..ca7e8e90e74
--- /dev/null
+++ b/share/dtrace/udptrack
@@ -0,0 +1,53 @@
+#!/usr/sbin/dtrace -s
+/*
+ * Copyright (c) 2015 George V. Neville-Neil
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ * The udptrack D script shows various information about UDP
+ * data that are sent and received on the host.
+ *
+ * Usage: udptrack
+ */
+
+#pragma D option quiet
+udp:kernel::receive
+{
+	printf("Received %d bytes of data from %s:%d\n",
+	       args[4]->udp_length,
+	       args[2]->ip_saddr,
+	       args[4]->udp_sport);
+	tracemem(args[4]->udp_hdr, 64);
+}
+
+udp:kernel::send
+{
+	printf("Sent %d bytes of data to %s:%d\n", 
+	       args[4]->udp_length,
+	       args[2]->ip_daddr,
+	       args[4]->udp_dport);
+	tracemem(args[4]->udp_hdr, 64);
+}
+
diff --git a/share/examples/bhyve/vmrun.sh b/share/examples/bhyve/vmrun.sh
index 7a8007f07f7..901404b8b43 100755
--- a/share/examples/bhyve/vmrun.sh
+++ b/share/examples/bhyve/vmrun.sh
@@ -62,6 +62,7 @@ usage() {
 	echo "       -i: force boot of the Installation CDROM image"
 	echo "       -I: Installation CDROM image location (default is ${DEFAULT_ISOFILE})"
 	echo "       -m: memory size (default is ${DEFAULT_MEMSIZE})"
+	echo "       -p: pass-through a host PCI device at bus/slot/func (e.g. 10/0/0)"
 	echo "       -t: tap device for virtio-net (default is $DEFAULT_TAPDEV)"
 	echo ""
 	[ -n "$msg" ] && errmsg "$msg"
@@ -89,8 +90,9 @@ disk_total=0
 apic_opt=""
 gdbport=0
 loader_opt=""
+pass_total=0
 
-while getopts ac:C:d:e:g:hH:iI:m:t: c ; do
+while getopts ac:C:d:e:g:hH:iI:m:p:t: c ; do
 	case $c in
 	a)
 		apic_opt="-a"
@@ -123,6 +125,10 @@ while getopts ac:C:d:e:g:hH:iI:m:t: c ; do
 	m)
 		memsize=${OPTARG}
 		;;
+	p)
+		eval "pass_dev${pass_total}=\"${OPTARG}\""
+		pass_total=$(($pass_total + 1))
+		;;
 	t)
 		eval "tap_dev${tap_total}=\"${OPTARG}\""
 		tap_total=$(($tap_total + 1))
@@ -237,6 +243,14 @@ while [ 1 ]; do
 	    i=$(($i + 1))
 	done
 
+	i=0
+	while [ $i -lt $pass_total ] ; do
+	    eval "pass=\$pass_dev${i}"
+	    devargs="$devargs -s $nextslot:0,passthru,${pass} "
+	    nextslot=$(($nextslot + 1))
+	    i=$(($i + 1))
+        done
+
 	${FBSDRUN} -c ${cpus} -m ${memsize} ${apic_opt} -A -H -P	\
 		-g ${gdbport}						\
 		-s 0:0,hostbridge					\
diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile
index d9c04b9b52d..441a29f69c7 100644
--- a/share/man/man4/Makefile
+++ b/share/man/man4/Makefile
@@ -119,6 +119,7 @@ MAN=	aac.4 \
 	divert.4 \
 	${_dpms.4} \
 	dpt.4 \
+	ds3231.4 \
 	dummynet.4 \
 	ed.4 \
 	edsc.4 \
diff --git a/share/man/man4/ds3231.4 b/share/man/man4/ds3231.4
index 90ba54b7b07..348860aaa6b 100644
--- a/share/man/man4/ds3231.4
+++ b/share/man/man4/ds3231.4
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd October 26, 2014
+.Dd March 6, 2015
 .Dt DS3231 4
 .Os
 .Sh NAME
diff --git a/share/man/man5/core.5 b/share/man/man5/core.5
index 5a827e2993f..3f54f890ef9 100644
--- a/share/man/man5/core.5
+++ b/share/man/man5/core.5
@@ -28,7 +28,7 @@
 .\"     @(#)core.5	8.3 (Berkeley) 12/11/93
 .\" $FreeBSD$
 .\"
-.Dd November 22, 2012
+.Dd March 8, 2015
 .Dt CORE 5
 .Os
 .Sh NAME
@@ -101,25 +101,23 @@ variable
 .Va kern.sugid_coredump
 to 1.
 .Pp
-Corefiles can be compressed by the kernel if the following items
-are included in the kernel configuration file:
+Corefiles can be compressed by the kernel if the following item
+is included in the kernel configuration file:
 .Bl -tag -width "1234567890" -compact -offset "12345"
 .It options
-COMPRESS_USER_CORES
-.It devices
-gzio
+GZIO
 .El
 .Pp
-When COMPRESS_USER_CORES is included the following sysctls can control
-if core files will be compressed:
+When the GZIO option is included, the following sysctls control whether core
+files will be compressed:
 .Bl -tag -width "kern.compress_user_cores_gzlevel" -compact -offset "12345"
 .It Em kern.compress_user_cores_gzlevel
 Gzip compression level.
-Defaults to -1.
+Defaults to 6.
 .It Em kern.compress_user_cores
 Actually compress user cores.
-Core files will have the suffix
-.Em .gz
+Compressed core files will have a suffix of
+.Ql .gz
 appended to them.
 .El
 .Sh EXAMPLES
diff --git a/share/man/man5/periodic.conf.5 b/share/man/man5/periodic.conf.5
index 75ac34306df..7b08fecac01 100644
--- a/share/man/man5/periodic.conf.5
+++ b/share/man/man5/periodic.conf.5
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd January 15, 2015
+.Dd March 13, 2015
 .Dt PERIODIC.CONF 5
 .Os
 .Sh NAME
@@ -335,6 +335,8 @@ utility when
 .Va daily_status_disks_enable
 is set to
 .Dq Li YES .
+The default is
+.Fl l Fl h .
 .It Va daily_status_zfs_enable
 .Pq Vt bool
 Set to
diff --git a/share/man/man9/SDT.9 b/share/man/man9/SDT.9
index c65b82402ba..9016b4261a3 100644
--- a/share/man/man9/SDT.9
+++ b/share/man/man9/SDT.9
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd September 18, 2014
+.Dd March 8, 2015
 .Dt SDT 9
 .Os
 .Sh NAME
@@ -196,13 +196,13 @@ They are meant to be added to executable code and can be used to instrument the
 code in which they are called.
 .Sh EXAMPLES
 The following probe definition will create a DTrace probe called
-.Ql icmp::unreach:pkt-receive ,
+.Ql icmp:::receive-unreachable ,
 which would hypothetically be triggered when the kernel receives an ICMP packet
 of type Destination Unreachable:
 .Bd -literal -offset indent
 SDT_PROVIDER_DECLARE(icmp);
 
-SDT_PROBE_DEFINE1(icmp, , unreach, pkt__receive,
+SDT_PROBE_DEFINE1(icmp, , , receive__unreachable,
     "struct icmp *");
 
 .Ed
@@ -286,10 +286,10 @@ This manual page was written by
 .Sh BUGS
 The
 .Nm
-macros allow the module name of a probe to be specified as part of a probe
-definition.
-However, the DTrace framework uses the module name of probes to determine
-which probes should be destroyed when a kernel module is unloaded, so the module
+macros allow the module and function names of a probe to be specified as part of
+a probe definition.
+The DTrace framework uses the module name of probes to determine which probes
+should be destroyed when a kernel module is unloaded, so the module
 name of a probe should match the name of the module in which its defined.
 .Nm
 will set the module name properly if it is left unspecified in the probe
diff --git a/share/man/man9/VOP_VPTOCNP.9 b/share/man/man9/VOP_VPTOCNP.9
index 74042601810..3e680ad1241 100644
--- a/share/man/man9/VOP_VPTOCNP.9
+++ b/share/man/man9/VOP_VPTOCNP.9
@@ -28,7 +28,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 19, 2011
+.Dd March 8, 2015
 .Dt VOP_VPTOCNP 9
 .Os
 .Sh NAME
@@ -36,9 +36,10 @@
 .Nd translate a vnode to its component name
 .Sh SYNOPSIS
 .In sys/param.h
+.In sys/ucred.h
 .In sys/vnode.h
 .Ft int
-.Fn VOP_VPTOCNP "struct vnode *vp" "struct vnode **dvp" "char *buf" "int *buflen"
+.Fn VOP_VPTOCNP "struct vnode *vp" "struct vnode **dvp" "struct ucred *cred" "char *buf" "int *buflen"
 .Sh DESCRIPTION
 This translates a vnode into its component name, and writes that name to
 the head of the buffer specified by
@@ -49,6 +50,8 @@ The vnode to translate.
 .It Fa dvp
 The vnode of the parent directory of
 .Fa vp .
+.It Fa cred
+The caller credentials.
 .It Fa buf
 The buffer into which to prepend the component name.
 .It Fa buflen
@@ -59,7 +62,8 @@ The default implementation of
 .Nm
 scans through
 .Fa vp Ns 's
-parent directory looking for a dirent with a matching file number.  If
+parent directory looking for a dirent with a matching file number.
+If
 .Fa vp
 is not a directory, then
 .Nm
diff --git a/share/man/man9/mbuf.9 b/share/man/man9/mbuf.9
index f447b96d016..ea53ab969b2 100644
--- a/share/man/man9/mbuf.9
+++ b/share/man/man9/mbuf.9
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd January 5, 2015
+.Dd March 11, 2015
 .Dt MBUF 9
 .Os
 .\"
@@ -141,6 +141,8 @@
 .Ft struct mbuf *
 .Fn m_defrag "struct mbuf *m0" "int how"
 .Ft struct mbuf *
+.Fn m_collapse "struct mbuf *m0" "int how" "int maxfrags"
+.Ft struct mbuf *
 .Fn m_unshare "struct mbuf *m0" "int how"
 .\"
 .Sh DESCRIPTION
@@ -983,6 +985,20 @@ depending on the caller's preference.
 This function is especially useful in network drivers, where
 certain long mbuf chains must be shortened before being added
 to TX descriptor lists.
+.It Fn m_collapse m0 how maxfrags
+Defragment an mbuf chain, returning a chain of at most
+.Fa maxfrags
+mbufs and clusters.
+If allocation fails or the chain cannot be collapsed as requested,
+.Dv NULL
+will be returned, with the original chain possibly modified.
+As with
+.Fn m_defrag ,
+.Fa how
+should be one of
+.Dv M_WAITOK
+or
+.Dv M_NOWAIT .
 .It Fn m_unshare m0 how
 Create a version of the specified mbuf chain whose
 contents can be safely modified without affecting other users.
diff --git a/share/man/man9/sbuf.9 b/share/man/man9/sbuf.9
index 495726c5fb1..f696307179c 100644
--- a/share/man/man9/sbuf.9
+++ b/share/man/man9/sbuf.9
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd April 11, 2013
+.Dd March 14, 2015
 .Dt SBUF 9
 .Os
 .Sh NAME
@@ -34,6 +34,9 @@
 .Nm sbuf_new_auto ,
 .Nm sbuf_new_for_sysctl ,
 .Nm sbuf_clear ,
+.Nm sbuf_get_flags ,
+.Nm sbuf_set_flags ,
+.Nm sbuf_clear_flags ,
 .Nm sbuf_setpos ,
 .Nm sbuf_bcat ,
 .Nm sbuf_bcopyin ,
@@ -67,6 +70,12 @@
 .Ft void
 .Fn sbuf_clear "struct sbuf *s"
 .Ft int
+.Fn sbuf_get_flags "struct sbuf *s"
+.Ft void
+.Fn sbuf_set_flags "struct sbuf *s" "int flags"
+.Ft void
+.Fn sbuf_clear_flags "struct sbuf *s" "int flags"
+.Ft int
 .Fn sbuf_setpos "struct sbuf *s" "int pos"
 .Ft int
 .Fn sbuf_bcat "struct sbuf *s" "const void *buf" "size_t len"
@@ -159,6 +168,8 @@ Attempting to extend the sbuf beyond this size results in an overflow condition.
 .It Dv SBUF_AUTOEXTEND
 This indicates that the storage buffer may be extended as necessary, so long
 as resources allow, to hold additional data.
+.It Dv SBUF_INCLUDENUL
+This causes the final nulterm byte to be counted in the length of the data.
 .El
 .Pp
 Note that if
@@ -211,6 +222,18 @@ function invalidates the contents of the
 and resets its position to zero.
 .Pp
 The
+.Fn sbuf_get_flags
+function returns the current user flags.
+The
+.Fn sbuf_set_flags
+and
+.Fn sbuf_get_flags
+functions set or clear one or more user flags, respectively.
+The user flags are described under the
+.Fn sbuf_new
+function.
+.Pp
+The
 .Fn sbuf_setpos
 function sets the
 .Fa sbuf Ns 's
diff --git a/share/misc/committers-src.dot b/share/misc/committers-src.dot
index 3bce79b3aca..0d7177f78b4 100644
--- a/share/misc/committers-src.dot
+++ b/share/misc/committers-src.dot
@@ -178,6 +178,7 @@ ian [label="Ian Lepore\nian@FreeBSD.org\n2013/01/07"]
 iedowse [label="Ian Dowse\niedowse@FreeBSD.org\n2000/12/01"]
 imp [label="Warner Losh\nimp@FreeBSD.org\n1996/09/20"]
 ivoras [label="Ivan Voras\nivoras@FreeBSD.org\n2008/06/10"]
+jah [label="Jason A. Harmening\njah@FreeBSD.org\n2015/03/08"]
 jamie [label="Jamie Gritton\njamie@FreeBSD.org\n2009/01/28"]
 jasone [label="Jason Evans\njasone@FreeBSD.org\n1999/03/03"]
 jceel [label="Jakub Klama\njceel@FreeBSD.org\n2011/09/25"]
@@ -296,6 +297,7 @@ tuexen [label="Michael Tuexen\ntuexen@FreeBSD.org\n2009/06/06"]
 tychon [label="Tycho Nightingale\ntychon@FreeBSD.org\n2014/01/21"]
 ume [label="Hajimu UMEMOTO\nume@FreeBSD.org\n2000/02/26"]
 uqs [label="Ulrich Spoerlein\nuqs@FreeBSD.org\n2010/01/28"]
+vangyzen [label="Eric van Gyzen\nvangyzen@FreeBSD.org\n2015/03/08"]
 vanhu [label="Yvan Vanhullebus\nvanhu@FreeBSD.org\n2008/07/21"]
 versus [label="Konrad Jankowski\nversus@FreeBSD.org\n2008/10/27"]
 weongyo [label="Weongyo Jeong\nweongyo@FreeBSD.org\n2007/12/21"]
@@ -548,6 +550,7 @@ ken -> slm
 kib -> ae
 kib -> dchagin
 kib -> gjb
+kib -> jah
 kib -> jlh
 kib -> jpaetzel
 kib -> lulf
@@ -560,6 +563,7 @@ kib -> rmh
 kib -> stas
 kib -> tijl
 kib -> trociny
+kib -> vangyzen
 kib -> zont
 
 kmacy -> lstewart
diff --git a/share/mk/bsd.mkopt.mk b/share/mk/bsd.mkopt.mk
index 9cfe1bf09d0..f0d9add7547 100644
--- a/share/mk/bsd.mkopt.mk
+++ b/share/mk/bsd.mkopt.mk
@@ -18,6 +18,10 @@
 # after all this processing, allowing this file to be included
 # multiple times with different lists.
 #
+# Other parts of the build system will set BROKEN_OPTIONS to a list
+# of options that are broken on this platform. This will not be unset
+# before returning. Clients are expected to always += this variable.
+#
 # Users should generally define WITH_FOO or WITHOUT_FOO, but the build
 # system should use MK_FOO={yes,no} when it needs to override the
 # user's desires or default behavior.
@@ -58,3 +62,11 @@ MK_${var}:=	no
 .endif # !defined(MK_${var})
 .endfor
 .undef __DEFAULT_NO_OPTIONS
+
+#
+# MK_* options which are always no, usually because they are
+# unsupported/badly broken on this architecture.
+#
+.for var in ${BROKEN_OPTIONS}
+MK_${var}:=	no
+.endfor
diff --git a/share/mk/bsd.obj.mk b/share/mk/bsd.obj.mk
index a0be223a344..a0cf1a2d02e 100644
--- a/share/mk/bsd.obj.mk
+++ b/share/mk/bsd.obj.mk
@@ -89,6 +89,16 @@ obj: .PHONY
 		fi; \
 		${ECHO} "${CANONICALOBJDIR} created for ${.CURDIR}"; \
 	fi
+.for dir in ${SRCS:H:O:u}
+	@if ! test -d ${CANONICALOBJDIR}/${dir}/; then \
+		mkdir -p ${CANONICALOBJDIR}/${dir}; \
+		if ! test -d ${CANONICALOBJDIR}/${dir}/; then \
+			${ECHO} "Unable to create ${CANONICALOBJDIR}/${dir}."; \
+			exit 1; \
+		fi; \
+		${ECHO} "${CANONICALOBJDIR}/${dir} created for ${.CURDIR}"; \
+	fi
+.endfor
 .endif
 
 .if !target(objlink)
diff --git a/share/mk/sys.mk b/share/mk/sys.mk
index 0fca5109b4b..05f5b194efc 100644
--- a/share/mk/sys.mk
+++ b/share/mk/sys.mk
@@ -242,21 +242,21 @@ YFLAGS		?=	-d
 	${CTFCONVERT_CMD}
 
 .c.o:
-	${CC} ${CFLAGS} -c ${.IMPSRC}
+	${CC} ${CFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
 .cc .cpp .cxx .C:
 	${CXX} ${CXXFLAGS} ${LDFLAGS} ${.IMPSRC} ${LDLIBS} -o ${.TARGET}
 
 .cc.o .cpp.o .cxx.o .C.o:
-	${CXX} ${CXXFLAGS} -c ${.IMPSRC}
+	${CXX} ${CXXFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 
 .m.o:
-	${OBJC} ${OBJCFLAGS} -c ${.IMPSRC}
+	${OBJC} ${OBJCFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
 .p.o:
-	${PC} ${PFLAGS} -c ${.IMPSRC}
+	${PC} ${PFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
 .e .r .F .f:
@@ -264,14 +264,15 @@ YFLAGS		?=	-d
 	    -o ${.TARGET}
 
 .e.o .r.o .F.o .f.o:
-	${FC} ${RFLAGS} ${EFLAGS} ${FFLAGS} -c ${.IMPSRC}
+	${FC} ${RFLAGS} ${EFLAGS} ${FFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 
 .S.o:
-	${CC} ${CFLAGS} ${ACFLAGS} -c ${.IMPSRC}
+	${CC} ${CFLAGS} ${ACFLAGS} -c ${.IMPSRC} -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
 .asm.o:
-	${CC} -x assembler-with-cpp ${CFLAGS} ${ACFLAGS} -c ${.IMPSRC}
+	${CC} -x assembler-with-cpp ${CFLAGS} ${ACFLAGS} -c ${.IMPSRC} \
+	    -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
 .s.o:
diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S
index d9f27243965..c3aac336a50 100644
--- a/sys/amd64/amd64/apic_vector.S
+++ b/sys/amd64/amd64/apic_vector.S
@@ -301,4 +301,35 @@ IDTVEC(rendezvous)
 	call	smp_rendezvous_action
 	call	as_lapic_eoi
 	jmp	doreti
+
+/*
+ * IPI handler whose purpose is to interrupt the CPU with minimum overhead.
+ * This is used by bhyve to force a host cpu executing in guest context to
+ * trap into the hypervisor.
+ *
+ * This handler is different from other IPI handlers in the following aspects:
+ *
+ * 1. It doesn't push a trapframe on the stack.
+ *
+ * This implies that a DDB backtrace involving 'justreturn' will skip the
+ * function that was interrupted by this handler.
+ *
+ * 2. It doesn't 'swapgs' when userspace is interrupted.
+ *
+ * The 'justreturn' handler does not access any pcpu data so it is not an
+ * issue. Moreover the 'justreturn' handler can only be interrupted by an NMI
+ * whose handler already doesn't trust GS.base when kernel code is interrupted.
+ */
+	.text
+	SUPERALIGN_TEXT
+IDTVEC(justreturn)
+	pushq	%rax
+	pushq	%rcx
+	pushq	%rdx
+	call	as_lapic_eoi
+	popq	%rdx
+	popq	%rcx
+	popq	%rax
+	jmp	doreti_iret
+
 #endif /* SMP */
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
index b836b0d730e..59e339c343c 100644
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -828,8 +828,8 @@ set_interrupt_apic_ids(void)
 			continue;
 
 		/* Don't let hyperthreads service interrupts. */
-		if (hyperthreading_cpus > 1 &&
-		    apic_id % hyperthreading_cpus != 0)
+		if (cpu_logical > 1 &&
+		    apic_id % cpu_logical != 0)
 			continue;
 
 		intr_add_cpu(i);
diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h
index 99bf1e45473..3a4b6b329c9 100644
--- a/sys/amd64/include/smp.h
+++ b/sys/amd64/include/smp.h
@@ -54,6 +54,7 @@ inthand_t
 	IDTVEC(ipi_intr_bitmap_handler), /* Bitmap based IPIs */ 
 	IDTVEC(cpustop),	/* CPU stops & waits to be restarted */
 	IDTVEC(cpususpend),	/* CPU suspends & waits to be resumed */
+	IDTVEC(justreturn),	/* interrupt CPU with minimum overhead */
 	IDTVEC(rendezvous);	/* handle CPU rendezvous */
 
 struct pmap;
diff --git a/sys/amd64/vmm/intel/ept.c b/sys/amd64/vmm/intel/ept.c
index 13c9788842e..54320cb36bd 100644
--- a/sys/amd64/vmm/intel/ept.c
+++ b/sys/amd64/vmm/intel/ept.c
@@ -43,7 +43,6 @@ __FBSDID("$FreeBSD$");
 #include <machine/vmm.h>
 
 #include "vmx_cpufunc.h"
-#include "vmm_ipi.h"
 #include "ept.h"
 
 #define	EPT_SUPPORTS_EXEC_ONLY(cap)	((cap) & (1UL << 0))
diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c
index b81e48b05f9..6dbf38aeb10 100644
--- a/sys/amd64/vmm/intel/vmx.c
+++ b/sys/amd64/vmm/intel/vmx.c
@@ -55,7 +55,6 @@ __FBSDID("$FreeBSD$");
 #include "vmm_lapic.h"
 #include "vmm_host.h"
 #include "vmm_ioport.h"
-#include "vmm_ipi.h"
 #include "vmm_ktr.h"
 #include "vmm_stat.h"
 #include "vatpic.h"
@@ -175,7 +174,7 @@ static int posted_interrupts;
 SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, posted_interrupts, CTLFLAG_RD,
     &posted_interrupts, 0, "APICv posted interrupt support");
 
-static int pirvec;
+static int pirvec = -1;
 SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, posted_interrupt_vector, CTLFLAG_RD,
     &pirvec, 0, "APICv posted interrupt vector");
 
@@ -485,8 +484,8 @@ static int
 vmx_cleanup(void)
 {
 	
-	if (pirvec != 0)
-		vmm_ipi_free(pirvec);
+	if (pirvec >= 0)
+		lapic_ipi_free(pirvec);
 
 	if (vpid_unr != NULL) {
 		delete_unrhdr(vpid_unr);
@@ -694,8 +693,8 @@ vmx_init(int ipinum)
 		    MSR_VMX_TRUE_PINBASED_CTLS, PINBASED_POSTED_INTERRUPT, 0,
 		    &tmp);
 		if (error == 0) {
-			pirvec = vmm_ipi_alloc();
-			if (pirvec == 0) {
+			pirvec = lapic_ipi_alloc(&IDTVEC(justreturn));
+			if (pirvec < 0) {
 				if (bootverbose) {
 					printf("vmx_init: unable to allocate "
 					    "posted interrupt vector\n");
diff --git a/sys/amd64/vmm/io/vatpic.c b/sys/amd64/vmm/io/vatpic.c
index 328c35f700b..0df6e7c6808 100644
--- a/sys/amd64/vmm/io/vatpic.c
+++ b/sys/amd64/vmm/io/vatpic.c
@@ -275,6 +275,7 @@ vatpic_icw1(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
 	atpic->ready = false;
 
 	atpic->icw_num = 1;
+	atpic->request = 0;
 	atpic->mask = 0;
 	atpic->lowprio = 7;
 	atpic->rd_cmd_reg = 0;
diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c
index b192735981b..70972487753 100644
--- a/sys/amd64/vmm/io/vlapic.c
+++ b/sys/amd64/vmm/io/vlapic.c
@@ -45,7 +45,6 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/vmm.h>
 
-#include "vmm_ipi.h"
 #include "vmm_lapic.h"
 #include "vmm_ktr.h"
 #include "vmm_stat.h"
diff --git a/sys/amd64/vmm/vmm.c b/sys/amd64/vmm/vmm.c
index 9e44549b32f..7e72b028a3e 100644
--- a/sys/amd64/vmm/vmm.c
+++ b/sys/amd64/vmm/vmm.c
@@ -76,7 +76,6 @@ __FBSDID("$FreeBSD$");
 #include "vlapic.h"
 #include "vpmtmr.h"
 #include "vrtc.h"
-#include "vmm_ipi.h"
 #include "vmm_stat.h"
 #include "vmm_lapic.h"
 
@@ -298,8 +297,8 @@ vmm_init(void)
 
 	vmm_host_state_init();
 
-	vmm_ipinum = vmm_ipi_alloc();
-	if (vmm_ipinum == 0)
+	vmm_ipinum = lapic_ipi_alloc(&IDTVEC(justreturn));
+	if (vmm_ipinum < 0)
 		vmm_ipinum = IPI_AST;
 
 	error = vmm_mem_init();
@@ -338,7 +337,7 @@ vmm_handler(module_t mod, int what, void *arg)
 			vmm_resume_p = NULL;
 			iommu_cleanup();
 			if (vmm_ipinum != IPI_AST)
-				vmm_ipi_free(vmm_ipinum);
+				lapic_ipi_free(vmm_ipinum);
 			error = VMM_CLEANUP();
 			/*
 			 * Something bad happened - prevent new
diff --git a/sys/amd64/vmm/vmm_ipi.c b/sys/amd64/vmm/vmm_ipi.c
deleted file mode 100644
index aefa3ba7790..00000000000
--- a/sys/amd64/vmm/vmm_ipi.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- * Copyright (c) 2011 NetApp, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/bus.h>
-
-#include <machine/intr_machdep.h>
-#include <x86/apicvar.h>
-#include <machine/segments.h>
-#include <machine/md_var.h>
-
-#include <machine/vmm.h>
-#include "vmm_ipi.h"
-
-extern inthand_t IDTVEC(rsvd), IDTVEC(justreturn);
-
-CTASSERT(APIC_SPURIOUS_INT == 255);
-
-int
-vmm_ipi_alloc(void)
-{
-	int idx;
-	uintptr_t func;
-	struct gate_descriptor *ip;
-
-	/*
-	 * Search backwards from the highest IDT vector available for use
-	 * as our IPI vector. We install the 'justreturn' handler at that
-	 * vector and use it to interrupt the vcpus.
-	 *
-	 * We do this because the IPI_AST is heavyweight and saves all
-	 * registers in the trapframe. This is overkill for our use case
-	 * which is simply to EOI the interrupt and return.
-	 */
-	idx = APIC_SPURIOUS_INT;
-	while (--idx >= APIC_IPI_INTS) {
-		ip = &idt[idx];
-		func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
-		if (func == (uintptr_t)&IDTVEC(rsvd)) {
-			setidt(idx , IDTVEC(justreturn), SDT_SYSIGT,
-			       SEL_KPL, 0);
-			return (idx);
-		}
-	}
-	return (0);
-}
-
-void
-vmm_ipi_free(int ipinum)
-{
-	uintptr_t func;
-	struct gate_descriptor *ip;
-
-	KASSERT(ipinum >= APIC_IPI_INTS && ipinum < APIC_SPURIOUS_INT,
-	    ("invalid ipi %d", ipinum));
-
-	ip = &idt[ipinum];
-	func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
-	KASSERT(func == (uintptr_t)&IDTVEC(justreturn),
-	    ("invalid ipi %d", ipinum));
-
-	setidt(ipinum, IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
-}
diff --git a/sys/amd64/vmm/vmm_lapic.c b/sys/amd64/vmm/vmm_lapic.c
index fa9832e09d1..15a995e9823 100644
--- a/sys/amd64/vmm/vmm_lapic.c
+++ b/sys/amd64/vmm/vmm_lapic.c
@@ -37,7 +37,6 @@ __FBSDID("$FreeBSD$");
 #include <x86/apicreg.h>
 
 #include <machine/vmm.h>
-#include "vmm_ipi.h"
 #include "vmm_ktr.h"
 #include "vmm_lapic.h"
 #include "vlapic.h"
diff --git a/sys/arm/arm/cpufunc_asm_armv7.S b/sys/arm/arm/cpufunc_asm_armv7.S
index dee9a9a87a7..25f052fd555 100644
--- a/sys/arm/arm/cpufunc_asm_armv7.S
+++ b/sys/arm/arm/cpufunc_asm_armv7.S
@@ -247,8 +247,8 @@ ENTRY(armv7_idcache_wbinv_range)
 	add	r0, r0, ip
 	subs	r1, r1, ip
 	bhi	.Larmv7_id_wbinv_next
-	isb				/* instruction synchronization barrier */
 	dsb				/* data synchronization barrier */
+	isb				/* instruction synchronization barrier */
 	RET
 END(armv7_idcache_wbinv_range)
 
@@ -258,8 +258,8 @@ ENTRY_NP(armv7_icache_sync_all)
 #else
 	mcr	CP15_ICIALLU
 #endif
-	isb				/* instruction synchronization barrier */
 	dsb				/* data synchronization barrier */
+	isb				/* instruction synchronization barrier */
 	RET
 END(armv7_icache_sync_all)
 
@@ -267,13 +267,13 @@ ENTRY_NP(armv7_icache_sync_range)
 	ldr	ip, .Larmv7_icache_line_size
 	ldr	ip, [ip]
 .Larmv7_sync_next:
-	mcr	CP15_ICIMVAU(r0)
 	mcr	CP15_DCCMVAC(r0)
+	mcr	CP15_ICIMVAU(r0)
 	add	r0, r0, ip
 	subs	r1, r1, ip
 	bhi	.Larmv7_sync_next
-	isb				/* instruction synchronization barrier */
 	dsb				/* data synchronization barrier */
+	isb				/* instruction synchronization barrier */
 	RET
 END(armv7_icache_sync_range)
 
diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c
index b0b8a88f022..46170033a0e 100644
--- a/sys/arm/arm/cpuinfo.c
+++ b/sys/arm/arm/cpuinfo.c
@@ -34,7 +34,14 @@ __FBSDID("$FreeBSD$");
 #include <machine/cpuinfo.h>
 #include <machine/cpu-v6.h>
 
-struct cpuinfo cpuinfo;
+struct cpuinfo cpuinfo =
+{
+	/* Use safe defaults for start */
+	.dcache_line_size = 32,
+	.dcache_line_mask = 31,
+	.icache_line_size = 32,
+	.icache_line_mask = 31,
+};
 
 /* Read and parse CPU id scheme */
 void
@@ -122,4 +129,10 @@ cpuinfo_init(void)
 	cpuinfo.generic_timer_ext = (cpuinfo.id_pfr1 >> 16) & 0xF;
 	cpuinfo.virtualization_ext = (cpuinfo.id_pfr1 >> 12) & 0xF;
 	cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF;
+
+	/* L1 Cache sizes */
+	cpuinfo.dcache_line_size = 1 << (CPU_CT_DMINLINE(cpuinfo.ctr ) + 2);
+	cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1;
+	cpuinfo.icache_line_size= 1 << (CPU_CT_IMINLINE(cpuinfo.ctr ) + 2);
+	cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1;
 }
diff --git a/sys/arm/arm/db_trace.c b/sys/arm/arm/db_trace.c
index bd2422d1cac..96684f64223 100644
--- a/sys/arm/arm/db_trace.c
+++ b/sys/arm/arm/db_trace.c
@@ -66,7 +66,7 @@ db_stack_trace_cmd(struct unwind_state *state)
 
 	finished = false;
 	while (!finished) {
-		finished = unwind_stack_one(state, 0);
+		finished = unwind_stack_one(state, 1);
 
 		/* Print the frame details */
 		sym = db_search_symbol(state->start_pc, DB_STGY_ANY, &offset);
diff --git a/sys/arm/arm/exception.S b/sys/arm/arm/exception.S
index 58ae6125577..6b856fcefe4 100644
--- a/sys/arm/arm/exception.S
+++ b/sys/arm/arm/exception.S
@@ -57,11 +57,6 @@ __FBSDID("$FreeBSD$");
 #ifdef KDTRACE_HOOKS
 	.bss
 	.align 4
-	.global	_C_LABEL(dtrace_invop_jump_addr)
-_C_LABEL(dtrace_invop_jump_addr):
-	.word 0
-	.word 0
-
 	.global	_C_LABEL(dtrace_invop_calltrap_addr)
 _C_LABEL(dtrace_invop_calltrap_addr):
 	.word 0
@@ -162,7 +157,8 @@ _C_LABEL(dtrace_invop_calltrap_addr):
 	msr	cpsr_c, r2;		/* Punch into SVC mode */	   \
 	mov	r2, sp;			/* Save	SVC sp */		   \
 	bic	sp, sp, #7;		/* Align sp to an 8-byte addrress */  \
-	sub	sp, sp, #4;		/* Pad trapframe to keep alignment */ \
+	sub	sp, sp, #(4 * 17);	/* Pad trapframe to keep alignment */ \
+				    /* and for dtrace to emulate push/pop */  \
 	str	r0, [sp, #-4]!;		/* Push return address */	   \
 	str	lr, [sp, #-4]!;		/* Push SVC lr */		   \
 	str	r2, [sp, #-4]!;		/* Push SVC sp */		   \
@@ -199,7 +195,8 @@ _C_LABEL(dtrace_invop_calltrap_addr):
 	msr	cpsr_c, r2;		/* Punch into SVC mode */	   \
 	mov	r2, sp;			/* Save	SVC sp */		   \
 	bic	sp, sp, #7;		/* Align sp to an 8-byte addrress */  \
-	sub	sp, sp, #4;		/* Pad trapframe to keep alignment */ \
+	sub	sp, sp, #(4 * 17);	/* Pad trapframe to keep alignment */ \
+				    /* and for dtrace to emulate push/pop */  \
 	str	r0, [sp, #-4]!;		/* Push return address */	   \
 	str	lr, [sp, #-4]!;		/* Push SVC lr */		   \
 	str	r2, [sp, #-4]!;		/* Push SVC sp */		   \
diff --git a/sys/arm/arm/genassym.c b/sys/arm/arm/genassym.c
index 7f949e6c70b..19c2ed3d3a2 100644
--- a/sys/arm/arm/genassym.c
+++ b/sys/arm/arm/genassym.c
@@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/cpu.h>
 #include <machine/proc.h>
 #include <machine/cpufunc.h>
+#include <machine/cpuinfo.h>
 #include <machine/pte.h>
 #include <machine/intr.h>
 #include <machine/sysarch.h>
@@ -146,3 +147,8 @@ ASSYM(MAXCOMLEN, MAXCOMLEN);
 ASSYM(MAXCPU, MAXCPU);
 ASSYM(NIRQ, NIRQ);
 ASSYM(PCPU_SIZE, sizeof(struct pcpu));
+
+ASSYM(DCACHE_LINE_SIZE, offsetof(struct cpuinfo, dcache_line_size));
+ASSYM(DCACHE_LINE_MASK, offsetof(struct cpuinfo, dcache_line_mask));
+ASSYM(ICACHE_LINE_SIZE, offsetof(struct cpuinfo, icache_line_size));
+ASSYM(ICACHE_LINE_MASK, offsetof(struct cpuinfo, icache_line_mask));
diff --git a/sys/arm/arm/physmem.c b/sys/arm/arm/physmem.c
index eae03f7ab5d..bc72ce264ad 100644
--- a/sys/arm/arm/physmem.c
+++ b/sys/arm/arm/physmem.c
@@ -153,7 +153,7 @@ arm_physmem_print_tables()
  * Walk the list of hardware regions, processing it against the list of
  * exclusions that contain the given exflags, and generating an "avail list".
  *
- * Updates the kernel global 'realmem' with the sum of all pages in hw regions.
+ * Updates the value at *pavail with the sum of all pages in all hw regions.
  *
  * Returns the number of pages of non-excluded memory added to the avail list.
  */
diff --git a/sys/arm/arm/undefined.c b/sys/arm/arm/undefined.c
index d82fdd3048a..098001873f7 100644
--- a/sys/arm/arm/undefined.c
+++ b/sys/arm/arm/undefined.c
@@ -86,6 +86,10 @@ __FBSDID("$FreeBSD$");
 #include <machine/db_machdep.h>
 #endif
 
+#ifdef KDTRACE_HOOKS
+int (*dtrace_invop_jump_addr)(struct trapframe *);
+#endif
+
 static int gdb_trapper(u_int, u_int, struct trapframe *, int);
 
 LIST_HEAD(, undefined_handler) undefined_handlers[MAX_COPROCS];
@@ -286,7 +290,14 @@ undefinedinstruction(struct trapframe *frame)
 			printf("No debugger in kernel.\n");
 #endif
 			return;
-		} else
+		}
+#ifdef KDTRACE_HOOKS
+		else if (dtrace_invop_jump_addr != 0) {
+			dtrace_invop_jump_addr(frame);
+			return;
+		}
+#endif
+		else
 			panic("Undefined instruction in kernel.\n");
 	}
 
diff --git a/sys/arm/at91/uart_bus_at91usart.c b/sys/arm/at91/uart_bus_at91usart.c
index 65829df0b56..28182faa892 100644
--- a/sys/arm/at91/uart_bus_at91usart.c
+++ b/sys/arm/at91/uart_bus_at91usart.c
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 
 #include "uart_if.h"
 
+extern struct uart_class at91_usart_class;
 static int usart_at91_probe(device_t dev);
 
 static device_method_t usart_at91_methods[] = {
diff --git a/sys/arm/at91/uart_cpu_at91usart.c b/sys/arm/at91/uart_cpu_at91usart.c
index 67a0a05c197..57c4a5aafe1 100644
--- a/sys/arm/at91/uart_cpu_at91usart.c
+++ b/sys/arm/at91/uart_cpu_at91usart.c
@@ -51,6 +51,7 @@ bus_space_tag_t uart_bus_space_io;
 bus_space_tag_t uart_bus_space_mem;
 
 extern struct bus_space at91_bs_tag;
+extern struct uart_class at91_usart_class;
 
 int
 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
diff --git a/sys/arm/at91/uart_dev_at91usart.c b/sys/arm/at91/uart_dev_at91usart.c
index 470c7aa986b..cac5e6a2abd 100644
--- a/sys/arm/at91/uart_dev_at91usart.c
+++ b/sys/arm/at91/uart_dev_at91usart.c
@@ -40,6 +40,9 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#ifdef FDT
+#include <dev/uart/uart_cpu_fdt.h>
+#endif
 #include <dev/uart/uart_bus.h>
 #include <arm/at91/at91_usartreg.h>
 #include <arm/at91/at91_pdcreg.h>
@@ -865,3 +868,12 @@ struct uart_class at91_usart_class = {
 	.uc_ops = &at91_usart_ops,
 	.uc_range = 8
 };
+
+#ifdef FDT
+static struct ofw_compat_data compat_data[] = {
+	{"atmel,at91rm9200-usart",(uintptr_t)&at91_usart_class},
+	{"atmel,at91sam9260-usart",(uintptr_t)&at91_usart_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+#endif
diff --git a/sys/arm/broadcom/bcm2835/bcm2835_fb.c b/sys/arm/broadcom/bcm2835/bcm2835_fb.c
index 88156ed084c..3270da1a1a4 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_fb.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_fb.c
@@ -240,7 +240,6 @@ bcm_fb_init(void *arg)
 	}
 	else {
 		device_printf(sc->dev, "Failed to set framebuffer info\n");
-		return;
 	}
 
 	config_intrhook_disestablish(&sc->init_hook);
diff --git a/sys/arm/broadcom/bcm2835/bcm2835_fbd.c b/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
index ed625bc0f8f..b3b0dd3686d 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
@@ -186,17 +186,12 @@ bcm_fb_init(void *arg)
 
 		fbd = device_add_child(sc->dev, "fbd",
 		    device_get_unit(sc->dev));
-		if (fbd == NULL) {
+		if (fbd == NULL)
 			device_printf(sc->dev, "Failed to add fbd child\n");
-			return;
-		}
-		if (device_probe_and_attach(fbd) != 0) {
+		else if (device_probe_and_attach(fbd) != 0)
 			device_printf(sc->dev, "Failed to attach fbd device\n");
-			return;
-		}
 	} else {
 		device_printf(sc->dev, "Failed to set framebuffer info\n");
-		return;
 	}
 
 	config_intrhook_disestablish(&sc->init_hook);
diff --git a/sys/arm/broadcom/bcm2835/bcm283x_dwc_fdt.c b/sys/arm/broadcom/bcm2835/bcm283x_dwc_fdt.c
new file mode 100644
index 00000000000..159820d5f85
--- /dev/null
+++ b/sys/arm/broadcom/bcm2835/bcm283x_dwc_fdt.c
@@ -0,0 +1,176 @@
+/*
+ * Copyright 2015 Andrew Turner.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/callout.h>
+#include <sys/condvar.h>
+#include <sys/module.h>
+
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+
+#include <dev/usb/controller/dwc_otg.h>
+#include <dev/usb/controller/dwc_otg_fdt.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+#include <machine/pmap.h>
+
+#include <arm/broadcom/bcm2835/bcm2835_mbox.h>
+#include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h>
+#include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
+
+#include "mbox_if.h"
+
+static device_probe_t bcm283x_dwc_otg_probe;
+static device_attach_t bcm283x_dwc_otg_attach;
+
+static int
+bcm283x_dwc_otg_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-usb"))
+		return (ENXIO);
+
+	device_set_desc(dev, "DWC OTG 2.0 integrated USB controller (bcm283x)");
+
+	return (BUS_PROBE_VENDOR);
+}
+
+static void
+bcm283x_dwc_otg_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
+{
+	bus_addr_t *addr;
+
+	if (err)
+		return;
+	addr = (bus_addr_t *)arg;
+	*addr = PHYS_TO_VCBUS(segs[0].ds_addr);
+}
+
+static int
+bcm283x_dwc_otg_attach(device_t dev)
+{
+	struct msg_set_power_state *msg;
+	bus_dma_tag_t msg_tag;
+	bus_dmamap_t msg_map;
+	bus_addr_t msg_phys;
+	void *msg_buf;
+	uint32_t reg;
+	device_t mbox;
+	int err;
+
+	/* get mbox device */
+	mbox = devclass_get_device(devclass_find("mbox"), 0);
+	if (mbox == NULL) {
+		device_printf(dev, "can't find mbox\n");
+		return (ENXIO);
+	}
+
+	err = bus_dma_tag_create(bus_get_dma_tag(dev), 16, 0,
+	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
+	    sizeof(struct msg_set_power_state), 1,
+	    sizeof(struct msg_set_power_state), 0,
+	    NULL, NULL, &msg_tag);
+	if (err != 0) {
+		device_printf(dev, "can't create DMA tag\n");
+		return (ENXIO);
+	}
+
+	err = bus_dmamem_alloc(msg_tag, (void **)&msg_buf, 0, &msg_map);
+	if (err != 0) {
+		bus_dma_tag_destroy(msg_tag);
+		device_printf(dev, "can't allocate dmamem\n");
+		return (ENXIO);
+	}
+
+	err = bus_dmamap_load(msg_tag, msg_map, msg_buf,
+	    sizeof(struct msg_set_power_state), bcm283x_dwc_otg_cb,
+	    &msg_phys, 0);
+	if (err != 0) {
+		bus_dmamem_free(msg_tag, msg_buf, msg_map);
+		bus_dma_tag_destroy(msg_tag);
+		device_printf(dev, "can't load DMA map\n");
+		return (ENXIO);
+	}
+
+	msg = msg_buf;
+
+	memset(msg, 0, sizeof(*msg));
+	msg->hdr.buf_size = sizeof(*msg);
+	msg->hdr.code = BCM2835_MBOX_CODE_REQ;
+	msg->tag_hdr.tag = BCM2835_MBOX_TAG_SET_POWER_STATE;
+	msg->tag_hdr.val_buf_size = sizeof(msg->body);
+	msg->tag_hdr.val_len = sizeof(msg->body.req);
+	msg->body.req.device_id = BCM2835_MBOX_POWER_ID_USB_HCD;
+	msg->body.req.state = BCM2835_MBOX_POWER_ON | BCM2835_MBOX_POWER_WAIT;
+	msg->end_tag = 0;
+
+	bus_dmamap_sync(msg_tag, msg_map,
+	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+
+	MBOX_WRITE(mbox, BCM2835_MBOX_CHAN_PROP, (uint32_t)msg_phys);
+	MBOX_READ(mbox, BCM2835_MBOX_CHAN_PROP, &reg);
+
+	bus_dmamap_unload(msg_tag, msg_map);
+	bus_dmamem_free(msg_tag, msg_buf, msg_map);
+	bus_dma_tag_destroy(msg_tag);
+
+	return (dwc_otg_attach(dev));
+}
+
+static device_method_t bcm283x_dwc_otg_methods[] = {
+	/* bus interface */
+	DEVMETHOD(device_probe, bcm283x_dwc_otg_probe),
+	DEVMETHOD(device_attach, bcm283x_dwc_otg_attach),
+
+	DEVMETHOD_END
+};
+
+static devclass_t bcm283x_dwc_otg_devclass;
+
+DEFINE_CLASS_1(bcm283x_dwcotg, bcm283x_dwc_otg_driver, bcm283x_dwc_otg_methods,
+    sizeof(struct dwc_otg_fdt_softc), dwc_otg_driver);
+DRIVER_MODULE(bcm283x_dwcotg, simplebus, bcm283x_dwc_otg_driver,
+    bcm283x_dwc_otg_devclass, 0, 0);
+MODULE_DEPEND(bcm283x_dwcotg, usb, 1, 1, 1);
diff --git a/sys/arm/broadcom/bcm2835/files.bcm2835 b/sys/arm/broadcom/bcm2835/files.bcm2835
index 89d6584fa32..dd0c66053dc 100644
--- a/sys/arm/broadcom/bcm2835/files.bcm2835
+++ b/sys/arm/broadcom/bcm2835/files.bcm2835
@@ -15,6 +15,8 @@ arm/broadcom/bcm2835/bcm2835_spi.c		optional bcm2835_spi
 arm/broadcom/bcm2835/bcm2835_systimer.c		standard
 arm/broadcom/bcm2835/bcm2835_wdog.c		standard
 
+arm/broadcom/bcm2835/bcm283x_dwc_fdt.c		optional dwcotg fdt
+
 arm/arm/bus_space_base.c			standard
 arm/arm/bus_space_generic.c                     standard
 arm/arm/bus_space_asm_generic.S                 standard
diff --git a/sys/arm/conf/ARMADAXP b/sys/arm/conf/ARMADAXP
index 32c610c061c..f611e09da88 100644
--- a/sys/arm/conf/ARMADAXP
+++ b/sys/arm/conf/ARMADAXP
@@ -22,7 +22,6 @@ ident		MV-88F78XX0
 include		"../mv/armadaxp/std.mv78x60"
 
 options 	SOC_MV_ARMADAXP
-makeoptions	MODULES_OVERRIDE=""
 
 makeoptions	WERROR="-Werror"
 
diff --git a/sys/arm/conf/BEAGLEBONE b/sys/arm/conf/BEAGLEBONE
index 975d6b24155..8234533b87e 100644
--- a/sys/arm/conf/BEAGLEBONE
+++ b/sys/arm/conf/BEAGLEBONE
@@ -25,13 +25,13 @@ ident		BEAGLEBONE
 
 include		"../ti/am335x/std.am335x"
 
-makeoptions	WITHOUT_MODULES="ahc"
+makeoptions	MODULES_EXTRA="dtb/am335x"
 
 # DTrace support
-options         KDTRACE_HOOKS                # Kernel DTrace hooks
-options                DDB_CTF                      # all architectures - kernel ELF linker loads CTF data
-makeoptions         WITH_CTF=1
-makeoptions     MODULES_OVERRIDE="opensolaris dtrace dtrace/lockstat dtrace/profile dtrace/fbt"
+options 	KDTRACE_HOOKS		# Kernel DTrace hooks
+options 	DDB_CTF			# all architectures - kernel ELF linker loads CTF data
+makeoptions	WITH_CTF=1
+makeoptions	MODULES_EXTRA+="opensolaris dtrace dtrace/lockstat dtrace/profile dtrace/fbt"
 
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler
@@ -165,5 +165,3 @@ device		usfs
 
 # Flattened Device Tree
 options 	FDT			# Configure using FDT/DTB data
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=beaglebone.dts
diff --git a/sys/arm/conf/CUBIEBOARD b/sys/arm/conf/CUBIEBOARD
index 2ca501584d4..f137b5ac06c 100644
--- a/sys/arm/conf/CUBIEBOARD
+++ b/sys/arm/conf/CUBIEBOARD
@@ -23,9 +23,6 @@ ident		CUBIEBOARD
 
 include		"../allwinner/std.a10"
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler
 options 	PREEMPTION		# Enable kernel thread preemption
diff --git a/sys/arm/conf/CUBIEBOARD2 b/sys/arm/conf/CUBIEBOARD2
index 2ccdb59dcfb..0aefc5fcad7 100644
--- a/sys/arm/conf/CUBIEBOARD2
+++ b/sys/arm/conf/CUBIEBOARD2
@@ -23,9 +23,6 @@ ident		CUBIEBOARD2
 
 include		"../allwinner/a20/std.a20"
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 options 	HZ=100
 options 	SCHED_ULE		# ULE scheduler
 options 	PREEMPTION		# Enable kernel thread preemption
diff --git a/sys/arm/conf/DB-78XXX b/sys/arm/conf/DB-78XXX
index 2cfd5da0611..4fee206e8ff 100644
--- a/sys/arm/conf/DB-78XXX
+++ b/sys/arm/conf/DB-78XXX
@@ -8,7 +8,6 @@ ident		DB-88F78XX
 include		"../mv/discovery/std.db78xxx"
 
 options 	SOC_MV_DISCOVERY
-makeoptions	MODULES_OVERRIDE=""
 
 #makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
 makeoptions	WERROR="-Werror"
diff --git a/sys/arm/conf/DB-88F5XXX b/sys/arm/conf/DB-88F5XXX
index c2b4b5889ea..6ccb360bd4d 100644
--- a/sys/arm/conf/DB-88F5XXX
+++ b/sys/arm/conf/DB-88F5XXX
@@ -8,7 +8,6 @@ ident		DB-88F5XXX
 include		"../mv/orion/std.db88f5xxx"
 
 options 	SOC_MV_ORION
-makeoptions	MODULES_OVERRIDE=""
 
 #makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
 makeoptions	WERROR="-Werror"
diff --git a/sys/arm/conf/DB-88F6XXX b/sys/arm/conf/DB-88F6XXX
index c39e4a1e369..c59f1c1130d 100644
--- a/sys/arm/conf/DB-88F6XXX
+++ b/sys/arm/conf/DB-88F6XXX
@@ -8,7 +8,6 @@ ident		DB-88F6XXX
 include		"../mv/kirkwood/std.db88f6xxx"
 
 options 	SOC_MV_KIRKWOOD
-makeoptions	MODULES_OVERRIDE=""
 
 #makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
 makeoptions	WERROR="-Werror"
diff --git a/sys/arm/conf/DOCKSTAR b/sys/arm/conf/DOCKSTAR
index ad1e74d6eaf..aea158ca891 100644
--- a/sys/arm/conf/DOCKSTAR
+++ b/sys/arm/conf/DOCKSTAR
@@ -17,6 +17,7 @@
 #
 # $FreeBSD$
 #
+#NO_UNIVERSE
 
 ident		DOCKSTAR
 
@@ -24,8 +25,6 @@ include		"../mv/kirkwood/std.db88f6xxx"
 
 makeoptions	FDT_DTS_FILE=dockstar.dts
 
-makeoptions	MODULES_OVERRIDE=""
-
 options 	SOC_MV_KIRKWOOD
 
 options 	SCHED_4BSD		# 4BSD scheduler
diff --git a/sys/arm/conf/DREAMPLUG-1001 b/sys/arm/conf/DREAMPLUG-1001
index 135cba0cd6f..0448d4f9564 100644
--- a/sys/arm/conf/DREAMPLUG-1001
+++ b/sys/arm/conf/DREAMPLUG-1001
@@ -20,6 +20,7 @@
 #
 # $FreeBSD$
 #
+#NO_UNIVERSE
 
 ident		DREAMPLUG-1001
 
@@ -27,8 +28,6 @@ include		"../mv/kirkwood/std.db88f6xxx"
 
 makeoptions	FDT_DTS_FILE=dreamplug-1001.dts
 
-makeoptions	MODULES_OVERRIDE=""
-
 options 	SOC_MV_KIRKWOOD
 
 options 	SCHED_4BSD		# 4BSD scheduler
diff --git a/sys/arm/conf/EXYNOS5.common b/sys/arm/conf/EXYNOS5.common
index d8fe5d6b68f..cd6e76fb2b3 100644
--- a/sys/arm/conf/EXYNOS5.common
+++ b/sys/arm/conf/EXYNOS5.common
@@ -18,9 +18,6 @@
 #
 # $FreeBSD$
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 makeoptions	WERROR="-Werror"
 
 options 	HZ=100
diff --git a/sys/arm/conf/PANDABOARD b/sys/arm/conf/PANDABOARD
index 551de735cb2..e0b5d149d31 100644
--- a/sys/arm/conf/PANDABOARD
+++ b/sys/arm/conf/PANDABOARD
@@ -29,9 +29,6 @@ hints		"PANDABOARD.hints"
 
 include 	"../ti/omap4/pandaboard/std.pandaboard"
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 options 	HZ=100
 options 	SCHED_ULE		# ULE scheduler
 options 	PREEMPTION		# Enable kernel thread preemption
diff --git a/sys/arm/conf/SHEEVAPLUG b/sys/arm/conf/SHEEVAPLUG
index 10a46daa653..9d8ea269892 100644
--- a/sys/arm/conf/SHEEVAPLUG
+++ b/sys/arm/conf/SHEEVAPLUG
@@ -3,12 +3,12 @@
 #
 # $FreeBSD$
 #
+#NO_UNIVERSE
 
 ident		SHEEVAPLUG
 include		"../mv/kirkwood/std.db88f6xxx"
 
 options 	SOC_MV_KIRKWOOD
-makeoptions	MODULES_OVERRIDE=""
 
 #makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
 makeoptions	WERROR="-Werror"
diff --git a/sys/arm/conf/TS7800 b/sys/arm/conf/TS7800
index 484bc554bd6..87a40d588f8 100644
--- a/sys/arm/conf/TS7800
+++ b/sys/arm/conf/TS7800
@@ -8,7 +8,6 @@ ident		TS7800
 include		"../mv/orion/std.ts7800"
 
 options 	SOC_MV_ORION
-makeoptions	MODULES_OVERRIDE=""
 
 #makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
 makeoptions	WERROR="-Werror"
diff --git a/sys/arm/conf/VYBRID b/sys/arm/conf/VYBRID
index 6ac541e5516..eda4815d76e 100644
--- a/sys/arm/conf/VYBRID
+++ b/sys/arm/conf/VYBRID
@@ -21,9 +21,6 @@
 ident		VYBRID
 include		"../freescale/vybrid/std.vybrid"
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 makeoptions	WERROR="-Werror"
 
 options 	HZ=100
diff --git a/sys/arm/conf/ZEDBOARD b/sys/arm/conf/ZEDBOARD
index 355999178ec..94148f4eb40 100644
--- a/sys/arm/conf/ZEDBOARD
+++ b/sys/arm/conf/ZEDBOARD
@@ -23,9 +23,6 @@ ident		ZEDBOARD
 
 include 	"../xilinx/zedboard/std.zedboard"
 
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	WITHOUT_MODULES="ahc"
-
 options 	SCHED_ULE		# ULE scheduler
 options 	PREEMPTION		# Enable kernel thread preemption
 options 	INET			# InterNETworking
diff --git a/sys/arm/freescale/vybrid/vf_uart.c b/sys/arm/freescale/vybrid/vf_uart.c
index d1814326eb3..da1187103f5 100644
--- a/sys/arm/freescale/vybrid/vf_uart.c
+++ b/sys/arm/freescale/vybrid/vf_uart.c
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 
 #include "uart_if.h"
@@ -270,7 +271,7 @@ static kobj_method_t vf_uart_methods[] = {
 	{ 0, 0 }
 };
 
-struct uart_class uart_vybrid_class = {
+static struct uart_class uart_vybrid_class = {
 	"vybrid",
 	vf_uart_methods,
 	sizeof(struct vf_uart_softc),
@@ -279,6 +280,12 @@ struct uart_class uart_vybrid_class = {
 	.uc_rclk = 24000000 /* TODO: get value from CCM */
 };
 
+static struct ofw_compat_data compat_data[] = {
+	{"fsl,mvf600-uart",	(uintptr_t)&uart_vybrid_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+
 static int
 vf_uart_bus_attach(struct uart_softc *sc)
 {
diff --git a/sys/arm/include/cpu-v6.h b/sys/arm/include/cpu-v6.h
index 1eafb62da7c..a7f0b53e9a7 100644
--- a/sys/arm/include/cpu-v6.h
+++ b/sys/arm/include/cpu-v6.h
@@ -37,6 +37,9 @@
 
 #define CPU_ASID_KERNEL 0
 
+vm_offset_t dcache_wb_pou_checked(vm_offset_t, vm_size_t);
+vm_offset_t icache_inv_pou_checked(vm_offset_t, vm_size_t);
+
 /*
  * Macros to generate CP15 (system control processor) read/write functions.
  */
@@ -302,7 +305,7 @@ icache_sync(vm_offset_t sva, vm_size_t size)
 	vm_offset_t eva = sva + size;
 
 	dsb();
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 #if __ARM_ARCH >= 7 && defined SMP
 		_CP15_DCCMVAU(va);
 #else
@@ -332,6 +335,19 @@ icache_inv_all(void)
 	isb();
 }
 
+/* Invalidate branch predictor buffer */
+static __inline void
+bpb_inv_all(void)
+{
+#if __ARM_ARCH >= 7 && defined SMP
+	_CP15_BPIALLIS();
+#else
+	_CP15_BPIALL();
+#endif
+	dsb();
+	isb();
+}
+
 /* Write back D-cache to PoU */
 static __inline void
 dcache_wb_pou(vm_offset_t sva, vm_size_t size)
@@ -340,7 +356,7 @@ dcache_wb_pou(vm_offset_t sva, vm_size_t size)
 	vm_offset_t eva = sva + size;
 
 	dsb();
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 #if __ARM_ARCH >= 7 && defined SMP
 		_CP15_DCCMVAU(va);
 #else
@@ -358,7 +374,7 @@ dcache_inv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size)
 	vm_offset_t eva = sva + size;
 
 	/* invalidate L1 first */
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 		_CP15_DCIMVAC(va);
 	}
 	dsb();
@@ -368,7 +384,7 @@ dcache_inv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size)
 	dsb();
 
 	/* then L1 again */
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 		_CP15_DCIMVAC(va);
 	}
 	dsb();
@@ -383,7 +399,7 @@ dcache_wb_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size)
 
 	dsb();
 
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 		_CP15_DCCMVAC(va);
 	}
 	dsb();
@@ -401,7 +417,7 @@ dcache_wbinv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size)
 	dsb();
 
 	/* write back L1 first */
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 		_CP15_DCCMVAC(va);
 	}
 	dsb();
@@ -410,7 +426,7 @@ dcache_wbinv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size)
 	cpu_l2cache_wbinv_range(pa, size);
 
 	/* then invalidate L1 */
-	for (va = sva; va < eva; va += arm_dcache_align) {
+	for (va = sva; va < eva; va += cpuinfo.dcache_line_size) {
 		_CP15_DCIMVAC(va);
 	}
 	dsb();
diff --git a/sys/arm/include/cpuinfo.h b/sys/arm/include/cpuinfo.h
index f347294e568..ce0d8e6594b 100644
--- a/sys/arm/include/cpuinfo.h
+++ b/sys/arm/include/cpuinfo.h
@@ -82,6 +82,12 @@ struct cpuinfo {
 	int generic_timer_ext;
 	int virtualization_ext;
 	int security_ext;
+
+	/* L1 cache info */
+	int dcache_line_size;
+	int dcache_line_mask;
+	int icache_line_size;
+	int icache_line_mask;
 };
 
 extern struct cpuinfo cpuinfo;
diff --git a/sys/arm/include/in_cksum.h b/sys/arm/include/in_cksum.h
index 0767a15ba36..60efb1e22ee 100644
--- a/sys/arm/include/in_cksum.h
+++ b/sys/arm/include/in_cksum.h
@@ -10,11 +10,7 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
+ * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
diff --git a/sys/arm/samsung/exynos/exynos_uart.c b/sys/arm/samsung/exynos/exynos_uart.c
index 0b3c7f735d0..9e33bcbc2e0 100644
--- a/sys/arm/samsung/exynos/exynos_uart.c
+++ b/sys/arm/samsung/exynos/exynos_uart.c
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 
 #include <arm/samsung/exynos/exynos_uart.h>
@@ -372,7 +373,7 @@ exynos4210_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
 	return (EINVAL);
 }
 
-struct uart_class uart_exynos4210_class = {
+static struct uart_class uart_exynos4210_class = {
 	"exynos4210 class",
 	exynos4210_methods,
 	1,
@@ -380,3 +381,9 @@ struct uart_class uart_exynos4210_class = {
 	.uc_range = 8,
 	.uc_rclk = 0,
 };
+
+static struct ofw_compat_data compat_data[] = {
+	{"exynos",		(uintptr_t)&uart_exynos4210_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
diff --git a/sys/arm/samsung/s3c2xx0/uart_bus_s3c2410.c b/sys/arm/samsung/s3c2xx0/uart_bus_s3c2410.c
index 2102d8b013c..882a5461385 100644
--- a/sys/arm/samsung/s3c2xx0/uart_bus_s3c2410.c
+++ b/sys/arm/samsung/s3c2xx0/uart_bus_s3c2410.c
@@ -19,6 +19,8 @@ __FBSDID("$FreeBSD$");
 
 #include "uart_if.h"
 
+extern struct uart_class uart_s3c2410_class;
+
 static int uart_s3c2410_probe(device_t dev);
 
 static device_method_t uart_s3c2410_methods[] = {
diff --git a/sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c b/sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c
index 1beb12d7731..4be4b395a73 100644
--- a/sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c
+++ b/sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c
@@ -39,11 +39,11 @@ __FBSDID("$FreeBSD$");
 
 #include <arm/samsung/s3c2xx0/s3c2xx0var.h>
 
+extern struct uart_class uart_s3c2410_class;
+
 bus_space_tag_t uart_bus_space_io;
 bus_space_tag_t uart_bus_space_mem;
 
-extern struct uart_ops uart_s3c2410_ops;
-
 vm_offset_t s3c2410_uart_vaddr;
 unsigned int s3c2410_pclk;
 
diff --git a/sys/arm/ti/aintc.c b/sys/arm/ti/aintc.c
index 675a5f35cd8..d54594c3c52 100644
--- a/sys/arm/ti/aintc.c
+++ b/sys/arm/ti/aintc.c
@@ -78,6 +78,14 @@ static struct ti_aintc_softc *ti_aintc_sc = NULL;
     bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val))
 
 
+static void
+aintc_post_filter(void *arg)
+{
+
+	arm_irq_memory_barrier(0);
+	aintc_write_4(ti_aintc_sc, INTC_CONTROL, 1); /* EOI */
+}
+
 static int
 ti_aintc_probe(device_t dev)
 {
@@ -124,6 +132,8 @@ ti_aintc_attach(device_t dev)
 	/*Set Priority Threshold */
 	aintc_write_4(sc, INTC_THRESHOLD, 0xFF);
 
+	arm_post_filter = aintc_post_filter;
+
 	return (0);
 }
 
@@ -149,12 +159,6 @@ arm_get_next_irq(int last_irq)
 	struct ti_aintc_softc *sc = ti_aintc_sc;
 	uint32_t active_irq;
 
-	if (last_irq != -1) {
-		aintc_write_4(sc, INTC_ISR_CLEAR(last_irq >> 5),
-			1UL << (last_irq & 0x1F));
-		aintc_write_4(sc, INTC_CONTROL, 1);
-	}
-
 	/* Get the next active interrupt */
 	active_irq = aintc_read_4(sc, INTC_SIR_IRQ);
 
@@ -178,6 +182,7 @@ arm_mask_irq(uintptr_t nb)
 	struct ti_aintc_softc *sc = ti_aintc_sc;
 
 	aintc_write_4(sc, INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F)));
+	aintc_write_4(sc, INTC_CONTROL, 1); /* EOI */
 }
 
 void
diff --git a/sys/arm/ti/am335x/am335x_dmtimer.c b/sys/arm/ti/am335x/am335x_dmtimer.c
index 240a7a77fa5..09acb3d3ed0 100644
--- a/sys/arm/ti/am335x/am335x_dmtimer.c
+++ b/sys/arm/ti/am335x/am335x_dmtimer.c
@@ -200,7 +200,7 @@ am335x_dmtimer_et_write_4(struct am335x_dmtimer_softc *sc, uint32_t reg,
  */
 #ifdef PPS_SYNC
 
-#define	PPS_CDEV_NAME	"pps"
+#define	PPS_CDEV_NAME	"dmtpps"
 
 static void
 am335x_dmtimer_set_capture_mode(struct am335x_dmtimer_softc *sc, bool force_off)
diff --git a/sys/arm/ti/omap4/omap4_prcm_clks.c b/sys/arm/ti/omap4/omap4_prcm_clks.c
index 589f15696e2..5a8a327ed12 100644
--- a/sys/arm/ti/omap4/omap4_prcm_clks.c
+++ b/sys/arm/ti/omap4/omap4_prcm_clks.c
@@ -1423,5 +1423,6 @@ static driver_t omap4_prcm_driver = {
 
 static devclass_t omap4_prcm_devclass;
 
-DRIVER_MODULE(omap4_prcm, simplebus, omap4_prcm_driver, omap4_prcm_devclass, 0, 0);
+EARLY_DRIVER_MODULE(omap4_prcm, simplebus, omap4_prcm_driver,
+    omap4_prcm_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_EARLY);
 MODULE_VERSION(omap4_prcm, 1);
diff --git a/sys/arm/xilinx/uart_dev_cdnc.c b/sys/arm/xilinx/uart_dev_cdnc.c
index 526c5465f19..96092ba18a2 100644
--- a/sys/arm/xilinx/uart_dev_cdnc.c
+++ b/sys/arm/xilinx/uart_dev_cdnc.c
@@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 
 #include "uart_if.h"
@@ -698,10 +699,16 @@ cdnc_uart_bus_ungrab(struct uart_softc *sc)
 	    CDNC_UART_INT_DMSI);
 }
 
-struct uart_class uart_cdnc_class = {
+static struct uart_class uart_cdnc_class = {
 	"cdnc_uart",
 	cdnc_uart_bus_methods,
 	sizeof(struct uart_softc),
 	.uc_ops = &cdnc_uart_ops,
 	.uc_range = 8
 };
+
+static struct ofw_compat_data compat_data[] = {
+	{"cadence,uart",	(uintptr_t)&uart_cdnc_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
diff --git a/sys/arm/xilinx/zy7_devcfg.c b/sys/arm/xilinx/zy7_devcfg.c
index a8df6c7d75d..385afd16a33 100644
--- a/sys/arm/xilinx/zy7_devcfg.c
+++ b/sys/arm/xilinx/zy7_devcfg.c
@@ -72,10 +72,23 @@ struct zy7_devcfg_softc {
 	bus_dmamap_t	dma_map;
 
 	int		is_open;
+
+	struct sysctl_ctx_list sysctl_tree;
+	struct sysctl_oid *sysctl_tree_top;
 };
 
 static struct zy7_devcfg_softc *zy7_devcfg_softc_p;
 
+#define	FCLK_NUM	4
+
+struct zy7_fclk_config {
+	int		source;
+	int		frequency;
+	int		actual_frequency;
+};
+
+static struct zy7_fclk_config fclk_configs[FCLK_NUM];
+
 #define DEVCFG_SC_LOCK(sc)		mtx_lock(&(sc)->sc_mtx)
 #define	DEVCFG_SC_UNLOCK(sc)		mtx_unlock(&(sc)->sc_mtx)
 #define DEVCFG_SC_LOCK_INIT(sc) \
@@ -103,13 +116,17 @@ static int zy7_ps_vers = 0;
 SYSCTL_INT(_hw, OID_AUTO, ps_vers, CTLFLAG_RD, &zy7_ps_vers, 0,
 	   "Zynq-7000 PS version");
 
+static int zy7_devcfg_fclk_sysctl_level_shifters(SYSCTL_HANDLER_ARGS);
+SYSCTL_PROC(_hw_fpga, OID_AUTO, level_shifters, 
+		    CTLFLAG_RW | CTLTYPE_INT, 
+		    NULL, 0, zy7_devcfg_fclk_sysctl_level_shifters,
+		    "I", "Enable/disable level shifters");
 
 /* cdev entry points. */
 static int zy7_devcfg_open(struct cdev *, int, int, struct thread *);
 static int zy7_devcfg_write(struct cdev *, struct uio *, int);
 static int zy7_devcfg_close(struct cdev *, int, int, struct thread *);
 
-
 struct cdevsw zy7_devcfg_cdevsw = {
 	.d_version =	D_VERSION,
 	.d_open =	zy7_devcfg_open,
@@ -230,6 +247,151 @@ struct cdevsw zy7_devcfg_cdevsw = {
 #define ZY7_DEVCFG_XADCIF_RD_FIFO	0x114
 #define ZY7_DEVCFG_XADCIF_MCTL		0x118
 
+static int
+zy7_devcfg_fclk_sysctl_source(SYSCTL_HANDLER_ARGS)
+{
+	char buf[4];
+	struct zy7_fclk_config *cfg;
+	int unit;
+	int error;
+
+	cfg = arg1;
+	unit = arg2;
+
+	switch (cfg->source) {
+		case ZY7_PL_FCLK_SRC_IO:
+		case ZY7_PL_FCLK_SRC_IO_ALT:
+			strncpy(buf, "IO", sizeof(buf));
+			break;
+		case ZY7_PL_FCLK_SRC_DDR:
+			strncpy(buf, "DDR", sizeof(buf));
+			break;
+		case ZY7_PL_FCLK_SRC_ARM:
+			strncpy(buf, "ARM", sizeof(buf));
+			break;
+		default:
+			strncpy(buf, "???", sizeof(buf));
+			break;
+	}
+
+	error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
+	if (error != 0 || req->newptr == NULL)
+		return (error);
+
+	if (strcasecmp(buf, "io") == 0)
+		cfg->source = ZY7_PL_FCLK_SRC_IO;
+	else if (strcasecmp(buf, "ddr") == 0)
+		cfg->source = ZY7_PL_FCLK_SRC_DDR;
+	else if (strcasecmp(buf, "arm") == 0)
+		cfg->source = ZY7_PL_FCLK_SRC_ARM;
+	else
+		return (EINVAL);
+
+	zy7_pl_fclk_set_source(unit, cfg->source);
+	if (cfg->frequency > 0)
+		cfg->actual_frequency = zy7_pl_fclk_get_freq(unit);
+
+	return (0);
+}
+
+static int
+zy7_devcfg_fclk_sysctl_freq(SYSCTL_HANDLER_ARGS)
+{
+	struct zy7_fclk_config *cfg;
+	int unit;
+	int error;
+	int freq;
+	int new_actual_freq;
+
+	cfg = arg1;
+	unit = arg2;
+
+	freq = cfg->frequency;
+
+	error = sysctl_handle_int(oidp, &freq, 0, req);
+	if (error != 0 || req->newptr == NULL)
+		return (error);
+
+	if (freq > 0) {
+		new_actual_freq = zy7_pl_fclk_set_freq(unit, freq);
+		if (new_actual_freq < 0)
+			return (EINVAL);
+		if (!zy7_pl_fclk_enabled(unit))
+			zy7_pl_fclk_enable(unit);
+	}
+	else {
+		zy7_pl_fclk_disable(unit);
+		new_actual_freq = 0;
+	}
+
+	cfg->frequency = freq;
+	cfg->actual_frequency = new_actual_freq;
+
+	return (0);
+}
+
+static int
+zy7_devcfg_fclk_sysctl_level_shifters(SYSCTL_HANDLER_ARGS)
+{
+	int error, enabled;
+
+	enabled = zy7_pl_level_shifters_enabled();
+
+	error = sysctl_handle_int(oidp, &enabled, 0, req);
+	if (error != 0 || req->newptr == NULL)
+		return (error);
+
+	if (enabled)
+		zy7_pl_level_shifters_enable();
+	else
+		zy7_pl_level_shifters_disable();
+
+	return (0);
+}
+
+static int
+zy7_devcfg_init_fclk_sysctl(struct zy7_devcfg_softc *sc)
+{
+	struct sysctl_oid *fclk_node;
+	char fclk_num[4];
+	int i;
+
+	sysctl_ctx_init(&sc->sysctl_tree);
+	sc->sysctl_tree_top = SYSCTL_ADD_NODE(&sc->sysctl_tree,
+	    SYSCTL_STATIC_CHILDREN(_hw_fpga), OID_AUTO, "fclk",
+	    CTLFLAG_RD, 0, "");
+	if (sc->sysctl_tree_top == NULL) {
+		sysctl_ctx_free(&sc->sysctl_tree);
+		return (-1);
+	}
+
+	for (i = 0; i < FCLK_NUM; i++) {
+		snprintf(fclk_num, sizeof(fclk_num), "%d", i);
+		fclk_node = SYSCTL_ADD_NODE(&sc->sysctl_tree,
+		    SYSCTL_CHILDREN(sc->sysctl_tree_top), OID_AUTO, fclk_num,
+		    CTLFLAG_RD, 0, "");
+
+		SYSCTL_ADD_INT(&sc->sysctl_tree,
+		    SYSCTL_CHILDREN(fclk_node), OID_AUTO,
+		    "actual_freq", CTLFLAG_RD, 
+		    &fclk_configs[i].actual_frequency, i,
+		    "Actual frequency");
+		SYSCTL_ADD_PROC(&sc->sysctl_tree,
+		    SYSCTL_CHILDREN(fclk_node), OID_AUTO,
+		    "freq", CTLFLAG_RW | CTLTYPE_INT, 
+		    &fclk_configs[i], i,
+		    zy7_devcfg_fclk_sysctl_freq,
+		    "I", "Configured frequency");
+		SYSCTL_ADD_PROC(&sc->sysctl_tree,
+		    SYSCTL_CHILDREN(fclk_node), OID_AUTO,
+		    "source", CTLFLAG_RW | CTLTYPE_STRING, 
+		    &fclk_configs[i], i, 
+		    zy7_devcfg_fclk_sysctl_source,
+		    "A", "Clock source");
+	}
+
+	return (0);
+}
 
 /* Enable programming the PL through PCAP. */
 static void
@@ -334,7 +496,6 @@ zy7_dma_cb2(void *arg, bus_dma_segment_t *seg, int nsegs, int error)
 		*(bus_addr_t *)arg = seg[0].ds_addr;
 }
 
-
 static int
 zy7_devcfg_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
 {
@@ -474,10 +635,11 @@ zy7_devcfg_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
 	bus_dma_tag_destroy(sc->dma_tag);
 	DEVCFG_SC_UNLOCK(sc);
 
+	zy7_slcr_postload_pl(zy7_en_level_shifters);
+
 	return (0);
 }
 
-
 static void
 zy7_devcfg_intr(void *arg)
 {
@@ -549,6 +711,7 @@ static int
 zy7_devcfg_attach(device_t dev)
 {
 	struct zy7_devcfg_softc *sc = device_get_softc(dev);
+	int i;
 	int rid, err;
 
 	/* Allow only one attach. */
@@ -612,6 +775,17 @@ zy7_devcfg_attach(device_t dev)
 		       ZY7_DEVCFG_MCTRL_PS_VERS_MASK) >>
 		ZY7_DEVCFG_MCTRL_PS_VERS_SHIFT;
 
+	for (i = 0; i < FCLK_NUM; i++) {
+		fclk_configs[i].source = zy7_pl_fclk_get_source(i);
+		fclk_configs[i].actual_frequency = 
+			zy7_pl_fclk_enabled(i) ? zy7_pl_fclk_get_freq(i) : 0;
+		/* Initially assume actual frequency is the configure one */
+		fclk_configs[i].frequency = fclk_configs[i].actual_frequency;
+	}
+
+	if (zy7_devcfg_init_fclk_sysctl(sc) < 0)
+		device_printf(dev, "failed to initialized sysctl tree\n");
+
 	return (0);
 }
 
@@ -620,6 +794,11 @@ zy7_devcfg_detach(device_t dev)
 {
 	struct zy7_devcfg_softc *sc = device_get_softc(dev);
 
+	if (sc->sysctl_tree_top != NULL) {
+		sysctl_ctx_free(&sc->sysctl_tree);
+		sc->sysctl_tree_top = NULL;
+	}
+
 	if (device_is_attached(dev))
 		bus_generic_detach(dev);
 
diff --git a/sys/arm/xilinx/zy7_slcr.c b/sys/arm/xilinx/zy7_slcr.c
index 5dc15d1b1d6..e243ff6f5de 100644
--- a/sys/arm/xilinx/zy7_slcr.c
+++ b/sys/arm/xilinx/zy7_slcr.c
@@ -79,7 +79,6 @@ extern void (*zynq7_cpu_reset);
 
 #define ZYNQ_DEFAULT_PS_CLK_FREQUENCY	33333333	/* 33.3 Mhz */
 
-
 SYSCTL_NODE(_hw, OID_AUTO, zynq, CTLFLAG_RD, 0, "Xilinx Zynq-7000");
 
 static char zynq_bootmode[64];
@@ -126,7 +125,6 @@ zy7_slcr_lock(struct zy7_slcr_softc *sc)
 	WR4(sc, ZY7_SLCR_LOCK, ZY7_SLCR_LOCK_MAGIC);
 }
 
-
 static void
 zy7_slcr_cpu_reset(void)
 {
@@ -255,6 +253,296 @@ cgem_set_ref_clk(int unit, int frequency)
 	return (0);
 }
 
+/* 
+ * PL clocks management function
+ */
+int 
+zy7_pl_fclk_set_source(int unit, int source)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+	uint32_t reg;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+
+	/* Unlock SLCR registers. */
+	zy7_slcr_unlock(sc);
+
+	/* Modify FPGAx source. */
+	reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
+	reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK);
+	reg |= (source << ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT);
+	WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
+
+	/* Lock SLCR registers. */
+	zy7_slcr_lock(sc);
+
+	ZSLCR_UNLOCK(sc);
+
+	return (0);
+}
+
+int 
+zy7_pl_fclk_get_source(int unit)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+	uint32_t reg;
+	int source;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+
+	/* Modify GEM reference clock. */
+	reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
+	source = (reg & ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK) >> 
+	    ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT;
+
+	/* ZY7_PL_FCLK_SRC_IO is actually b0x */
+	if ((source & 2) == 0)
+		source = ZY7_PL_FCLK_SRC_IO;
+
+	ZSLCR_UNLOCK(sc);
+
+	return (source);
+}
+
+int
+zy7_pl_fclk_set_freq(int unit, int frequency)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+	int div0, div1;
+	int base_frequency;
+	uint32_t reg;
+	int source;
+
+	if (!sc)
+		return (-1);
+
+	source = zy7_pl_fclk_get_source(unit);
+	switch (source) {
+		case ZY7_PL_FCLK_SRC_IO:
+			base_frequency = io_pll_frequency;
+			break;
+
+		case ZY7_PL_FCLK_SRC_ARM:
+			base_frequency = arm_pll_frequency;
+			break;
+
+		case ZY7_PL_FCLK_SRC_DDR:
+			base_frequency = ddr_pll_frequency;
+			break;
+
+		default:
+			return (-1);
+	}
+
+	/* Find suitable divisor pairs.  Round result to nearest khz
+	 * to test for match.
+	 */
+	for (div1 = 1; div1 <= ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX; div1++) {
+		div0 = (base_frequency + div1 * frequency / 2) /
+			div1 / frequency;
+		if (div0 > 0 && div0 <= ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX &&
+		    ((base_frequency / div0 / div1) + 500) / 1000 ==
+		    (frequency + 500) / 1000)
+			break;
+	}
+
+	if (div1 > ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+
+	/* Unlock SLCR registers. */
+	zy7_slcr_unlock(sc);
+
+	/* Modify FPGAx reference clock. */
+	reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
+	reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK |
+	    ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK);
+	reg |= (div1 << ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT) |
+	    (div0 << ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT);
+	WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
+
+	/* Lock SLCR registers. */
+	zy7_slcr_lock(sc);
+
+	ZSLCR_UNLOCK(sc);
+
+	return (base_frequency / div0 / div1);
+}
+
+int
+zy7_pl_fclk_get_freq(int unit)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+	int div0, div1;
+	int base_frequency;
+	int frequency;
+	uint32_t reg;
+	int source;
+
+	if (!sc)
+		return (-1);
+
+	source = zy7_pl_fclk_get_source(unit);
+	switch (source) {
+		case ZY7_PL_FCLK_SRC_IO:
+			base_frequency = io_pll_frequency;
+			break;
+
+		case ZY7_PL_FCLK_SRC_ARM:
+			base_frequency = arm_pll_frequency;
+			break;
+
+		case ZY7_PL_FCLK_SRC_DDR:
+			base_frequency = ddr_pll_frequency;
+			break;
+
+		default:
+			return (-1);
+	}
+
+	ZSLCR_LOCK(sc);
+
+	/* Modify FPGAx reference clock. */
+	reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
+	div1 = (reg & ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK) >>
+	    ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT;
+	div0 = (reg & ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK) >>
+	    ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT;
+
+	ZSLCR_UNLOCK(sc);
+
+	if (div0 == 0)
+		div0 = 1;
+
+	if (div1 == 0)
+		div1 = 1;
+
+	frequency = (base_frequency / div0 / div1);
+	/* Round to KHz */
+	frequency = (frequency + 500) / 1000;
+	frequency = frequency * 1000;
+
+	return (frequency);
+}
+
+int 
+zy7_pl_fclk_enable(int unit)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+
+	/* Unlock SLCR registers. */
+	zy7_slcr_unlock(sc);
+
+	WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
+	WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 0);
+
+	/* Lock SLCR registers. */
+	zy7_slcr_lock(sc);
+
+	ZSLCR_UNLOCK(sc);
+
+	return (0);
+}
+
+int 
+zy7_pl_fclk_disable(int unit)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+
+	/* Unlock SLCR registers. */
+	zy7_slcr_unlock(sc);
+
+	WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
+	WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 1);
+
+	/* Lock SLCR registers. */
+	zy7_slcr_lock(sc);
+
+	ZSLCR_UNLOCK(sc);
+
+	return (0);
+}
+
+int 
+zy7_pl_fclk_enabled(int unit)
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+	uint32_t reg;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+	reg = RD4(sc, ZY7_SLCR_FPGA_THR_CNT(unit));
+	ZSLCR_UNLOCK(sc);
+
+	return !(reg & 1);
+}
+
+int
+zy7_pl_level_shifters_enabled()
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+
+	uint32_t reg;
+
+	if (!sc)
+		return (-1);
+
+	ZSLCR_LOCK(sc);
+	reg = RD4(sc, ZY7_SLCR_LVL_SHFTR_EN);
+	ZSLCR_UNLOCK(sc);
+
+	return (reg == ZY7_SLCR_LVL_SHFTR_EN_ALL);
+}
+
+void
+zy7_pl_level_shifters_enable()
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+
+	if (!sc)
+		return;
+
+	ZSLCR_LOCK(sc);
+	zy7_slcr_unlock(sc);
+	WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, ZY7_SLCR_LVL_SHFTR_EN_ALL);
+	zy7_slcr_lock(sc);
+	ZSLCR_UNLOCK(sc);
+}
+
+void
+zy7_pl_level_shifters_disable()
+{
+	struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
+
+	if (!sc)
+		return;
+
+	ZSLCR_LOCK(sc);
+	zy7_slcr_unlock(sc);
+	WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, 0);
+	zy7_slcr_lock(sc);
+	ZSLCR_UNLOCK(sc);
+}
+
 static int
 zy7_slcr_probe(device_t dev)
 {
diff --git a/sys/arm/xilinx/zy7_slcr.h b/sys/arm/xilinx/zy7_slcr.h
index 70c46619312..3afec02a8b3 100644
--- a/sys/arm/xilinx/zy7_slcr.h
+++ b/sys/arm/xilinx/zy7_slcr.h
@@ -37,7 +37,6 @@
  * are in appendix B.28.
  */
 
-
 #ifndef _ZY7_SLCR_H_
 #define _ZY7_SLCR_H_
 
@@ -148,10 +147,19 @@
 #define ZY7_SLCR_DBG_CLK_CTRL		0x0164
 #define ZY7_SLCR_PCAP_CLK_CTRL		0x0168
 #define ZY7_SLCR_TOPSW_CLK_CTRL		0x016c	/* central intercnn clk ctrl */
-#define ZY7_SLCR_FPGA0_CLK_CTRL		0x0170
-#define ZY7_SLCR_FPGA1_CLK_CTRL		0x0180
-#define ZY7_SLCR_FPGA2_CLK_CTRL		0x0190
-#define ZY7_SLCR_FPGA3_CLK_CTRL		0x01a0
+#define ZY7_SLCR_FPGA_CLK_CTRL(unit)	(0x0170 + 0x10*(unit))
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT	20
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK	(0x3f << 20)
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT	8
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK	(0x3f << 8)
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX	0x3f
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT	4
+#define	  ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK	(3 << 4)
+#define ZY7_SLCR_FPGA_THR_CTRL(unit)	(0x0174 + 0x10*(unit))
+#define ZY7_SLCR_FPGA_THR_CTRL_CNT_RST		(1 << 1)
+#define ZY7_SLCR_FPGA_THR_CTRL_CPU_START	(1 << 0)
+#define ZY7_SLCR_FPGA_THR_CNT(unit)	(0x0178 + 0x10*(unit))
+#define ZY7_SLCR_FPGA_THR_STA(unit)	(0x017c + 0x10*(unit))
 #define ZY7_SLCR_CLK_621_TRUE		0x01c4	/* cpu clock ratio mode */
 
 /* Reset controls. */
@@ -288,5 +296,23 @@
 extern void zy7_slcr_preload_pl(void);
 extern void zy7_slcr_postload_pl(int en_level_shifters);
 extern int cgem_set_ref_clk(int unit, int frequency);
+
+/* Should be consistent with SRCSEL field of FPGAx_CLK_CTRL */
+#define	ZY7_PL_FCLK_SRC_IO	0 
+#define	ZY7_PL_FCLK_SRC_IO_ALT	1 /* ZY7_PL_FCLK_SRC_IO is b0x */
+#define	ZY7_PL_FCLK_SRC_ARM	2
+#define	ZY7_PL_FCLK_SRC_DDR	3
+
+int zy7_pl_fclk_set_source(int unit, int source);
+int zy7_pl_fclk_get_source(int unit);
+int zy7_pl_fclk_set_freq(int unit, int freq);
+int zy7_pl_fclk_get_freq(int unit);
+int zy7_pl_fclk_enable(int unit);
+int zy7_pl_fclk_disable(int unit);
+int zy7_pl_fclk_enabled(int unit);
+int zy7_pl_level_shifters_enabled(void);
+void zy7_pl_level_shifters_enable(void);
+void zy7_pl_level_shifters_disable(void);
+
 #endif
 #endif /* _ZY7_SLCR_H_ */
diff --git a/sys/boot/amd64/Makefile.inc b/sys/boot/amd64/Makefile.inc
index ee96a42abd8..7b10385928b 100644
--- a/sys/boot/amd64/Makefile.inc
+++ b/sys/boot/amd64/Makefile.inc
@@ -5,7 +5,7 @@
 BINDIR?=	/boot
 
 # See conf/kern.mk for the correct set of these
-CFLAGS+=	-ffreestanding
+CFLAGS+=	-ffreestanding -mno-red-zone
 CFLAGS+=	-mno-mmx -mno-sse -mno-aes -mno-avx -msoft-float
 LDFLAGS+=	-nostdlib
 
diff --git a/sys/boot/amd64/boot1.efi/boot1.c b/sys/boot/amd64/boot1.efi/boot1.c
index cb75d2a12f4..e5719fff10f 100644
--- a/sys/boot/amd64/boot1.efi/boot1.c
+++ b/sys/boot/amd64/boot1.efi/boot1.c
@@ -307,12 +307,19 @@ load(const char *fname)
 	/* XXX: For secure boot, we need our own loader here */
 	status = systab->BootServices->LoadImage(TRUE, image, bootdevpath,
 	    buffer, bufsize, &loaderhandle);
+	if (EFI_ERROR(status))
+		printf("LoadImage failed with error %d\n", status);
 
 	status = systab->BootServices->HandleProtocol(loaderhandle,
 	    &LoadedImageGUID, (VOID**)&loaded_image);
+	if (EFI_ERROR(status))
+		printf("HandleProtocol failed with error %d\n", status);
+
 	loaded_image->DeviceHandle = bootdevhandle;
 
 	status = systab->BootServices->StartImage(loaderhandle, NULL, NULL);
+	if (EFI_ERROR(status))
+		printf("StartImage failed with error %d\n", status);
 }
 
 static void
diff --git a/sys/boot/amd64/efi/Makefile b/sys/boot/amd64/efi/Makefile
index 3f853a50fd1..791509c948f 100644
--- a/sys/boot/amd64/efi/Makefile
+++ b/sys/boot/amd64/efi/Makefile
@@ -44,6 +44,10 @@ LIBFICL=	${.OBJDIR}/../../ficl/libficl.a
 # Include bcache code.
 HAVE_BCACHE=    yes
 
+.if defined(EFI_STAGING_SIZE)
+CFLAGS+=	-DEFI_STAGING_SIZE=${EFI_STAGING_SIZE}
+.endif
+
 # Always add MI sources 
 .PATH:		${.CURDIR}/../../common
 .include	"${.CURDIR}/../../common/Makefile.inc"
@@ -55,8 +59,6 @@ FILESMODE_loader.efi=	${BINMODE}
 LDSCRIPT=	${.CURDIR}/ldscript.${MACHINE_CPUARCH}
 LDFLAGS=	-Wl,-T${LDSCRIPT} -Wl,-Bsymbolic -shared -Wl,-znocombreloc
 
-${PROG}:	${LDSCRIPT}
-
 CLEANFILES=	vers.c loader.efi
 
 NEWVERSWHAT=	"EFI loader" ${MACHINE_CPUARCH}
@@ -84,9 +86,8 @@ loader.efi: loader.sym
 		--output-target=${EFI_TARGET} ${.ALLSRC} ${.TARGET}
 
 LIBEFI=		${.OBJDIR}/../../efi/libefi/libefi.a
-LIBSTAND=       ${.OBJDIR}/../../userboot/libstand/libstand.a
 
-DPADD=		${LIBFICL} ${LIBEFI} ${LIBSTAND}
+DPADD=		${LIBFICL} ${LIBEFI} ${LIBSTAND} ${LDSCRIPT}
 LDADD=		${LIBFICL} ${LIBEFI} ${LIBSTAND}
 
 .endif # ${COMPILER_TYPE} != "gcc"
diff --git a/sys/boot/amd64/efi/conf.c b/sys/boot/amd64/efi/conf.c
index f9984a32521..97dd352e302 100644
--- a/sys/boot/amd64/efi/conf.c
+++ b/sys/boot/amd64/efi/conf.c
@@ -44,6 +44,7 @@ struct fs_ops *file_system[] = {
 	&cd9660_fsops,
 	&nfs_fsops,
 	&gzipfs_fsops,
+	&bzipfs_fsops,
 	NULL
 };
 
diff --git a/sys/boot/amd64/efi/copy.c b/sys/boot/amd64/efi/copy.c
index c6cc3490817..c3cb4752723 100644
--- a/sys/boot/amd64/efi/copy.c
+++ b/sys/boot/amd64/efi/copy.c
@@ -37,9 +37,13 @@ __FBSDID("$FreeBSD$");
 #include <efi.h>
 #include <efilib.h>
 
-#define	STAGE_PAGES	8192	/* 32MB */
+#ifndef EFI_STAGING_SIZE
+#define	EFI_STAGING_SIZE	32
+#endif
 
-EFI_PHYSICAL_ADDRESS	staging;
+#define	STAGE_PAGES	((EFI_STAGING_SIZE) * 1024 * 1024 / 4096)
+
+EFI_PHYSICAL_ADDRESS	staging, staging_end;
 int			stage_offset_set = 0;
 ssize_t			stage_offset;
 
@@ -55,6 +59,7 @@ x86_efi_copy_init(void)
 		    (unsigned long)(status & EFI_ERROR_MASK));
 		return (status);
 	}
+	staging_end = staging + STAGE_PAGES * 4096;
 
 	return (0);
 }
@@ -68,6 +73,11 @@ x86_efi_copyin(const void *src, vm_offset_t dest, const size_t len)
 		stage_offset_set = 1;
 	}
 
+	/* XXX: Callers do not check for failure. */
+	if (dest + stage_offset + len > staging_end) {
+		errno = ENOMEM;
+		return (-1);
+	}
 	bcopy(src, (void *)(dest + stage_offset), len);
 	return (len);
 }
@@ -76,6 +86,11 @@ ssize_t
 x86_efi_copyout(const vm_offset_t src, void *dest, const size_t len)
 {
 
+	/* XXX: Callers do not check for failure. */
+	if (src + stage_offset + len > staging_end) {
+		errno = ENOMEM;
+		return (-1);
+	}
 	bcopy((void *)(src + stage_offset), dest, len);
 	return (len);
 }
@@ -85,6 +100,10 @@ ssize_t
 x86_efi_readin(const int fd, vm_offset_t dest, const size_t len)
 {
 
+	if (dest + stage_offset + len > staging_end) {
+		errno = ENOMEM;
+		return (-1);
+	}
 	return (read(fd, (void *)(dest + stage_offset), len));
 }
 
diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile
index 3edeb22ea5a..bd753cff350 100644
--- a/sys/boot/efi/libefi/Makefile
+++ b/sys/boot/efi/libefi/Makefile
@@ -9,7 +9,7 @@ SRCS=	delay.c efi_console.c efinet.c efipart.c errno.c handles.c \
 SRCS+= nullconsole.c comconsole.c
 
 .if ${MACHINE_ARCH} == "amd64"
-CFLAGS+= -fPIC
+CFLAGS+= -fPIC -mno-red-zone
 .endif
 CFLAGS+= -I${.CURDIR}/../include
 CFLAGS+= -I${.CURDIR}/../include/${MACHINE_CPUARCH}
diff --git a/sys/boot/efi/libefi/libefi.c b/sys/boot/efi/libefi/libefi.c
index c6c01d39dc6..3c66b04f76e 100644
--- a/sys/boot/efi/libefi/libefi.c
+++ b/sys/boot/efi/libefi/libefi.c
@@ -102,7 +102,7 @@ efi_main(EFI_HANDLE image_handle, EFI_SYSTEM_TABLE *system_table)
 		(void)console_control->SetMode(console_control,
 		    EfiConsoleControlScreenText);
 
-	heapsize = 2 * 1024 * 1024;
+	heapsize = 3 * 1024 * 1024;
 	status = BS->AllocatePages(AllocateAnyPages, EfiLoaderData,
 	    EFI_SIZE_TO_PAGES(heapsize), &heap);
 	if (status != EFI_SUCCESS)
diff --git a/sys/boot/ficl/Makefile b/sys/boot/ficl/Makefile
index 833cf99d851..15baae3f490 100644
--- a/sys/boot/ficl/Makefile
+++ b/sys/boot/ficl/Makefile
@@ -21,6 +21,9 @@ CFLAGS+=	-ffreestanding
 CFLAGS+=	-march=i386
 CFLAGS.gcc+=	-mpreferred-stack-boundary=2
 .endif
+.if ${MACHINE_CPUARCH} == "amd64"
+CFLAGS+=	-mno-red-zone
+.endif
 .if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
 CFLAGS+=	-mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 -msoft-float
 .endif
diff --git a/sys/boot/libstand32/Makefile b/sys/boot/libstand32/Makefile
index 7e25fa69a71..a08a8e93873 100644
--- a/sys/boot/libstand32/Makefile
+++ b/sys/boot/libstand32/Makefile
@@ -83,7 +83,6 @@ SRCS+=	aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S
 .if ${MACHINE_CPUARCH} == "powerpc"
 .PATH: ${LIBC}/quad
 SRCS+=	ashldi3.c ashrdi3.c
-.PATH: ${LIBC}/powerpc/gen
 SRCS+=	syncicache.c
 .endif
 
@@ -94,8 +93,6 @@ SRCS+= uuid_equal.c uuid_is_nil.c
 # _setjmp/_longjmp
 .if ${MACHINE_CPUARCH} == "amd64"
 .PATH: ${S}/i386
-.elif ${MACHINE_ARCH} == "powerpc64"
-.PATH: ${S}/powerpc
 .else
 .PATH: ${S}/${MACHINE_CPUARCH}
 .endif
diff --git a/sys/boot/ofw/common/main.c b/sys/boot/ofw/common/main.c
index eb8ae0c08c8..0913f0c9c2c 100644
--- a/sys/boot/ofw/common/main.c
+++ b/sys/boot/ofw/common/main.c
@@ -45,7 +45,7 @@ u_int32_t	acells, scells;
 
 static char bootargs[128];
 
-#define	HEAP_SIZE	0x80000
+#define	HEAP_SIZE	0x100000
 
 #define OF_puts(fd, text) OF_write(fd, text, strlen(text))
 
diff --git a/sys/boot/ofw/libofw/elf_freebsd.c b/sys/boot/ofw/libofw/elf_freebsd.c
index 50fd8a66c58..80ece7eeba4 100644
--- a/sys/boot/ofw/libofw/elf_freebsd.c
+++ b/sys/boot/ofw/libofw/elf_freebsd.c
@@ -67,7 +67,7 @@ int
 __elfN(ofw_exec)(struct preloaded_file *fp)
 {
 	struct file_metadata	*fmp;
-	vm_offset_t		mdp;
+	vm_offset_t		mdp, dtbp;
 	Elf_Ehdr		*e;
 	int			error;
 	intptr_t		entry;
@@ -78,15 +78,21 @@ __elfN(ofw_exec)(struct preloaded_file *fp)
 	e = (Elf_Ehdr *)&fmp->md_data;
 	entry = e->e_entry;
 
-	if ((error = md_load(fp->f_args, &mdp)) != 0)
+	if ((error = md_load(fp->f_args, &mdp, &dtbp)) != 0)
 		return (error);
 
 	printf("Kernel entry at 0x%lx ...\n", e->e_entry);
 
 	dev_cleanup();
 	ofw_release_heap();
-	OF_chain((void *)reloc, end - (char *)reloc, (void *)entry,
-	    (void *)mdp, sizeof(mdp));
+	if (dtbp != 0) {
+		OF_quiesce();
+		((int (*)(u_long, u_long, u_long, void *, u_long))entry)(dtbp, 0, 0,
+		    mdp, sizeof(mdp));
+	} else {
+		OF_chain((void *)reloc, end - (char *)reloc, (void *)entry,
+		    (void *)mdp, sizeof(mdp));
+	}
 
 	panic("exec returned");
 }
diff --git a/sys/boot/ofw/libofw/openfirm.c b/sys/boot/ofw/libofw/openfirm.c
index d4eb9d6abbb..a8626cc403f 100644
--- a/sys/boot/ofw/libofw/openfirm.c
+++ b/sys/boot/ofw/libofw/openfirm.c
@@ -729,6 +729,20 @@ OF_exit()
 		;
 }
 
+void
+OF_quiesce()
+{
+	static struct {
+		cell_t name;
+		cell_t nargs;
+		cell_t nreturns;
+	} args = {
+		(cell_t)"quiesce",
+	};
+
+	openfirmware(&args);
+}
+
 /* Free <size> bytes starting at <virt>, then call <entry> with <arg>. */
 #if 0
 void
diff --git a/sys/boot/ofw/libofw/openfirm.h b/sys/boot/ofw/libofw/openfirm.h
index c70c2e9314c..ecb1f328347 100644
--- a/sys/boot/ofw/libofw/openfirm.h
+++ b/sys/boot/ofw/libofw/openfirm.h
@@ -82,6 +82,7 @@ void		OF_init(int (*openfirm)(void *));
 
 /* Generic functions */
 int		OF_test(char *);
+void		OF_quiesce(); /* Disable firmware */
 
 /* Device tree functions */
 phandle_t	OF_peer(phandle_t);
diff --git a/sys/boot/ofw/libofw/ppc64_elf_freebsd.c b/sys/boot/ofw/libofw/ppc64_elf_freebsd.c
index 84ea4061184..f85a77acbf8 100644
--- a/sys/boot/ofw/libofw/ppc64_elf_freebsd.c
+++ b/sys/boot/ofw/libofw/ppc64_elf_freebsd.c
@@ -67,7 +67,7 @@ int
 ppc64_ofw_elf_exec(struct preloaded_file *fp)
 {
 	struct file_metadata	*fmp;
-	vm_offset_t		mdp;
+	vm_offset_t		mdp, dtbp;
 	Elf_Ehdr		*e;
 	int			error;
 	intptr_t		entry;
@@ -80,7 +80,7 @@ ppc64_ofw_elf_exec(struct preloaded_file *fp)
 	/* Handle function descriptor */
 	entry = *(uint64_t *)e->e_entry;
 
-	if ((error = md_load64(fp->f_args, &mdp)) != 0)
+	if ((error = md_load64(fp->f_args, &mdp, &dtbp)) != 0)
 		return (error);
 
 	printf("Kernel entry at 0x%lx ...\n", entry);
@@ -88,8 +88,14 @@ ppc64_ofw_elf_exec(struct preloaded_file *fp)
 	dev_cleanup();
 	ofw_release_heap();
 
-	OF_chain((void *)reloc, end - (char *)reloc, (void *)entry,
-	    (void *)mdp, sizeof(mdp));
+	if (dtbp != 0) {
+		OF_quiesce();
+		((int (*)(u_long, u_long, u_long, void *, u_long))entry)(dtbp, 0, 0,
+		    mdp, sizeof(mdp));
+	} else {
+		OF_chain((void *)reloc, end - (char *)reloc, (void *)entry,
+		    (void *)mdp, sizeof(mdp));
+	}
 
 	panic("exec returned");
 }
diff --git a/sys/boot/powerpc/ofw/Makefile b/sys/boot/powerpc/ofw/Makefile
index c0ed1451476..60705d043b2 100644
--- a/sys/boot/powerpc/ofw/Makefile
+++ b/sys/boot/powerpc/ofw/Makefile
@@ -21,6 +21,7 @@ LOADER_NFS_SUPPORT?=	yes
 LOADER_TFTP_SUPPORT?=	no
 LOADER_GZIP_SUPPORT?=	yes
 LOADER_BZIP2_SUPPORT?=	no
+LOADER_FDT_SUPPORT?=	yes
 
 .if ${LOADER_DISK_SUPPORT} == "yes"
 CFLAGS+=	-DLOADER_DISK_SUPPORT
@@ -49,6 +50,14 @@ CFLAGS+=	-DLOADER_NFS_SUPPORT
 .if ${LOADER_TFTP_SUPPORT} == "yes"
 CFLAGS+=	-DLOADER_TFTP_SUPPORT
 .endif
+.if ${LOADER_FDT_SUPPORT} == "yes"
+SRCS+=		ofwfdt.c
+CFLAGS+=	-I${.CURDIR}/../../fdt
+CFLAGS+=	-I${.OBJDIR}/../../fdt
+CFLAGS+=	-I${.CURDIR}/../../../contrib/libfdt
+CFLAGS+=	-DLOADER_FDT_SUPPORT
+LIBFDT=		${.OBJDIR}/../../fdt/libfdt.a
+.endif
 
 .if ${MK_FORTH} != "no"
 # Enable BootForth
@@ -89,13 +98,13 @@ CFLAGS+=	-I${.CURDIR}/../../ofw/libofw
 LIBSTAND=	${.OBJDIR}/../../libstand32/libstand.a
 CFLAGS+=	-I${.CURDIR}/../../../../lib/libstand/
 
-DPADD=		${LIBFICL} ${LIBOFW} ${LIBSTAND}
-LDADD=		${LIBFICL} ${LIBOFW} ${LIBSTAND}
+DPADD=		${LIBFICL} ${LIBOFW} ${LIBFDT} ${LIBSTAND}
+LDADD=		${LIBFICL} ${LIBOFW} ${LIBFDT} ${LIBSTAND}
 
 vers.c:	${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version
 	sh ${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version ${NEWVERSWHAT}
 
-loader.help: help.common help.ofw
+loader.help: help.common help.ofw ${.CURDIR}/../../fdt/help.fdt
 	cat ${.ALLSRC} | \
 	    awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET}
 
diff --git a/sys/boot/powerpc/ofw/metadata.c b/sys/boot/powerpc/ofw/metadata.c
index 7db4030c7d1..25d51f8251c 100644
--- a/sys/boot/powerpc/ofw/metadata.c
+++ b/sys/boot/powerpc/ofw/metadata.c
@@ -34,11 +34,11 @@ __FBSDID("$FreeBSD$");
 #include <sys/reboot.h>
 #include <sys/linker.h>
 #include <sys/boot.h>
+#include <fdt_platform.h>
 
 #include <machine/metadata.h>
 
 #include "bootstrap.h"
-#include "libofw.h"
 
 int
 md_getboothowto(char *kargs)
@@ -243,7 +243,7 @@ md_copymodules(vm_offset_t addr, int kern64)
  * - Module metadata are formatted and placed in kernel space.
  */
 int
-md_load_dual(char *args, vm_offset_t *modulep, int kern64)
+md_load_dual(char *args, vm_offset_t *modulep, vm_offset_t *dtb, int kern64)
 {
     struct preloaded_file	*kfp;
     struct preloaded_file	*xp;
@@ -251,6 +251,7 @@ md_load_dual(char *args, vm_offset_t *modulep, int kern64)
     vm_offset_t			kernend;
     vm_offset_t			addr;
     vm_offset_t			envp;
+    vm_offset_t			fdtp;
     vm_offset_t			size;
     uint64_t			scratch64;
     char			*rootdevname;
@@ -286,6 +287,14 @@ md_load_dual(char *args, vm_offset_t *modulep, int kern64)
     /* pad to a page boundary */
     addr = roundup(addr, PAGE_SIZE);
 
+    /* Copy out FDT */
+    *dtb = fdtp = 0;
+    if (getenv("usefdt") != NULL) {
+        size = fdt_copy(addr);
+        *dtb = fdtp = addr;
+        addr = roundup(addr + size, PAGE_SIZE);
+    }
+
     kernend = 0;
     kfp = file_findfile(NULL, kern64 ? "elf64 kernel" : "elf32 kernel");
     if (kfp == NULL)
@@ -296,10 +305,16 @@ md_load_dual(char *args, vm_offset_t *modulep, int kern64)
     if (kern64) {
 	scratch64 = envp;
 	file_addmetadata(kfp, MODINFOMD_ENVP, sizeof scratch64, &scratch64);
+        if (fdtp != 0) {
+	    scratch64 = fdtp;
+	    file_addmetadata(kfp, MODINFOMD_DTBP, sizeof scratch64, &scratch64);
+        }
 	scratch64 = kernend;
 	file_addmetadata(kfp, MODINFOMD_KERNEND, sizeof scratch64, &scratch64);
     } else {
 	file_addmetadata(kfp, MODINFOMD_ENVP, sizeof envp, &envp);
+        if (fdtp != 0)
+	    file_addmetadata(kfp, MODINFOMD_DTBP, sizeof fdtp, &fdtp);
 	file_addmetadata(kfp, MODINFOMD_KERNEND, sizeof kernend, &kernend);
     }
 
@@ -321,14 +336,14 @@ md_load_dual(char *args, vm_offset_t *modulep, int kern64)
 }
 
 int
-md_load(char *args, vm_offset_t *modulep)
+md_load(char *args, vm_offset_t *modulep, vm_offset_t *dtb)
 {
-    return (md_load_dual(args, modulep, 0));
+    return (md_load_dual(args, modulep, dtb, 0));
 }
 
 int
-md_load64(char *args, vm_offset_t *modulep)
+md_load64(char *args, vm_offset_t *modulep, vm_offset_t *dtb)
 {
-    return (md_load_dual(args, modulep, 1));
+    return (md_load_dual(args, modulep, dtb, 1));
 }
 
diff --git a/sys/boot/powerpc/ofw/ofwfdt.c b/sys/boot/powerpc/ofw/ofwfdt.c
new file mode 100644
index 00000000000..71a5f059d78
--- /dev/null
+++ b/sys/boot/powerpc/ofw/ofwfdt.c
@@ -0,0 +1,202 @@
+/*-
+ * Copyright (C) 2014-2015 Nathan Whitehorn
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <stand.h>
+#include <sys/param.h>
+#include <fdt_platform.h>
+#include <openfirm.h>
+#include <libfdt.h>
+#include "bootstrap.h"
+
+static int
+OF_hasprop(phandle_t node, const char *prop)
+{
+	return (OF_getproplen(node, prop) > 0);
+}
+
+static void
+add_node_to_fdt(void *buffer, phandle_t node, int fdt_offset)
+{
+        int i, child_offset, error;
+        char name[2048], *lastprop, *subname;
+	void *propbuf;
+	size_t proplen;
+
+	lastprop = NULL;
+	while (OF_nextprop(node, lastprop, name) > 0) {
+		proplen = OF_getproplen(node, name);
+		propbuf = malloc(proplen);
+		OF_getprop(node, name, propbuf, proplen);
+		error = fdt_setprop(buffer, fdt_offset, name, propbuf, proplen);
+		free(propbuf);
+		lastprop = name;
+		if (error)
+			printf("Error %d adding property %s to "
+			    "node %d\n", error, name, fdt_offset);
+	}
+
+	if (!OF_hasprop(node, "phandle") && !OF_hasprop(node, "linux,phandle")
+	    && !OF_hasprop(node, "ibm,phandle"))
+		fdt_setprop(buffer, fdt_offset, "phandle", &node, sizeof(node));
+
+        for (node = OF_child(node); node > 0; node = OF_peer(node)) {
+		OF_package_to_path(node, name, sizeof(name));
+		subname = strrchr(name, '/');
+		subname++;
+		child_offset = fdt_add_subnode(buffer, fdt_offset, subname);
+		if (child_offset < 0) {
+			printf("Error %d adding node %s (%s), skipping\n",
+			    child_offset, name, subname);
+			continue;
+		}
+	
+                add_node_to_fdt(buffer, node, child_offset);
+        }
+}
+
+static void
+ofwfdt_fixups(void *fdtp)
+{
+	int offset, len, i;
+	phandle_t node;
+	ihandle_t rtas;
+	const void *prop;
+
+	/*
+	 * Instantiate and add reservations for RTAS state if present
+	 */
+
+	offset = fdt_path_offset(fdtp, "/rtas");
+	if (offset > 0) {
+		uint32_t base;
+		void *rtasmem;
+		char path[255];
+
+		node = OF_finddevice("/rtas");
+		OF_package_to_path(node, path, sizeof(path));
+		OF_getprop(node, "rtas-size", &len, sizeof(len));
+
+		/* Allocate memory */
+		rtasmem = OF_claim(0, len, 4096);
+
+		/* Instantiate RTAS */
+		rtas = OF_open(path);
+		base = 0;
+		OF_call_method("instantiate-rtas", rtas, 1, 1, (cell_t)rtas,
+		    &base);
+
+		/* Store info to FDT using Linux convention */
+		base = cpu_to_fdt32(base);
+		fdt_setprop(fdtp, offset, "linux,rtas-entry", &base,
+		    sizeof(base));
+		base = cpu_to_fdt32((uint32_t)rtasmem);
+		offset = fdt_path_offset(fdtp, "/rtas");
+		fdt_setprop(fdtp, offset, "linux,rtas-base", &base,
+		    sizeof(base));
+
+		/* Mark RTAS private data area reserved */
+		fdt_add_mem_rsv(fdtp, base, len);
+	} else {
+		/*
+		 * Remove /memory/available properties, which reflect long-gone OF
+		 * state. Note that this doesn't work if we need RTAS still, since
+		 * that's part of the firmware.
+		 */
+
+		offset = fdt_path_offset(fdtp, "/memory@0");
+		if (offset > 0)
+			fdt_delprop(fdtp, offset, "available");
+	}
+		
+	/*
+
+	/*
+	 * Convert stored ihandles under /chosen to xref phandles
+	 */
+	offset = fdt_path_offset(fdtp, "/chosen");
+	if (offset > 0) {
+		const char *chosenprops[] = {"stdout", "stdin", "mmu", "cpu",
+		    NULL};
+		const uint32_t *ihand;
+		for (i = 0; chosenprops[i] != NULL; i++) {
+			ihand = fdt_getprop(fdtp, offset, chosenprops[i], &len);
+			if (ihand != NULL && len == sizeof(*ihand)) {
+				node = OF_instance_to_package(
+				    fdt32_to_cpu(*ihand));
+				if (OF_hasprop(node, "phandle"))
+					OF_getprop(node, "phandle", &node,
+					    sizeof(node));
+				else if (OF_hasprop(node, "linux,phandle"))
+					OF_getprop(node, "linux,phandle", &node,
+					    sizeof(node));
+				else if (OF_hasprop(node, "ibm,phandle"))
+					OF_getprop(node, "ibm,phandle", &node,
+					    sizeof(node));
+				node = cpu_to_fdt32(node);
+				fdt_setprop(fdtp, offset, chosenprops[i], &node,				    sizeof(node));
+			}
+
+			/* Refind node in case it moved */
+			offset = fdt_path_offset(fdtp, "/chosen");
+		}
+	}
+}
+
+int
+fdt_platform_load_dtb(void)
+{
+        void *buffer;
+        size_t buflen = 409600;
+
+        buffer = malloc(buflen);
+        fdt_create_empty_tree(buffer, buflen);
+        add_node_to_fdt(buffer, OF_peer(0), fdt_path_offset(buffer, "/"));
+        ofwfdt_fixups(buffer);
+        fdt_pack(buffer);
+
+        fdt_load_dtb_addr(buffer);
+        free(buffer);
+
+        return (0);
+}
+
+void
+fdt_platform_fixups(void)
+{
+
+}
+
+static int
+command_fdt(int argc, char *argv[])
+{
+ 
+	return (command_fdt_internal(argc, argv));
+}
+ 
+COMMAND_SET(fdt, "fdt", "flattened device tree handling", command_fdt);
+
diff --git a/sys/boot/sparc64/loader/metadata.c b/sys/boot/sparc64/loader/metadata.c
index d15a75a0a95..a3b3eb5cedf 100644
--- a/sys/boot/sparc64/loader/metadata.c
+++ b/sys/boot/sparc64/loader/metadata.c
@@ -276,7 +276,7 @@ md_copymodules(vm_offset_t addr)
  * - Module metadata are formatted and placed in kernel space.
  */
 int
-md_load(char *args, vm_offset_t *modulep)
+md_load(char *args, vm_offset_t *modulep, vm_offset_t *dtbp)
 {
     struct preloaded_file	*kfp;
     struct preloaded_file	*xp;
@@ -289,6 +289,7 @@ md_load(char *args, vm_offset_t *modulep)
     int				howto;
 
     howto = md_getboothowto(args);
+    *dtbp = 0;
 
     /* 
      * Allow the environment variable 'rootdev' to override the supplied device 
diff --git a/sys/cam/scsi/scsi_da.c b/sys/cam/scsi/scsi_da.c
index 7e6e226c39a..1d35300051a 100644
--- a/sys/cam/scsi/scsi_da.c
+++ b/sys/cam/scsi/scsi_da.c
@@ -1175,6 +1175,13 @@ static struct da_quirk_entry da_quirk_table[] =
 		{ T_DIRECT, SIP_MEDIA_FIXED, "ATA", "SG9XCS2D*", "*" },
 		/*quirks*/DA_Q_4K
 	},
+	{
+		/*
+		 * Hama Innostor USB-Stick 
+		 */
+		{ T_DIRECT, SIP_MEDIA_REMOVABLE, "Innostor", "Innostor*", "*" }, 
+		/*quirks*/DA_Q_NO_RC16
+	},
 };
 
 static	disk_strategy_t	dastrategy;
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c
index f1dd1132304..55de1b4c48c 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c
@@ -2775,8 +2775,12 @@ zvol_geom_worker(void *arg)
 			break;
 		case BIO_READ:
 		case BIO_WRITE:
+		case BIO_DELETE:
 			zvol_strategy(bp);
 			break;
+		default:
+			g_io_deliver(bp, EOPNOTSUPP);
+			break;
 		}
 	}
 }
@@ -3130,7 +3134,9 @@ zvol_d_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct threa
 		struct diocgattr_arg *arg = (struct diocgattr_arg *)data;
 		uint64_t refd, avail, usedobjs, availobjs;
 
-		if (strcmp(arg->name, "blocksavail") == 0) {
+		if (strcmp(arg->name, "GEOM::candelete") == 0)
+			arg->value.i = 1;
+		else if (strcmp(arg->name, "blocksavail") == 0) {
 			dmu_objset_space(zv->zv_objset, &refd, &avail,
 			    &usedobjs, &availobjs);
 			arg->value.off = avail / DEV_BSIZE;
diff --git a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h
index 3cb7eb27c7c..4605ee52b4c 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h
+++ b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h
@@ -2436,6 +2436,10 @@ extern void dtrace_helpers_destroy(proc_t *);
 
 #elif defined(__arm__)
 
+#define	DTRACE_INVOP_SHIFT	4
+#define	DTRACE_INVOP_MASK	((1 << DTRACE_INVOP_SHIFT) - 1)
+#define	DTRACE_INVOP_DATA(x)	((x) >> DTRACE_INVOP_SHIFT)
+
 #define DTRACE_INVOP_PUSHM	1
 #define DTRACE_INVOP_POPM	2
 #define DTRACE_INVOP_B		3
diff --git a/sys/cddl/dev/dtrace/arm/dtrace_asm.S b/sys/cddl/dev/dtrace/arm/dtrace_asm.S
index 9cbf1172d55..ce27b1410c6 100644
--- a/sys/cddl/dev/dtrace/arm/dtrace_asm.S
+++ b/sys/cddl/dev/dtrace/arm/dtrace_asm.S
@@ -208,12 +208,10 @@ EENTRY(dtrace_casptr)
 1:	ldrex	r3, [r0]	/* Load target */
 	cmp	r3, r1		/* Check if *target == cmp */
 	bne	2f		/* No, return */
-	strex	r3, r2, [r0]	/* Store new to target */
-	cmp	r3, #0		/* Did the store succeed? */
+	strex	ip, r2, [r0]	/* Store new to target */
+	cmp	ip, #0		/* Did the store succeed? */
 	bne	1b		/* No, try again */
-	mov	r0, r2		/* Return the new value of the store */
-2:	movne	r0, r3		/* The first compare failed, return */
-				/* the value loaded from memory */
+2:	mov	r0, r3		/* Return the value loaded from target */
 	RET
 EEND(dtrace_casptr)
 END(dtrace_cas32)
diff --git a/sys/cddl/dev/dtrace/arm/dtrace_subr.c b/sys/cddl/dev/dtrace/arm/dtrace_subr.c
index d4c12a6a0f1..2aea13e4103 100644
--- a/sys/cddl/dev/dtrace/arm/dtrace_subr.c
+++ b/sys/cddl/dev/dtrace/arm/dtrace_subr.c
@@ -46,11 +46,16 @@ __FBSDID("$FreeBSD$");
 #include <vm/pmap.h>
 
 #define	DELAYBRANCH(x)	((int)(x) < 0)
-		
+
+#define	BIT_PC		15
+#define	BIT_LR		14
+#define	BIT_SP		13
+
 extern uintptr_t 	dtrace_in_probe_addr;
 extern int		dtrace_in_probe;
 extern dtrace_id_t	dtrace_probeid_error;
 extern int (*dtrace_invop_jump_addr)(struct trapframe *);
+extern void dtrace_getnanotime(struct timespec *tsp);
 
 int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t);
 void dtrace_invop_init(void);
@@ -169,11 +174,11 @@ dtrace_gethrtime()
 uint64_t
 dtrace_gethrestime(void)
 {
-	struct	timespec curtime;
+	struct timespec current_time;
 
-	getnanotime(&curtime);
+	dtrace_getnanotime(&current_time);
 
-	return (curtime.tv_sec * 1000000000UL + curtime.tv_nsec);
+	return (current_time.tv_sec * 1000000000UL + current_time.tv_nsec);
 }
 
 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */
@@ -231,16 +236,97 @@ dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which,
 static int
 dtrace_invop_start(struct trapframe *frame)
 {
-	printf("IMPLEMENT ME: %s\n", __func__);
-	switch (dtrace_invop(frame->tf_pc, (uintptr_t *)frame, frame->tf_pc)) {
+	register_t *r0, *sp;
+	int data, invop, reg, update_sp;
+
+	invop = dtrace_invop(frame->tf_pc, (uintptr_t *)frame, frame->tf_pc);
+	switch (invop & DTRACE_INVOP_MASK) {
 	case DTRACE_INVOP_PUSHM:
-		// TODO:
+		sp = (register_t *)frame->tf_svc_sp;
+		r0 = &frame->tf_r0;
+		data = DTRACE_INVOP_DATA(invop);
+
+		/*
+		 * Store the pc, lr, and sp. These have their own
+		 * entries in the struct.
+		 */
+		if (data & (1 << BIT_PC)) {
+			sp--;
+			*sp = frame->tf_pc;
+		}
+		if (data & (1 << BIT_LR)) {
+			sp--;
+			*sp = frame->tf_svc_lr;
+		}
+		if (data & (1 << BIT_SP)) {
+			sp--;
+			*sp = frame->tf_svc_sp;
+		}
+
+		/* Store the general registers */
+		for (reg = 12; reg >= 0; reg--) {
+			if (data & (1 << reg)) {
+				sp--;
+				*sp = r0[reg];
+			}
+		}
+
+		/* Update the stack pointer and program counter to continue */
+		frame->tf_svc_sp = (register_t)sp;
+		frame->tf_pc += 4;
 		break;
 	case DTRACE_INVOP_POPM:
-		// TODO:
+		sp = (register_t *)frame->tf_svc_sp;
+		r0 = &frame->tf_r0;
+		data = DTRACE_INVOP_DATA(invop);
+
+		/* Read the general registers */
+		for (reg = 0; reg <= 12; reg++) {
+			if (data & (1 << reg)) {
+				r0[reg] = *sp;
+				sp++;
+			}
+		}
+
+		/*
+		 * Set the stack pointer. If we don't update it here we will
+		 * need to update it at the end as the instruction would do
+		 */
+		update_sp = 1;
+		if (data & (1 << BIT_SP)) {
+			frame->tf_svc_sp = *sp;
+			*sp++;
+			update_sp = 0;
+		}
+
+		/* Update the link register, we need to use the correct copy */
+		if (data & (1 << BIT_LR)) {
+			frame->tf_svc_lr = *sp;
+			*sp++;
+		}
+		/*
+		 * And the program counter. If it's not in the list skip over
+		 * it when we return so to not hit this again.
+		 */
+		if (data & (1 << BIT_PC)) {
+			frame->tf_pc = *sp;
+			*sp++;
+		} else
+			frame->tf_pc += 4;
+
+		/* Update the stack pointer if we haven't already done so */
+		if (update_sp)
+			frame->tf_svc_sp = (register_t)sp;
 		break;
 	case DTRACE_INVOP_B:
-		// TODO
+		data = DTRACE_INVOP_DATA(invop) & 0x00ffffff;
+		/* Sign extend the data */
+		if ((data & (1 << 23)) != 0)
+			data |= 0xff000000;
+		/* The data is the number of 4-byte words to change the pc */
+		data *= 4;
+		data += 8;
+		frame->tf_pc += data;
 		break;
 	default:
 		return (-1);
diff --git a/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c b/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c
index a89f1d32adf..c0360fd413a 100644
--- a/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c
+++ b/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c
@@ -285,7 +285,7 @@ dtrace_trap(struct trapframe *frame, u_int type)
 		case EXC_DSE:
 			/* Flag a bad address. */
 			cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR;
-			cpu_core[curcpu].cpuc_dtrace_illval = frame->cpu.aim.dar;
+			cpu_core[curcpu].cpuc_dtrace_illval = frame->dar;
 
 			/*
 			 * Offset the instruction pointer to the instruction
diff --git a/sys/cddl/dev/fbt/arm/fbt_isa.c b/sys/cddl/dev/fbt/arm/fbt_isa.c
index 99fe067cd0a..96a8249d6ac 100644
--- a/sys/cddl/dev/fbt/arm/fbt_isa.c
+++ b/sys/cddl/dev/fbt/arm/fbt_isa.c
@@ -38,7 +38,7 @@
 
 #include "fbt.h"
 
-#define	FBT_PATCHVAL		0xe06a0cfe /* illegal instruction */
+#define	FBT_PATCHVAL		0xe7f000f0 /* Specified undefined instruction */
 
 #define	FBT_PUSHM		0xe92d0000
 #define	FBT_POPM		0xe8bd0000
@@ -66,7 +66,7 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval)
 
 			cpu->cpu_dtrace_caller = 0;
 
-			return (fbt->fbtp_rval);
+			return (fbt->fbtp_rval | (fbt->fbtp_savedval << DTRACE_INVOP_SHIFT));
 		}
 	}
 
@@ -105,6 +105,13 @@ fbt_provide_module_function(linker_file_t lf, int symindx,
 	if (name[0] == '_' && name[1] == '_')
 		return (0);
 
+	/*
+	 * Architecture-specific exclusion list, largely to do with FBT trap
+	 * processing, to prevent reentrance.
+	 */
+	if (strcmp(name, "undefinedinstruction") == 0)
+		return (0);
+
 	instr = (uint32_t *)symval->value;
 	limit = (uint32_t *)(symval->value + symval->size);
 
diff --git a/sys/conf/Makefile.powerpc b/sys/conf/Makefile.powerpc
index e2d51577158..769b068ed5f 100644
--- a/sys/conf/Makefile.powerpc
+++ b/sys/conf/Makefile.powerpc
@@ -37,10 +37,9 @@ INCLUDES+= -I$S/contrib/libfdt
 
 CFLAGS+= -msoft-float -Wa,-many
 
-.if ${MACHINE_ARCH} == "powerpc64"
+# Build position-independent kernel
 CFLAGS+= -fPIC
 LDFLAGS+= -pie
-.endif
 
 .if !empty(DDB_ENABLED)
 CFLAGS+=	-fno-omit-frame-pointer
diff --git a/sys/conf/NOTES b/sys/conf/NOTES
index 8b6a4c8b3c6..c0d58791182 100644
--- a/sys/conf/NOTES
+++ b/sys/conf/NOTES
@@ -2889,11 +2889,6 @@ options 	SHMMNI=33
 # a single process at one time.
 options 	SHMSEG=9
 
-# Compress user core dumps.
-options		COMPRESS_USER_CORES
-# required to compress file output from kernel for COMPRESS_USER_CORES.
-device		gzio	    
-
 # Set the amount of time (in seconds) the system will wait before
 # rebooting automatically when a kernel panic occurs.  If set to (-1),
 # the system will wait indefinitely until a key is pressed on the
@@ -2983,3 +2978,7 @@ options 	RANDOM_DEBUG	# Debugging messages
 
 # Module to enable execution of application via emulators like QEMU
 options         IMAGACT_BINMISC
+
+# zlib I/O stream support
+# This enables support for compressed core dumps.
+options 	GZIO
diff --git a/sys/conf/files b/sys/conf/files
index 6820abd4323..a351e9f4cd3 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -3140,6 +3140,7 @@ kern/uipc_debug.c		optional ddb
 kern/uipc_domain.c		standard
 kern/uipc_mbuf.c		standard
 kern/uipc_mbuf2.c		standard
+kern/uipc_mbufhash.c		standard
 kern/uipc_mqueue.c		optional p1003_1b_mqueue
 kern/uipc_sem.c			optional p1003_1b_semaphores
 kern/uipc_shm.c			standard
@@ -3857,9 +3858,6 @@ ofed/drivers/net/mlx4/sys_tune.c		optional mlx4ib | mlxen	\
 ofed/drivers/net/mlx4/en_cq.c			optional mlxen		\
 	no-depend obj-prefix "mlx4_"					\
 	compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/utils.c			optional mlxen		\
-	no-depend obj-prefix "mlx4_"					\
-	compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
 ofed/drivers/net/mlx4/en_main.c			optional mlxen		\
 	no-depend obj-prefix "mlx4_"					\
 	compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
diff --git a/sys/conf/files.i386 b/sys/conf/files.i386
index d3e743baead..5bd584b38d3 100644
--- a/sys/conf/files.i386
+++ b/sys/conf/files.i386
@@ -118,12 +118,12 @@ crypto/aesni/aeskeys_i386.S	optional aesni
 crypto/aesni/aesni.c		optional aesni
 aesni_ghash.o			optional aesni				\
 	dependency	"$S/crypto/aesni/aesni_ghash.c"			\
-	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${PROF} -mmmx -msse -msse4 -maes -mpclmul ${.IMPSRC}" \
+	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${NO_WCAST_QUAL} ${PROF} -mmmx -msse -msse4 -maes -mpclmul ${.IMPSRC}" \
 	no-implicit-rule						\
 	clean		"aesni_ghash.o"
 aesni_wrap.o			optional aesni				\
 	dependency	"$S/crypto/aesni/aesni_wrap.c"			\
-	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${PROF} -mmmx -msse -msse4 -maes ${.IMPSRC}" \
+	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${NO_WCAST_QUAL} ${PROF} -mmmx -msse -msse4 -maes ${.IMPSRC}" \
 	no-implicit-rule						\
 	clean		"aesni_wrap.o"
 crypto/des/arch/i386/des_enc.S	optional crypto | ipsec | netsmb
diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk
index 112c217e2da..02ca4cc71bd 100644
--- a/sys/conf/kern.opts.mk
+++ b/sys/conf/kern.opts.mk
@@ -48,6 +48,33 @@ __DEFAULT_NO_OPTIONS = \
     NAND \
     OFED
 
+# Some options are totally broken on some architectures. We disable
+# them. If you need to enable them on an experimental basis, you
+# must change this code.
+
+# Things that don't work based on the CPU
+.if ${MACHINE_CPUARCH} == "arm"
+BROKEN_OPTIONS+= CDDL ZFS
+.endif
+
+.if ${MACHINE_CPUARCH} == "mips"
+BROKEN_OPTIONS+= CDDL ZFS
+.endif
+
+.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} == "powerpc"
+BROKEN_OPTIONS+= ZFS
+.endif
+
+# Things that don't work because the kernel doesn't have the support
+# for them.
+.if ${MACHINE} != "i386"
+BROKEN_OPTIONS+= EISA
+.endif
+
+.if ${MACHINE} != "i386" && ${MACHINE} != "amd64"
+BROKEN_OPTIONS+= OFED
+.endif
+
 # expanded inline from bsd.mkopt.mk to avoid share/mk dependency
 
 # Those that default to yes
@@ -82,6 +109,16 @@ MK_${var}:=	no
 .endfor
 .undef __DEFAULT_NO_OPTIONS
 
+#
+# MK_* options which are always no, usually because they are
+# unsupported/badly broken on this architecture.
+#
+.for var in ${BROKEN_OPTIONS}
+MK_${var}:=	no
+.endfor
+.undef BROKEN_OPTIONS
+#end of bsd.mkopt.mk expanded inline.
+
 #
 # MK_*_SUPPORT options which default to "yes" unless their corresponding
 # MK_* variable is set to "no".
@@ -104,6 +141,3 @@ MK_${var}_SUPPORT:= yes
 .endif
 .endif
 .endfor
-
-
-
diff --git a/sys/conf/options b/sys/conf/options
index 2d6d54b2e24..28d7950d675 100644
--- a/sys/conf/options
+++ b/sys/conf/options
@@ -87,13 +87,13 @@ COMPAT_FREEBSD9	opt_compat.h
 COMPAT_FREEBSD10	opt_compat.h
 COMPAT_LINUXAPI	opt_compat.h
 COMPILING_LINT	opt_global.h
-COMPRESS_USER_CORES opt_core.h
 CY_PCI_FASTINTR
 DEADLKRES	opt_watchdog.h
 DIRECTIO
 FILEMON		opt_dontuse.h
 FFCLOCK
 FULL_PREEMPTION	opt_sched.h
+GZIO		opt_gzio.h
 IMAGACT_BINMISC		opt_dontuse.h
 IPI_PREEMPTION	opt_sched.h
 GEOM_AES	opt_geom.h
diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c
index bf2cc5498b4..b331fb80681 100644
--- a/sys/dev/acpica/acpi.c
+++ b/sys/dev/acpica/acpi.c
@@ -1071,7 +1071,7 @@ acpi_hint_device_unit(device_t acdev, device_t child, const char *name,
 }
 
 /*
- * Fech the NUMA domain for the given device.
+ * Fetch the NUMA domain for the given device.
  *
  * If a device has a _PXM method, map that to a NUMA domain.
  *
diff --git a/sys/dev/ahci/ahci.h b/sys/dev/ahci/ahci.h
index 755fdc594eb..e953fa09535 100644
--- a/sys/dev/ahci/ahci.h
+++ b/sys/dev/ahci/ahci.h
@@ -93,7 +93,7 @@
 #define         ATA_SS_SPD_NO_SPEED     0x00000000
 #define         ATA_SS_SPD_GEN1         0x00000010
 #define         ATA_SS_SPD_GEN2         0x00000020
-#define         ATA_SS_SPD_GEN3         0x00000040
+#define         ATA_SS_SPD_GEN3         0x00000030
 
 #define         ATA_SS_IPM_MASK         0x00000f00
 #define         ATA_SS_IPM_NO_DEVICE    0x00000000
@@ -131,7 +131,7 @@
 #define         ATA_SC_SPD_NO_SPEED     0x00000000
 #define         ATA_SC_SPD_SPEED_GEN1   0x00000010
 #define         ATA_SC_SPD_SPEED_GEN2   0x00000020
-#define         ATA_SC_SPD_SPEED_GEN3   0x00000040
+#define         ATA_SC_SPD_SPEED_GEN3   0x00000030
 
 #define         ATA_SC_IPM_MASK         0x00000f00
 #define         ATA_SC_IPM_NONE         0x00000000
diff --git a/sys/dev/ata/ata-all.h b/sys/dev/ata/ata-all.h
index 41e3054926f..c9e666c7d78 100644
--- a/sys/dev/ata/ata-all.h
+++ b/sys/dev/ata/ata-all.h
@@ -105,6 +105,7 @@
 #define         ATA_SS_SPD_NO_SPEED     0x00000000
 #define         ATA_SS_SPD_GEN1         0x00000010
 #define         ATA_SS_SPD_GEN2         0x00000020
+#define         ATA_SS_SPD_GEN3         0x00000030
 
 #define         ATA_SS_IPM_MASK         0x00000f00
 #define         ATA_SS_IPM_NO_DEVICE    0x00000000
@@ -140,7 +141,7 @@
 #define         ATA_SC_SPD_NO_SPEED     0x00000000
 #define         ATA_SC_SPD_SPEED_GEN1   0x00000010
 #define         ATA_SC_SPD_SPEED_GEN2   0x00000020
-#define         ATA_SC_SPD_SPEED_GEN3   0x00000040
+#define         ATA_SC_SPD_SPEED_GEN3   0x00000030
 
 #define         ATA_SC_IPM_MASK         0x00000f00
 #define         ATA_SC_IPM_NONE         0x00000000
diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c
index af4fddb9fa0..007ec63e65d 100644
--- a/sys/dev/bge/if_bge.c
+++ b/sys/dev/bge/if_bge.c
@@ -1637,6 +1637,7 @@ bge_setmulti(struct bge_softc *sc)
 	if (if_getflags(ifp) & IFF_ALLMULTI || if_getflags(ifp) & IFF_PROMISC) {
 		for (i = 0; i < 4; i++)
 			CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0xFFFFFFFF);
+		free(mta, M_DEVBUF);
 		return;
 	}
 
diff --git a/sys/dev/cadence/if_cgem.c b/sys/dev/cadence/if_cgem.c
index 84b947dfba1..0bb98933036 100644
--- a/sys/dev/cadence/if_cgem.c
+++ b/sys/dev/cadence/if_cgem.c
@@ -52,7 +52,6 @@ __FBSDID("$FreeBSD$");
 
 #include <net/ethernet.h>
 #include <net/if.h>
-#include <net/if_var.h>
 #include <net/if_arp.h>
 #include <net/if_dl.h>
 #include <net/if_media.h>
@@ -98,7 +97,7 @@ __FBSDID("$FreeBSD$");
 				 CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
 
 struct cgem_softc {
-	struct ifnet		*ifp;
+	if_t			ifp;
 	struct mtx		sc_mtx;
 	device_t		dev;
 	device_t		miibus;
@@ -298,9 +297,10 @@ cgem_mac_hash(u_char eaddr[])
 static void
 cgem_rx_filter(struct cgem_softc *sc)
 {
-	struct ifnet *ifp = sc->ifp;
-	struct ifmultiaddr *ifma;
-	int index;
+	if_t ifp = sc->ifp;
+	u_char *mta;
+
+	int index, i, mcnt;
 	uint32_t hash_hi, hash_lo;
 	uint32_t net_cfg;
 
@@ -313,28 +313,34 @@ cgem_rx_filter(struct cgem_softc *sc)
 		     CGEM_NET_CFG_NO_BCAST | 
 		     CGEM_NET_CFG_COPY_ALL);
 
-	if ((ifp->if_flags & IFF_PROMISC) != 0)
+	if ((if_getflags(ifp) & IFF_PROMISC) != 0)
 		net_cfg |= CGEM_NET_CFG_COPY_ALL;
 	else {
-		if ((ifp->if_flags & IFF_BROADCAST) == 0)
+		if ((if_getflags(ifp) & IFF_BROADCAST) == 0)
 			net_cfg |= CGEM_NET_CFG_NO_BCAST;
-		if ((ifp->if_flags & IFF_ALLMULTI) != 0) {
+		if ((if_getflags(ifp) & IFF_ALLMULTI) != 0) {
 			hash_hi = 0xffffffff;
 			hash_lo = 0xffffffff;
 		} else {
-			if_maddr_rlock(ifp);
-			TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
-				if (ifma->ifma_addr->sa_family != AF_LINK)
-					continue;
+			mcnt = if_multiaddr_count(ifp, -1);
+			mta = malloc(ETHER_ADDR_LEN * mcnt, M_DEVBUF,
+				     M_NOWAIT);
+			if (mta == NULL) {
+				device_printf(sc->dev,
+				      "failed to allocate temp mcast list\n");
+				return;
+			}
+			if_multiaddr_array(ifp, mta, &mcnt, mcnt);
+			for (i = 0; i < mcnt; i++) {
 				index = cgem_mac_hash(
 					LLADDR((struct sockaddr_dl *)
-					       ifma->ifma_addr));
+					       (mta + (i * ETHER_ADDR_LEN))));
 				if (index > 31)
-					hash_hi |= (1<<(index-32));
+					hash_hi |= (1 << (index - 32));
 				else
-					hash_lo |= (1<<index);
+					hash_lo |= (1 << index);
 			}
-			if_maddr_runlock(ifp);
+			free(mta, M_DEVBUF);
 		}
 
 		if (hash_hi != 0 || hash_lo != 0)
@@ -418,10 +424,7 @@ cgem_setup_descs(struct cgem_softc *sc)
 		sc->rxring[i].addr = CGEM_RXDESC_OWN;
 		sc->rxring[i].ctl = 0;
 		sc->rxring_m[i] = NULL;
-		err = bus_dmamap_create(sc->mbuf_dma_tag, 0,
-					&sc->rxring_m_dmamap[i]);
-		if (err)
-			return (err);
+		sc->rxring_m_dmamap[i] = NULL;
 	}
 	sc->rxring[CGEM_NUM_RX_DESCS - 1].addr |= CGEM_RXDESC_WRAP;
 
@@ -451,10 +454,7 @@ cgem_setup_descs(struct cgem_softc *sc)
 		sc->txring[i].addr = 0;
 		sc->txring[i].ctl = CGEM_TXDESC_USED;
 		sc->txring_m[i] = NULL;
-		err = bus_dmamap_create(sc->mbuf_dma_tag, 0,
-					&sc->txring_m_dmamap[i]);
-		if (err)
-			return (err);
+		sc->txring_m_dmamap[i] = NULL;
 	}
 	sc->txring[CGEM_NUM_TX_DESCS - 1].ctl |= CGEM_TXDESC_WRAP;
 
@@ -486,10 +486,19 @@ cgem_fill_rqueue(struct cgem_softc *sc)
 		m->m_pkthdr.rcvif = sc->ifp;
 
 		/* Load map and plug in physical address. */
+		if (bus_dmamap_create(sc->mbuf_dma_tag, 0,
+			      &sc->rxring_m_dmamap[sc->rxring_hd_ptr])) {
+			sc->rxdmamapfails++;
+			m_free(m);
+			break;
+		}
 		if (bus_dmamap_load_mbuf_sg(sc->mbuf_dma_tag, 
 			      sc->rxring_m_dmamap[sc->rxring_hd_ptr], m,
 			      segs, &nsegs, BUS_DMA_NOWAIT)) {
 			sc->rxdmamapfails++;
+			bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->rxring_m_dmamap[sc->rxring_hd_ptr]);
+			sc->rxring_m_dmamap[sc->rxring_hd_ptr] = NULL;
 			m_free(m);
 			break;
 		}
@@ -517,7 +526,7 @@ cgem_fill_rqueue(struct cgem_softc *sc)
 static void
 cgem_recv(struct cgem_softc *sc)
 {
-	struct ifnet *ifp = sc->ifp;
+	if_t ifp = sc->ifp;
 	struct mbuf *m, *m_hd, **m_tl;
 	uint32_t ctl;
 
@@ -540,9 +549,12 @@ cgem_recv(struct cgem_softc *sc)
 				sc->rxring_m_dmamap[sc->rxring_tl_ptr],
 				BUS_DMASYNC_POSTREAD);
 
-		/* Unload dmamap. */
+		/* Unload and destroy dmamap. */
 		bus_dmamap_unload(sc->mbuf_dma_tag,
 		  	sc->rxring_m_dmamap[sc->rxring_tl_ptr]);
+		bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->rxring_m_dmamap[sc->rxring_tl_ptr]);
+		sc->rxring_m_dmamap[sc->rxring_tl_ptr] = NULL;
 
 		/* Increment tail pointer. */
 		if (++sc->rxring_tl_ptr == CGEM_NUM_RX_DESCS)
@@ -571,7 +583,7 @@ cgem_recv(struct cgem_softc *sc)
 		/* Are we using hardware checksumming?  Check the
 		 * status in the receive descriptor.
 		 */
-		if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
+		if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) {
 			/* TCP or UDP checks out, IP checks out too. */
 			if ((ctl & CGEM_RXDESC_CKSUM_STAT_MASK) ==
 			    CGEM_RXDESC_CKSUM_STAT_TCP_GOOD ||
@@ -605,7 +617,7 @@ cgem_recv(struct cgem_softc *sc)
 		m_hd = m_hd->m_next;
 		m->m_next = NULL;
 		if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-		(*ifp->if_input)(ifp, m);
+		if_input(ifp, m);
 	}
 	CGEM_LOCK(sc);
 }
@@ -624,14 +636,17 @@ cgem_clean_tx(struct cgem_softc *sc)
 	       ((ctl = sc->txring[sc->txring_tl_ptr].ctl) &
 		CGEM_TXDESC_USED) != 0) {
 
-		/* Sync cache.  nop? */
+		/* Sync cache. */
 		bus_dmamap_sync(sc->mbuf_dma_tag,
 				sc->txring_m_dmamap[sc->txring_tl_ptr],
 				BUS_DMASYNC_POSTWRITE);
 
-		/* Unload DMA map. */
+		/* Unload and destroy DMA map. */
 		bus_dmamap_unload(sc->mbuf_dma_tag,
 				  sc->txring_m_dmamap[sc->txring_tl_ptr]);
+		bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->txring_m_dmamap[sc->txring_tl_ptr]);
+		sc->txring_m_dmamap[sc->txring_tl_ptr] = NULL;
 
 		/* Free up the mbuf. */
 		m = sc->txring_m[sc->txring_tl_ptr];
@@ -674,15 +689,15 @@ cgem_clean_tx(struct cgem_softc *sc)
 			sc->txring_tl_ptr++;
 		sc->txring_queued--;
 
-		sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+		if_setdrvflagbits(sc->ifp, 0, IFF_DRV_OACTIVE);
 	}
 }
 
 /* Start transmits. */
 static void
-cgem_start_locked(struct ifnet *ifp)
+cgem_start_locked(if_t ifp)
 {
-	struct cgem_softc *sc = (struct cgem_softc *) ifp->if_softc;
+	struct cgem_softc *sc = (struct cgem_softc *) if_getsoftc(ifp);
 	struct mbuf *m;
 	bus_dma_segment_t segs[TX_MAX_DMA_SEGS];
 	uint32_t ctl;
@@ -690,7 +705,7 @@ cgem_start_locked(struct ifnet *ifp)
 
 	CGEM_ASSERT_LOCKED(sc);
 
-	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0)
+	if ((if_getdrvflags(ifp) & IFF_DRV_OACTIVE) != 0)
 		return;
 
 	for (;;) {
@@ -704,18 +719,24 @@ cgem_start_locked(struct ifnet *ifp)
 			/* Still no room? */
 			if (sc->txring_queued >=
 			    CGEM_NUM_TX_DESCS - TX_MAX_DMA_SEGS * 2) {
-				ifp->if_drv_flags |= IFF_DRV_OACTIVE;
+				if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0);
 				sc->txfull++;
 				break;
 			}
 		}
 
 		/* Grab next transmit packet. */
-		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
+		m = if_dequeue(ifp);
 		if (m == NULL)
 			break;
 
-		/* Load DMA map. */
+		/* Create and load DMA map. */
+		if (bus_dmamap_create(sc->mbuf_dma_tag, 0,
+			      &sc->txring_m_dmamap[sc->txring_hd_ptr])) {
+			m_freem(m);
+			sc->txdmamapfails++;
+			continue;
+		}
 		err = bus_dmamap_load_mbuf_sg(sc->mbuf_dma_tag,
 				      sc->txring_m_dmamap[sc->txring_hd_ptr],
 				      m, segs, &nsegs, BUS_DMA_NOWAIT);
@@ -726,6 +747,9 @@ cgem_start_locked(struct ifnet *ifp)
 			if (m2 == NULL) {
 				sc->txdefragfails++;
 				m_freem(m);
+				bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->txring_m_dmamap[sc->txring_hd_ptr]);
+				sc->txring_m_dmamap[sc->txring_hd_ptr] = NULL;
 				continue;
 			}
 			m = m2;
@@ -737,6 +761,9 @@ cgem_start_locked(struct ifnet *ifp)
 		if (err) {
 			/* Give up. */
 			m_freem(m);
+			bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->txring_m_dmamap[sc->txring_hd_ptr]);
+			sc->txring_m_dmamap[sc->txring_hd_ptr] = NULL;
 			sc->txdmamapfails++;
 			continue;
 		}
@@ -788,9 +815,9 @@ cgem_start_locked(struct ifnet *ifp)
 }
 
 static void
-cgem_start(struct ifnet *ifp)
+cgem_start(if_t ifp)
 {
-	struct cgem_softc *sc = (struct cgem_softc *) ifp->if_softc;
+	struct cgem_softc *sc = (struct cgem_softc *) if_getsoftc(ifp);
 
 	CGEM_LOCK(sc);
 	cgem_start_locked(ifp);
@@ -902,11 +929,12 @@ static void
 cgem_intr(void *arg)
 {
 	struct cgem_softc *sc = (struct cgem_softc *)arg;
+	if_t ifp = sc->ifp;
 	uint32_t istatus;
 
 	CGEM_LOCK(sc);
 
-	if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
+	if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) {
 		CGEM_UNLOCK(sc);
 		return;
 	}
@@ -945,8 +973,8 @@ cgem_intr(void *arg)
 	}
 
 	/* Restart transmitter if needed. */
-	if (!IFQ_DRV_IS_EMPTY(&sc->ifp->if_snd))
-		cgem_start_locked(sc->ifp);
+	if (!if_sendq_empty(ifp))
+		cgem_start_locked(ifp);
 
 	CGEM_UNLOCK(sc);
 }
@@ -982,9 +1010,10 @@ cgem_reset(struct cgem_softc *sc)
 static void
 cgem_config(struct cgem_softc *sc)
 {
+	if_t ifp = sc->ifp;
 	uint32_t net_cfg;
 	uint32_t dma_cfg;
-	u_char *eaddr = IF_LLADDR(sc->ifp);
+	u_char *eaddr = if_getlladdr(ifp);
 
 	CGEM_ASSERT_LOCKED(sc);
 
@@ -999,7 +1028,7 @@ cgem_config(struct cgem_softc *sc)
 		CGEM_NET_CFG_SPEED100;
 
 	/* Enable receive checksum offloading? */
-	if ((sc->ifp->if_capenable & IFCAP_RXCSUM) != 0)
+	if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0)
 		net_cfg |=  CGEM_NET_CFG_RX_CHKSUM_OFFLD_EN;
 
 	WR4(sc, CGEM_NET_CFG, net_cfg);
@@ -1012,7 +1041,7 @@ cgem_config(struct cgem_softc *sc)
 		CGEM_DMA_CFG_DISC_WHEN_NO_AHB;
 
 	/* Enable transmit checksum offloading? */
-	if ((sc->ifp->if_capenable & IFCAP_TXCSUM) != 0)
+	if ((if_getcapenable(ifp) & IFCAP_TXCSUM) != 0)
 		dma_cfg |= CGEM_DMA_CFG_CHKSUM_GEN_OFFLOAD_EN;
 
 	WR4(sc, CGEM_DMA_CFG, dma_cfg);
@@ -1045,14 +1074,13 @@ cgem_init_locked(struct cgem_softc *sc)
 
 	CGEM_ASSERT_LOCKED(sc);
 
-	if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
+	if ((if_getdrvflags(sc->ifp) & IFF_DRV_RUNNING) != 0)
 		return;
 
 	cgem_config(sc);
 	cgem_fill_rqueue(sc);
 
-	sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+	if_setdrvflagbits(sc->ifp, IFF_DRV_RUNNING, IFF_DRV_OACTIVE);
 
 	mii = device_get_softc(sc->miibus);
 	mii_mediachg(mii);
@@ -1088,8 +1116,12 @@ cgem_stop(struct cgem_softc *sc)
 		sc->txring[i].ctl = CGEM_TXDESC_USED;
 		sc->txring[i].addr = 0;
 		if (sc->txring_m[i]) {
+			/* Unload and destroy dmamap. */
 			bus_dmamap_unload(sc->mbuf_dma_tag,
 					  sc->txring_m_dmamap[i]);
+			bus_dmamap_destroy(sc->mbuf_dma_tag,
+					   sc->txring_m_dmamap[i]);
+			sc->txring_m_dmamap[i] = NULL;
 			m_freem(sc->txring_m[i]);
 			sc->txring_m[i] = NULL;
 		}
@@ -1105,9 +1137,12 @@ cgem_stop(struct cgem_softc *sc)
 		sc->rxring[i].addr = CGEM_RXDESC_OWN;
 		sc->rxring[i].ctl = 0;
 		if (sc->rxring_m[i]) {
-			/* Unload dmamap. */
+			/* Unload and destroy dmamap. */
 			bus_dmamap_unload(sc->mbuf_dma_tag,
-				  sc->rxring_m_dmamap[sc->rxring_tl_ptr]);
+				  sc->rxring_m_dmamap[i]);
+			bus_dmamap_destroy(sc->mbuf_dma_tag,
+				   sc->rxring_m_dmamap[i]);
+			sc->rxring_m_dmamap[i] = NULL;
 
 			m_freem(sc->rxring_m[i]);
 			sc->rxring_m[i] = NULL;
@@ -1125,9 +1160,9 @@ cgem_stop(struct cgem_softc *sc)
 
 
 static int
-cgem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
+cgem_ioctl(if_t ifp, u_long cmd, caddr_t data)
 {
-	struct cgem_softc *sc = ifp->if_softc;
+	struct cgem_softc *sc = if_getsoftc(ifp);
 	struct ifreq *ifr = (struct ifreq *)data;
 	struct mii_data *mii;
 	int error = 0, mask;
@@ -1135,27 +1170,27 @@ cgem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 	switch (cmd) {
 	case SIOCSIFFLAGS:
 		CGEM_LOCK(sc);
-		if ((ifp->if_flags & IFF_UP) != 0) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-				if (((ifp->if_flags ^ sc->if_old_flags) &
+		if ((if_getflags(ifp) & IFF_UP) != 0) {
+			if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
+				if (((if_getflags(ifp) ^ sc->if_old_flags) &
 				     (IFF_PROMISC | IFF_ALLMULTI)) != 0) {
 					cgem_rx_filter(sc);
 				}
 			} else {
 				cgem_init_locked(sc);
 			}
-		} else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-			ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
+		} else if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
+			if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
 			cgem_stop(sc);
 		}
-		sc->if_old_flags = ifp->if_flags;
+		sc->if_old_flags = if_getflags(ifp);
 		CGEM_UNLOCK(sc);
 		break;
 
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		/* Set up multi-cast filters. */
-		if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
+		if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
 			CGEM_LOCK(sc);
 			cgem_rx_filter(sc);
 			CGEM_UNLOCK(sc);
@@ -1170,23 +1205,23 @@ cgem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 
 	case SIOCSIFCAP:
 		CGEM_LOCK(sc);
-		mask = ifp->if_capenable ^ ifr->ifr_reqcap;
+		mask = if_getcapenable(ifp) ^ ifr->ifr_reqcap;
 
 		if ((mask & IFCAP_TXCSUM) != 0) {
 			if ((ifr->ifr_reqcap & IFCAP_TXCSUM) != 0) {
 				/* Turn on TX checksumming. */
-				ifp->if_capenable |= (IFCAP_TXCSUM |
-						      IFCAP_TXCSUM_IPV6);
-				ifp->if_hwassist |= CGEM_CKSUM_ASSIST;
+				if_setcapenablebit(ifp, IFCAP_TXCSUM |
+						   IFCAP_TXCSUM_IPV6, 0);
+				if_sethwassistbits(ifp, CGEM_CKSUM_ASSIST, 0);
 
 				WR4(sc, CGEM_DMA_CFG,
 				    RD4(sc, CGEM_DMA_CFG) |
 				     CGEM_DMA_CFG_CHKSUM_GEN_OFFLOAD_EN);
 			} else {
 				/* Turn off TX checksumming. */
-				ifp->if_capenable &= ~(IFCAP_TXCSUM |
-						       IFCAP_TXCSUM_IPV6);
-				ifp->if_hwassist &= ~CGEM_CKSUM_ASSIST;
+				if_setcapenablebit(ifp, 0, IFCAP_TXCSUM |
+						   IFCAP_TXCSUM_IPV6);
+				if_sethwassistbits(ifp, 0, CGEM_CKSUM_ASSIST);
 
 				WR4(sc, CGEM_DMA_CFG,
 				    RD4(sc, CGEM_DMA_CFG) &
@@ -1196,25 +1231,25 @@ cgem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 		if ((mask & IFCAP_RXCSUM) != 0) {
 			if ((ifr->ifr_reqcap & IFCAP_RXCSUM) != 0) {
 				/* Turn on RX checksumming. */
-				ifp->if_capenable |= (IFCAP_RXCSUM |
-						      IFCAP_RXCSUM_IPV6);
+				if_setcapenablebit(ifp, IFCAP_RXCSUM |
+						   IFCAP_RXCSUM_IPV6, 0);
 				WR4(sc, CGEM_NET_CFG,
 				    RD4(sc, CGEM_NET_CFG) |
 				     CGEM_NET_CFG_RX_CHKSUM_OFFLD_EN);
 			} else {
 				/* Turn off RX checksumming. */
-				ifp->if_capenable &= ~(IFCAP_RXCSUM |
-						       IFCAP_RXCSUM_IPV6);
+				if_setcapenablebit(ifp, 0, IFCAP_RXCSUM |
+						   IFCAP_RXCSUM_IPV6);
 				WR4(sc, CGEM_NET_CFG,
 				    RD4(sc, CGEM_NET_CFG) &
 				     ~CGEM_NET_CFG_RX_CHKSUM_OFFLD_EN);
 			}
 		}
-		if ((ifp->if_capenable & (IFCAP_RXCSUM | IFCAP_TXCSUM)) == 
+		if ((if_getcapenable(ifp) & (IFCAP_RXCSUM | IFCAP_TXCSUM)) == 
 		    (IFCAP_RXCSUM | IFCAP_TXCSUM))
-			ifp->if_capenable |= IFCAP_VLAN_HWCSUM;
+			if_setcapenablebit(ifp, IFCAP_VLAN_HWCSUM, 0);
 		else
-			ifp->if_capenable &= ~IFCAP_VLAN_HWCSUM;
+			if_setcapenablebit(ifp, 0, IFCAP_VLAN_HWCSUM);
 
 		CGEM_UNLOCK(sc);
 		break;
@@ -1238,16 +1273,16 @@ cgem_child_detached(device_t dev, device_t child)
 }
 
 static int
-cgem_ifmedia_upd(struct ifnet *ifp)
+cgem_ifmedia_upd(if_t ifp)
 {
-	struct cgem_softc *sc = (struct cgem_softc *) ifp->if_softc;
+	struct cgem_softc *sc = (struct cgem_softc *) if_getsoftc(ifp);
 	struct mii_data *mii;
 	struct mii_softc *miisc;
 	int error = 0;
 
 	mii = device_get_softc(sc->miibus);
 	CGEM_LOCK(sc);
-	if ((ifp->if_flags & IFF_UP) != 0) {
+	if ((if_getflags(ifp) & IFF_UP) != 0) {
 		LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
 			PHY_RESET(miisc);
 		error = mii_mediachg(mii);
@@ -1258,9 +1293,9 @@ cgem_ifmedia_upd(struct ifnet *ifp)
 }
 
 static void
-cgem_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+cgem_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
 {
-	struct cgem_softc *sc = (struct cgem_softc *) ifp->if_softc;
+	struct cgem_softc *sc = (struct cgem_softc *) if_getsoftc(ifp);
 	struct mii_data *mii;
 
 	mii = device_get_softc(sc->miibus);
@@ -1606,7 +1641,7 @@ static int
 cgem_attach(device_t dev)
 {
 	struct cgem_softc *sc = device_get_softc(dev);
-	struct ifnet *ifp = NULL;
+	if_t ifp = NULL;
 	phandle_t node;
 	pcell_t cell;
 	int rid, err;
@@ -1647,23 +1682,23 @@ cgem_attach(device_t dev)
 		cgem_detach(dev);
 		return (ENOMEM);
 	}
-	ifp->if_softc = sc;
+	if_setsoftc(ifp, sc);
 	if_initname(ifp, IF_CGEM_NAME, device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	ifp->if_start = cgem_start;
-	ifp->if_ioctl = cgem_ioctl;
-	ifp->if_init = cgem_init;
-	ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 |
-		IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM;
-	/* Disable hardware checksumming by default. */
-	ifp->if_hwassist = 0;
-	ifp->if_capenable = ifp->if_capabilities &
-		~(IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_VLAN_HWCSUM);
-	ifp->if_snd.ifq_drv_maxlen = CGEM_NUM_TX_DESCS;
-	IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
-	IFQ_SET_READY(&ifp->if_snd);
+	if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
+	if_setinitfn(ifp, cgem_init);
+	if_setioctlfn(ifp, cgem_ioctl);
+	if_setstartfn(ifp, cgem_start);
+	if_setcapabilitiesbit(ifp, IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 |
+			      IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM, 0);
+	if_setsendqlen(ifp, CGEM_NUM_TX_DESCS);
+	if_setsendqready(ifp);
 
-	sc->if_old_flags = ifp->if_flags;
+	/* Disable hardware checksumming by default. */
+	if_sethwassist(ifp, 0);
+	if_setcapenable(ifp, if_getcapabilities(ifp) &
+		~(IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_VLAN_HWCSUM));
+
+	sc->if_old_flags = if_getflags(ifp);
 	sc->rxbufs = DEFAULT_NUM_RX_BUFS;
 	sc->rxhangwar = 1;
 
@@ -1726,7 +1761,7 @@ cgem_detach(device_t dev)
 		cgem_stop(sc);
 		CGEM_UNLOCK(sc);
 		callout_drain(&sc->tick_ch);
-		sc->ifp->if_flags &= ~IFF_UP;
+		if_setflagbits(sc->ifp, 0, IFF_UP);
 		ether_ifdetach(sc->ifp);
 	}
 
@@ -1752,7 +1787,8 @@ cgem_detach(device_t dev)
 	/* Release DMA resources. */
 	if (sc->rxring != NULL) {
 		if (sc->rxring_physaddr != 0) {
-			bus_dmamap_unload(sc->desc_dma_tag, sc->rxring_dma_map);
+			bus_dmamap_unload(sc->desc_dma_tag,
+					  sc->rxring_dma_map);
 			sc->rxring_physaddr = 0;
 		}
 		bus_dmamem_free(sc->desc_dma_tag, sc->rxring,
@@ -1767,7 +1803,8 @@ cgem_detach(device_t dev)
 	}
 	if (sc->txring != NULL) {
 		if (sc->txring_physaddr != 0) {
-			bus_dmamap_unload(sc->desc_dma_tag, sc->txring_dma_map);
+			bus_dmamap_unload(sc->desc_dma_tag,
+					  sc->txring_dma_map);
 			sc->txring_physaddr = 0;
 		}
 		bus_dmamem_free(sc->desc_dma_tag, sc->txring,
diff --git a/sys/dev/cxgb/cxgb_sge.c b/sys/dev/cxgb/cxgb_sge.c
index 7f41656c606..71087cce3d4 100644
--- a/sys/dev/cxgb/cxgb_sge.c
+++ b/sys/dev/cxgb/cxgb_sge.c
@@ -3149,9 +3149,6 @@ t3_dump_rspq(SYSCTL_HANDLER_ARGS)
 	}
 
 	err = sbuf_finish(sb);
-	/* Output a trailing NUL. */
-	if (err == 0)
-		err = SYSCTL_OUT(req, "", 1);
 	sbuf_delete(sb);
 	return (err);
 }	
@@ -3219,9 +3216,6 @@ t3_dump_txq_eth(SYSCTL_HANDLER_ARGS)
 
 	}
 	err = sbuf_finish(sb);
-	/* Output a trailing NUL. */
-	if (err == 0)
-		err = SYSCTL_OUT(req, "", 1);
 	sbuf_delete(sb);
 	return (err);
 }
@@ -3279,9 +3273,6 @@ t3_dump_txq_ctrl(SYSCTL_HANDLER_ARGS)
 
 	}
 	err = sbuf_finish(sb);
-	/* Output a trailing NUL. */
-	if (err == 0)
-		err = SYSCTL_OUT(req, "", 1);
 	sbuf_delete(sb);
 	return (err);
 }
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 94e7ed1fe49..8179a998c67 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -2895,9 +2895,6 @@ build_medialist(struct port_info *pi, struct ifmedia *media)
 
 	switch(pi->port_type) {
 	case FW_PORT_TYPE_BT_XFI:
-		ifmedia_add(media, m | IFM_10G_T, data, NULL);
-		break;
-
 	case FW_PORT_TYPE_BT_XAUI:
 		ifmedia_add(media, m | IFM_10G_T, data, NULL);
 		/* fall through */
@@ -5086,12 +5083,11 @@ sysctl_int_array(SYSCTL_HANDLER_ARGS)
 	int rc, *i;
 	struct sbuf sb;
 
-	sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND);
+	sbuf_new_for_sysctl(&sb, NULL, 64, req);
 	for (i = arg1; arg2; arg2 -= sizeof(int), i++)
 		sbuf_printf(&sb, "%d ", *i);
 	sbuf_trim(&sb);
-	sbuf_finish(&sb);
-	rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
+	rc = sbuf_finish(&sb);
 	sbuf_delete(&sb);
 	return (rc);
 }
diff --git a/sys/dev/cxgbe/t4_netmap.c b/sys/dev/cxgbe/t4_netmap.c
index 041afbf15cf..7d486038122 100644
--- a/sys/dev/cxgbe/t4_netmap.c
+++ b/sys/dev/cxgbe/t4_netmap.c
@@ -58,6 +58,25 @@ extern int fl_pad;	/* XXXNM */
 extern int spg_len;	/* XXXNM */
 extern int fl_pktshift;	/* XXXNM */
 
+SYSCTL_NODE(_hw, OID_AUTO, cxgbe, CTLFLAG_RD, 0, "cxgbe netmap parameters");
+
+/*
+ * 0 = normal netmap rx
+ * 1 = black hole
+ * 2 = supermassive black hole (buffer packing enabled)
+ */
+int black_hole = 0;
+SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_black_hole, CTLFLAG_RDTUN, &black_hole, 0,
+    "Sink incoming packets.");
+
+int rx_ndesc = 256;
+SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_rx_ndesc, CTLFLAG_RWTUN,
+    &rx_ndesc, 0, "# of rx descriptors after which the hw cidx is updated.");
+
+int holdoff_tmr_idx = 2;
+SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_holdoff_tmr_idx, CTLFLAG_RWTUN,
+    &holdoff_tmr_idx, 0, "Holdoff timer index for netmap rx queues.");
+
 /* netmap ifnet routines */
 static void cxgbe_nm_init(void *);
 static int cxgbe_nm_ioctl(struct ifnet *, unsigned long, caddr_t);
@@ -275,11 +294,12 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong)
 	c.iqns_to_fl0congen |=
 	    htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
 		F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
-		(fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0));
+		(fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
+		(black_hole == 2 ? F_FW_IQ_CMD_FL0PACKEN : 0));
 	c.fl0dcaen_to_fl0cidxfthresh =
 	    htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
 		V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
-	c.fl0size = htobe16(na->num_rx_desc + spg_len / EQ_ESIZE);
+	c.fl0size = htobe16(na->num_rx_desc / 8 + spg_len / EQ_ESIZE);
 	c.fl0addr = htobe64(nm_rxq->fl_ba);
 
 	rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
@@ -344,8 +364,8 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong)
 	}
 
 	t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
-	    V_SEINTARM(V_QINTR_TIMER_IDX(1)) |
-	    V_INGRESSQID(nm_rxq->iq_cntxt_id));
+	    V_INGRESSQID(nm_rxq->iq_cntxt_id) |
+	    V_SEINTARM(V_QINTR_TIMER_IDX(holdoff_tmr_idx)));
 
 	return (rc);
 }
@@ -491,13 +511,14 @@ cxgbe_netmap_on(struct adapter *sc, struct port_info *pi, struct ifnet *ifp,
 		/* We deal with 8 bufs at a time */
 		MPASS((na->num_rx_desc & 7) == 0);
 		MPASS(na->num_rx_desc == nm_rxq->fl_sidx);
-		for (j = 0; j < nm_rxq->fl_sidx - 8; j++) {
+		for (j = 0; j < nm_rxq->fl_sidx; j++) {
 			uint64_t ba;
 
 			PNMB(na, &slot[j], &ba);
+			MPASS(ba != 0);
 			nm_rxq->fl_desc[j] = htobe64(ba | hwidx);
 		}
-		nm_rxq->fl_pidx = j;
+		j = nm_rxq->fl_pidx = nm_rxq->fl_sidx - 8;
 		MPASS((j & 7) == 0);
 		j /= 8;	/* driver pidx to hardware pidx */
 		wmb();
@@ -708,6 +729,7 @@ cxgbe_nm_tx(struct adapter *sc, struct sge_nm_txq *nm_txq,
 		for (i = 0; i < n; i++) {
 			slot = &ring->slot[kring->nr_hwcur];
 			PNMB(kring->na, slot, &ba);
+			MPASS(ba != 0);
 
 			cpl->ctrl0 = nm_txq->cpl_ctrl0;
 			cpl->pack = 0;
@@ -904,6 +926,9 @@ cxgbe_netmap_rxsync(struct netmap_kring *kring, int flags)
 	u_int n;
 	int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR;
 
+	if (black_hole)
+		return (0);	/* No updates ever. */
+
 	if (netmap_no_pendintr || force_update) {
 		kring->nr_hwtail = atomic_load_acq_32(&nm_rxq->fl_cidx);
 		kring->nr_kflags &= ~NKR_PENDINTR;
@@ -933,6 +958,7 @@ cxgbe_netmap_rxsync(struct netmap_kring *kring, int flags)
 		while (n > 0) {
 			for (i = 0; i < 8; i++, fl_pidx++, slot++) {
 				PNMB(na, slot, &ba);
+				MPASS(ba != 0);
 				nm_rxq->fl_desc[fl_pidx] = htobe64(ba | hwidx);
 				slot->flags &= ~NS_BUF_CHANGED;
 				MPASS(fl_pidx <= nm_rxq->fl_sidx);
@@ -1107,10 +1133,10 @@ t4_nm_intr(void *arg)
 	struct netmap_ring *ring = kring->ring;
 	struct iq_desc *d = &nm_rxq->iq_desc[nm_rxq->iq_cidx];
 	uint32_t lq;
-	u_int n = 0;
-	int processed = 0;
+	u_int n = 0, work = 0;
 	uint8_t opcode;
 	uint32_t fl_cidx = atomic_load_acq_32(&nm_rxq->fl_cidx);
+	u_int fl_credits = fl_cidx & 7;
 
 	while ((d->rsp.u.type_gen & F_RSPD_GEN) == nm_rxq->iq_gen) {
 
@@ -1121,8 +1147,10 @@ t4_nm_intr(void *arg)
 
 		switch (G_RSPD_TYPE(d->rsp.u.type_gen)) {
 		case X_RSPD_TYPE_FLBUF:
-			/* No buffer packing so new buf every time */
-			MPASS(lq & F_RSPD_NEWBUF);
+			if (black_hole != 2) {
+				/* No buffer packing so new buf every time */
+				MPASS(lq & F_RSPD_NEWBUF);
+			}
 
 			/* fall through */
 
@@ -1138,7 +1166,9 @@ t4_nm_intr(void *arg)
 			case CPL_RX_PKT:
 				ring->slot[fl_cidx].len = G_RSPD_LEN(lq) - fl_pktshift;
 				ring->slot[fl_cidx].flags = kring->nkr_slot_flags;
-				if (__predict_false(++fl_cidx == nm_rxq->fl_sidx))
+				fl_cidx += (lq & F_RSPD_NEWBUF) ? 1 : 0;
+				fl_credits += (lq & F_RSPD_NEWBUF) ? 1 : 0;
+				if (__predict_false(fl_cidx == nm_rxq->fl_sidx))
 					fl_cidx = 0;
 				break;
 			default:
@@ -1164,19 +1194,37 @@ t4_nm_intr(void *arg)
 			nm_rxq->iq_gen ^= F_RSPD_GEN;
 		}
 
-		if (__predict_false(++n == 64)) {	/* XXXNM: tune */
+		if (__predict_false(++n == rx_ndesc)) {
+			atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
+			if (black_hole && fl_credits >= 8) {
+				fl_credits /= 8;
+				IDXINCR(nm_rxq->fl_pidx, fl_credits * 8,
+				    nm_rxq->fl_sidx);
+				t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
+				    nm_rxq->fl_db_val | V_PIDX(fl_credits));
+				fl_credits = fl_cidx & 7;
+			} else if (!black_hole) {
+				netmap_rx_irq(ifp, nm_rxq->nid, &work);
+				MPASS(work != 0);
+			}
 			t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
 			    V_CIDXINC(n) | V_INGRESSQID(nm_rxq->iq_cntxt_id) |
 			    V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
 			n = 0;
 		}
 	}
-	if (fl_cidx != nm_rxq->fl_cidx) {
-		atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
-		netmap_rx_irq(ifp, nm_rxq->nid, &processed);
-	}
+
+	atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
+	if (black_hole) {
+		fl_credits /= 8;
+		IDXINCR(nm_rxq->fl_pidx, fl_credits * 8, nm_rxq->fl_sidx);
+		t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
+		    nm_rxq->fl_db_val | V_PIDX(fl_credits));
+	} else
+		netmap_rx_irq(ifp, nm_rxq->nid, &work);
+
 	t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(n) |
 	    V_INGRESSQID((u32)nm_rxq->iq_cntxt_id) |
-	    V_SEINTARM(V_QINTR_TIMER_IDX(1)));
+	    V_SEINTARM(V_QINTR_TIMER_IDX(holdoff_tmr_idx)));
 }
 #endif
diff --git a/sys/dev/cxgbe/tom/t4_ddp.c b/sys/dev/cxgbe/tom/t4_ddp.c
index 6908de93ff1..7c2cec42bd9 100644
--- a/sys/dev/cxgbe/tom/t4_ddp.c
+++ b/sys/dev/cxgbe/tom/t4_ddp.c
@@ -65,6 +65,13 @@ __FBSDID("$FreeBSD$");
 #include "common/t4_tcb.h"
 #include "tom/t4_tom.h"
 
+VNET_DECLARE(int, tcp_do_autorcvbuf);
+#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf)
+VNET_DECLARE(int, tcp_autorcvbuf_inc);
+#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc)
+VNET_DECLARE(int, tcp_autorcvbuf_max);
+#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max)
+
 #define PPOD_SZ(n)	((n) * sizeof(struct pagepod))
 #define PPOD_SIZE	(PPOD_SZ(1))
 
@@ -411,6 +418,21 @@ handle_ddp_data(struct toepcb *toep, __be32 ddp_report, __be32 rcv_nxt, int len)
 	else
 		discourage_ddp(toep);
 
+	/* receive buffer autosize */
+	if (sb->sb_flags & SB_AUTOSIZE &&
+	    V_tcp_do_autorcvbuf &&
+	    sb->sb_hiwat < V_tcp_autorcvbuf_max &&
+	    len > (sbspace(sb) / 8 * 7)) {
+		unsigned int hiwat = sb->sb_hiwat;
+		unsigned int newsize = min(hiwat + V_tcp_autorcvbuf_inc,
+		    V_tcp_autorcvbuf_max);
+
+		if (!sbreserve_locked(sb, newsize, so, NULL))
+			sb->sb_flags &= ~SB_AUTOSIZE;
+		else
+			toep->rx_credits += newsize - hiwat;
+	}
+
 	KASSERT(toep->sb_cc >= sbused(sb),
 	    ("%s: sb %p has more data (%d) than last time (%d).",
 	    __func__, sb, sbused(sb), toep->sb_cc));
diff --git a/sys/dev/drm2/drm_pci.c b/sys/dev/drm2/drm_pci.c
index 50af71da119..40431fafd5c 100644
--- a/sys/dev/drm2/drm_pci.c
+++ b/sys/dev/drm2/drm_pci.c
@@ -76,7 +76,9 @@ drm_pci_alloc(struct drm_device *dev, size_t size,
 	if (mtx_owned(&dev->dma_lock))
 	    DRM_ERROR("called while holding dma_lock\n");
 
-	ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
+	ret = bus_dma_tag_create(
+	    bus_get_dma_tag(dev->device), /* parent */
+	    align, 0, /* align, boundary */
 	    maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
 	    NULL, NULL, /* filtfunc, filtfuncargs */
 	    size, 1, size, /* maxsize, nsegs, maxsegsize */
diff --git a/sys/dev/etherswitch/arswitch/arswitch.c b/sys/dev/etherswitch/arswitch/arswitch.c
index 129a77dad4a..3b1d5750b0f 100644
--- a/sys/dev/etherswitch/arswitch/arswitch.c
+++ b/sys/dev/etherswitch/arswitch/arswitch.c
@@ -149,8 +149,10 @@ arswitch_probe(device_t dev)
 	DPRINTF(dev, "chipname=%s, id=%08x\n", chipname, id);
 	if (chipname != NULL) {
 		snprintf(desc, sizeof(desc),
-		    "Atheros %s Ethernet Switch",
-		    chipname);
+		    "Atheros %s Ethernet Switch (ver %d rev %d)",
+		    chipname,
+		    sc->chip_ver,
+		    sc->chip_rev);
 		device_set_desc_copy(dev, desc);
 		return (BUS_PROBE_DEFAULT);
 	}
@@ -177,9 +179,11 @@ arswitch_attach_phys(struct arswitch_softc *sc)
 		err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy],
 		    arswitch_ifmedia_upd, arswitch_ifmedia_sts, \
 		    BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
+#if 0
 		DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
 		    device_get_nameunit(sc->miibus[phy]),
 		    sc->ifp[phy]->if_xname);
+#endif
 		if (err != 0) {
 			device_printf(sc->sc_dev,
 			    "attaching PHY %d failed\n",
@@ -299,12 +303,26 @@ arswitch_attach(device_t dev)
 	sc->hal.arswitch_port_vlan_setup = ar8xxx_port_vlan_setup;
 	sc->hal.arswitch_port_vlan_get = ar8xxx_port_vlan_get;
 	sc->hal.arswitch_vlan_init_hw = ar8xxx_reset_vlans;
+
 	sc->hal.arswitch_vlan_getvgroup = ar8xxx_getvgroup;
 	sc->hal.arswitch_vlan_setvgroup = ar8xxx_setvgroup;
+
 	sc->hal.arswitch_vlan_get_pvid = ar8xxx_get_pvid;
 	sc->hal.arswitch_vlan_set_pvid = ar8xxx_set_pvid;
+
+	sc->hal.arswitch_get_dot1q_vlan = ar8xxx_get_dot1q_vlan;
+	sc->hal.arswitch_set_dot1q_vlan = ar8xxx_set_dot1q_vlan;
+	sc->hal.arswitch_flush_dot1q_vlan = ar8xxx_flush_dot1q_vlan;
+	sc->hal.arswitch_purge_dot1q_vlan = ar8xxx_purge_dot1q_vlan;
+	sc->hal.arswitch_get_port_vlan = ar8xxx_get_port_vlan;
+	sc->hal.arswitch_set_port_vlan = ar8xxx_set_port_vlan;
+
 	sc->hal.arswitch_atu_flush = ar8xxx_atu_flush;
 
+	sc->hal.arswitch_phy_read = arswitch_readphy_internal;
+	sc->hal.arswitch_phy_write = arswitch_writephy_internal;
+
+
 	/*
 	 * Attach switch related functions
 	 */
@@ -320,8 +338,10 @@ arswitch_attach(device_t dev)
 		ar8316_attach(sc);
 	else if (AR8X16_IS_SWITCH(sc, AR8327))
 		ar8327_attach(sc);
-	else
+	else {
+		DPRINTF(dev, "%s: unknown switch (%d)?\n", __func__, sc->sc_switchtype);
 		return (ENXIO);
+	}
 
 	/* Common defaults. */
 	sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */
@@ -348,14 +368,18 @@ arswitch_attach(device_t dev)
 		sc->numphys = AR8X16_NUM_PHYS;
 
 	/* Reset the switch. */
-	if (arswitch_reset(dev))
+	if (arswitch_reset(dev)) {
+		DPRINTF(dev, "%s: arswitch_reset: failed\n", __func__);
 		return (ENXIO);
+	}
 
 	err = sc->hal.arswitch_hw_setup(sc);
+	DPRINTF(dev, "%s: hw_setup: err=%d\n", __func__, err);
 	if (err != 0)
 		return (err);
 
 	err = sc->hal.arswitch_hw_global_setup(sc);
+	DPRINTF(dev, "%s: hw_global_setup: err=%d\n", __func__, err);
 	if (err != 0)
 		return (err);
 
@@ -368,17 +392,20 @@ arswitch_attach(device_t dev)
 	 * Attach the PHYs and complete the bus enumeration.
 	 */
 	err = arswitch_attach_phys(sc);
+	DPRINTF(dev, "%s: attach_phys: err=%d\n", __func__, err);
 	if (err != 0)
 		return (err);
 
 	/* Default to ingress filters off. */
 	err = arswitch_set_vlan_mode(sc, 0);
+	DPRINTF(dev, "%s: set_vlan_mode: err=%d\n", __func__, err);
 	if (err != 0)
 		return (err);
 
 	bus_generic_probe(dev);
 	bus_enumerate_hinted_children(dev);
 	err = bus_generic_attach(dev);
+	DPRINTF(dev, "%s: bus_generic_attach: err=%d\n", __func__, err);
 	if (err != 0)
 		return (err);
 	
@@ -611,6 +638,15 @@ ar8xxx_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p)
 	return (0);
 }
 
+static int
+arswitch_is_cpuport(struct arswitch_softc *sc, int port)
+{
+
+	return ((port == AR8X16_PORT_CPU) ||
+	    ((AR8X16_IS_SWITCH(sc, AR8327) &&
+	      port == AR8327_PORT_GMAC6)));
+}
+
 static int
 arswitch_getport(device_t dev, etherswitch_port_t *p)
 {
@@ -620,7 +656,8 @@ arswitch_getport(device_t dev, etherswitch_port_t *p)
 	int err;
 
 	sc = device_get_softc(dev);
-	if (p->es_port < 0 || p->es_port > sc->numphys)
+	/* XXX +1 is for AR8327; should make this configurable! */
+	if (p->es_port < 0 || p->es_port > sc->info.es_nports)
 		return (ENXIO);
 
 	err = sc->hal.arswitch_port_vlan_get(sc, p);
@@ -628,7 +665,7 @@ arswitch_getport(device_t dev, etherswitch_port_t *p)
 		return (err);
 
 	mii = arswitch_miiforport(sc, p->es_port);
-	if (p->es_port == AR8X16_PORT_CPU) {
+	if (arswitch_is_cpuport(sc, p->es_port)) {
 		/* fill in fixed values for CPU port */
 		/* XXX is this valid in all cases? */
 		p->es_flags |= ETHERSWITCH_PORT_CPU;
@@ -697,7 +734,7 @@ arswitch_setport(device_t dev, etherswitch_port_t *p)
 	struct ifnet *ifp;
 
 	sc = device_get_softc(dev);
-	if (p->es_port < 0 || p->es_port > sc->numphys)
+	if (p->es_port < 0 || p->es_port > sc->info.es_nports)
 		return (ENXIO);
 
 	/* Port flags. */
@@ -708,7 +745,7 @@ arswitch_setport(device_t dev, etherswitch_port_t *p)
 	}
 
 	/* Do not allow media changes on CPU port. */
-	if (p->es_port == AR8X16_PORT_CPU)
+	if (arswitch_is_cpuport(sc, p->es_port))
 		return (0);
 
 	mii = arswitch_miiforport(sc, p->es_port);
@@ -803,6 +840,22 @@ arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *e)
 	return (sc->hal.arswitch_vlan_setvgroup(sc, e));
 }
 
+static int
+arswitch_readphy(device_t dev, int phy, int reg)
+{
+	struct arswitch_softc *sc = device_get_softc(dev);
+
+	return (sc->hal.arswitch_phy_read(dev, phy, reg));
+}
+
+static int
+arswitch_writephy(device_t dev, int phy, int reg, int val)
+{
+	struct arswitch_softc *sc = device_get_softc(dev);
+
+	return (sc->hal.arswitch_phy_write(dev, phy, reg, val));
+}
+
 static device_method_t arswitch_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		arswitch_probe),
diff --git a/sys/dev/etherswitch/arswitch/arswitch_8327.c b/sys/dev/etherswitch/arswitch/arswitch_8327.c
index 642827d9916..e727416ad3a 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_8327.c
+++ b/sys/dev/etherswitch/arswitch/arswitch_8327.c
@@ -57,12 +57,60 @@
 #include <dev/etherswitch/arswitch/arswitchreg.h>
 #include <dev/etherswitch/arswitch/arswitchvar.h>
 #include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_phy.h>
+#include <dev/etherswitch/arswitch/arswitch_vlans.h>
+
 #include <dev/etherswitch/arswitch/arswitch_8327.h>
 
 #include "mdio_if.h"
 #include "miibus_if.h"
 #include "etherswitch_if.h"
 
+
+static int
+ar8327_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
+    uint32_t data)
+{
+	int err;
+
+	/*
+	 * Wait for the "done" bit to finish.
+	 */
+	if (arswitch_waitreg(sc->sc_dev, AR8327_REG_VTU_FUNC1,
+	    AR8327_VTU_FUNC1_BUSY, 0, 5))
+		return (EBUSY);
+
+	/*
+	 * If it's a "load" operation, then ensure 'data' is loaded
+	 * in first.
+	 */
+	if ((op & AR8327_VTU_FUNC1_OP) == AR8327_VTU_FUNC1_OP_LOAD) {
+		err = arswitch_writereg(sc->sc_dev, AR8327_REG_VTU_FUNC0, data);
+		if (err)
+			return (err);
+	}
+
+	/*
+	 * Set the VID.
+	 */
+	op |= ((vid & 0xfff) << AR8327_VTU_FUNC1_VID_S);
+
+	/*
+	 * Set busy bit to start loading in the command.
+	 */
+	op |= AR8327_VTU_FUNC1_BUSY;
+	arswitch_writereg(sc->sc_dev, AR8327_REG_VTU_FUNC1, op);
+
+	/*
+	 * Finally - wait for it to load.
+	 */
+	if (arswitch_waitreg(sc->sc_dev, AR8327_REG_VTU_FUNC1,
+	    AR8327_VTU_FUNC1_BUSY, 0, 5))
+		return (EBUSY);
+
+	return (0);
+}
+
 static void
 ar8327_phy_fixup(struct arswitch_softc *sc, int phy)
 {
@@ -290,7 +338,7 @@ ar8327_fetch_pdata_port(struct arswitch_softc *sc,
 	    sbuf, &val) == 0)
 		pcfg->rxpause = val;
 
-#if 0
+#if 1
 	device_printf(sc->sc_dev,
 	    "%s: port %d: speed=%d, duplex=%d, txpause=%d, rxpause=%d\n",
 	    __func__,
@@ -562,6 +610,7 @@ ar8327_init_pdata(struct arswitch_softc *sc)
 	/* SGMII config */
 	bzero(&scfg, sizeof(scfg));
 	if (ar8327_fetch_pdata_sgmii(sc, &scfg)) {
+		device_printf(sc->sc_dev, "%s: SGMII cfg?\n", __func__);
 		t = scfg.sgmii_ctrl;
 		if (sc->chip_rev == 1)
 			t |= AR8327_SGMII_CTRL_EN_PLL |
@@ -651,18 +700,23 @@ ar8327_hw_global_setup(struct arswitch_softc *sc)
 	arswitch_writereg(sc->sc_dev, AR8327_REG_EEE_CTRL, t);
 
 	/* Set the right number of ports */
-	sc->info.es_nports = 6;
+	/* GMAC0 (CPU), GMAC1..5 (PHYs), GMAC6 (CPU) */
+	sc->info.es_nports = 7;
 
 	return (0);
 }
 
 /*
- * Port setup.
+ * Port setup.  Called at attach time.
  */
 static void
 ar8327_port_init(struct arswitch_softc *sc, int port)
 {
 	uint32_t t;
+	int ports;
+
+	/* For now, port can see all other ports */
+	ports = 0x7f;
 
 	if (port == AR8X16_PORT_CPU)
 		t = sc->ar8327.port0_status;
@@ -696,7 +750,7 @@ ar8327_port_init(struct arswitch_softc *sc, int port)
 	t |= AR8X16_PORT_CTRL_STATE_FORWARD << AR8327_PORT_LOOKUP_STATE_S;
 
 	/* So this allows traffic to any port except ourselves */
-	t |= (0x7f & ~(1 << port));
+	t |= (ports & ~(1 << port));
 	arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_LOOKUP(port), t);
 }
 
@@ -704,25 +758,72 @@ static int
 ar8327_port_vlan_setup(struct arswitch_softc *sc, etherswitch_port_t *p)
 {
 
-	/* XXX stub for now */
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
+	/* Check: ADDTAG/STRIPTAG - exclusive */
+
+	ARSWITCH_LOCK(sc);
+
+	/* Set the PVID. */
+	if (p->es_pvid != 0)
+		sc->hal.arswitch_vlan_set_pvid(sc, p->es_port, p->es_pvid);
+
+	/*
+	 * DOUBLE_TAG
+	 * VLAN_MODE_ADD
+	 * VLAN_MODE_STRIP
+	 */
+	ARSWITCH_UNLOCK(sc);
 	return (0);
 }
 
+/*
+ * Get the port VLAN configuration.
+ */
 static int
 ar8327_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p)
 {
 
-	/* XXX stub for now */
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
+	ARSWITCH_LOCK(sc);
+
+	/* Retrieve the PVID */
+	sc->hal.arswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid);
+
+	/* Retrieve the current port configuration from the VTU */
+	/*
+	 * DOUBLE_TAG
+	 * VLAN_MODE_ADD
+	 * VLAN_MODE_STRIP
+	 */
+
+	ARSWITCH_UNLOCK(sc);
 	return (0);
 }
 
+static void
+ar8327_port_disable_mirror(struct arswitch_softc *sc, int port)
+{
+
+	arswitch_modifyreg(sc->sc_dev,
+	    AR8327_REG_PORT_LOOKUP(port),
+	    AR8327_PORT_LOOKUP_ING_MIRROR_EN,
+	    0);
+	arswitch_modifyreg(sc->sc_dev,
+	    AR8327_REG_PORT_HOL_CTRL1(port),
+	    AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
+	    0);
+}
+
 static void
 ar8327_reset_vlans(struct arswitch_softc *sc)
 {
 	int i;
-	uint32_t mode, t;
+	uint32_t t;
+	int ports;
+
+	ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+	ARSWITCH_LOCK(sc);
+
+	/* Clear the existing VLAN configuration */
+	memset(sc->vid, 0, sizeof(sc->vid));
 
 	/*
 	 * Disable mirroring.
@@ -731,74 +832,164 @@ ar8327_reset_vlans(struct arswitch_softc *sc)
 	    AR8327_FWD_CTRL0_MIRROR_PORT,
 	    (0xF << AR8327_FWD_CTRL0_MIRROR_PORT_S));
 
+	/*
+	 * XXX TODO: disable any Q-in-Q port configuration,
+	 * tagging, egress filters, etc.
+	 */
+
 	/*
 	 * For now, let's default to one portgroup, just so traffic
-	 * flows.  All ports can see other ports.
+	 * flows.  All ports can see other ports. There are two CPU GMACs
+	 * (GMAC0, GMAC6), GMAC1..GMAC5 are external PHYs.
+	 *
+	 * (ETHERSWITCH_VLAN_PORT)
+	 */
+	ports = 0x7f;
+
+	/*
+	 * XXX TODO: set things up correctly for vlans!
 	 */
 	for (i = 0; i < AR8327_NUM_PORTS; i++) {
-		/* set pvid = 1; there's only one vlangroup */
+		int egress, ingress;
+
+		if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
+			sc->vid[i] = i | ETHERSWITCH_VID_VALID;
+			/* set egress == out_keep */
+			ingress = AR8X16_PORT_VLAN_MODE_PORT_ONLY;
+			/* in_port_only, forward */
+			egress = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH;
+		} else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+			ingress = AR8X16_PORT_VLAN_MODE_SECURE;
+			egress = AR8327_PORT_VLAN1_OUT_MODE_UNMOD;
+		} else {
+			/* set egress == out_keep */
+			ingress = AR8X16_PORT_VLAN_MODE_PORT_ONLY;
+			/* in_port_only, forward */
+			egress = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH;
+		}
+
+		/* set pvid = 1; there's only one vlangroup to start with */
 		t = 1 << AR8327_PORT_VLAN0_DEF_SVID_S;
 		t |= 1 << AR8327_PORT_VLAN0_DEF_CVID_S;
 		arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_VLAN0(i), t);
 
-		/* set egress == out_keep */
-		mode = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH;
-
 		t = AR8327_PORT_VLAN1_PORT_VLAN_PROP;
-		t |= mode << AR8327_PORT_VLAN1_OUT_MODE_S;
+		t |= egress << AR8327_PORT_VLAN1_OUT_MODE_S;
 		arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_VLAN1(i), t);
 
 		/* Ports can see other ports */
-		t = (0x7f & ~(1 << i));	/* all ports besides us */
+		/* XXX not entirely true for dot1q? */
+		t = (ports & ~(1 << i));	/* all ports besides us */
 		t |= AR8327_PORT_LOOKUP_LEARN;
 
-		/* in_port_only, forward */
-		t |= AR8X16_PORT_VLAN_MODE_PORT_ONLY << AR8327_PORT_LOOKUP_IN_MODE_S;
+		t |= ingress << AR8327_PORT_LOOKUP_IN_MODE_S;
 		t |= AR8X16_PORT_CTRL_STATE_FORWARD << AR8327_PORT_LOOKUP_STATE_S;
 		arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_LOOKUP(i), t);
-
-		/*
-		 * Disable port mirroring entirely.
-		 */
-		arswitch_modifyreg(sc->sc_dev,
-		    AR8327_REG_PORT_LOOKUP(i),
-		    AR8327_PORT_LOOKUP_ING_MIRROR_EN,
-		    0);
-		arswitch_modifyreg(sc->sc_dev,
-		    AR8327_REG_PORT_HOL_CTRL1(i),
-		    AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
-		    0);
 	}
+
+	/*
+	 * Disable port mirroring entirely.
+	 */
+	for (i = 0; i < AR8327_NUM_PORTS; i++) {
+		ar8327_port_disable_mirror(sc, i);
+	}
+
+	/*
+	 * If dot1q - set pvid; dot1q, etc.
+	 */
+	sc->vid[0] = 1;
+	if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+		for (i = 0; i < AR8327_NUM_PORTS; i++) {
+			/* Each port - pvid 1 */
+			sc->hal.arswitch_vlan_set_pvid(sc, i, sc->vid[0]);
+		}
+		/* Initialise vlan1 - all ports, untagged */
+		sc->hal.arswitch_set_dot1q_vlan(sc, ports, ports, sc->vid[0]);
+		sc->vid[0] |= ETHERSWITCH_VID_VALID;
+	}
+
+	ARSWITCH_UNLOCK(sc);
+}
+
+static int
+ar8327_vlan_get_port(struct arswitch_softc *sc, uint32_t *ports, int vid)
+{
+	int port;
+	uint32_t reg;
+
+	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+	/* For port based vlans the vlanid is the same as the port index. */
+	port = vid & ETHERSWITCH_VID_MASK;
+	reg = arswitch_readreg(sc->sc_dev, AR8327_REG_PORT_LOOKUP(port));
+	*ports = reg & 0x7f;
+	return (0);
+}
+
+static int
+ar8327_vlan_set_port(struct arswitch_softc *sc, uint32_t ports, int vid)
+{
+	int err, port;
+
+	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+	/* For port based vlans the vlanid is the same as the port index. */
+	port = vid & ETHERSWITCH_VID_MASK;
+
+	err = arswitch_modifyreg(sc->sc_dev, AR8327_REG_PORT_LOOKUP(port),
+	    0x7f, /* vlan membership mask */
+	    (ports & 0x7f));
+
+	if (err)
+		return (err);
+	return (0);
 }
 
 static int
 ar8327_vlan_getvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
 {
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
-	return (0);
+
+	return (ar8xxx_getvgroup(sc, vg));
 }
 
 static int
 ar8327_vlan_setvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
 {
 
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
-	return (0);
+	return (ar8xxx_setvgroup(sc, vg));
 }
 
 static int
 ar8327_get_pvid(struct arswitch_softc *sc, int port, int *pvid)
 {
+	uint32_t reg;
 
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
+	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+	/*
+	 * XXX for now, assuming it's CVID; likely very wrong!
+	 */
+	port = port & ETHERSWITCH_VID_MASK;
+	reg = arswitch_readreg(sc->sc_dev, AR8327_REG_PORT_VLAN0(port));
+	reg = reg >> AR8327_PORT_VLAN0_DEF_CVID_S;
+	reg = reg & 0xfff;
+
+	*pvid = reg;
 	return (0);
 }
 
 static int
 ar8327_set_pvid(struct arswitch_softc *sc, int port, int pvid)
 {
+	uint32_t t;
+
+	/* Limit pvid to valid values */
+	pvid &= 0x7f;
+
+	t = pvid << AR8327_PORT_VLAN0_DEF_SVID_S;
+	t |= pvid << AR8327_PORT_VLAN0_DEF_CVID_S;
+	arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_VLAN0(port), t);
 
-	device_printf(sc->sc_dev, "%s: called\n", __func__);
 	return (0);
 }
 
@@ -824,6 +1015,98 @@ ar8327_atu_flush(struct arswitch_softc *sc)
 	return (ret);
 }
 
+static int
+ar8327_flush_dot1q_vlan(struct arswitch_softc *sc)
+{
+
+	return (ar8327_vlan_op(sc, AR8327_VTU_FUNC1_OP_FLUSH, 0, 0));
+}
+
+static int
+ar8327_purge_dot1q_vlan(struct arswitch_softc *sc, int vid)
+{
+
+	return (ar8327_vlan_op(sc, AR8327_VTU_FUNC1_OP_PURGE, vid, 0));
+}
+
+static int
+ar8327_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports,
+    uint32_t *untagged_ports, int vid)
+{
+	int i, r;
+	uint32_t op, reg, val;
+
+	op = AR8327_VTU_FUNC1_OP_GET_ONE;
+
+	/* Filter out the vid flags; only grab the VLAN ID */
+	vid &= 0xfff;
+
+	/* XXX TODO: the VTU here stores egress mode - keep, tag, untagged, none */
+	r = ar8327_vlan_op(sc, op, vid, 0);
+	if (r != 0) {
+		device_printf(sc->sc_dev, "%s: %d: op failed\n", __func__, vid);
+	}
+
+	reg = arswitch_readreg(sc->sc_dev, AR8327_REG_VTU_FUNC0);
+	DPRINTF(sc->sc_dev, "%s: %d: reg=0x%08x\n", __func__, vid, reg);
+
+	/*
+	 * If any of the bits are set, update the port mask.
+	 * Worry about the port config itself when getport() is called.
+	 */
+	*ports = 0;
+	for (i = 0; i < AR8327_NUM_PORTS; i++) {
+		val = reg >> AR8327_VTU_FUNC0_EG_MODE_S(i);
+		val = val & 0x3;
+		/* XXX KEEP (unmodified?) */
+		if (val == AR8327_VTU_FUNC0_EG_MODE_TAG) {
+			*ports |= (1 << i);
+		} else if (val == AR8327_VTU_FUNC0_EG_MODE_UNTAG) {
+			*ports |= (1 << i);
+			*untagged_ports |= (1 << i);
+		}
+	}
+
+	return (0);
+}
+
+static int
+ar8327_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports,
+    uint32_t untagged_ports, int vid)
+{
+	int i;
+	uint32_t op, val, mode;
+
+	op = AR8327_VTU_FUNC1_OP_LOAD;
+	vid &= 0xfff;
+
+	DPRINTF(sc->sc_dev,
+	    "%s: vid: %d, ports=0x%08x, untagged_ports=0x%08x\n",
+	    __func__,
+	    vid,
+	    ports,
+	    untagged_ports);
+
+	/*
+	 * Mark it as valid; and that it should use per-VLAN MAC table,
+	 * not VID=0 when doing MAC lookups
+	 */
+	val = AR8327_VTU_FUNC0_VALID | AR8327_VTU_FUNC0_IVL;
+
+	for (i = 0; i < AR8327_NUM_PORTS; i++) {
+		if ((ports & BIT(i)) == 0)
+			mode = AR8327_VTU_FUNC0_EG_MODE_NOT;
+		else if (untagged_ports & BIT(i))
+			mode = AR8327_VTU_FUNC0_EG_MODE_UNTAG;
+		else
+			mode = AR8327_VTU_FUNC0_EG_MODE_TAG;
+
+		val |= mode << AR8327_VTU_FUNC0_EG_MODE_S(i);
+	}
+
+	return (ar8327_vlan_op(sc, op, vid, val));
+}
+
 void
 ar8327_attach(struct arswitch_softc *sc)
 {
@@ -832,17 +1115,36 @@ ar8327_attach(struct arswitch_softc *sc)
 	sc->hal.arswitch_hw_global_setup = ar8327_hw_global_setup;
 
 	sc->hal.arswitch_port_init = ar8327_port_init;
-	sc->hal.arswitch_port_vlan_setup = ar8327_port_vlan_setup;
-	sc->hal.arswitch_port_vlan_get = ar8327_port_vlan_get;
 
-	sc->hal.arswitch_vlan_init_hw = ar8327_reset_vlans;
 	sc->hal.arswitch_vlan_getvgroup = ar8327_vlan_getvgroup;
 	sc->hal.arswitch_vlan_setvgroup = ar8327_vlan_setvgroup;
+	sc->hal.arswitch_port_vlan_setup = ar8327_port_vlan_setup;
+	sc->hal.arswitch_port_vlan_get = ar8327_port_vlan_get;
+	sc->hal.arswitch_flush_dot1q_vlan = ar8327_flush_dot1q_vlan;
+	sc->hal.arswitch_purge_dot1q_vlan = ar8327_purge_dot1q_vlan;
+	sc->hal.arswitch_set_dot1q_vlan = ar8327_set_dot1q_vlan;
+	sc->hal.arswitch_get_dot1q_vlan = ar8327_get_dot1q_vlan;
+
+	sc->hal.arswitch_vlan_init_hw = ar8327_reset_vlans;
 	sc->hal.arswitch_vlan_get_pvid = ar8327_get_pvid;
 	sc->hal.arswitch_vlan_set_pvid = ar8327_set_pvid;
 
+	sc->hal.arswitch_get_port_vlan = ar8327_vlan_get_port;
+	sc->hal.arswitch_set_port_vlan = ar8327_vlan_set_port;
+
 	sc->hal.arswitch_atu_flush = ar8327_atu_flush;
 
+	/*
+	 * Reading the PHY via the MDIO interface currently doesn't
+	 * work correctly.
+	 *
+	 * So for now, just go direct to the PHY registers themselves.
+	 * This has always worked  on external devices, but not internal
+	 * devices (AR934x, AR724x, AR933x.)
+	 */
+	sc->hal.arswitch_phy_read = arswitch_readphy_external;
+	sc->hal.arswitch_phy_write = arswitch_writephy_external;
+
 	/* Set the switch vlan capabilities. */
 	sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
 	    ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
diff --git a/sys/dev/etherswitch/arswitch/arswitch_phy.c b/sys/dev/etherswitch/arswitch/arswitch_phy.c
index 928ca03dbe4..43abaa12d07 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_phy.c
+++ b/sys/dev/etherswitch/arswitch/arswitch_phy.c
@@ -67,11 +67,46 @@ static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
 #endif
 
 /*
- * access PHYs integrated into the switch chip through the switch's MDIO
+ * Access PHYs integrated into the switch by going direct
+ * to the PHY space itself, rather than through the switch
+ * MDIO register.
+ */
+int
+arswitch_readphy_external(device_t dev, int phy, int reg)
+{
+	int ret;
+	struct arswitch_softc *sc;
+
+	sc = device_get_softc(dev);
+
+	ARSWITCH_LOCK(sc);
+	ret = (MDIO_READREG(device_get_parent(dev), phy, reg));
+	ARSWITCH_UNLOCK(sc);
+
+	return (ret);
+}
+
+int
+arswitch_writephy_external(device_t dev, int phy, int reg, int data)
+{
+	struct arswitch_softc *sc;
+
+	sc = device_get_softc(dev);
+
+	ARSWITCH_LOCK(sc);
+	(void) MDIO_WRITEREG(device_get_parent(dev), phy,
+	    reg, data);
+	ARSWITCH_UNLOCK(sc);
+
+	return (0);
+}
+
+/*
+ * Access PHYs integrated into the switch chip through the switch's MDIO
  * control register.
  */
 int
-arswitch_readphy(device_t dev, int phy, int reg)
+arswitch_readphy_internal(device_t dev, int phy, int reg)
 {
 	struct arswitch_softc *sc;
 	uint32_t data = 0, ctrl;
@@ -105,8 +140,10 @@ arswitch_readphy(device_t dev, int phy, int reg)
 		if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
 			break;
 	}
-	if (timeout < 0)
+	if (timeout < 0) {
+		DPRINTF(dev, "arswitch_readphy(): phy=%d.%02x; timeout=%d\n", phy, reg, timeout);
 		goto fail;
+	}
 	data = arswitch_readreg_lsb(dev, a) &
 	    AR8X16_MDIO_CTRL_DATA_MASK;
 	ARSWITCH_UNLOCK(sc);
@@ -118,7 +155,7 @@ arswitch_readphy(device_t dev, int phy, int reg)
 }
 
 int
-arswitch_writephy(device_t dev, int phy, int reg, int data)
+arswitch_writephy_internal(device_t dev, int phy, int reg, int data)
 {
 	struct arswitch_softc *sc;
 	uint32_t ctrl;
diff --git a/sys/dev/etherswitch/arswitch/arswitch_phy.h b/sys/dev/etherswitch/arswitch/arswitch_phy.h
index a3b762746df..885be271127 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_phy.h
+++ b/sys/dev/etherswitch/arswitch/arswitch_phy.h
@@ -28,7 +28,10 @@
 #ifndef	__ARSWITCH_PHY_H__
 #define	__ARSWITCH_PHY_H__
 
-extern	int arswitch_readphy(device_t dev, int phy, int reg);
-extern	int arswitch_writephy(device_t dev, int phy, int reg, int data);
+extern	int arswitch_readphy_external(device_t dev, int phy, int reg);
+extern	int arswitch_writephy_external(device_t dev, int phy, int reg, int data);
+
+extern	int arswitch_readphy_internal(device_t dev, int phy, int reg);
+extern	int arswitch_writephy_internal(device_t dev, int phy, int reg, int data);
 
 #endif	/* __ARSWITCH_PHY_H__ */
diff --git a/sys/dev/etherswitch/arswitch/arswitch_reg.c b/sys/dev/etherswitch/arswitch/arswitch_reg.c
index 3251da8a2ee..d6797a8c572 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_reg.c
+++ b/sys/dev/etherswitch/arswitch/arswitch_reg.c
@@ -68,12 +68,13 @@ arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy,
 	struct arswitch_softc *sc = device_get_softc(dev);
 	uint16_t page;
 
-	page = ((addr) >> 9) & 0xffff;
-	*phy = (((addr) >> 6) & 0x07) | 0x10;
-	*reg = ((addr) >> 1) & 0x1f;
+	page = (addr >> 9) & 0x1ff;
+	*phy = (addr >> 6) & 0x7;
+	*reg = (addr >> 1) & 0x1f;
 
 	if (sc->page != page) {
 		MDIO_WRITEREG(device_get_parent(dev), 0x18, 0, page);
+		DELAY(2000);
 		sc->page = page;
 	}
 }
@@ -87,9 +88,21 @@ static inline int
 arswitch_readreg16(device_t dev, int addr)
 {
 	uint16_t phy, reg;
-	
+
 	arswitch_split_setpage(dev, addr, &phy, &reg);
-	return (MDIO_READREG(device_get_parent(dev), phy, reg));
+	return (MDIO_READREG(device_get_parent(dev), 0x10 | phy, reg));
+}
+
+/*
+ * Write half a register.  See above!
+ */
+static inline int
+arswitch_writereg16(device_t dev, int addr, int data)
+{
+	uint16_t phy, reg;
+
+	arswitch_split_setpage(dev, addr, &phy, &reg);
+	return (MDIO_WRITEREG(device_get_parent(dev), 0x10 | phy, reg, data));
 }
 
 /*
@@ -121,18 +134,70 @@ arswitch_writemmd(device_t dev, int phy, uint16_t dbg_addr,
 	    MII_ATH_MMD_DATA, dbg_data);
 }
 
-/*
- * Write half a register
- */
-static inline int
-arswitch_writereg16(device_t dev, int addr, int data)
+static uint32_t
+arswitch_reg_read32(device_t dev, int phy, int reg)
 {
-	uint16_t phy, reg;
-	
-	arswitch_split_setpage(dev, addr, &phy, &reg);
-	return (MDIO_WRITEREG(device_get_parent(dev), phy, reg, data));
+	uint16_t lo, hi;
+	lo = MDIO_READREG(device_get_parent(dev), phy, reg);
+	hi = MDIO_READREG(device_get_parent(dev), phy, reg + 1);
+
+	return (hi << 16) | lo;
 }
 
+static int
+arswitch_reg_write32(device_t dev, int phy, int reg, uint32_t value)
+{
+	struct arswitch_softc *sc;
+	int r;
+	uint16_t lo, hi;
+
+	sc = device_get_softc(dev);
+	lo = value & 0xffff;
+	hi = (uint16_t) (value >> 16);
+
+	if (sc->mii_lo_first) {
+		r = MDIO_WRITEREG(device_get_parent(dev),
+		    phy, reg, lo);
+		r |= MDIO_WRITEREG(device_get_parent(dev),
+		    phy, reg + 1, hi);
+	} else {
+		r = MDIO_WRITEREG(device_get_parent(dev),
+		    phy, reg + 1, hi);
+		r |= MDIO_WRITEREG(device_get_parent(dev),
+		    phy, reg, lo);
+	}
+
+	return r;
+}
+
+int
+arswitch_readreg(device_t dev, int addr)
+{
+	uint16_t phy, reg;
+
+	arswitch_split_setpage(dev, addr, &phy, &reg);
+	return arswitch_reg_read32(dev, 0x10 | phy, reg);
+}
+
+int
+arswitch_writereg(device_t dev, int addr, int value)
+{
+	struct arswitch_softc *sc;
+	uint16_t phy, reg;
+
+	sc = device_get_softc(dev);
+
+	arswitch_split_setpage(dev, addr, &phy, &reg);
+	return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
+}
+
+/*
+ * Read/write 16 bit values in the switch register space.
+ *
+ * Some of the registers are control registers (eg the MDIO
+ * data versus control space) and so need to be treated
+ * differently.
+ */
 int
 arswitch_readreg_lsb(device_t dev, int addr)
 {
@@ -161,53 +226,31 @@ arswitch_writereg_msb(device_t dev, int addr, int data)
 	return (arswitch_writereg16(dev, addr + 2, (data >> 16) & 0xffff));
 }
 
-int
-arswitch_readreg(device_t dev, int addr)
-{
-
-	return (arswitch_readreg_lsb(dev, addr) |
-	    arswitch_readreg_msb(dev, addr));
-}
-
-int
-arswitch_writereg(device_t dev, int addr, int value)
-{
-	struct arswitch_softc *sc;
-	int r;
-
-	sc = device_get_softc(dev);
-
-	/* XXX Check the first write too? */
-	if (sc->mii_lo_first) {
-		r = arswitch_writereg_lsb(dev, addr, value);
-		r |= arswitch_writereg_msb(dev, addr, value);
-	} else {
-		r = arswitch_writereg_msb(dev, addr, value);
-		r |= arswitch_writereg_lsb(dev, addr, value);
-	}
-
-	return r;
-}
-
 int
 arswitch_modifyreg(device_t dev, int addr, int mask, int set)
 {
 	int value;
-	
-	value = arswitch_readreg(dev, addr);
+	uint16_t phy, reg;
+
+	arswitch_split_setpage(dev, addr, &phy, &reg);
+
+	value = arswitch_reg_read32(dev, 0x10 | phy, reg);
 	value &= ~mask;
 	value |= set;
-	return (arswitch_writereg(dev, addr, value));
+	return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
 }
 
 int
 arswitch_waitreg(device_t dev, int addr, int mask, int val, int timeout)
 {
 	int err, v;
+	uint16_t phy, reg;
+
+	arswitch_split_setpage(dev, addr, &phy, &reg);
 
 	err = -1;
 	while (1) {
-		v = arswitch_readreg(dev, addr);
+		v = arswitch_reg_read32(dev, 0x10 | phy, reg);
 		v &= mask;
 		if (v == val) {
 			err = 0;
diff --git a/sys/dev/etherswitch/arswitch/arswitch_vlans.c b/sys/dev/etherswitch/arswitch/arswitch_vlans.c
index 5e24e57fa13..ab4700ddf4b 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_vlans.c
+++ b/sys/dev/etherswitch/arswitch/arswitch_vlans.c
@@ -53,11 +53,10 @@
 /*
  * XXX TODO: teach about the AR933x SoC switch
  * XXX TODO: teach about the AR934x SoC switch
- * XXX TODO: teach about the AR8327 external switch
  */
 
 static int
-arswitch_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
+ar8xxx_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
 	uint32_t data)
 {
 	int err;
@@ -87,30 +86,31 @@ arswitch_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
 	return (0);
 }
 
-static int
-arswitch_flush_dot1q_vlan(struct arswitch_softc *sc)
+int
+ar8xxx_flush_dot1q_vlan(struct arswitch_softc *sc)
 {
 
 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
-	return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_FLUSH, 0, 0));
+	return (ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_FLUSH, 0, 0));
 }
 
-static int
-arswitch_purge_dot1q_vlan(struct arswitch_softc *sc, int vid)
+int
+ar8xxx_purge_dot1q_vlan(struct arswitch_softc *sc, int vid)
 {
 
 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
-	return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_PURGE, vid, 0));
+	return (ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_PURGE, vid, 0));
 }
 
-static int
-arswitch_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
+int
+ar8xxx_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports,
+    uint32_t *untagged_ports, int vid)
 {
 	uint32_t reg;
 	int err;
 
 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
-	err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_GET, vid, 0);
+	err = ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_GET, vid, 0);
 	if (err)
 		return (err);
 
@@ -121,23 +121,25 @@ arswitch_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
 	}
 	reg &= ((1 << (sc->numphys + 1)) - 1);
 	*ports = reg;
+	*untagged_ports = reg;
 	return (0);
 }
 
-static int
-arswitch_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
+int
+ar8xxx_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports,
+    uint32_t untagged_ports, int vid)
 {
 	int err;
 
 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
-	err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_LOAD, vid, ports);
+	err = ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_LOAD, vid, ports);
 	if (err)
 		return (err);
 	return (0);
 }
 
-static int
-arswitch_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
+int
+ar8xxx_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
 {
 	int port;
 	uint32_t reg;
@@ -151,8 +153,8 @@ arswitch_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
 	return (0);
 }
 
-static int
-arswitch_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
+int
+ar8xxx_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
 {
 	int err, port;
 
@@ -193,7 +195,7 @@ ar8xxx_reset_vlans(struct arswitch_softc *sc)
 		}
 	}
 
-	if (arswitch_flush_dot1q_vlan(sc)) {
+	if (sc->hal.arswitch_flush_dot1q_vlan(sc)) {
 		ARSWITCH_UNLOCK(sc);
 		return;
 	}
@@ -224,7 +226,7 @@ ar8xxx_reset_vlans(struct arswitch_softc *sc)
 		ports = 0;
 		for (i = 0; i <= sc->numphys; i++)
 			ports |= (1 << i);
-		arswitch_set_dot1q_vlan(sc, ports, sc->vid[0]);
+		sc->hal.arswitch_set_dot1q_vlan(sc, ports, sc->vid[0], sc->vid[0]);
 		sc->vid[0] |= ETHERSWITCH_VID_VALID;
 	} else if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
 		/* Initialize the port based vlans. */
@@ -241,6 +243,7 @@ ar8xxx_reset_vlans(struct arswitch_softc *sc)
 			    ports << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT |
 			    AR8X16_PORT_VLAN_MODE_SECURE <<
 			    AR8X16_PORT_VLAN_MODE_PORT_ONLY);
+			    /* XXX TODO: SECURE / PORT_ONLY is wrong? */
 		}
 	} else {
 		/* Disable the ingress filter and get everyone on all vlans. */
@@ -286,19 +289,22 @@ ar8xxx_getvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
 	/* Member Ports. */
 	switch (sc->vlan_mode) {
 	case ETHERSWITCH_VLAN_DOT1Q:
-		err = arswitch_get_dot1q_vlan(sc, &vg->es_member_ports,
+		err = sc->hal.arswitch_get_dot1q_vlan(sc, &vg->es_member_ports,
+		    &vg->es_untagged_ports,
 		    vg->es_vid);
 		break;
 	case ETHERSWITCH_VLAN_PORT:
-		err = arswitch_get_port_vlan(sc, &vg->es_member_ports,
+		err = sc->hal.arswitch_get_port_vlan(sc, &vg->es_member_ports,
 		    vg->es_vid);
+		vg->es_untagged_ports = vg->es_member_ports;
 		break;
 	default:
 		vg->es_member_ports = 0;
+		vg->es_untagged_ports = 0;
 		err = -1;
 	}
 	ARSWITCH_UNLOCK(sc);
-	vg->es_untagged_ports = vg->es_member_ports;
+
 	return (err);
 }
 
@@ -323,7 +329,7 @@ ar8xxx_setvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
 	    (vid & ETHERSWITCH_VID_VALID) != 0 &&
 	    (vid & ETHERSWITCH_VID_MASK) !=
 	    (vg->es_vid & ETHERSWITCH_VID_MASK)) {
-		err = arswitch_purge_dot1q_vlan(sc, vid);
+		err = sc->hal.arswitch_purge_dot1q_vlan(sc, vid);
 		if (err) {
 			ARSWITCH_UNLOCK(sc);
 			return (err);
@@ -345,10 +351,11 @@ ar8xxx_setvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
 	/* Member Ports. */
 	switch (sc->vlan_mode) {
 	case ETHERSWITCH_VLAN_DOT1Q:
-		err = arswitch_set_dot1q_vlan(sc, vg->es_member_ports, vid);
+		err = sc->hal.arswitch_set_dot1q_vlan(sc, vg->es_member_ports,
+		    vg->es_untagged_ports, vid);
 		break;
 	case ETHERSWITCH_VLAN_PORT:
-		err = arswitch_set_port_vlan(sc, vg->es_member_ports, vid);
+		err = sc->hal.arswitch_set_port_vlan(sc, vg->es_member_ports, vid);
 		break;
 	default:
 		err = -1;
diff --git a/sys/dev/etherswitch/arswitch/arswitch_vlans.h b/sys/dev/etherswitch/arswitch/arswitch_vlans.h
index 0cd1af83200..b82db898822 100644
--- a/sys/dev/etherswitch/arswitch/arswitch_vlans.h
+++ b/sys/dev/etherswitch/arswitch/arswitch_vlans.h
@@ -35,4 +35,13 @@ int ar8xxx_setvgroup(struct arswitch_softc *, etherswitch_vlangroup_t *);
 int ar8xxx_get_pvid(struct arswitch_softc *, int, int *);
 int ar8xxx_set_pvid(struct arswitch_softc *, int, int);
 
+int ar8xxx_flush_dot1q_vlan(struct arswitch_softc *sc);
+int ar8xxx_purge_dot1q_vlan(struct arswitch_softc *sc, int vid);
+int ar8xxx_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports,
+    uint32_t *untagged_ports, int vid);
+int ar8xxx_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports,
+    uint32_t untagged_ports, int vid);
+int ar8xxx_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid);
+int ar8xxx_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid);
+
 #endif	/* __ARSWITCH_VLANS_H__ */
diff --git a/sys/dev/etherswitch/arswitch/arswitchreg.h b/sys/dev/etherswitch/arswitch/arswitchreg.h
index b341c285998..80f95b6502a 100644
--- a/sys/dev/etherswitch/arswitch/arswitchreg.h
+++ b/sys/dev/etherswitch/arswitch/arswitchreg.h
@@ -370,6 +370,9 @@
 #define	AR8327_NUM_PHYS			5
 #define	AR8327_PORTS_ALL		0x7f
 
+#define	AR8327_PORT_GMAC0		0
+#define	AR8327_PORT_GMAC6		6
+
 #define	AR8327_REG_MASK			0x000
 
 #define	AR8327_REG_PAD0_MODE		0x004
diff --git a/sys/dev/etherswitch/arswitch/arswitchvar.h b/sys/dev/etherswitch/arswitch/arswitchvar.h
index e533e87e8ad..a322a4fa9aa 100644
--- a/sys/dev/etherswitch/arswitch/arswitchvar.h
+++ b/sys/dev/etherswitch/arswitch/arswitchvar.h
@@ -60,7 +60,7 @@ struct arswitch_softc {
 	int		is_internal_switch;
 	int		chip_ver;
 	int		chip_rev;
-	int		mii_lo_first;
+	int		mii_lo_first;		/* Send low data DWORD before high */
 	ar8x16_switch_type	sc_switchtype;
 	/* should be the max of both pre-AR8327 and AR8327 ports */
 	char		*ifname[ARSWITCH_NUM_PHYS];
@@ -98,6 +98,22 @@ struct arswitch_softc {
 		    int *);
 		int (* arswitch_vlan_set_pvid) (struct arswitch_softc *, int,
 		    int);
+
+		int (* arswitch_flush_dot1q_vlan) (struct arswitch_softc *sc);
+		int (* arswitch_purge_dot1q_vlan) (struct arswitch_softc *sc,
+		    int vid);
+		int (* arswitch_get_dot1q_vlan) (struct arswitch_softc *,
+		    uint32_t *ports, uint32_t *untagged_ports, int vid);
+		int (* arswitch_set_dot1q_vlan) (struct arswitch_softc *sc,
+		    uint32_t ports, uint32_t untagged_ports, int vid);
+		int (* arswitch_get_port_vlan) (struct arswitch_softc *sc,
+		    uint32_t *ports, int vid);
+		int (* arswitch_set_port_vlan) (struct arswitch_softc *sc,
+		    uint32_t ports, int vid);
+
+		/* PHY functions */
+		int (* arswitch_phy_read) (device_t, int, int);
+		int (* arswitch_phy_write) (device_t, int, int, int);
 	} hal;
 
 	struct {
diff --git a/sys/dev/fb/fbd.c b/sys/dev/fb/fbd.c
index 6b7b7316bf5..b7e45040f65 100644
--- a/sys/dev/fb/fbd.c
+++ b/sys/dev/fb/fbd.c
@@ -51,6 +51,9 @@ __FBSDID("$FreeBSD$");
 #include <dev/vt/vt.h>
 #include <dev/vt/hw/fb/vt_fb.h>
 
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
 #include "fb_if.h"
 
 LIST_HEAD(fb_list_head_t, fb_list_entry) fb_list_head =
@@ -167,11 +170,14 @@ fb_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr, int nprot,
 
 	info = dev->si_drv1;
 
-	if ((info->fb_flags & FB_FLAG_NOMMAP) || info->fb_pbase == 0)
+	if (info->fb_flags & FB_FLAG_NOMMAP)
 		return (ENODEV);
 
-	if (offset < info->fb_size) {
-		*paddr = info->fb_pbase + offset;
+	if (offset >= 0 && offset < info->fb_size) {
+		if (info->fb_pbase == 0)
+			*paddr = vtophys((uint8_t *)info->fb_vbase + offset);
+		else
+			*paddr = info->fb_pbase + offset;
 		return (0);
 	}
 	return (EINVAL);
@@ -356,5 +362,6 @@ devclass_t	fbd_devclass;
 
 DRIVER_MODULE(fbd, fb, fbd_driver, fbd_devclass, 0, 0);
 DRIVER_MODULE(fbd, drmn, fbd_driver, fbd_devclass, 0, 0);
+DRIVER_MODULE(fbd, udl, fbd_driver, fbd_devclass, 0, 0);
 MODULE_VERSION(fbd, 1);
 
diff --git a/sys/dev/gpio/gpiobus.c b/sys/dev/gpio/gpiobus.c
index f3ad49cb92e..bf5632b42c8 100644
--- a/sys/dev/gpio/gpiobus.c
+++ b/sys/dev/gpio/gpiobus.c
@@ -53,6 +53,7 @@ static int gpiobus_attach(device_t);
 static int gpiobus_detach(device_t);
 static int gpiobus_suspend(device_t);
 static int gpiobus_resume(device_t);
+static void gpiobus_probe_nomatch(device_t, device_t);
 static int gpiobus_print_child(device_t, device_t);
 static int gpiobus_child_location_str(device_t, device_t, char *, size_t);
 static int gpiobus_child_pnpinfo_str(device_t, device_t, char *, size_t);
@@ -184,9 +185,9 @@ gpiobus_init_softc(device_t dev)
 	/* Pins = GPIO_PIN_MAX() + 1 */
 	sc->sc_npins++;
 
-	sc->sc_pins_mapped = malloc(sizeof(int) * sc->sc_npins, M_DEVBUF, 
+	sc->sc_pins = malloc(sizeof(*sc->sc_pins) * sc->sc_npins, M_DEVBUF,
 	    M_NOWAIT | M_ZERO);
-	if (sc->sc_pins_mapped == NULL)
+	if (sc->sc_pins == NULL)
 		return (ENOMEM);
 
 	/* Initialize the bus lock. */
@@ -229,24 +230,23 @@ gpiobus_free_ivars(struct gpiobus_ivar *devi)
 }
 
 int
-gpiobus_map_pin(device_t bus, device_t child, uint32_t pin)
+gpiobus_map_pin(device_t bus, uint32_t pin)
 {
 	struct gpiobus_softc *sc;
 
 	sc = device_get_softc(bus);
 	/* Consistency check. */
 	if (pin >= sc->sc_npins) {
-		device_printf(child,
+		device_printf(bus,
 		    "invalid pin %d, max: %d\n", pin, sc->sc_npins - 1);
 		return (-1);
 	}
 	/* Mark pin as mapped and give warning if it's already mapped. */
-	if (sc->sc_pins_mapped[pin]) {
-		device_printf(child,
-		    "warning: pin %d is already mapped\n", pin);
+	if (sc->sc_pins[pin].mapped) {
+		device_printf(bus, "warning: pin %d is already mapped\n", pin);
 		return (-1);
 	}
-	sc->sc_pins_mapped[pin] = 1;
+	sc->sc_pins[pin].mapped = 1;
 
 	return (0);
 }
@@ -276,11 +276,14 @@ gpiobus_parse_pins(struct gpiobus_softc *sc, device_t child, int mask)
 		if ((mask & (1 << i)) == 0)
 			continue;
 		/* Reserve the GPIO pin. */
-		if (gpiobus_map_pin(sc->sc_busdev, child, i) != 0) {
+		if (gpiobus_map_pin(sc->sc_busdev, i) != 0) {
 			gpiobus_free_ivars(devi);
 			return (EINVAL);
 		}
 		devi->pins[npins++] = i;
+		/* Use the child name as pin name. */
+		GPIOBUS_PIN_SETNAME(sc->sc_busdev, i,
+		    device_get_nameunit(child));
 	}
 
 	return (0);
@@ -340,10 +343,14 @@ gpiobus_detach(device_t dev)
 		gpiobus_free_ivars(devi);
 	}
 	free(devlist, M_TEMP);
-
-	if (sc->sc_pins_mapped) {
-		free(sc->sc_pins_mapped, M_DEVBUF);
-		sc->sc_pins_mapped = NULL;
+	if (sc->sc_pins) {
+		for (i = 0; i < sc->sc_npins; i++) {
+			if (sc->sc_pins[i].name != NULL)
+				free(sc->sc_pins[i].name, M_DEVBUF);
+			sc->sc_pins[i].name = NULL;
+		}
+		free(sc->sc_pins, M_DEVBUF);
+		sc->sc_pins = NULL;
 	}
 
 	return (0);
@@ -363,6 +370,20 @@ gpiobus_resume(device_t dev)
 	return (bus_generic_resume(dev));
 }
 
+static void
+gpiobus_probe_nomatch(device_t dev, device_t child)
+{
+	char pins[128];
+	struct gpiobus_ivar *devi;
+
+	devi = GPIOBUS_IVAR(child);
+	memset(pins, 0, sizeof(pins));
+	gpiobus_print_pins(devi, pins, sizeof(pins));
+	device_printf(dev, "<unknown device> at pin(s) %s", pins);
+	resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%ld");
+	printf("\n");
+}
+
 static int
 gpiobus_print_child(device_t dev, device_t child)
 {
@@ -650,6 +671,43 @@ gpiobus_pin_toggle(device_t dev, device_t child, uint32_t pin)
 	return GPIO_PIN_TOGGLE(sc->sc_dev, devi->pins[pin]);
 }
 
+static int
+gpiobus_pin_getname(device_t dev, uint32_t pin, char *name)
+{
+	struct gpiobus_softc *sc;
+
+	sc = GPIOBUS_SOFTC(dev);
+	if (pin > sc->sc_npins)
+		return (EINVAL);
+	/* Did we have a name for this pin ? */
+	if (sc->sc_pins[pin].name != NULL) {
+		memcpy(name, sc->sc_pins[pin].name, GPIOMAXNAME);
+		return (0);
+	}
+
+	/* Return the default pin name. */
+	return (GPIO_PIN_GETNAME(device_get_parent(dev), pin, name));
+}
+
+static int
+gpiobus_pin_setname(device_t dev, uint32_t pin, const char *name)
+{
+	struct gpiobus_softc *sc;
+
+	sc = GPIOBUS_SOFTC(dev);
+	if (pin > sc->sc_npins)
+		return (EINVAL);
+	if (name == NULL)
+		return (EINVAL);
+	/* Save the pin name. */
+	if (sc->sc_pins[pin].name == NULL)
+		sc->sc_pins[pin].name = malloc(GPIOMAXNAME, M_DEVBUF,
+		    M_WAITOK | M_ZERO);
+	strlcpy(sc->sc_pins[pin].name, name, GPIOMAXNAME);
+
+	return (0);
+}
+
 static device_method_t gpiobus_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		gpiobus_probe),
@@ -670,6 +728,7 @@ static device_method_t gpiobus_methods[] = {
 	DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
 	DEVMETHOD(bus_get_resource_list,	gpiobus_get_resource_list),
 	DEVMETHOD(bus_add_child,	gpiobus_add_child),
+	DEVMETHOD(bus_probe_nomatch,	gpiobus_probe_nomatch),
 	DEVMETHOD(bus_print_child,	gpiobus_print_child),
 	DEVMETHOD(bus_child_pnpinfo_str, gpiobus_child_pnpinfo_str),
 	DEVMETHOD(bus_child_location_str, gpiobus_child_location_str),
@@ -684,6 +743,8 @@ static device_method_t gpiobus_methods[] = {
 	DEVMETHOD(gpiobus_pin_get,	gpiobus_pin_get),
 	DEVMETHOD(gpiobus_pin_set,	gpiobus_pin_set),
 	DEVMETHOD(gpiobus_pin_toggle,	gpiobus_pin_toggle),
+	DEVMETHOD(gpiobus_pin_getname,	gpiobus_pin_getname),
+	DEVMETHOD(gpiobus_pin_setname,	gpiobus_pin_setname),
 
 	DEVMETHOD_END
 };
diff --git a/sys/dev/gpio/gpiobus_if.m b/sys/dev/gpio/gpiobus_if.m
index 24250200542..ee926d5b96f 100644
--- a/sys/dev/gpio/gpiobus_if.m
+++ b/sys/dev/gpio/gpiobus_if.m
@@ -106,3 +106,21 @@ METHOD int pin_setflags {
 	uint32_t pin_num;
 	uint32_t flags;
 };
+
+#
+# Get the pin name
+#
+METHOD int pin_getname {
+	device_t dev;
+	uint32_t pin_num;
+	char *name;
+};
+
+#
+# Set the pin name
+#
+METHOD int pin_setname {
+	device_t dev;
+	uint32_t pin_num;
+	const char *name;
+};
diff --git a/sys/dev/gpio/gpiobusvar.h b/sys/dev/gpio/gpiobusvar.h
index beffb7faf64..6a614cf8a6a 100644
--- a/sys/dev/gpio/gpiobusvar.h
+++ b/sys/dev/gpio/gpiobusvar.h
@@ -60,6 +60,12 @@
 #define	GPIOBUS_WAIT		1
 #define	GPIOBUS_DONTWAIT	2
 
+struct gpiobus_pin_data
+{
+	int		mapped;		/* pin is mapped/reserved. */
+	char		*name;		/* pin name. */
+};
+
 struct gpiobus_softc
 {
 	struct mtx	sc_mtx;		/* bus mutex */
@@ -68,7 +74,7 @@ struct gpiobus_softc
 	device_t	sc_owner;	/* bus owner */
 	device_t	sc_dev;		/* driver device */
 	int		sc_npins;	/* total pins on bus */
-	int		*sc_pins_mapped; /* mark mapped pins */
+	struct gpiobus_pin_data	*sc_pins; /* pin data */
 };
 
 struct gpiobus_pin
@@ -110,7 +116,7 @@ int gpiobus_detach_bus(device_t);
 int gpiobus_init_softc(device_t);
 int gpiobus_alloc_ivars(struct gpiobus_ivar *);
 void gpiobus_free_ivars(struct gpiobus_ivar *);
-int gpiobus_map_pin(device_t, device_t, uint32_t);
+int gpiobus_map_pin(device_t, uint32_t);
 
 extern driver_t gpiobus_driver;
 
diff --git a/sys/dev/gpio/gpioc.c b/sys/dev/gpio/gpioc.c
index 2fad4dffb28..708a3c2043a 100644
--- a/sys/dev/gpio/gpioc.c
+++ b/sys/dev/gpio/gpioc.c
@@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/gpio/gpiobusvar.h>
 
 #include "gpio_if.h"
+#include "gpiobus_if.h"
 
 #undef GPIOC_DEBUG
 #ifdef GPIOC_DEBUG
@@ -112,12 +113,16 @@ static int
 gpioc_ioctl(struct cdev *cdev, u_long cmd, caddr_t arg, int fflag, 
     struct thread *td)
 {
+	device_t bus;
 	int max_pin, res;
 	struct gpioc_softc *sc = cdev->si_drv1;
 	struct gpio_pin pin;
 	struct gpio_req req;
 	uint32_t caps;
 
+	bus = GPIO_GET_BUS(sc->sc_pdev);
+	if (bus == NULL)
+		return (EINVAL);
 	switch (cmd) {
 		case GPIOMAXPIN:
 			max_pin = -1;
@@ -133,7 +138,7 @@ gpioc_ioctl(struct cdev *cdev, u_long cmd, caddr_t arg, int fflag,
 			if (res)
 				break;
 			GPIO_PIN_GETCAPS(sc->sc_pdev, pin.gp_pin, &pin.gp_caps);
-			GPIO_PIN_GETNAME(sc->sc_pdev, pin.gp_pin, pin.gp_name);
+			GPIOBUS_PIN_GETNAME(bus, pin.gp_pin, pin.gp_name);
 			bcopy(&pin, arg, sizeof(pin));
 			break;
 		case GPIOSETCONFIG:
@@ -167,6 +172,12 @@ gpioc_ioctl(struct cdev *cdev, u_long cmd, caddr_t arg, int fflag,
 			    req.gp_pin);
 			res = GPIO_PIN_TOGGLE(sc->sc_pdev, req.gp_pin);
 			break;
+		case GPIOSETNAME:
+			bcopy(arg, &pin, sizeof(pin));
+			dprintf("set name on pin %d\n", pin.gp_pin);
+			res = GPIOBUS_PIN_SETNAME(bus, pin.gp_pin,
+			    pin.gp_name);
+			break;
 		default:
 			return (ENOTTY);
 			break;
diff --git a/sys/dev/gpio/ofw_gpiobus.c b/sys/dev/gpio/ofw_gpiobus.c
index be961ea9b43..368528de18f 100644
--- a/sys/dev/gpio/ofw_gpiobus.c
+++ b/sys/dev/gpio/ofw_gpiobus.c
@@ -39,9 +39,11 @@ __FBSDID("$FreeBSD$");
 #include <dev/gpio/gpiobusvar.h>
 #include <dev/ofw/ofw_bus.h>
 
+#include "gpiobus_if.h"
+
 static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t,
 	device_t, phandle_t);
-static void ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *);
+static void ofw_gpiobus_destroy_devinfo(device_t, struct ofw_gpiobus_devinfo *);
 static int ofw_gpiobus_parse_gpios_impl(device_t, phandle_t, char *,
 	struct gpiobus_softc *, struct gpiobus_pin **);
 
@@ -49,6 +51,8 @@ device_t
 ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child)
 {
 	device_t childdev;
+	int i;
+	struct gpiobus_ivar *devi;
 	struct ofw_gpiobus_devinfo *dinfo;
 
 	/*
@@ -63,10 +67,15 @@ ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child)
 		return (NULL);
 	}
 	if (device_probe_and_attach(childdev) != 0) {
-		ofw_gpiobus_destroy_devinfo(dinfo);
+		ofw_gpiobus_destroy_devinfo(bus, dinfo);
 		device_delete_child(bus, childdev);
 		return (NULL);
 	}
+	/* Use the child name as pin name. */
+	devi = &dinfo->opd_dinfo;
+	for (i = 0; i < devi->npins; i++)
+		GPIOBUS_PIN_SETNAME(bus, devi->pins[i],
+		    device_get_nameunit(childdev));
 
 	return (childdev);
 }
@@ -117,41 +126,50 @@ ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node)
 	}
 	/* Parse the gpios property for the child. */
 	npins = ofw_gpiobus_parse_gpios_impl(child, node, "gpios", sc, &pins);
-	if (npins <= 0)
-		goto fail;
+	if (npins <= 0) {
+		ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
+		free(dinfo, M_DEVBUF);
+		return (NULL);
+	}
+	/* Initialize the irq resource list. */
+	resource_list_init(&dinfo->opd_dinfo.rl);
+	/* Allocate the child ivars and copy the parsed pin data. */
 	devi = &dinfo->opd_dinfo;
 	devi->npins = (uint32_t)npins;
 	if (gpiobus_alloc_ivars(devi) != 0) {
 		free(pins, M_DEVBUF);
-		goto fail;
+		ofw_gpiobus_destroy_devinfo(bus, dinfo);
+		return (NULL);
 	}
 	for (i = 0; i < devi->npins; i++) {
 		devi->flags[i] = pins[i].flags;
 		devi->pins[i] = pins[i].pin;
 	}
 	free(pins, M_DEVBUF);
-	/* And now the interrupt resources. */
-	resource_list_init(&dinfo->opd_dinfo.rl);
+	/* Parse the interrupt resources. */
 	if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl) != 0) {
-		gpiobus_free_ivars(devi);
-		goto fail;
+		ofw_gpiobus_destroy_devinfo(bus, dinfo);
+		return (NULL);
 	}
 	device_set_ivars(child, dinfo);
 
 	return (dinfo);
-
-fail:
-	ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
-	free(dinfo, M_DEVBUF);
-	return (NULL);
 }
 
 static void
-ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *dinfo)
+ofw_gpiobus_destroy_devinfo(device_t bus, struct ofw_gpiobus_devinfo *dinfo)
 {
+	int i;
 	struct gpiobus_ivar *devi;
+	struct gpiobus_softc *sc;
 
+	sc = device_get_softc(bus);
 	devi = &dinfo->opd_dinfo;
+	for (i = 0; i < devi->npins; i++) {
+		if (devi->pins[i] > sc->sc_npins)
+			continue;
+		sc->sc_pins[devi->pins[i]].mapped = 0;
+	}
 	gpiobus_free_ivars(devi);
 	resource_list_free(&dinfo->opd_dinfo.rl);
 	ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
@@ -273,8 +291,7 @@ ofw_gpiobus_parse_gpios_impl(device_t consumer, phandle_t cnode, char *pname,
 			goto fail;
 		}
 		/* Reserve the GPIO pin. */
-		if (gpiobus_map_pin(bussc->sc_busdev, consumer,
-		    (*pins)[j].pin) != 0)
+		if (gpiobus_map_pin(bussc->sc_busdev, (*pins)[j].pin) != 0)
 			goto fail;
 		j++;
 		i += gpiocells + 1;
diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c
index 6c241422d9c..67269af9bf6 100644
--- a/sys/dev/hwpmc/hwpmc_core.c
+++ b/sys/dev/hwpmc/hwpmc_core.c
@@ -1126,6 +1126,10 @@ static struct iap_event_descr iap_events[] = {
 	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(79H_18H, 0x79, 0x18, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
         IAP_F_HWX),
+    IAPDESCR(79H_24H, 0x79, 0x24, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
+        IAP_F_HWX),
+    IAPDESCR(79H_3CH, 0x79, 0x3C, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
+        IAP_F_HWX),
 
     IAPDESCR(7AH, 0x7A, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
 
@@ -1188,46 +1192,57 @@ static struct iap_event_descr iap_events[] = {
     IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
 
     IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
-    IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+    IAPDESCR(88H_41H, 0x88, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_81H, 0x88, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_82H, 0x88, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_84H, 0x88, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_88H, 0x88, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_90H, 0x88, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(88H_A0H, 0x88, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
 	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
 	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
 
     IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
-    IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
-	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
     IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
-    IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+    IAPDESCR(89H_41H, 0x89, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_81H, 0x89, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_82H, 0x89, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_84H, 0x89, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_88H, 0x89, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_90H, 0x89, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(89H_A0H, 0x89, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
 	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
 	IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
@@ -1261,7 +1276,8 @@ static struct iap_event_descr iap_events[] = {
 	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(A1H_08H, 0xA1, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |   /* No desc in IB for this*/
 	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_IB | IAP_F_IBX),
+    IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_IB |
+	IAP_F_SBX | IAP_F_IBX),
     IAPDESCR(A1H_10H, 0xA1, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |   /* No desc in IB for this*/
 	IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |   /* No desc in IB for this*/
@@ -1586,29 +1602,21 @@ static struct iap_event_descr iap_events[] = {
 
     /* Sandy Bridge / Sandy Bridge Xeon - 11, 12, 21, 41, 42, 81, 82 */
     IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC),
-    IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
-	IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
-	IAP_F_HWX),
-    IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
-	IAP_F_HWX),
-    IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
-    IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
-    IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
-        IAP_F_HWX),
+    IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
+    IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(D0H_21H, 0xD0, 0x21, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
-    IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
-        IAP_F_HWX),
-    IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX |
-        IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),	/* Not in spec but in linux and Vtune guide */
-    IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | 
-        IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),	/* Not in spec but in linux and Vtune guide */
-    IAPDESCR(D0H_80H, 0xD0, 0x80, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
-        IAP_F_HWX),
-    IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX |
-	IAP_F_IB | IAP_F_IBX),	/* Not in spec but in linux and Vtune guide */
-    IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | 
-	IAP_F_IB | IAP_F_IBX),	/* Not in spec but in linux and Vtune guide */
+    IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+    IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
+        IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
+
     IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB |
 	IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
     IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
@@ -1643,9 +1651,9 @@ static struct iap_event_descr iap_events[] = {
 
     IAPDESCR(D3H_01H, 0xD3, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_SBX |
 	IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
-    IAPDESCR(D3H_03H, 0xD0, 0x3, IAP_F_IBX  ),
+    IAPDESCR(D3H_03H, 0xD3, 0x03, IAP_F_IBX),
     IAPDESCR(D3H_04H, 0xD3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX),	/* Not defined for IBX */
-    IAPDESCR(D3H_0CH, 0xD0, 0x0, IAP_F_IBX  ),
+    IAPDESCR(D3H_0CH, 0xD3, 0x0C, IAP_F_IBX),
     IAPDESCR(D3H_10H, 0xD3, 0x10, IAP_F_IBX  ),
     IAPDESCR(D3H_20H, 0xD3, 0x20, IAP_F_IBX  ),
 
@@ -1965,15 +1973,15 @@ iap_event_sb_sbx_ib_ibx_ok_on_counter(enum pmc_event pe, int ri)
 		break;
 		/* Events valid only on counter 1. */
 	case PMC_EV_IAP_EVENT_C0H_01H:
-		mask = 0x1;
+		mask = 0x2;
 		break;
 		/* Events valid only on counter 2. */
 	case PMC_EV_IAP_EVENT_48H_01H:
 	case PMC_EV_IAP_EVENT_A2H_02H:
+	case PMC_EV_IAP_EVENT_A3H_08H:
 		mask = 0x4;
 		break;
 		/* Events valid only on counter 3. */
-	case PMC_EV_IAP_EVENT_A3H_08H:
 	case PMC_EV_IAP_EVENT_BBH_01H:
 	case PMC_EV_IAP_EVENT_CDH_01H:
 	case PMC_EV_IAP_EVENT_CDH_02H:
diff --git a/sys/dev/hwpmc/hwpmc_logging.c b/sys/dev/hwpmc/hwpmc_logging.c
index 9484fae0d99..4d14011669d 100644
--- a/sys/dev/hwpmc/hwpmc_logging.c
+++ b/sys/dev/hwpmc/hwpmc_logging.c
@@ -39,6 +39,8 @@ __FBSDID("$FreeBSD$");
 #include <sys/param.h>
 #if (__FreeBSD_version >= 1100000)
 #include <sys/capsicum.h>
+#else
+#include <sys/capability.h>
 #endif
 #include <sys/file.h>
 #include <sys/kernel.h>
@@ -570,9 +572,7 @@ pmclog_configure_log(struct pmc_mdep *md, struct pmc_owner *po, int logfd)
 {
 	int error;
 	struct proc *p;
-#if (__FreeBSD_version >= 1100000)
 	cap_rights_t rights;
-#endif
 	/*
 	 * As long as it is possible to get a LOR between pmc_sx lock and
 	 * proctree/allproc sx locks used for adding a new process, assure
@@ -595,12 +595,11 @@ pmclog_configure_log(struct pmc_mdep *md, struct pmc_owner *po, int logfd)
 		po->po_file));
 
 	/* get a reference to the file state */
-#if (__FreeBSD_version >= 1100000)
 	error = fget_write(curthread, logfd,
 	    cap_rights_init(&rights, CAP_WRITE), &po->po_file);
 	if (error)
 		goto error;
-#endif
+
 	/* mark process as owning a log file */
 	po->po_flags |= PMC_PO_OWNS_LOGFILE;
 	error = kproc_create(pmclog_loop, po, &po->po_kthread,
diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h
index 5ecfd81b72d..400a39401fa 100644
--- a/sys/dev/hwpmc/pmc_events.h
+++ b/sys/dev/hwpmc/pmc_events.h
@@ -856,7 +856,14 @@ __PMC_EV(IAP, EVENT_88H_10H)			\
 __PMC_EV(IAP, EVENT_88H_20H)			\
 __PMC_EV(IAP, EVENT_88H_30H)			\
 __PMC_EV(IAP, EVENT_88H_40H)			\
+__PMC_EV(IAP, EVENT_88H_41H)			\
 __PMC_EV(IAP, EVENT_88H_80H)			\
+__PMC_EV(IAP, EVENT_88H_81H)			\
+__PMC_EV(IAP, EVENT_88H_82H)			\
+__PMC_EV(IAP, EVENT_88H_84H)			\
+__PMC_EV(IAP, EVENT_88H_88H)			\
+__PMC_EV(IAP, EVENT_88H_90H)			\
+__PMC_EV(IAP, EVENT_88H_A0H)			\
 __PMC_EV(IAP, EVENT_88H_7FH)			\
 __PMC_EV(IAP, EVENT_88H_FFH)			\
 __PMC_EV(IAP, EVENT_89H_00H)			\
@@ -869,7 +876,14 @@ __PMC_EV(IAP, EVENT_89H_10H)			\
 __PMC_EV(IAP, EVENT_89H_20H)			\
 __PMC_EV(IAP, EVENT_89H_30H)			\
 __PMC_EV(IAP, EVENT_89H_40H)			\
+__PMC_EV(IAP, EVENT_89H_41H)			\
 __PMC_EV(IAP, EVENT_89H_80H)			\
+__PMC_EV(IAP, EVENT_89H_81H)			\
+__PMC_EV(IAP, EVENT_89H_82H)			\
+__PMC_EV(IAP, EVENT_89H_84H)			\
+__PMC_EV(IAP, EVENT_89H_88H)			\
+__PMC_EV(IAP, EVENT_89H_90H)			\
+__PMC_EV(IAP, EVENT_89H_A0H)			\
 __PMC_EV(IAP, EVENT_89H_7FH)			\
 __PMC_EV(IAP, EVENT_89H_FFH)			\
 __PMC_EV(IAP, EVENT_8AH_00H)			\
@@ -2578,6 +2592,7 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H)
  * Aliases for Haswell core PMC events
  */
 #define __PMC_EV_ALIAS_HASWELL_XEON()					\
+__PMC_EV_ALIAS_INTEL_ARCHITECTURAL()					\
 __PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H)		 	\
 __PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H)		\
@@ -2585,7 +2600,7 @@ __PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H)	\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H)	\
-__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K",			\
+__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",			\
     IAP_EVENT_08H_04H)							\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH)	\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H)	\
@@ -2641,8 +2656,8 @@ __PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED",			\
     IAP_EVENT_58H_08H)							\
 __PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H)	\
 __PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H)	\
-__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_02H)			\
-__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_01H)			\
+__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H)			\
+__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H)			\
 __PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H)		\
 __PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",		\
     IAP_EVENT_60H_01H)							\
@@ -2677,24 +2692,22 @@ __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H)		\
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H)		\
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)			\
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)			\
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
 __PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)			\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)			\
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
 __PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)	\
 __PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H)		\
@@ -2762,14 +2775,12 @@ __PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H)		\
 __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH)			\
 __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)     	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)     	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H)	\
@@ -2807,6 +2818,7 @@ __PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H)
 
 
 #define __PMC_EV_ALIAS_HASWELL()					\
+__PMC_EV_ALIAS_INTEL_ARCHITECTURAL()					\
 __PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H)		 	\
 __PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H)		\
@@ -2814,7 +2826,7 @@ __PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H)	\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H)	\
-__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K",			\
+__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",			\
     IAP_EVENT_08H_04H)							\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH)	\
 __PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H)	\
@@ -2870,8 +2882,8 @@ __PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED",			\
     IAP_EVENT_58H_08H)							\
 __PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H)	\
 __PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H)	\
-__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_02H)			\
-__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_01H)			\
+__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H)			\
+__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H)			\
 __PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H)		\
 __PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",		\
     IAP_EVENT_60H_01H)							\
@@ -2906,24 +2918,22 @@ __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H)		\
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H)		\
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)			\
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)			\
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
 __PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)			\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)			\
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
 __PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)	\
 __PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H)		\
@@ -2991,14 +3001,12 @@ __PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H)		\
 __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH)			\
 __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)     	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H)	\
@@ -3036,6 +3044,7 @@ __PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H)
 
 
 #define __PMC_EV_ALIAS_IVYBRIDGE()					\
+__PMC_EV_ALIAS_INTEL_ARCHITECTURAL()					\
 __PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H)		 	\
 __PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H)		\
@@ -3132,24 +3141,22 @@ __PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H)		\
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H)		\
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)			\
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)			\
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
 __PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)			\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)			\
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
 __PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)	\
 __PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H)	\
@@ -3218,15 +3225,12 @@ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH)			\
 __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)     	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) 	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) 	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) 	\
@@ -3268,6 +3272,7 @@ __PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H)
  * Aliases for Ivy Bridge Xeon PMC events (325462-045US January 2013)
  */
 #define __PMC_EV_ALIAS_IVYBRIDGE_XEON()					\
+__PMC_EV_ALIAS_INTEL_ARCHITECTURAL()					\
 __PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H)		\
 __PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H)	 		\
 __PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H)		\
@@ -3363,24 +3368,22 @@ __PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H)		\
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H)		\
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)			\
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)			\
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
 __PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)			\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)			\
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
 __PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)	\
 __PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H)	\
@@ -3449,15 +3452,12 @@ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH)			\
 __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H)	\
 __PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)	\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
-__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H)	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H)     	\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H)		\
+__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H)	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) 	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) 	\
 __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) 	\
@@ -3599,24 +3599,22 @@ __PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H)		\
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H)		\
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)			\
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)			\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)	\
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)		\
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)			\
-__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)			\
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)	\
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)		\
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)			\
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
 __PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)	\
 __PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H)	\
@@ -3829,25 +3827,23 @@ __PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H)          \
 __PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H)               \
 __PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H)                      \
 __PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H)                  \
-__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H)                  \
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H)            \
+__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H)		\
 __PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_88H_04H)							\
-__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H)           \
-__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H)      \
-__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H)    \
-__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H)              \
-__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H)                 \
-__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH)           \
-__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H)                  \
+    IAP_EVENT_88H_84H)							\
+__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H)		\
+__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H)	\
+__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H)		\
 __PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET",		\
-    IAP_EVENT_89H_04H)							\
-__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H)           \
-__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H)      \
-__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H)    \
-__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H)              \
-__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H)                 \
-__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)          \
+    IAP_EVENT_89H_84H)							\
+__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H)		\
+__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H)	\
+__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH)		\
 __PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H)        \
 __PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H)        \
 __PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H)        \
diff --git a/sys/dev/hyperv/netvsc/hv_netvsc_drv_freebsd.c b/sys/dev/hyperv/netvsc/hv_netvsc_drv_freebsd.c
index 5f45e66bd1c..fca37ba0324 100644
--- a/sys/dev/hyperv/netvsc/hv_netvsc_drv_freebsd.c
+++ b/sys/dev/hyperv/netvsc/hv_netvsc_drv_freebsd.c
@@ -736,7 +736,14 @@ hn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 	switch(cmd) {
 
 	case SIOCSIFADDR:
-	case SIOCGIFADDR:
+#ifdef INET
+		if (ifa->ifa_addr->sa_family == AF_INET) {
+			ifp->if_flags |= IFF_UP;
+			if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
+				hn_ifinit(sc);
+			arp_ifinit(ifp, ifa);
+		} else
+#endif
 		error = ether_ioctl(ifp, cmd, data);
 		break;
 	case SIOCSIFMTU:
@@ -900,6 +907,7 @@ hn_stop(hn_softc_t *sc)
 		printf(" Closing Device ...\n");
 
 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
+	if_link_state_change(ifp, LINK_STATE_DOWN);
 	sc->hn_initdone = 0;
 
 	ret = hv_rf_on_close(device_ctx);
@@ -949,6 +957,7 @@ hn_ifinit_locked(hn_softc_t *sc)
 	}
 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+	if_link_state_change(ifp, LINK_STATE_UP);
 }
 
 /*
diff --git a/sys/dev/iicbus/ds3231.c b/sys/dev/iicbus/ds3231.c
index e6366bf3368..690c92b05ee 100644
--- a/sys/dev/iicbus/ds3231.c
+++ b/sys/dev/iicbus/ds3231.c
@@ -64,8 +64,6 @@ struct ds3231_softc {
 	uint8_t		sc_status;
 };
 
-static int ds3231_sqw_freq[] = { 1, 1024, 4096, 8192 };
-
 static void ds3231_start(void *);
 
 static int
@@ -282,6 +280,7 @@ ds3231_bbsqw_sysctl(SYSCTL_HANDLER_ARGS)
 static int
 ds3231_sqw_freq_sysctl(SYSCTL_HANDLER_ARGS)
 {
+	int ds3231_sqw_freq[] = { 1, 1024, 4096, 8192 };
 	int error, freq, i, newf, tmp;
 	struct ds3231_softc *sc;
 
@@ -290,8 +289,8 @@ ds3231_sqw_freq_sysctl(SYSCTL_HANDLER_ARGS)
 	if (error != 0)
 		return (error);
 	tmp = (sc->sc_ctrl & DS3231_CTRL_RS_MASK) >> DS3231_CTRL_RS_SHIFT;
-	if (tmp > nitems(ds3231_sqw_freq))
-		tmp = nitems(ds3231_sqw_freq);
+	if (tmp >= nitems(ds3231_sqw_freq))
+		tmp = nitems(ds3231_sqw_freq) - 1;
 	freq = ds3231_sqw_freq[tmp];
 	error = sysctl_handle_int(oidp, &freq, 0, req);
 	if (error != 0 || req->newptr == NULL)
diff --git a/sys/dev/iicbus/lm75.c b/sys/dev/iicbus/lm75.c
index 2b9b1a36250..cbcd8c44c48 100644
--- a/sys/dev/iicbus/lm75.c
+++ b/sys/dev/iicbus/lm75.c
@@ -90,8 +90,6 @@ struct lm75_softc {
 	uint32_t		sc_conf;
 };
 
-static int lm75_faults[4] = { 1, 2, 4, 6 };
-
 /* Utility functions */
 static int  lm75_conf_read(struct lm75_softc *);
 static int  lm75_conf_write(struct lm75_softc *);
@@ -457,14 +455,15 @@ static int
 lm75_faults_sysctl(SYSCTL_HANDLER_ARGS)
 {
 	device_t dev;
+	int lm75_faults[] = { 1, 2, 4, 6 };
 	int error, faults, i, newf, tmp;
 	struct lm75_softc *sc;
 
 	dev = (device_t)arg1;
 	sc = device_get_softc(dev);
 	tmp = (sc->sc_conf & LM75_CONF_FAULT) >> LM75_CONF_FSHIFT;
-	if (tmp > nitems(lm75_faults))
-		tmp = nitems(lm75_faults);
+	if (tmp >= nitems(lm75_faults))
+		tmp = nitems(lm75_faults) - 1;
 	faults = lm75_faults[tmp];
 
 	error = sysctl_handle_int(oidp, &faults, 0, req);
diff --git a/sys/dev/iscsi_initiator/isc_sm.c b/sys/dev/iscsi_initiator/isc_sm.c
index 84f809ad22d..6810047b77a 100644
--- a/sys/dev/iscsi_initiator/isc_sm.c
+++ b/sys/dev/iscsi_initiator/isc_sm.c
@@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/syslog.h>
 #include <sys/mbuf.h>
 #include <sys/bus.h>
+#include <sys/sbuf.h>
 #include <sys/sx.h>
 
 #include <cam/cam.h>
@@ -586,14 +587,15 @@ isc_dump_options(SYSCTL_HANDLER_ARGS)
 {
      int error;
      isc_session_t *sp;
-     char	buf[1024], *bp;
+     struct sbuf sb;
+     
+     sbuf_new_for_sysctl(&sb, NULL, 128, req);
 
      sp = (isc_session_t *)arg1;
-     bp = buf;
-     sprintf(bp, "targetname='%s'", sp->opt.targetName);
-     bp += strlen(bp);
-     sprintf(bp, " targetname='%s'", sp->opt.targetAddress);
-     error = SYSCTL_OUT(req, buf, strlen(buf));
+     sbuf_printf(&sb, "targetname='%s'", sp->opt.targetName);
+     sbuf_printf(&sb, " targetaddress='%s'", sp->opt.targetAddress);
+     error = sbuf_finish(&sb);
+     sbuf_delete(&sb);
      return error;
 }
 #endif
@@ -603,51 +605,24 @@ isc_dump_stats(SYSCTL_HANDLER_ARGS)
 {
      isc_session_t	*sp;
      struct isc_softc	*sc;
-     char	buf[1024], *bp;
-     int 	error, n;
-
+     int 	error;
+     struct sbuf sb;
+     
      sp = (isc_session_t *)arg1;
      sc = sp->isc;
 
-     bp = buf;
-     n = sizeof(buf);
-     snprintf(bp, n, "recv=%d sent=%d", sp->stats.nrecv, sp->stats.nsent);
-     bp += strlen(bp);
-     n -= strlen(bp);
-     snprintf(bp, n, " flags=0x%08x pdus-alloc=%d pdus-max=%d", 
-		  sp->flags, sc->npdu_alloc, sc->npdu_max);
-     bp += strlen(bp);
-     n -= strlen(bp);
-     snprintf(bp, n, " cws=%d cmd=%x exp=%x max=%x stat=%x itt=%x",
+     sbuf_new_for_sysctl(&sb, NULL, 128, req);
+
+     sbuf_printf(&sb, "recv=%d sent=%d", sp->stats.nrecv, sp->stats.nsent);
+     sbuf_printf(&sb, " flags=0x%08x pdus-alloc=%d pdus-max=%d", 
+		 sp->flags, sc->npdu_alloc, sc->npdu_max);
+     sbuf_printf(&sb, " cws=%d cmd=%x exp=%x max=%x stat=%x itt=%x",
 		  sp->cws, sp->sn.cmd, sp->sn.expCmd, sp->sn.maxCmd, sp->sn.stat, sp->sn.itt);
-     error = SYSCTL_OUT(req, buf, strlen(buf));
+     error = sbuf_finish(&sb);
+     sbuf_delete(&sb);
      return error;
 }
 
-static int
-isc_sysctl_targetName(SYSCTL_HANDLER_ARGS)
-{
-     char	buf[128], **cp;
-     int 	error;
-
-     cp = (char **)arg1;
-     snprintf(buf, sizeof(buf), "%s", *cp);
-     error = SYSCTL_OUT(req, buf, strlen(buf));
-     return error;
-}
-     
-static int
-isc_sysctl_targetAddress(SYSCTL_HANDLER_ARGS)
-{
-     char	buf[128], **cp;
-     int 	error;
-
-     cp = (char **)arg1;
-     snprintf(buf, sizeof(buf), "%s", *cp);
-     error = SYSCTL_OUT(req, buf, strlen(buf));
-     return error;
-}
-     
 static void
 isc_add_sysctls(isc_session_t *sp)
 {
@@ -668,7 +643,7 @@ isc_add_sysctls(isc_session_t *sp)
 		     "targetname",
 		     CTLTYPE_STRING | CTLFLAG_RD,
 		     (void *)&sp->opt.targetName, 0,
-		     isc_sysctl_targetName, "A", "target name");
+		     sysctl_handle_string, "A", "target name");
 
      SYSCTL_ADD_PROC(&sp->clist,
 		     SYSCTL_CHILDREN(sp->oid),
@@ -676,7 +651,7 @@ isc_add_sysctls(isc_session_t *sp)
 		     "targeaddress",
 		     CTLTYPE_STRING | CTLFLAG_RD,
 		     (void *)&sp->opt.targetAddress, 0,
-		     isc_sysctl_targetAddress, "A", "target address");
+		     sysctl_handle_string, "A", "target address");
 
      SYSCTL_ADD_PROC(&sp->clist,
 		     SYSCTL_CHILDREN(sp->oid),
diff --git a/sys/dev/ixgbe/ixgbe.c b/sys/dev/ixgbe/ixgbe.c
index 28d1271c868..db202fdbc5b 100644
--- a/sys/dev/ixgbe/ixgbe.c
+++ b/sys/dev/ixgbe/ixgbe.c
@@ -1699,6 +1699,7 @@ static void
 ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr)
 {
 	struct adapter *adapter = ifp->if_softc;
+	struct ixgbe_hw *hw = &adapter->hw;
 
 	INIT_DEBUGOUT("ixgbe_media_status: begin");
 	IXGBE_CORE_LOCK(adapter);
@@ -1714,16 +1715,27 @@ ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr)
 
 	ifmr->ifm_status |= IFM_ACTIVE;
 
-	switch (adapter->link_speed) {
-		case IXGBE_LINK_SPEED_100_FULL:
+	/*
+	 * Not all NIC are 1000baseSX as an example X540T.
+	 * We must set properly the media based on NIC model.
+	 */
+	switch (hw->device_id) {
+	case IXGBE_DEV_ID_X540T:
+		if (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL)
 			ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
-			break;
-		case IXGBE_LINK_SPEED_1GB_FULL:
-			ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
-			break;
-		case IXGBE_LINK_SPEED_10GB_FULL:
+		else if (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL)
+			ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
+		else if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)
 			ifmr->ifm_active |= adapter->optics | IFM_FDX;
-			break;
+		break;
+	default:
+		if (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL)
+			ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
+		else if (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL)
+			ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
+		else if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)
+			ifmr->ifm_active |= adapter->optics | IFM_FDX;
+		break;
 	}
 
 	IXGBE_CORE_UNLOCK(adapter);
@@ -1751,6 +1763,7 @@ ixgbe_media_change(struct ifnet * ifp)
 		return (EINVAL);
 
         switch (IFM_SUBTYPE(ifm->ifm_media)) {
+	case IFM_10G_T:
         case IFM_AUTO:
                 adapter->hw.phy.autoneg_advertised =
 		    IXGBE_LINK_SPEED_100_FULL |
diff --git a/sys/dev/ixl/i40e_adminq_cmd.h b/sys/dev/ixl/i40e_adminq_cmd.h
index 57b3ee1690a..0d52883e70d 100755
--- a/sys/dev/ixl/i40e_adminq_cmd.h
+++ b/sys/dev/ixl/i40e_adminq_cmd.h
@@ -42,7 +42,7 @@
  */
 
 #define I40E_FW_API_VERSION_MAJOR	0x0001
-#define I40E_FW_API_VERSION_MINOR	0x0004
+#define I40E_FW_API_VERSION_MINOR	0x0002
 
 struct i40e_aq_desc {
 	__le16 flags;
@@ -140,7 +140,12 @@ enum i40e_admin_queue_opc {
 	i40e_aqc_opc_list_func_capabilities	= 0x000A,
 	i40e_aqc_opc_list_dev_capabilities	= 0x000B,
 
+	i40e_aqc_opc_set_cppm_configuration	= 0x0103,
+	i40e_aqc_opc_set_arp_proxy_entry	= 0x0104,
+	i40e_aqc_opc_set_ns_proxy_entry		= 0x0105,
+
 	/* LAA */
+	i40e_aqc_opc_mng_laa		= 0x0106,   /* AQ obsolete */
 	i40e_aqc_opc_mac_address_read	= 0x0107,
 	i40e_aqc_opc_mac_address_write	= 0x0108,
 
@@ -265,6 +270,7 @@ enum i40e_admin_queue_opc {
 	/* Tunnel commands */
 	i40e_aqc_opc_add_udp_tunnel	= 0x0B00,
 	i40e_aqc_opc_del_udp_tunnel	= 0x0B01,
+	i40e_aqc_opc_tunnel_key_structure	= 0x0B10,
 
 	/* Async Events */
 	i40e_aqc_opc_event_lan_overflow		= 0x1001,
@@ -276,6 +282,8 @@ enum i40e_admin_queue_opc {
 	i40e_aqc_opc_oem_ocbb_initialize	= 0xFE03,
 
 	/* debug commands */
+	i40e_aqc_opc_debug_get_deviceid		= 0xFF00,
+	i40e_aqc_opc_debug_set_mode		= 0xFF01,
 	i40e_aqc_opc_debug_read_reg		= 0xFF03,
 	i40e_aqc_opc_debug_write_reg		= 0xFF04,
 	i40e_aqc_opc_debug_modify_reg		= 0xFF07,
@@ -509,8 +517,7 @@ struct i40e_aqc_mac_address_read {
 #define I40E_AQC_SAN_ADDR_VALID		0x20
 #define I40E_AQC_PORT_ADDR_VALID	0x40
 #define I40E_AQC_WOL_ADDR_VALID		0x80
-#define I40E_AQC_MC_MAG_EN_VALID	0x100
-#define I40E_AQC_ADDR_VALID_MASK	0x1F0
+#define I40E_AQC_ADDR_VALID_MASK	0xf0
 	u8	reserved[6];
 	__le32	addr_high;
 	__le32	addr_low;
@@ -533,9 +540,7 @@ struct i40e_aqc_mac_address_write {
 #define I40E_AQC_WRITE_TYPE_LAA_ONLY	0x0000
 #define I40E_AQC_WRITE_TYPE_LAA_WOL	0x4000
 #define I40E_AQC_WRITE_TYPE_PORT	0x8000
-#define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG	0xC000
-#define I40E_AQC_WRITE_TYPE_MASK	0xC000
-
+#define I40E_AQC_WRITE_TYPE_MASK	0xc000
 	__le16	mac_sah;
 	__le32	mac_sal;
 	u8	reserved[8];
@@ -1071,7 +1076,6 @@ struct i40e_aqc_set_vsi_promiscuous_modes {
 	__le16	seid;
 #define I40E_AQC_VSI_PROM_CMD_SEID_MASK		0x3FF
 	__le16	vlan_tag;
-#define I40E_AQC_SET_VSI_VLAN_MASK		0x0FFF
 #define I40E_AQC_SET_VSI_VLAN_VALID		0x8000
 	u8	reserved[8];
 };
@@ -2066,12 +2070,6 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start);
 #define I40E_AQC_CEE_PFC_STATUS_MASK	(0x7 << I40E_AQC_CEE_PFC_STATUS_SHIFT)
 #define I40E_AQC_CEE_APP_STATUS_SHIFT	0x8
 #define I40E_AQC_CEE_APP_STATUS_MASK	(0x7 << I40E_AQC_CEE_APP_STATUS_SHIFT)
-#define I40E_AQC_CEE_FCOE_STATUS_SHIFT	0x8
-#define I40E_AQC_CEE_FCOE_STATUS_MASK	(0x7 << I40E_AQC_CEE_FCOE_STATUS_SHIFT)
-#define I40E_AQC_CEE_ISCSI_STATUS_SHIFT	0xA
-#define I40E_AQC_CEE_ISCSI_STATUS_MASK	(0x7 << I40E_AQC_CEE_ISCSI_STATUS_SHIFT)
-#define I40E_AQC_CEE_FIP_STATUS_SHIFT	0x10
-#define I40E_AQC_CEE_FIP_STATUS_MASK	(0x7 << I40E_AQC_CEE_FIP_STATUS_SHIFT)
 struct i40e_aqc_get_cee_dcb_cfg_v1_resp {
 	u8	reserved1;
 	u8	oper_num_tc;
diff --git a/sys/dev/ixl/i40e_common.c b/sys/dev/ixl/i40e_common.c
index f0f128e1ed4..777ecef9343 100755
--- a/sys/dev/ixl/i40e_common.c
+++ b/sys/dev/ixl/i40e_common.c
@@ -866,7 +866,7 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
 	return media;
 }
 
-#define I40E_PF_RESET_WAIT_COUNT	110
+#define I40E_PF_RESET_WAIT_COUNT	200
 /**
  * i40e_pf_reset - Reset the PF
  * @hw: pointer to the hardware structure
@@ -1108,11 +1108,9 @@ u32 i40e_led_get(struct i40e_hw *hw)
 		if (!gpio_val)
 			continue;
 
-		/* ignore gpio LED src mode entries related to the activity
-		 *  LEDs
-		 */
-		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
-				>> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
+		/* ignore gpio LED src mode entries related to the activity LEDs */
+		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
+			I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
 		switch (current_mode) {
 		case I40E_COMBINED_ACTIVITY:
 		case I40E_FILTER_ACTIVITY:
@@ -1156,11 +1154,9 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
 		if (!gpio_val)
 			continue;
 
-		/* ignore gpio LED src mode entries related to the activity
-		 * LEDs
-		 */
-		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
-				>> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
+		/* ignore gpio LED src mode entries related to the activity LEDs */
+		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
+			I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
 		switch (current_mode) {
 		case I40E_COMBINED_ACTIVITY:
 		case I40E_FILTER_ACTIVITY:
@@ -1529,6 +1525,7 @@ enum i40e_status_code i40e_aq_get_link_info(struct i40e_hw *hw,
 	return status;
 }
 
+
 /**
  * i40e_aq_set_phy_int_mask
  * @hw: pointer to the hw struct
@@ -2816,13 +2813,12 @@ enum i40e_status_code i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,
 #define I40E_DEV_FUNC_CAP_MSIX_VF	0x44
 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR	0x45
 #define I40E_DEV_FUNC_CAP_IEEE_1588	0x46
-#define I40E_DEV_FUNC_CAP_FLEX10	0xF1
+#define I40E_DEV_FUNC_CAP_MFP_MODE_1	0xF1
 #define I40E_DEV_FUNC_CAP_CEM		0xF2
 #define I40E_DEV_FUNC_CAP_IWARP		0x51
 #define I40E_DEV_FUNC_CAP_LED		0x61
 #define I40E_DEV_FUNC_CAP_SDP		0x62
 #define I40E_DEV_FUNC_CAP_MDIO		0x63
-#define I40E_DEV_FUNC_CAP_WR_CSR_PROT	0x64
 
 /**
  * i40e_parse_discover_capabilities
@@ -2840,7 +2836,6 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 	struct i40e_aqc_list_capabilities_element_resp *cap;
 	u32 valid_functions, num_functions;
 	u32 number, logical_id, phys_id;
-	u8 major_rev;
 	struct i40e_hw_capabilities *p;
 	u32 i = 0;
 	u16 id;
@@ -2859,7 +2854,6 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 		number = LE32_TO_CPU(cap->number);
 		logical_id = LE32_TO_CPU(cap->logical_id);
 		phys_id = LE32_TO_CPU(cap->phys_id);
-		major_rev = cap->major_rev;
 
 		switch (id) {
 		case I40E_DEV_FUNC_CAP_SWITCH_MODE:
@@ -2934,21 +2928,9 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 		case I40E_DEV_FUNC_CAP_MSIX_VF:
 			p->num_msix_vectors_vf = number;
 			break;
-		case I40E_DEV_FUNC_CAP_FLEX10:
-			if (major_rev == 1) {
-				if (number == 1) {
-					p->flex10_enable = TRUE;
-					p->flex10_capable = TRUE;
-				}
-			} else {
-				/* Capability revision >= 2 */
-				if (number & 1)
-					p->flex10_enable = TRUE;
-				if (number & 2)
-					p->flex10_capable = TRUE;
-			}
-			p->flex10_mode = logical_id;
-			p->flex10_status = phys_id;
+		case I40E_DEV_FUNC_CAP_MFP_MODE_1:
+			if (number == 1)
+				p->mfp_mode_1 = TRUE;
 			break;
 		case I40E_DEV_FUNC_CAP_CEM:
 			if (number == 1)
@@ -2981,18 +2963,11 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 			p->fd_filters_guaranteed = number;
 			p->fd_filters_best_effort = logical_id;
 			break;
-		case I40E_DEV_FUNC_CAP_WR_CSR_PROT:
-			p->wr_csr_prot = (u64)number;
-			p->wr_csr_prot |= (u64)logical_id << 32;
-			break;
 		default:
 			break;
 		}
 	}
 
-	if (p->fcoe)
-		i40e_debug(hw, I40E_DEBUG_ALL, "device is FCoE capable\n");
-
 	/* Always disable FCoE if compiled without the I40E_FCOE_ENA flag */
 	p->fcoe = FALSE;
 
@@ -4947,63 +4922,6 @@ void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)
 	}
 }
 
-/**
- * i40e_aq_debug_dump
- * @hw: pointer to the hardware structure
- * @cluster_id: specific cluster to dump
- * @table_id: table id within cluster
- * @start_index: index of line in the block to read
- * @buff_size: dump buffer size
- * @buff: dump buffer
- * @ret_buff_size: actual buffer size returned
- * @ret_next_table: next block to read
- * @ret_next_index: next index to read
- *
- * Dump internal FW/HW data for debug purposes.
- *
- **/
-enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,
-				u8 table_id, u32 start_index, u16 buff_size,
-				void *buff, u16 *ret_buff_size,
-				u8 *ret_next_table, u32 *ret_next_index,
-				struct i40e_asq_cmd_details *cmd_details)
-{
-	struct i40e_aq_desc desc;
-	struct i40e_aqc_debug_dump_internals *cmd =
-		(struct i40e_aqc_debug_dump_internals *)&desc.params.raw;
-	struct i40e_aqc_debug_dump_internals *resp =
-		(struct i40e_aqc_debug_dump_internals *)&desc.params.raw;
-	enum i40e_status_code status;
-
-	if (buff_size == 0 || !buff)
-		return I40E_ERR_PARAM;
-
-	i40e_fill_default_direct_cmd_desc(&desc,
-					  i40e_aqc_opc_debug_dump_internals);
-	/* Indirect Command */
-	desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
-	if (buff_size > I40E_AQ_LARGE_BUF)
-		desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
-
-	cmd->cluster_id = cluster_id;
-	cmd->table_id = table_id;
-	cmd->idx = CPU_TO_LE32(start_index);
-
-	desc.datalen = CPU_TO_LE16(buff_size);
-
-	status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
-	if (!status) {
-		if (ret_buff_size != NULL)
-			*ret_buff_size = LE16_TO_CPU(desc.datalen);
-		if (ret_next_table != NULL)
-			*ret_next_table = resp->table_id;
-		if (ret_next_index != NULL)
-			*ret_next_index = LE32_TO_CPU(resp->idx);
-	}
-
-	return status;
-}
-
 /**
  * i40e_read_bw_from_alt_ram
  * @hw: pointer to the hardware structure
diff --git a/sys/dev/ixl/i40e_prototype.h b/sys/dev/ixl/i40e_prototype.h
index fc4907e9606..d49b52da66f 100755
--- a/sys/dev/ixl/i40e_prototype.h
+++ b/sys/dev/ixl/i40e_prototype.h
@@ -445,9 +445,4 @@ enum i40e_status_code i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,
 				u16 vsi_seid, u16 queue, bool is_add,
 				struct i40e_control_filter_stats *stats,
 				struct i40e_asq_cmd_details *cmd_details);
-enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,
-				u8 table_id, u32 start_index, u16 buff_size,
-				void *buff, u16 *ret_buff_size,
-				u8 *ret_next_table, u32 *ret_next_index,
-				struct i40e_asq_cmd_details *cmd_details);
 #endif /* _I40E_PROTOTYPE_H_ */
diff --git a/sys/dev/ixl/i40e_type.h b/sys/dev/ixl/i40e_type.h
index 7fe50e29641..1de747dfc9a 100755
--- a/sys/dev/ixl/i40e_type.h
+++ b/sys/dev/ixl/i40e_type.h
@@ -287,17 +287,7 @@ struct i40e_hw_capabilities {
 	bool dcb;
 	bool fcoe;
 	bool iscsi; /* Indicates iSCSI enabled */
-	bool flex10_enable;
-	bool flex10_capable;
-	u32  flex10_mode;
-#define I40E_FLEX10_MODE_UNKNOWN	0x0
-#define I40E_FLEX10_MODE_DCC		0x1
-#define I40E_FLEX10_MODE_DCI		0x2
-
-	u32 flex10_status;
-#define I40E_FLEX10_STATUS_DCC_ERROR	0x1
-#define I40E_FLEX10_STATUS_VC_MODE	0x2
-
+	bool mfp_mode_1;
 	bool mgmt_cem;
 	bool ieee_1588;
 	bool iwarp;
@@ -326,7 +316,6 @@ struct i40e_hw_capabilities {
 	u8 rx_buf_chain_len;
 	u32 enabled_tcmap;
 	u32 maxtc;
-	u64 wr_csr_prot;
 };
 
 struct i40e_mac_info {
@@ -573,7 +562,7 @@ struct i40e_hw {
 	u32 debug_mask;
 };
 
-static INLINE bool i40e_is_vf(struct i40e_hw *hw)
+static inline bool i40e_is_vf(struct i40e_hw *hw)
 {
 	return hw->mac.type == I40E_MAC_VF;
 }
@@ -1274,9 +1263,6 @@ struct i40e_hw_port_stats {
 	/* flow director stats */
 	u64 fd_atr_match;
 	u64 fd_sb_match;
-	u64 fd_atr_tunnel_match;
-	u32 fd_atr_status;
-	u32 fd_sb_status;
 	/* EEE LPI */
 	u32 tx_lpi_status;
 	u32 rx_lpi_status;
diff --git a/sys/dev/ixl/if_ixl.c b/sys/dev/ixl/if_ixl.c
index 9c3c161039b..d26db6812b2 100755
--- a/sys/dev/ixl/if_ixl.c
+++ b/sys/dev/ixl/if_ixl.c
@@ -48,7 +48,7 @@
 /*********************************************************************
  *  Driver version
  *********************************************************************/
-char ixl_driver_version[] = "1.3.6";
+char ixl_driver_version[] = "1.4.1";
 
 /*********************************************************************
  *  PCI Device ID Table
@@ -70,6 +70,7 @@ static ixl_vendor_info_t ixl_vendor_info_array[] =
 	{I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B, 0, 0, 0},
 	{I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C, 0, 0, 0},
 	{I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T, 0, 0, 0},
+	{I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2, 0, 0, 0},
 	/* required last entry */
 	{0, 0, 0, 0, 0}
 };
@@ -113,16 +114,17 @@ static void	ixl_configure_legacy(struct ixl_pf *);
 static void	ixl_free_pci_resources(struct ixl_pf *);
 static void	ixl_local_timer(void *);
 static int	ixl_setup_interface(device_t, struct ixl_vsi *);
-static bool	ixl_config_link(struct i40e_hw *);
+static void	ixl_link_event(struct ixl_pf *, struct i40e_arq_event_info *);
 static void	ixl_config_rss(struct ixl_vsi *);
 static void	ixl_set_queue_rx_itr(struct ixl_queue *);
 static void	ixl_set_queue_tx_itr(struct ixl_queue *);
 static int	ixl_set_advertised_speeds(struct ixl_pf *, int);
 
-static void	ixl_enable_rings(struct ixl_vsi *);
-static void	ixl_disable_rings(struct ixl_vsi *);
-static void     ixl_enable_intr(struct ixl_vsi *);
-static void     ixl_disable_intr(struct ixl_vsi *);
+static int	ixl_enable_rings(struct ixl_vsi *);
+static int	ixl_disable_rings(struct ixl_vsi *);
+static void	ixl_enable_intr(struct ixl_vsi *);
+static void	ixl_disable_intr(struct ixl_vsi *);
+static void	ixl_disable_rings_intr(struct ixl_vsi *);
 
 static void     ixl_enable_adminq(struct i40e_hw *);
 static void     ixl_disable_adminq(struct i40e_hw *);
@@ -139,6 +141,7 @@ static void	ixl_unregister_vlan(void *, struct ifnet *, u16);
 static void	ixl_setup_vlan_filters(struct ixl_vsi *);
 
 static void	ixl_init_filters(struct ixl_vsi *);
+static void	ixl_reconfigure_filters(struct ixl_vsi *vsi);
 static void	ixl_add_filter(struct ixl_vsi *, u8 *, s16 vlan);
 static void	ixl_del_filter(struct ixl_vsi *, u8 *, s16 vlan);
 static void	ixl_add_hw_filters(struct ixl_vsi *, int, int);
@@ -146,6 +149,8 @@ static void	ixl_del_hw_filters(struct ixl_vsi *, int);
 static struct ixl_mac_filter *
 		ixl_find_filter(struct ixl_vsi *, u8 *, s16);
 static void	ixl_add_mc_filter(struct ixl_vsi *, u8 *);
+static void	ixl_free_mac_filters(struct ixl_vsi *vsi);
+
 
 /* Sysctl debug interface */
 static int	ixl_debug_info(SYSCTL_HANDLER_ARGS);
@@ -175,6 +180,7 @@ static void	ixl_add_sysctls_eth_stats(struct sysctl_ctx_list *,
 		    struct i40e_eth_stats *);
 static void	ixl_update_stats_counters(struct ixl_pf *);
 static void	ixl_update_eth_stats(struct ixl_vsi *);
+static void	ixl_update_vsi_stats(struct ixl_vsi *);
 static void	ixl_pf_reset_stats(struct ixl_pf *);
 static void	ixl_vsi_reset_stats(struct ixl_vsi *);
 static void	ixl_stat_update48(struct i40e_hw *, u32, u32, bool,
@@ -188,7 +194,21 @@ static int	ixl_sysctl_phy_abilities(SYSCTL_HANDLER_ARGS);
 static int	ixl_sysctl_sw_filter_list(SYSCTL_HANDLER_ARGS);
 static int	ixl_sysctl_hw_res_alloc(SYSCTL_HANDLER_ARGS);
 static int	ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS);
-static int	ixl_sysctl_dump_txd(SYSCTL_HANDLER_ARGS);
+#endif
+
+#ifdef PCI_IOV
+static int	ixl_adminq_err_to_errno(enum i40e_admin_queue_err err);
+
+static int	ixl_init_iov(device_t dev, uint16_t num_vfs, const nvlist_t*);
+static void	ixl_uninit_iov(device_t dev);
+static int	ixl_add_vf(device_t dev, uint16_t vfnum, const nvlist_t*);
+
+static void	ixl_handle_vf_msg(struct ixl_pf *,
+		    struct i40e_arq_event_info *);
+static void	ixl_handle_vflr(void *arg, int pending);
+
+static void	ixl_reset_vf(struct ixl_pf *pf, struct ixl_vf *vf);
+static void	ixl_reinit_vf(struct ixl_pf *pf, struct ixl_vf *vf);
 #endif
 
 /*********************************************************************
@@ -201,6 +221,11 @@ static device_method_t ixl_methods[] = {
 	DEVMETHOD(device_attach, ixl_attach),
 	DEVMETHOD(device_detach, ixl_detach),
 	DEVMETHOD(device_shutdown, ixl_shutdown),
+#ifdef PCI_IOV
+	DEVMETHOD(pci_init_iov, ixl_init_iov),
+	DEVMETHOD(pci_uninit_iov, ixl_uninit_iov),
+	DEVMETHOD(pci_add_vf, ixl_add_vf),
+#endif
 	{0, 0}
 };
 
@@ -213,10 +238,12 @@ DRIVER_MODULE(ixl, pci, ixl_driver, ixl_devclass, 0, 0);
 
 MODULE_DEPEND(ixl, pci, 1, 1, 1);
 MODULE_DEPEND(ixl, ether, 1, 1, 1);
+
 #ifdef DEV_NETMAP
 MODULE_DEPEND(ixl, netmap, 1, 1, 1);
 #endif /* DEV_NETMAP */
 
+
 /*
 ** Global reset mutex
 */
@@ -304,6 +331,10 @@ static char *ixl_fc_string[6] = {
 	"Default"
 };
 
+static MALLOC_DEFINE(M_IXL, "ixl", "ixl driver allocations");
+
+static uint8_t ixl_bcast_addr[ETHER_ADDR_LEN] =
+    {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 
 /*********************************************************************
  *  Device identification routine
@@ -380,6 +411,10 @@ ixl_attach(device_t dev)
 	struct ixl_vsi *vsi;
 	u16		bus;
 	int             error = 0;
+#ifdef PCI_IOV
+	nvlist_t	*pf_schema, *vf_schema;
+	int		iov_error;
+#endif
 
 	INIT_DEBUGOUT("ixl_attach: begin");
 
@@ -467,11 +502,6 @@ ixl_attach(device_t dev)
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
 	    OID_AUTO, "switch_config", CTLTYPE_STRING | CTLFLAG_RD,
 	    pf, 0, ixl_sysctl_switch_config, "A", "HW Switch Configuration");
-
-	SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
-	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
-	    OID_AUTO, "dump_desc", CTLTYPE_INT | CTLFLAG_WR,
-	    pf, 0, ixl_sysctl_dump_txd, "I", "Desc dump");
 #endif
 
 	/* Save off the PCI information */
@@ -486,6 +516,8 @@ ixl_attach(device_t dev)
 	hw->bus.device = pci_get_slot(dev);
 	hw->bus.func = pci_get_function(dev);
 
+	pf->vc_debug_lvl = 1;
+
 	/* Do PCI setup - map BAR0, etc */
 	if (ixl_allocate_pci_resources(pf)) {
 		device_printf(dev, "Allocation of PCI resources failed\n");
@@ -556,7 +588,8 @@ ixl_attach(device_t dev)
 	}
 
 	/* Set up host memory cache */
-	error = i40e_init_lan_hmc(hw, vsi->num_queues, vsi->num_queues, 0, 0);
+	error = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
+	    hw->func_caps.num_rx_qp, 0, 0);
 	if (error) {
 		device_printf(dev, "init_lan_hmc failed: %d\n", error);
 		goto err_get_cap;
@@ -608,16 +641,8 @@ ixl_attach(device_t dev)
 	}
 
 	/* Determine link state */
-	vsi->link_up = ixl_config_link(hw);
-
-	/* Report if Unqualified modules are found */
-	if ((vsi->link_up == FALSE) &&
-	    (pf->hw.phy.link_info.link_info &
-	    I40E_AQ_MEDIA_AVAILABLE) &&
-	    (!(pf->hw.phy.link_info.an_info &
-	    I40E_AQ_QUALIFIED_MODULE)))
-		device_printf(dev, "Link failed because "
-		    "an unqualified module was detected\n");
+	i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
+	pf->link_up = i40e_get_link_status(hw);
 
 	/* Setup OS specific network interface */
 	if (ixl_setup_interface(dev, vsi) != 0) {
@@ -653,10 +678,31 @@ ixl_attach(device_t dev)
 	vsi->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig,
 	    ixl_unregister_vlan, vsi, EVENTHANDLER_PRI_FIRST);
 
+#ifdef PCI_IOV
+	/* SR-IOV is only supported when MSI-X is in use. */
+	if (pf->msix > 1) {
+		pf_schema = pci_iov_schema_alloc_node();
+		vf_schema = pci_iov_schema_alloc_node();
+		pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
+		pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof",
+		    IOV_SCHEMA_HASDEFAULT, TRUE);
+		pci_iov_schema_add_bool(vf_schema, "allow-set-mac",
+		    IOV_SCHEMA_HASDEFAULT, FALSE);
+		pci_iov_schema_add_bool(vf_schema, "allow-promisc",
+		    IOV_SCHEMA_HASDEFAULT, FALSE);
+
+		iov_error = pci_iov_attach(dev, pf_schema, vf_schema);
+		if (iov_error != 0)
+			device_printf(dev,
+			    "Failed to initialize SR-IOV (error=%d)\n",
+			    iov_error);
+	}
+#endif
 
 #ifdef DEV_NETMAP
 	ixl_netmap_attach(vsi);
 #endif /* DEV_NETMAP */
+
 	INIT_DEBUGOUT("ixl_attach: end");
 	return (0);
 
@@ -692,6 +738,9 @@ ixl_detach(device_t dev)
 	struct ixl_vsi		*vsi = &pf->vsi;
 	struct ixl_queue	*que = vsi->queues;
 	i40e_status		status;
+#ifdef PCI_IOV
+	int			error;
+#endif
 
 	INIT_DEBUGOUT("ixl_detach: begin");
 
@@ -701,6 +750,14 @@ ixl_detach(device_t dev)
 		return (EBUSY);
 	}
 
+#ifdef PCI_IOV
+	error = pci_iov_detach(dev);
+	if (error != 0) {
+		device_printf(dev, "SR-IOV in use; detach first.\n");
+		return (error);
+	}
+#endif
+
 	ether_ifdetach(vsi->ifp);
 	if (vsi->ifp->if_drv_flags & IFF_DRV_RUNNING) {
 		IXL_PF_LOCK(pf);
@@ -738,8 +795,6 @@ ixl_detach(device_t dev)
 #ifdef DEV_NETMAP
 	netmap_detach(vsi->ifp);
 #endif /* DEV_NETMAP */
-
-
 	ixl_free_pci_resources(pf);
 	bus_generic_detach(dev);
 	if_free(vsi->ifp);
@@ -908,7 +963,7 @@ static int
 ixl_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
 {
 	struct ixl_vsi	*vsi = ifp->if_softc;
-	struct ixl_pf	*pf = (struct ixl_pf *)vsi->back;
+	struct ixl_pf	*pf = vsi->back;
 	struct ifreq	*ifr = (struct ifreq *) data;
 #if defined(INET) || defined(INET6)
 	struct ifaddr *ifa = (struct ifaddr *)data;
@@ -1133,6 +1188,8 @@ ixl_init_locked(struct ixl_pf *pf)
 
 	i40e_aq_set_default_vsi(hw, vsi->seid, NULL);
 
+	ixl_reconfigure_filters(vsi);
+
 	/* Set MTU in hardware*/
 	int aq_error = i40e_aq_set_mac_config(hw, vsi->max_frame_size,
 	    TRUE, 0, NULL);
@@ -1227,6 +1284,11 @@ ixl_intr(void *arg)
 
         mask = rd32(hw, I40E_PFINT_ICR0_ENA);
 
+#ifdef PCI_IOV
+	if (icr0 & I40E_PFINT_ICR0_VFLR_MASK)
+		taskqueue_enqueue(pf->tq, &pf->vflr_task);
+#endif
+
 	if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
 		taskqueue_enqueue(pf->tq, &pf->adminq);
 		return;
@@ -1330,8 +1392,12 @@ ixl_msix_adminq(void *arg)
 		mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
 	}
 
-	if (reg & I40E_PFINT_ICR0_VFLR_MASK)
+#ifdef PCI_IOV
+	if (reg & I40E_PFINT_ICR0_VFLR_MASK) {
 		mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
+		taskqueue_enqueue(pf->tq, &pf->vflr_task);
+	}
+#endif
 
 	reg = rd32(hw, I40E_PFINT_DYN_CTL0);
 	reg = reg | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK;
@@ -1353,18 +1419,20 @@ static void
 ixl_media_status(struct ifnet * ifp, struct ifmediareq * ifmr)
 {
 	struct ixl_vsi	*vsi = ifp->if_softc;
-	struct ixl_pf	*pf = (struct ixl_pf *)vsi->back;
+	struct ixl_pf	*pf = vsi->back;
 	struct i40e_hw  *hw = &pf->hw;
 
 	INIT_DEBUGOUT("ixl_media_status: begin");
 	IXL_PF_LOCK(pf);
 
+	hw->phy.get_link_info = TRUE;
+	pf->link_up = i40e_get_link_status(hw);
 	ixl_update_link_status(pf);
 
 	ifmr->ifm_status = IFM_AVALID;
 	ifmr->ifm_active = IFM_ETHER;
 
-	if (!vsi->link_up) {
+	if (!pf->link_up) {
 		IXL_PF_UNLOCK(pf);
 		return;
 	}
@@ -1754,15 +1822,14 @@ ixl_update_link_status(struct ixl_pf *pf)
 	struct ifnet		*ifp = vsi->ifp;
 	device_t		dev = pf->dev;
 
-
-	if (vsi->link_up){ 
+	if (pf->link_up){ 
 		if (vsi->link_active == FALSE) {
-			i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
 			pf->fc = hw->fc.current_mode;
 			if (bootverbose) {
 				device_printf(dev,"Link is up %d Gbps %s,"
 				    " Flow Control: %s\n",
-				    ((vsi->link_speed == I40E_LINK_SPEED_40GB)? 40:10),
+				    ((pf->link_speed ==
+				    I40E_LINK_SPEED_40GB)? 40:10),
 				    "Full Duplex", ixl_fc_string[pf->fc]);
 			}
 			vsi->link_active = TRUE;
@@ -1771,10 +1838,12 @@ ixl_update_link_status(struct ixl_pf *pf)
 			** partition is not at least 10GB
 			*/
 			if (hw->func_caps.npar_enable &&
-			   (hw->phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
-			   hw->phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
-				device_printf(dev, "The partition detected link"
-				    "speed that is less than 10Gbps\n");
+			   (hw->phy.link_info.link_speed ==
+			   I40E_LINK_SPEED_1GB ||
+			   hw->phy.link_info.link_speed ==
+			   I40E_LINK_SPEED_100MB))
+				device_printf(dev, "The partition detected"
+				    "link speed that is less than 10Gbps\n");
 			if_link_state_change(ifp, LINK_STATE_UP);
 		}
 	} else { /* Link down */
@@ -1805,7 +1874,10 @@ ixl_stop(struct ixl_pf *pf)
 	mtx_assert(&pf->pf_mtx, MA_OWNED);
 
 	INIT_DEBUGOUT("ixl_stop: begin\n");
-	ixl_disable_intr(vsi);
+	if (pf->num_vfs == 0)
+		ixl_disable_intr(vsi);
+	else
+		ixl_disable_rings_intr(vsi);
 	ixl_disable_rings(vsi);
 
 	/* Tell the stack that the interface is no longer active */
@@ -1858,6 +1930,11 @@ ixl_assign_vsi_legacy(struct ixl_pf *pf)
 	taskqueue_start_threads(&que->tq, 1, PI_NET, "%s que",
 	    device_get_nameunit(dev));
 	TASK_INIT(&pf->adminq, 0, ixl_do_adminq, pf);
+
+#ifdef PCI_IOV
+	TASK_INIT(&pf->vflr_task, 0, ixl_handle_vflr, pf);
+#endif
+
 	pf->tq = taskqueue_create_fast("ixl_adm", M_NOWAIT,
 	    taskqueue_thread_enqueue, &pf->tq);
 	taskqueue_start_threads(&pf->tq, 1, PI_NET, "%s adminq",
@@ -1906,6 +1983,11 @@ ixl_assign_vsi_msix(struct ixl_pf *pf)
 	pf->admvec = vector;
 	/* Tasklet for Admin Queue */
 	TASK_INIT(&pf->adminq, 0, ixl_do_adminq, pf);
+
+#ifdef PCI_IOV
+	TASK_INIT(&pf->vflr_task, 0, ixl_handle_vflr, pf);
+#endif
+
 	pf->tq = taskqueue_create_fast("ixl_adm", M_NOWAIT,
 	    taskqueue_thread_enqueue, &pf->tq);
 	taskqueue_start_threads(&pf->tq, 1, PI_NET, "%s adminq",
@@ -2330,6 +2412,10 @@ ixl_add_ifmedia(struct ixl_vsi *vsi, u32 phy_type)
 
 	if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_T))
 		ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_T, 0, NULL);
+	if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_SX))
+		ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_SX, 0, NULL);
+	if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_LX))
+		ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_LX, 0, NULL);
 
 	if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1_CU) ||
 	    phy_type & (1 << I40E_PHY_TYPE_10GBASE_KX4) ||
@@ -2470,17 +2556,32 @@ ixl_setup_interface(device_t dev, struct ixl_vsi *vsi)
 	return (0);
 }
 
-static bool
-ixl_config_link(struct i40e_hw *hw)
+/*
+** Run when the Admin Queue gets a
+** link transition interrupt.
+*/
+static void
+ixl_link_event(struct ixl_pf *pf, struct i40e_arq_event_info *e)
 {
+	struct i40e_hw	*hw = &pf->hw; 
+	struct i40e_aqc_get_link_status *status =
+	    (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
 	bool check;
 
-	i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
+	hw->phy.get_link_info = TRUE;
 	check = i40e_get_link_status(hw);
+	pf->link_up = check;
 #ifdef IXL_DEBUG
 	printf("Link is %s\n", check ? "up":"down");
 #endif
-	return (check);
+	/* Report if Unqualified modules are found */
+	if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
+	    (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
+	    (!(status->link_info & I40E_AQ_LINK_UP)))
+		device_printf(pf->dev, "Link failed because "
+		    "an unqualified module was detected\n");
+
+	return;
 }
 
 /*********************************************************************
@@ -2498,7 +2599,7 @@ ixl_switch_config(struct ixl_pf *pf)
 	device_t 	dev = vsi->dev;
 	struct i40e_aqc_get_switch_config_resp *sw_config;
 	u8	aq_buf[I40E_AQ_LARGE_BUF];
-	int	ret = I40E_SUCCESS;
+	int	ret;
 	u16	next = 0;
 
 	memset(&aq_buf, 0, sizeof(aq_buf));
@@ -2506,19 +2607,26 @@ ixl_switch_config(struct ixl_pf *pf)
 	ret = i40e_aq_get_switch_config(hw, sw_config,
 	    sizeof(aq_buf), &next, NULL);
 	if (ret) {
-		device_printf(dev,"aq_get_switch_config failed!!\n");
+		device_printf(dev,"aq_get_switch_config failed (ret=%d)!!\n",
+		    ret);
 		return (ret);
 	}
 #ifdef IXL_DEBUG
-	printf("Switch config: header reported: %d in structure, %d total\n",
+	device_printf(dev,
+	    "Switch config: header reported: %d in structure, %d total\n",
     	    sw_config->header.num_reported, sw_config->header.num_total);
-	printf("type=%d seid=%d uplink=%d downlink=%d\n",
-	    sw_config->element[0].element_type,
-	    sw_config->element[0].seid,
-	    sw_config->element[0].uplink_seid,
-	    sw_config->element[0].downlink_seid);
+	for (int i = 0; i < sw_config->header.num_reported; i++) {
+		device_printf(dev,
+		    "%d: type=%d seid=%d uplink=%d downlink=%d\n", i,
+		    sw_config->element[i].element_type,
+		    sw_config->element[i].seid,
+		    sw_config->element[i].uplink_seid,
+		    sw_config->element[i].downlink_seid);
+	}
 #endif
 	/* Simplified due to a single VSI at the moment */
+	vsi->uplink_seid = sw_config->element[0].uplink_seid;
+	vsi->downlink_seid = sw_config->element[0].downlink_seid;
 	vsi->seid = sw_config->element[0].seid;
 	return (ret);
 }
@@ -2533,6 +2641,7 @@ ixl_switch_config(struct ixl_pf *pf)
 static int
 ixl_initialize_vsi(struct ixl_vsi *vsi)
 {
+	struct ixl_pf		*pf = vsi->back;
 	struct ixl_queue	*que = vsi->queues;
 	device_t		dev = vsi->dev;
 	struct i40e_hw		*hw = vsi->hw;
@@ -2541,6 +2650,8 @@ ixl_initialize_vsi(struct ixl_vsi *vsi)
 
 	memset(&ctxt, 0, sizeof(ctxt));
 	ctxt.seid = vsi->seid;
+	if (pf->veb_seid != 0)
+		ctxt.uplink_seid = pf->veb_seid;
 	ctxt.pf_num = hw->pf_id;
 	err = i40e_aq_get_vsi_params(hw, &ctxt, NULL);
 	if (err) {
@@ -2582,6 +2693,8 @@ ixl_initialize_vsi(struct ixl_vsi *vsi)
 	vsi->hw_filters_add = 0;
 	vsi->hw_filters_del = 0;
 
+	ctxt.flags = htole16(I40E_AQ_VSI_TYPE_PF);
+
 	err = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
 	if (err) {
 		device_printf(dev,"update vsi params failed %x!!\n",
@@ -2602,7 +2715,7 @@ ixl_initialize_vsi(struct ixl_vsi *vsi)
 		size = que->num_desc * sizeof(struct i40e_tx_desc);
 		memset(&tctx, 0, sizeof(struct i40e_hmc_obj_txq));
 		tctx.new_context = 1;
-		tctx.base = (txr->dma.pa/128);
+		tctx.base = (txr->dma.pa/IXL_TX_CTX_BASE_UNITS);
 		tctx.qlen = que->num_desc;
 		tctx.fc_ena = 0;
 		tctx.rdylist = vsi->info.qs_handle[0]; /* index is TC */
@@ -2632,7 +2745,7 @@ ixl_initialize_vsi(struct ixl_vsi *vsi)
 		ixl_init_tx_ring(que);
 
 		/* Next setup the HMC RX Context  */
-		if (vsi->max_frame_size <= 2048)
+		if (vsi->max_frame_size <= MCLBYTES)
 			rxr->mbuf_sz = MCLBYTES;
 		else
 			rxr->mbuf_sz = MJUMPAGESIZE;
@@ -2649,7 +2762,7 @@ ixl_initialize_vsi(struct ixl_vsi *vsi)
 		rctx.dtype = 0;
 		rctx.dsize = 1;	/* do 32byte descriptors */
 		rctx.hsplit_0 = 0;  /* no HDR split initially */
-		rctx.base = (rxr->dma.pa/128);
+		rctx.base = (rxr->dma.pa/IXL_RX_CTX_BASE_UNITS);
 		rctx.qlen = que->num_desc;
 		rctx.tphrdesc_ena = 1;
 		rctx.tphwdesc_ena = 1;
@@ -2704,7 +2817,6 @@ ixl_free_vsi(struct ixl_vsi *vsi)
 {
 	struct ixl_pf		*pf = (struct ixl_pf *)vsi->back;
 	struct ixl_queue	*que = vsi->queues;
-	struct ixl_mac_filter *f;
 
 	/* Free station queues */
 	for (int i = 0; i < vsi->num_queues; i++, que++) {
@@ -2733,6 +2845,14 @@ ixl_free_vsi(struct ixl_vsi *vsi)
 	free(vsi->queues, M_DEVBUF);
 
 	/* Free VSI filter list */
+	ixl_free_mac_filters(vsi);
+}
+
+static void
+ixl_free_mac_filters(struct ixl_vsi *vsi)
+{
+	struct ixl_mac_filter *f;
+
 	while (!SLIST_EMPTY(&vsi->ftl)) {
 		f = SLIST_FIRST(&vsi->ftl);
 		SLIST_REMOVE_HEAD(&vsi->ftl, next);
@@ -2764,6 +2884,7 @@ ixl_setup_stations(struct ixl_pf *pf)
 	vsi->hw = &pf->hw;
 	vsi->id = 0;
 	vsi->num_vlans = 0;
+	vsi->back = pf;
 
 	/* Get memory for the station queues */
         if (!(vsi->queues =
@@ -3016,6 +3137,24 @@ ixl_set_queue_tx_itr(struct ixl_queue *que)
 	return;
 }
 
+#define QUEUE_NAME_LEN 32
+
+static void
+ixl_add_vsi_sysctls(struct ixl_pf *pf, struct ixl_vsi *vsi,
+    struct sysctl_ctx_list *ctx, const char *sysctl_name)
+{
+	struct sysctl_oid *tree;
+	struct sysctl_oid_list *child;
+	struct sysctl_oid_list *vsi_list;
+
+	tree = device_get_sysctl_tree(pf->dev);
+	child = SYSCTL_CHILDREN(tree);
+	vsi->vsi_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, sysctl_name,
+				   CTLFLAG_RD, NULL, "VSI Number");
+	vsi_list = SYSCTL_CHILDREN(vsi->vsi_node);
+
+	ixl_add_sysctls_eth_stats(ctx, vsi_list, &vsi->eth_stats);
+}
 
 static void
 ixl_add_hw_stats(struct ixl_pf *pf)
@@ -3023,18 +3162,19 @@ ixl_add_hw_stats(struct ixl_pf *pf)
 	device_t dev = pf->dev;
 	struct ixl_vsi *vsi = &pf->vsi;
 	struct ixl_queue *queues = vsi->queues;
-	struct i40e_eth_stats *vsi_stats = &vsi->eth_stats;
 	struct i40e_hw_port_stats *pf_stats = &pf->stats;
 
 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
 	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
+	struct sysctl_oid_list *vsi_list;
 
-	struct sysctl_oid *vsi_node, *queue_node;
-	struct sysctl_oid_list *vsi_list, *queue_list;
+	struct sysctl_oid *queue_node;
+	struct sysctl_oid_list *queue_list;
 
 	struct tx_ring *txr;
 	struct rx_ring *rxr;
+	char queue_namebuf[QUEUE_NAME_LEN];
 
 	/* Driver statistics */
 	SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events",
@@ -3044,23 +3184,18 @@ ixl_add_hw_stats(struct ixl_pf *pf)
 			CTLFLAG_RD, &pf->admin_irq,
 			"Admin Queue IRQ Handled");
 
-	/* VSI statistics */
-#define QUEUE_NAME_LEN 32
-	char queue_namebuf[QUEUE_NAME_LEN];
-	
-	// ERJ: Only one vsi now, re-do when >1 VSI enabled
-	// snprintf(vsi_namebuf, QUEUE_NAME_LEN, "vsi%d", vsi->info.stat_counter_idx);
-	vsi_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "vsi",
-				   CTLFLAG_RD, NULL, "VSI-specific stats");
-	vsi_list = SYSCTL_CHILDREN(vsi_node);
+	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "vc_debug_level",
+	    CTLFLAG_RW, &pf->vc_debug_lvl, 0,
+	    "PF/VF Virtual Channel debug logging level");
 
-	ixl_add_sysctls_eth_stats(ctx, vsi_list, vsi_stats);
+	ixl_add_vsi_sysctls(pf, &pf->vsi, ctx, "pf");
+	vsi_list = SYSCTL_CHILDREN(pf->vsi.vsi_node);
 
 	/* Queue statistics */
 	for (int q = 0; q < vsi->num_queues; q++) {
 		snprintf(queue_namebuf, QUEUE_NAME_LEN, "que%d", q);
-		queue_node = SYSCTL_ADD_NODE(ctx, vsi_list, OID_AUTO, queue_namebuf,
-					     CTLFLAG_RD, NULL, "Queue #");
+		queue_node = SYSCTL_ADD_NODE(ctx, vsi_list,
+		    OID_AUTO, queue_namebuf, CTLFLAG_RD, NULL, "Queue #");
 		queue_list = SYSCTL_CHILDREN(queue_node);
 
 		txr = &(queues[q].txr);
@@ -3383,8 +3518,7 @@ static void
 ixl_init_filters(struct ixl_vsi *vsi)
 {
 	/* Add broadcast address */
-	u8 bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-	ixl_add_filter(vsi, bc, IXL_VLAN_ANY);
+	ixl_add_filter(vsi, ixl_bcast_addr, IXL_VLAN_ANY);
 }
 
 /*
@@ -3413,6 +3547,13 @@ ixl_add_mc_filter(struct ixl_vsi *vsi, u8 *macaddr)
 	return;
 }
 
+static void
+ixl_reconfigure_filters(struct ixl_vsi *vsi)
+{
+
+	ixl_add_hw_filters(vsi, IXL_FILTER_USED, vsi->num_macs);
+}
+
 /*
 ** This routine adds macvlan filters
 */
@@ -3420,10 +3561,14 @@ static void
 ixl_add_filter(struct ixl_vsi *vsi, u8 *macaddr, s16 vlan)
 {
 	struct ixl_mac_filter	*f, *tmp;
-	device_t		dev = vsi->dev;
+	struct ixl_pf		*pf;
+	device_t		dev;
 
 	DEBUGOUT("ixl_add_filter: begin");
 
+	pf = vsi->back;
+	dev = pf->dev;
+
 	/* Does one already exist */
 	f = ixl_find_filter(vsi, macaddr, vlan);
 	if (f != NULL)
@@ -3451,6 +3596,8 @@ ixl_add_filter(struct ixl_vsi *vsi, u8 *macaddr, s16 vlan)
 	f->flags |= (IXL_FILTER_ADD | IXL_FILTER_USED);
 	if (f->vlan != IXL_VLAN_ANY)
 		f->flags |= IXL_FILTER_VLAN;
+	else
+		vsi->num_macs++;
 
 	ixl_add_hw_filters(vsi, f->flags, 1);
 	return;
@@ -3467,6 +3614,7 @@ ixl_del_filter(struct ixl_vsi *vsi, u8 *macaddr, s16 vlan)
 
 	f->flags |= IXL_FILTER_DEL;
 	ixl_del_hw_filters(vsi, 1);
+	vsi->num_macs--;
 
 	/* Check if this is the last vlan removal */
 	if (vlan != IXL_VLAN_ANY && vsi->num_vlans == 0) {
@@ -3510,9 +3658,15 @@ ixl_add_hw_filters(struct ixl_vsi *vsi, int flags, int cnt)
 {
 	struct i40e_aqc_add_macvlan_element_data *a, *b;
 	struct ixl_mac_filter	*f;
-	struct i40e_hw	*hw = vsi->hw;
-	device_t	dev = vsi->dev;
-	int		err, j = 0;
+	struct ixl_pf		*pf;
+	struct i40e_hw		*hw;
+	device_t		dev;
+	int			err, j = 0;
+
+	pf = vsi->back;
+	dev = pf->dev;
+	hw = &pf->hw;
+	IXL_PF_LOCK_ASSERT(pf);
 
 	a = malloc(sizeof(struct i40e_aqc_add_macvlan_element_data) * cnt,
 	    M_DEVBUF, M_NOWAIT | M_ZERO);
@@ -3530,9 +3684,14 @@ ixl_add_hw_filters(struct ixl_vsi *vsi, int flags, int cnt)
 		if (f->flags == flags) {
 			b = &a[j]; // a pox on fvl long names :)
 			bcopy(f->macaddr, b->mac_addr, ETHER_ADDR_LEN);
-			b->vlan_tag =
-			    (f->vlan == IXL_VLAN_ANY ? 0 : f->vlan);
-			b->flags = I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
+			if (f->vlan == IXL_VLAN_ANY) {
+				b->vlan_tag = 0;
+				b->flags = I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
+			} else {
+				b->vlan_tag = f->vlan;
+				b->flags = 0;
+			}
+			b->flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
 			f->flags &= ~IXL_FILTER_ADD;
 			j++;
 		}
@@ -3560,13 +3719,18 @@ static void
 ixl_del_hw_filters(struct ixl_vsi *vsi, int cnt)
 {
 	struct i40e_aqc_remove_macvlan_element_data *d, *e;
-	struct i40e_hw		*hw = vsi->hw;
-	device_t		dev = vsi->dev;
+	struct ixl_pf		*pf;
+	struct i40e_hw		*hw;
+	device_t		dev;
 	struct ixl_mac_filter	*f, *f_temp;
 	int			err, j = 0;
 
 	DEBUGOUT("ixl_del_hw_filters: begin\n");
 
+	pf = vsi->back;
+	hw = &pf->hw;
+	dev = pf->dev;
+
 	d = malloc(sizeof(struct i40e_aqc_remove_macvlan_element_data) * cnt,
 	    M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (d == NULL) {
@@ -3610,82 +3774,106 @@ ixl_del_hw_filters(struct ixl_vsi *vsi, int cnt)
 	return;
 }
 
-
-static void
+static int
 ixl_enable_rings(struct ixl_vsi *vsi)
 {
-	struct i40e_hw	*hw = vsi->hw;
+	struct ixl_pf	*pf = vsi->back;
+	struct i40e_hw	*hw = &pf->hw;
+	int		index, error;
 	u32		reg;
 
+	error = 0;
 	for (int i = 0; i < vsi->num_queues; i++) {
-		i40e_pre_tx_queue_cfg(hw, i, TRUE);
+		index = vsi->first_queue + i;
+		i40e_pre_tx_queue_cfg(hw, index, TRUE);
 
-		reg = rd32(hw, I40E_QTX_ENA(i));
+		reg = rd32(hw, I40E_QTX_ENA(index));
 		reg |= I40E_QTX_ENA_QENA_REQ_MASK |
 		    I40E_QTX_ENA_QENA_STAT_MASK;
-		wr32(hw, I40E_QTX_ENA(i), reg);
+		wr32(hw, I40E_QTX_ENA(index), reg);
 		/* Verify the enable took */
 		for (int j = 0; j < 10; j++) {
-			reg = rd32(hw, I40E_QTX_ENA(i));
+			reg = rd32(hw, I40E_QTX_ENA(index));
 			if (reg & I40E_QTX_ENA_QENA_STAT_MASK)
 				break;
 			i40e_msec_delay(10);
 		}
-		if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0)
-			printf("TX queue %d disabled!\n", i);
+		if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0) {
+			device_printf(pf->dev, "TX queue %d disabled!\n",
+			    index);
+			error = ETIMEDOUT;
+		}
 
-		reg = rd32(hw, I40E_QRX_ENA(i));
+		reg = rd32(hw, I40E_QRX_ENA(index));
 		reg |= I40E_QRX_ENA_QENA_REQ_MASK |
 		    I40E_QRX_ENA_QENA_STAT_MASK;
-		wr32(hw, I40E_QRX_ENA(i), reg);
+		wr32(hw, I40E_QRX_ENA(index), reg);
 		/* Verify the enable took */
 		for (int j = 0; j < 10; j++) {
-			reg = rd32(hw, I40E_QRX_ENA(i));
+			reg = rd32(hw, I40E_QRX_ENA(index));
 			if (reg & I40E_QRX_ENA_QENA_STAT_MASK)
 				break;
 			i40e_msec_delay(10);
 		}
-		if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0)
-			printf("RX queue %d disabled!\n", i);
+		if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0) {
+			device_printf(pf->dev, "RX queue %d disabled!\n",
+			    index);
+			error = ETIMEDOUT;
+		}
 	}
+
+	return (error);
 }
 
-static void
+static int
 ixl_disable_rings(struct ixl_vsi *vsi)
 {
-	struct i40e_hw	*hw = vsi->hw;
+	struct ixl_pf	*pf = vsi->back;
+	struct i40e_hw	*hw = &pf->hw;
+	int		index, error;
 	u32		reg;
 
+	error = 0;
 	for (int i = 0; i < vsi->num_queues; i++) {
-		i40e_pre_tx_queue_cfg(hw, i, FALSE);
+		index = vsi->first_queue + i;
+
+		i40e_pre_tx_queue_cfg(hw, index, FALSE);
 		i40e_usec_delay(500);
 
-		reg = rd32(hw, I40E_QTX_ENA(i));
+		reg = rd32(hw, I40E_QTX_ENA(index));
 		reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
-		wr32(hw, I40E_QTX_ENA(i), reg);
+		wr32(hw, I40E_QTX_ENA(index), reg);
 		/* Verify the disable took */
 		for (int j = 0; j < 10; j++) {
-			reg = rd32(hw, I40E_QTX_ENA(i));
+			reg = rd32(hw, I40E_QTX_ENA(index));
 			if (!(reg & I40E_QTX_ENA_QENA_STAT_MASK))
 				break;
 			i40e_msec_delay(10);
 		}
-		if (reg & I40E_QTX_ENA_QENA_STAT_MASK)
-			printf("TX queue %d still enabled!\n", i);
+		if (reg & I40E_QTX_ENA_QENA_STAT_MASK) {
+			device_printf(pf->dev, "TX queue %d still enabled!\n",
+			    index);
+			error = ETIMEDOUT;
+		}
 
-		reg = rd32(hw, I40E_QRX_ENA(i));
+		reg = rd32(hw, I40E_QRX_ENA(index));
 		reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
-		wr32(hw, I40E_QRX_ENA(i), reg);
+		wr32(hw, I40E_QRX_ENA(index), reg);
 		/* Verify the disable took */
 		for (int j = 0; j < 10; j++) {
-			reg = rd32(hw, I40E_QRX_ENA(i));
+			reg = rd32(hw, I40E_QRX_ENA(index));
 			if (!(reg & I40E_QRX_ENA_QENA_STAT_MASK))
 				break;
 			i40e_msec_delay(10);
 		}
-		if (reg & I40E_QRX_ENA_QENA_STAT_MASK)
-			printf("RX queue %d still enabled!\n", i);
+		if (reg & I40E_QRX_ENA_QENA_STAT_MASK) {
+			device_printf(pf->dev, "RX queue %d still enabled!\n",
+			    index);
+			error = ETIMEDOUT;
+		}
 	}
+
+	return (error);
 }
 
 /**
@@ -3775,16 +3963,23 @@ ixl_enable_intr(struct ixl_vsi *vsi)
 }
 
 static void
-ixl_disable_intr(struct ixl_vsi *vsi)
+ixl_disable_rings_intr(struct ixl_vsi *vsi)
 {
 	struct i40e_hw		*hw = vsi->hw;
 	struct ixl_queue	*que = vsi->queues;
 
-	if (ixl_enable_msix) {
+	for (int i = 0; i < vsi->num_queues; i++, que++)
+		ixl_disable_queue(hw, que->me);
+}
+
+static void
+ixl_disable_intr(struct ixl_vsi *vsi)
+{
+	struct i40e_hw		*hw = vsi->hw;
+
+	if (ixl_enable_msix)
 		ixl_disable_adminq(hw);
-		for (int i = 0; i < vsi->num_queues; i++, que++)
-			ixl_disable_queue(hw, que->me);
-	} else
+	else
 		ixl_disable_legacy(hw);
 }
 
@@ -3859,7 +4054,8 @@ static void
 ixl_update_stats_counters(struct ixl_pf *pf)
 {
 	struct i40e_hw	*hw = &pf->hw;
-	struct ixl_vsi *vsi = &pf->vsi;
+	struct ixl_vsi	*vsi = &pf->vsi;
+	struct ixl_vf	*vf;
 
 	struct i40e_hw_port_stats *nsd = &pf->stats;
 	struct i40e_hw_port_stats *osd = &pf->stats_offsets;
@@ -4021,11 +4217,13 @@ ixl_update_stats_counters(struct ixl_pf *pf)
 	/* End hw stats */
 
 	/* Update vsi stats */
-	ixl_update_eth_stats(vsi);
+	ixl_update_vsi_stats(vsi);
 
-	/* OS statistics */
-	// ERJ - these are per-port, update all vsis?
-	IXL_SET_IERRORS(vsi, nsd->crc_errors + nsd->illegal_bytes);
+	for (int i = 0; i < pf->num_vfs; i++) {
+		vf = &pf->vfs[i];
+		if (vf->vf_flags & VF_FLAG_ENABLED)
+			ixl_update_eth_stats(&pf->vfs[i].vsi);
+	}
 }
 
 /*
@@ -4051,6 +4249,7 @@ ixl_do_adminq(void *context, int pending)
 		return;
 	}
 
+	IXL_PF_LOCK(pf);
 	/* clean and process any events */
 	do {
 		ret = i40e_clean_arq_element(hw, &event, &result);
@@ -4059,11 +4258,13 @@ ixl_do_adminq(void *context, int pending)
 		opcode = LE16_TO_CPU(event.desc.opcode);
 		switch (opcode) {
 		case i40e_aqc_opc_get_link_status:
-			vsi->link_up = ixl_config_link(hw);
+			ixl_link_event(pf, &event);
 			ixl_update_link_status(pf);
 			break;
 		case i40e_aqc_opc_send_msg_to_pf:
-			/* process pf/vf communication here */
+#ifdef PCI_IOV
+			ixl_handle_vf_msg(pf, &event);
+#endif
 			break;
 		case i40e_aqc_opc_event_lan_overflow:
 			break;
@@ -4081,10 +4282,16 @@ ixl_do_adminq(void *context, int pending)
 	wr32(hw, I40E_PFINT_ICR0_ENA, reg);
 	free(event.msg_buf, M_DEVBUF);
 
-	if (pf->msix > 1)
-		ixl_enable_adminq(&pf->hw);
+	/*
+	 * If there are still messages to process, reschedule ourselves.
+	 * Otherwise, re-enable our interrupt and go to sleep.
+	 */
+	if (result > 0)
+		taskqueue_enqueue(pf->tq, &pf->adminq);
 	else
 		ixl_enable_intr(vsi);
+
+	IXL_PF_UNLOCK(pf);
 }
 
 static int
@@ -4161,8 +4368,6 @@ void ixl_update_eth_stats(struct ixl_vsi *vsi)
 	struct i40e_hw *hw = &pf->hw;
 	struct i40e_eth_stats *es;
 	struct i40e_eth_stats *oes;
-	int i;
-	uint64_t tx_discards;
 	struct i40e_hw_port_stats *nsd;
 	u16 stat_idx = vsi->info.stat_counter_idx;
 
@@ -4212,9 +4417,27 @@ void ixl_update_eth_stats(struct ixl_vsi *vsi)
 			   vsi->stat_offsets_loaded,
 			   &oes->tx_broadcast, &es->tx_broadcast);
 	vsi->stat_offsets_loaded = true;
+}
+
+static void
+ixl_update_vsi_stats(struct ixl_vsi *vsi)
+{
+	struct ixl_pf		*pf;
+	struct ifnet		*ifp;
+	struct i40e_eth_stats	*es;
+	u64			tx_discards;
+
+	struct i40e_hw_port_stats *nsd;
+
+	pf = vsi->back;
+	ifp = vsi->ifp;
+	es = &vsi->eth_stats;
+	nsd = &pf->stats;
+
+	ixl_update_eth_stats(vsi);
 
 	tx_discards = es->tx_discards + nsd->tx_dropped_link_down;
-	for (i = 0; i < vsi->num_queues; i++)
+	for (int i = 0; i < vsi->num_queues; i++)
 		tx_discards += vsi->queues[i].txr.br->br_drops;
 
 	/* Update ifnet stats */
@@ -4229,6 +4452,9 @@ void ixl_update_eth_stats(struct ixl_vsi *vsi)
 	IXL_SET_IMCASTS(vsi, es->rx_multicast);
 	IXL_SET_OMCASTS(vsi, es->tx_multicast);
 
+	IXL_SET_IERRORS(vsi, nsd->crc_errors + nsd->illegal_bytes +
+	    nsd->rx_undersize + nsd->rx_oversize + nsd->rx_fragments +
+	    nsd->rx_jabber);
 	IXL_SET_OERRORS(vsi, es->tx_errors);
 	IXL_SET_IQDROPS(vsi, es->rx_discards + nsd->eth.rx_discards);
 	IXL_SET_OQDROPS(vsi, tx_discards);
@@ -4440,6 +4666,8 @@ ixl_set_advertised_speeds(struct ixl_pf *pf, int speeds)
 	config.eeer = abilities.eeer_val;
 	config.low_power_ctrl = abilities.d3_lpan;
 	/* Translate into aq cmd link_speed */
+	if (speeds & 0x8)
+		config.link_speed |= I40E_LINK_SPEED_20GB;
 	if (speeds & 0x4)
 		config.link_speed |= I40E_LINK_SPEED_10GB;
 	if (speeds & 0x2)
@@ -4475,6 +4703,7 @@ ixl_set_advertised_speeds(struct ixl_pf *pf, int speeds)
 **	0x1 - advertise 100 Mb
 **	0x2 - advertise 1G
 **	0x4 - advertise 10G
+**	0x8 - advertise 20G
 **
 ** Does not work on 40G devices.
 */
@@ -4499,11 +4728,36 @@ ixl_set_advertise(SYSCTL_HANDLER_ARGS)
 	error = sysctl_handle_int(oidp, &requested_ls, 0, req);
 	if ((error) || (req->newptr == NULL))
 		return (error);
-	if (requested_ls < 1 || requested_ls > 7) {
-		device_printf(dev,
-		    "Invalid advertised speed; valid modes are 0x1 through 0x7\n");
+	/* Check for sane value */
+	if (requested_ls < 0x1 || requested_ls > 0xE) {
+		device_printf(dev, "Invalid advertised speed; "
+		    "valid modes are 0x1 through 0xE\n");
 		return (EINVAL);
 	}
+	/* Then check for validity based on adapter type */
+	switch (hw->device_id) {
+	case I40E_DEV_ID_10G_BASE_T:
+		if (requested_ls & 0x8) {
+			device_printf(dev,
+			    "20Gbs speed not supported on this device.\n");
+			return (EINVAL);
+		}
+		break;
+	case I40E_DEV_ID_20G_KR2:
+		if (requested_ls & 0x1) {
+			device_printf(dev,
+			    "100Mbs speed not supported on this device.\n");
+			return (EINVAL);
+		}
+		break;
+	default:
+		if (requested_ls & ~0x6) {
+			device_printf(dev,
+			    "Only 1/10Gbs speeds are supported on this device.\n");
+			return (EINVAL);
+		}
+		break;
+	}
 
 	/* Exit if no change */
 	if (pf->advertised_speed == requested_ls)
@@ -4581,8 +4835,8 @@ ixl_get_bus_info(struct i40e_hw *hw, device_t dev)
         if ((hw->bus.width <= i40e_bus_width_pcie_x8) &&
             (hw->bus.speed < i40e_bus_speed_8000)) {
                 device_printf(dev, "PCI-Express bandwidth available"
-                    " for this device\n     is not sufficient for"
-                    " normal operation.\n");
+                    " for this device\n     may be insufficient for"
+                    " optimal performance.\n");
                 device_printf(dev, "For expected performance a x8 "
                     "PCIE Gen3 slot is required.\n");
         }
@@ -4643,15 +4897,15 @@ ixl_sysctl_link_status(SYSCTL_HANDLER_ARGS)
 static int
 ixl_sysctl_phy_abilities(SYSCTL_HANDLER_ARGS)
 {
-	struct ixl_pf *pf = (struct ixl_pf *)arg1;
-	struct i40e_hw *hw = &pf->hw;
-	struct i40e_aq_get_phy_abilities_resp abilities_resp;
-	char buf[512];
+	struct ixl_pf		*pf = (struct ixl_pf *)arg1;
+	struct i40e_hw		*hw = &pf->hw;
+	char			buf[512];
+	enum i40e_status_code	aq_error = 0;
 
-	enum i40e_status_code aq_error = 0;
+	struct i40e_aq_get_phy_abilities_resp abilities;
 
-	// TODO: Print out list of qualified modules as well?
-	aq_error = i40e_aq_get_phy_capabilities(hw, TRUE, FALSE, &abilities_resp, NULL);
+	aq_error = i40e_aq_get_phy_capabilities(hw,
+	    TRUE, FALSE, &abilities, NULL);
 	if (aq_error) {
 		printf("i40e_aq_get_phy_capabilities() error %d\n", aq_error);
 		return (EPERM);
@@ -4664,9 +4918,9 @@ ixl_sysctl_phy_abilities(SYSCTL_HANDLER_ARGS)
 	    "EEE cap  : %#06x\n" 
 	    "EEER reg : %#010x\n" 
 	    "D3 Lpan  : %#04x",
-	    abilities_resp.phy_type, abilities_resp.link_speed, 
-	    abilities_resp.abilities, abilities_resp.eee_capability,
-	    abilities_resp.eeer_val, abilities_resp.d3_lpan);
+	    abilities.phy_type, abilities.link_speed, 
+	    abilities.abilities, abilities.eee_capability,
+	    abilities.eeer_val, abilities.d3_lpan);
 
 	return (sysctl_handle_string(oidp, buf, strlen(buf), req));
 }
@@ -4752,7 +5006,8 @@ ixl_sysctl_hw_res_alloc(SYSCTL_HANDLER_ARGS)
 				IXL_SW_RES_SIZE,
 				NULL);
 	if (error) {
-		device_printf(dev, "%s: get_switch_resource_alloc() error %d, aq error %d\n",
+		device_printf(dev,
+		    "%s: get_switch_resource_alloc() error %d, aq error %d\n",
 		    __func__, error, hw->aq.asq_last_status);
 		sbuf_delete(buf);
 		return error;
@@ -4856,7 +5111,8 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS)
 	error = i40e_aq_get_switch_config(hw, sw_config,
 	    sizeof(aq_buf), &next, NULL);
 	if (error) {
-		device_printf(dev, "%s: aq_get_switch_config() error %d, aq error %d\n",
+		device_printf(dev,
+		    "%s: aq_get_switch_config() error %d, aq error %d\n",
 		    __func__, error, hw->aq.asq_last_status);
 		sbuf_delete(buf);
 		return error;
@@ -4881,11 +5137,14 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS)
 		// "%4d (%8s) | %8s   %8s   %#8x",
 		sbuf_printf(buf, "%4d", sw_config->element[i].seid);
 		sbuf_cat(buf, " ");
-		sbuf_printf(buf, "(%8s)", ixl_switch_element_string(nmbuf, sw_config->element[i].seid, false));
+		sbuf_printf(buf, "(%8s)", ixl_switch_element_string(nmbuf,
+		    sw_config->element[i].seid, false));
 		sbuf_cat(buf, " | ");
-		sbuf_printf(buf, "%8s", ixl_switch_element_string(nmbuf, sw_config->element[i].uplink_seid, true));
+		sbuf_printf(buf, "%8s", ixl_switch_element_string(nmbuf,
+		    sw_config->element[i].uplink_seid, true));
 		sbuf_cat(buf, "   ");
-		sbuf_printf(buf, "%8s", ixl_switch_element_string(nmbuf, sw_config->element[i].downlink_seid, false));
+		sbuf_printf(buf, "%8s", ixl_switch_element_string(nmbuf,
+		    sw_config->element[i].downlink_seid, false));
 		sbuf_cat(buf, "   ");
 		sbuf_printf(buf, "%#8x", sw_config->element[i].connection_type);
 		if (i < sw_config->header.num_reported - 1)
@@ -4907,67 +5166,1449 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS)
 
 	return (error);
 }
-
-/*
-** Dump TX desc given index.
-** Doesn't work; don't use.
-** TODO: Also needs a queue index input!
-**/
-static int
-ixl_sysctl_dump_txd(SYSCTL_HANDLER_ARGS)
-{
-	struct ixl_pf *pf = (struct ixl_pf *)arg1;
-	device_t dev = pf->dev;
-	struct sbuf *buf;
-	int error = 0;
-
-	u16 desc_idx = 0;
-
-	buf = sbuf_new_for_sysctl(NULL, NULL, 0, req);
-	if (!buf) {
-		device_printf(dev, "Could not allocate sbuf for output.\n");
-		return (ENOMEM);
-	}
-
-	/* Read in index */
-	error = sysctl_handle_int(oidp, &desc_idx, 0, req);
-	if (error)
-		return (error);
-	if (req->newptr == NULL)
-		return (EIO); // fix
-	if (desc_idx > 1024) { // fix
-		device_printf(dev,
-		    "Invalid descriptor index, needs to be < 1024\n"); // fix
-		return (EINVAL);
-	}
-
-	// Don't use this sysctl yet
-	if (TRUE)
-		return (ENODEV);
-
-	sbuf_cat(buf, "\n");
-
-	// set to queue 1?
-	struct ixl_queue *que = pf->vsi.queues;
-	struct tx_ring *txr = &(que[1].txr);
-	struct i40e_tx_desc *txd = &txr->base[desc_idx];
-
-	sbuf_printf(buf, "Que: %d, Desc: %d\n", que->me, desc_idx);
-	sbuf_printf(buf, "Addr: %#18lx\n", txd->buffer_addr);
-	sbuf_printf(buf, "Opts: %#18lx\n", txd->cmd_type_offset_bsz);
-
-	error = sbuf_finish(buf);
-	if (error) {
-		device_printf(dev, "Error finishing sbuf: %d\n", error);
-		sbuf_delete(buf);
-		return error;
-	}
-
-	error = sysctl_handle_string(oidp, sbuf_data(buf), sbuf_len(buf), req);
-	if (error)
-		device_printf(dev, "sysctl error: %d\n", error);
-	sbuf_delete(buf);
-	return error;
-}
 #endif /* IXL_DEBUG_SYSCTL */
 
+
+#ifdef PCI_IOV
+static int
+ixl_vf_alloc_vsi(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	struct ixl_vsi *vsi;
+	struct i40e_vsi_context vsi_ctx;
+	int i;
+	uint16_t first_queue;
+	enum i40e_status_code code;
+
+	hw = &pf->hw;
+	vsi = &pf->vsi;
+
+	vsi_ctx.pf_num = hw->pf_id;
+	vsi_ctx.uplink_seid = pf->veb_seid;
+	vsi_ctx.connection_type = IXL_VSI_DATA_PORT;
+	vsi_ctx.vf_num = hw->func_caps.vf_base_id + vf->vf_num;
+	vsi_ctx.flags = I40E_AQ_VSI_TYPE_VF;
+
+	bzero(&vsi_ctx.info, sizeof(vsi_ctx.info));
+
+	vsi_ctx.info.valid_sections = htole16(I40E_AQ_VSI_PROP_SWITCH_VALID);
+	vsi_ctx.info.switch_id = htole16(0);
+
+	vsi_ctx.info.valid_sections |= htole16(I40E_AQ_VSI_PROP_SECURITY_VALID);
+	vsi_ctx.info.sec_flags = 0;
+	if (vf->vf_flags & VF_FLAG_MAC_ANTI_SPOOF)
+		vsi_ctx.info.sec_flags |= I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK;
+
+	vsi_ctx.info.valid_sections |= htole16(I40E_AQ_VSI_PROP_VLAN_VALID);
+	vsi_ctx.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
+	    I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
+
+	vsi_ctx.info.valid_sections |=
+	    htole16(I40E_AQ_VSI_PROP_QUEUE_MAP_VALID);
+	vsi_ctx.info.mapping_flags = htole16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
+	first_queue = vsi->num_queues + vf->vf_num * IXLV_MAX_QUEUES;
+	for (i = 0; i < IXLV_MAX_QUEUES; i++)
+		vsi_ctx.info.queue_mapping[i] = htole16(first_queue + i);
+	for (; i < nitems(vsi_ctx.info.queue_mapping); i++)
+		vsi_ctx.info.queue_mapping[i] = htole16(I40E_AQ_VSI_QUEUE_MASK);
+
+	vsi_ctx.info.tc_mapping[0] = htole16(
+	    (0 << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
+	    (1 << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT));
+
+	code = i40e_aq_add_vsi(hw, &vsi_ctx, NULL);
+	if (code != I40E_SUCCESS)
+		return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));
+	vf->vsi.seid = vsi_ctx.seid;
+	vf->vsi.vsi_num = vsi_ctx.vsi_number;
+	vf->vsi.first_queue = first_queue;
+	vf->vsi.num_queues = IXLV_MAX_QUEUES;
+
+	code = i40e_aq_get_vsi_params(hw, &vsi_ctx, NULL);
+	if (code != I40E_SUCCESS)
+		return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));
+
+	code = i40e_aq_config_vsi_bw_limit(hw, vf->vsi.seid, 0, 0, NULL);
+	if (code != I40E_SUCCESS) {
+		device_printf(pf->dev, "Failed to disable BW limit: %d\n",
+		    ixl_adminq_err_to_errno(hw->aq.asq_last_status));
+		return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));
+	}
+
+	memcpy(&vf->vsi.info, &vsi_ctx.info, sizeof(vf->vsi.info));
+	return (0);
+}
+
+static int
+ixl_vf_setup_vsi(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	int error;
+
+	hw = &pf->hw;
+
+	error = ixl_vf_alloc_vsi(pf, vf);
+	if (error != 0)
+		return (error);
+
+	vf->vsi.hw_filters_add = 0;
+	vf->vsi.hw_filters_del = 0;
+	ixl_add_filter(&vf->vsi, ixl_bcast_addr, IXL_VLAN_ANY);
+	ixl_reconfigure_filters(&vf->vsi);
+
+	return (0);
+}
+
+static void
+ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum,
+    uint32_t val)
+{
+	uint32_t qtable;
+	int index, shift;
+
+	/*
+	 * Two queues are mapped in a single register, so we have to do some
+	 * gymnastics to convert the queue number into a register index and
+	 * shift.
+	 */
+	index = qnum / 2;
+	shift = (qnum % 2) * I40E_VSILAN_QTABLE_QINDEX_1_SHIFT;
+
+	qtable = rd32(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num));
+	qtable &= ~(I40E_VSILAN_QTABLE_QINDEX_0_MASK << shift);
+	qtable |= val << shift;
+	wr32(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num), qtable);
+}
+
+static void
+ixl_vf_map_queues(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	uint32_t qtable;
+	int i;
+
+	hw = &pf->hw;
+
+	/*
+	 * Contiguous mappings aren't actually supported by the hardware,
+	 * so we have to use non-contiguous mappings.
+	 */
+	wr32(hw, I40E_VSILAN_QBASE(vf->vsi.vsi_num),
+	     I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
+
+	wr32(hw, I40E_VPLAN_MAPENA(vf->vf_num),
+	    I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
+
+	for (i = 0; i < vf->vsi.num_queues; i++) {
+		qtable = (vf->vsi.first_queue + i) <<
+		    I40E_VPLAN_QTABLE_QINDEX_SHIFT;
+
+		wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), qtable);
+	}
+
+	/* Map queues allocated to VF to its VSI. */
+	for (i = 0; i < vf->vsi.num_queues; i++)
+		ixl_vf_map_vsi_queue(hw, vf, i, vf->vsi.first_queue + i);
+
+	/* Set rest of VSI queues as unused. */
+	for (; i < IXL_MAX_VSI_QUEUES; i++)
+		ixl_vf_map_vsi_queue(hw, vf, i,
+		    I40E_VSILAN_QTABLE_QINDEX_0_MASK);
+
+	ixl_flush(hw);
+}
+
+static void
+ixl_vf_vsi_release(struct ixl_pf *pf, struct ixl_vsi *vsi)
+{
+	struct i40e_hw *hw;
+
+	hw = &pf->hw;
+
+	if (vsi->seid == 0)
+		return;
+
+	i40e_aq_delete_element(hw, vsi->seid, NULL);
+}
+
+static void
+ixl_vf_disable_queue_intr(struct i40e_hw *hw, uint32_t vfint_reg)
+{
+
+	wr32(hw, vfint_reg, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
+	ixl_flush(hw);
+}
+
+static void
+ixl_vf_unregister_intr(struct i40e_hw *hw, uint32_t vpint_reg)
+{
+
+	wr32(hw, vpint_reg, I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
+	    I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
+	ixl_flush(hw);
+}
+
+static void
+ixl_vf_release_resources(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	uint32_t vfint_reg, vpint_reg;
+	int i;
+
+	hw = &pf->hw;
+
+	ixl_vf_vsi_release(pf, &vf->vsi);
+
+	/* Index 0 has a special register. */
+	ixl_vf_disable_queue_intr(hw, I40E_VFINT_DYN_CTL0(vf->vf_num));
+
+	for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) {
+		vfint_reg = IXL_VFINT_DYN_CTLN_REG(hw, i , vf->vf_num);
+		ixl_vf_disable_queue_intr(hw, vfint_reg);
+	}
+
+	/* Index 0 has a special register. */
+	ixl_vf_unregister_intr(hw, I40E_VPINT_LNKLST0(vf->vf_num));
+
+	for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) {
+		vpint_reg = IXL_VPINT_LNKLSTN_REG(hw, i, vf->vf_num);
+		ixl_vf_unregister_intr(hw, vpint_reg);
+	}
+
+	vf->vsi.num_queues = 0;
+}
+
+static int
+ixl_flush_pcie(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	int i;
+	uint16_t global_vf_num;
+	uint32_t ciad;
+
+	hw = &pf->hw;
+	global_vf_num = hw->func_caps.vf_base_id + vf->vf_num;
+
+	wr32(hw, I40E_PF_PCI_CIAA, IXL_PF_PCI_CIAA_VF_DEVICE_STATUS |
+	     (global_vf_num << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
+	for (i = 0; i < IXL_VF_RESET_TIMEOUT; i++) {
+		ciad = rd32(hw, I40E_PF_PCI_CIAD);
+		if ((ciad & IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK) == 0)
+			return (0);
+		DELAY(1);
+	}
+
+	return (ETIMEDOUT);
+}
+
+static void
+ixl_reset_vf(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	uint32_t vfrtrig;
+
+	hw = &pf->hw;
+
+	vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));
+	vfrtrig |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
+	wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);
+	ixl_flush(hw);
+
+	ixl_reinit_vf(pf, vf);
+}
+
+static void
+ixl_reinit_vf(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_hw *hw;
+	uint32_t vfrstat, vfrtrig;
+	int i, error;
+
+	hw = &pf->hw;
+
+	error = ixl_flush_pcie(pf, vf);
+	if (error != 0)
+		device_printf(pf->dev,
+		    "Timed out waiting for PCIe activity to stop on VF-%d\n",
+		    vf->vf_num);
+
+	for (i = 0; i < IXL_VF_RESET_TIMEOUT; i++) {
+		DELAY(10);
+
+		vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num));
+		if (vfrstat & I40E_VPGEN_VFRSTAT_VFRD_MASK)
+			break;
+	}
+
+	if (i == IXL_VF_RESET_TIMEOUT)
+		device_printf(pf->dev, "VF %d failed to reset\n", vf->vf_num);
+
+	wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), I40E_VFR_COMPLETED);
+
+	vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));
+	vfrtrig &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
+	wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);
+
+	if (vf->vsi.seid != 0)
+		ixl_disable_rings(&vf->vsi);
+
+	ixl_vf_release_resources(pf, vf);
+	ixl_vf_setup_vsi(pf, vf);
+	ixl_vf_map_queues(pf, vf);
+
+	wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), I40E_VFR_VFACTIVE);
+	ixl_flush(hw);
+}
+
+static const char *
+ixl_vc_opcode_str(uint16_t op)
+{
+
+	switch (op) {
+	case I40E_VIRTCHNL_OP_VERSION:
+		return ("VERSION");
+	case I40E_VIRTCHNL_OP_RESET_VF:
+		return ("RESET_VF");
+	case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
+		return ("GET_VF_RESOURCES");
+	case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
+		return ("CONFIG_TX_QUEUE");
+	case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
+		return ("CONFIG_RX_QUEUE");
+	case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
+		return ("CONFIG_VSI_QUEUES");
+	case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
+		return ("CONFIG_IRQ_MAP");
+	case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
+		return ("ENABLE_QUEUES");
+	case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
+		return ("DISABLE_QUEUES");
+	case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
+		return ("ADD_ETHER_ADDRESS");
+	case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
+		return ("DEL_ETHER_ADDRESS");
+	case I40E_VIRTCHNL_OP_ADD_VLAN:
+		return ("ADD_VLAN");
+	case I40E_VIRTCHNL_OP_DEL_VLAN:
+		return ("DEL_VLAN");
+	case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
+		return ("CONFIG_PROMISCUOUS_MODE");
+	case I40E_VIRTCHNL_OP_GET_STATS:
+		return ("GET_STATS");
+	case I40E_VIRTCHNL_OP_FCOE:
+		return ("FCOE");
+	case I40E_VIRTCHNL_OP_EVENT:
+		return ("EVENT");
+	default:
+		return ("UNKNOWN");
+	}
+}
+
+static int
+ixl_vc_opcode_level(uint16_t opcode)
+{
+
+	switch (opcode) {
+	case I40E_VIRTCHNL_OP_GET_STATS:
+		return (10);
+	default:
+		return (5);
+	}
+}
+
+static void
+ixl_send_vf_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op,
+    enum i40e_status_code status, void *msg, uint16_t len)
+{
+	struct i40e_hw *hw;
+	int global_vf_id;
+
+	hw = &pf->hw;
+	global_vf_id = hw->func_caps.vf_base_id + vf->vf_num;
+
+	I40E_VC_DEBUG(pf, ixl_vc_opcode_level(op),
+	    "Sending msg (op=%s[%d], status=%d) to VF-%d\n",
+	    ixl_vc_opcode_str(op), op, status, vf->vf_num);
+
+	i40e_aq_send_msg_to_vf(hw, global_vf_id, op, status, msg, len, NULL);
+}
+
+static void
+ixl_send_vf_ack(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op)
+{
+
+	ixl_send_vf_msg(pf, vf, op, I40E_SUCCESS, NULL, 0);
+}
+
+static void
+ixl_send_vf_nack_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op,
+    enum i40e_status_code status, const char *file, int line)
+{
+
+	I40E_VC_DEBUG(pf, 1,
+	    "Sending NACK (op=%s[%d], err=%d) to VF-%d from %s:%d\n",
+	    ixl_vc_opcode_str(op), op, status, vf->vf_num, file, line);
+	ixl_send_vf_msg(pf, vf, op, status, NULL, 0);
+}
+
+static void
+ixl_vf_version_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_version_info reply;
+
+	if (msg_size != sizeof(struct i40e_virtchnl_version_info)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_VERSION,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	reply.major = I40E_VIRTCHNL_VERSION_MAJOR;
+	reply.minor = I40E_VIRTCHNL_VERSION_MINOR;
+	ixl_send_vf_msg(pf, vf, I40E_VIRTCHNL_OP_VERSION, I40E_SUCCESS, &reply,
+	    sizeof(reply));
+}
+
+static void
+ixl_vf_reset_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+
+	if (msg_size != 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_RESET_VF,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	ixl_reset_vf(pf, vf);
+
+	/* No response to a reset message. */
+}
+
+static void
+ixl_vf_get_resources_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_vf_resource reply;
+
+	if (msg_size != 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	bzero(&reply, sizeof(reply));
+
+	reply.vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
+
+	reply.num_vsis = 1;
+	reply.num_queue_pairs = vf->vsi.num_queues;
+	reply.max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
+	reply.vsi_res[0].vsi_id = vf->vsi.vsi_num;
+	reply.vsi_res[0].vsi_type = I40E_VSI_SRIOV;
+	reply.vsi_res[0].num_queue_pairs = vf->vsi.num_queues;
+	memcpy(reply.vsi_res[0].default_mac_addr, vf->mac, ETHER_ADDR_LEN);
+
+	ixl_send_vf_msg(pf, vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
+	    I40E_SUCCESS, &reply, sizeof(reply));
+}
+
+static int
+ixl_vf_config_tx_queue(struct ixl_pf *pf, struct ixl_vf *vf,
+    struct i40e_virtchnl_txq_info *info)
+{
+	struct i40e_hw *hw;
+	struct i40e_hmc_obj_txq txq;
+	uint16_t global_queue_num, global_vf_num;
+	enum i40e_status_code status;
+	uint32_t qtx_ctl;
+
+	hw = &pf->hw;
+	global_queue_num = vf->vsi.first_queue + info->queue_id;
+	global_vf_num = hw->func_caps.vf_base_id + vf->vf_num;
+	bzero(&txq, sizeof(txq));
+
+	status = i40e_clear_lan_tx_queue_context(hw, global_queue_num);
+	if (status != I40E_SUCCESS)
+		return (EINVAL);
+
+	txq.base = info->dma_ring_addr / IXL_TX_CTX_BASE_UNITS;
+
+	txq.head_wb_ena = info->headwb_enabled;
+	txq.head_wb_addr = info->dma_headwb_addr;
+	txq.qlen = info->ring_len;
+	txq.rdylist = le16_to_cpu(vf->vsi.info.qs_handle[0]);
+	txq.rdylist_act = 0;
+
+	status = i40e_set_lan_tx_queue_context(hw, global_queue_num, &txq);
+	if (status != I40E_SUCCESS)
+		return (EINVAL);
+
+	qtx_ctl = I40E_QTX_CTL_VF_QUEUE |
+	    (hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) |
+	    (global_vf_num << I40E_QTX_CTL_VFVM_INDX_SHIFT);
+	wr32(hw, I40E_QTX_CTL(global_queue_num), qtx_ctl);
+	ixl_flush(hw);
+
+	return (0);
+}
+
+static int
+ixl_vf_config_rx_queue(struct ixl_pf *pf, struct ixl_vf *vf,
+    struct i40e_virtchnl_rxq_info *info)
+{
+	struct i40e_hw *hw;
+	struct i40e_hmc_obj_rxq rxq;
+	uint16_t global_queue_num;
+	enum i40e_status_code status;
+
+	hw = &pf->hw;
+	global_queue_num = vf->vsi.first_queue + info->queue_id;
+	bzero(&rxq, sizeof(rxq));
+
+	if (info->databuffer_size > IXL_VF_MAX_BUFFER)
+		return (EINVAL);
+
+	if (info->max_pkt_size > IXL_VF_MAX_FRAME ||
+	    info->max_pkt_size < ETHER_MIN_LEN)
+		return (EINVAL);
+
+	if (info->splithdr_enabled) {
+		if (info->hdr_size > IXL_VF_MAX_HDR_BUFFER)
+			return (EINVAL);
+
+		rxq.hsplit_0 = info->rx_split_pos &
+		    (I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 |
+		     I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP |
+		     I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP |
+		     I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP);
+		rxq.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
+
+		rxq.dtype = 2;
+	}
+
+	status = i40e_clear_lan_rx_queue_context(hw, global_queue_num);
+	if (status != I40E_SUCCESS)
+		return (EINVAL);
+
+	rxq.base = info->dma_ring_addr / IXL_RX_CTX_BASE_UNITS;
+	rxq.qlen = info->ring_len;
+
+	rxq.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
+
+	rxq.dsize = 1;
+	rxq.crcstrip = 1;
+	rxq.l2tsel = 1;
+
+	rxq.rxmax = info->max_pkt_size;
+	rxq.tphrdesc_ena = 1;
+	rxq.tphwdesc_ena = 1;
+	rxq.tphdata_ena = 1;
+	rxq.tphhead_ena = 1;
+	rxq.lrxqthresh = 2;
+	rxq.prefena = 1;
+
+	status = i40e_set_lan_rx_queue_context(hw, global_queue_num, &rxq);
+	if (status != I40E_SUCCESS)
+		return (EINVAL);
+
+	return (0);
+}
+
+static void
+ixl_vf_config_vsi_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_vsi_queue_config_info *info;
+	struct i40e_virtchnl_queue_pair_info *pair;
+	int i;
+
+	if (msg_size < sizeof(*info)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	info = msg;
+	if (info->num_queue_pairs == 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	if (msg_size != sizeof(*info) + info->num_queue_pairs * sizeof(*pair)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	if (info->vsi_id != vf->vsi.vsi_num) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < info->num_queue_pairs; i++) {
+		pair = &info->qpair[i];
+
+		if (pair->txq.vsi_id != vf->vsi.vsi_num ||
+		    pair->rxq.vsi_id != vf->vsi.vsi_num ||
+		    pair->txq.queue_id != pair->rxq.queue_id ||
+		    pair->txq.queue_id >= vf->vsi.num_queues) {
+
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM);
+			return;
+		}
+
+		if (ixl_vf_config_tx_queue(pf, vf, &pair->txq) != 0) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM);
+			return;
+		}
+
+		if (ixl_vf_config_rx_queue(pf, vf, &pair->rxq) != 0) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM);
+			return;
+		}
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES);
+}
+
+static void
+ixl_vf_set_qctl(struct ixl_pf *pf,
+    const struct i40e_virtchnl_vector_map *vector,
+    enum i40e_queue_type cur_type, uint16_t cur_queue,
+    enum i40e_queue_type *last_type, uint16_t *last_queue)
+{
+	uint32_t offset, qctl;
+	uint16_t itr_indx;
+
+	if (cur_type == I40E_QUEUE_TYPE_RX) {
+		offset = I40E_QINT_RQCTL(cur_queue);
+		itr_indx = vector->rxitr_idx;
+	} else {
+		offset = I40E_QINT_TQCTL(cur_queue);
+		itr_indx = vector->txitr_idx;
+	}
+
+	qctl = htole32((vector->vector_id << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
+	    (*last_type << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
+	    (*last_queue << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
+	    I40E_QINT_RQCTL_CAUSE_ENA_MASK |
+	    (itr_indx << I40E_QINT_RQCTL_ITR_INDX_SHIFT));
+
+	wr32(&pf->hw, offset, qctl);
+
+	*last_type = cur_type;
+	*last_queue = cur_queue;
+}
+
+static void
+ixl_vf_config_vector(struct ixl_pf *pf, struct ixl_vf *vf,
+    const struct i40e_virtchnl_vector_map *vector)
+{
+	struct i40e_hw *hw;
+	u_int qindex;
+	enum i40e_queue_type type, last_type;
+	uint32_t lnklst_reg;
+	uint16_t rxq_map, txq_map, cur_queue, last_queue;
+
+	hw = &pf->hw;
+
+	rxq_map = vector->rxq_map;
+	txq_map = vector->txq_map;
+
+	last_queue = IXL_END_OF_INTR_LNKLST;
+	last_type = I40E_QUEUE_TYPE_RX;
+
+	/*
+	 * The datasheet says to optimize performance, RX queues and TX queues
+	 * should be interleaved in the interrupt linked list, so we process
+	 * both at once here.
+	 */
+	while ((rxq_map != 0) || (txq_map != 0)) {
+		if (txq_map != 0) {
+			qindex = ffs(txq_map) - 1;
+			type = I40E_QUEUE_TYPE_TX;
+			cur_queue = vf->vsi.first_queue + qindex;
+			ixl_vf_set_qctl(pf, vector, type, cur_queue,
+			    &last_type, &last_queue);
+			txq_map &= ~(1 << qindex);
+		}
+
+		if (rxq_map != 0) {
+			qindex = ffs(rxq_map) - 1;
+			type = I40E_QUEUE_TYPE_RX;
+			cur_queue = vf->vsi.first_queue + qindex;
+			ixl_vf_set_qctl(pf, vector, type, cur_queue,
+			    &last_type, &last_queue);
+			rxq_map &= ~(1 << qindex);
+		}
+	}
+
+	if (vector->vector_id == 0)
+		lnklst_reg = I40E_VPINT_LNKLST0(vf->vf_num);
+	else
+		lnklst_reg = IXL_VPINT_LNKLSTN_REG(hw, vector->vector_id,
+		    vf->vf_num);
+	wr32(hw, lnklst_reg,
+	    (last_queue << I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT) |
+	    (last_type << I40E_VPINT_LNKLST0_FIRSTQ_TYPE_SHIFT));
+
+	ixl_flush(hw);
+}
+
+static void
+ixl_vf_config_irq_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_irq_map_info *map;
+	struct i40e_virtchnl_vector_map *vector;
+	struct i40e_hw *hw;
+	int i, largest_txq, largest_rxq;
+
+	hw = &pf->hw;
+
+	if (msg_size < sizeof(*map)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	map = msg;
+	if (map->num_vectors == 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	if (msg_size != sizeof(*map) + map->num_vectors * sizeof(*vector)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < map->num_vectors; i++) {
+		vector = &map->vecmap[i];
+
+		if ((vector->vector_id >= hw->func_caps.num_msix_vectors_vf) ||
+		    vector->vsi_id != vf->vsi.vsi_num) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP, I40E_ERR_PARAM);
+			return;
+		}
+
+		if (vector->rxq_map != 0) {
+			largest_rxq = fls(vector->rxq_map) - 1;
+			if (largest_rxq >= vf->vsi.num_queues) {
+				i40e_send_vf_nack(pf, vf,
+				    I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+				    I40E_ERR_PARAM);
+				return;
+			}
+		}
+
+		if (vector->txq_map != 0) {
+			largest_txq = fls(vector->txq_map) - 1;
+			if (largest_txq >= vf->vsi.num_queues) {
+				i40e_send_vf_nack(pf, vf,
+				    I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+				    I40E_ERR_PARAM);
+				return;
+			}
+		}
+
+		if (vector->rxitr_idx > IXL_MAX_ITR_IDX ||
+		    vector->txitr_idx > IXL_MAX_ITR_IDX) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
+			    I40E_ERR_PARAM);
+			return;
+		}
+
+		ixl_vf_config_vector(pf, vf, vector);
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP);
+}
+
+static void
+ixl_vf_enable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_queue_select *select;
+	int error;
+
+	if (msg_size != sizeof(*select)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	select = msg;
+	if (select->vsi_id != vf->vsi.vsi_num ||
+	    select->rx_queues == 0 || select->tx_queues == 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	error = ixl_enable_rings(&vf->vsi);
+	if (error) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
+		    I40E_ERR_TIMEOUT);
+		return;
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES);
+}
+
+static void
+ixl_vf_disable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf,
+    void *msg, uint16_t msg_size)
+{
+	struct i40e_virtchnl_queue_select *select;
+	int error;
+
+	if (msg_size != sizeof(*select)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	select = msg;
+	if (select->vsi_id != vf->vsi.vsi_num ||
+	    select->rx_queues == 0 || select->tx_queues == 0) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	error = ixl_disable_rings(&vf->vsi);
+	if (error) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
+		    I40E_ERR_TIMEOUT);
+		return;
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES);
+}
+
+static boolean_t
+ixl_zero_mac(const uint8_t *addr)
+{
+	uint8_t zero[ETHER_ADDR_LEN] = {0, 0, 0, 0, 0, 0};
+
+	return (cmp_etheraddr(addr, zero));
+}
+
+static boolean_t
+ixl_bcast_mac(const uint8_t *addr)
+{
+
+	return (cmp_etheraddr(addr, ixl_bcast_addr));
+}
+
+static int
+ixl_vf_mac_valid(struct ixl_vf *vf, const uint8_t *addr)
+{
+
+	if (ixl_zero_mac(addr) || ixl_bcast_mac(addr))
+		return (EINVAL);
+
+	/*
+	 * If the VF is not allowed to change its MAC address, don't let it
+	 * set a MAC filter for an address that is not a multicast address and
+	 * is not its assigned MAC.
+	 */
+	if (!(vf->vf_flags & VF_FLAG_SET_MAC_CAP) &&
+	    !(ETHER_IS_MULTICAST(addr) || cmp_etheraddr(addr, vf->mac)))
+		return (EPERM);
+
+	return (0);
+}
+
+static void
+ixl_vf_add_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_ether_addr_list *addr_list;
+	struct i40e_virtchnl_ether_addr *addr;
+	struct ixl_vsi *vsi;
+	int i;
+	size_t expected_size;
+
+	vsi = &vf->vsi;
+
+	if (msg_size < sizeof(*addr_list)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	addr_list = msg;
+	expected_size = sizeof(*addr_list) +
+	    addr_list->num_elements * sizeof(*addr);
+
+	if (addr_list->num_elements == 0 ||
+	    addr_list->vsi_id != vsi->vsi_num ||
+	    msg_size != expected_size) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < addr_list->num_elements; i++) {
+		if (ixl_vf_mac_valid(vf, addr_list->list[i].addr) != 0) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS, I40E_ERR_PARAM);
+			return;
+		}
+	}
+
+	for (i = 0; i < addr_list->num_elements; i++) {
+		addr = &addr_list->list[i];
+		ixl_add_filter(vsi, addr->addr, IXL_VLAN_ANY);
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS);
+}
+
+static void
+ixl_vf_del_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_ether_addr_list *addr_list;
+	struct i40e_virtchnl_ether_addr *addr;
+	size_t expected_size;
+	int i;
+
+	if (msg_size < sizeof(*addr_list)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	addr_list = msg;
+	expected_size = sizeof(*addr_list) +
+	    addr_list->num_elements * sizeof(*addr);
+
+	if (addr_list->num_elements == 0 ||
+	    addr_list->vsi_id != vf->vsi.vsi_num ||
+	    msg_size != expected_size) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < addr_list->num_elements; i++) {
+		addr = &addr_list->list[i];
+		if (ixl_zero_mac(addr->addr) || ixl_bcast_mac(addr->addr)) {
+			i40e_send_vf_nack(pf, vf,
+			    I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS, I40E_ERR_PARAM);
+			return;
+		}
+	}
+
+	for (i = 0; i < addr_list->num_elements; i++) {
+		addr = &addr_list->list[i];
+		ixl_del_filter(&vf->vsi, addr->addr, IXL_VLAN_ANY);
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS);
+}
+
+static enum i40e_status_code
+ixl_vf_enable_vlan_strip(struct ixl_pf *pf, struct ixl_vf *vf)
+{
+	struct i40e_vsi_context vsi_ctx;
+
+	vsi_ctx.seid = vf->vsi.seid;
+
+	bzero(&vsi_ctx.info, sizeof(vsi_ctx.info));
+	vsi_ctx.info.valid_sections = htole16(I40E_AQ_VSI_PROP_VLAN_VALID);
+	vsi_ctx.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
+	    I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
+	return (i40e_aq_update_vsi_params(&pf->hw, &vsi_ctx, NULL));
+}
+
+static void
+ixl_vf_add_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_vlan_filter_list *filter_list;
+	enum i40e_status_code code;
+	size_t expected_size;
+	int i;
+
+	if (msg_size < sizeof(*filter_list)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	filter_list = msg;
+	expected_size = sizeof(*filter_list) +
+	    filter_list->num_elements * sizeof(uint16_t);
+	if (filter_list->num_elements == 0 ||
+	    filter_list->vsi_id != vf->vsi.vsi_num ||
+	    msg_size != expected_size) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	if (!(vf->vf_flags & VF_FLAG_VLAN_CAP)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < filter_list->num_elements; i++) {
+		if (filter_list->vlan_id[i] > EVL_VLID_MASK) {
+			i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+			    I40E_ERR_PARAM);
+			return;
+		}
+	}
+
+	code = ixl_vf_enable_vlan_strip(pf, vf);
+	if (code != I40E_SUCCESS) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+		    I40E_ERR_PARAM);
+	}
+
+	for (i = 0; i < filter_list->num_elements; i++)
+		ixl_add_filter(&vf->vsi, vf->mac, filter_list->vlan_id[i]);
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN);
+}
+
+static void
+ixl_vf_del_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_vlan_filter_list *filter_list;
+	int i;
+	size_t expected_size;
+
+	if (msg_size < sizeof(*filter_list)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_DEL_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	filter_list = msg;
+	expected_size = sizeof(*filter_list) +
+	    filter_list->num_elements * sizeof(uint16_t);
+	if (filter_list->num_elements == 0 ||
+	    filter_list->vsi_id != vf->vsi.vsi_num ||
+	    msg_size != expected_size) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_DEL_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < filter_list->num_elements; i++) {
+		if (filter_list->vlan_id[i] > EVL_VLID_MASK) {
+			i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+			    I40E_ERR_PARAM);
+			return;
+		}
+	}
+
+	if (!(vf->vf_flags & VF_FLAG_VLAN_CAP)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_ADD_VLAN,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	for (i = 0; i < filter_list->num_elements; i++)
+		ixl_del_filter(&vf->vsi, vf->mac, filter_list->vlan_id[i]);
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_DEL_VLAN);
+}
+
+static void
+ixl_vf_config_promisc_msg(struct ixl_pf *pf, struct ixl_vf *vf,
+    void *msg, uint16_t msg_size)
+{
+	struct i40e_virtchnl_promisc_info *info;
+	enum i40e_status_code code;
+
+	if (msg_size != sizeof(*info)) {
+		i40e_send_vf_nack(pf, vf,
+		    I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM);
+		return;
+	}
+
+	if (!vf->vf_flags & VF_FLAG_PROMISC_CAP) {
+		i40e_send_vf_nack(pf, vf,
+		    I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM);
+		return;
+	}
+
+	info = msg;
+	if (info->vsi_id != vf->vsi.vsi_num) {
+		i40e_send_vf_nack(pf, vf,
+		    I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM);
+		return;
+	}
+
+	code = i40e_aq_set_vsi_unicast_promiscuous(&pf->hw, info->vsi_id,
+	    info->flags & I40E_FLAG_VF_UNICAST_PROMISC, NULL);
+	if (code != I40E_SUCCESS) {
+		i40e_send_vf_nack(pf, vf,
+		    I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, code);
+		return;
+	}
+
+	code = i40e_aq_set_vsi_multicast_promiscuous(&pf->hw, info->vsi_id,
+	    info->flags & I40E_FLAG_VF_MULTICAST_PROMISC, NULL);
+	if (code != I40E_SUCCESS) {
+		i40e_send_vf_nack(pf, vf,
+		    I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, code);
+		return;
+	}
+
+	ixl_send_vf_ack(pf, vf, I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE);
+}
+
+static void
+ixl_vf_get_stats_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg,
+    uint16_t msg_size)
+{
+	struct i40e_virtchnl_queue_select *queue;
+
+	if (msg_size != sizeof(*queue)) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_GET_STATS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	queue = msg;
+	if (queue->vsi_id != vf->vsi.vsi_num) {
+		i40e_send_vf_nack(pf, vf, I40E_VIRTCHNL_OP_GET_STATS,
+		    I40E_ERR_PARAM);
+		return;
+	}
+
+	ixl_update_eth_stats(&vf->vsi);
+
+	ixl_send_vf_msg(pf, vf, I40E_VIRTCHNL_OP_GET_STATS,
+	    I40E_SUCCESS, &vf->vsi.eth_stats, sizeof(vf->vsi.eth_stats));
+}
+
+static void
+ixl_handle_vf_msg(struct ixl_pf *pf, struct i40e_arq_event_info *event)
+{
+	struct ixl_vf *vf;
+	void *msg;
+	uint16_t vf_num, msg_size;
+	uint32_t opcode;
+
+	vf_num = le16toh(event->desc.retval) - pf->hw.func_caps.vf_base_id;
+	opcode = le32toh(event->desc.cookie_high);
+
+	if (vf_num >= pf->num_vfs) {
+		device_printf(pf->dev, "Got msg from illegal VF: %d\n", vf_num);
+		return;
+	}
+
+	vf = &pf->vfs[vf_num];
+	msg = event->msg_buf;
+	msg_size = event->msg_len;
+
+	I40E_VC_DEBUG(pf, ixl_vc_opcode_level(opcode),
+	    "Got msg %s(%d) from VF-%d of size %d\n",
+	    ixl_vc_opcode_str(opcode), opcode, vf_num, msg_size);
+
+	switch (opcode) {
+	case I40E_VIRTCHNL_OP_VERSION:
+		ixl_vf_version_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_RESET_VF:
+		ixl_vf_reset_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
+		ixl_vf_get_resources_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
+		ixl_vf_config_vsi_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
+		ixl_vf_config_irq_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
+		ixl_vf_enable_queues_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
+		ixl_vf_disable_queues_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
+		ixl_vf_add_mac_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
+		ixl_vf_del_mac_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_ADD_VLAN:
+		ixl_vf_add_vlan_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_DEL_VLAN:
+		ixl_vf_del_vlan_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
+		ixl_vf_config_promisc_msg(pf, vf, msg, msg_size);
+		break;
+	case I40E_VIRTCHNL_OP_GET_STATS:
+		ixl_vf_get_stats_msg(pf, vf, msg, msg_size);
+		break;
+
+	/* These two opcodes have been superseded by CONFIG_VSI_QUEUES. */
+	case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
+	case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
+	default:
+		i40e_send_vf_nack(pf, vf, opcode, I40E_ERR_NOT_IMPLEMENTED);
+		break;
+	}
+}
+
+/* Handle any VFs that have reset themselves via a Function Level Reset(FLR). */
+static void
+ixl_handle_vflr(void *arg, int pending)
+{
+	struct ixl_pf *pf;
+	struct i40e_hw *hw;
+	uint16_t global_vf_num;
+	uint32_t vflrstat_index, vflrstat_mask, vflrstat, icr0;
+	int i;
+
+	pf = arg;
+	hw = &pf->hw;
+
+	IXL_PF_LOCK(pf);
+	for (i = 0; i < pf->num_vfs; i++) {
+		global_vf_num = hw->func_caps.vf_base_id + i;
+
+		vflrstat_index = IXL_GLGEN_VFLRSTAT_INDEX(global_vf_num);
+		vflrstat_mask = IXL_GLGEN_VFLRSTAT_MASK(global_vf_num);
+		vflrstat = rd32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index));
+		if (vflrstat & vflrstat_mask) {
+			wr32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index),
+			    vflrstat_mask);
+
+			ixl_reinit_vf(pf, &pf->vfs[i]);
+		}
+	}
+
+	icr0 = rd32(hw, I40E_PFINT_ICR0_ENA);
+	icr0 |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
+	wr32(hw, I40E_PFINT_ICR0_ENA, icr0);
+	ixl_flush(hw);
+
+	IXL_PF_UNLOCK(pf);
+}
+
+static int
+ixl_adminq_err_to_errno(enum i40e_admin_queue_err err)
+{
+
+	switch (err) {
+	case I40E_AQ_RC_EPERM:
+		return (EPERM);
+	case I40E_AQ_RC_ENOENT:
+		return (ENOENT);
+	case I40E_AQ_RC_ESRCH:
+		return (ESRCH);
+	case I40E_AQ_RC_EINTR:
+		return (EINTR);
+	case I40E_AQ_RC_EIO:
+		return (EIO);
+	case I40E_AQ_RC_ENXIO:
+		return (ENXIO);
+	case I40E_AQ_RC_E2BIG:
+		return (E2BIG);
+	case I40E_AQ_RC_EAGAIN:
+		return (EAGAIN);
+	case I40E_AQ_RC_ENOMEM:
+		return (ENOMEM);
+	case I40E_AQ_RC_EACCES:
+		return (EACCES);
+	case I40E_AQ_RC_EFAULT:
+		return (EFAULT);
+	case I40E_AQ_RC_EBUSY:
+		return (EBUSY);
+	case I40E_AQ_RC_EEXIST:
+		return (EEXIST);
+	case I40E_AQ_RC_EINVAL:
+		return (EINVAL);
+	case I40E_AQ_RC_ENOTTY:
+		return (ENOTTY);
+	case I40E_AQ_RC_ENOSPC:
+		return (ENOSPC);
+	case I40E_AQ_RC_ENOSYS:
+		return (ENOSYS);
+	case I40E_AQ_RC_ERANGE:
+		return (ERANGE);
+	case I40E_AQ_RC_EFLUSHED:
+		return (EINVAL);	/* No exact equivalent in errno.h */
+	case I40E_AQ_RC_BAD_ADDR:
+		return (EFAULT);
+	case I40E_AQ_RC_EMODE:
+		return (EPERM);
+	case I40E_AQ_RC_EFBIG:
+		return (EFBIG);
+	default:
+		return (EINVAL);
+	}
+}
+
+static int
+ixl_init_iov(device_t dev, uint16_t num_vfs, const nvlist_t *params)
+{
+	struct ixl_pf *pf;
+	struct i40e_hw *hw;
+	struct ixl_vsi *pf_vsi;
+	enum i40e_status_code ret;
+	int i, error;
+
+	pf = device_get_softc(dev);
+	hw = &pf->hw;
+	pf_vsi = &pf->vsi;
+
+	IXL_PF_LOCK(pf);
+	pf->vfs = malloc(sizeof(struct ixl_vf) * num_vfs, M_IXL, M_NOWAIT |
+	    M_ZERO);
+
+	if (pf->vfs == NULL) {
+		error = ENOMEM;
+		goto fail;
+	}
+
+	for (i = 0; i < num_vfs; i++)
+		sysctl_ctx_init(&pf->vfs[i].ctx);
+
+	ret = i40e_aq_add_veb(hw, pf_vsi->uplink_seid, pf_vsi->seid,
+	    1, FALSE, FALSE, &pf->veb_seid, NULL);
+	if (ret != I40E_SUCCESS) {
+		error = ixl_adminq_err_to_errno(hw->aq.asq_last_status);
+		device_printf(dev, "add_veb failed; code=%d error=%d", ret,
+		    error);
+		goto fail;
+	}
+
+	ixl_configure_msix(pf);
+	ixl_enable_adminq(hw);
+
+	pf->num_vfs = num_vfs;
+	IXL_PF_UNLOCK(pf);
+	return (0);
+
+fail:
+	free(pf->vfs, M_IXL);
+	pf->vfs = NULL;
+	IXL_PF_UNLOCK(pf);
+	return (error);
+}
+
+static void
+ixl_uninit_iov(device_t dev)
+{
+	struct ixl_pf *pf;
+	struct i40e_hw *hw;
+	struct ixl_vsi *vsi;
+	struct ifnet *ifp;
+	struct ixl_vf *vfs;
+	int i, num_vfs;
+
+	pf = device_get_softc(dev);
+	hw = &pf->hw;
+	vsi = &pf->vsi;
+	ifp = vsi->ifp;
+
+	IXL_PF_LOCK(pf);
+	for (i = 0; i < pf->num_vfs; i++) {
+		if (pf->vfs[i].vsi.seid != 0)
+			i40e_aq_delete_element(hw, pf->vfs[i].vsi.seid, NULL);
+	}
+
+	if (pf->veb_seid != 0) {
+		i40e_aq_delete_element(hw, pf->veb_seid, NULL);
+		pf->veb_seid = 0;
+	}
+
+	if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
+		ixl_disable_intr(vsi);
+
+	vfs = pf->vfs;
+	num_vfs = pf->num_vfs;
+
+	pf->vfs = NULL;
+	pf->num_vfs = 0;
+	IXL_PF_UNLOCK(pf);
+
+	/* Do this after the unlock as sysctl_ctx_free might sleep. */
+	for (i = 0; i < num_vfs; i++)
+		sysctl_ctx_free(&vfs[i].ctx);
+	free(vfs, M_IXL);
+}
+
+static int
+ixl_add_vf(device_t dev, uint16_t vfnum, const nvlist_t *params)
+{
+	char sysctl_name[QUEUE_NAME_LEN];
+	struct ixl_pf *pf;
+	struct ixl_vf *vf;
+	const void *mac;
+	size_t size;
+	int error;
+
+	pf = device_get_softc(dev);
+	vf = &pf->vfs[vfnum];
+
+	IXL_PF_LOCK(pf);
+	vf->vf_num = vfnum;
+
+	vf->vsi.back = pf;
+	vf->vf_flags = VF_FLAG_ENABLED;
+	SLIST_INIT(&vf->vsi.ftl);
+
+	error = ixl_vf_setup_vsi(pf, vf);
+	if (error != 0)
+		goto out;
+
+	if (nvlist_exists_binary(params, "mac-addr")) {
+		mac = nvlist_get_binary(params, "mac-addr", &size);
+		bcopy(mac, vf->mac, ETHER_ADDR_LEN);
+
+		if (nvlist_get_bool(params, "allow-set-mac"))
+			vf->vf_flags |= VF_FLAG_SET_MAC_CAP;
+	} else
+		/*
+		 * If the administrator has not specified a MAC address then
+		 * we must allow the VF to choose one.
+		 */
+		vf->vf_flags |= VF_FLAG_SET_MAC_CAP;
+
+	if (nvlist_get_bool(params, "mac-anti-spoof"))
+		vf->vf_flags |= VF_FLAG_MAC_ANTI_SPOOF;
+
+	if (nvlist_get_bool(params, "allow-promisc"))
+		vf->vf_flags |= VF_FLAG_PROMISC_CAP;
+
+	vf->vf_flags |= VF_FLAG_VLAN_CAP;
+
+	ixl_reset_vf(pf, vf);
+out:
+	IXL_PF_UNLOCK(pf);
+	if (error == 0) {
+		snprintf(sysctl_name, sizeof(sysctl_name), "vf%d", vfnum);
+		ixl_add_vsi_sysctls(pf, &vf->vsi, &vf->ctx, sysctl_name);
+	}
+
+	return (error);
+}
+#endif /* PCI_IOV */
diff --git a/sys/dev/ixl/if_ixlv.c b/sys/dev/ixl/if_ixlv.c
index 8cf4a433c6d..a9ee127f75e 100644
--- a/sys/dev/ixl/if_ixlv.c
+++ b/sys/dev/ixl/if_ixlv.c
@@ -48,7 +48,7 @@
 /*********************************************************************
  *  Driver version
  *********************************************************************/
-char ixlv_driver_version[] = "1.2.1";
+char ixlv_driver_version[] = "1.2.4";
 
 /*********************************************************************
  *  PCI Device ID Table
@@ -398,7 +398,7 @@ ixlv_attach(device_t dev)
 
 	vsi->id = sc->vsi_res->vsi_id;
 	vsi->back = (void *)sc;
-	vsi->link_up = TRUE;
+	sc->link_up = TRUE;
 
 	/* This allocates the memory and early settings */
 	if (ixlv_setup_queues(sc) != 0) {
@@ -480,7 +480,7 @@ ixlv_detach(device_t dev)
 
 	/* Make sure VLANS are not using driver */
 	if (vsi->ifp->if_vlantrunk != NULL) {
-		device_printf(dev, "Vlan in use, detach first\n");
+		if_printf(vsi->ifp, "Vlan in use, detach first\n");
 		INIT_DBG_DEV(dev, "end");
 		return (EBUSY);
 	}
@@ -893,7 +893,7 @@ ixlv_init_locked(struct ixlv_sc *sc)
 
 		ixl_init_tx_ring(que);
 
-		if (vsi->max_frame_size <= 2048)
+		if (vsi->max_frame_size <= MCLBYTES)
 			rxr->mbuf_sz = MCLBYTES;
 		else
 			rxr->mbuf_sz = MJUMPAGESIZE;
@@ -1383,7 +1383,7 @@ ixlv_assign_msix(struct ixlv_sc *sc)
 	struct		tx_ring	 *txr;
 	int 		error, rid, vector = 1;
 #ifdef	RSS
-	cpuset_t cpu_mask;
+	cpuset_t	cpu_mask;
 #endif
 
 	for (int i = 0; i < vsi->num_queues; i++, vector++, que++) {
@@ -1413,7 +1413,7 @@ ixlv_assign_msix(struct ixlv_sc *sc)
 #endif
 		bus_bind_intr(dev, que->res, cpu_id);
 		que->msix = vector;
-        	vsi->que_mask |= (u64)(1 << que->msix);
+		vsi->que_mask |= (u64)(1 << que->msix);
 		TASK_INIT(&que->tx_task, 0, ixl_deferred_mq_start, que);
 		TASK_INIT(&que->task, 0, ixlv_handle_que, que);
 		que->tq = taskqueue_create_fast("ixlv_que", M_NOWAIT,
@@ -1718,12 +1718,12 @@ ixlv_setup_queues(struct ixlv_sc *sc)
 static void
 ixlv_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
 {
-	struct ixl_vsi			*vsi = ifp->if_softc;
+	struct ixl_vsi		*vsi = arg;
 	struct ixlv_sc		*sc = vsi->back;
 	struct ixlv_vlan_filter	*v;
 
 
-	if (ifp->if_softc !=  arg)   /* Not our event */
+	if (ifp->if_softc != arg)   /* Not our event */
 		return;
 
 	if ((vtag == 0) || (vtag > 4095))	/* Invalid */
@@ -1755,12 +1755,12 @@ ixlv_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
 static void
 ixlv_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag)
 {
-	struct ixl_vsi			*vsi = ifp->if_softc;
+	struct ixl_vsi		*vsi = arg;
 	struct ixlv_sc		*sc = vsi->back;
 	struct ixlv_vlan_filter	*v;
-	int				i = 0;
+	int			i = 0;
 	
-	if (ifp->if_softc !=  arg)
+	if (ifp->if_softc != arg)
 		return;
 
 	if ((vtag == 0) || (vtag > 4095))	/* Invalid */
@@ -2154,7 +2154,7 @@ ixlv_media_status(struct ifnet * ifp, struct ifmediareq * ifmr)
 	ifmr->ifm_status = IFM_AVALID;
 	ifmr->ifm_active = IFM_ETHER;
 
-	if (!vsi->link_up) {
+	if (!sc->link_up) {
 		mtx_unlock(&sc->mtx);
 		INIT_DBG_IF(ifp, "end: link not up");
 		return;
@@ -2395,7 +2395,7 @@ ixlv_local_timer(void *arg)
 		} else {
 			/* Check if we've come back from hung */
 			if ((vsi->active_queues & ((u64)1 << que->me)) == 0)
-     				vsi->active_queues |= ((u64)1 << que->me);
+				vsi->active_queues |= ((u64)1 << que->me);
 		}
 		if (que->busy >= IXL_MAX_TX_BUSY) {
 			device_printf(dev,"Warning queue %d "
@@ -2426,20 +2426,19 @@ ixlv_update_link_status(struct ixlv_sc *sc)
 {
 	struct ixl_vsi		*vsi = &sc->vsi;
 	struct ifnet		*ifp = vsi->ifp;
-	device_t		 dev = sc->dev;
 
-	if (vsi->link_up){ 
+	if (sc->link_up){ 
 		if (vsi->link_active == FALSE) {
 			if (bootverbose)
-				device_printf(dev,"Link is Up, %d Gbps\n",
-				    (vsi->link_speed == I40E_LINK_SPEED_40GB) ? 40:10);
+				if_printf(ifp,"Link is Up, %d Gbps\n",
+				    (sc->link_speed == I40E_LINK_SPEED_40GB) ? 40:10);
 			vsi->link_active = TRUE;
 			if_link_state_change(ifp, LINK_STATE_UP);
 		}
 	} else { /* Link down */
 		if (vsi->link_active == TRUE) {
 			if (bootverbose)
-				device_printf(dev,"Link is Down\n");
+				if_printf(ifp,"Link is Down\n");
 			if_link_state_change(ifp, LINK_STATE_DOWN);
 			vsi->link_active = FALSE;
 		}
@@ -2657,7 +2656,6 @@ static int
 ixlv_add_mac_filter(struct ixlv_sc *sc, u8 *macaddr, u16 flags)
 {
 	struct ixlv_mac_filter	*f;
-	device_t			dev = sc->dev;
 
 	/* Does one already exist? */
 	f = ixlv_find_mac_filter(sc, macaddr);
@@ -2670,7 +2668,7 @@ ixlv_add_mac_filter(struct ixlv_sc *sc, u8 *macaddr, u16 flags)
 	/* If not, get a new empty filter */
 	f = ixlv_get_mac_filter(sc);
 	if (f == NULL) {
-		device_printf(dev, "%s: no filters available!!\n",
+		if_printf(sc->vsi.ifp, "%s: no filters available!!\n",
 		    __func__);
 		return (ENOMEM);
 	}
@@ -2836,7 +2834,7 @@ ixlv_add_sysctls(struct ixlv_sc *sc)
 	struct ixl_sysctl_info *entry = ctls;
 	while (entry->stat != 0)
 	{
-		SYSCTL_ADD_UQUAD(ctx, child, OID_AUTO, entry->name,
+		SYSCTL_ADD_QUAD(ctx, child, OID_AUTO, entry->name,
 				CTLFLAG_RD, entry->stat,
 				entry->description);
 		entry++;
@@ -2852,34 +2850,34 @@ ixlv_add_sysctls(struct ixlv_sc *sc)
 		txr = &(queues[q].txr);
 		rxr = &(queues[q].rxr);
 
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "mbuf_defrag_failed",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "mbuf_defrag_failed",
 				CTLFLAG_RD, &(queues[q].mbuf_defrag_failed),
 				"m_defrag() failed");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "dropped",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "dropped",
 				CTLFLAG_RD, &(queues[q].dropped_pkts),
 				"Driver dropped packets");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "irqs",
 				CTLFLAG_RD, &(queues[q].irqs),
 				"irqs on this queue");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "tso_tx",
 				CTLFLAG_RD, &(queues[q].tso),
 				"TSO");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_dma_setup",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "tx_dma_setup",
 				CTLFLAG_RD, &(queues[q].tx_dma_setup),
 				"Driver tx dma failure in xmit");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "no_desc_avail",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "no_desc_avail",
 				CTLFLAG_RD, &(txr->no_desc),
 				"Queue No Descriptor Available");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "tx_packets",
 				CTLFLAG_RD, &(txr->total_packets),
 				"Queue Packets Transmitted");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_bytes",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "tx_bytes",
 				CTLFLAG_RD, &(txr->tx_bytes),
 				"Queue Bytes Transmitted");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "rx_packets",
 				CTLFLAG_RD, &(rxr->rx_packets),
 				"Queue Packets Received");
-		SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes",
+		SYSCTL_ADD_QUAD(ctx, queue_list, OID_AUTO, "rx_bytes",
 				CTLFLAG_RD, &(rxr->rx_bytes),
 				"Queue Bytes Received");
 
diff --git a/sys/dev/ixl/ixl.h b/sys/dev/ixl/ixl.h
index 30e195f2980..df8f04f557b 100644
--- a/sys/dev/ixl/ixl.h
+++ b/sys/dev/ixl/ixl.h
@@ -90,6 +90,11 @@
 #include <sys/smp.h>
 #include <machine/smp.h>
 
+#ifdef PCI_IOV
+#include <sys/nv.h>
+#include <sys/iov_schema.h>
+#endif
+
 #include "i40e_type.h"
 #include "i40e_prototype.h"
 
@@ -224,6 +229,10 @@
 #define IXL_QUEUE_HUNG		0x80000000
 #define IXL_KEYSZ		10
 
+#define IXL_VF_MAX_BUFFER	0x3F80
+#define IXL_VF_MAX_HDR_BUFFER	0x840
+#define IXL_VF_MAX_FRAME	0x3FFF
+
 /* ERJ: hardware can support ~1.5k filters between all functions */
 #define IXL_MAX_FILTERS	256
 #define IXL_MAX_TX_BUSY	10
@@ -265,6 +274,35 @@
 #define IXL_FLAGS_KEEP_TSO4	(1 << 0)
 #define IXL_FLAGS_KEEP_TSO6	(1 << 1)
 
+#define IXL_VF_RESET_TIMEOUT	100
+
+#define IXL_VSI_DATA_PORT	0x01
+
+#define IXLV_MAX_QUEUES		16
+#define IXL_MAX_VSI_QUEUES	(2 * (I40E_VSILAN_QTABLE_MAX_INDEX + 1))
+
+#define IXL_RX_CTX_BASE_UNITS	128
+#define IXL_TX_CTX_BASE_UNITS	128
+
+#define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \
+	I40E_VPINT_LNKLSTN(((vector) - 1) + \
+	    (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num)))
+
+#define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \
+	I40E_VFINT_DYN_CTLN(((vector) - 1) + \
+	    (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num)))
+
+#define IXL_PF_PCI_CIAA_VF_DEVICE_STATUS	0xAA
+
+#define IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK	0x20
+
+#define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf)	((glb_vf) / 32)
+#define IXL_GLGEN_VFLRSTAT_MASK(glb_vf)	(1 << ((glb_vf) % 32))
+
+#define IXL_MAX_ITR_IDX		3
+
+#define IXL_END_OF_INTR_LNKLST	0x7FF
+
 #define IXL_TX_LOCK(_sc)                mtx_lock(&(_sc)->mtx)
 #define IXL_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->mtx)
 #define IXL_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->mtx)
@@ -461,19 +499,22 @@ struct ixl_vsi {
 	struct ifmedia		media;
 	u64			que_mask;
 	int			id;
+	u16			vsi_num;
 	u16			msix_base;	/* station base MSIX vector */
+	u16			first_queue;
 	u16			num_queues;
 	u16			rx_itr_setting;
 	u16			tx_itr_setting;
 	struct ixl_queue	*queues;	/* head of queues */
 	bool			link_active;
 	u16			seid;
+	u16			uplink_seid;
+	u16			downlink_seid;
 	u16			max_frame_size;
-	u32			link_speed;
-	bool			link_up;
 
 	/* MAC/VLAN Filter list */
 	struct ixl_ftl_head ftl;
+	u16			num_macs;
 
 	struct i40e_aqc_vsi_properties_data info;
 
@@ -505,6 +546,7 @@ struct ixl_vsi {
 	/* Misc. */
 	u64 			active_queues;
 	u64 			flags;
+	struct sysctl_oid	*vsi_node;
 };
 
 /*
@@ -543,7 +585,7 @@ ixl_get_filter(struct ixl_vsi *vsi)
 ** Compare two ethernet addresses
 */
 static inline bool
-cmp_etheraddr(u8 *ea1, u8 *ea2)
+cmp_etheraddr(const u8 *ea1, const u8 *ea2)
 {       
 	bool cmp = FALSE;
 
diff --git a/sys/dev/ixl/ixl_pf.h b/sys/dev/ixl/ixl_pf.h
index 7c3d3bbdeac..4f0bddad76a 100644
--- a/sys/dev/ixl/ixl_pf.h
+++ b/sys/dev/ixl/ixl_pf.h
@@ -36,6 +36,22 @@
 #ifndef _IXL_PF_H_
 #define _IXL_PF_H_
 
+#define	VF_FLAG_ENABLED			0x01
+#define	VF_FLAG_SET_MAC_CAP		0x02
+#define	VF_FLAG_VLAN_CAP		0x04
+#define	VF_FLAG_PROMISC_CAP		0x08
+#define	VF_FLAG_MAC_ANTI_SPOOF		0x10
+
+struct ixl_vf {
+	struct ixl_vsi		vsi;
+	uint32_t		vf_flags;
+
+	uint8_t			mac[ETHER_ADDR_LEN];
+	uint16_t		vf_num;
+
+	struct sysctl_ctx_list	ctx;
+};
+
 /* Physical controller structure */
 struct ixl_pf {
 	struct i40e_hw		hw;
@@ -64,15 +80,18 @@ struct ixl_pf {
 	struct task     	adminq;
 	struct taskqueue	*tq;
 
+	bool			link_up;
+	u32			link_speed;
 	int			advertised_speed;
 	int			fc; /* local flow ctrl setting */
 
 	/*
-	** VSI - Stations: 
+	** Network interfaces
 	**   These are the traffic class holders, and
 	**   will have a stack interface and queues 
 	**   associated with them.
-	** NOTE: for now using just one, so embed it.
+	** NOTE: The PF has only a single interface,
+	**   so it is embedded in the PF struct.
 	*/
 	struct ixl_vsi		vsi;
 
@@ -84,8 +103,31 @@ struct ixl_pf {
 	struct i40e_hw_port_stats 	stats;
 	struct i40e_hw_port_stats	stats_offsets;
 	bool 				stat_offsets_loaded;
+
+	struct ixl_vf		*vfs;
+	int			num_vfs;
+	uint16_t		veb_seid;
+	struct task		vflr_task;
+	int			vc_debug_lvl;
 };
 
+#define IXL_SET_ADVERTISE_HELP		\
+"Control link advertise speed:\n"	\
+"\tFlags:\n"				\
+"\t\t0x1 - advertise 100 Mb\n"		\
+"\t\t0x2 - advertise 1G\n"		\
+"\t\t0x4 - advertise 10G\n"		\
+"\t\t0x8 - advertise 20G\n\n"		\
+"\tDoes not work on 40G devices."
+
+#define	I40E_VC_DEBUG(pf, level, ...) \
+	do { \
+		if ((pf)->vc_debug_lvl >= (level)) \
+			device_printf((pf)->dev, __VA_ARGS__); \
+	} while (0)
+
+#define	i40e_send_vf_nack(pf, vf, op, st) \
+	ixl_send_vf_nack_msg((pf), (vf), (op), (st), __FILE__, __LINE__)
 
 #define IXL_PF_LOCK_INIT(_sc, _name) \
         mtx_init(&(_sc)->pf_mtx, _name, "IXL PF Lock", MTX_DEF)
diff --git a/sys/dev/ixl/ixl_txrx.c b/sys/dev/ixl/ixl_txrx.c
index 5942e7c09cf..43a19490c07 100755
--- a/sys/dev/ixl/ixl_txrx.c
+++ b/sys/dev/ixl/ixl_txrx.c
@@ -68,7 +68,6 @@ static __inline void ixl_rx_input(struct rx_ring *, struct ifnet *,
 
 /*
 ** Multiqueue Transmit driver
-**
 */
 int
 ixl_mq_start(struct ifnet *ifp, struct mbuf *m)
@@ -112,7 +111,7 @@ ixl_mq_start(struct ifnet *ifp, struct mbuf *m)
 
 	err = drbr_enqueue(ifp, txr->br, m);
 	if (err)
-		return(err);
+		return (err);
 	if (IXL_TX_TRYLOCK(txr)) {
 		ixl_mq_start_locked(ifp, txr);
 		IXL_TX_UNLOCK(txr);
@@ -488,15 +487,16 @@ ixl_allocate_tx_data(struct ixl_queue *que)
 void
 ixl_init_tx_ring(struct ixl_queue *que)
 {
-	struct tx_ring *txr = &que->txr;
-	struct ixl_tx_buf *buf;
 #ifdef DEV_NETMAP
 	struct netmap_adapter *na = NA(que->vsi->ifp);
 	struct netmap_slot *slot;
 #endif /* DEV_NETMAP */
+	struct tx_ring		*txr = &que->txr;
+	struct ixl_tx_buf	*buf;
 
 	/* Clear the old ring contents */
 	IXL_TX_LOCK(txr);
+
 #ifdef DEV_NETMAP
 	/*
 	 * (under lock): if in netmap mode, do some consistency
@@ -1158,7 +1158,7 @@ ixl_init_rx_ring(struct ixl_queue *que)
 	struct ixl_rx_buf	*buf;
 	bus_dma_segment_t	pseg[1], hseg[1];
 	int			rsize, nsegs, error = 0;
-#ifdef DEV_NETMAP 
+#ifdef DEV_NETMAP
 	struct netmap_adapter *na = NA(que->vsi->ifp);
 	struct netmap_slot *slot;
 #endif /* DEV_NETMAP */
@@ -1222,7 +1222,6 @@ ixl_init_rx_ring(struct ixl_queue *que)
 			continue;
 		}
 #endif /* DEV_NETMAP */
-
 		/*
 		** Don't allocate mbufs if not
 		** doing header split, its wasteful
diff --git a/sys/dev/ixl/ixlv.h b/sys/dev/ixl/ixlv.h
index 77a02fa7e87..840e17af71d 100644
--- a/sys/dev/ixl/ixlv.h
+++ b/sys/dev/ixl/ixlv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
 
-  Copyright (c) 2013-2014, Intel Corporation 
+  Copyright (c) 2013-2015, Intel Corporation 
   All rights reserved.
   
   Redistribution and use in source and binary forms, with or without 
@@ -119,6 +119,9 @@ struct ixlv_sc {
 	int			msix;
 	int			if_flags;
 
+	bool			link_up;
+	u32			link_speed;
+
 	struct mtx		mtx;
 
 	u32			qbase;
diff --git a/sys/dev/ixl/ixlvc.c b/sys/dev/ixl/ixlvc.c
index a0142bad7d6..02192f3f00c 100644
--- a/sys/dev/ixl/ixlvc.c
+++ b/sys/dev/ixl/ixlvc.c
@@ -362,7 +362,7 @@ ixlv_configure_queues(struct ixlv_sc *sc)
 
 	struct i40e_virtchnl_vsi_queue_config_info *vqci;
 	struct i40e_virtchnl_queue_pair_info *vqpi;
-	
+
 	pairs = vsi->num_queues;
 	len = sizeof(struct i40e_virtchnl_vsi_queue_config_info) +
 		       (sizeof(struct i40e_virtchnl_queue_pair_info) * pairs);
@@ -788,14 +788,11 @@ ixlv_request_stats(struct ixlv_sc *sc)
 void
 ixlv_update_stats_counters(struct ixlv_sc *sc, struct i40e_eth_stats *es)
 {
-	struct ixl_vsi *vsi;
+	struct ixl_vsi *vsi = &sc->vsi;
 	uint64_t tx_discards;
-	int i;
-
-	vsi = &sc->vsi;
 
 	tx_discards = es->tx_discards;
-	for (i = 0; i < sc->vsi.num_queues; i++)
+	for (int i = 0; i < vsi->num_queues; i++)
 		tx_discards += sc->vsi.queues[i].txr.br->br_drops;
 
 	/* Update ifnet stats */
@@ -816,7 +813,7 @@ ixlv_update_stats_counters(struct ixlv_sc *sc, struct i40e_eth_stats *es)
 	IXL_SET_NOPROTO(vsi, es->rx_unknown_protocol);
 	IXL_SET_COLLISIONS(vsi, 0);
 
-	sc->vsi.eth_stats = *es;
+	vsi->eth_stats = *es;
 }
 
 /*
@@ -845,9 +842,9 @@ ixlv_vc_completion(struct ixlv_sc *sc,
 			    vpe->event_data.link_event.link_status,
 			    vpe->event_data.link_event.link_speed);
 #endif
-			vsi->link_up =
+			sc->link_up =
 				vpe->event_data.link_event.link_status;
-			vsi->link_speed =
+			sc->link_speed =
 				vpe->event_data.link_event.link_speed;
 			ixlv_update_link_status(sc);
 			break;
diff --git a/sys/dev/mii/rgephy.c b/sys/dev/mii/rgephy.c
index 42f07750e01..289eeabe369 100644
--- a/sys/dev/mii/rgephy.c
+++ b/sys/dev/mii/rgephy.c
@@ -87,6 +87,7 @@ static int	rgephy_service(struct mii_softc *, struct mii_data *, int);
 static void	rgephy_status(struct mii_softc *);
 static int	rgephy_mii_phy_auto(struct mii_softc *, int);
 static void	rgephy_reset(struct mii_softc *);
+static int	rgephy_linkup(struct mii_softc *);
 static void	rgephy_loop(struct mii_softc *);
 static void	rgephy_load_dspcode(struct mii_softc *);
 
@@ -147,7 +148,7 @@ static int
 rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 {
 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
-	int reg, speed, gig, anar;
+	int speed, gig, anar;
 
 	switch (cmd) {
 	case MII_POLLSTAT:
@@ -237,20 +238,9 @@ rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 		 * Check to see if we have link.  If we do, we don't
 		 * need to restart the autonegotiation process.
 		 */
-		if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&
-		    sc->mii_mpd_rev >= 2) {
-			/* RTL8211B(L) */
-			reg = PHY_READ(sc, RGEPHY_MII_SSR);
-			if (reg & RGEPHY_SSR_LINK) {
-				sc->mii_ticks = 0;
-				break;
-			}
-		} else {
-			reg = PHY_READ(sc, RL_GMEDIASTAT);
-			if (reg & RL_GMEDIASTAT_LINK) {
-				sc->mii_ticks = 0;
-				break;
-			}
+		if (rgephy_linkup(sc) != 0) {
+			sc->mii_ticks = 0;
+			break;
 		}
 
 		/* Announce link loss right after it happens. */
@@ -283,6 +273,33 @@ rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 	return (0);
 }
 
+static int
+rgephy_linkup(struct mii_softc *sc)
+{
+	int linkup;
+	uint16_t reg;
+
+	linkup = 0;
+	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&
+	    sc->mii_mpd_rev >= RGEPHY_8211B) {
+		if (sc->mii_mpd_rev == RGEPHY_8211F) {
+			reg = PHY_READ(sc, RGEPHY_F_MII_SSR);
+			if (reg & RGEPHY_F_SSR_LINK)
+				linkup++;
+		} else {
+			reg = PHY_READ(sc, RGEPHY_MII_SSR);
+			if (reg & RGEPHY_SSR_LINK)
+				linkup++;
+		}
+	} else {
+		reg = PHY_READ(sc, RL_GMEDIASTAT);
+		if (reg & RL_GMEDIASTAT_LINK)
+			linkup++;
+	}
+
+	return (linkup);
+}
+
 static void
 rgephy_status(struct mii_softc *sc)
 {
@@ -293,18 +310,10 @@ rgephy_status(struct mii_softc *sc)
 	mii->mii_media_status = IFM_AVALID;
 	mii->mii_media_active = IFM_ETHER;
 
-	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
-		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
-		if (ssr & RGEPHY_SSR_LINK)
-			mii->mii_media_status |= IFM_ACTIVE;
-	} else {
-		bmsr = PHY_READ(sc, RL_GMEDIASTAT);
-		if (bmsr & RL_GMEDIASTAT_LINK)
-			mii->mii_media_status |= IFM_ACTIVE;
-	}
+	if (rgephy_linkup(sc) != 0)
+		mii->mii_media_status |= IFM_ACTIVE;
 
 	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
-
 	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
 	if (bmcr & RGEPHY_BMCR_ISO) {
 		mii->mii_media_active |= IFM_NONE;
@@ -323,26 +332,50 @@ rgephy_status(struct mii_softc *sc)
 		}
 	}
 
-	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
-		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
-		switch (ssr & RGEPHY_SSR_SPD_MASK) {
-		case RGEPHY_SSR_S1000:
-			mii->mii_media_active |= IFM_1000_T;
-			break;
-		case RGEPHY_SSR_S100:
-			mii->mii_media_active |= IFM_100_TX;
-			break;
-		case RGEPHY_SSR_S10:
-			mii->mii_media_active |= IFM_10_T;
-			break;
-		default:
-			mii->mii_media_active |= IFM_NONE;
-			break;
+	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&
+	    sc->mii_mpd_rev >= RGEPHY_8211B) {
+		if (sc->mii_mpd_rev == RGEPHY_8211F) {
+			ssr = PHY_READ(sc, RGEPHY_F_MII_SSR);
+			switch (ssr & RGEPHY_F_SSR_SPD_MASK) {
+			case RGEPHY_F_SSR_S1000:
+				mii->mii_media_active |= IFM_1000_T;
+				break;
+			case RGEPHY_F_SSR_S100:
+				mii->mii_media_active |= IFM_100_TX;
+				break;
+			case RGEPHY_F_SSR_S10:
+				mii->mii_media_active |= IFM_10_T;
+				break;
+			default:
+				mii->mii_media_active |= IFM_NONE;
+				break;
+			}
+			if (ssr & RGEPHY_F_SSR_FDX)
+				mii->mii_media_active |= IFM_FDX;
+			else
+				mii->mii_media_active |= IFM_HDX;
+
+		} else {
+			ssr = PHY_READ(sc, RGEPHY_MII_SSR);
+			switch (ssr & RGEPHY_SSR_SPD_MASK) {
+			case RGEPHY_SSR_S1000:
+				mii->mii_media_active |= IFM_1000_T;
+				break;
+			case RGEPHY_SSR_S100:
+				mii->mii_media_active |= IFM_100_TX;
+				break;
+			case RGEPHY_SSR_S10:
+				mii->mii_media_active |= IFM_10_T;
+				break;
+			default:
+				mii->mii_media_active |= IFM_NONE;
+				break;
+			}
+			if (ssr & RGEPHY_SSR_FDX)
+				mii->mii_media_active |= IFM_FDX;
+			else
+				mii->mii_media_active |= IFM_HDX;
 		}
-		if (ssr & RGEPHY_SSR_FDX)
-			mii->mii_media_active |= IFM_FDX;
-		else
-			mii->mii_media_active |= IFM_HDX;
 	} else {
 		bmsr = PHY_READ(sc, RL_GMEDIASTAT);
 		if (bmsr & RL_GMEDIASTAT_1000MBPS)
@@ -396,7 +429,7 @@ rgephy_loop(struct mii_softc *sc)
 	int i;
 
 	if (sc->mii_mpd_model != MII_MODEL_REALTEK_RTL8251 &&
-	    sc->mii_mpd_rev < 2) {
+	    sc->mii_mpd_rev < RGEPHY_8211B) {
 		PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);
 		DELAY(1000);
 	}
@@ -430,7 +463,7 @@ rgephy_load_dspcode(struct mii_softc *sc)
 	int val;
 
 	if (sc->mii_mpd_model == MII_MODEL_REALTEK_RTL8251 ||
-	    sc->mii_mpd_rev >= 2)
+	    sc->mii_mpd_rev >= RGEPHY_8211B)
 		return;
 
 	PHY_WRITE(sc, 31, 0x0001);
@@ -481,22 +514,34 @@ rgephy_reset(struct mii_softc *sc)
 {
 	uint16_t pcr, ssr;
 
-	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev == 3) {
-		/* RTL8211C(L) */
-		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
-		if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
-			ssr &= ~RGEPHY_SSR_ALDPS;
-			PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
+	switch (sc->mii_mpd_rev) {
+	case RGEPHY_8211F:
+		pcr = PHY_READ(sc, RGEPHY_F_MII_PCR1);
+		if ((pcr & RGEPHY_F_PCR1_MDI_MM) != 0) {
+			pcr &= ~RGEPHY_F_PCR1_MDI_MM;
+			PHY_WRITE(sc, RGEPHY_F_MII_PCR1, pcr);
 		}
-	}
-
-	if (sc->mii_mpd_rev >= 2) {
-		pcr = PHY_READ(sc, RGEPHY_MII_PCR);
-		if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {
-			pcr &= ~RGEPHY_PCR_MDI_MASK;
-			pcr |= RGEPHY_PCR_MDIX_AUTO;
-			PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);
+		break;
+	case RGEPHY_8211C:
+		if ((sc->mii_flags & MIIF_PHYPRIV0) == 0) {
+			/* RTL8211C(L) */
+			ssr = PHY_READ(sc, RGEPHY_MII_SSR);
+			if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
+				ssr &= ~RGEPHY_SSR_ALDPS;
+				PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
+			}
 		}
+		/* FALLTHROUGH */
+	default:
+		if (sc->mii_mpd_rev >= RGEPHY_8211B) {
+			pcr = PHY_READ(sc, RGEPHY_MII_PCR);
+			if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {
+				pcr &= ~RGEPHY_PCR_MDI_MASK;
+				pcr |= RGEPHY_PCR_MDIX_AUTO;
+				PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);
+			}
+		}
+		break;
 	}
 
 	mii_phy_reset(sc);
diff --git a/sys/dev/mii/rgephyreg.h b/sys/dev/mii/rgephyreg.h
index fb02ae6a5ba..2a00517ea40 100644
--- a/sys/dev/mii/rgephyreg.h
+++ b/sys/dev/mii/rgephyreg.h
@@ -35,6 +35,10 @@
 #ifndef _DEV_MII_RGEPHYREG_H_
 #define	_DEV_MII_RGEPHYREG_H_
 
+#define	RGEPHY_8211B		2
+#define	RGEPHY_8211C		3
+#define	RGEPHY_8211F		6
+
 /*
  * RealTek 8169S/8110S gigE PHY registers
  */
@@ -162,4 +166,21 @@
 #define	RGEPHY_SSR_ALDPS	0x0008	/* RTL8211C(L) only */
 #define	RGEPHY_SSR_JABBER	0x0001	/* Jabber */
 
+/* RTL8211F */
+#define	RGEPHY_F_MII_PCR1	0x18	/* PHY Specific control register 1 */
+#define	RGEPHY_F_PCR1_MDI_MM	0x0200	/* MDI / MDIX Manual Mode */
+#define	RGEPHY_F_PCR1_MDI_MODE	0x0100	/* MDI Mode (0=MDIX,1=MDI) */
+#define	RGEPHY_F_PCR1_ALDPS_EN	0x0004	/* Link Down Power Saving Enable */
+
+/* RTL8211F */
+#define	RGEPHY_F_MII_SSR	0x1A	/* PHY Specific status register */
+#define	RGEPHY_F_SSR_S1000	0x0020	/* 1000Mbps */
+#define	RGEPHY_F_SSR_S100	0x0010	/* 100Mbps */
+#define	RGEPHY_F_SSR_S10	0x0000	/* 10Mbps */
+#define	RGEPHY_F_SSR_SPD_MASK	0x0030
+#define	RGEPHY_F_SSR_FDX	0x0008	/* full duplex */
+#define	RGEPHY_F_SSR_LINK	0x0004	/* link up */
+#define	RGEPHY_F_SSR_MDI	0x0002	/* MDI/MDIX */
+#define	RGEPHY_F_SSR_JABBER	0x0001	/* Jabber */
+
 #endif /* _DEV_RGEPHY_MIIREG_H_ */
diff --git a/sys/dev/mps/mps_sas.c b/sys/dev/mps/mps_sas.c
index 26f59c263da..4fbdbb2d20c 100644
--- a/sys/dev/mps/mps_sas.c
+++ b/sys/dev/mps/mps_sas.c
@@ -3406,19 +3406,6 @@ mpssas_check_eedp(struct mps_softc *sc, struct cam_path *path,
 
 	xpt_path_string(local_path, path_str, sizeof(path_str));
 
-	/*
-	 * If this is a SATA direct-access end device,
-	 * mark it so that a SCSI StartStopUnit command
-	 * will be sent to it when the driver is being
-	 * shutdown.
-	 */
-	if ((cgd.inq_data.device == T_DIRECT) && 
-	    (target->devinfo & MPI2_SAS_DEVICE_INFO_SATA_DEVICE) &&
-	    ((target->devinfo & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) ==
-	    MPI2_SAS_DEVICE_INFO_END_DEVICE)) {
-		lun->stop_at_shutdown = TRUE;
-	}
-
 	mps_dprint(sc, MPS_INFO, "Sending read cap: path %s handle %d\n",
 	    path_str, target->handle);
 
diff --git a/sys/dev/mvs/mvs.h b/sys/dev/mvs/mvs.h
index 69a7c96b348..163af50e70d 100644
--- a/sys/dev/mvs/mvs.h
+++ b/sys/dev/mvs/mvs.h
@@ -263,7 +263,7 @@
 #define        SATA_SS_SPD_NO_SPEED     0x00000000
 #define        SATA_SS_SPD_GEN1         0x00000010
 #define        SATA_SS_SPD_GEN2         0x00000020
-#define        SATA_SS_SPD_GEN3         0x00000040
+#define        SATA_SS_SPD_GEN3         0x00000030
 
 #define        SATA_SS_IPM_MASK         0x00000f00
 #define        SATA_SS_IPM_NO_DEVICE    0x00000000
@@ -298,7 +298,7 @@
 #define        SATA_SC_SPD_NO_SPEED     0x00000000
 #define        SATA_SC_SPD_SPEED_GEN1   0x00000010
 #define        SATA_SC_SPD_SPEED_GEN2   0x00000020
-#define        SATA_SC_SPD_SPEED_GEN3   0x00000040
+#define        SATA_SC_SPD_SPEED_GEN3   0x00000030
 
 #define        SATA_SC_IPM_MASK         0x00000f00
 #define        SATA_SC_IPM_NONE         0x00000000
diff --git a/sys/dev/pci/pci_iov.c b/sys/dev/pci/pci_iov.c
index ff5a833c370..e256a5d126f 100644
--- a/sys/dev/pci/pci_iov.c
+++ b/sys/dev/pci/pci_iov.c
@@ -586,7 +586,7 @@ pci_iov_enumerate_vfs(struct pci_devinfo *dinfo, const nvlist_t *config,
 		 * VFs.
 		 */
 		if (nvlist_get_bool(iov_config, "passthrough"))
-			device_set_devclass(vf, "ppt");
+			device_set_devclass_fixed(vf, "ppt");
 
 		vfinfo = device_get_ivars(vf);
 
diff --git a/sys/dev/siis/siis.h b/sys/dev/siis/siis.h
index fcfc4d2e1c0..6d8a063d035 100644
--- a/sys/dev/siis/siis.h
+++ b/sys/dev/siis/siis.h
@@ -92,7 +92,7 @@
 #define         ATA_SS_SPD_NO_SPEED     0x00000000
 #define         ATA_SS_SPD_GEN1         0x00000010
 #define         ATA_SS_SPD_GEN2         0x00000020
-#define         ATA_SS_SPD_GEN3         0x00000040
+#define         ATA_SS_SPD_GEN3         0x00000030
 
 #define         ATA_SS_IPM_MASK         0x00000f00
 #define         ATA_SS_IPM_NO_DEVICE    0x00000000
@@ -128,7 +128,7 @@
 #define         ATA_SC_SPD_NO_SPEED     0x00000000
 #define         ATA_SC_SPD_SPEED_GEN1   0x00000010
 #define         ATA_SC_SPD_SPEED_GEN2   0x00000020
-#define         ATA_SC_SPD_SPEED_GEN3   0x00000040
+#define         ATA_SC_SPD_SPEED_GEN3   0x00000030
 
 #define         ATA_SC_IPM_MASK         0x00000f00
 #define         ATA_SC_IPM_NONE         0x00000000
diff --git a/sys/dev/uart/uart.h b/sys/dev/uart/uart.h
index b62dec6da4f..c40846b758d 100644
--- a/sys/dev/uart/uart.h
+++ b/sys/dev/uart/uart.h
@@ -64,26 +64,12 @@ struct uart_bas {
  */
 struct uart_class;
 
-extern struct uart_class uart_imx_class __attribute__((weak));
-extern struct uart_class uart_msm_class __attribute__((weak));
 extern struct uart_class uart_ns8250_class __attribute__((weak));
 extern struct uart_class uart_quicc_class __attribute__((weak));
 extern struct uart_class uart_s3c2410_class __attribute__((weak));
 extern struct uart_class uart_sab82532_class __attribute__((weak));
 extern struct uart_class uart_sbbc_class __attribute__((weak));
 extern struct uart_class uart_z8530_class __attribute__((weak));
-extern struct uart_class uart_lpc_class __attribute__((weak));
-extern struct uart_class uart_pl011_class __attribute__((weak));
-extern struct uart_class uart_cdnc_class __attribute__((weak));
-extern struct uart_class uart_ti8250_class __attribute__((weak));
-extern struct uart_class uart_vybrid_class __attribute__((weak));
-extern struct uart_class at91_usart_class __attribute__((weak));
-extern struct uart_class uart_exynos4210_class __attribute__((weak));
-
-#ifdef FDT
-struct ofw_compat_data;
-extern const struct ofw_compat_data *uart_fdt_compat_data;
-#endif
 
 #ifdef PC98
 struct uart_class *uart_pc98_getdev(u_long port);
diff --git a/sys/dev/uart/uart_bus_fdt.c b/sys/dev/uart/uart_bus_fdt.c
index 457e0418571..3c68d952836 100644
--- a/sys/dev/uart/uart_bus_fdt.c
+++ b/sys/dev/uart/uart_bus_fdt.c
@@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 
 static int uart_fdt_probe(device_t);
 
@@ -62,37 +63,6 @@ static driver_t uart_fdt_driver = {
 	sizeof(struct uart_softc),
 };
 
-/*
- * Compatible devices.  Keep this sorted in most- to least-specific order first,
- * alphabetical second.  That is, "zwie,ns16550" should appear before "ns16550"
- * on the theory that the zwie driver knows how to make better use of the
- * hardware than the generic driver.  Likewise with chips within a family, the
- * highest-numbers / most recent models should probably appear earlier.
- */
-static struct ofw_compat_data compat_data[] = {
-	{"arm,pl011",		(uintptr_t)&uart_pl011_class},
-	{"atmel,at91rm9200-usart",(uintptr_t)&at91_usart_class},
-	{"atmel,at91sam9260-usart",(uintptr_t)&at91_usart_class},
-	{"cadence,uart",	(uintptr_t)&uart_cdnc_class},
-	{"exynos",		(uintptr_t)&uart_exynos4210_class},
-	{"fsl,imx6q-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx53-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx51-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx31-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx27-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx25-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,imx21-uart",	(uintptr_t)&uart_imx_class},
-	{"fsl,mvf600-uart",	(uintptr_t)&uart_vybrid_class},
-	{"lpc,uart",		(uintptr_t)&uart_lpc_class},
-	{"qcom,msm-uartdm",	(uintptr_t)&uart_msm_class},
-	{"ti,ns16550",		(uintptr_t)&uart_ti8250_class},
-	{"ns16550",		(uintptr_t)&uart_ns8250_class},
-	{NULL,			(uintptr_t)NULL},
-};
-
-/* Export the compat_data table for use by the uart_cpu_fdt.c probe routine. */
-const struct ofw_compat_data *uart_fdt_compat_data = compat_data;
-
 static int
 uart_fdt_get_clock(phandle_t node, pcell_t *cell)
 {
@@ -127,6 +97,20 @@ uart_fdt_get_shift(phandle_t node, pcell_t *cell)
 	return (0);
 }
 
+static uintptr_t
+uart_fdt_find_device(device_t dev)
+{
+	struct ofw_compat_data **cd;
+	const struct ofw_compat_data *ocd;
+
+	SET_FOREACH(cd, uart_fdt_class_and_device_set) {
+		ocd = ofw_bus_search_compatible(dev, *cd);
+		if (ocd->ocd_data != 0)
+			return (ocd->ocd_data);
+	}
+	return (0);
+}
+
 static int
 uart_fdt_probe(device_t dev)
 {
@@ -134,19 +118,16 @@ uart_fdt_probe(device_t dev)
 	phandle_t node;
 	pcell_t clock, shift;
 	int err;
-	const struct ofw_compat_data * cd;
 
 	sc = device_get_softc(dev);
 
 	if (!ofw_bus_status_okay(dev))
 		return (ENXIO);
 
-	cd = ofw_bus_search_compatible(dev, compat_data);
-	if (cd->ocd_data == (uintptr_t)NULL)
+	sc->sc_class = (struct uart_class *)uart_fdt_find_device(dev);
+	if (sc->sc_class == NULL)
 		return (ENXIO);
 
-	sc->sc_class = (struct uart_class *)cd->ocd_data;
-
 	node = ofw_bus_get_node(dev);
 
 	if ((err = uart_fdt_get_clock(node, &clock)) != 0)
diff --git a/sys/dev/uart/uart_cpu_fdt.c b/sys/dev/uart/uart_cpu_fdt.c
index 356049b9ae3..8dfdb3c0de1 100644
--- a/sys/dev/uart/uart_cpu_fdt.c
+++ b/sys/dev/uart/uart_cpu_fdt.c
@@ -50,6 +50,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 
 /*
  * UART console routines.
@@ -115,13 +116,46 @@ phandle_chosen_propdev(phandle_t chosen, const char *name, phandle_t *node)
 	return (0);
 }
 
+static const struct ofw_compat_data *
+uart_fdt_find_compatible(phandle_t node, const struct ofw_compat_data *cd)
+{
+	const struct ofw_compat_data *ocd;
+
+	for (ocd = cd; ocd->ocd_str != NULL; ocd++) {
+		if (fdt_is_compatible(node, ocd->ocd_str))
+			return (ocd);
+	}
+	return (NULL);
+}
+
+static uintptr_t
+uart_fdt_find_by_node(phandle_t node, int class_list)
+{
+	struct ofw_compat_data **cd;
+	const struct ofw_compat_data *ocd;
+
+	if (class_list) {
+		SET_FOREACH(cd, uart_fdt_class_set) {
+			ocd = uart_fdt_find_compatible(node, *cd);
+			if ((ocd != NULL) && (ocd->ocd_data != 0))
+				return (ocd->ocd_data);
+		}
+	} else {
+		SET_FOREACH(cd, uart_fdt_class_and_device_set) {
+			ocd = uart_fdt_find_compatible(node, *cd);
+			if ((ocd != NULL) && (ocd->ocd_data != 0))
+				return (ocd->ocd_data);
+		}
+	}
+	return (0);
+}
+
 int
 uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 {
 	const char *propnames[] = {"stdout-path", "linux,stdout-path", "stdout",
 	    "stdin-path", "stdin", NULL};
 	const char **name;
-	const struct ofw_compat_data *cd;
 	struct uart_class *class;
 	phandle_t node, chosen;
 	pcell_t shift, br, rclk;
@@ -160,24 +194,32 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	 * Retrieve serial attributes.
 	 */
 	uart_fdt_get_shift(node, &shift);
-
 	if (OF_getprop(node, "current-speed", &br, sizeof(br)) <= 0)
 		br = 0;
-	br = fdt32_to_cpu(br);
+	else
+		br = fdt32_to_cpu(br);
+
+	/*
+	 * Check old style of UART definition first. Unfortunately, the common
+	 * FDT processing is not possible if we have clock, power domains and
+	 * pinmux stuff.
+	 */
+	class = (struct uart_class *)uart_fdt_find_by_node(node, 0);
+	if (class != NULL) {
+		if ((err = uart_fdt_get_clock(node, &rclk)) != 0)
+			return (err);
+	} else {
+		/* Check class only linker set */
+		class =
+		    (struct uart_class *)uart_fdt_find_by_node(node, 1);
+		if (class == NULL)
+			return (ENXIO);
+		rclk = 0;
+	}
 
-	if ((err = uart_fdt_get_clock(node, &rclk)) != 0)
-		return (err);
 	/*
 	 * Finalize configuration.
 	 */
-	for (cd = uart_fdt_compat_data; cd->ocd_str != NULL; ++cd) {
-		if (fdt_is_compatible(node, cd->ocd_str))
-			break;
-	}
-	if (cd->ocd_str == NULL)
-		return (ENXIO);
-	class = (struct uart_class *)cd->ocd_data;
-
 	di->bas.chan = 0;
 	di->bas.regshft = (u_int)shift;
 	di->baudrate = br;
diff --git a/sys/dev/uart/uart_cpu_fdt.h b/sys/dev/uart/uart_cpu_fdt.h
new file mode 100644
index 00000000000..e7aaecda432
--- /dev/null
+++ b/sys/dev/uart/uart_cpu_fdt.h
@@ -0,0 +1,54 @@
+/*-
+ * Copyright 2015 Michal Meloun
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _DEV_UART_CPU_FDT_H_
+#define _DEV_UART_CPU_FDT_H_
+
+#include <sys/linker_set.h>
+
+#include <dev/ofw/ofw_bus_subr.h>
+
+/*
+ * If your UART driver implements only uart_class and uses uart_cpu_fdt.c
+ * for device instantiation, then use UART_FDT_CLASS_AND_DEVICE for its
+ * declaration
+ */
+SET_DECLARE(uart_fdt_class_and_device_set, struct ofw_compat_data );
+#define UART_FDT_CLASS_AND_DEVICE(data)				\
+	DATA_SET(uart_fdt_class_and_device_set, data)
+
+/*
+ * If your UART driver implements uart_class and custom device layer,
+ * then use UART_FDT_CLASS for its declaration
+ */
+SET_DECLARE(uart_fdt_class_set, struct ofw_compat_data );
+#define UART_FDT_CLASS(data)				\
+	DATA_SET(uart_fdt_class_set, data)
+
+
+#endif /* _DEV_UART_CPU_FDT_H_ */
diff --git a/sys/dev/uart/uart_dev_imx.c b/sys/dev/uart/uart_dev_imx.c
index 2f5fc064a80..9e34473cfe3 100644
--- a/sys/dev/uart/uart_dev_imx.c
+++ b/sys/dev/uart/uart_dev_imx.c
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_dev_imx.h>
 #include "uart_if.h"
@@ -291,7 +292,7 @@ static kobj_method_t imx_uart_methods[] = {
 	{ 0, 0 }
 };
 
-struct uart_class uart_imx_class = {
+static struct uart_class uart_imx_class = {
 	"imx",
 	imx_uart_methods,
 	sizeof(struct imx_uart_softc),
@@ -300,6 +301,18 @@ struct uart_class uart_imx_class = {
 	.uc_rclk = 24000000 /* TODO: get value from CCM */
 };
 
+static struct ofw_compat_data compat_data[] = {
+	{"fsl,imx6q-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx53-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx51-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx31-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx27-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx25-uart",	(uintptr_t)&uart_imx_class},
+	{"fsl,imx21-uart",	(uintptr_t)&uart_imx_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+
 #define	SIGCHG(c, i, s, d)				\
 	if (c) {					\
 		i |= (i & s) ? s : s | d;		\
diff --git a/sys/dev/uart/uart_dev_lpc.c b/sys/dev/uart/uart_dev_lpc.c
index 08cebc9cdff..992e8900893 100644
--- a/sys/dev/uart/uart_dev_lpc.c
+++ b/sys/dev/uart/uart_dev_lpc.c
@@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 
 #include <dev/ic/ns16550.h>
@@ -421,7 +422,7 @@ static kobj_method_t lpc_ns8250_methods[] = {
 	{ 0, 0 }
 };
 
-struct uart_class uart_lpc_class = {
+static struct uart_class uart_lpc_class = {
 	"lpc_ns8250",
 	lpc_ns8250_methods,
 	sizeof(struct lpc_ns8250_softc),
@@ -430,6 +431,12 @@ struct uart_class uart_lpc_class = {
 	.uc_rclk = DEFAULT_RCLK
 };
 
+static struct ofw_compat_data compat_data[] = {
+	{"lpc,uart",		(uintptr_t)&uart_lpc_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+
 #define	SIGCHG(c, i, s, d)				\
 	if (c) {					\
 		i |= (i & s) ? s : s | d;		\
diff --git a/sys/dev/uart/uart_dev_msm.c b/sys/dev/uart/uart_dev_msm.c
index 12dc8a7b63c..114a4158887 100644
--- a/sys/dev/uart/uart_dev_msm.c
+++ b/sys/dev/uart/uart_dev_msm.c
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_dev_msm.h>
 
@@ -558,7 +559,7 @@ msm_bus_ungrab(struct uart_softc *sc)
 	uart_unlock(sc->sc_hwmtx);
 }
 
-struct uart_class uart_msm_class = {
+static struct uart_class uart_msm_class = {
 	"msm",
 	msm_methods,
 	sizeof(struct msm_uart_softc),
@@ -566,3 +567,9 @@ struct uart_class uart_msm_class = {
 	.uc_range = 8,
 	.uc_rclk = DEF_CLK,
 };
+
+static struct ofw_compat_data compat_data[] = {
+	{"qcom,msm-uartdm",	(uintptr_t)&uart_msm_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c
index 89f78402746..190ee29bd9f 100644
--- a/sys/dev/uart/uart_dev_ns8250.c
+++ b/sys/dev/uart/uart_dev_ns8250.c
@@ -45,6 +45,9 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#ifdef FDT
+#include <dev/uart/uart_cpu_fdt.h>
+#endif
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_dev_ns8250.h>
 
@@ -378,6 +381,14 @@ struct uart_class uart_ns8250_class = {
 	.uc_rclk = DEFAULT_RCLK
 };
 
+#ifdef FDT
+static struct ofw_compat_data compat_data[] = {
+	{"ns16550",		(uintptr_t)&uart_ns8250_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+#endif
+
 #define	SIGCHG(c, i, s, d)				\
 	if (c) {					\
 		i |= (i & s) ? s : s | d;		\
diff --git a/sys/dev/uart/uart_dev_pl011.c b/sys/dev/uart/uart_dev_pl011.c
index e8e23d553b2..8443adbc2f3 100644
--- a/sys/dev/uart/uart_dev_pl011.c
+++ b/sys/dev/uart/uart_dev_pl011.c
@@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 #include "uart_if.h"
 
@@ -266,7 +267,7 @@ static kobj_method_t uart_pl011_methods[] = {
 	{ 0, 0 }
 };
 
-struct uart_class uart_pl011_class = {
+static struct uart_class uart_pl011_class = {
 	"uart_pl011",
 	uart_pl011_methods,
 	sizeof(struct uart_pl011_softc),
@@ -275,6 +276,12 @@ struct uart_class uart_pl011_class = {
 	.uc_rclk = 0
 };
 
+static struct ofw_compat_data compat_data[] = {
+	{"arm,pl011",		(uintptr_t)&uart_pl011_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
+
 static int
 uart_pl011_bus_attach(struct uart_softc *sc)
 {
diff --git a/sys/dev/uart/uart_dev_ti8250.c b/sys/dev/uart/uart_dev_ti8250.c
index 12d059a8321..daddbb7cf4d 100644
--- a/sys/dev/uart/uart_dev_ti8250.c
+++ b/sys/dev/uart/uart_dev_ti8250.c
@@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
+#include <dev/uart/uart_cpu_fdt.h>
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_dev_ns8250.h>
 
@@ -130,7 +131,7 @@ static kobj_method_t ti8250_methods[] = {
 	KOBJMETHOD_END
 };
 
-struct uart_class uart_ti8250_class = {
+static struct uart_class uart_ti8250_class = {
 	"ti8250",
 	ti8250_methods,
 	sizeof(struct ti8250_softc),
@@ -138,4 +139,8 @@ struct uart_class uart_ti8250_class = {
 	.uc_range = 0x88,
 	.uc_rclk = 48000000
 };
-
+static struct ofw_compat_data compat_data[] = {
+	{"ti,ns16550",		(uintptr_t)&uart_ti8250_class},
+	{NULL,			(uintptr_t)NULL},
+};
+UART_FDT_CLASS_AND_DEVICE(compat_data);
diff --git a/sys/dev/uart/uart_subr.c b/sys/dev/uart/uart_subr.c
index 7a5df38498f..5516a6cb37f 100644
--- a/sys/dev/uart/uart_subr.c
+++ b/sys/dev/uart/uart_subr.c
@@ -53,7 +53,6 @@ static struct uart_class *uart_classes[] = {
 	&uart_sab82532_class,
 	&uart_z8530_class,
 #if defined(__arm__)
-	&uart_lpc_class,
 	&uart_s3c2410_class,
 #endif
 };
diff --git a/sys/dev/usb/controller/dwc_otg_fdt.c b/sys/dev/usb/controller/dwc_otg_fdt.c
index a6209ffc025..73df72e7823 100644
--- a/sys/dev/usb/controller/dwc_otg_fdt.c
+++ b/sys/dev/usb/controller/dwc_otg_fdt.c
@@ -53,15 +53,11 @@ __FBSDID("$FreeBSD$");
 #include <dev/usb/usb_bus.h>
 
 #include <dev/usb/controller/dwc_otg.h>
+#include <dev/usb/controller/dwc_otg_fdt.h>
 
 static device_probe_t dwc_otg_probe;
-static device_attach_t dwc_otg_attach;
 static device_detach_t dwc_otg_detach;
 
-struct dwc_otg_super_softc {
-	struct dwc_otg_softc sc_otg;	/* must be first */
-};
-
 static int
 dwc_otg_probe(device_t dev)
 {
@@ -74,13 +70,13 @@ dwc_otg_probe(device_t dev)
 
 	device_set_desc(dev, "DWC OTG 2.0 integrated USB controller");
 
-	return (0);
+	return (BUS_PROBE_DEFAULT);
 }
 
-static int
+int
 dwc_otg_attach(device_t dev)
 {
-	struct dwc_otg_super_softc *sc = device_get_softc(dev);
+	struct dwc_otg_fdt_softc *sc = device_get_softc(dev);
 	char usb_mode[24];
 	int err;
 	int rid;
@@ -161,7 +157,7 @@ dwc_otg_attach(device_t dev)
 static int
 dwc_otg_detach(device_t dev)
 {
-	struct dwc_otg_super_softc *sc = device_get_softc(dev);
+	struct dwc_otg_fdt_softc *sc = device_get_softc(dev);
 	device_t bdev;
 	int err;
 
@@ -212,10 +208,10 @@ static device_method_t dwc_otg_methods[] = {
 	DEVMETHOD_END
 };
 
-static driver_t dwc_otg_driver = {
+driver_t dwc_otg_driver = {
 	.name = "dwcotg",
 	.methods = dwc_otg_methods,
-	.size = sizeof(struct dwc_otg_super_softc),
+	.size = sizeof(struct dwc_otg_fdt_softc),
 };
 
 static devclass_t dwc_otg_devclass;
diff --git a/sys/amd64/vmm/vmm_ipi.h b/sys/dev/usb/controller/dwc_otg_fdt.h
similarity index 74%
rename from sys/amd64/vmm/vmm_ipi.h
rename to sys/dev/usb/controller/dwc_otg_fdt.h
index 679d1839fca..9e01118c80d 100644
--- a/sys/amd64/vmm/vmm_ipi.h
+++ b/sys/dev/usb/controller/dwc_otg_fdt.h
@@ -1,6 +1,5 @@
 /*-
- * Copyright (c) 2011 NetApp, Inc.
- * All rights reserved.
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -11,10 +10,10 @@
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
- * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
@@ -26,10 +25,15 @@
  * $FreeBSD$
  */
 
-#ifndef _VMM_IPI_H_
-#define _VMM_IPI_H_
+#ifndef _DWC_OTG_FDT_H_
+#define	_DWC_OTG_FDT_H_
 
-int	vmm_ipi_alloc(void);
-void	vmm_ipi_free(int num);
+struct dwc_otg_fdt_softc {
+	struct dwc_otg_softc sc_otg;	/* must be first */
+};
+
+extern driver_t dwc_otg_driver;
+
+device_attach_t dwc_otg_attach;
 
 #endif
diff --git a/sys/dev/usb/input/uhid.c b/sys/dev/usb/input/uhid.c
index ece5e957330..b0fe3a01284 100644
--- a/sys/dev/usb/input/uhid.c
+++ b/sys/dev/usb/input/uhid.c
@@ -518,7 +518,9 @@ uhid_open(struct usb_fifo *fifo, int fflags)
 	 */
 	if (fflags & FREAD) {
 		/* reset flags */
+		mtx_lock(&sc->sc_mtx);
 		sc->sc_flags &= ~UHID_FLAG_IMMED;
+		mtx_unlock(&sc->sc_mtx);
 
 		if (usb_fifo_alloc_buffer(fifo,
 		    sc->sc_isize + 1, UHID_FRAME_NUM)) {
diff --git a/sys/dev/usb/net/usb_ethernet.c b/sys/dev/usb/net/usb_ethernet.c
index 58b83ff94a0..5350da95044 100644
--- a/sys/dev/usb/net/usb_ethernet.c
+++ b/sys/dev/usb/net/usb_ethernet.c
@@ -155,7 +155,7 @@ ue_sysctl_parent(SYSCTL_HANDLER_ARGS)
 	const char *name;
 
 	name = device_get_nameunit(ue->ue_dev);
-	return SYSCTL_OUT(req, name, strlen(name));
+	return SYSCTL_OUT_STR(req, name);
 }
 
 int
diff --git a/sys/dev/usb/quirk/usb_quirk.c b/sys/dev/usb/quirk/usb_quirk.c
index 6b2f6b8ba6f..e0c5db76769 100644
--- a/sys/dev/usb/quirk/usb_quirk.c
+++ b/sys/dev/usb/quirk/usb_quirk.c
@@ -483,7 +483,8 @@ static struct usb_quirk_entry usb_quirks[USB_DEV_QUIRKS_MAX] = {
 	USB_QUIRK(TOSHIBA, TRANSMEMORY, 0x0000, 0xffff, UQ_MSC_NO_SYNC_CACHE,
 	    UQ_MSC_NO_PREVENT_ALLOW),
 	USB_QUIRK(VIALABS, USB30SATABRIDGE, 0x0000, 0xffff, UQ_MSC_NO_SYNC_CACHE),
-
+	USB_QUIRK(QUALCOMMINC, ZTE_MF730M, 0x0000, 0xffff, UQ_MSC_NO_GETMAXLUN,
+	    UQ_MSC_NO_INQUIRY, UQ_CFG_INDEX_0),
 	/* Non-standard USB MIDI devices */
 	USB_QUIRK(ROLAND, UM1, 0x0000, 0xffff, UQ_AU_VENDOR_CLASS),
 	USB_QUIRK(ROLAND, SC8850, 0x0000, 0xffff, UQ_AU_VENDOR_CLASS),
diff --git a/sys/dev/usb/serial/u3g.c b/sys/dev/usb/serial/u3g.c
index c2d65c790cd..cd4cc1e59f7 100644
--- a/sys/dev/usb/serial/u3g.c
+++ b/sys/dev/usb/serial/u3g.c
@@ -482,6 +482,8 @@ static const STRUCT_USB_HOST_ID u3g_devs[] = {
 	U3G_DEV(QUALCOMMINC, MF626, 0),
 	U3G_DEV(QUALCOMMINC, MF628, 0),
 	U3G_DEV(QUALCOMMINC, MF633R, 0),
+	/* the following is a RNDIS device, no modem features */
+	U3G_DEV(QUALCOMMINC, ZTE_MF730M, U3GINIT_SCSIEJECT),
 	U3G_DEV(QUANTA, GKE, 0),
 	U3G_DEV(QUANTA, GLE, 0),
 	U3G_DEV(QUANTA, GLX, 0),
diff --git a/sys/dev/usb/serial/usb_serial.c b/sys/dev/usb/serial/usb_serial.c
index 1f577a831a9..ae4ed3a4339 100644
--- a/sys/dev/usb/serial/usb_serial.c
+++ b/sys/dev/usb/serial/usb_serial.c
@@ -96,6 +96,11 @@ __FBSDID("$FreeBSD$");
 
 static SYSCTL_NODE(_hw_usb, OID_AUTO, ucom, CTLFLAG_RW, 0, "USB ucom");
 
+static int ucom_pps_mode;
+
+SYSCTL_INT(_hw_usb_ucom, OID_AUTO, pps_mode, CTLFLAG_RWTUN,
+    &ucom_pps_mode, 0, "pulse capturing mode - 0/1/2 - disabled/CTS/DCD");
+
 #ifdef USB_DEBUG
 static int ucom_debug = 0;
 
@@ -409,6 +414,10 @@ ucom_attach_tty(struct ucom_super_softc *ssc, struct ucom_softc *sc)
 
 	sc->sc_tty = tp;
 
+	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
+	sc->sc_pps.mtx = sc->sc_mtx;
+	pps_init(&sc->sc_pps);
+
 	DPRINTF("ttycreate: %s\n", buf);
 
 	/* Check if this device should be a console */
@@ -858,6 +867,8 @@ ucom_ioctl(struct tty *tp, u_long cmd, caddr_t data, struct thread *td)
 		} else {
 			error = ENOIOCTL;
 		}
+		if (error == ENOIOCTL)
+			error = pps_ioctl(cmd, data, &sc->sc_pps);
 		break;
 	}
 	return (error);
@@ -1061,7 +1072,7 @@ ucom_cfg_status_change(struct usb_proc_msg *_task)
 	struct tty *tp;
 	uint8_t new_msr;
 	uint8_t new_lsr;
-	uint8_t onoff;
+	uint8_t msr_delta;
 	uint8_t lsr_delta;
 
 	tp = sc->sc_tty;
@@ -1085,15 +1096,42 @@ ucom_cfg_status_change(struct usb_proc_msg *_task)
 		/* TTY device closed */
 		return;
 	}
-	onoff = ((sc->sc_msr ^ new_msr) & SER_DCD);
+	msr_delta = (sc->sc_msr ^ new_msr);
 	lsr_delta = (sc->sc_lsr ^ new_lsr);
 
 	sc->sc_msr = new_msr;
 	sc->sc_lsr = new_lsr;
 
-	if (onoff) {
+	/*
+	 * Time pulse counting support. Note that both CTS and DCD are
+	 * active-low signals. The status bit is high to indicate that
+	 * the signal on the line is low, which corresponds to a PPS
+	 * clear event.
+	 */
+	switch(ucom_pps_mode) {
+	case 1:
+		if ((sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) &&
+		    (msr_delta & SER_CTS)) {
+			pps_capture(&sc->sc_pps);
+			pps_event(&sc->sc_pps, (sc->sc_msr & SER_CTS) ?
+			    PPS_CAPTURECLEAR : PPS_CAPTUREASSERT);
+		}
+		break;
+	case 2:
+		if ((sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) &&
+		    (msr_delta & SER_DCD)) {
+			pps_capture(&sc->sc_pps);
+			pps_event(&sc->sc_pps, (sc->sc_msr & SER_DCD) ?
+			    PPS_CAPTURECLEAR : PPS_CAPTUREASSERT);
+		}
+		break;
+	default:
+		break;
+	}
 
-		onoff = (sc->sc_msr & SER_DCD) ? 1 : 0;
+	if (msr_delta & SER_DCD) {
+
+		int onoff = (sc->sc_msr & SER_DCD) ? 1 : 0;
 
 		DPRINTF("DCD changed to %d\n", onoff);
 
diff --git a/sys/dev/usb/serial/usb_serial.h b/sys/dev/usb/serial/usb_serial.h
index 8fdf988cae0..d003bf1748c 100644
--- a/sys/dev/usb/serial/usb_serial.h
+++ b/sys/dev/usb/serial/usb_serial.h
@@ -64,6 +64,7 @@
 #include <sys/serial.h>
 #include <sys/fcntl.h>
 #include <sys/sysctl.h>
+#include <sys/timepps.h>
 
 /* Module interface related macros */
 #define	UCOM_MODVER	1
@@ -155,6 +156,8 @@ struct ucom_softc {
 	struct ucom_cfg_task	sc_line_state_task[2];
 	struct ucom_cfg_task	sc_status_task[2];
 	struct ucom_param_task	sc_param_task[2];
+	/* pulse capturing support, PPS */
+	struct pps_state	sc_pps;
 	/* Used to set "UCOM_FLAG_GP_DATA" flag: */
 	struct usb_proc_msg	*sc_last_start_xfer;
 	const struct ucom_callback *sc_callback;
diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs
index d1c73741d73..7959cb46474 100644
--- a/sys/dev/usb/usbdevs
+++ b/sys/dev/usb/usbdevs
@@ -3674,6 +3674,7 @@ product QUALCOMMINC E0086	0x0086	3G modem
 product QUALCOMMINC SURFSTICK	0x0117	1&1 Surf Stick
 product QUALCOMMINC K3772_Z_INIT	0x1179	K3772-Z Initial
 product QUALCOMMINC K3772_Z	0x1181	K3772-Z
+product QUALCOMMINC ZTE_MF730M	0x1420	3G modem
 product QUALCOMMINC MF195E_INIT	0x1514	MF195E initial
 product QUALCOMMINC MF195E	0x1516	MF195E
 product QUALCOMMINC ZTE_STOR	0x2000	USB ZTE Storage
diff --git a/sys/dev/usb/video/udl.c b/sys/dev/usb/video/udl.c
index 71d6fff63c6..10762e1e424 100644
--- a/sys/dev/usb/video/udl.c
+++ b/sys/dev/usb/video/udl.c
@@ -60,15 +60,22 @@
 #define	USB_DEBUG_VAR udl_debug
 #include <dev/usb/usb_debug.h>
 
+static	SYSCTL_NODE(_hw_usb, OID_AUTO, udl, CTLFLAG_RW, 0, "USB UDL");
+
 #ifdef USB_DEBUG
 static int udl_debug = 0;
 
-static	SYSCTL_NODE(_hw_usb, OID_AUTO, udl, CTLFLAG_RW, 0, "USB UDL");
-
 SYSCTL_INT(_hw_usb_udl, OID_AUTO, debug, CTLFLAG_RWTUN,
     &udl_debug, 0, "Debug level");
 #endif
 
+#define	UDL_FPS_MAX	60
+#define	UDL_FPS_MIN	1
+
+static int udl_fps = 25;
+SYSCTL_INT(_hw_usb_udl, OID_AUTO, fps, CTLFLAG_RWTUN,
+    &udl_fps, 0, "Frames Per Second, 1-60");
+
 /*
  * Prototypes.
  */
@@ -206,14 +213,25 @@ udl_callout(void *arg)
 {
 	struct udl_softc *sc = arg;
 	const uint32_t max = udl_get_fb_size(sc);
+	int fps;
 
 	if (sc->sc_power_save == 0) {
+		fps = udl_fps;
+
+	  	/* figure out number of frames per second */
+		if (fps < UDL_FPS_MIN)
+			fps = UDL_FPS_MIN;
+		else if (fps > UDL_FPS_MAX)
+			fps = UDL_FPS_MAX;
+
 		if (sc->sc_sync_off >= max)
 			sc->sc_sync_off = 0;
 		usbd_transfer_start(sc->sc_xfer[UDL_BULK_WRITE_0]);
 		usbd_transfer_start(sc->sc_xfer[UDL_BULK_WRITE_1]);
+	} else {
+		fps = 1;
 	}
-	callout_reset(&sc->sc_callout, hz / 5, &udl_callout, sc);
+	callout_reset(&sc->sc_callout, hz / fps, &udl_callout, sc);
 }
 
 static int
@@ -765,6 +783,10 @@ udl_fbmem_alloc(struct udl_softc *sc)
 	size = udl_get_fb_size(sc);
 	size = round_page(size);
 
+	/*
+	 * It is assumed that allocations above PAGE_SIZE bytes will
+	 * be PAGE_SIZE aligned for use with mmap()
+	 */
 	sc->sc_fb_addr = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
 	sc->sc_fb_copy = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
 	sc->sc_fb_size = size;
diff --git a/sys/dev/virtio/block/virtio_blk.c b/sys/dev/virtio/block/virtio_blk.c
index cfd1148ba66..28a363b88e0 100644
--- a/sys/dev/virtio/block/virtio_blk.c
+++ b/sys/dev/virtio/block/virtio_blk.c
@@ -205,6 +205,7 @@ TUNABLE_INT("hw.vtblk.writecache_mode", &vtblk_writecache_mode);
      VIRTIO_BLK_F_RO			| \
      VIRTIO_BLK_F_BLK_SIZE		| \
      VIRTIO_BLK_F_WCE			| \
+     VIRTIO_BLK_F_TOPOLOGY		| \
      VIRTIO_BLK_F_CONFIG_WCE		| \
      VIRTIO_RING_F_INDIRECT_DESC)
 
diff --git a/sys/dev/virtio/block/virtio_blk.h b/sys/dev/virtio/block/virtio_blk.h
index cdb8d3fde27..8ce6e159b49 100644
--- a/sys/dev/virtio/block/virtio_blk.h
+++ b/sys/dev/virtio/block/virtio_blk.h
@@ -67,7 +67,7 @@ struct virtio_blk_config {
 		uint8_t physical_block_exp;
 		uint8_t alignment_offset;
 		uint16_t min_io_size;
-		uint16_t opt_io_size;
+		uint32_t opt_io_size;
 	} topology;
 
 	/* Writeback mode (if VIRTIO_BLK_F_CONFIG_WCE) */
diff --git a/sys/dev/vt/hw/fb/vt_fb.c b/sys/dev/vt/hw/fb/vt_fb.c
index 5d38cc7dea0..40f56fc097e 100644
--- a/sys/dev/vt/hw/fb/vt_fb.c
+++ b/sys/dev/vt/hw/fb/vt_fb.c
@@ -41,6 +41,9 @@ __FBSDID("$FreeBSD$");
 #include <dev/vt/hw/fb/vt_fb.h>
 #include <dev/vt/colors/vt_termcolors.h>
 
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
 static struct vt_driver vt_fb_driver = {
 	.vd_name = "fb",
 	.vd_init = vt_fb_init,
@@ -136,10 +139,14 @@ vt_fb_mmap(struct vt_device *vd, vm_ooffset_t offset, vm_paddr_t *paddr,
 		return (ENODEV);
 
 	if (offset >= 0 && offset < info->fb_size) {
-		*paddr = info->fb_pbase + offset;
-	#ifdef VM_MEMATTR_WRITE_COMBINING
-		*memattr = VM_MEMATTR_WRITE_COMBINING;
-	#endif
+		if (info->fb_pbase == 0) {
+			*paddr = vtophys((uint8_t *)info->fb_vbase + offset);
+		} else {
+			*paddr = info->fb_pbase + offset;
+#ifdef VM_MEMATTR_WRITE_COMBINING
+			*memattr = VM_MEMATTR_WRITE_COMBINING;
+#endif
+		}
 		return (0);
 	}
 
@@ -425,7 +432,7 @@ vt_fb_init(struct vt_device *vd)
 	if (info->fb_size == 0)
 		return (CN_DEAD);
 
-	if (info->fb_pbase == 0)
+	if (info->fb_pbase == 0 && info->fb_vbase == 0)
 		info->fb_flags |= FB_FLAG_NOMMAP;
 
 	if (info->fb_cmsize <= 0) {
diff --git a/sys/dev/vt/hw/ofwfb/ofwfb.c b/sys/dev/vt/hw/ofwfb/ofwfb.c
index ad5b664a9d7..acad5d4d86c 100644
--- a/sys/dev/vt/hw/ofwfb/ofwfb.c
+++ b/sys/dev/vt/hw/ofwfb/ofwfb.c
@@ -54,6 +54,7 @@ struct ofwfb_softc {
 	phandle_t	sc_node;
 	ihandle_t	sc_handle;
 	bus_space_tag_t	sc_memt;
+	int		iso_palette;
 };
 
 static vd_probe_t	ofwfb_probe;
@@ -73,6 +74,12 @@ static const struct vt_driver vt_ofwfb_driver = {
 	.vd_priority	= VD_PRIORITY_GENERIC+1,
 };
 
+static unsigned char ofw_colors[16] = {
+	/* See "16-color Text Extension" Open Firmware document, page 4 */
+	0, 4, 2, 6, 1, 5, 3, 7,
+	8, 12, 10, 14, 9, 13, 11, 15
+};
+
 static struct ofwfb_softc ofwfb_conssoftc;
 VT_DRIVER_DECLARE(vt_ofwfb, vt_ofwfb_driver);
 
@@ -121,6 +128,11 @@ ofwfb_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw,
 	bgc = sc->fb_cmap[bg];
 	b = m = 0;
 
+	if (((struct ofwfb_softc *)vd->vd_softc)->iso_palette) {
+		fg = ofw_colors[fg];
+		bg = ofw_colors[bg];
+	}
+
 	line = (sc->fb_stride * y) + x * sc->fb_bpp/8;
 	if (mask == NULL && sc->fb_bpp == 8 && (width % 8 == 0)) {
 		/* Don't try to put off screen pixels */
@@ -255,7 +267,7 @@ static void
 ofwfb_initialize(struct vt_device *vd)
 {
 	struct ofwfb_softc *sc = vd->vd_softc;
-	int i;
+	int i, err;
 	cell_t retval;
 	uint32_t oldpix;
 
@@ -263,18 +275,24 @@ ofwfb_initialize(struct vt_device *vd)
 	 * Set up the color map
 	 */
 
+	sc->iso_palette = 0;
 	switch (sc->fb.fb_bpp) {
 	case 8:
 		vt_generate_cons_palette(sc->fb.fb_cmap, COLOR_FORMAT_RGB, 255,
 		    16, 255, 8, 255, 0);
 
 		for (i = 0; i < 16; i++) {
-			OF_call_method("color!", sc->sc_handle, 4, 1,
+			err = OF_call_method("color!", sc->sc_handle, 4, 1,
 			    (cell_t)((sc->fb.fb_cmap[i] >> 16) & 0xff),
 			    (cell_t)((sc->fb.fb_cmap[i] >> 8) & 0xff),
 			    (cell_t)((sc->fb.fb_cmap[i] >> 0) & 0xff),
 			    (cell_t)i, &retval);
+			if (err)
+				break;
 		}
+		if (i != 16)
+			sc->iso_palette = 1;
+				
 		break;
 
 	case 32:
diff --git a/sys/dev/wpi/if_wpi.c b/sys/dev/wpi/if_wpi.c
index 87e8b8b0851..fa1948c09b7 100644
--- a/sys/dev/wpi/if_wpi.c
+++ b/sys/dev/wpi/if_wpi.c
@@ -447,8 +447,6 @@ wpi_attach(device_t dev)
 	ic->ic_cryptocaps =
 		  IEEE80211_CRYPTO_AES_CCM;
 
-	ic->ic_flags |= IEEE80211_F_DATAPAD;
-
 	/*
 	 * Read in the eeprom and also setup the channels for
 	 * net80211. We don't set the rates as net80211 does this for us
@@ -2224,8 +2222,6 @@ wpi_intr(void *arg)
 static int
 wpi_cmd2(struct wpi_softc *sc, struct wpi_buf *buf)
 {
-	struct ifnet *ifp = sc->sc_ifp;
-	struct ieee80211com *ic = ifp->if_l2com;
 	struct ieee80211_frame *wh;
 	struct wpi_tx_cmd *cmd;
 	struct wpi_tx_data *data;
@@ -2233,16 +2229,22 @@ wpi_cmd2(struct wpi_softc *sc, struct wpi_buf *buf)
 	struct wpi_tx_ring *ring;
 	struct mbuf *m1;
 	bus_dma_segment_t *seg, segs[WPI_MAX_SCATTER];
-	int error, i, hdrspace, nsegs, totlen;
+	int error, i, hdrlen, nsegs, totlen, pad;
 
 	WPI_LOCK_ASSERT(sc);
 
 	DPRINTF(sc, WPI_DEBUG_TRACE, TRACE_STR_BEGIN, __func__);
 
 	wh = mtod(buf->m, struct ieee80211_frame *);
-	hdrspace = ieee80211_anyhdrspace(ic, wh);
+	hdrlen = ieee80211_anyhdrsize(wh);
 	totlen = buf->m->m_pkthdr.len;
 
+	if (hdrlen & 3) {
+		/* First segment length must be a multiple of 4. */
+		pad = 4 - (hdrlen & 3);
+	} else
+		pad = 0;
+
 	ring = &sc->txq[buf->ac];
 	desc = &ring->desc[ring->cur];
 	data = &ring->data[ring->cur];
@@ -2257,8 +2259,8 @@ wpi_cmd2(struct wpi_softc *sc, struct wpi_buf *buf)
 	memcpy(cmd->data, buf->data, buf->size);
 
 	/* Save and trim IEEE802.11 header. */
-	memcpy((uint8_t *)(cmd->data + buf->size), wh, hdrspace);
-	m_adj(buf->m, hdrspace);
+	memcpy((uint8_t *)(cmd->data + buf->size), wh, hdrlen);
+	m_adj(buf->m, hdrlen);
 
 	error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, buf->m,
 	    segs, &nsegs, BUS_DMA_NOWAIT);
@@ -2296,10 +2298,10 @@ wpi_cmd2(struct wpi_softc *sc, struct wpi_buf *buf)
 	    __func__, ring->qid, ring->cur, totlen, nsegs);
 
 	/* Fill TX descriptor. */
-	desc->nsegs = WPI_PAD32(totlen) << 4 | (1 + nsegs);
+	desc->nsegs = WPI_PAD32(totlen + pad) << 4 | (1 + nsegs);
 	/* First DMA segment is used by the TX command. */
 	desc->segs[0].addr = htole32(data->cmd_paddr);
-	desc->segs[0].len  = htole32(4 + buf->size + hdrspace);
+	desc->segs[0].len  = htole32(4 + buf->size + hdrlen + pad);
 	/* Other DMA segments are for data payload. */
 	seg = &segs[0];
 	for (i = 1; i <= nsegs; i++) {
@@ -2345,10 +2347,9 @@ wpi_tx_data(struct wpi_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 	uint32_t flags;
 	uint16_t qos;
 	uint8_t tid, type;
-	int ac, error, rate, ismcast, hdrlen, totlen;
+	int ac, error, rate, ismcast, totlen;
 
 	wh = mtod(m, struct ieee80211_frame *);
-	hdrlen = ieee80211_anyhdrsize(wh);
 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
 
@@ -2392,12 +2393,12 @@ wpi_tx_data(struct wpi_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 		/* 802.11 header may have moved. */
 		wh = mtod(m, struct ieee80211_frame *);
 	}
-	totlen = m->m_pkthdr.len - (hdrlen & 3);
+	totlen = m->m_pkthdr.len;
 
 	if (ieee80211_radiotap_active_vap(vap)) {
 		struct wpi_tx_radiotap_header *tap = &sc->sc_txtap;
 
-		tap->wt_flags = IEEE80211_RADIOTAP_F_DATAPAD;
+		tap->wt_flags = 0;
 		tap->wt_rate = rate;
 		if (k != NULL)
 			tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
@@ -2514,12 +2515,11 @@ wpi_tx_data_raw(struct wpi_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
 	struct wpi_buf tx_data;
 	uint32_t flags;
 	uint8_t type;
-	int ac, rate, hdrlen, totlen;
+	int ac, rate, totlen;
 
 	wh = mtod(m, struct ieee80211_frame *);
-	hdrlen = ieee80211_anyhdrsize(wh);
 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
-	totlen = m->m_pkthdr.len - (hdrlen & 3);
+	totlen = m->m_pkthdr.len;
 
 	ac = params->ibp_pri & 3;
 
@@ -2541,8 +2541,6 @@ wpi_tx_data_raw(struct wpi_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
 
 		tap->wt_flags = 0;
 		tap->wt_rate = rate;
-		if (params->ibp_flags & IEEE80211_BPF_DATAPAD)
-			tap->wt_flags |= IEEE80211_RADIOTAP_F_DATAPAD;
 
 		ieee80211_radiotap_tx(vap, m);
 	}
@@ -2926,7 +2924,7 @@ wpi_add_node(struct wpi_softc *sc, struct ieee80211_node *ni)
 		return EINVAL;
 
 	memset(&node, 0, sizeof node);
-	IEEE80211_ADDR_COPY(node.macaddr, ni->ni_bssid);
+	IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
 	node.id = wn->id;
 	node.plcp = (ic->ic_curmode == IEEE80211_MODE_11A) ?
 	    wpi_ridx_to_plcp[WPI_RIDX_OFDM6] : wpi_ridx_to_plcp[WPI_RIDX_CCK1];
@@ -2993,7 +2991,7 @@ wpi_del_node(struct wpi_softc *sc, struct ieee80211_node *ni)
 	}
 
 	memset(&node, 0, sizeof node);
-	IEEE80211_ADDR_COPY(node.macaddr, ni->ni_bssid);
+	IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
 	node.count = 1;
 
 	error = wpi_cmd(sc, WPI_CMD_DEL_NODE, &node, sizeof node, 1);
@@ -3404,6 +3402,7 @@ wpi_config(struct wpi_softc *sc)
 {
 	struct ifnet *ifp = sc->sc_ifp;
 	struct ieee80211com *ic = ifp->if_l2com;
+	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	uint32_t flags;
 	int error;
 
@@ -3425,7 +3424,7 @@ wpi_config(struct wpi_softc *sc)
 
 	/* Configure adapter. */
 	memset(&sc->rxon, 0, sizeof (struct wpi_rxon));
-	IEEE80211_ADDR_COPY(sc->rxon.myaddr, IF_LLADDR(ifp));
+	IEEE80211_ADDR_COPY(sc->rxon.myaddr, vap->iv_myaddr);
 
 	/* Set default channel. */
 	sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
@@ -3559,6 +3558,7 @@ wpi_scan(struct wpi_softc *sc, struct ieee80211_channel *c)
 	struct ifnet *ifp = sc->sc_ifp;
 	struct ieee80211com *ic = ifp->if_l2com;
 	struct ieee80211_scan_state *ss = ic->ic_scan;
+	struct ieee80211vap *vap = ss->ss_vap;
 	struct wpi_scan_hdr *hdr;
 	struct wpi_cmd_data *tx;
 	struct wpi_scan_essid *essids;
@@ -3645,7 +3645,7 @@ wpi_scan(struct wpi_softc *sc, struct ieee80211_channel *c)
 		IEEE80211_FC0_SUBTYPE_PROBE_REQ;
 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
 	IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
-	IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
+	IEEE80211_ADDR_COPY(wh->i_addr2, vap->iv_myaddr);
 	IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
 	*(uint16_t *)&wh->i_dur[0] = 0;	/* filled by h/w */
 	*(uint16_t *)&wh->i_seq[0] = 0;	/* filled by h/w */
diff --git a/sys/geom/mirror/g_mirror.c b/sys/geom/mirror/g_mirror.c
index 2fae439c99f..89fb9c0fe67 100644
--- a/sys/geom/mirror/g_mirror.c
+++ b/sys/geom/mirror/g_mirror.c
@@ -1020,6 +1020,23 @@ g_mirror_sync_done(struct bio *bp)
 	wakeup(sc);
 }
 
+static void
+g_mirror_candelete(struct bio *bp)
+{
+	struct g_mirror_softc *sc;
+	struct g_mirror_disk *disk;
+	int *val;
+
+	sc = bp->bio_to->geom->softc;
+	LIST_FOREACH(disk, &sc->sc_disks, d_next) {
+		if (disk->d_flags & G_MIRROR_DISK_FLAG_CANDELETE)
+			break;
+	}
+	val = (int *)bp->bio_data;
+	*val = (disk != NULL);
+	g_io_deliver(bp, 0);
+}
+
 static void
 g_mirror_kernel_dump(struct bio *bp)
 {
@@ -1114,9 +1131,10 @@ g_mirror_start(struct bio *bp)
 		g_mirror_flush(sc, bp);
 		return;
 	case BIO_GETATTR:
-		if (g_handleattr_int(bp, "GEOM::candelete", 1))
+		if (!strcmp(bp->bio_attribute, "GEOM::candelete")) {
+			g_mirror_candelete(bp);
 			return;
-		else if (strcmp("GEOM::kerneldump", bp->bio_attribute) == 0) {
+		} else if (strcmp("GEOM::kerneldump", bp->bio_attribute) == 0) {
 			g_mirror_kernel_dump(bp);
 			return;
 		}
@@ -1680,6 +1698,10 @@ g_mirror_register_request(struct bio *bp)
 			    ("Consumer %s not opened (r%dw%de%d).",
 			    cp->provider->name, cp->acr, cp->acw, cp->ace));
 		}
+		if (bioq_first(&queue) == NULL) {
+			g_io_deliver(bp, EOPNOTSUPP);
+			return;
+		}
 		while ((cbp = bioq_takefirst(&queue)) != NULL) {
 			G_MIRROR_LOGREQ(3, cbp, "Sending request.");
 			cp = cbp->bio_caller1;
diff --git a/sys/geom/part/g_part.c b/sys/geom/part/g_part.c
index 58082367b03..ac58b6743db 100644
--- a/sys/geom/part/g_part.c
+++ b/sys/geom/part/g_part.c
@@ -70,6 +70,7 @@ struct g_part_alias_list {
 	enum g_part_alias alias;
 } g_part_alias_list[G_PART_ALIAS_COUNT] = {
 	{ "apple-boot", G_PART_ALIAS_APPLE_BOOT },
+	{ "apple-core-storage", G_PART_ALIAS_APPLE_CORE_STORAGE },
 	{ "apple-hfs", G_PART_ALIAS_APPLE_HFS },
 	{ "apple-label", G_PART_ALIAS_APPLE_LABEL },
 	{ "apple-raid", G_PART_ALIAS_APPLE_RAID },
diff --git a/sys/geom/part/g_part.h b/sys/geom/part/g_part.h
index d2c2d231994..39b7f952a7a 100644
--- a/sys/geom/part/g_part.h
+++ b/sys/geom/part/g_part.h
@@ -85,6 +85,7 @@ enum g_part_alias {
 	G_PART_ALIAS_DFBSD_HAMMER,	/* A DfBSD HAMMER FS partition entry */
 	G_PART_ALIAS_DFBSD_HAMMER2,	/* A DfBSD HAMMER2 FS partition entry */
 	G_PART_ALIAS_PREP_BOOT,		/* A PREP/CHRP boot partition entry. */
+	G_PART_ALIAS_APPLE_CORE_STORAGE,/* An Apple Core Storage partition. */
 	/* Keep the following last */
 	G_PART_ALIAS_COUNT
 };
diff --git a/sys/geom/part/g_part_gpt.c b/sys/geom/part/g_part_gpt.c
index 5e04d93f29e..81ddfa27d82 100644
--- a/sys/geom/part/g_part_gpt.c
+++ b/sys/geom/part/g_part_gpt.c
@@ -146,6 +146,8 @@ static struct g_part_scheme g_part_gpt_scheme = {
 G_PART_SCHEME_DECLARE(g_part_gpt);
 
 static struct uuid gpt_uuid_apple_boot = GPT_ENT_TYPE_APPLE_BOOT;
+static struct uuid gpt_uuid_apple_core_storage =
+    GPT_ENT_TYPE_APPLE_CORE_STORAGE;
 static struct uuid gpt_uuid_apple_hfs = GPT_ENT_TYPE_APPLE_HFS;
 static struct uuid gpt_uuid_apple_label = GPT_ENT_TYPE_APPLE_LABEL;
 static struct uuid gpt_uuid_apple_raid = GPT_ENT_TYPE_APPLE_RAID;
@@ -198,6 +200,7 @@ static struct g_part_uuid_alias {
 	int mbrtype;
 } gpt_uuid_alias_match[] = {
 	{ &gpt_uuid_apple_boot,		G_PART_ALIAS_APPLE_BOOT,	 0xab },
+	{ &gpt_uuid_apple_core_storage,	G_PART_ALIAS_APPLE_CORE_STORAGE, 0 },
 	{ &gpt_uuid_apple_hfs,		G_PART_ALIAS_APPLE_HFS,		 0xaf },
 	{ &gpt_uuid_apple_label,	G_PART_ALIAS_APPLE_LABEL,	 0 },
 	{ &gpt_uuid_apple_raid,		G_PART_ALIAS_APPLE_RAID,	 0 },
diff --git a/sys/gnu/dts/arm/alphascale-asm9260-devkit.dts b/sys/gnu/dts/arm/alphascale-asm9260-devkit.dts
deleted file mode 100644
index c77e2c902fb..00000000000
--- a/sys/gnu/dts/arm/alphascale-asm9260-devkit.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
- *
- * Licensed under the X11 license or the GPL v2 (or later)
- */
-
-/dts-v1/;
-#include "alphascale-asm9260.dtsi"
-
-/ {
-	model = "Alphascale asm9260 Development Kit";
-	compatible = "alphascale,asm9260devkit", "alphascale,asm9260";
-};
diff --git a/sys/gnu/dts/arm/alphascale-asm9260.dtsi b/sys/gnu/dts/arm/alphascale-asm9260.dtsi
deleted file mode 100644
index 907fc7bfc41..00000000000
--- a/sys/gnu/dts/arm/alphascale-asm9260.dtsi
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
- *
- * Licensed under the X11 license or the GPL v2 (or later)
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/alphascale,asm9260.h>
-
-/ {
-	interrupt-parent = <&icoll>;
-
-	memory {
-		device_type = "memory";
-		reg = <0x20000000 0x2000000>;
-	};
-
-	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
-			compatible = "arm,arm926ej-s";
-			device_type = "cpu";
-			clocks = <&acc CLKID_SYS_CPU>;
-		};
-	};
-
-	osc24m: oscillator {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-accuracy = <30000>;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
-		acc: clock-controller@80040000 {
-			compatible = "alphascale,asm9260-clock-controller";
-			#clock-cells = <1>;
-			clocks = <&osc24m>;
-			reg = <0x80040000 0x204>;
-		};
-
-		icoll: interrupt-controller@80054000 {
-			compatible = "alphascale,asm9260-icoll";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			reg = <0x80054000 0x200>;
-		};
-
-		timer0: timer@80088000 {
-			compatible = "alphascale,asm9260-timer";
-			reg = <0x80088000 0x4000>;
-			clocks = <&acc CLKID_AHB_TIMER0>;
-			interrupts = <29>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/axm5516-amarillo.dts b/sys/gnu/dts/arm/axm5516-amarillo.dts
deleted file mode 100644
index a9d60471d9f..00000000000
--- a/sys/gnu/dts/arm/axm5516-amarillo.dts
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * arch/arm/boot/dts/axm5516-amarillo.dts
- *
- * Copyright (C) 2013 LSI
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-/dts-v1/;
-
-/memreserve/ 0x00000000 0x00400000;
-
-#include "axm55xx.dtsi"
-#include "axm5516-cpus.dtsi"
-
-/ {
-	model = "Amarillo AXM5516";
-	compatible = "lsi,axm5516-amarillo", "lsi,axm5516";
-
-	memory {
-		device_type = "memory";
-		reg = <0 0x00000000 0x02 0x00000000>;
-	};
-};
-
-&serial0 {
-	status = "okay";
-};
-
-&serial1 {
-	status = "okay";
-};
-
-&serial2 {
-	status = "okay";
-};
-
-&serial3 {
-	status = "okay";
-};
-
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/axm55xx.dtsi b/sys/gnu/dts/arm/axm55xx.dtsi
deleted file mode 100644
index ea288f0a1d3..00000000000
--- a/sys/gnu/dts/arm/axm55xx.dtsi
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * arch/arm/boot/dts/axm55xx.dtsi
- *
- * Copyright (C) 2013 LSI
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/lsi,axm5516-clks.h>
-
-#include "skeleton64.dtsi"
-
-/ {
-	interrupt-parent = <&gic>;
-
-	aliases {
-		serial0	  = &serial0;
-		serial1   = &serial1;
-		serial2	  = &serial2;
-		serial3	  = &serial3;
-		timer	  = &timer0;
-	};
-
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-
-		clk_ref0: clk_ref0 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <125000000>;
-		};
-
-		clk_ref1: clk_ref1 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <125000000>;
-		};
-
-		clk_ref2: clk_ref2 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <125000000>;
-		};
-
-		clks: clock-controller@2010020000 {
-			compatible = "lsi,axm5516-clks";
-			#clock-cells = <1>;
-			reg = <0x20 0x10020000 0 0x20000>;
-		};
-	};
-
-	gic: interrupt-controller@2001001000 {
-		compatible = "arm,cortex-a15-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <0>;
-		interrupt-controller;
-		reg = <0x20 0x01001000 0 0x1000>,
-		      <0x20 0x01002000 0 0x1000>,
-		      <0x20 0x01004000 0 0x2000>,
-		      <0x20 0x01006000 0 0x2000>;
-		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
-				IRQ_TYPE_LEVEL_HIGH)>;
-	};
-
-	timer {
-		compatible = "arm,armv7-timer";
-		interrupts =
-			<GIC_PPI 13
-				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			<GIC_PPI 14
-				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			<GIC_PPI 11
-				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			<GIC_PPI 10
-				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-	};
-
-
-	pmu {
-		compatible = "arm,cortex-a15-pmu";
-		interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-	soc {
-		compatible = "simple-bus";
-		device_type = "soc";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		interrupt-parent = <&gic>;
-		ranges;
-
-		syscon: syscon@2010030000 {
-			compatible = "lsi,axxia-syscon", "syscon";
-			reg = <0x20 0x10030000 0 0x2000>;
-		};
-
-		reset: reset@2010031000 {
-			compatible = "lsi,axm55xx-reset";
-			syscon = <&syscon>;
-		};
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
-
-			serial0: uart@2010080000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x20 0x10080000 0 0x1000>;
-				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-
-			serial1: uart@2010081000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x20 0x10081000 0 0x1000>;
-				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-
-			serial2: uart@2010082000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x20 0x10082000 0 0x1000>;
-				interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-
-			serial3: uart@2010083000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x20 0x10083000 0 0x1000>;
-				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-
-			timer0: timer@2010091000 {
-				compatible = "arm,sp804", "arm,primecell";
-				reg = <0x20 0x10091000 0 0x1000>;
-				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "okay";
-			};
-
-			gpio0: gpio@2010092000 {
-				#gpio-cells = <2>;
-				compatible = "arm,pl061", "arm,primecell";
-				gpio-controller;
-				reg = <0x20 0x10092000 0x00 0x1000>;
-				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-
-			gpio1: gpio@2010093000 {
-				#gpio-cells = <2>;
-				compatible = "arm,pl061", "arm,primecell";
-				gpio-controller;
-				reg = <0x20 0x10093000 0x00 0x1000>;
-				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks AXXIA_CLK_PER>;
-				clock-names = "apb_pclk";
-				status = "disabled";
-			};
-		};
-	};
-};
-
-/*
-  Local Variables:
-  mode: C
-  End:
-*/
diff --git a/sys/gnu/dts/arm/exynos5250-snow.dts b/sys/gnu/dts/arm/exynos5250-snow.dts
deleted file mode 100644
index b9aeec43052..00000000000
--- a/sys/gnu/dts/arm/exynos5250-snow.dts
+++ /dev/null
@@ -1,651 +0,0 @@
-/*
- * Google Snow board device tree source
- *
- * Copyright (c) 2012 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/maxim,max77686.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/input/input.h>
-#include "exynos5250.dtsi"
-
-/ {
-	model = "Google Snow";
-	compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5";
-
-	aliases {
-		i2c104 = &i2c_104;
-	};
-
-	memory {
-		reg = <0x40000000 0x80000000>;
-	};
-
-	chosen {
-		bootargs = "console=tty1";
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-names = "default";
-		pinctrl-0 = <&power_key_irq &lid_irq>;
-
-		power {
-			label = "Power";
-			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_POWER>;
-			gpio-key,wakeup;
-		};
-
-		lid-switch {
-			label = "Lid";
-			gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
-			linux,input-type = <5>; /* EV_SW */
-			linux,code = <0>; /* SW_LID */
-			debounce-interval = <1>;
-			gpio-key,wakeup;
-		};
-	};
-
-	vbat: vbat-fixed-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vbat-supply";
-		regulator-boot-on;
-	};
-
-	i2c-arbitrator {
-		compatible = "i2c-arb-gpio-challenge";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c-parent = <&{/i2c@12CA0000}>;
-
-		our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
-		their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
-		slew-delay-us = <10>;
-		wait-retry-us = <3000>;
-		wait-free-us = <50000>;
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&arb_our_claim &arb_their_claim>;
-
-		/* Use ID 104 as a hint that we're on physical bus 4 */
-		i2c_104: i2c@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			battery: sbs-battery@b {
-				compatible = "sbs,sbs-battery";
-				reg = <0xb>;
-				sbs,poll-retry-count = <1>;
-			};
-
-			cros_ec: embedded-controller {
-				compatible = "google,cros-ec-i2c";
-				reg = <0x1e>;
-				interrupts = <6 IRQ_TYPE_NONE>;
-				interrupt-parent = <&gpx1>;
-				pinctrl-names = "default";
-				pinctrl-0 = <&ec_irq>;
-				wakeup-source;
-			};
-
-			power-regulator {
-				compatible = "ti,tps65090";
-				reg = <0x48>;
-
-				/*
-				 * Config irq to disable internal pulls
-				 * even though we run in polling mode.
-				 */
-				pinctrl-names = "default";
-				pinctrl-0 = <&tps65090_irq>;
-
-				vsys1-supply = <&vbat>;
-				vsys2-supply = <&vbat>;
-				vsys3-supply = <&vbat>;
-				infet1-supply = <&vbat>;
-				infet2-supply = <&vbat>;
-				infet3-supply = <&vbat>;
-				infet4-supply = <&vbat>;
-				infet5-supply = <&vbat>;
-				infet6-supply = <&vbat>;
-				infet7-supply = <&vbat>;
-				vsys-l1-supply = <&vbat>;
-				vsys-l2-supply = <&vbat>;
-
-				regulators {
-					dcdc1 {
-						ti,enable-ext-control;
-					};
-					dcdc2 {
-						ti,enable-ext-control;
-					};
-					dcdc3 {
-						ti,enable-ext-control;
-					};
-					fet1: fet1 {
-						regulator-name = "vcd_led";
-						ti,overcurrent-wait = <3>;
-					};
-					tps65090_fet2: fet2 {
-						regulator-name = "video_mid";
-						regulator-always-on;
-						ti,overcurrent-wait = <3>;
-					};
-					fet3 {
-						regulator-name = "wwan_r";
-						regulator-always-on;
-						ti,overcurrent-wait = <3>;
-					};
-					fet4 {
-						regulator-name = "sdcard";
-						ti,overcurrent-wait = <3>;
-					};
-					fet5 {
-						regulator-name = "camout";
-						regulator-always-on;
-						ti,overcurrent-wait = <3>;
-					};
-					fet6: fet6 {
-						regulator-name = "lcd_vdd";
-						ti,overcurrent-wait = <3>;
-					};
-					tps65090_fet7: fet7 {
-						regulator-name = "video_mid_1a";
-						regulator-always-on;
-						ti,overcurrent-wait = <3>;
-					};
-					ldo1 {
-					};
-					ldo2 {
-					};
-				};
-
-				charger {
-					compatible = "ti,tps65090-charger";
-				};
-			};
-		};
-	};
-
-	i2c@12CD0000 {
-		ptn3460: lvds-bridge@20 {
-			compatible = "nxp,ptn3460";
-			reg = <0x20>;
-			powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>;
-			reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
-			edid-emulation = <5>;
-			panel = <&panel>;
-		};
-	};
-
-	sound {
-		compatible = "google,snow-audio-max98095";
-
-		samsung,model = "Snow-I2S-MAX98095";
-		samsung,i2s-controller = <&i2s0>;
-		samsung,audio-codec = <&max98095>;
-	};
-
-	usb3_vbus_reg: regulator-usb3 {
-		compatible = "regulator-fixed";
-		regulator-name = "P5.0V_USB3CON";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb3_vbus_en>;
-		enable-active-high;
-	};
-
-	fixed-rate-clocks {
-		xxti {
-			compatible = "samsung,clock-xxti";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		pwms = <&pwm 0 1000000 0>;
-		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
-		default-brightness-level = <7>;
-		enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
-		power-supply = <&fet1>;
-		pinctrl-0 = <&pwm0_out>;
-		pinctrl-names = "default";
-	};
-
-	panel: panel {
-		compatible = "auo,b116xw03";
-		power-supply = <&fet6>;
-		backlight = <&backlight>;
-	};
-};
-
-&dp {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&dp_hpd>;
-	samsung,color-space = <0>;
-	samsung,dynamic-range = <0>;
-	samsung,ycbcr-coeff = <0>;
-	samsung,color-depth = <1>;
-	samsung,link-rate = <0x0a>;
-	samsung,lane-count = <2>;
-	samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
-	bridge = <&ptn3460>;
-};
-
-&ehci {
-	samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
-};
-
-&fimd {
-	status = "okay";
-	samsung,invert-vclk;
-};
-
-&hdmi {
-	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&hdmi_hpd_irq>;
-	phy = <&hdmiphy>;
-	ddc = <&i2c_2>;
-	hdmi-en-supply = <&tps65090_fet7>;
-	vdd-supply = <&ldo8_reg>;
-	vdd_osc-supply = <&ldo10_reg>;
-	vdd_pll-supply = <&ldo8_reg>;
-};
-
-&i2c_0 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <378000>;
-
-	max77686: max77686@09 {
-		compatible = "maxim,max77686";
-		interrupt-parent = <&gpx3>;
-		interrupts = <2 IRQ_TYPE_NONE>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&max77686_irq>;
-		wakeup-source;
-		reg = <0x09>;
-		#clock-cells = <1>;
-
-		voltage-regulators {
-			ldo1_reg: LDO1 {
-				regulator-name = "P1.0V_LDO_OUT1";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-			};
-
-			ldo2_reg: LDO2 {
-				regulator-name = "P1.8V_LDO_OUT2";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo3_reg: LDO3 {
-				regulator-name = "P1.8V_LDO_OUT3";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo7_reg: LDO7 {
-				regulator-name = "P1.1V_LDO_OUT7";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-			};
-
-			ldo8_reg: LDO8 {
-				regulator-name = "P1.0V_LDO_OUT8";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-			};
-
-			ldo10_reg: LDO10 {
-				regulator-name = "P1.8V_LDO_OUT10";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo12_reg: LDO12 {
-				regulator-name = "P3.0V_LDO_OUT12";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-			};
-
-			ldo14_reg: LDO14 {
-				regulator-name = "P1.8V_LDO_OUT14";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo15_reg: LDO15 {
-				regulator-name = "P1.0V_LDO_OUT15";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-			};
-
-			ldo16_reg: LDO16 {
-				regulator-name = "P1.8V_LDO_OUT16";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			buck1_reg: BUCK1 {
-				regulator-name = "vdd_mif";
-				regulator-min-microvolt = <950000>;
-				regulator-max-microvolt = <1300000>;
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			buck2_reg: BUCK2 {
-				regulator-name = "vdd_arm";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			buck3_reg: BUCK3 {
-				regulator-name = "vdd_int";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1200000>;
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			buck4_reg: BUCK4 {
-				regulator-name = "vdd_g3d";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <1300000>;
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			buck5_reg: BUCK5 {
-				regulator-name = "P1.8V_BUCK_OUT5";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			buck6_reg: BUCK6 {
-				regulator-name = "P1.35V_BUCK_OUT6";
-				regulator-min-microvolt = <1350000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-always-on;
-			};
-
-			buck7_reg: BUCK7 {
-				regulator-name = "P2.0V_BUCK_OUT7";
-				regulator-min-microvolt = <2000000>;
-				regulator-max-microvolt = <2000000>;
-				regulator-always-on;
-			};
-
-			buck8_reg: BUCK8 {
-				regulator-name = "P2.85V_BUCK_OUT8";
-				regulator-min-microvolt = <2850000>;
-				regulator-max-microvolt = <2850000>;
-				regulator-always-on;
-			};
-		};
-	};
-};
-
-&i2c_1 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <378000>;
-
-	trackpad {
-		reg = <0x67>;
-		compatible = "cypress,cyapa";
-		interrupts = <2 IRQ_TYPE_NONE>;
-		interrupt-parent = <&gpx1>;
-		wakeup-source;
-	};
-};
-
-/*
- * Disabled pullups since external part has its own pullups and
- * double-pulling gets us out of spec in some cases.
- */
-&i2c2_bus {
-	samsung,pin-pud = <0>;
-};
-
-&i2c_2 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-
-	hdmiddc@50 {
-		compatible = "samsung,exynos4210-hdmiddc";
-		reg = <0x50>;
-	};
-};
-
-&i2c_3 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-};
-
-&i2c_4 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-};
-
-&i2c_5 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-};
-
-&i2c_7 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-
-	max98095: codec@11 {
-		compatible = "maxim,max98095";
-		reg = <0x11>;
-		pinctrl-0 = <&max98095_en>;
-		pinctrl-names = "default";
-	};
-};
-
-&i2c_8 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <378000>;
-
-	hdmiphy: hdmiphy@38 {
-		compatible = "samsung,exynos4212-hdmiphy";
-		reg = <0x38>;
-	};
-};
-
-&i2s0 {
-	status = "okay";
-};
-
-&mmc_0 {
-	status = "okay";
-	num-slots = <1>;
-	broken-cd;
-	card-detect-delay = <200>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <2 3>;
-	samsung,dw-mshc-ddr-timing = <1 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
-	bus-width = <8>;
-	cap-mmc-highspeed;
-};
-
-&mmc_2 {
-	status = "okay";
-	num-slots = <1>;
-	card-detect-delay = <200>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <2 3>;
-	samsung,dw-mshc-ddr-timing = <1 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
-	bus-width = <4>;
-	wp-gpios = <&gpc2 1 GPIO_ACTIVE_HIGH>;
-	cap-sd-highspeed;
-};
-
-/*
- * On Snow we've got SIP WiFi and so can keep drive strengths low to
- * reduce EMI.
- */
-&mmc_3 {
-	status = "okay";
-	num-slots = <1>;
-	broken-cd;
-	card-detect-delay = <200>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <2 3>;
-	samsung,dw-mshc-ddr-timing = <1 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
-	bus-width = <4>;
-	cap-sd-highspeed;
-};
-
-&pinctrl_0 {
-	power_key_irq: power-key-irq {
-		samsung,pins = "gpx1-3";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	ec_irq: ec-irq {
-		samsung,pins = "gpx1-6";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	max98095_en: max98095-en {
-		samsung,pins = "gpx1-7";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
-	};
-
-	tps65090_irq: tps65090-irq {
-		samsung,pins = "gpx2-6";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	usb3_vbus_en: usb3-vbus-en {
-		samsung,pins = "gpx2-7";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	max77686_irq: max77686-irq {
-		samsung,pins = "gpx3-2";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	lid_irq: lid-irq {
-		samsung,pins = "gpx3-5";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	hdmi_hpd_irq: hdmi-hpd-irq {
-		samsung,pins = "gpx3-7";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&pinctrl_1 {
-	arb_their_claim: arb-their-claim {
-		samsung,pins = "gpe0-4";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
-	};
-
-	arb_our_claim: arb-our-claim {
-		samsung,pins = "gpf0-3";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&rtc {
-	status = "okay";
-	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
-	clock-names = "rtc", "rtc_src";
-};
-
-&sd3_bus4 {
-	samsung,pin-drv = <0>;
-};
-
-&sd3_clk {
-	samsung,pin-drv = <0>;
-};
-
-&sd3_cmd {
-	samsung,pin-pud = <3>;
-	samsung,pin-drv = <0>;
-};
-
-&spi_1 {
-	status = "okay";
-	samsung,spi-src-clk = <0>;
-	num-cs = <1>;
-};
-
-&usbdrd_dwc3 {
-	dr_mode = "host";
-};
-
-&usbdrd_phy {
-	vbus-supply = <&usb3_vbus_reg>;
-};
-
-#include "cros-ec-keyboard.dtsi"
diff --git a/sys/gnu/dts/arm/exynos5420-peach-pit.dts b/sys/gnu/dts/arm/exynos5420-peach-pit.dts
deleted file mode 100644
index c47bb70665c..00000000000
--- a/sys/gnu/dts/arm/exynos5420-peach-pit.dts
+++ /dev/null
@@ -1,968 +0,0 @@
-/*
- * Google Peach Pit Rev 6+ board device tree source
- *
- * Copyright (c) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clock/maxim,max77802.h>
-#include <dt-bindings/regulator/maxim,max77802.h>
-#include "exynos5420.dtsi"
-
-/ {
-	model = "Google Peach Pit Rev 6+";
-
-	compatible = "google,pit-rev16",
-		"google,pit-rev15", "google,pit-rev14",
-		"google,pit-rev13", "google,pit-rev12",
-		"google,pit-rev11", "google,pit-rev10",
-		"google,pit-rev9", "google,pit-rev8",
-		"google,pit-rev7", "google,pit-rev6",
-		"google,pit", "google,peach","samsung,exynos5420",
-		"samsung,exynos5";
-
-	aliases {
-		/* Assign 20 so we don't get confused w/ builtin ones */
-		i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		pwms = <&pwm 0 1000000 0>;
-		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
-		default-brightness-level = <7>;
-		power-supply = <&tps65090_fet1>;
-		pinctrl-0 = <&pwm0_out>;
-		pinctrl-names = "default";
-	};
-
-	fixed-rate-clocks {
-		oscclk {
-			compatible = "samsung,exynos5420-oscclk";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&power_key_irq &lid_irq>;
-
-		power {
-			label = "Power";
-			gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_POWER>;
-			gpio-key,wakeup;
-		};
-
-		lid-switch {
-			label = "Lid";
-			gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
-			linux,input-type = <5>; /* EV_SW */
-			linux,code = <0>; /* SW_LID */
-			debounce-interval = <1>;
-			gpio-key,wakeup;
-		};
-	};
-
-	memory {
-		reg = <0x20000000 0x80000000>;
-	};
-
-	sound {
-		compatible = "google,snow-audio-max98090";
-
-		samsung,model = "Peach-Pit-I2S-MAX98090";
-		samsung,i2s-controller = <&i2s0>;
-		samsung,audio-codec = <&max98090>;
-	};
-
-	usb300_vbus_reg: regulator-usb300 {
-		compatible = "regulator-fixed";
-		regulator-name = "P5.0V_USB3CON0";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gph0 0 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb300_vbus_en>;
-		enable-active-high;
-	};
-
-	usb301_vbus_reg: regulator-usb301 {
-		compatible = "regulator-fixed";
-		regulator-name = "P5.0V_USB3CON1";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gph0 1 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb301_vbus_en>;
-		enable-active-high;
-	};
-
-	vbat: fixed-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vbat-supply";
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	panel: panel {
-		compatible = "auo,b116xw03";
-		power-supply = <&tps65090_fet6>;
-		backlight = <&backlight>;
-	};
-};
-
-&adc {
-	status = "okay";
-	vdd-supply = <&ldo9_reg>;
-};
-
-&dp {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&dp_hpd_gpio>;
-	samsung,color-space = <0>;
-	samsung,dynamic-range = <0>;
-	samsung,ycbcr-coeff = <0>;
-	samsung,color-depth = <1>;
-	samsung,link-rate = <0x06>;
-	samsung,lane-count = <2>;
-	samsung,hpd-gpio = <&gpx2 6 0>;
-	bridge = <&ps8625>;
-};
-
-&fimd {
-	status = "okay";
-	samsung,invert-vclk;
-};
-
-&hdmi {
-	status = "okay";
-	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&hdmi_hpd_irq>;
-	ddc = <&i2c_2>;
-
-	hdmi-en-supply = <&tps65090_fet7>;
-	vdd-supply = <&ldo8_reg>;
-	vdd_osc-supply = <&ldo10_reg>;
-	vdd_pll-supply = <&ldo8_reg>;
-};
-
-&hsi2c_4 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	max77802: max77802-pmic@9 {
-		compatible = "maxim,max77802";
-		interrupt-parent = <&gpx3>;
-		interrupts = <1 IRQ_TYPE_NONE>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&max77802_irq>, <&pmic_selb>,
-			    <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>;
-		wakeup-source;
-		reg = <0x9>;
-		#clock-cells = <1>;
-
-		inb1-supply = <&tps65090_dcdc2>;
-		inb2-supply = <&tps65090_dcdc1>;
-		inb3-supply = <&tps65090_dcdc2>;
-		inb4-supply = <&tps65090_dcdc2>;
-		inb5-supply = <&tps65090_dcdc1>;
-		inb6-supply = <&tps65090_dcdc2>;
-		inb7-supply = <&tps65090_dcdc1>;
-		inb8-supply = <&tps65090_dcdc1>;
-		inb9-supply = <&tps65090_dcdc1>;
-		inb10-supply = <&tps65090_dcdc1>;
-
-		inl1-supply = <&buck5_reg>;
-		inl2-supply = <&buck7_reg>;
-		inl3-supply = <&buck9_reg>;
-		inl4-supply = <&buck9_reg>;
-		inl5-supply = <&buck9_reg>;
-		inl6-supply = <&tps65090_dcdc2>;
-		inl7-supply = <&buck9_reg>;
-		inl9-supply = <&tps65090_dcdc2>;
-		inl10-supply = <&buck7_reg>;
-
-		regulators {
-			buck1_reg: BUCK1 {
-				regulator-name = "vdd_mif";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck2_reg: BUCK2 {
-				regulator-name = "vdd_arm";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck3_reg: BUCK3 {
-				regulator-name = "vdd_int";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck4_reg: BUCK4 {
-				regulator-name = "vdd_g3d";
-				regulator-min-microvolt = <700000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck5_reg: BUCK5 {
-				regulator-name = "vdd_1v2";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck6_reg: BUCK6 {
-				regulator-name = "vdd_kfc";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck7_reg: BUCK7 {
-				regulator-name = "vdd_1v35";
-				regulator-min-microvolt = <1350000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			buck8_reg: BUCK8 {
-				regulator-name = "vdd_emmc";
-				regulator-min-microvolt = <2850000>;
-				regulator-max-microvolt = <2850000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck9_reg: BUCK9 {
-				regulator-name = "vdd_2v";
-				regulator-min-microvolt = <2000000>;
-				regulator-max-microvolt = <2000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			buck10_reg: BUCK10 {
-				regulator-name = "vdd_1v8";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			ldo1_reg: LDO1 {
-				regulator-name = "vdd_1v0";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo2_reg: LDO2 {
-				regulator-name = "vdd_1v2_2";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo3_reg: LDO3 {
-				regulator-name = "vdd_1v8_3";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			vqmmc_sdcard: ldo4_reg: LDO4 {
-				regulator-name = "vdd_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5_reg: LDO5 {
-				regulator-name = "vdd_1v8_5";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6_reg: LDO6 {
-				regulator-name = "vdd_1v8_6";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo7_reg: LDO7 {
-				regulator-name = "vdd_1v8_7";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo8_reg: LDO8 {
-				regulator-name = "vdd_ldo8";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo9_reg: LDO9 {
-				regulator-name = "vdd_ldo9";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo10_reg: LDO10 {
-				regulator-name = "vdd_ldo10";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo11_reg: LDO11 {
-				regulator-name = "vdd_ldo11";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo12_reg: LDO12 {
-				regulator-name = "vdd_ldo12";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo13_reg: LDO13 {
-				regulator-name = "vdd_ldo13";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo14_reg: LDO14 {
-				regulator-name = "vdd_ldo14";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo15_reg: LDO15 {
-				regulator-name = "vdd_ldo15";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo17_reg: LDO17 {
-				regulator-name = "vdd_g3ds";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo18_reg: LDO18 {
-				regulator-name = "ldo_18";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo19_reg: LDO19 {
-				regulator-name = "ldo_19";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo20_reg: LDO20 {
-				regulator-name = "ldo_20";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo21_reg: LDO21 {
-				regulator-name = "ldo_21";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo23_reg: LDO23 {
-				regulator-name = "ldo_23";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-			ldo24_reg: LDO24 {
-				regulator-name = "ldo_24";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo25_reg: LDO25 {
-				regulator-name = "ldo_25";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-
-			ldo26_reg: LDO26 {
-				regulator-name = "ldo_26";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo27_reg: LDO27 {
-				regulator-name = "ldo_27";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo28_reg: LDO28 {
-				regulator-name = "ldo_28";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo29_reg: LDO29 {
-				regulator-name = "ldo_29";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo30_reg: LDO30 {
-				regulator-name = "vdd_mifs";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo32_reg: LDO32 {
-				regulator-name = "ldo_32";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			ldo33_reg: LDO33 {
-				regulator-name = "ldo_33";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo34_reg: LDO34 {
-				regulator-name = "ldo_34";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			ldo35_reg: LDO35 {
-				regulator-name = "ldo_35";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-		};
-	};
-};
-
-&hsi2c_7 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	max98090: codec@10 {
-		compatible = "maxim,max98090";
-		reg = <0x10>;
-		interrupts = <2 0>;
-		interrupt-parent = <&gpx0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&max98090_irq>;
-	};
-
-	light-sensor@44 {
-		compatible = "isil,isl29018";
-		reg = <0x44>;
-		vcc-supply = <&tps65090_fet5>;
-	};
-
-	ps8625: lvds-bridge@48 {
-		compatible = "parade,ps8625";
-		reg = <0x48>;
-		sleep-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpy7 7 GPIO_ACTIVE_HIGH>;
-		lane-count = <2>;
-		panel = <&panel>;
-		use-external-pwm;
-	};
-};
-
-&hsi2c_8 {
-	status = "okay";
-	clock-frequency = <333000>;
-
-	/* Atmel mXT336S */
-	trackpad@4b {
-		compatible = "atmel,maxtouch";
-		reg = <0x4b>;
-		interrupt-parent = <&gpx1>;
-		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
-		wakeup-source;
-		pinctrl-names = "default";
-		pinctrl-0 = <&trackpad_irq>;
-		linux,gpio-keymap = <KEY_RESERVED
-				     KEY_RESERVED
-				     KEY_RESERVED	/* GPIO0 */
-				     KEY_RESERVED	/* GPIO1 */
-				     KEY_RESERVED	/* GPIO2 */
-				     BTN_LEFT>;		/* GPIO3 */
-	};
-};
-
-&hsi2c_9 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	tpm@20 {
-		compatible = "infineon,slb9645tt";
-		reg = <0x20>;
-
-		/* Unused irq; but still need to configure the pins */
-		pinctrl-names = "default";
-		pinctrl-0 = <&tpm_irq>;
-	};
-};
-
-&i2c_2 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-	samsung,i2c-slave-addr = <0x50>;
-};
-
-&i2s0 {
-	status = "okay";
-};
-
-&mmc_0 {
-	status = "okay";
-	num-slots = <1>;
-	broken-cd;
-	mmc-hs200-1_8v;
-	cap-mmc-highspeed;
-	non-removable;
-	card-detect-delay = <200>;
-	clock-frequency = <400000000>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <0 4>;
-	samsung,dw-mshc-ddr-timing = <0 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-	bus-width = <8>;
-};
-
-&mmc_2 {
-	status = "okay";
-	num-slots = <1>;
-	cap-sd-highspeed;
-	card-detect-delay = <200>;
-	clock-frequency = <400000000>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <2 3>;
-	samsung,dw-mshc-ddr-timing = <1 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
-	bus-width = <4>;
-};
-
-
-&pinctrl_0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mask_tpm_reset>;
-
-	max98090_irq: max98090-irq {
-		samsung,pins = "gpx0-2";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	/* We need GPX0_6 to be low at sleep time; just keep it low always */
-	mask_tpm_reset: mask-tpm-reset {
-		samsung,pins = "gpx0-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-		samsung,pin-val = <0>;
-	};
-
-	tpm_irq: tpm-irq {
-		samsung,pins = "gpx1-0";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	trackpad_irq: trackpad-irq {
-		samsung,pins = "gpx1-1";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	power_key_irq: power-key-irq {
-		samsung,pins = "gpx1-2";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	ec_irq: ec-irq {
-		samsung,pins = "gpx1-5";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	tps65090_irq: tps65090-irq {
-		samsung,pins = "gpx2-5";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	dp_hpd_gpio: dp_hpd_gpio {
-		samsung,pins = "gpx2-6";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
-	};
-
-	max77802_irq: max77802-irq {
-		samsung,pins = "gpx3-1";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	lid_irq: lid-irq {
-		samsung,pins = "gpx3-4";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	hdmi_hpd_irq: hdmi-hpd-irq {
-		samsung,pins = "gpx3-7";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_dvs_1: pmic-dvs-1 {
-		samsung,pins = "gpy7-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&pinctrl_2 {
-	pmic_dvs_2: pmic-dvs-2 {
-		samsung,pins = "gpj4-2";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_dvs_3: pmic-dvs-3 {
-		samsung,pins = "gpj4-3";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&pinctrl_3 {
-	/* Drive SPI lines at x2 for better integrity */
-	spi2-bus {
-		samsung,pin-drv = <2>;
-	};
-
-	/* Drive SPI chip select at x2 for better integrity */
-	ec_spi_cs: ec-spi-cs {
-		samsung,pins = "gpb1-2";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <2>;
-	};
-
-	usb300_vbus_en: usb300-vbus-en {
-		samsung,pins = "gph0-0";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	usb301_vbus_en: usb301-vbus-en {
-		samsung,pins = "gph0-1";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_selb: pmic-selb {
-		samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5",
-			       "gph0-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&rtc {
-	status = "okay";
-	clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>;
-	clock-names = "rtc", "rtc_src";
-};
-
-&spi_2 {
-	status = "okay";
-	num-cs = <1>;
-	samsung,spi-src-clk = <0>;
-	cs-gpios = <&gpb1 2 0>;
-
-	cros_ec: cros-ec@0 {
-		compatible = "google,cros-ec-spi";
-		interrupt-parent = <&gpx1>;
-		interrupts = <5 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ec_spi_cs &ec_irq>;
-		reg = <0>;
-		spi-max-frequency = <3125000>;
-
-		controller-data {
-			samsung,spi-feedback-delay = <1>;
-		};
-
-		i2c-tunnel {
-			compatible = "google,cros-ec-i2c-tunnel";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			google,remote-bus = <0>;
-
-			battery: sbs-battery@b {
-				compatible = "sbs,sbs-battery";
-				reg = <0xb>;
-				sbs,poll-retry-count = <1>;
-				sbs,i2c-retry-count = <2>;
-			};
-
-			power-regulator@48 {
-				compatible = "ti,tps65090";
-				reg = <0x48>;
-
-				/*
-				 * Config irq to disable internal pulls
-				 * even though we run in polling mode.
-				 */
-				pinctrl-names = "default";
-				pinctrl-0 = <&tps65090_irq>;
-
-				vsys1-supply = <&vbat>;
-				vsys2-supply = <&vbat>;
-				vsys3-supply = <&vbat>;
-				infet1-supply = <&vbat>;
-				infet2-supply = <&tps65090_dcdc1>;
-				infet3-supply = <&tps65090_dcdc2>;
-				infet4-supply = <&tps65090_dcdc2>;
-				infet5-supply = <&tps65090_dcdc2>;
-				infet6-supply = <&tps65090_dcdc2>;
-				infet7-supply = <&tps65090_dcdc1>;
-				vsys-l1-supply = <&vbat>;
-				vsys-l2-supply = <&vbat>;
-
-				regulators {
-					tps65090_dcdc1: dcdc1 {
-						ti,enable-ext-control;
-					};
-					tps65090_dcdc2: dcdc2 {
-						ti,enable-ext-control;
-					};
-					tps65090_dcdc3: dcdc3 {
-						ti,enable-ext-control;
-					};
-					tps65090_fet1: fet1 {
-						regulator-name = "vcd_led";
-					};
-					tps65090_fet2: fet2 {
-						regulator-name = "video_mid";
-						regulator-always-on;
-					};
-					tps65090_fet3: fet3 {
-						regulator-name = "wwan_r";
-						regulator-always-on;
-					};
-					tps65090_fet4: fet4 {
-						regulator-name = "sdcard";
-						regulator-always-on;
-					};
-					tps65090_fet5: fet5 {
-						regulator-name = "camout";
-						regulator-always-on;
-					};
-					tps65090_fet6: fet6 {
-						regulator-name = "lcd_vdd";
-					};
-					tps65090_fet7: fet7 {
-						regulator-name = "video_mid_1a";
-						regulator-always-on;
-					};
-					tps65090_ldo1: ldo1 {
-					};
-					tps65090_ldo2: ldo2 {
-					};
-				};
-
-				charger {
-					compatible = "ti,tps65090-charger";
-				};
-			};
-		};
-	};
-};
-
-&uart_3 {
-	status = "okay";
-};
-
-&usbdrd_dwc3_0 {
-	dr_mode = "host";
-};
-
-&usbdrd_dwc3_1 {
-	dr_mode = "host";
-};
-
-&usbdrd_phy0 {
-	vbus-supply = <&usb300_vbus_reg>;
-};
-
-&usbdrd_phy1 {
-	vbus-supply = <&usb301_vbus_reg>;
-};
-
-/*
- * Use longest HW watchdog in SoC (32 seconds) since the hardware
- * watchdog provides no debugging information (compared to soft/hard
- * lockup detectors) and so should be last resort.
- */
-&watchdog {
-	timeout-sec = <32>;
-};
-
-#include "cros-ec-keyboard.dtsi"
-#include "cros-adc-thermistors.dtsi"
diff --git a/sys/gnu/dts/arm/exynos5800-peach-pi.dts b/sys/gnu/dts/arm/exynos5800-peach-pi.dts
deleted file mode 100644
index 06737c60d33..00000000000
--- a/sys/gnu/dts/arm/exynos5800-peach-pi.dts
+++ /dev/null
@@ -1,957 +0,0 @@
-/*
- * Google Peach Pi Rev 10+ board device tree source
- *
- * Copyright (c) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clock/maxim,max77802.h>
-#include <dt-bindings/regulator/maxim,max77802.h>
-#include "exynos5800.dtsi"
-
-/ {
-	model = "Google Peach Pi Rev 10+";
-
-	compatible = "google,pi-rev16",
-		"google,pi-rev15", "google,pi-rev14",
-		"google,pi-rev13", "google,pi-rev12",
-		"google,pi-rev11", "google,pi-rev10",
-		"google,pi", "google,peach", "samsung,exynos5800",
-		"samsung,exynos5";
-
-	aliases {
-		/* Assign 20 so we don't get confused w/ builtin ones */
-		i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		pwms = <&pwm 0 1000000 0>;
-		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
-		default-brightness-level = <7>;
-		enable-gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>;
-		power-supply = <&tps65090_fet1>;
-		pinctrl-0 = <&pwm0_out>;
-		pinctrl-names = "default";
-	};
-
-	fixed-rate-clocks {
-		oscclk {
-			compatible = "samsung,exynos5420-oscclk";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&power_key_irq &lid_irq>;
-
-		power {
-			label = "Power";
-			gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_POWER>;
-			gpio-key,wakeup;
-		};
-
-		lid-switch {
-			label = "Lid";
-			gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
-			linux,input-type = <5>; /* EV_SW */
-			linux,code = <0>; /* SW_LID */
-			debounce-interval = <1>;
-			gpio-key,wakeup;
-		};
-
-	};
-
-	memory {
-		reg = <0x20000000 0x80000000>;
-	};
-
-	sound {
-		compatible = "google,snow-audio-max98091";
-
-		samsung,model = "Peach-Pi-I2S-MAX98091";
-		samsung,i2s-controller = <&i2s0>;
-		samsung,audio-codec = <&max98091>;
-	};
-
-	usb300_vbus_reg: regulator-usb300 {
-		compatible = "regulator-fixed";
-		regulator-name = "P5.0V_USB3CON0";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gph0 0 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb300_vbus_en>;
-		enable-active-high;
-	};
-
-	usb301_vbus_reg: regulator-usb301 {
-		compatible = "regulator-fixed";
-		regulator-name = "P5.0V_USB3CON1";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gph0 1 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb301_vbus_en>;
-		enable-active-high;
-	};
-
-	vbat: fixed-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vbat-supply";
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	panel: panel {
-		compatible = "auo,b133htn01";
-		power-supply = <&tps65090_fet6>;
-		backlight = <&backlight>;
-	};
-};
-
-&adc {
-	status = "okay";
-	vdd-supply = <&ldo9_reg>;
-};
-
-&dp {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&dp_hpd_gpio>;
-	samsung,color-space = <0>;
-	samsung,dynamic-range = <0>;
-	samsung,ycbcr-coeff = <0>;
-	samsung,color-depth = <1>;
-	samsung,link-rate = <0x0a>;
-	samsung,lane-count = <2>;
-	samsung,hpd-gpio = <&gpx2 6 0>;
-	panel = <&panel>;
-};
-
-&fimd {
-	status = "okay";
-	samsung,invert-vclk;
-};
-
-&hdmi {
-	status = "okay";
-	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&hdmi_hpd_irq>;
-	ddc = <&i2c_2>;
-
-	hdmi-en-supply = <&tps65090_fet7>;
-	vdd-supply = <&ldo8_reg>;
-	vdd_osc-supply = <&ldo10_reg>;
-	vdd_pll-supply = <&ldo8_reg>;
-};
-
-&hsi2c_4 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	max77802: max77802-pmic@9 {
-		compatible = "maxim,max77802";
-		interrupt-parent = <&gpx3>;
-		interrupts = <1 IRQ_TYPE_NONE>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&max77802_irq>, <&pmic_selb>,
-			    <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>;
-		wakeup-source;
-		reg = <0x9>;
-		#clock-cells = <1>;
-
-		inb1-supply = <&tps65090_dcdc2>;
-		inb2-supply = <&tps65090_dcdc1>;
-		inb3-supply = <&tps65090_dcdc2>;
-		inb4-supply = <&tps65090_dcdc2>;
-		inb5-supply = <&tps65090_dcdc1>;
-		inb6-supply = <&tps65090_dcdc2>;
-		inb7-supply = <&tps65090_dcdc1>;
-		inb8-supply = <&tps65090_dcdc1>;
-		inb9-supply = <&tps65090_dcdc1>;
-		inb10-supply = <&tps65090_dcdc1>;
-
-		inl1-supply = <&buck5_reg>;
-		inl2-supply = <&buck7_reg>;
-		inl3-supply = <&buck9_reg>;
-		inl4-supply = <&buck9_reg>;
-		inl5-supply = <&buck9_reg>;
-		inl6-supply = <&tps65090_dcdc2>;
-		inl7-supply = <&buck9_reg>;
-		inl9-supply = <&tps65090_dcdc2>;
-		inl10-supply = <&buck7_reg>;
-
-		regulators {
-			buck1_reg: BUCK1 {
-				regulator-name = "vdd_mif";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck2_reg: BUCK2 {
-				regulator-name = "vdd_arm";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck3_reg: BUCK3 {
-				regulator-name = "vdd_int";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck4_reg: BUCK4 {
-				regulator-name = "vdd_g3d";
-				regulator-min-microvolt = <700000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck5_reg: BUCK5 {
-				regulator-name = "vdd_1v2";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck6_reg: BUCK6 {
-				regulator-name = "vdd_kfc";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-ramp-delay = <12500>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck7_reg: BUCK7 {
-				regulator-name = "vdd_1v35";
-				regulator-min-microvolt = <1350000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			buck8_reg: BUCK8 {
-				regulator-name = "vdd_emmc";
-				regulator-min-microvolt = <2850000>;
-				regulator-max-microvolt = <2850000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			buck9_reg: BUCK9 {
-				regulator-name = "vdd_2v";
-				regulator-min-microvolt = <2000000>;
-				regulator-max-microvolt = <2000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			buck10_reg: BUCK10 {
-				regulator-name = "vdd_1v8";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			ldo1_reg: LDO1 {
-				regulator-name = "vdd_1v0";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo2_reg: LDO2 {
-				regulator-name = "vdd_1v2_2";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo3_reg: LDO3 {
-				regulator-name = "vdd_1v8_3";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			vqmmc_sdcard: ldo4_reg: LDO4 {
-				regulator-name = "vdd_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5_reg: LDO5 {
-				regulator-name = "vdd_1v8_5";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6_reg: LDO6 {
-				regulator-name = "vdd_1v8_6";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo7_reg: LDO7 {
-				regulator-name = "vdd_1v8_7";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo8_reg: LDO8 {
-				regulator-name = "vdd_ldo8";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo9_reg: LDO9 {
-				regulator-name = "vdd_ldo9";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo10_reg: LDO10 {
-				regulator-name = "vdd_ldo10";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo11_reg: LDO11 {
-				regulator-name = "vdd_ldo11";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo12_reg: LDO12 {
-				regulator-name = "vdd_ldo12";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo13_reg: LDO13 {
-				regulator-name = "vdd_ldo13";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-mode = <MAX77802_OPMODE_LP>;
-				};
-			};
-
-			ldo14_reg: LDO14 {
-				regulator-name = "vdd_ldo14";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo15_reg: LDO15 {
-				regulator-name = "vdd_ldo15";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo17_reg: LDO17 {
-				regulator-name = "vdd_g3ds";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1400000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo18_reg: LDO18 {
-				regulator-name = "ldo_18";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo19_reg: LDO19 {
-				regulator-name = "ldo_19";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo20_reg: LDO20 {
-				regulator-name = "ldo_20";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-			};
-
-			ldo21_reg: LDO21 {
-				regulator-name = "ldo_21";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo23_reg: LDO23 {
-				regulator-name = "ldo_23";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-			ldo24_reg: LDO24 {
-				regulator-name = "ldo_24";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo25_reg: LDO25 {
-				regulator-name = "ldo_25";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-
-			ldo26_reg: LDO26 {
-				regulator-name = "ldo_26";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo27_reg: LDO27 {
-				regulator-name = "ldo_27";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			ldo28_reg: LDO28 {
-				regulator-name = "ldo_28";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo29_reg: LDO29 {
-				regulator-name = "ldo_29";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-
-			ldo30_reg: LDO30 {
-				regulator-name = "vdd_mifs";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-always-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo32_reg: LDO32 {
-				regulator-name = "ldo_32";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			ldo33_reg: LDO33 {
-				regulator-name = "ldo_33";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-
-			ldo34_reg: LDO34 {
-				regulator-name = "ldo_34";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			ldo35_reg: LDO35 {
-				regulator-name = "ldo_35";
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-		};
-	};
-};
-
-&hsi2c_7 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	max98091: codec@10 {
-		compatible = "maxim,max98091";
-		reg = <0x10>;
-		interrupts = <2 0>;
-		interrupt-parent = <&gpx0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&max98091_irq>;
-	};
-
-	light-sensor@44 {
-		compatible = "isil,isl29018";
-		reg = <0x44>;
-		vcc-supply = <&tps65090_fet5>;
-	};
-};
-
-&hsi2c_8 {
-	status = "okay";
-	clock-frequency = <333000>;
-	/* Atmel mXT540S */
-	trackpad@4b {
-		compatible = "atmel,maxtouch";
-		reg = <0x4b>;
-		interrupt-parent = <&gpx1>;
-		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
-		wakeup-source;
-		pinctrl-names = "default";
-		pinctrl-0 = <&trackpad_irq>;
-		linux,gpio-keymap = <KEY_RESERVED
-				     KEY_RESERVED
-				     KEY_RESERVED	/* GPIO 0 */
-				     KEY_RESERVED	/* GPIO 1 */
-				     BTN_LEFT		/* GPIO 2 */
-				     KEY_RESERVED>;	/* GPIO 3 */
-	};
-};
-
-&hsi2c_9 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	tpm@20 {
-		compatible = "infineon,slb9645tt";
-		reg = <0x20>;
-
-		/* Unused irq; but still need to configure the pins */
-		pinctrl-names = "default";
-		pinctrl-0 = <&tpm_irq>;
-	};
-};
-
-&i2c_2 {
-	status = "okay";
-	samsung,i2c-sda-delay = <100>;
-	samsung,i2c-max-bus-freq = <66000>;
-	samsung,i2c-slave-addr = <0x50>;
-};
-
-&i2s0 {
-	status = "okay";
-};
-
-&mmc_0 {
-	status = "okay";
-	num-slots = <1>;
-	broken-cd;
-	mmc-hs200-1_8v;
-	cap-mmc-highspeed;
-	non-removable;
-	card-detect-delay = <200>;
-	clock-frequency = <400000000>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <0 4>;
-	samsung,dw-mshc-ddr-timing = <0 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-	bus-width = <8>;
-};
-
-&mmc_2 {
-	status = "okay";
-	num-slots = <1>;
-	cap-sd-highspeed;
-	card-detect-delay = <200>;
-	clock-frequency = <400000000>;
-	samsung,dw-mshc-ciu-div = <3>;
-	samsung,dw-mshc-sdr-timing = <2 3>;
-	samsung,dw-mshc-ddr-timing = <1 2>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
-	bus-width = <4>;
-};
-
-
-&pinctrl_0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mask_tpm_reset>;
-
-	max98091_irq: max98091-irq {
-		samsung,pins = "gpx0-2";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	/* We need GPX0_6 to be low at sleep time; just keep it low always */
-	mask_tpm_reset: mask-tpm-reset {
-		samsung,pins = "gpx0-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-		samsung,pin-val = <0>;
-	};
-
-	tpm_irq: tpm-irq {
-		samsung,pins = "gpx1-0";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	trackpad_irq: trackpad-irq {
-		samsung,pins = "gpx1-1";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	power_key_irq: power-key-irq {
-		samsung,pins = "gpx1-2";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	ec_irq: ec-irq {
-		samsung,pins = "gpx1-5";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	tps65090_irq: tps65090-irq {
-		samsung,pins = "gpx2-5";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	dp_hpd_gpio: dp_hpd_gpio {
-		samsung,pins = "gpx2-6";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
-	};
-
-	max77802_irq: max77802-irq {
-		samsung,pins = "gpx3-1";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	lid_irq: lid-irq {
-		samsung,pins = "gpx3-4";
-		samsung,pin-function = <0xf>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	hdmi_hpd_irq: hdmi-hpd-irq {
-		samsung,pins = "gpx3-7";
-		samsung,pin-function = <0>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_dvs_1: pmic-dvs-1 {
-		samsung,pins = "gpy7-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&pinctrl_2 {
-	pmic_dvs_2: pmic-dvs-2 {
-		samsung,pins = "gpj4-2";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_dvs_3: pmic-dvs-3 {
-		samsung,pins = "gpj4-3";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&pinctrl_3 {
-	/* Drive SPI lines at x2 for better integrity */
-	spi2-bus {
-		samsung,pin-drv = <2>;
-	};
-
-	/* Drive SPI chip select at x2 for better integrity */
-	ec_spi_cs: ec-spi-cs {
-		samsung,pins = "gpb1-2";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <2>;
-	};
-
-	usb300_vbus_en: usb300-vbus-en {
-		samsung,pins = "gph0-0";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	usb301_vbus_en: usb301-vbus-en {
-		samsung,pins = "gph0-1";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-
-	pmic_selb: pmic-selb {
-		samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5",
-			       "gph0-6";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
-	};
-};
-
-&rtc {
-	status = "okay";
-	clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>;
-	clock-names = "rtc", "rtc_src";
-};
-
-&spi_2 {
-	status = "okay";
-	num-cs = <1>;
-	samsung,spi-src-clk = <0>;
-	cs-gpios = <&gpb1 2 0>;
-
-	cros_ec: cros-ec@0 {
-		compatible = "google,cros-ec-spi";
-		interrupt-parent = <&gpx1>;
-		interrupts = <5 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ec_spi_cs &ec_irq>;
-		reg = <0>;
-		spi-max-frequency = <3125000>;
-
-		controller-data {
-			samsung,spi-feedback-delay = <1>;
-		};
-
-		i2c-tunnel {
-			compatible = "google,cros-ec-i2c-tunnel";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			google,remote-bus = <0>;
-
-			battery: sbs-battery@b {
-				compatible = "sbs,sbs-battery";
-				reg = <0xb>;
-				sbs,poll-retry-count = <1>;
-				sbs,i2c-retry-count = <2>;
-			};
-
-			power-regulator@48 {
-				compatible = "ti,tps65090";
-				reg = <0x48>;
-
-				/*
-				 * Config irq to disable internal pulls
-				 * even though we run in polling mode.
-				 */
-				pinctrl-names = "default";
-				pinctrl-0 = <&tps65090_irq>;
-
-				vsys1-supply = <&vbat>;
-				vsys2-supply = <&vbat>;
-				vsys3-supply = <&vbat>;
-				infet1-supply = <&vbat>;
-				infet2-supply = <&tps65090_dcdc1>;
-				infet3-supply = <&tps65090_dcdc2>;
-				infet4-supply = <&tps65090_dcdc2>;
-				infet5-supply = <&tps65090_dcdc2>;
-				infet6-supply = <&tps65090_dcdc2>;
-				infet7-supply = <&tps65090_dcdc1>;
-				vsys-l1-supply = <&vbat>;
-				vsys-l2-supply = <&vbat>;
-
-				regulators {
-					tps65090_dcdc1: dcdc1 {
-						ti,enable-ext-control;
-					};
-					tps65090_dcdc2: dcdc2 {
-						ti,enable-ext-control;
-					};
-					tps65090_dcdc3: dcdc3 {
-						ti,enable-ext-control;
-					};
-					tps65090_fet1: fet1 {
-						regulator-name = "vcd_led";
-					};
-					tps65090_fet2: fet2 {
-						regulator-name = "video_mid";
-						regulator-always-on;
-					};
-					tps65090_fet3: fet3 {
-						regulator-name = "wwan_r";
-						regulator-always-on;
-					};
-					tps65090_fet4: fet4 {
-						regulator-name = "sdcard";
-						regulator-always-on;
-					};
-					tps65090_fet5: fet5 {
-						regulator-name = "camout";
-						regulator-always-on;
-					};
-					tps65090_fet6: fet6 {
-						regulator-name = "lcd_vdd";
-					};
-					tps65090_fet7: fet7 {
-						regulator-name = "video_mid_1a";
-						regulator-always-on;
-					};
-					tps65090_ldo1: ldo1 {
-					};
-					tps65090_ldo2: ldo2 {
-					};
-				};
-
-				charger {
-					compatible = "ti,tps65090-charger";
-				};
-			};
-		};
-	};
-};
-
-&uart_3 {
-	status = "okay";
-};
-
-&usbdrd_dwc3_0 {
-	dr_mode = "host";
-};
-
-&usbdrd_dwc3_1 {
-	dr_mode = "host";
-};
-
-&usbdrd_phy0 {
-	vbus-supply = <&usb300_vbus_reg>;
-};
-
-&usbdrd_phy1 {
-	vbus-supply = <&usb301_vbus_reg>;
-};
-
-/*
- * Use longest HW watchdog in SoC (32 seconds) since the hardware
- * watchdog provides no debugging information (compared to soft/hard
- * lockup detectors) and so should be last resort.
- */
-&watchdog {
-	timeout-sec = <32>;
-};
-
-#include "cros-ec-keyboard.dtsi"
-#include "cros-adc-thermistors.dtsi"
diff --git a/sys/gnu/dts/arm/mmp2-brownstone.dts b/sys/gnu/dts/arm/mmp2-brownstone.dts
deleted file mode 100644
index 350208c5e1e..00000000000
--- a/sys/gnu/dts/arm/mmp2-brownstone.dts
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "mmp2.dtsi"
-
-/ {
-	model = "Marvell MMP2 Brownstone Development Board";
-	compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
-
-	chosen {
-		bootargs = "console=ttyS2,38400 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
-	};
-
-	memory {
-		reg = <0x00000000 0x08000000>;
-	};
-
-	soc {
-		apb@d4000000 {
-			uart3: uart@d4018000 {
-				status = "okay";
-			};
-			twsi1: i2c@d4011000 {
-				status = "okay";
-				pmic: max8925@3c {
-					compatible = "maxium,max8925";
-					reg = <0x3c>;
-					interrupts = <1>;
-					interrupt-parent = <&intcmux4>;
-					interrupt-controller;
-					#interrupt-cells = <1>;
-					maxim,tsc-irq = <0>;
-
-					regulators {
-						SDV1 {
-							regulator-min-microvolt = <637500>;
-							regulator-max-microvolt = <1425000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						SDV2 {
-							regulator-min-microvolt = <650000>;
-							regulator-max-microvolt = <2225000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						SDV3 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO1 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO2 {
-							regulator-min-microvolt = <650000>;
-							regulator-max-microvolt = <2250000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO3 {
-							regulator-min-microvolt = <650000>;
-							regulator-max-microvolt = <2250000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO4 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO5 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO6 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO7 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO8 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO9 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO10 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-						};
-						LDO11 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO12 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO13 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO14 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO15 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO16 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO17 {
-							regulator-min-microvolt = <650000>;
-							regulator-max-microvolt = <2250000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO18 {
-							regulator-min-microvolt = <650000>;
-							regulator-max-microvolt = <2250000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO19 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO20 {
-							regulator-min-microvolt = <750000>;
-							regulator-max-microvolt = <3900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-					};
-					backlight {
-						maxim,max8925-dual-string = <0>;
-					};
-					charger {
-						batt-detect = <0>;
-						topoff-threshold = <1>;
-						fast-charge = <7>;
-						no-temp-support = <0>;
-						no-insert-detect = <0>;
-					};
-				};
-			};
-			rtc: rtc@d4010000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/mmp2.dtsi b/sys/gnu/dts/arm/mmp2.dtsi
deleted file mode 100644
index 766bbb8495b..00000000000
--- a/sys/gnu/dts/arm/mmp2.dtsi
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/marvell,mmp2.h>
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-		i2c0 = &twsi1;
-		i2c1 = &twsi2;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		L2: l2-cache {
-			compatible = "marvell,tauros2-cache";
-			marvell,tauros2-cache-features = <0x3>;
-		};
-
-		axi@d4200000 {	/* AXI */
-			compatible = "mrvl,axi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4200000 0x00200000>;
-			ranges;
-
-			intc: interrupt-controller@d4282000 {
-				compatible = "mrvl,mmp2-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0xd4282000 0x1000>;
-				mrvl,intc-nr-irqs = <64>;
-			};
-
-			intcmux4: interrupt-controller@d4282150 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <4>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x150 0x4>, <0x168 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <2>;
-			};
-
-			intcmux5: interrupt-controller@d4282154 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <5>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x154 0x4>, <0x16c 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <2>;
-				mrvl,clr-mfp-irq = <1>;
-			};
-
-			intcmux9: interrupt-controller@d4282180 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <9>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x180 0x4>, <0x17c 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <3>;
-			};
-
-			intcmux17: interrupt-controller@d4282158 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <17>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x158 0x4>, <0x170 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <5>;
-			};
-
-			intcmux35: interrupt-controller@d428215c {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <35>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x15c 0x4>, <0x174 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <15>;
-			};
-
-			intcmux51: interrupt-controller@d4282160 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <51>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x160 0x4>, <0x178 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <2>;
-			};
-
-			intcmux55: interrupt-controller@d4282188 {
-				compatible = "mrvl,mmp2-mux-intc";
-				interrupts = <55>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0x188 0x4>, <0x184 0x4>;
-				reg-names = "mux status", "mux mask";
-				mrvl,intc-nr-irqs = <2>;
-			};
-		};
-
-		apb@d4000000 {	/* APB */
-			compatible = "mrvl,apb-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4000000 0x00200000>;
-			ranges;
-
-			timer0: timer@d4014000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4014000 0x100>;
-				interrupts = <13>;
-			};
-
-			uart1: uart@d4030000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4030000 0x1000>;
-				interrupts = <27>;
-				clocks = <&soc_clocks MMP2_CLK_UART0>;
-				resets = <&soc_clocks MMP2_CLK_UART0>;
-				status = "disabled";
-			};
-
-			uart2: uart@d4017000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4017000 0x1000>;
-				interrupts = <28>;
-				clocks = <&soc_clocks MMP2_CLK_UART1>;
-				resets = <&soc_clocks MMP2_CLK_UART1>;
-				status = "disabled";
-			};
-
-			uart3: uart@d4018000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4018000 0x1000>;
-				interrupts = <24>;
-				clocks = <&soc_clocks MMP2_CLK_UART2>;
-				resets = <&soc_clocks MMP2_CLK_UART2>;
-				status = "disabled";
-			};
-
-			uart4: uart@d4016000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4016000 0x1000>;
-				interrupts = <46>;
-				clocks = <&soc_clocks MMP2_CLK_UART3>;
-				resets = <&soc_clocks MMP2_CLK_UART3>;
-				status = "disabled";
-			};
-
-			gpio@d4019000 {
-				compatible = "marvell,mmp2-gpio";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0xd4019000 0x1000>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupts = <49>;
-				interrupt-names = "gpio_mux";
-				clocks = <&soc_clocks MMP2_CLK_GPIO>;
-				resets = <&soc_clocks MMP2_CLK_GPIO>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				ranges;
-
-				gcb0: gpio@d4019000 {
-					reg = <0xd4019000 0x4>;
-				};
-
-				gcb1: gpio@d4019004 {
-					reg = <0xd4019004 0x4>;
-				};
-
-				gcb2: gpio@d4019008 {
-					reg = <0xd4019008 0x4>;
-				};
-
-				gcb3: gpio@d4019100 {
-					reg = <0xd4019100 0x4>;
-				};
-
-				gcb4: gpio@d4019104 {
-					reg = <0xd4019104 0x4>;
-				};
-
-				gcb5: gpio@d4019108 {
-					reg = <0xd4019108 0x4>;
-				};
-			};
-
-			twsi1: i2c@d4011000 {
-				compatible = "mrvl,mmp-twsi";
-				reg = <0xd4011000 0x1000>;
-				interrupts = <7>;
-				clocks = <&soc_clocks MMP2_CLK_TWSI0>;
-				resets = <&soc_clocks MMP2_CLK_TWSI0>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-				mrvl,i2c-fast-mode;
-				status = "disabled";
-			};
-
-			twsi2: i2c@d4025000 {
-				compatible = "mrvl,mmp-twsi";
-				reg = <0xd4025000 0x1000>;
-				interrupts = <58>;
-				clocks = <&soc_clocks MMP2_CLK_TWSI1>;
-				resets = <&soc_clocks MMP2_CLK_TWSI1>;
-				status = "disabled";
-			};
-
-			rtc: rtc@d4010000 {
-				compatible = "mrvl,mmp-rtc";
-				reg = <0xd4010000 0x1000>;
-				interrupts = <1 0>;
-				interrupt-names = "rtc 1Hz", "rtc alarm";
-				interrupt-parent = <&intcmux5>;
-				clocks = <&soc_clocks MMP2_CLK_RTC>;
-				resets = <&soc_clocks MMP2_CLK_RTC>;
-				status = "disabled";
-			};
-		};
-
-		soc_clocks: clocks{
-			compatible = "marvell,mmp2-clock";
-			reg = <0xd4050000 0x1000>,
-			      <0xd4282800 0x400>,
-			      <0xd4015000 0x1000>;
-			reg-names = "mpmu", "apmu", "apbc";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/pxa168-aspenite.dts b/sys/gnu/dts/arm/pxa168-aspenite.dts
deleted file mode 100644
index 0a988b3fb24..00000000000
--- a/sys/gnu/dts/arm/pxa168-aspenite.dts
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "pxa168.dtsi"
-
-/ {
-	model = "Marvell PXA168 Aspenite Development Board";
-	compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
-
-	chosen {
-		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
-	};
-
-	memory {
-		reg = <0x00000000 0x04000000>;
-	};
-
-	soc {
-		apb@d4000000 {
-			uart1: uart@d4017000 {
-				status = "okay";
-			};
-			twsi1: i2c@d4011000 {
-				status = "okay";
-			};
-			rtc: rtc@d4010000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/pxa168.dtsi b/sys/gnu/dts/arm/pxa168.dtsi
deleted file mode 100644
index b899e25cbb1..00000000000
--- a/sys/gnu/dts/arm/pxa168.dtsi
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/marvell,pxa168.h>
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		i2c0 = &twsi1;
-		i2c1 = &twsi2;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		axi@d4200000 {	/* AXI */
-			compatible = "mrvl,axi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4200000 0x00200000>;
-			ranges;
-
-			intc: interrupt-controller@d4282000 {
-				compatible = "mrvl,mmp-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0xd4282000 0x1000>;
-				mrvl,intc-nr-irqs = <64>;
-			};
-
-		};
-
-		apb@d4000000 {	/* APB */
-			compatible = "mrvl,apb-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4000000 0x00200000>;
-			ranges;
-
-			timer0: timer@d4014000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4014000 0x100>;
-				interrupts = <13>;
-			};
-
-			uart1: uart@d4017000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4017000 0x1000>;
-				interrupts = <27>;
-				clocks = <&soc_clocks PXA168_CLK_UART0>;
-				resets = <&soc_clocks PXA168_CLK_UART0>;
-				status = "disabled";
-			};
-
-			uart2: uart@d4018000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4018000 0x1000>;
-				interrupts = <28>;
-				clocks = <&soc_clocks PXA168_CLK_UART1>;
-				resets = <&soc_clocks PXA168_CLK_UART1>;
-				status = "disabled";
-			};
-
-			uart3: uart@d4026000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4026000 0x1000>;
-				interrupts = <29>;
-				clocks = <&soc_clocks PXA168_CLK_UART2>;
-				resets = <&soc_clocks PXA168_CLK_UART2>;
-				status = "disabled";
-			};
-
-			gpio@d4019000 {
-				compatible = "marvell,mmp-gpio";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0xd4019000 0x1000>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupts = <49>;
-				clocks = <&soc_clocks PXA168_CLK_GPIO>;
-				resets = <&soc_clocks PXA168_CLK_GPIO>;
-				interrupt-names = "gpio_mux";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				ranges;
-
-				gcb0: gpio@d4019000 {
-					reg = <0xd4019000 0x4>;
-				};
-
-				gcb1: gpio@d4019004 {
-					reg = <0xd4019004 0x4>;
-				};
-
-				gcb2: gpio@d4019008 {
-					reg = <0xd4019008 0x4>;
-				};
-
-				gcb3: gpio@d4019100 {
-					reg = <0xd4019100 0x4>;
-				};
-			};
-
-			twsi1: i2c@d4011000 {
-				compatible = "mrvl,mmp-twsi";
-				reg = <0xd4011000 0x1000>;
-				interrupts = <7>;
-				clocks = <&soc_clocks PXA168_CLK_TWSI0>;
-				resets = <&soc_clocks PXA168_CLK_TWSI0>;
-				mrvl,i2c-fast-mode;
-				status = "disabled";
-			};
-
-			twsi2: i2c@d4025000 {
-				compatible = "mrvl,mmp-twsi";
-				reg = <0xd4025000 0x1000>;
-				interrupts = <58>;
-				clocks = <&soc_clocks PXA168_CLK_TWSI1>;
-				resets = <&soc_clocks PXA168_CLK_TWSI1>;
-				status = "disabled";
-			};
-
-			rtc: rtc@d4010000 {
-				compatible = "mrvl,mmp-rtc";
-				reg = <0xd4010000 0x1000>;
-				interrupts = <5 6>;
-				interrupt-names = "rtc 1Hz", "rtc alarm";
-				clocks = <&soc_clocks PXA168_CLK_RTC>;
-				resets = <&soc_clocks PXA168_CLK_RTC>;
-				status = "disabled";
-			};
-		};
-
-		soc_clocks: clocks{
-			compatible = "marvell,pxa168-clock";
-			reg = <0xd4050000 0x1000>,
-			      <0xd4282800 0x400>,
-			      <0xd4015000 0x1000>;
-			reg-names = "mpmu", "apmu", "apbc";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/pxa910-dkb.dts b/sys/gnu/dts/arm/pxa910-dkb.dts
deleted file mode 100644
index c82f2810ec7..00000000000
--- a/sys/gnu/dts/arm/pxa910-dkb.dts
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "pxa910.dtsi"
-
-/ {
-	model = "Marvell PXA910 DKB Development Board";
-	compatible = "mrvl,pxa910-dkb", "mrvl,pxa910";
-
-	chosen {
-		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
-	};
-
-	memory {
-		reg = <0x00000000 0x10000000>;
-	};
-
-	soc {
-		apb@d4000000 {
-			uart1: uart@d4017000 {
-				status = "okay";
-			};
-			twsi1: i2c@d4011000 {
-				status = "okay";
-
-				pmic: 88pm860x@34 {
-					compatible = "marvell,88pm860x";
-					reg = <0x34>;
-					interrupts = <4>;
-					interrupt-parent = <&intc>;
-					interrupt-controller;
-					#interrupt-cells = <1>;
-
-					marvell,88pm860x-irq-read-clr;
-					marvell,88pm860x-slave-addr = <0x11>;
-
-					regulators {
-						BUCK1 {
-							regulator-min-microvolt = <1000000>;
-							regulator-max-microvolt = <1500000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						BUCK2 {
-							regulator-min-microvolt = <1000000>;
-							regulator-max-microvolt = <1500000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						BUCK3 {
-							regulator-min-microvolt = <1000000>;
-							regulator-max-microvolt = <3000000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO1 {
-							regulator-min-microvolt = <1200000>;
-							regulator-max-microvolt = <2800000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO2 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO3 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO4 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-always-on;
-						};
-						LDO5 {
-							regulator-min-microvolt = <2900000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO6 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO7 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <2900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO8 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <2900000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO9 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO10 {
-							regulator-min-microvolt = <1200000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-boot-on;
-							regulator-always-on;
-						};
-						LDO12 {
-							regulator-min-microvolt = <1200000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-always-on;
-						};
-						LDO13 {
-							regulator-min-microvolt = <1200000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-always-on;
-						};
-						LDO14 {
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3300000>;
-							regulator-always-on;
-						};
-					};
-					rtc {
-						marvell,88pm860x-vrtc = <1>;
-					};
-					touch {
-						marvell,88pm860x-gpadc-prebias = <1>;
-						marvell,88pm860x-gpadc-slot-cycle = <1>;
-						marvell,88pm860x-tsi-prebias = <6>;
-						marvell,88pm860x-pen-prebias = <16>;
-						marvell,88pm860x-pen-prechg = <2>;
-						marvell,88pm860x-resistor-X = <300>;
-					};
-					backlights {
-						backlight-0 {
-							marvell,88pm860x-iset = <4>;
-							marvell,88pm860x-pwm = <3>;
-						};
-						backlight-2 {
-						};
-					};
-					leds {
-						led0-red {
-							marvell,88pm860x-iset = <12>;
-						};
-						led0-green {
-							marvell,88pm860x-iset = <12>;
-						};
-						led0-blue {
-							marvell,88pm860x-iset = <12>;
-						};
-					};
-				};
-			};
-			rtc: rtc@d4010000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/pxa910.dtsi b/sys/gnu/dts/arm/pxa910.dtsi
deleted file mode 100644
index 0868f6729be..00000000000
--- a/sys/gnu/dts/arm/pxa910.dtsi
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/marvell,pxa910.h>
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		i2c0 = &twsi1;
-		i2c1 = &twsi2;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		L2: l2-cache {
-			compatible = "marvell,tauros2-cache";
-			marvell,tauros2-cache-features = <0x3>;
-		};
-
-		axi@d4200000 {	/* AXI */
-			compatible = "mrvl,axi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4200000 0x00200000>;
-			ranges;
-
-			intc: interrupt-controller@d4282000 {
-				compatible = "mrvl,mmp-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0xd4282000 0x1000>;
-				mrvl,intc-nr-irqs = <64>;
-			};
-
-		};
-
-		apb@d4000000 {	/* APB */
-			compatible = "mrvl,apb-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4000000 0x00200000>;
-			ranges;
-
-			timer0: timer@d4014000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4014000 0x100>;
-				interrupts = <13>;
-			};
-
-			timer1: timer@d4016000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4016000 0x100>;
-				interrupts = <29>;
-				status = "disabled";
-			};
-
-			uart1: uart@d4017000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4017000 0x1000>;
-				interrupts = <27>;
-				clocks = <&soc_clocks PXA910_CLK_UART0>;
-				resets = <&soc_clocks PXA910_CLK_UART0>;
-				status = "disabled";
-			};
-
-			uart2: uart@d4018000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4018000 0x1000>;
-				interrupts = <28>;
-				clocks = <&soc_clocks PXA910_CLK_UART1>;
-				resets = <&soc_clocks PXA910_CLK_UART1>;
-				status = "disabled";
-			};
-
-			uart3: uart@d4036000 {
-				compatible = "mrvl,mmp-uart";
-				reg = <0xd4036000 0x1000>;
-				interrupts = <59>;
-				clocks = <&soc_clocks PXA910_CLK_UART2>;
-				resets = <&soc_clocks PXA910_CLK_UART2>;
-				status = "disabled";
-			};
-
-			gpio@d4019000 {
-				compatible = "marvell,mmp-gpio";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0xd4019000 0x1000>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupts = <49>;
-				interrupt-names = "gpio_mux";
-				clocks = <&soc_clocks PXA910_CLK_GPIO>;
-				resets = <&soc_clocks PXA910_CLK_GPIO>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				ranges;
-
-				gcb0: gpio@d4019000 {
-					reg = <0xd4019000 0x4>;
-				};
-
-				gcb1: gpio@d4019004 {
-					reg = <0xd4019004 0x4>;
-				};
-
-				gcb2: gpio@d4019008 {
-					reg = <0xd4019008 0x4>;
-				};
-
-				gcb3: gpio@d4019100 {
-					reg = <0xd4019100 0x4>;
-				};
-			};
-
-			twsi1: i2c@d4011000 {
-				compatible = "mrvl,mmp-twsi";
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg = <0xd4011000 0x1000>;
-				interrupts = <7>;
-				clocks = <&soc_clocks PXA910_CLK_TWSI0>;
-				resets = <&soc_clocks PXA910_CLK_TWSI0>;
-				mrvl,i2c-fast-mode;
-				status = "disabled";
-			};
-
-			twsi2: i2c@d4037000 {
-				compatible = "mrvl,mmp-twsi";
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg = <0xd4037000 0x1000>;
-				interrupts = <54>;
-				clocks = <&soc_clocks PXA910_CLK_TWSI1>;
-				resets = <&soc_clocks PXA910_CLK_TWSI1>;
-				status = "disabled";
-			};
-
-			rtc: rtc@d4010000 {
-				compatible = "mrvl,mmp-rtc";
-				reg = <0xd4010000 0x1000>;
-				interrupts = <5 6>;
-				interrupt-names = "rtc 1Hz", "rtc alarm";
-				clocks = <&soc_clocks PXA910_CLK_RTC>;
-				resets = <&soc_clocks PXA910_CLK_RTC>;
-				status = "disabled";
-			};
-		};
-
-		soc_clocks: clocks{
-			compatible = "marvell,pxa910-clock";
-			reg = <0xd4050000 0x1000>,
-			      <0xd4282800 0x400>,
-			      <0xd4015000 0x1000>,
-			      <0xd403b000 0x1000>;
-			reg-names = "mpmu", "apmu", "apbc", "apbcp";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8064-cm-qs600.dts b/sys/gnu/dts/arm/qcom-apq8064-cm-qs600.dts
deleted file mode 100644
index 5d75666f7f6..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8064-cm-qs600.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-#include "qcom-apq8064-v2.0.dtsi"
-
-/ {
-	model = "CompuLab CM-QS600";
-	compatible = "qcom,apq8064-cm-qs600", "qcom,apq8064";
-
-	soc {
-		pinctrl@800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-		};
-
-		gsbi@12440000 {
-			status = "okay";
-			qcom,mode = <GSBI_PROT_I2C>;
-
-			i2c@12460000 {
-				status = "okay";
-				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
-
-				eeprom: eeprom@50 {
-					compatible = "24c02";
-					reg = <0x50>;
-					pagesize = <32>;
-				};
-			};
-		};
-
-		gsbi@16600000 {
-			status = "ok";
-			qcom,mode = <GSBI_PROT_I2C_UART>;
-			serial@16640000 {
-				status = "ok";
-			};
-		};
-
-		amba {
-			/* eMMC */
-			sdcc1: sdcc@12400000 {
-				status = "okay";
-			};
-
-			/* External micro SD card */
-			sdcc3: sdcc@12180000 {
-				status = "okay";
-			};
-			/* WLAN */
-			sdcc4: sdcc@121c0000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8064-ifc6410.dts b/sys/gnu/dts/arm/qcom-apq8064-ifc6410.dts
deleted file mode 100644
index e641001ca2a..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8064-ifc6410.dts
+++ /dev/null
@@ -1,71 +0,0 @@
-#include "qcom-apq8064-v2.0.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	model = "Qualcomm APQ8064/IFC6410";
-	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
-
-	soc {
-		pinctrl@800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-
-			card_detect: card_detect {
-				mux {
-					pins = "gpio26";
-					function = "gpio";
-					bias-disable;
-				};
-			};
-		};
-
-		gsbi@12440000 {
-			status = "okay";
-			qcom,mode = <GSBI_PROT_I2C>;
-
-			i2c@12460000 {
-				status = "okay";
-				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
-
-				eeprom: eeprom@52 {
-					compatible = "atmel,24c128";
-					reg = <0x52>;
-					pagesize = <32>;
-				};
-			};
-		};
-
-		gsbi@16600000 {
-			status = "ok";
-			qcom,mode = <GSBI_PROT_I2C_UART>;
-			serial@16640000 {
-				status = "ok";
-			};
-		};
-
-		amba {
-			/* eMMC */
-			sdcc1: sdcc@12400000 {
-				status = "okay";
-			};
-
-			/* External micro SD card */
-			sdcc3: sdcc@12180000 {
-				status = "okay";
-				pinctrl-names	= "default";
-				pinctrl-0	= <&card_detect>;
-				cd-gpios	= <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
-			};
-			/* WLAN */
-			sdcc4: sdcc@121c0000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8064-v2.0.dtsi b/sys/gnu/dts/arm/qcom-apq8064-v2.0.dtsi
deleted file mode 100644
index 935c3945fc5..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8064-v2.0.dtsi
+++ /dev/null
@@ -1 +0,0 @@
-#include "qcom-apq8064.dtsi"
diff --git a/sys/gnu/dts/arm/qcom-apq8064.dtsi b/sys/gnu/dts/arm/qcom-apq8064.dtsi
deleted file mode 100644
index b3154c07165..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8064.dtsi
+++ /dev/null
@@ -1,353 +0,0 @@
-/dts-v1/;
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/qcom,gcc-msm8960.h>
-#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
-#include <dt-bindings/soc/qcom,gsbi.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
-	model = "Qualcomm APQ8064";
-	compatible = "qcom,apq8064";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc0>;
-			qcom,saw = <&saw0>;
-		};
-
-		cpu@1 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc1>;
-			qcom,saw = <&saw1>;
-		};
-
-		cpu@2 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <2>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc2>;
-			qcom,saw = <&saw2>;
-		};
-
-		cpu@3 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <3>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc3>;
-			qcom,saw = <&saw3>;
-		};
-
-		L2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <1 10 0x304>;
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		tlmm_pinmux: pinctrl@800000 {
-			compatible = "qcom,apq8064-pinctrl";
-			reg = <0x800000 0x4000>;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
-
-			pinctrl-names = "default";
-			pinctrl-0 = <&ps_hold>;
-
-			sdc4_gpios: sdc4-gpios {
-				pios {
-					pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
-					function = "sdc4";
-				};
-			};
-
-			ps_hold: ps_hold {
-				mux {
-					pins = "gpio78";
-					function = "ps_hold";
-				};
-			};
-		};
-
-		intc: interrupt-controller@2000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0x02000000 0x1000>,
-			      <0x02002000 0x1000>;
-		};
-
-		timer@200a000 {
-			compatible = "qcom,kpss-timer", "qcom,msm-timer";
-			interrupts = <1 1 0x301>,
-				     <1 2 0x301>,
-				     <1 3 0x301>;
-			reg = <0x0200a000 0x100>;
-			clock-frequency = <27000000>,
-					  <32768>;
-			cpu-offset = <0x80000>;
-		};
-
-		acc0: clock-controller@2088000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		acc1: clock-controller@2098000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		acc2: clock-controller@20a8000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		acc3: clock-controller@20b8000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		saw0: regulator@2089000 {
-			compatible = "qcom,saw2";
-			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		saw1: regulator@2099000 {
-			compatible = "qcom,saw2";
-			reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		saw2: regulator@20a9000 {
-			compatible = "qcom,saw2";
-			reg = <0x020a9000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		saw3: regulator@20b9000 {
-			compatible = "qcom,saw2";
-			reg = <0x020b9000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		gsbi1: gsbi@12440000 {
-			status = "disabled";
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x12440000 0x100>;
-			clocks = <&gcc GSBI1_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			i2c1: i2c@12460000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x12460000 0x1000>;
-				interrupts = <0 194 IRQ_TYPE_NONE>;
-				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
-				clock-names = "core", "iface";
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		gsbi2: gsbi@12480000 {
-			status = "disabled";
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x12480000 0x100>;
-			clocks = <&gcc GSBI2_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			i2c2: i2c@124a0000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x124a0000 0x1000>;
-				interrupts = <0 196 IRQ_TYPE_NONE>;
-				clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
-				clock-names = "core", "iface";
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		gsbi7: gsbi@16600000 {
-			status = "disabled";
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x16600000 0x100>;
-			clocks = <&gcc GSBI7_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			serial@16640000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x16640000 0x1000>,
-				      <0x16600000 0x1000>;
-				interrupts = <0 158 0x0>;
-				clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-		};
-
-		qcom,ssbi@500000 {
-			compatible = "qcom,ssbi";
-			reg = <0x00500000 0x1000>;
-			qcom,controller-type = "pmic-arbiter";
-		};
-
-		gcc: clock-controller@900000 {
-			compatible = "qcom,gcc-apq8064";
-			reg = <0x00900000 0x4000>;
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-
-		mmcc: clock-controller@4000000 {
-			compatible = "qcom,mmcc-apq8064";
-			reg = <0x4000000 0x1000>;
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-
-		/* Temporary fixed regulator */
-		vsdcc_fixed: vsdcc-regulator {
-			compatible = "regulator-fixed";
-			regulator-name = "SDCC Power";
-			regulator-min-microvolt = <2700000>;
-			regulator-max-microvolt = <2700000>;
-			regulator-always-on;
-		};
-
-		sdcc1bam:dma@12402000{
-			compatible = "qcom,bam-v1.3.0";
-			reg = <0x12402000 0x8000>;
-			interrupts = <0 98 0>;
-			clocks = <&gcc SDC1_H_CLK>;
-			clock-names = "bam_clk";
-			#dma-cells = <1>;
-			qcom,ee = <0>;
-		};
-
-		sdcc3bam:dma@12182000{
-			compatible = "qcom,bam-v1.3.0";
-			reg = <0x12182000 0x8000>;
-			interrupts = <0 96 0>;
-			clocks = <&gcc SDC3_H_CLK>;
-			clock-names = "bam_clk";
-			#dma-cells = <1>;
-			qcom,ee = <0>;
-		};
-
-		sdcc4bam:dma@121c2000{
-			compatible = "qcom,bam-v1.3.0";
-			reg = <0x121c2000 0x8000>;
-			interrupts = <0 95 0>;
-			clocks = <&gcc SDC4_H_CLK>;
-			clock-names = "bam_clk";
-			#dma-cells = <1>;
-			qcom,ee = <0>;
-		};
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			sdcc1: sdcc@12400000 {
-				status		= "disabled";
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				reg		= <0x12400000 0x2000>;
-				interrupts	= <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <8>;
-				max-frequency	= <96000000>;
-				non-removable;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				vmmc-supply = <&vsdcc_fixed>;
-				dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
-				dma-names = "tx", "rx";
-			};
-
-			sdcc3: sdcc@12180000 {
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				status		= "disabled";
-				reg		= <0x12180000 0x2000>;
-				interrupts	= <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <4>;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				max-frequency	= <192000000>;
-				no-1-8-v;
-				vmmc-supply = <&vsdcc_fixed>;
-				dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
-				dma-names = "tx", "rx";
-			};
-
-			sdcc4: sdcc@121c0000 {
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				status		= "disabled";
-				reg		= <0x121c0000 0x2000>;
-				interrupts	= <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <4>;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				max-frequency	= <48000000>;
-				vmmc-supply = <&vsdcc_fixed>;
-				vqmmc-supply = <&vsdcc_fixed>;
-				dmas = <&sdcc4bam 2>, <&sdcc4bam 1>;
-				dma-names = "tx", "rx";
-				pinctrl-names = "default";
-				pinctrl-0 = <&sdc4_gpios>;
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8074-dragonboard.dts b/sys/gnu/dts/arm/qcom-apq8074-dragonboard.dts
deleted file mode 100644
index 47370494d0f..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8074-dragonboard.dts
+++ /dev/null
@@ -1,66 +0,0 @@
-#include "qcom-msm8974.dtsi"
-
-/ {
-	model = "Qualcomm APQ8074 Dragonboard";
-	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
-
-	soc {
-		serial@f991e000 {
-			status = "ok";
-		};
-
-		sdhci@f9824900 {
-			bus-width = <8>;
-			non-removable;
-			status = "ok";
-		};
-
-		sdhci@f98a4900 {
-			cd-gpios = <&msmgpio 62 0x1>;
-			bus-width = <4>;
-		};
-
-
-		pinctrl@fd510000 {
-			i2c11_pins: i2c11 {
-				mux {
-					pins = "gpio83", "gpio84";
-					function = "blsp_i2c11";
-				};
-			};
-
-			spi8_default: spi8_default {
-				mosi {
-					pins = "gpio45";
-					function = "blsp_spi8";
-				};
-				miso {
-					pins = "gpio46";
-					function = "blsp_spi8";
-				};
-				cs {
-					pins = "gpio47";
-					function = "blsp_spi8";
-				};
-				clk {
-					pins = "gpio48";
-					function = "blsp_spi8";
-				};
-			};
-		};
-
-		i2c@f9967000 {
-			status = "okay";
-			clock-frequency = <200000>;
-			pinctrl-0 = <&i2c11_pins>;
-			pinctrl-names = "default";
-
-			eeprom: eeprom@52 {
-				compatible = "atmel,24c128";
-				reg = <0x52>;
-				pagesize = <32>;
-				read-only;
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8084-ifc6540.dts b/sys/gnu/dts/arm/qcom-apq8084-ifc6540.dts
deleted file mode 100644
index c9ff10821ad..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8084-ifc6540.dts
+++ /dev/null
@@ -1,23 +0,0 @@
-#include "qcom-apq8084.dtsi"
-
-/ {
-	model = "Qualcomm APQ8084/IFC6540";
-	compatible = "qcom,apq8084-ifc6540", "qcom,apq8084";
-
-	soc {
-		serial@f995e000 {
-			status = "okay";
-		};
-
-		sdhci@f9824900 {
-			bus-width = <8>;
-			non-removable;
-			status = "okay";
-		};
-
-		sdhci@f98a4900 {
-			cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
-			bus-width = <4>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8084-mtp.dts b/sys/gnu/dts/arm/qcom-apq8084-mtp.dts
deleted file mode 100644
index 8ecec58a9ff..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8084-mtp.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-#include "qcom-apq8084.dtsi"
-
-/ {
-	model = "Qualcomm APQ 8084-MTP";
-	compatible = "qcom,apq8084-mtp", "qcom,apq8084";
-
-	soc {
-		serial@f995e000 {
-			status = "okay";
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-apq8084.dtsi b/sys/gnu/dts/arm/qcom-apq8084.dtsi
deleted file mode 100644
index 1f130bc1685..00000000000
--- a/sys/gnu/dts/arm/qcom-apq8084.dtsi
+++ /dev/null
@@ -1,230 +0,0 @@
-/dts-v1/;
-
-#include "skeleton.dtsi"
-
-#include <dt-bindings/clock/qcom,gcc-apq8084.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	model = "Qualcomm APQ 8084";
-	compatible = "qcom,apq8084";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <0>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc0>;
-		};
-
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <1>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc1>;
-		};
-
-		cpu@2 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <2>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc2>;
-		};
-
-		cpu@3 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <3>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc3>;
-		};
-
-		L2: l2-cache {
-			compatible = "qcom,arch-cache";
-			cache-level = <2>;
-			qcom,saw = <&saw_l2>;
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <1 7 0xf04>;
-	};
-
-	timer {
-		compatible = "arm,armv7-timer";
-		interrupts = <1 2 0xf08>,
-			     <1 3 0xf08>,
-			     <1 4 0xf08>,
-			     <1 1 0xf08>;
-		clock-frequency = <19200000>;
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		intc: interrupt-controller@f9000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0xf9000000 0x1000>,
-			      <0xf9002000 0x1000>;
-		};
-
-		timer@f9020000 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			compatible = "arm,armv7-timer-mem";
-			reg = <0xf9020000 0x1000>;
-			clock-frequency = <19200000>;
-
-			frame@f9021000 {
-				frame-number = <0>;
-				interrupts = <0 8 0x4>,
-					     <0 7 0x4>;
-				reg = <0xf9021000 0x1000>,
-				      <0xf9022000 0x1000>;
-			};
-
-			frame@f9023000 {
-				frame-number = <1>;
-				interrupts = <0 9 0x4>;
-				reg = <0xf9023000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9024000 {
-				frame-number = <2>;
-				interrupts = <0 10 0x4>;
-				reg = <0xf9024000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9025000 {
-				frame-number = <3>;
-				interrupts = <0 11 0x4>;
-				reg = <0xf9025000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9026000 {
-				frame-number = <4>;
-				interrupts = <0 12 0x4>;
-				reg = <0xf9026000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9027000 {
-				frame-number = <5>;
-				interrupts = <0 13 0x4>;
-				reg = <0xf9027000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9028000 {
-				frame-number = <6>;
-				interrupts = <0 14 0x4>;
-				reg = <0xf9028000 0x1000>;
-				status = "disabled";
-			};
-		};
-
-		saw_l2: regulator@f9012000 {
-			compatible = "qcom,saw2";
-			reg = <0xf9012000 0x1000>;
-			regulator;
-		};
-
-		acc0: clock-controller@f9088000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9088000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc1: clock-controller@f9098000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9098000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc2: clock-controller@f90a8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90a8000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc3: clock-controller@f90b8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90b8000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		restart@fc4ab000 {
-			compatible = "qcom,pshold";
-			reg = <0xfc4ab000 0x4>;
-		};
-
-		gcc: clock-controller@fc400000 {
-			compatible = "qcom,gcc-apq8084";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			reg = <0xfc400000 0x4000>;
-		};
-
-		tlmm: pinctrl@fd510000 {
-			compatible = "qcom,apq8084-pinctrl";
-			reg = <0xfd510000 0x4000>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <0 208 0>;
-		};
-
-		serial@f995e000 {
-			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
-			reg = <0xf995e000 0x1000>;
-			interrupts = <0 114 0x0>;
-			clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		sdhci@f9824900 {
-			compatible = "qcom,sdhci-msm-v4";
-			reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-			reg-names = "hc_mem", "core_mem";
-			interrupts = <0 123 0>, <0 138 0>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		sdhci@f98a4900 {
-			compatible = "qcom,sdhci-msm-v4";
-			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-			reg-names = "hc_mem", "core_mem";
-			interrupts = <0 125 0>, <0 221 0>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-ipq8064-ap148.dts b/sys/gnu/dts/arm/qcom-ipq8064-ap148.dts
deleted file mode 100644
index 55b2910efd8..00000000000
--- a/sys/gnu/dts/arm/qcom-ipq8064-ap148.dts
+++ /dev/null
@@ -1,93 +0,0 @@
-#include "qcom-ipq8064-v1.0.dtsi"
-
-/ {
-	model = "Qualcomm IPQ8064/AP148";
-	compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
-
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		rsvd@41200000 {
-			reg = <0x41200000 0x300000>;
-			no-map;
-		};
-	};
-
-	soc {
-		pinmux@800000 {
-			i2c4_pins: i2c4_pinmux {
-				pins = "gpio12", "gpio13";
-				function = "gsbi4";
-				bias-disable;
-			};
-
-			spi_pins: spi_pins {
-				mux {
-					pins = "gpio18", "gpio19", "gpio21";
-					function = "gsbi5";
-					drive-strength = <10>;
-					bias-none;
-				};
-			};
-		};
-
-		gsbi@16300000 {
-			qcom,mode = <GSBI_PROT_I2C_UART>;
-			status = "ok";
-			serial@16340000 {
-				status = "ok";
-			};
-
-			i2c4: i2c@16380000 {
-				status = "ok";
-
-				clock-frequency = <200000>;
-
-				pinctrl-0 = <&i2c4_pins>;
-				pinctrl-names = "default";
-			};
-		};
-
-		gsbi5: gsbi@1a200000 {
-			qcom,mode = <GSBI_PROT_SPI>;
-			status = "ok";
-
-			spi4: spi@1a280000 {
-				status = "ok";
-				spi-max-frequency = <50000000>;
-
-				pinctrl-0 = <&spi_pins>;
-				pinctrl-names = "default";
-
-				cs-gpios = <&qcom_pinmux 20 0>;
-
-				flash: m25p80@0 {
-					compatible = "s25fl256s1";
-					#address-cells = <1>;
-					#size-cells = <1>;
-					spi-max-frequency = <50000000>;
-					reg = <0>;
-
-					partition@0 {
-						label = "rootfs";
-						reg = <0x0 0x1000000>;
-					};
-
-					partition@1 {
-						label = "scratch";
-						reg = <0x1000000 0x1000000>;
-					};
-				};
-			};
-		};
-
-		sata-phy@1b400000 {
-			status = "ok";
-		};
-
-		sata@29000000 {
-			status = "ok";
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-ipq8064-v1.0.dtsi b/sys/gnu/dts/arm/qcom-ipq8064-v1.0.dtsi
deleted file mode 100644
index 7093b075e40..00000000000
--- a/sys/gnu/dts/arm/qcom-ipq8064-v1.0.dtsi
+++ /dev/null
@@ -1 +0,0 @@
-#include "qcom-ipq8064.dtsi"
diff --git a/sys/gnu/dts/arm/qcom-ipq8064.dtsi b/sys/gnu/dts/arm/qcom-ipq8064.dtsi
deleted file mode 100644
index cb225dafe97..00000000000
--- a/sys/gnu/dts/arm/qcom-ipq8064.dtsi
+++ /dev/null
@@ -1,283 +0,0 @@
-/dts-v1/;
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
-#include <dt-bindings/soc/qcom,gsbi.h>
-
-/ {
-	model = "Qualcomm IPQ8064";
-	compatible = "qcom,ipq8064";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc0>;
-			qcom,saw = <&saw0>;
-		};
-
-		cpu@1 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc1>;
-			qcom,saw = <&saw1>;
-		};
-
-		L2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <1 10 0x304>;
-	};
-
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		nss@40000000 {
-			reg = <0x40000000 0x1000000>;
-			no-map;
-		};
-
-		smem@41000000 {
-			reg = <0x41000000 0x200000>;
-			no-map;
-		};
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		qcom_pinmux: pinmux@800000 {
-			compatible = "qcom,ipq8064-pinctrl";
-			reg = <0x800000 0x4000>;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <0 16 0x4>;
-		};
-
-		intc: interrupt-controller@2000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0x02000000 0x1000>,
-			      <0x02002000 0x1000>;
-		};
-
-		timer@200a000 {
-			compatible = "qcom,kpss-timer", "qcom,msm-timer";
-			interrupts = <1 1 0x301>,
-				     <1 2 0x301>,
-				     <1 3 0x301>;
-			reg = <0x0200a000 0x100>;
-			clock-frequency = <25000000>,
-					  <32768>;
-			cpu-offset = <0x80000>;
-		};
-
-		acc0: clock-controller@2088000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		acc1: clock-controller@2098000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		saw0: regulator@2089000 {
-			compatible = "qcom,saw2";
-			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		saw1: regulator@2099000 {
-			compatible = "qcom,saw2";
-			reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		gsbi2: gsbi@12480000 {
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x12480000 0x100>;
-			clocks = <&gcc GSBI2_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			status = "disabled";
-
-			serial@12490000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x12490000 0x1000>,
-				      <0x12480000 0x1000>;
-				interrupts = <0 195 0x0>;
-				clocks = <&gcc GSBI2_UART_CLK>, <&gcc GSBI2_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-
-			i2c@124a0000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x124a0000 0x1000>;
-				interrupts = <0 196 0>;
-
-				clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-
-		};
-
-		gsbi4: gsbi@16300000 {
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x16300000 0x100>;
-			clocks = <&gcc GSBI4_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			status = "disabled";
-
-			serial@16340000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x16340000 0x1000>,
-				      <0x16300000 0x1000>;
-				interrupts = <0 152 0x0>;
-				clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-
-			i2c@16380000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x16380000 0x1000>;
-				interrupts = <0 153 0>;
-
-				clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		gsbi5: gsbi@1a200000 {
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x1a200000 0x100>;
-			clocks = <&gcc GSBI5_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			status = "disabled";
-
-			serial@1a240000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x1a240000 0x1000>,
-				      <0x1a200000 0x1000>;
-				interrupts = <0 154 0x0>;
-				clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-
-			i2c@1a280000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x1a280000 0x1000>;
-				interrupts = <0 155 0>;
-
-				clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-
-			spi@1a280000 {
-				compatible = "qcom,spi-qup-v1.1.1";
-				reg = <0x1a280000 0x1000>;
-				interrupts = <0 155 0>;
-
-				clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		sata_phy: sata-phy@1b400000 {
-			compatible = "qcom,ipq806x-sata-phy";
-			reg = <0x1b400000 0x200>;
-
-			clocks = <&gcc SATA_PHY_CFG_CLK>;
-			clock-names = "cfg";
-
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-
-		sata@29000000 {
-			compatible = "qcom,ipq806x-ahci", "generic-ahci";
-			reg = <0x29000000 0x180>;
-
-			interrupts = <0 209 0x0>;
-
-			clocks = <&gcc SFAB_SATA_S_H_CLK>,
-				 <&gcc SATA_H_CLK>,
-				 <&gcc SATA_A_CLK>,
-				 <&gcc SATA_RXOOB_CLK>,
-				 <&gcc SATA_PMALIVE_CLK>;
-			clock-names = "slave_face", "iface", "core",
-					"rxoob", "pmalive";
-
-			assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
-			assigned-clock-rates = <100000000>, <100000000>;
-
-			phys = <&sata_phy>;
-			phy-names = "sata-phy";
-			status = "disabled";
-		};
-
-		qcom,ssbi@500000 {
-			compatible = "qcom,ssbi";
-			reg = <0x00500000 0x1000>;
-			qcom,controller-type = "pmic-arbiter";
-		};
-
-		gcc: clock-controller@900000 {
-			compatible = "qcom,gcc-ipq8064";
-			reg = <0x00900000 0x4000>;
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8660-surf.dts b/sys/gnu/dts/arm/qcom-msm8660-surf.dts
deleted file mode 100644
index e0883c37624..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8660-surf.dts
+++ /dev/null
@@ -1,58 +0,0 @@
-#include <dt-bindings/input/input.h>
-
-#include "qcom-msm8660.dtsi"
-
-/ {
-	model = "Qualcomm MSM8660 SURF";
-	compatible = "qcom,msm8660-surf", "qcom,msm8660";
-
-	soc {
-		gsbi@19c00000 {
-			status = "ok";
-			qcom,mode = <GSBI_PROT_I2C_UART>;
-			serial@19c40000 {
-				status = "ok";
-			};
-		};
-
-		amba {
-			/* eMMC */
-			sdcc1: sdcc@12400000 {
-				status = "okay";
-			};
-
-			/* External micro SD card */
-			sdcc3: sdcc@12180000 {
-				status = "okay";
-			};
-		};
-	};
-};
-
-&pmicintc {
-	keypad@148 {
-		linux,keymap = <
-			MATRIX_KEY(0, 0, KEY_FN_F1)
-			MATRIX_KEY(0, 1, KEY_UP)
-			MATRIX_KEY(0, 2, KEY_LEFT)
-			MATRIX_KEY(0, 3, KEY_VOLUMEUP)
-			MATRIX_KEY(1, 0, KEY_FN_F2)
-			MATRIX_KEY(1, 1, KEY_RIGHT)
-			MATRIX_KEY(1, 2, KEY_DOWN)
-			MATRIX_KEY(1, 3, KEY_VOLUMEDOWN)
-			MATRIX_KEY(2, 3, KEY_ENTER)
-			MATRIX_KEY(4, 0, KEY_CAMERA_FOCUS)
-			MATRIX_KEY(4, 1, KEY_UP)
-			MATRIX_KEY(4, 2, KEY_LEFT)
-			MATRIX_KEY(4, 3, KEY_HOME)
-			MATRIX_KEY(4, 4, KEY_FN_F3)
-			MATRIX_KEY(5, 0, KEY_CAMERA)
-			MATRIX_KEY(5, 1, KEY_RIGHT)
-			MATRIX_KEY(5, 2, KEY_DOWN)
-			MATRIX_KEY(5, 3, KEY_BACK)
-			MATRIX_KEY(5, 4, KEY_MENU)
-			>;
-		keypad,num-rows = <6>;
-		keypad,num-columns = <5>;
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8660.dtsi b/sys/gnu/dts/arm/qcom-msm8660.dtsi
deleted file mode 100644
index 0affd6193f5..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8660.dtsi
+++ /dev/null
@@ -1,201 +0,0 @@
-/dts-v1/;
-
-/include/ "skeleton.dtsi"
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-msm8660.h>
-#include <dt-bindings/soc/qcom,gsbi.h>
-
-/ {
-	model = "Qualcomm MSM8660";
-	compatible = "qcom,msm8660";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "qcom,scorpion";
-			enable-method = "qcom,gcc-msm8660";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@1 {
-			compatible = "qcom,scorpion";
-			enable-method = "qcom,gcc-msm8660";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-
-		L2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-		};
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		intc: interrupt-controller@2080000 {
-			compatible = "qcom,msm-8660-qgic";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = < 0x02080000 0x1000 >,
-			      < 0x02081000 0x1000 >;
-		};
-
-		timer@2000000 {
-			compatible = "qcom,scss-timer", "qcom,msm-timer";
-			interrupts = <1 0 0x301>,
-				     <1 1 0x301>,
-				     <1 2 0x301>;
-			reg = <0x02000000 0x100>;
-			clock-frequency = <27000000>,
-					  <32768>;
-			cpu-offset = <0x40000>;
-		};
-
-		msmgpio: gpio@800000 {
-			compatible = "qcom,msm-gpio";
-			reg = <0x00800000 0x4000>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpio = <173>;
-			interrupts = <0 16 0x4>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gcc: clock-controller@900000 {
-			compatible = "qcom,gcc-msm8660";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			reg = <0x900000 0x4000>;
-		};
-
-		gsbi12: gsbi@19c00000 {
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x19c00000 0x100>;
-			clocks = <&gcc GSBI12_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			serial@19c40000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x19c40000 0x1000>,
-				      <0x19c00000 0x1000>;
-				interrupts = <0 195 0x0>;
-				clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-		};
-
-		qcom,ssbi@500000 {
-			compatible = "qcom,ssbi";
-			reg = <0x500000 0x1000>;
-			qcom,controller-type = "pmic-arbiter";
-
-			pmicintc: pmic@0 {
-				compatible = "qcom,pm8058";
-				interrupt-parent = <&msmgpio>;
-				interrupts = <88 8>;
-				#interrupt-cells = <2>;
-				interrupt-controller;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				pwrkey@1c {
-					compatible = "qcom,pm8058-pwrkey";
-					reg = <0x1c>;
-					interrupt-parent = <&pmicintc>;
-					interrupts = <50 1>, <51 1>;
-					debounce = <15625>;
-					pull-up;
-				};
-
-				keypad@148 {
-					compatible = "qcom,pm8058-keypad";
-					reg = <0x148>;
-					interrupt-parent = <&pmicintc>;
-					interrupts = <74 1>, <75 1>;
-					debounce = <15>;
-					scan-delay = <32>;
-					row-hold = <91500>;
-				};
-
-				rtc@11d {
-					compatible = "qcom,pm8058-rtc";
-					interrupt-parent = <&pmicintc>;
-					interrupts = <39 1>;
-					reg = <0x11d>;
-					allow-set-time;
-				};
-
-				vibrator@4a {
-					compatible = "qcom,pm8058-vib";
-					reg = <0x4a>;
-				};
-			};
-		};
-
-		/* Temporary fixed regulator */
-		vsdcc_fixed: vsdcc-regulator {
-			compatible = "regulator-fixed";
-			regulator-name = "SDCC Power";
-			regulator-min-microvolt = <2700000>;
-			regulator-max-microvolt = <2700000>;
-			regulator-always-on;
-		};
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			sdcc1: sdcc@12400000 {
-				status		= "disabled";
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				reg		= <0x12400000 0x8000>;
-				interrupts	= <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <8>;
-				max-frequency	= <48000000>;
-				non-removable;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				vmmc-supply = <&vsdcc_fixed>;
-			};
-
-			sdcc3: sdcc@12180000 {
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				status		= "disabled";
-				reg		= <0x12180000 0x8000>;
-				interrupts	= <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <4>;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				max-frequency	= <48000000>;
-				no-1-8-v;
-				vmmc-supply = <&vsdcc_fixed>;
-			};
-		};
-	};
-
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8960-cdp.dts b/sys/gnu/dts/arm/qcom-msm8960-cdp.dts
deleted file mode 100644
index 7f70fae9095..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8960-cdp.dts
+++ /dev/null
@@ -1,43 +0,0 @@
-#include <dt-bindings/input/input.h>
-
-#include "qcom-msm8960.dtsi"
-
-/ {
-	model = "Qualcomm MSM8960 CDP";
-	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
-
-	soc {
-		gsbi@16400000 {
-			status = "ok";
-			qcom,mode = <GSBI_PROT_I2C_UART>;
-			serial@16440000 {
-				status = "ok";
-			};
-		};
-
-		amba {
-			/* eMMC */
-			sdcc1: sdcc@12400000 {
-				status = "okay";
-			};
-
-			/* External micro SD card */
-			sdcc3: sdcc@12180000 {
-				status = "okay";
-			};
-		};
-	};
-};
-
-&pmicintc {
-	keypad@148 {
-		linux,keymap = <
-			MATRIX_KEY(0, 0, KEY_VOLUMEUP)
-			MATRIX_KEY(0, 1, KEY_VOLUMEDOWN)
-			MATRIX_KEY(0, 2, KEY_CAMERA_FOCUS)
-			MATRIX_KEY(0, 3, KEY_CAMERA)
-			>;
-		keypad,num-rows = <1>;
-		keypad,num-columns = <5>;
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8960.dtsi b/sys/gnu/dts/arm/qcom-msm8960.dtsi
deleted file mode 100644
index e1b0d5cd9e3..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8960.dtsi
+++ /dev/null
@@ -1,242 +0,0 @@
-/dts-v1/;
-
-/include/ "skeleton.dtsi"
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-msm8960.h>
-#include <dt-bindings/soc/qcom,gsbi.h>
-
-/ {
-	model = "Qualcomm MSM8960";
-	compatible = "qcom,msm8960";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <1 14 0x304>;
-
-		cpu@0 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc0>;
-			qcom,saw = <&saw0>;
-		};
-
-		cpu@1 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v1";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc1>;
-			qcom,saw = <&saw1>;
-		};
-
-		L2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <1 10 0x304>;
-		qcom,no-pc-write;
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		intc: interrupt-controller@2000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0x02000000 0x1000>,
-			      <0x02002000 0x1000>;
-		};
-
-		timer@200a000 {
-			compatible = "qcom,kpss-timer", "qcom,msm-timer";
-			interrupts = <1 1 0x301>,
-				     <1 2 0x301>,
-				     <1 3 0x301>;
-			reg = <0x0200a000 0x100>;
-			clock-frequency = <27000000>,
-					  <32768>;
-			cpu-offset = <0x80000>;
-		};
-
-		msmgpio: gpio@800000 {
-			compatible = "qcom,msm-gpio";
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpio = <150>;
-			interrupts = <0 16 0x4>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			reg = <0x800000 0x4000>;
-		};
-
-		gcc: clock-controller@900000 {
-			compatible = "qcom,gcc-msm8960";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			reg = <0x900000 0x4000>;
-		};
-
-		clock-controller@4000000 {
-			compatible = "qcom,mmcc-msm8960";
-			reg = <0x4000000 0x1000>;
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-
-		acc0: clock-controller@2088000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		acc1: clock-controller@2098000 {
-			compatible = "qcom,kpss-acc-v1";
-			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-		};
-
-		saw0: regulator@2089000 {
-			compatible = "qcom,saw2";
-			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		saw1: regulator@2099000 {
-			compatible = "qcom,saw2";
-			reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
-			regulator;
-		};
-
-		gsbi5: gsbi@16400000 {
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x16400000 0x100>;
-			clocks = <&gcc GSBI5_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			serial@16440000 {
-				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-				reg = <0x16440000 0x1000>,
-				      <0x16400000 0x1000>;
-				interrupts = <0 154 0x0>;
-				clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
-				clock-names = "core", "iface";
-				status = "disabled";
-			};
-		};
-
-		qcom,ssbi@500000 {
-			compatible = "qcom,ssbi";
-			reg = <0x500000 0x1000>;
-			qcom,controller-type = "pmic-arbiter";
-
-			pmicintc: pmic@0 {
-				compatible = "qcom,pm8921";
-				interrupt-parent = <&msmgpio>;
-				interrupts = <104 8>;
-				#interrupt-cells = <2>;
-				interrupt-controller;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				pwrkey@1c {
-					compatible = "qcom,pm8921-pwrkey";
-					reg = <0x1c>;
-					interrupt-parent = <&pmicintc>;
-					interrupts = <50 1>, <51 1>;
-					debounce = <15625>;
-					pull-up;
-				};
-
-				keypad@148 {
-					compatible = "qcom,pm8921-keypad";
-					reg = <0x148>;
-					interrupt-parent = <&pmicintc>;
-					interrupts = <74 1>, <75 1>;
-					debounce = <15>;
-					scan-delay = <32>;
-					row-hold = <91500>;
-				};
-
-				rtc@11d {
-					compatible = "qcom,pm8921-rtc";
-					interrupt-parent = <&pmicintc>;
-					interrupts = <39 1>;
-					reg = <0x11d>;
-					allow-set-time;
-				};
-			};
-		};
-
-		rng@1a500000 {
-			compatible = "qcom,prng";
-			reg = <0x1a500000 0x200>;
-			clocks = <&gcc PRNG_CLK>;
-			clock-names = "core";
-		};
-
-		/* Temporary fixed regulator */
-		vsdcc_fixed: vsdcc-regulator {
-			compatible = "regulator-fixed";
-			regulator-name = "SDCC Power";
-			regulator-min-microvolt = <2700000>;
-			regulator-max-microvolt = <2700000>;
-			regulator-always-on;
-		};
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			sdcc1: sdcc@12400000 {
-				status		= "disabled";
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				reg		= <0x12400000 0x8000>;
-				interrupts	= <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <8>;
-				max-frequency	= <96000000>;
-				non-removable;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				vmmc-supply = <&vsdcc_fixed>;
-			};
-
-			sdcc3: sdcc@12180000 {
-				compatible	= "arm,pl18x", "arm,primecell";
-				arm,primecell-periphid = <0x00051180>;
-				status		= "disabled";
-				reg		= <0x12180000 0x8000>;
-				interrupts	= <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names	= "cmd_irq";
-				clocks		= <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
-				clock-names	= "mclk", "apb_pclk";
-				bus-width	= <4>;
-				cap-sd-highspeed;
-				cap-mmc-highspeed;
-				max-frequency	= <192000000>;
-				no-1-8-v;
-				vmmc-supply = <&vsdcc_fixed>;
-			};
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8974-sony-xperia-honami.dts b/sys/gnu/dts/arm/qcom-msm8974-sony-xperia-honami.dts
deleted file mode 100644
index cccc21b7c8f..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8974-sony-xperia-honami.dts
+++ /dev/null
@@ -1,17 +0,0 @@
-#include "qcom-msm8974.dtsi"
-
-/ {
-	model = "Sony Xperia Z1";
-	compatible = "sony,xperia-honami", "qcom,msm8974";
-
-	memory@0 {
-		reg = <0 0x40000000>, <0x40000000 0x40000000>;
-		device_type = "memory";
-	};
-};
-
-&soc {
-	serial@f991e000 {
-		status = "ok";
-	};
-};
diff --git a/sys/gnu/dts/arm/qcom-msm8974.dtsi b/sys/gnu/dts/arm/qcom-msm8974.dtsi
deleted file mode 100644
index e265ec16a78..00000000000
--- a/sys/gnu/dts/arm/qcom-msm8974.dtsi
+++ /dev/null
@@ -1,251 +0,0 @@
-/dts-v1/;
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clock/qcom,gcc-msm8974.h>
-#include "skeleton.dtsi"
-
-/ {
-	model = "Qualcomm MSM8974";
-	compatible = "qcom,msm8974";
-	interrupt-parent = <&intc>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <1 9 0xf04>;
-
-		cpu@0 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v2";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc0>;
-		};
-
-		cpu@1 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v2";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc1>;
-		};
-
-		cpu@2 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v2";
-			device_type = "cpu";
-			reg = <2>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc2>;
-		};
-
-		cpu@3 {
-			compatible = "qcom,krait";
-			enable-method = "qcom,kpss-acc-v2";
-			device_type = "cpu";
-			reg = <3>;
-			next-level-cache = <&L2>;
-			qcom,acc = <&acc3>;
-		};
-
-		L2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-			qcom,saw = <&saw_l2>;
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <1 7 0xf04>;
-	};
-
-	timer {
-		compatible = "arm,armv7-timer";
-		interrupts = <1 2 0xf08>,
-			     <1 3 0xf08>,
-			     <1 4 0xf08>,
-			     <1 1 0xf08>;
-		clock-frequency = <19200000>;
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		intc: interrupt-controller@f9000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0xf9000000 0x1000>,
-			      <0xf9002000 0x1000>;
-		};
-
-		timer@f9020000 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			compatible = "arm,armv7-timer-mem";
-			reg = <0xf9020000 0x1000>;
-			clock-frequency = <19200000>;
-
-			frame@f9021000 {
-				frame-number = <0>;
-				interrupts = <0 8 0x4>,
-					     <0 7 0x4>;
-				reg = <0xf9021000 0x1000>,
-				      <0xf9022000 0x1000>;
-			};
-
-			frame@f9023000 {
-				frame-number = <1>;
-				interrupts = <0 9 0x4>;
-				reg = <0xf9023000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9024000 {
-				frame-number = <2>;
-				interrupts = <0 10 0x4>;
-				reg = <0xf9024000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9025000 {
-				frame-number = <3>;
-				interrupts = <0 11 0x4>;
-				reg = <0xf9025000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9026000 {
-				frame-number = <4>;
-				interrupts = <0 12 0x4>;
-				reg = <0xf9026000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9027000 {
-				frame-number = <5>;
-				interrupts = <0 13 0x4>;
-				reg = <0xf9027000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9028000 {
-				frame-number = <6>;
-				interrupts = <0 14 0x4>;
-				reg = <0xf9028000 0x1000>;
-				status = "disabled";
-			};
-		};
-
-		saw_l2: regulator@f9012000 {
-			compatible = "qcom,saw2";
-			reg = <0xf9012000 0x1000>;
-			regulator;
-		};
-
-		acc0: clock-controller@f9088000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
-		};
-
-		acc1: clock-controller@f9098000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
-		};
-
-		acc2: clock-controller@f90a8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
-		};
-
-		acc3: clock-controller@f90b8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
-		};
-
-		restart@fc4ab000 {
-			compatible = "qcom,pshold";
-			reg = <0xfc4ab000 0x4>;
-		};
-
-		gcc: clock-controller@fc400000 {
-			compatible = "qcom,gcc-msm8974";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			reg = <0xfc400000 0x4000>;
-		};
-
-		mmcc: clock-controller@fd8c0000 {
-			compatible = "qcom,mmcc-msm8974";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			reg = <0xfd8c0000 0x6000>;
-		};
-
-		serial@f991e000 {
-			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
-			reg = <0xf991e000 0x1000>;
-			interrupts = <0 108 0x0>;
-			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		sdhci@f9824900 {
-			compatible = "qcom,sdhci-msm-v4";
-			reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-			reg-names = "hc_mem", "core_mem";
-			interrupts = <0 123 0>, <0 138 0>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		sdhci@f98a4900 {
-			compatible = "qcom,sdhci-msm-v4";
-			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-			reg-names = "hc_mem", "core_mem";
-			interrupts = <0 125 0>, <0 221 0>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		rng@f9bff000 {
-			compatible = "qcom,prng";
-			reg = <0xf9bff000 0x200>;
-			clocks = <&gcc GCC_PRNG_AHB_CLK>;
-			clock-names = "core";
-		};
-
-		msmgpio: pinctrl@fd510000 {
-			compatible = "qcom,msm8974-pinctrl";
-			reg = <0xfd510000 0x4000>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <0 208 0>;
-		};
-
-		blsp_i2c11: i2c@f9967000 {
-			status = "disable";
-			compatible = "qcom,i2c-qup-v2.1.1";
-			reg = <0xf9967000 0x1000>;
-			interrupts = <0 105 IRQ_TYPE_NONE>;
-			clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
-			clock-names = "core", "iface";
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/s3c6400.dtsi b/sys/gnu/dts/arm/s3c6400.dtsi
deleted file mode 100644
index a7d1c8ec150..00000000000
--- a/sys/gnu/dts/arm/s3c6400.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Samsung's S3C6400 SoC device tree source
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400
- * based board files can include this file and provide values for board specfic
- * bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * S3C6400 SoC. As device tree coverage for S3C6400 increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include "s3c64xx.dtsi"
-
-/ {
-	compatible = "samsung,s3c6400";
-};
-
-&vic0 {
-	valid-mask = <0xfffffe1f>;
-	valid-wakeup-mask = <0x00200004>;
-};
-
-&vic1 {
-	valid-mask = <0xffffffff>;
-	valid-wakeup-mask = <0x53020000>;
-};
-
-&soc {
-	clocks: clock-controller@7e00f000 {
-		compatible = "samsung,s3c6400-clock";
-		reg = <0x7e00f000 0x1000>;
-		#clock-cells = <1>;
-	};
-};
diff --git a/sys/gnu/dts/arm/s3c6410-mini6410.dts b/sys/gnu/dts/arm/s3c6410-mini6410.dts
deleted file mode 100644
index a25debb5040..00000000000
--- a/sys/gnu/dts/arm/s3c6410-mini6410.dts
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * Samsung's S3C6410 based Mini6410 board device tree source
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Device tree source file for FriendlyARM Mini6410 board which is based on
- * Samsung's S3C6410 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#include "s3c6410.dtsi"
-
-/ {
-	model = "FriendlyARM Mini6410 board based on S3C6410";
-	compatible = "friendlyarm,mini6410", "samsung,s3c6410";
-
-	memory {
-		reg = <0x50000000 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
-	};
-
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		fin_pll: oscillator@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			clock-frequency = <12000000>;
-			clock-output-names = "fin_pll";
-			#clock-cells = <0>;
-		};
-
-		xusbxti: oscillator@1 {
-			compatible = "fixed-clock";
-			reg = <1>;
-			clock-output-names = "xusbxti";
-			clock-frequency = <48000000>;
-			#clock-cells = <0>;
-		};
-	};
-
-	srom-cs1@18000000 {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x18000000 0x8000000>;
-		ranges;
-
-		ethernet@18000000 {
-			compatible = "davicom,dm9000";
-			reg = <0x18000000 0x2 0x18000004 0x2>;
-			interrupt-parent = <&gpn>;
-			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
-			davicom,no-eeprom;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-names = "default";
-		pinctrl-0 = <&gpio_keys>;
-		autorepeat;
-
-		button-k1 {
-			label = "K1";
-			gpios = <&gpn 0 GPIO_ACTIVE_LOW>;
-			linux,code = <2>;
-			debounce-interval = <20>;
-		};
-
-		button-k2 {
-			label = "K2";
-			gpios = <&gpn 1 GPIO_ACTIVE_LOW>;
-			linux,code = <3>;
-			debounce-interval = <20>;
-		};
-
-		button-k3 {
-			label = "K3";
-			gpios = <&gpn 2 GPIO_ACTIVE_LOW>;
-			linux,code = <4>;
-			debounce-interval = <20>;
-		};
-
-		button-k4 {
-			label = "K4";
-			gpios = <&gpn 3 GPIO_ACTIVE_LOW>;
-			linux,code = <5>;
-			debounce-interval = <20>;
-		};
-
-		button-k5 {
-			label = "K5";
-			gpios = <&gpn 4 GPIO_ACTIVE_LOW>;
-			linux,code = <6>;
-			debounce-interval = <20>;
-		};
-
-		button-k6 {
-			label = "K6";
-			gpios = <&gpn 5 GPIO_ACTIVE_LOW>;
-			linux,code = <7>;
-			debounce-interval = <20>;
-		};
-
-		button-k7 {
-			label = "K7";
-			gpios = <&gpl 11 GPIO_ACTIVE_LOW>;
-			linux,code = <8>;
-			debounce-interval = <20>;
-		};
-
-		button-k8 {
-			label = "K8";
-			gpios = <&gpl 12 GPIO_ACTIVE_LOW>;
-			linux,code = <9>;
-			debounce-interval = <20>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&gpio_leds>;
-
-		led-1 {
-			label = "LED1";
-			gpios = <&gpk 4 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led-2 {
-			label = "LED2";
-			gpios = <&gpk 5 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "mmc0";
-		};
-
-		led-3 {
-			label = "LED3";
-			gpios = <&gpk 6 GPIO_ACTIVE_LOW>;
-		};
-
-		led-4 {
-			label = "LED4";
-			gpios = <&gpk 7 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	buzzer {
-		compatible = "pwm-beeper";
-		pwms = <&pwm 0 1000000 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pwm0_out>;
-	};
-};
-
-&sdhci0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
-	bus-width = <4>;
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_data>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_data>, <&uart1_fctl>;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_data>;
-	status = "okay";
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_data>;
-	status = "okay";
-};
-
-&pinctrl0 {
-	gpio_leds: gpio-leds {
-		samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7";
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	gpio_keys: gpio-keys {
-		samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3",
-				"gpn-4", "gpn-5", "gpl-11", "gpl-12";
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-};
-
-&i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_bus>;
-	status = "okay";
-
-	eeprom@50 {
-		compatible = "atmel,24c08";
-		reg = <0x50>;
-		pagesize = <16>;
-	};
-};
diff --git a/sys/gnu/dts/arm/s3c6410-smdk6410.dts b/sys/gnu/dts/arm/s3c6410-smdk6410.dts
deleted file mode 100644
index ecf35ec466f..00000000000
--- a/sys/gnu/dts/arm/s3c6410-smdk6410.dts
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * Samsung S3C6410 based SMDK6410 board device tree source.
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Device tree source file for SAMSUNG SMDK6410 board which is based on
- * Samsung's S3C6410 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#include "s3c6410.dtsi"
-
-/ {
-	model = "SAMSUNG SMDK6410 board based on S3C6410";
-	compatible = "samsung,mini6410", "samsung,s3c6410";
-
-	memory {
-		reg = <0x50000000 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
-	};
-
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		fin_pll: oscillator@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			clock-frequency = <12000000>;
-			clock-output-names = "fin_pll";
-			#clock-cells = <0>;
-		};
-
-		xusbxti: oscillator@1 {
-			compatible = "fixed-clock";
-			reg = <1>;
-			clock-output-names = "xusbxti";
-			clock-frequency = <48000000>;
-			#clock-cells = <0>;
-		};
-	};
-
-	srom-cs1@18000000 {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x18000000 0x8000000>;
-		ranges;
-
-		ethernet@18000000 {
-			compatible = "smsc,lan9115";
-			reg = <0x18000000 0x10000>;
-			interrupt-parent = <&gpn>;
-			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
-			phy-mode = "mii";
-			reg-io-width = <4>;
-			smsc,force-internal-phy;
-		};
-	};
-};
-
-&sdhci0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
-	bus-width = <4>;
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_data>;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_data>;
-	status = "okay";
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_data>;
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/s3c6410.dtsi b/sys/gnu/dts/arm/s3c6410.dtsi
deleted file mode 100644
index eb4226b3407..00000000000
--- a/sys/gnu/dts/arm/s3c6410.dtsi
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Samsung's S3C6410 SoC device tree source
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410
- * based board files can include this file and provide values for board specfic
- * bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include "s3c64xx.dtsi"
-
-/ {
-	compatible = "samsung,s3c6410";
-
-	aliases {
-		i2c1 = &i2c1;
-	};
-};
-
-&vic0 {
-	valid-mask = <0xffffff7f>;
-	valid-wakeup-mask = <0x00200004>;
-};
-
-&vic1 {
-	valid-mask = <0xffffffff>;
-	valid-wakeup-mask = <0x53020000>;
-};
-
-&soc {
-	clocks: clock-controller@7e00f000 {
-		compatible = "samsung,s3c6410-clock";
-		reg = <0x7e00f000 0x1000>;
-		#clock-cells = <1>;
-	};
-
-	i2c1: i2c@7f00f000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x7f00f000 0x1000>;
-		interrupt-parent = <&vic0>;
-		interrupts = <5>;
-		clock-names = "i2c";
-		clocks = <&clocks PCLK_IIC1>;
-		status = "disabled";
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-};
diff --git a/sys/gnu/dts/arm/s3c64xx-pinctrl.dtsi b/sys/gnu/dts/arm/s3c64xx-pinctrl.dtsi
deleted file mode 100644
index b1197d8b04d..00000000000
--- a/sys/gnu/dts/arm/s3c64xx-pinctrl.dtsi
+++ /dev/null
@@ -1,687 +0,0 @@
-/*
- * Samsung's S3C64xx SoC series common device tree source
- * - pin control-related definitions
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
- * listed as device tree nodes in this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define PIN_PULL_NONE	0
-#define PIN_PULL_DOWN	1
-#define PIN_PULL_UP	2
-
-&pinctrl0 {
-	/*
-	 * Pin banks
-	 */
-
-	gpa: gpa {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpb: gpb {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpc: gpc {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpd: gpd {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpe: gpe {
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	gpf: gpf {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpg: gpg {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gph: gph {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpi: gpi {
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	gpj: gpj {
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	gpk: gpk {
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	gpl: gpl {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpm: gpm {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpn: gpn {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpo: gpo {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpp: gpp {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	gpq: gpq {
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-	};
-
-	/*
-	 * Pin groups
-	 */
-
-	uart0_data: uart0-data {
-		samsung,pins = "gpa-0", "gpa-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	uart0_fctl: uart0-fctl {
-		samsung,pins = "gpa-2", "gpa-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	uart1_data: uart1-data {
-		samsung,pins = "gpa-4", "gpa-5";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	uart1_fctl: uart1-fctl {
-		samsung,pins = "gpa-6", "gpa-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	uart2_data: uart2-data {
-		samsung,pins = "gpb-0", "gpb-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	uart3_data: uart3-data {
-		samsung,pins = "gpb-2", "gpb-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	ext_dma_0: ext-dma-0 {
-		samsung,pins = "gpb-0", "gpb-1";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	ext_dma_1: ext-dma-1 {
-		samsung,pins = "gpb-2", "gpb-3";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	irda_data_0: irda-data-0 {
-		samsung,pins = "gpb-0", "gpb-1";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	irda_data_1: irda-data-1 {
-		samsung,pins = "gpb-2", "gpb-3";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	irda_sdbw: irda-sdbw {
-		samsung,pins = "gpb-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2c0_bus: i2c0-bus {
-		samsung,pins = "gpb-5", "gpb-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	i2c1_bus: i2c1-bus {
-		/* S3C6410-only */
-		samsung,pins = "gpb-2", "gpb-3";
-		samsung,pin-function = <6>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	spi0_bus: spi0-bus {
-		samsung,pins = "gpc-0", "gpc-1", "gpc-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	spi0_cs: spi0-cs {
-		samsung,pins = "gpc-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	spi1_bus: spi1-bus {
-		samsung,pins = "gpc-4", "gpc-5", "gpc-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	spi1_cs: spi1-cs {
-		samsung,pins = "gpc-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd0_cmd: sd0-cmd {
-		samsung,pins = "gpg-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd0_clk: sd0-clk {
-		samsung,pins = "gpg-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd0_bus1: sd0-bus1 {
-		samsung,pins = "gpg-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd0_bus4: sd0-bus4 {
-		samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd0_cd: sd0-cd {
-		samsung,pins = "gpg-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	sd1_cmd: sd1-cmd {
-		samsung,pins = "gph-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd1_clk: sd1-clk {
-		samsung,pins = "gph-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd1_bus1: sd1-bus1 {
-		samsung,pins = "gph-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd1_bus4: sd1-bus4 {
-		samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd1_bus8: sd1-bus8 {
-		samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5",
-				"gph-6", "gph-7", "gph-8", "gph-9";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd1_cd: sd1-cd {
-		samsung,pins = "gpg-6";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_UP>;
-	};
-
-	sd2_cmd: sd2-cmd {
-		samsung,pins = "gpc-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd2_clk: sd2-clk {
-		samsung,pins = "gpc-5";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd2_bus1: sd2-bus1 {
-		samsung,pins = "gph-6";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	sd2_bus4: sd2-bus4 {
-		samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s0_bus: i2s0-bus {
-		samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s0_cdclk: i2s0-cdclk {
-		samsung,pins = "gpd-1";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s1_bus: i2s1-bus {
-		samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s1_cdclk: i2s1-cdclk {
-		samsung,pins = "gpe-1";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s2_bus: i2s2-bus {
-		/* S3C6410-only */
-		samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6",
-				"gph-8", "gph-9";
-		samsung,pin-function = <5>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	i2s2_cdclk: i2s2-cdclk {
-		/* S3C6410-only */
-		samsung,pins = "gph-7";
-		samsung,pin-function = <5>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pcm0_bus: pcm0-bus {
-		samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pcm0_extclk: pcm0-extclk {
-		samsung,pins = "gpd-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pcm1_bus: pcm1-bus {
-		samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pcm1_extclk: pcm1-extclk {
-		samsung,pins = "gpe-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	ac97_bus_0: ac97-bus-0 {
-		samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	ac97_bus_1: ac97-bus-1 {
-		samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	cam_port: cam-port {
-		samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4",
-				"gpf-5", "gpf-6", "gpf-7", "gpf-8",
-				"gpf-9", "gpf-10", "gpf-11", "gpf-12";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	cam_rst: cam-rst {
-		samsung,pins = "gpf-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	cam_field: cam-field {
-		/* S3C6410-only */
-		samsung,pins = "gpb-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pwm_extclk: pwm-extclk {
-		samsung,pins = "gpf-13";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pwm0_out: pwm0-out {
-		samsung,pins = "gpf-14";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	pwm1_out: pwm1-out {
-		samsung,pins = "gpf-15";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	clkout0: clkout-0 {
-		samsung,pins = "gpf-14";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col0_0: keypad-col0-0 {
-		samsung,pins = "gph-0";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col1_0: keypad-col1-0 {
-		samsung,pins = "gph-1";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col2_0: keypad-col2-0 {
-		samsung,pins = "gph-2";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col3_0: keypad-col3-0 {
-		samsung,pins = "gph-3";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col4_0: keypad-col4-0 {
-		samsung,pins = "gph-4";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col5_0: keypad-col5-0 {
-		samsung,pins = "gph-5";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col6_0: keypad-col6-0 {
-		samsung,pins = "gph-6";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col7_0: keypad-col7-0 {
-		samsung,pins = "gph-7";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col0_1: keypad-col0-1 {
-		samsung,pins = "gpl-0";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col1_1: keypad-col1-1 {
-		samsung,pins = "gpl-1";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col2_1: keypad-col2-1 {
-		samsung,pins = "gpl-2";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col3_1: keypad-col3-1 {
-		samsung,pins = "gpl-3";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col4_1: keypad-col4-1 {
-		samsung,pins = "gpl-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col5_1: keypad-col5-1 {
-		samsung,pins = "gpl-5";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col6_1: keypad-col6-1 {
-		samsung,pins = "gpl-6";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_col7_1: keypad-col7-1 {
-		samsung,pins = "gpl-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row0_0: keypad-row0-0 {
-		samsung,pins = "gpk-8";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row1_0: keypad-row1-0 {
-		samsung,pins = "gpk-9";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row2_0: keypad-row2-0 {
-		samsung,pins = "gpk-10";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row3_0: keypad-row3-0 {
-		samsung,pins = "gpk-11";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row4_0: keypad-row4-0 {
-		samsung,pins = "gpk-12";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row5_0: keypad-row5-0 {
-		samsung,pins = "gpk-13";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row6_0: keypad-row6-0 {
-		samsung,pins = "gpk-14";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row7_0: keypad-row7-0 {
-		samsung,pins = "gpk-15";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row0_1: keypad-row0-1 {
-		samsung,pins = "gpn-0";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row1_1: keypad-row1-1 {
-		samsung,pins = "gpn-1";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row2_1: keypad-row2-1 {
-		samsung,pins = "gpn-2";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row3_1: keypad-row3-1 {
-		samsung,pins = "gpn-3";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row4_1: keypad-row4-1 {
-		samsung,pins = "gpn-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row5_1: keypad-row5-1 {
-		samsung,pins = "gpn-5";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row6_1: keypad-row6-1 {
-		samsung,pins = "gpn-6";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	keypad_row7_1: keypad-row7-1 {
-		samsung,pins = "gpn-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	lcd_ctrl: lcd-ctrl {
-		samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	lcd_data16: lcd-data-width16 {
-		samsung,pins = "gpi-3", "gpi-4", "gpi-5", "gpi-6",
-				"gpi-7", "gpi-10", "gpi-11", "gpi-12",
-				"gpi-13", "gpi-14", "gpi-15", "gpj-3",
-				"gpj-4", "gpj-5", "gpj-6", "gpj-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	lcd_data18: lcd-data-width18 {
-		samsung,pins = "gpi-2", "gpi-3", "gpi-4", "gpi-5",
-				"gpi-6", "gpi-7", "gpi-10", "gpi-11",
-				"gpi-12", "gpi-13", "gpi-14", "gpi-15",
-				"gpj-2", "gpj-3", "gpj-4", "gpj-5",
-				"gpj-6", "gpj-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	lcd_data24: lcd-data-width24 {
-		samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3",
-				"gpi-4", "gpi-5", "gpi-6", "gpi-7",
-				"gpi-8", "gpi-9", "gpi-10", "gpi-11",
-				"gpi-12", "gpi-13", "gpi-14", "gpi-15",
-				"gpj-0", "gpj-1", "gpj-2", "gpj-3",
-				"gpj-4", "gpj-5", "gpj-6", "gpj-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-
-	hsi_bus: hsi-bus {
-		samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3",
-				"gpk-4", "gpk-5", "gpk-6", "gpk-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <PIN_PULL_NONE>;
-	};
-};
diff --git a/sys/gnu/dts/arm/s3c64xx.dtsi b/sys/gnu/dts/arm/s3c64xx.dtsi
deleted file mode 100644
index 0ccb414cd26..00000000000
--- a/sys/gnu/dts/arm/s3c64xx.dtsi
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * Samsung's S3C64xx SoC series common device tree source
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Samsung's S3C64xx SoC series device nodes are listed in this file.
- * Particular SoCs from S3C64xx series can include this file and provide
- * values for SoCs specfic bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/samsung,s3c64xx-clock.h>
-
-/ {
-	aliases {
-		i2c0 = &i2c0;
-		pinctrl0 = &pinctrl0;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		serial2 = &uart2;
-		serial3 = &uart3;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,arm1176jzf-s", "arm,arm1176";
-			reg = <0x0>;
-		};
-	};
-
-	soc: soc {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		vic0: interrupt-controller@71200000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x71200000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		vic1: interrupt-controller@71300000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x71300000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		sdhci0: sdhci@7c200000 {
-			compatible = "samsung,s3c6410-sdhci";
-			reg = <0x7c200000 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <24>;
-			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
-			clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
-					<&clocks SCLK_MMC0>;
-			status = "disabled";
-		};
-
-		sdhci1: sdhci@7c300000 {
-			compatible = "samsung,s3c6410-sdhci";
-			reg = <0x7c300000 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <25>;
-			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
-			clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
-					<&clocks SCLK_MMC1>;
-			status = "disabled";
-		};
-
-		sdhci2: sdhci@7c400000 {
-			compatible = "samsung,s3c6410-sdhci";
-			reg = <0x7c400000 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <17>;
-			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
-			clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
-					<&clocks SCLK_MMC2>;
-			status = "disabled";
-		};
-
-		watchdog: watchdog@7e004000 {
-			compatible = "samsung,s3c2410-wdt";
-			reg = <0x7e004000 0x1000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <26>;
-			clock-names = "watchdog";
-			clocks = <&clocks PCLK_WDT>;
-			status = "disabled";
-		};
-
-		i2c0: i2c@7f004000 {
-			compatible = "samsung,s3c2440-i2c";
-			reg = <0x7f004000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <18>;
-			clock-names = "i2c";
-			clocks = <&clocks PCLK_IIC0>;
-			status = "disabled";
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		uart0: serial@7f005000 {
-			compatible = "samsung,s3c6400-uart";
-			reg = <0x7f005000 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <5>;
-			clock-names = "uart", "clk_uart_baud2",
-					"clk_uart_baud3";
-			clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
-					<&clocks SCLK_UART>;
-			status = "disabled";
-		};
-
-		uart1: serial@7f005400 {
-			compatible = "samsung,s3c6400-uart";
-			reg = <0x7f005400 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <6>;
-			clock-names = "uart", "clk_uart_baud2",
-					"clk_uart_baud3";
-			clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
-					<&clocks SCLK_UART>;
-			status = "disabled";
-		};
-
-		uart2: serial@7f005800 {
-			compatible = "samsung,s3c6400-uart";
-			reg = <0x7f005800 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <7>;
-			clock-names = "uart", "clk_uart_baud2",
-					"clk_uart_baud3";
-			clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
-					<&clocks SCLK_UART>;
-			status = "disabled";
-		};
-
-		uart3: serial@7f005c00 {
-			compatible = "samsung,s3c6400-uart";
-			reg = <0x7f005c00 0x100>;
-			interrupt-parent = <&vic1>;
-			interrupts = <8>;
-			clock-names = "uart", "clk_uart_baud2",
-					"clk_uart_baud3";
-			clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
-					<&clocks SCLK_UART>;
-			status = "disabled";
-		};
-
-		pwm: pwm@7f006000 {
-			compatible = "samsung,s3c6400-pwm";
-			reg = <0x7f006000 0x1000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <23>, <24>, <25>, <27>, <28>;
-			clock-names = "timers";
-			clocks = <&clocks PCLK_PWM>;
-			samsung,pwm-outputs = <0>, <1>;
-			#pwm-cells = <3>;
-		};
-
-		pinctrl0: pinctrl@7f008000 {
-			compatible = "samsung,s3c64xx-pinctrl";
-			reg = <0x7f008000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <21>;
-
-			pctrl_int_map: pinctrl-interrupt-map {
-				interrupt-map = <0 &vic0 0>,
-						<1 &vic0 1>,
-						<2 &vic1 0>,
-						<3 &vic1 1>;
-				#address-cells = <0>;
-				#size-cells = <0>;
-				#interrupt-cells = <1>;
-			};
-
-			wakeup-interrupt-controller {
-				compatible = "samsung,s3c64xx-wakeup-eint";
-				interrupts = <0>, <1>, <2>, <3>;
-				interrupt-parent = <&pctrl_int_map>;
-			};
-		};
-	};
-};
-
-#include "s3c64xx-pinctrl.dtsi"
diff --git a/sys/gnu/dts/arm/socfpga.dtsi b/sys/gnu/dts/arm/socfpga.dtsi
deleted file mode 100644
index 252c3d1bda5..00000000000
--- a/sys/gnu/dts/arm/socfpga.dtsi
+++ /dev/null
@@ -1,782 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/reset/altr,rst-mgr.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		timer0 = &timer0;
-		timer1 = &timer1;
-		timer2 = &timer2;
-		timer3 = &timer3;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	intc: intc@fffed000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		reg = <0xfffed000 0x1000>,
-		      <0xfffec100 0x100>;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		device_type = "soc";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			pdma: pdma@ffe01000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0xffe01000 0x1000>;
-				interrupts = <0 104 4>,
-					     <0 105 4>,
-					     <0 106 4>,
-					     <0 107 4>,
-					     <0 108 4>,
-					     <0 109 4>,
-					     <0 110 4>,
-					     <0 111 4>;
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-				clocks = <&l4_main_clk>;
-				clock-names = "apb_pclk";
-			};
-		};
-
-		can0: can@ffc00000 {
-			compatible = "bosch,d_can";
-			reg = <0xffc00000 0x1000>;
-			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
-			clocks = <&can0_clk>;
-			status = "disabled";
-		};
-
-		can1: can@ffc01000 {
-			compatible = "bosch,d_can";
-			reg = <0xffc01000 0x1000>;
-			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
-			clocks = <&can1_clk>;
-			status = "disabled";
-		};
-
-		clkmgr@ffd04000 {
-				compatible = "altr,clk-mgr";
-				reg = <0xffd04000 0x1000>;
-
-				clocks {
-					#address-cells = <1>;
-					#size-cells = <0>;
-
-					osc1: osc1 {
-						#clock-cells = <0>;
-						compatible = "fixed-clock";
-					};
-
-					osc2: osc2 {
-						#clock-cells = <0>;
-						compatible = "fixed-clock";
-					};
-
-					f2s_periph_ref_clk: f2s_periph_ref_clk {
-						#clock-cells = <0>;
-						compatible = "fixed-clock";
-					};
-
-					f2s_sdram_ref_clk: f2s_sdram_ref_clk {
-						#clock-cells = <0>;
-						compatible = "fixed-clock";
-					};
-
-					main_pll: main_pll {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-pll-clock";
-						clocks = <&osc1>;
-						reg = <0x40>;
-
-						mpuclk: mpuclk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							div-reg = <0xe0 0 9>;
-							reg = <0x48>;
-						};
-
-						mainclk: mainclk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							div-reg = <0xe4 0 9>;
-							reg = <0x4C>;
-						};
-
-						dbg_base_clk: dbg_base_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							div-reg = <0xe8 0 9>;
-							reg = <0x50>;
-						};
-
-						main_qspi_clk: main_qspi_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							reg = <0x54>;
-						};
-
-						main_nand_sdmmc_clk: main_nand_sdmmc_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							reg = <0x58>;
-						};
-
-						cfg_h2f_usr0_clk: cfg_h2f_usr0_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
-							reg = <0x5C>;
-						};
-					};
-
-					periph_pll: periph_pll {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-pll-clock";
-						clocks = <&osc1>, <&osc2>, <&f2s_periph_ref_clk>;
-						reg = <0x80>;
-
-						emac0_clk: emac0_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x88>;
-						};
-
-						emac1_clk: emac1_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x8C>;
-						};
-
-						per_qspi_clk: per_qsi_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x90>;
-						};
-
-						per_nand_mmc_clk: per_nand_mmc_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x94>;
-						};
-
-						per_base_clk: per_base_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x98>;
-						};
-
-						h2f_usr1_clk: h2f_usr1_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&periph_pll>;
-							reg = <0x9C>;
-						};
-					};
-
-					sdram_pll: sdram_pll {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-pll-clock";
-						clocks = <&osc1>, <&osc2>, <&f2s_sdram_ref_clk>;
-						reg = <0xC0>;
-
-						ddr_dqs_clk: ddr_dqs_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&sdram_pll>;
-							reg = <0xC8>;
-						};
-
-						ddr_2x_dqs_clk: ddr_2x_dqs_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&sdram_pll>;
-							reg = <0xCC>;
-						};
-
-						ddr_dq_clk: ddr_dq_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&sdram_pll>;
-							reg = <0xD0>;
-						};
-
-						h2f_usr2_clk: h2f_usr2_clk {
-							#clock-cells = <0>;
-							compatible = "altr,socfpga-perip-clk";
-							clocks = <&sdram_pll>;
-							reg = <0xD4>;
-						};
-					};
-
-					mpu_periph_clk: mpu_periph_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-perip-clk";
-						clocks = <&mpuclk>;
-						fixed-divider = <4>;
-					};
-
-					mpu_l2_ram_clk: mpu_l2_ram_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-perip-clk";
-						clocks = <&mpuclk>;
-						fixed-divider = <2>;
-					};
-
-					l4_main_clk: l4_main_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&mainclk>;
-						clk-gate = <0x60 0>;
-					};
-
-					l3_main_clk: l3_main_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-perip-clk";
-						clocks = <&mainclk>;
-						fixed-divider = <1>;
-					};
-
-					l3_mp_clk: l3_mp_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&mainclk>;
-						div-reg = <0x64 0 2>;
-						clk-gate = <0x60 1>;
-					};
-
-					l3_sp_clk: l3_sp_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&mainclk>;
-						div-reg = <0x64 2 2>;
-					};
-
-					l4_mp_clk: l4_mp_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&mainclk>, <&per_base_clk>;
-						div-reg = <0x64 4 3>;
-						clk-gate = <0x60 2>;
-					};
-
-					l4_sp_clk: l4_sp_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&mainclk>, <&per_base_clk>;
-						div-reg = <0x64 7 3>;
-						clk-gate = <0x60 3>;
-					};
-
-					dbg_at_clk: dbg_at_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&dbg_base_clk>;
-						div-reg = <0x68 0 2>;
-						clk-gate = <0x60 4>;
-					};
-
-					dbg_clk: dbg_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&dbg_base_clk>;
-						div-reg = <0x68 2 2>;
-						clk-gate = <0x60 5>;
-					};
-
-					dbg_trace_clk: dbg_trace_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&dbg_base_clk>;
-						div-reg = <0x6C 0 3>;
-						clk-gate = <0x60 6>;
-					};
-
-					dbg_timer_clk: dbg_timer_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&dbg_base_clk>;
-						clk-gate = <0x60 7>;
-					};
-
-					cfg_clk: cfg_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&cfg_h2f_usr0_clk>;
-						clk-gate = <0x60 8>;
-					};
-
-					h2f_user0_clk: h2f_user0_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&cfg_h2f_usr0_clk>;
-						clk-gate = <0x60 9>;
-					};
-
-					emac_0_clk: emac_0_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&emac0_clk>;
-						clk-gate = <0xa0 0>;
-					};
-
-					emac_1_clk: emac_1_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&emac1_clk>;
-						clk-gate = <0xa0 1>;
-					};
-
-					usb_mp_clk: usb_mp_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&per_base_clk>;
-						clk-gate = <0xa0 2>;
-						div-reg = <0xa4 0 3>;
-					};
-
-					spi_m_clk: spi_m_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&per_base_clk>;
-						clk-gate = <0xa0 3>;
-						div-reg = <0xa4 3 3>;
-					};
-
-					can0_clk: can0_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&per_base_clk>;
-						clk-gate = <0xa0 4>;
-						div-reg = <0xa4 6 3>;
-					};
-
-					can1_clk: can1_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&per_base_clk>;
-						clk-gate = <0xa0 5>;
-						div-reg = <0xa4 9 3>;
-					};
-
-					gpio_db_clk: gpio_db_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&per_base_clk>;
-						clk-gate = <0xa0 6>;
-						div-reg = <0xa8 0 24>;
-					};
-
-					h2f_user1_clk: h2f_user1_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&h2f_usr1_clk>;
-						clk-gate = <0xa0 7>;
-					};
-
-					sdmmc_clk: sdmmc_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
-						clk-gate = <0xa0 8>;
-						clk-phase = <0 135>;
-					};
-
-					nand_x_clk: nand_x_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
-						clk-gate = <0xa0 9>;
-					};
-
-					nand_clk: nand_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
-						clk-gate = <0xa0 10>;
-						fixed-divider = <4>;
-					};
-
-					qspi_clk: qspi_clk {
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-gate-clk";
-						clocks = <&f2s_periph_ref_clk>, <&main_qspi_clk>, <&per_qspi_clk>;
-						clk-gate = <0xa0 11>;
-					};
-				};
-			};
-
-		gmac0: ethernet@ff700000 {
-			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
-			altr,sysmgr-syscon = <&sysmgr 0x60 0>;
-			reg = <0xff700000 0x2000>;
-			interrupts = <0 115 4>;
-			interrupt-names = "macirq";
-			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-			clocks = <&emac0_clk>;
-			clock-names = "stmmaceth";
-			resets = <&rst EMAC0_RESET>;
-			reset-names = "stmmaceth";
-			snps,multicast-filter-bins = <256>;
-			snps,perfect-filter-entries = <128>;
-			status = "disabled";
-		};
-
-		gmac1: ethernet@ff702000 {
-			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
-			altr,sysmgr-syscon = <&sysmgr 0x60 2>;
-			reg = <0xff702000 0x2000>;
-			interrupts = <0 120 4>;
-			interrupt-names = "macirq";
-			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-			clocks = <&emac1_clk>;
-			clock-names = "stmmaceth";
-			resets = <&rst EMAC1_RESET>;
-			reset-names = "stmmaceth";
-			snps,multicast-filter-bins = <256>;
-			snps,perfect-filter-entries = <128>;
-			status = "disabled";
-		};
-
-		i2c0: i2c@ffc04000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc04000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			interrupts = <0 158 0x4>;
-			status = "disabled";
-		};
-
-		i2c1: i2c@ffc05000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc05000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			interrupts = <0 159 0x4>;
-			status = "disabled";
-		};
-
-		i2c2: i2c@ffc06000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc06000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			interrupts = <0 160 0x4>;
-			status = "disabled";
-		};
-
-		i2c3: i2c@ffc07000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc07000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			interrupts = <0 161 0x4>;
-			status = "disabled";
-		};
-
-		gpio0: gpio@ff708000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff708000 0x1000>;
-			clocks = <&per_base_clk>;
-			status = "disabled";
-
-			porta: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <29>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 164 4>;
-			};
-		};
-
-		gpio1: gpio@ff709000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff709000 0x1000>;
-			clocks = <&per_base_clk>;
-			status = "disabled";
-
-			portb: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <29>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 165 4>;
-			};
-		};
-
-		gpio2: gpio@ff70a000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff70a000 0x1000>;
-			clocks = <&per_base_clk>;
-			status = "disabled";
-
-			portc: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <27>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 166 4>;
-			};
-		};
-
-		sdr: sdr@ffc25000 {
-			compatible = "syscon";
-			reg = <0xffc25000 0x1000>;
-		};
-
-		sdramedac {
-			compatible = "altr,sdram-edac";
-			altr,sdr-syscon = <&sdr>;
-			interrupts = <0 39 4>;
-		};
-
-		L2: l2-cache@fffef000 {
-			compatible = "arm,pl310-cache";
-			reg = <0xfffef000 0x1000>;
-			interrupts = <0 38 0x04>;
-			cache-unified;
-			cache-level = <2>;
-			arm,tag-latency = <1 1 1>;
-			arm,data-latency = <2 1 1>;
-		};
-
-		mmc: dwmmc0@ff704000 {
-			compatible = "altr,socfpga-dw-mshc";
-			reg = <0xff704000 0x1000>;
-			interrupts = <0 139 4>;
-			fifo-depth = <0x400>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			clocks = <&l4_mp_clk>, <&sdmmc_clk>;
-			clock-names = "biu", "ciu";
-		};
-
-		ocram: sram@ffff0000 {
-			compatible = "mmio-sram";
-			reg = <0xffff0000 0x10000>;
-		};
-
-		spi0: spi@fff00000 {
-			compatible = "snps,dw-apb-ssi";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0xfff00000 0x1000>;
-			interrupts = <0 154 4>;
-			num-cs = <4>;
-			clocks = <&spi_m_clk>;
-			status = "disabled";
-		};
-
-		spi1: spi@fff01000 {
-			compatible = "snps,dw-apb-ssi";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0xfff01000 0x1000>;
-			interrupts = <0 156 4>;
-			num-cs = <4>;
-			clocks = <&spi_m_clk>;
-			status = "disabled";
-		};
-
-		/* Local timer */
-		timer@fffec600 {
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0xfffec600 0x100>;
-			interrupts = <1 13 0xf04>;
-			clocks = <&mpu_periph_clk>;
-		};
-
-		timer0: timer0@ffc08000 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 167 4>;
-			reg = <0xffc08000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			clock-names = "timer";
-		};
-
-		timer1: timer1@ffc09000 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 168 4>;
-			reg = <0xffc09000 0x1000>;
-			clocks = <&l4_sp_clk>;
-			clock-names = "timer";
-		};
-
-		timer2: timer2@ffd00000 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 169 4>;
-			reg = <0xffd00000 0x1000>;
-			clocks = <&osc1>;
-			clock-names = "timer";
-		};
-
-		timer3: timer3@ffd01000 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 170 4>;
-			reg = <0xffd01000 0x1000>;
-			clocks = <&osc1>;
-			clock-names = "timer";
-		};
-
-		uart0: serial0@ffc02000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xffc02000 0x1000>;
-			interrupts = <0 162 4>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			clocks = <&l4_sp_clk>;
-		};
-
-		uart1: serial1@ffc03000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xffc03000 0x1000>;
-			interrupts = <0 163 4>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			clocks = <&l4_sp_clk>;
-		};
-
-		rst: rstmgr@ffd05000 {
-			#reset-cells = <1>;
-			compatible = "altr,rst-mgr";
-			reg = <0xffd05000 0x1000>;
-		};
-
-		usbphy0: usbphy@0 {
-			#phy-cells = <0>;
-			compatible = "usb-nop-xceiv";
-			status = "okay";
-		};
-
-		usb0: usb@ffb00000 {
-			compatible = "snps,dwc2";
-			reg = <0xffb00000 0xffff>;
-			interrupts = <0 125 4>;
-			clocks = <&usb_mp_clk>;
-			clock-names = "otg";
-			phys = <&usbphy0>;
-			phy-names = "usb2-phy";
-			status = "disabled";
-		};
-
-		usb1: usb@ffb40000 {
-			compatible = "snps,dwc2";
-			reg = <0xffb40000 0xffff>;
-			interrupts = <0 128 4>;
-			clocks = <&usb_mp_clk>;
-			clock-names = "otg";
-			phys = <&usbphy0>;
-			phy-names = "usb2-phy";
-			status = "disabled";
-		};
-
-		watchdog0: watchdog@ffd02000 {
-			compatible = "snps,dw-wdt";
-			reg = <0xffd02000 0x1000>;
-			interrupts = <0 171 4>;
-			clocks = <&osc1>;
-			status = "disabled";
-		};
-
-		watchdog1: watchdog@ffd03000 {
-			compatible = "snps,dw-wdt";
-			reg = <0xffd03000 0x1000>;
-			interrupts = <0 172 4>;
-			clocks = <&osc1>;
-			status = "disabled";
-		};
-
-		sysmgr: sysmgr@ffd08000 {
-			compatible = "altr,sys-mgr", "syscon";
-			reg = <0xffd08000 0x4000>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/socfpga_arria10.dtsi b/sys/gnu/dts/arm/socfpga_arria10.dtsi
deleted file mode 100644
index 8a05c47fd57..00000000000
--- a/sys/gnu/dts/arm/socfpga_arria10.dtsi
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * Copyright Altera Corporation (C) 2014. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		ethernet2 = &gmac2;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		timer0 = &timer0;
-		timer1 = &timer1;
-		timer2 = &timer2;
-		timer3 = &timer3;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	intc: intc@ffffd000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		reg = <0xffffd000 0x1000>,
-		      <0xffffc100 0x100>;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		device_type = "soc";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		amba {
-			compatible = "arm,amba-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			pdma: pdma@ffda1000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0xffda1000 0x1000>;
-				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 84 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 85 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 86 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 87 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 88 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 89 IRQ_TYPE_LEVEL_HIGH>,
-					     <0 90 IRQ_TYPE_LEVEL_HIGH>;
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-		};
-
-		clkmgr@ffd04000 {
-				compatible = "altr,clk-mgr";
-				reg = <0xffd04000 0x1000>;
-
-				clocks {
-					#address-cells = <1>;
-					#size-cells = <0>;
-
-					osc1: osc1 {
-						#clock-cells = <0>;
-						compatible = "fixed-clock";
-					};
-
-					main_pll: main_pll {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-pll-clock";
-						clocks = <&osc1>;
-					};
-
-					periph_pll: periph_pll {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#clock-cells = <0>;
-						compatible = "altr,socfpga-pll-clock";
-						clocks = <&osc1>;
-					};
-				};
-		};
-
-		gmac0: ethernet@ff800000 {
-			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
-			reg = <0xff800000 0x2000>;
-			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "macirq";
-			/* Filled in by bootloader */
-			mac-address = [00 00 00 00 00 00];
-			status = "disabled";
-		};
-
-		gmac1: ethernet@ff802000 {
-			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
-		        reg = <0xff802000 0x2000>;
-			interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "macirq";
-			/* Filled in by bootloader */
-			mac-address = [00 00 00 00 00 00];
-			status = "disabled";
-		};
-
-		gmac2: ethernet@ff804000 {
-			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
-			reg = <0xff804000 0x2000>;
-			interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "macirq";
-			/* Filled in by bootloader */
-			mac-address = [00 00 00 00 00 00];
-			status = "disabled";
-		};
-
-		gpio0: gpio@ffc02900 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xffc02900 0x100>;
-			status = "disabled";
-
-			porta: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <29>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		gpio1: gpio@ffc02a00 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xffc02a00 0x100>;
-			status = "disabled";
-
-			portb: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <29>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		gpio2: gpio@ffc02b00 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xffc02b00 0x100>;
-			status = "disabled";
-
-			portc: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				snps,nr-gpios = <27>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		i2c0: i2c@ffc02200 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc02200 0x100>;
-			interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		i2c1: i2c@ffc02300 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc02300 0x100>;
-			interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		i2c2: i2c@ffc02400 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc02400 0x100>;
-			interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		i2c3: i2c@ffc02500 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc02500 0x100>;
-			interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		i2c4: i2c@ffc02600 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "snps,designware-i2c";
-			reg = <0xffc02600 0x100>;
-			interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		L2: l2-cache@fffff000 {
-			compatible = "arm,pl310-cache";
-			reg = <0xfffff000 0x1000>;
-			interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
-			cache-unified;
-			cache-level = <2>;
-		};
-
-		mmc: dwmmc0@ff808000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "altr,socfpga-dw-mshc";
-			reg = <0xff808000 0x1000>;
-			interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
-			fifo-depth = <0x400>;
-		};
-
-		ocram: sram@ffe00000 {
-			compatible = "mmio-sram";
-			reg = <0xffe00000 0x40000>;
-		};
-
-		rst: rstmgr@ffd05000 {
-			#reset-cells = <1>;
-			compatible = "altr,rst-mgr";
-			reg = <0xffd05000 0x100>;
-		};
-
-		sysmgr: sysmgr@ffd06000 {
-			compatible = "altr,sys-mgr", "syscon";
-			reg = <0xffd06000 0x300>;
-		};
-
-		/* Local timer */
-		timer@ffffc600 {
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0xffffc600 0x100>;
-			interrupts = <1 13 0xf04>;
-		};
-
-		timer0: timer0@ffc02700 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
-			reg = <0xffc02700 0x100>;
-		};
-
-		timer1: timer1@ffc02800 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
-			reg = <0xffc02800 0x100>;
-		};
-
-		timer2: timer2@ffd00000 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
-			reg = <0xffd00000 0x100>;
-		};
-
-		timer3: timer3@ffd00100 {
-			compatible = "snps,dw-apb-timer";
-			interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
-			reg = <0xffd01000 0x100>;
-		};
-
-		uart0: serial0@ffc02000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xffc02000 0x100>;
-			interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-		};
-
-		uart1: serial1@ffc02100 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xffc02100 0x100>;
-			interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-		};
-
-		usbphy0: usbphy@0 {
-			#phy-cells = <0>;
-			compatible = "usb-nop-xceiv";
-			status = "okay";
-		};
-
-		usb0: usb@ffb00000 {
-			compatible = "snps,dwc2";
-			reg = <0xffb00000 0xffff>;
-			interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
-			phys = <&usbphy0>;
-			phy-names = "usb2-phy";
-			status = "disabled";
-		};
-
-		usb1: usb@ffb40000 {
-			compatible = "snps,dwc2";
-			reg = <0xffb40000 0xffff>;
-			interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
-			phys = <&usbphy0>;
-			phy-names = "usb2-phy";
-			status = "disabled";
-		};
-
-		watchdog0: watchdog@ffd00200 {
-			compatible = "snps,dw-wdt";
-			reg = <0xffd00200 0x100>;
-			interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		watchdog1: watchdog@ffd00300 {
-			compatible = "snps,dw-wdt";
-			reg = <0xffd00300 0x100>;
-			interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/socfpga_arria10_socdk.dts b/sys/gnu/dts/arm/socfpga_arria10_socdk.dts
deleted file mode 100755
index 3015ce8d305..00000000000
--- a/sys/gnu/dts/arm/socfpga_arria10_socdk.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2014 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-#include "socfpga_arria10.dtsi"
-
-/ {
-	model = "Altera SOCFPGA Arria 10";
-	compatible = "altr,socfpga-arria10", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200 rootwait";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-
-	soc {
-		clkmgr@ffd04000 {
-			clocks {
-				osc1 {
-					clock-frequency = <25000000>;
-				};
-			};
-		};
-
-		serial0@ffc02000 {
-			status = "okay";
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/socfpga_arria5.dtsi b/sys/gnu/dts/arm/socfpga_arria5.dtsi
deleted file mode 100644
index 1907cc60045..00000000000
--- a/sys/gnu/dts/arm/socfpga_arria5.dtsi
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- *  Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-/* First 4KB has trampoline code for secondary cores. */
-/memreserve/ 0x00000000 0x0001000;
-#include "socfpga.dtsi"
-
-/ {
-	soc {
-		clkmgr@ffd04000 {
-			clocks {
-				osc1 {
-					clock-frequency = <25000000>;
-				};
-			};
-		};
-
-		mmc0: dwmmc0@ff704000 {
-			num-slots = <1>;
-			broken-cd;
-			bus-width = <4>;
-			cap-mmc-highspeed;
-			cap-sd-highspeed;
-		};
-
-		sysmgr@ffd08000 {
-			cpu1-start-addr = <0xffd080c4>;
-		};
-	};
-};
diff --git a/sys/gnu/dts/arm/socfpga_arria5_socdk.dts b/sys/gnu/dts/arm/socfpga_arria5_socdk.dts
deleted file mode 100644
index ccaf41742fc..00000000000
--- a/sys/gnu/dts/arm/socfpga_arria5_socdk.dts
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- *  Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "socfpga_arria5.dtsi"
-
-/ {
-	model = "Altera SOCFPGA Arria V SoC Development Kit";
-	compatible = "altr,socfpga-arria5", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-
-	aliases {
-		/* this allow the ethaddr uboot environmnet variable contents
-		* to be added to the gmac1 device tree blob.
-		*/
-		ethernet0 = &gmac1;
-	};
-
-	regulator_3_3v: 3-3-v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-};
-
-&gmac1 {
-	status = "okay";
-	phy-mode = "rgmii";
-
-	rxd0-skew-ps = <0>;
-	rxd1-skew-ps = <0>;
-	rxd2-skew-ps = <0>;
-	rxd3-skew-ps = <0>;
-	txen-skew-ps = <0>;
-	txc-skew-ps = <2600>;
-	rxdv-skew-ps = <0>;
-	rxc-skew-ps = <2000>;
-};
-
-&i2c0 {
-	status = "okay";
-
-	eeprom@51 {
-		compatible = "atmel,24c32";
-		reg = <0x51>;
-		pagesize = <32>;
-	};
-
-	rtc@68 {
-		compatible = "dallas,ds1339";
-		reg = <0x68>;
-	};
-};
-
-&mmc0 {
-	vmmc-supply = <&regulator_3_3v>;
-	vqmmc-supply = <&regulator_3_3v>;
-};
-
-&usb1 {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/socfpga_cyclone5.dtsi b/sys/gnu/dts/arm/socfpga_cyclone5.dtsi
deleted file mode 100644
index 06db951e06f..00000000000
--- a/sys/gnu/dts/arm/socfpga_cyclone5.dtsi
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-/* First 4KB has trampoline code for secondary cores. */
-/memreserve/ 0x00000000 0x0001000;
-#include "socfpga.dtsi"
-
-/ {
-	soc {
-		clkmgr@ffd04000 {
-			clocks {
-				osc1 {
-					clock-frequency = <25000000>;
-				};
-			};
-		};
-
-		mmc0: dwmmc0@ff704000 {
-			num-slots = <1>;
-			broken-cd;
-			bus-width = <4>;
-			cap-mmc-highspeed;
-			cap-sd-highspeed;
-		};
-
-		ethernet@ff702000 {
-			phy-mode = "rgmii";
-			phy-addr = <0xffffffff>; /* probe for phy addr */
-			status = "okay";
-		};
-
-		sysmgr@ffd08000 {
-			cpu1-start-addr = <0xffd080c4>;
-		};
-	};
-};
-
-&watchdog0 {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/socfpga_cyclone5_socdk.dts b/sys/gnu/dts/arm/socfpga_cyclone5_socdk.dts
deleted file mode 100644
index 258865da8f6..00000000000
--- a/sys/gnu/dts/arm/socfpga_cyclone5_socdk.dts
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "socfpga_cyclone5.dtsi"
-
-/ {
-	model = "Altera SOCFPGA Cyclone V SoC Development Kit";
-	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-
-	aliases {
-		/* this allow the ethaddr uboot environmnet variable contents
-		 * to be added to the gmac1 device tree blob.
-		 */
-		ethernet0 = &gmac1;
-	};
-
-	regulator_3_3v: 3-3-v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-};
-
-&gmac1 {
-	status = "okay";
-	phy-mode = "rgmii";
-
-	rxd0-skew-ps = <0>;
-	rxd1-skew-ps = <0>;
-	rxd2-skew-ps = <0>;
-	rxd3-skew-ps = <0>;
-	txen-skew-ps = <0>;
-	txc-skew-ps = <2600>;
-	rxdv-skew-ps = <0>;
-	rxc-skew-ps = <2000>;
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	eeprom@51 {
-		compatible = "atmel,24c32";
-		reg = <0x51>;
-		pagesize = <32>;
-	};
-
-	rtc@68 {
-		compatible = "dallas,ds1339";
-		reg = <0x68>;
-	};
-};
-
-&mmc0 {
-	cd-gpios = <&portb 18 0>;
-	vmmc-supply = <&regulator_3_3v>;
-	vqmmc-supply = <&regulator_3_3v>;
-};
-
-&usb1 {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/socfpga_cyclone5_sockit.dts b/sys/gnu/dts/arm/socfpga_cyclone5_sockit.dts
deleted file mode 100644
index 16ea6f5f2ab..00000000000
--- a/sys/gnu/dts/arm/socfpga_cyclone5_sockit.dts
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- *  Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "socfpga_cyclone5.dtsi"
-
-/ {
-	model = "Terasic SoCkit";
-	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-
-	aliases {
-		/* this allow the ethaddr uboot environmnet variable contents
-		 * to be added to the gmac1 device tree blob.
-		 */
-		ethernet0 = &gmac1;
-	};
-
-	regulator_3_3v: vcc3p3-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "VCC3P3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-};
-
-&gmac1 {
-	status = "okay";
-	phy-mode = "rgmii";
-
-	rxd0-skew-ps = <0>;
-	rxd1-skew-ps = <0>;
-	rxd2-skew-ps = <0>;
-	rxd3-skew-ps = <0>;
-	txen-skew-ps = <0>;
-	txc-skew-ps = <2600>;
-	rxdv-skew-ps = <0>;
-	rxc-skew-ps = <2000>;
-};
-
-&mmc0 {
-	vmmc-supply = <&regulator_3_3v>;
-	vqmmc-supply = <&regulator_3_3v>;
-};
-
-&usb1 {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/socfpga_cyclone5_socrates.dts b/sys/gnu/dts/arm/socfpga_cyclone5_socrates.dts
deleted file mode 100644
index a1814b45745..00000000000
--- a/sys/gnu/dts/arm/socfpga_cyclone5_socrates.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "socfpga_cyclone5.dtsi"
-
-/ {
-	model = "EBV SOCrates";
-	compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-};
-
-&gmac1 {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	rtc: rtc@68 {
-		compatible = "stm,m41t82";
-		reg = <0x68>;
-	};
-};
-
-&mmc {
-	status = "okay";
-};
diff --git a/sys/gnu/dts/arm/socfpga_vt.dts b/sys/gnu/dts/arm/socfpga_vt.dts
deleted file mode 100644
index f9345e02ca4..00000000000
--- a/sys/gnu/dts/arm/socfpga_vt.dts
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- *  Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-#include "socfpga.dtsi"
-
-/ {
-	model = "Altera SOCFPGA VT";
-	compatible = "altr,socfpga-vt", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1 GB */
-	};
-
-	soc {
-		clkmgr@ffd04000 {
-			clocks {
-				osc1 {
-					clock-frequency = <10000000>;
-				};
-			};
-		};
-
-		dwmmc0@ff704000 {
-			num-slots = <1>;
-			broken-cd;
-			bus-width = <4>;
-			cap-mmc-highspeed;
-			cap-sd-highspeed;
-		};
-
-		ethernet@ff700000 {
-			phy-mode = "gmii";
-			status = "okay";
-		};
-
-		timer0@ffc08000 {
-			clock-frequency = <7000000>;
-		};
-
-		timer1@ffc09000 {
-			clock-frequency = <7000000>;
-		};
-
-		timer2@ffd00000 {
-			clock-frequency = <7000000>;
-		};
-
-		timer3@ffd01000 {
-			clock-frequency = <7000000>;
-		};
-
-		serial0@ffc02000 {
-			clock-frequency = <7372800>;
-		};
-
-		serial1@ffc03000 {
-			clock-frequency = <7372800>;
-		};
-
-		sysmgr@ffd08000 {
-			cpu1-start-addr = <0xffd08010>;
-		};
-	};
-};
-
-&gmac0 {
-	status = "okay";
-	phy-mode = "gmii";
-};
diff --git a/sys/gnu/dts/include/dt-bindings/clock/alphascale,asm9260.h b/sys/gnu/dts/include/dt-bindings/clock/alphascale,asm9260.h
deleted file mode 100644
index 04e8db27daf..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/alphascale,asm9260.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_ASM9260_H
-#define _DT_BINDINGS_CLK_ASM9260_H
-
-/* ahb gate */
-#define CLKID_AHB_ROM		0
-#define CLKID_AHB_RAM		1
-#define CLKID_AHB_GPIO		2
-#define CLKID_AHB_MAC		3
-#define CLKID_AHB_EMI		4
-#define CLKID_AHB_USB0		5
-#define CLKID_AHB_USB1		6
-#define CLKID_AHB_DMA0		7
-#define CLKID_AHB_DMA1		8
-#define CLKID_AHB_UART0		9
-#define CLKID_AHB_UART1		10
-#define CLKID_AHB_UART2		11
-#define CLKID_AHB_UART3		12
-#define CLKID_AHB_UART4		13
-#define CLKID_AHB_UART5		14
-#define CLKID_AHB_UART6		15
-#define CLKID_AHB_UART7		16
-#define CLKID_AHB_UART8		17
-#define CLKID_AHB_UART9		18
-#define CLKID_AHB_I2S0		19
-#define CLKID_AHB_I2C0		20
-#define CLKID_AHB_I2C1		21
-#define CLKID_AHB_SSP0		22
-#define CLKID_AHB_IOCONFIG	23
-#define CLKID_AHB_WDT		24
-#define CLKID_AHB_CAN0		25
-#define CLKID_AHB_CAN1		26
-#define CLKID_AHB_MPWM		27
-#define CLKID_AHB_SPI0		28
-#define CLKID_AHB_SPI1		29
-#define CLKID_AHB_QEI		30
-#define CLKID_AHB_QUADSPI0	31
-#define CLKID_AHB_CAMIF		32
-#define CLKID_AHB_LCDIF		33
-#define CLKID_AHB_TIMER0	34
-#define CLKID_AHB_TIMER1	35
-#define CLKID_AHB_TIMER2	36
-#define CLKID_AHB_TIMER3	37
-#define CLKID_AHB_IRQ		38
-#define CLKID_AHB_RTC		39
-#define CLKID_AHB_NAND		40
-#define CLKID_AHB_ADC0		41
-#define CLKID_AHB_LED		42
-#define CLKID_AHB_DAC0		43
-#define CLKID_AHB_LCD		44
-#define CLKID_AHB_I2S1		45
-#define CLKID_AHB_MAC1		46
-
-/* devider */
-#define CLKID_SYS_CPU		47
-#define CLKID_SYS_AHB		48
-#define CLKID_SYS_I2S0M		49
-#define CLKID_SYS_I2S0S		50
-#define CLKID_SYS_I2S1M		51
-#define CLKID_SYS_I2S1S		52
-#define CLKID_SYS_UART0		53
-#define CLKID_SYS_UART1		54
-#define CLKID_SYS_UART2		55
-#define CLKID_SYS_UART3		56
-#define CLKID_SYS_UART4		56
-#define CLKID_SYS_UART5		57
-#define CLKID_SYS_UART6		58
-#define CLKID_SYS_UART7		59
-#define CLKID_SYS_UART8		60
-#define CLKID_SYS_UART9		61
-#define CLKID_SYS_SPI0		62
-#define CLKID_SYS_SPI1		63
-#define CLKID_SYS_QUADSPI	64
-#define CLKID_SYS_SSP0		65
-#define CLKID_SYS_NAND		66
-#define CLKID_SYS_TRACE		67
-#define CLKID_SYS_CAMM		68
-#define CLKID_SYS_WDT		69
-#define CLKID_SYS_CLKOUT	70
-#define CLKID_SYS_MAC		71
-#define CLKID_SYS_LCD		72
-#define CLKID_SYS_ADCANA	73
-
-#define MAX_CLKS		74
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/lsi,axm5516-clks.h b/sys/gnu/dts/include/dt-bindings/clock/lsi,axm5516-clks.h
deleted file mode 100644
index beb41ace5dd..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/lsi,axm5516-clks.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2014 LSI Corporation
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- */
-
-#ifndef _DT_BINDINGS_CLK_AXM5516_H
-#define _DT_BINDINGS_CLK_AXM5516_H
-
-#define AXXIA_CLK_FAB_PLL	0
-#define AXXIA_CLK_CPU_PLL	1
-#define AXXIA_CLK_SYS_PLL	2
-#define AXXIA_CLK_SM0_PLL	3
-#define AXXIA_CLK_SM1_PLL	4
-#define AXXIA_CLK_FAB_DIV	5
-#define AXXIA_CLK_SYS_DIV	6
-#define AXXIA_CLK_NRCP_DIV	7
-#define AXXIA_CLK_CPU0_DIV	8
-#define AXXIA_CLK_CPU1_DIV	9
-#define AXXIA_CLK_CPU2_DIV	10
-#define AXXIA_CLK_CPU3_DIV	11
-#define AXXIA_CLK_PER_DIV	12
-#define AXXIA_CLK_MMC_DIV	13
-#define AXXIA_CLK_FAB		14
-#define AXXIA_CLK_SYS		15
-#define AXXIA_CLK_NRCP		16
-#define AXXIA_CLK_CPU0		17
-#define AXXIA_CLK_CPU1		18
-#define AXXIA_CLK_CPU2		19
-#define AXXIA_CLK_CPU3		20
-#define AXXIA_CLK_PER		21
-#define AXXIA_CLK_MMC		22
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/marvell,mmp2.h b/sys/gnu/dts/include/dt-bindings/clock/marvell,mmp2.h
deleted file mode 100644
index 591f7fba89e..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/marvell,mmp2.h
+++ /dev/null
@@ -1,74 +0,0 @@
-#ifndef __DTS_MARVELL_MMP2_CLOCK_H
-#define __DTS_MARVELL_MMP2_CLOCK_H
-
-/* fixed clocks and plls */
-#define MMP2_CLK_CLK32			1
-#define MMP2_CLK_VCTCXO			2
-#define MMP2_CLK_PLL1			3
-#define MMP2_CLK_PLL1_2			8
-#define MMP2_CLK_PLL1_4			9
-#define MMP2_CLK_PLL1_8			10
-#define MMP2_CLK_PLL1_16		11
-#define MMP2_CLK_PLL1_3			12
-#define MMP2_CLK_PLL1_6			13
-#define MMP2_CLK_PLL1_12		14
-#define MMP2_CLK_PLL1_20		15
-#define MMP2_CLK_PLL2			16
-#define MMP2_CLK_PLL2_2			17
-#define MMP2_CLK_PLL2_4			18
-#define MMP2_CLK_PLL2_8			19
-#define MMP2_CLK_PLL2_16		20
-#define MMP2_CLK_PLL2_3			21
-#define MMP2_CLK_PLL2_6			22
-#define MMP2_CLK_PLL2_12		23
-#define MMP2_CLK_VCTCXO_2		24
-#define MMP2_CLK_VCTCXO_4		25
-#define MMP2_CLK_UART_PLL		26
-#define MMP2_CLK_USB_PLL		27
-
-/* apb periphrals */
-#define MMP2_CLK_TWSI0			60
-#define MMP2_CLK_TWSI1			61
-#define MMP2_CLK_TWSI2			62
-#define MMP2_CLK_TWSI3			63
-#define MMP2_CLK_TWSI4			64
-#define MMP2_CLK_TWSI5			65
-#define MMP2_CLK_GPIO			66
-#define MMP2_CLK_KPC			67
-#define MMP2_CLK_RTC			68
-#define MMP2_CLK_PWM0			69
-#define MMP2_CLK_PWM1			70
-#define MMP2_CLK_PWM2			71
-#define MMP2_CLK_PWM3			72
-#define MMP2_CLK_UART0			73
-#define MMP2_CLK_UART1			74
-#define MMP2_CLK_UART2			75
-#define MMP2_CLK_UART3			76
-#define MMP2_CLK_SSP0			77
-#define MMP2_CLK_SSP1			78
-#define MMP2_CLK_SSP2			79
-#define MMP2_CLK_SSP3			80
-
-/* axi periphrals */
-#define MMP2_CLK_SDH0			101
-#define MMP2_CLK_SDH1			102
-#define MMP2_CLK_SDH2			103
-#define MMP2_CLK_SDH3			104
-#define MMP2_CLK_USB			105
-#define MMP2_CLK_DISP0			106
-#define MMP2_CLK_DISP0_MUX		107
-#define MMP2_CLK_DISP0_SPHY		108
-#define MMP2_CLK_DISP1			109
-#define MMP2_CLK_DISP1_MUX		110
-#define MMP2_CLK_CCIC_ARBITER		111
-#define MMP2_CLK_CCIC0			112
-#define MMP2_CLK_CCIC0_MIX		113
-#define MMP2_CLK_CCIC0_PHY		114
-#define MMP2_CLK_CCIC0_SPHY		115
-#define MMP2_CLK_CCIC1			116
-#define MMP2_CLK_CCIC1_MIX		117
-#define MMP2_CLK_CCIC1_PHY		118
-#define MMP2_CLK_CCIC1_SPHY		119
-
-#define MMP2_NR_CLKS			200
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa168.h b/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa168.h
deleted file mode 100644
index 79630b9d74b..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa168.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef __DTS_MARVELL_PXA168_CLOCK_H
-#define __DTS_MARVELL_PXA168_CLOCK_H
-
-/* fixed clocks and plls */
-#define PXA168_CLK_CLK32		1
-#define PXA168_CLK_VCTCXO		2
-#define PXA168_CLK_PLL1			3
-#define PXA168_CLK_PLL1_2		8
-#define PXA168_CLK_PLL1_4		9
-#define PXA168_CLK_PLL1_8		10
-#define PXA168_CLK_PLL1_16		11
-#define PXA168_CLK_PLL1_6		12
-#define PXA168_CLK_PLL1_12		13
-#define PXA168_CLK_PLL1_24		14
-#define PXA168_CLK_PLL1_48		15
-#define PXA168_CLK_PLL1_96		16
-#define PXA168_CLK_PLL1_13		17
-#define PXA168_CLK_PLL1_13_1_5		18
-#define PXA168_CLK_PLL1_2_1_5		19
-#define PXA168_CLK_PLL1_3_16		20
-#define PXA168_CLK_UART_PLL		27
-
-/* apb periphrals */
-#define PXA168_CLK_TWSI0		60
-#define PXA168_CLK_TWSI1		61
-#define PXA168_CLK_TWSI2		62
-#define PXA168_CLK_TWSI3		63
-#define PXA168_CLK_GPIO			64
-#define PXA168_CLK_KPC			65
-#define PXA168_CLK_RTC			66
-#define PXA168_CLK_PWM0			67
-#define PXA168_CLK_PWM1			68
-#define PXA168_CLK_PWM2			69
-#define PXA168_CLK_PWM3			70
-#define PXA168_CLK_UART0		71
-#define PXA168_CLK_UART1		72
-#define PXA168_CLK_UART2		73
-#define PXA168_CLK_SSP0			74
-#define PXA168_CLK_SSP1			75
-#define PXA168_CLK_SSP2			76
-#define PXA168_CLK_SSP3			77
-#define PXA168_CLK_SSP4			78
-
-/* axi periphrals */
-#define PXA168_CLK_DFC			100
-#define PXA168_CLK_SDH0			101
-#define PXA168_CLK_SDH1			102
-#define PXA168_CLK_SDH2			103
-#define PXA168_CLK_USB			104
-#define PXA168_CLK_SPH			105
-#define PXA168_CLK_DISP0		106
-#define PXA168_CLK_CCIC0		107
-#define PXA168_CLK_CCIC0_PHY		108
-#define PXA168_CLK_CCIC0_SPHY		109
-
-#define PXA168_NR_CLKS			200
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa910.h b/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa910.h
deleted file mode 100644
index 719cffb2bea..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/marvell,pxa910.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef __DTS_MARVELL_PXA910_CLOCK_H
-#define __DTS_MARVELL_PXA910_CLOCK_H
-
-/* fixed clocks and plls */
-#define PXA910_CLK_CLK32		1
-#define PXA910_CLK_VCTCXO		2
-#define PXA910_CLK_PLL1			3
-#define PXA910_CLK_PLL1_2		8
-#define PXA910_CLK_PLL1_4		9
-#define PXA910_CLK_PLL1_8		10
-#define PXA910_CLK_PLL1_16		11
-#define PXA910_CLK_PLL1_6		12
-#define PXA910_CLK_PLL1_12		13
-#define PXA910_CLK_PLL1_24		14
-#define PXA910_CLK_PLL1_48		15
-#define PXA910_CLK_PLL1_96		16
-#define PXA910_CLK_PLL1_13		17
-#define PXA910_CLK_PLL1_13_1_5		18
-#define PXA910_CLK_PLL1_2_1_5		19
-#define PXA910_CLK_PLL1_3_16		20
-#define PXA910_CLK_UART_PLL		27
-
-/* apb periphrals */
-#define PXA910_CLK_TWSI0		60
-#define PXA910_CLK_TWSI1		61
-#define PXA910_CLK_TWSI2		62
-#define PXA910_CLK_TWSI3		63
-#define PXA910_CLK_GPIO			64
-#define PXA910_CLK_KPC			65
-#define PXA910_CLK_RTC			66
-#define PXA910_CLK_PWM0			67
-#define PXA910_CLK_PWM1			68
-#define PXA910_CLK_PWM2			69
-#define PXA910_CLK_PWM3			70
-#define PXA910_CLK_UART0		71
-#define PXA910_CLK_UART1		72
-#define PXA910_CLK_UART2		73
-#define PXA910_CLK_SSP0			74
-#define PXA910_CLK_SSP1			75
-
-/* axi periphrals */
-#define PXA910_CLK_DFC			100
-#define PXA910_CLK_SDH0			101
-#define PXA910_CLK_SDH1			102
-#define PXA910_CLK_SDH2			103
-#define PXA910_CLK_USB			104
-#define PXA910_CLK_SPH			105
-#define PXA910_CLK_DISP0		106
-#define PXA910_CLK_CCIC0		107
-#define PXA910_CLK_CCIC0_PHY		108
-#define PXA910_CLK_CCIC0_SPHY		109
-
-#define PXA910_NR_CLKS			200
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/maxim,max77686.h b/sys/gnu/dts/include/dt-bindings/clock/maxim,max77686.h
deleted file mode 100644
index 7b28b090586..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/maxim,max77686.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Device Tree binding constants clocks for the Maxim 77686 PMIC.
- */
-
-#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H
-#define _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H
-
-/* Fixed rate clocks. */
-
-#define MAX77686_CLK_AP		0
-#define MAX77686_CLK_CP		1
-#define MAX77686_CLK_PMIC	2
-
-/* Total number of clocks. */
-#define MAX77686_CLKS_NUM		(MAX77686_CLK_PMIC + 1)
-
-#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H */
diff --git a/sys/gnu/dts/include/dt-bindings/clock/maxim,max77802.h b/sys/gnu/dts/include/dt-bindings/clock/maxim,max77802.h
deleted file mode 100644
index 997312edcbb..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/maxim,max77802.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Device Tree binding constants clocks for the Maxim 77802 PMIC.
- */
-
-#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H
-#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H
-
-/* Fixed rate clocks. */
-
-#define MAX77802_CLK_32K_AP		0
-#define MAX77802_CLK_32K_CP		1
-
-/* Total number of clocks. */
-#define MAX77802_CLKS_NUM		(MAX77802_CLK_32K_CP + 1)
-
-#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H */
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-apq8084.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-apq8084.h
deleted file mode 100644
index 2c0da566c46..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-apq8084.h
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_APQ_GCC_8084_H
-#define _DT_BINDINGS_CLK_APQ_GCC_8084_H
-
-#define GPLL0						0
-#define GPLL0_VOTE					1
-#define GPLL1						2
-#define GPLL1_VOTE					3
-#define GPLL2						4
-#define GPLL2_VOTE					5
-#define GPLL3						6
-#define GPLL3_VOTE					7
-#define GPLL4						8
-#define GPLL4_VOTE					9
-#define CONFIG_NOC_CLK_SRC				10
-#define PERIPH_NOC_CLK_SRC				11
-#define SYSTEM_NOC_CLK_SRC				12
-#define BLSP_UART_SIM_CLK_SRC				13
-#define QDSS_TSCTR_CLK_SRC				14
-#define UFS_AXI_CLK_SRC					15
-#define RPM_CLK_SRC					16
-#define KPSS_AHB_CLK_SRC				17
-#define QDSS_AT_CLK_SRC					18
-#define BIMC_DDR_CLK_SRC				19
-#define USB30_MASTER_CLK_SRC				20
-#define USB30_SEC_MASTER_CLK_SRC			21
-#define USB_HSIC_AHB_CLK_SRC				22
-#define MMSS_BIMC_GFX_CLK_SRC				23
-#define QDSS_STM_CLK_SRC				24
-#define ACC_CLK_SRC					25
-#define SEC_CTRL_CLK_SRC				26
-#define BLSP1_QUP1_I2C_APPS_CLK_SRC			27
-#define BLSP1_QUP1_SPI_APPS_CLK_SRC			28
-#define BLSP1_QUP2_I2C_APPS_CLK_SRC			29
-#define BLSP1_QUP2_SPI_APPS_CLK_SRC			30
-#define BLSP1_QUP3_I2C_APPS_CLK_SRC			31
-#define BLSP1_QUP3_SPI_APPS_CLK_SRC			32
-#define BLSP1_QUP4_I2C_APPS_CLK_SRC			33
-#define BLSP1_QUP4_SPI_APPS_CLK_SRC			34
-#define BLSP1_QUP5_I2C_APPS_CLK_SRC			35
-#define BLSP1_QUP5_SPI_APPS_CLK_SRC			36
-#define BLSP1_QUP6_I2C_APPS_CLK_SRC			37
-#define BLSP1_QUP6_SPI_APPS_CLK_SRC			38
-#define BLSP1_UART1_APPS_CLK_SRC			39
-#define BLSP1_UART2_APPS_CLK_SRC			40
-#define BLSP1_UART3_APPS_CLK_SRC			41
-#define BLSP1_UART4_APPS_CLK_SRC			42
-#define BLSP1_UART5_APPS_CLK_SRC			43
-#define BLSP1_UART6_APPS_CLK_SRC			44
-#define BLSP2_QUP1_I2C_APPS_CLK_SRC			45
-#define BLSP2_QUP1_SPI_APPS_CLK_SRC			46
-#define BLSP2_QUP2_I2C_APPS_CLK_SRC			47
-#define BLSP2_QUP2_SPI_APPS_CLK_SRC			48
-#define BLSP2_QUP3_I2C_APPS_CLK_SRC			49
-#define BLSP2_QUP3_SPI_APPS_CLK_SRC			50
-#define BLSP2_QUP4_I2C_APPS_CLK_SRC			51
-#define BLSP2_QUP4_SPI_APPS_CLK_SRC			52
-#define BLSP2_QUP5_I2C_APPS_CLK_SRC			53
-#define BLSP2_QUP5_SPI_APPS_CLK_SRC			54
-#define BLSP2_QUP6_I2C_APPS_CLK_SRC			55
-#define BLSP2_QUP6_SPI_APPS_CLK_SRC			56
-#define BLSP2_UART1_APPS_CLK_SRC			57
-#define BLSP2_UART2_APPS_CLK_SRC			58
-#define BLSP2_UART3_APPS_CLK_SRC			59
-#define BLSP2_UART4_APPS_CLK_SRC			60
-#define BLSP2_UART5_APPS_CLK_SRC			61
-#define BLSP2_UART6_APPS_CLK_SRC			62
-#define CE1_CLK_SRC					63
-#define CE2_CLK_SRC					64
-#define CE3_CLK_SRC					65
-#define GP1_CLK_SRC					66
-#define GP2_CLK_SRC					67
-#define GP3_CLK_SRC					68
-#define PDM2_CLK_SRC					69
-#define QDSS_TRACECLKIN_CLK_SRC				70
-#define RBCPR_CLK_SRC					71
-#define SATA_ASIC0_CLK_SRC				72
-#define SATA_PMALIVE_CLK_SRC				73
-#define SATA_RX_CLK_SRC					74
-#define SATA_RX_OOB_CLK_SRC				75
-#define SDCC1_APPS_CLK_SRC				76
-#define SDCC2_APPS_CLK_SRC				77
-#define SDCC3_APPS_CLK_SRC				78
-#define SDCC4_APPS_CLK_SRC				79
-#define GCC_SNOC_BUS_TIMEOUT0_AHB_CLK			80
-#define SPMI_AHB_CLK_SRC				81
-#define SPMI_SER_CLK_SRC				82
-#define TSIF_REF_CLK_SRC				83
-#define USB30_MOCK_UTMI_CLK_SRC				84
-#define USB30_SEC_MOCK_UTMI_CLK_SRC			85
-#define USB_HS_SYSTEM_CLK_SRC				86
-#define USB_HSIC_CLK_SRC				87
-#define USB_HSIC_IO_CAL_CLK_SRC				88
-#define USB_HSIC_MOCK_UTMI_CLK_SRC			89
-#define USB_HSIC_SYSTEM_CLK_SRC				90
-#define GCC_BAM_DMA_AHB_CLK				91
-#define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK		92
-#define DDR_CLK_SRC					93
-#define GCC_BIMC_CFG_AHB_CLK				94
-#define GCC_BIMC_CLK					95
-#define GCC_BIMC_KPSS_AXI_CLK				96
-#define GCC_BIMC_SLEEP_CLK				97
-#define GCC_BIMC_SYSNOC_AXI_CLK				98
-#define GCC_BIMC_XO_CLK					99
-#define GCC_BLSP1_AHB_CLK				100
-#define GCC_BLSP1_SLEEP_CLK				101
-#define GCC_BLSP1_QUP1_I2C_APPS_CLK			102
-#define GCC_BLSP1_QUP1_SPI_APPS_CLK			103
-#define GCC_BLSP1_QUP2_I2C_APPS_CLK			104
-#define GCC_BLSP1_QUP2_SPI_APPS_CLK			105
-#define GCC_BLSP1_QUP3_I2C_APPS_CLK			106
-#define GCC_BLSP1_QUP3_SPI_APPS_CLK			107
-#define GCC_BLSP1_QUP4_I2C_APPS_CLK			108
-#define GCC_BLSP1_QUP4_SPI_APPS_CLK			109
-#define GCC_BLSP1_QUP5_I2C_APPS_CLK			110
-#define GCC_BLSP1_QUP5_SPI_APPS_CLK			111
-#define GCC_BLSP1_QUP6_I2C_APPS_CLK			112
-#define GCC_BLSP1_QUP6_SPI_APPS_CLK			113
-#define GCC_BLSP1_UART1_APPS_CLK			114
-#define GCC_BLSP1_UART1_SIM_CLK				115
-#define GCC_BLSP1_UART2_APPS_CLK			116
-#define GCC_BLSP1_UART2_SIM_CLK				117
-#define GCC_BLSP1_UART3_APPS_CLK			118
-#define GCC_BLSP1_UART3_SIM_CLK				119
-#define GCC_BLSP1_UART4_APPS_CLK			120
-#define GCC_BLSP1_UART4_SIM_CLK				121
-#define GCC_BLSP1_UART5_APPS_CLK			122
-#define GCC_BLSP1_UART5_SIM_CLK				123
-#define GCC_BLSP1_UART6_APPS_CLK			124
-#define GCC_BLSP1_UART6_SIM_CLK				125
-#define GCC_BLSP2_AHB_CLK				126
-#define GCC_BLSP2_SLEEP_CLK				127
-#define GCC_BLSP2_QUP1_I2C_APPS_CLK			128
-#define GCC_BLSP2_QUP1_SPI_APPS_CLK			129
-#define GCC_BLSP2_QUP2_I2C_APPS_CLK			130
-#define GCC_BLSP2_QUP2_SPI_APPS_CLK			131
-#define GCC_BLSP2_QUP3_I2C_APPS_CLK			132
-#define GCC_BLSP2_QUP3_SPI_APPS_CLK			133
-#define GCC_BLSP2_QUP4_I2C_APPS_CLK			134
-#define GCC_BLSP2_QUP4_SPI_APPS_CLK			135
-#define GCC_BLSP2_QUP5_I2C_APPS_CLK			136
-#define GCC_BLSP2_QUP5_SPI_APPS_CLK			137
-#define GCC_BLSP2_QUP6_I2C_APPS_CLK			138
-#define GCC_BLSP2_QUP6_SPI_APPS_CLK			139
-#define GCC_BLSP2_UART1_APPS_CLK			140
-#define GCC_BLSP2_UART1_SIM_CLK				141
-#define GCC_BLSP2_UART2_APPS_CLK			142
-#define GCC_BLSP2_UART2_SIM_CLK				143
-#define GCC_BLSP2_UART3_APPS_CLK			144
-#define GCC_BLSP2_UART3_SIM_CLK				145
-#define GCC_BLSP2_UART4_APPS_CLK			146
-#define GCC_BLSP2_UART4_SIM_CLK				147
-#define GCC_BLSP2_UART5_APPS_CLK			148
-#define GCC_BLSP2_UART5_SIM_CLK				149
-#define GCC_BLSP2_UART6_APPS_CLK			150
-#define GCC_BLSP2_UART6_SIM_CLK				151
-#define GCC_BOOT_ROM_AHB_CLK				152
-#define GCC_CE1_AHB_CLK					153
-#define GCC_CE1_AXI_CLK					154
-#define GCC_CE1_CLK					155
-#define GCC_CE2_AHB_CLK					156
-#define GCC_CE2_AXI_CLK					157
-#define GCC_CE2_CLK					158
-#define GCC_CE3_AHB_CLK					159
-#define GCC_CE3_AXI_CLK					160
-#define GCC_CE3_CLK					161
-#define GCC_CNOC_BUS_TIMEOUT0_AHB_CLK			162
-#define GCC_CNOC_BUS_TIMEOUT1_AHB_CLK			163
-#define GCC_CNOC_BUS_TIMEOUT2_AHB_CLK			164
-#define GCC_CNOC_BUS_TIMEOUT3_AHB_CLK			165
-#define GCC_CNOC_BUS_TIMEOUT4_AHB_CLK			166
-#define GCC_CNOC_BUS_TIMEOUT5_AHB_CLK			167
-#define GCC_CNOC_BUS_TIMEOUT6_AHB_CLK			168
-#define GCC_CNOC_BUS_TIMEOUT7_AHB_CLK			169
-#define GCC_CFG_NOC_AHB_CLK				170
-#define GCC_CFG_NOC_DDR_CFG_CLK				171
-#define GCC_CFG_NOC_RPM_AHB_CLK				172
-#define GCC_COPSS_SMMU_AHB_CLK				173
-#define GCC_COPSS_SMMU_AXI_CLK				174
-#define GCC_DCD_XO_CLK					175
-#define GCC_BIMC_DDR_CH0_CLK				176
-#define GCC_BIMC_DDR_CH1_CLK				177
-#define GCC_BIMC_DDR_CPLL0_CLK				178
-#define GCC_BIMC_DDR_CPLL1_CLK				179
-#define GCC_BIMC_GFX_CLK				180
-#define GCC_DDR_DIM_CFG_CLK				181
-#define GCC_DDR_DIM_SLEEP_CLK				182
-#define GCC_DEHR_CLK					183
-#define GCC_AHB_CLK					184
-#define GCC_IM_SLEEP_CLK				185
-#define GCC_XO_CLK					186
-#define GCC_XO_DIV4_CLK					187
-#define GCC_GP1_CLK					188
-#define GCC_GP2_CLK					189
-#define GCC_GP3_CLK					190
-#define GCC_IMEM_AXI_CLK				191
-#define GCC_IMEM_CFG_AHB_CLK				192
-#define GCC_KPSS_AHB_CLK				193
-#define GCC_KPSS_AXI_CLK				194
-#define GCC_LPASS_MPORT_AXI_CLK				195
-#define GCC_LPASS_Q6_AXI_CLK				196
-#define GCC_LPASS_SWAY_CLK				197
-#define GCC_MMSS_BIMC_GFX_CLK				198
-#define GCC_MMSS_NOC_AT_CLK				199
-#define GCC_MMSS_NOC_CFG_AHB_CLK			200
-#define GCC_MMSS_VPU_MAPLE_SYS_NOC_AXI_CLK		201
-#define GCC_OCMEM_NOC_CFG_AHB_CLK			202
-#define GCC_OCMEM_SYS_NOC_AXI_CLK			203
-#define GCC_MPM_AHB_CLK					204
-#define GCC_MSG_RAM_AHB_CLK				205
-#define GCC_NOC_CONF_XPU_AHB_CLK			206
-#define GCC_PDM2_CLK					207
-#define GCC_PDM_AHB_CLK					208
-#define GCC_PDM_XO4_CLK					209
-#define GCC_PERIPH_NOC_AHB_CLK				210
-#define GCC_PERIPH_NOC_AT_CLK				211
-#define GCC_PERIPH_NOC_CFG_AHB_CLK			212
-#define GCC_PERIPH_NOC_USB_HSIC_AHB_CLK			213
-#define GCC_PERIPH_NOC_MPU_CFG_AHB_CLK			214
-#define GCC_PERIPH_XPU_AHB_CLK				215
-#define GCC_PNOC_BUS_TIMEOUT0_AHB_CLK			216
-#define GCC_PNOC_BUS_TIMEOUT1_AHB_CLK			217
-#define GCC_PNOC_BUS_TIMEOUT2_AHB_CLK			218
-#define GCC_PNOC_BUS_TIMEOUT3_AHB_CLK			219
-#define GCC_PNOC_BUS_TIMEOUT4_AHB_CLK			220
-#define GCC_PRNG_AHB_CLK				221
-#define GCC_QDSS_AT_CLK					222
-#define GCC_QDSS_CFG_AHB_CLK				223
-#define GCC_QDSS_DAP_AHB_CLK				224
-#define GCC_QDSS_DAP_CLK				225
-#define GCC_QDSS_ETR_USB_CLK				226
-#define GCC_QDSS_STM_CLK				227
-#define GCC_QDSS_TRACECLKIN_CLK				228
-#define GCC_QDSS_TSCTR_DIV16_CLK			229
-#define GCC_QDSS_TSCTR_DIV2_CLK				230
-#define GCC_QDSS_TSCTR_DIV3_CLK				231
-#define GCC_QDSS_TSCTR_DIV4_CLK				232
-#define GCC_QDSS_TSCTR_DIV8_CLK				233
-#define GCC_QDSS_RBCPR_XPU_AHB_CLK			234
-#define GCC_RBCPR_AHB_CLK				235
-#define GCC_RBCPR_CLK					236
-#define GCC_RPM_BUS_AHB_CLK				237
-#define GCC_RPM_PROC_HCLK				238
-#define GCC_RPM_SLEEP_CLK				239
-#define GCC_RPM_TIMER_CLK				240
-#define GCC_SATA_ASIC0_CLK				241
-#define GCC_SATA_AXI_CLK				242
-#define GCC_SATA_CFG_AHB_CLK				243
-#define GCC_SATA_PMALIVE_CLK				244
-#define GCC_SATA_RX_CLK					245
-#define GCC_SATA_RX_OOB_CLK				246
-#define GCC_SDCC1_AHB_CLK				247
-#define GCC_SDCC1_APPS_CLK				248
-#define GCC_SDCC1_CDCCAL_FF_CLK				249
-#define GCC_SDCC1_CDCCAL_SLEEP_CLK			250
-#define GCC_SDCC2_AHB_CLK				251
-#define GCC_SDCC2_APPS_CLK				252
-#define GCC_SDCC2_INACTIVITY_TIMERS_CLK			253
-#define GCC_SDCC3_AHB_CLK				254
-#define GCC_SDCC3_APPS_CLK				255
-#define GCC_SDCC3_INACTIVITY_TIMERS_CLK			256
-#define GCC_SDCC4_AHB_CLK				257
-#define GCC_SDCC4_APPS_CLK				258
-#define GCC_SDCC4_INACTIVITY_TIMERS_CLK			259
-#define GCC_SEC_CTRL_ACC_CLK				260
-#define GCC_SEC_CTRL_AHB_CLK				261
-#define GCC_SEC_CTRL_BOOT_ROM_PATCH_CLK			262
-#define GCC_SEC_CTRL_CLK				263
-#define GCC_SEC_CTRL_SENSE_CLK				264
-#define GCC_SNOC_BUS_TIMEOUT2_AHB_CLK			265
-#define GCC_SNOC_BUS_TIMEOUT3_AHB_CLK			266
-#define GCC_SPDM_BIMC_CY_CLK				267
-#define GCC_SPDM_CFG_AHB_CLK				268
-#define GCC_SPDM_DEBUG_CY_CLK				269
-#define GCC_SPDM_FF_CLK					270
-#define GCC_SPDM_MSTR_AHB_CLK				271
-#define GCC_SPDM_PNOC_CY_CLK				272
-#define GCC_SPDM_RPM_CY_CLK				273
-#define GCC_SPDM_SNOC_CY_CLK				274
-#define GCC_SPMI_AHB_CLK				275
-#define GCC_SPMI_CNOC_AHB_CLK				276
-#define GCC_SPMI_SER_CLK				277
-#define GCC_SPSS_AHB_CLK				278
-#define GCC_SNOC_CNOC_AHB_CLK				279
-#define GCC_SNOC_PNOC_AHB_CLK				280
-#define GCC_SYS_NOC_AT_CLK				281
-#define GCC_SYS_NOC_AXI_CLK				282
-#define GCC_SYS_NOC_KPSS_AHB_CLK			283
-#define GCC_SYS_NOC_QDSS_STM_AXI_CLK			284
-#define GCC_SYS_NOC_UFS_AXI_CLK				285
-#define GCC_SYS_NOC_USB3_AXI_CLK			286
-#define GCC_SYS_NOC_USB3_SEC_AXI_CLK			287
-#define GCC_TCSR_AHB_CLK				288
-#define GCC_TLMM_AHB_CLK				289
-#define GCC_TLMM_CLK					290
-#define GCC_TSIF_AHB_CLK				291
-#define GCC_TSIF_INACTIVITY_TIMERS_CLK			292
-#define GCC_TSIF_REF_CLK				293
-#define GCC_UFS_AHB_CLK					294
-#define GCC_UFS_AXI_CLK					295
-#define GCC_UFS_RX_CFG_CLK				296
-#define GCC_UFS_RX_SYMBOL_0_CLK				297
-#define GCC_UFS_RX_SYMBOL_1_CLK				298
-#define GCC_UFS_TX_CFG_CLK				299
-#define GCC_UFS_TX_SYMBOL_0_CLK				300
-#define GCC_UFS_TX_SYMBOL_1_CLK				301
-#define GCC_USB2A_PHY_SLEEP_CLK				302
-#define GCC_USB2B_PHY_SLEEP_CLK				303
-#define GCC_USB30_MASTER_CLK				304
-#define GCC_USB30_MOCK_UTMI_CLK				305
-#define GCC_USB30_SLEEP_CLK				306
-#define GCC_USB30_SEC_MASTER_CLK			307
-#define GCC_USB30_SEC_MOCK_UTMI_CLK			308
-#define GCC_USB30_SEC_SLEEP_CLK				309
-#define GCC_USB_HS_AHB_CLK				310
-#define GCC_USB_HS_INACTIVITY_TIMERS_CLK		311
-#define GCC_USB_HS_SYSTEM_CLK				312
-#define GCC_USB_HSIC_AHB_CLK				313
-#define GCC_USB_HSIC_CLK				314
-#define GCC_USB_HSIC_IO_CAL_CLK				315
-#define GCC_USB_HSIC_IO_CAL_SLEEP_CLK			316
-#define GCC_USB_HSIC_MOCK_UTMI_CLK			317
-#define GCC_USB_HSIC_SYSTEM_CLK				318
-#define PCIE_0_AUX_CLK_SRC				319
-#define PCIE_0_PIPE_CLK_SRC				320
-#define PCIE_1_AUX_CLK_SRC				321
-#define PCIE_1_PIPE_CLK_SRC				322
-#define GCC_PCIE_0_AUX_CLK				323
-#define GCC_PCIE_0_CFG_AHB_CLK				324
-#define GCC_PCIE_0_MSTR_AXI_CLK				325
-#define GCC_PCIE_0_PIPE_CLK				326
-#define GCC_PCIE_0_SLV_AXI_CLK				327
-#define GCC_PCIE_1_AUX_CLK				328
-#define GCC_PCIE_1_CFG_AHB_CLK				329
-#define GCC_PCIE_1_MSTR_AXI_CLK				330
-#define GCC_PCIE_1_PIPE_CLK				331
-#define GCC_PCIE_1_SLV_AXI_CLK				332
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-ipq806x.h
deleted file mode 100644
index 04fb29ae30e..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-ipq806x.h
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_GCC_IPQ806X_H
-#define _DT_BINDINGS_CLK_GCC_IPQ806X_H
-
-#define AFAB_CLK_SRC				0
-#define QDSS_STM_CLK				1
-#define SCSS_A_CLK				2
-#define SCSS_H_CLK				3
-#define AFAB_CORE_CLK				4
-#define SCSS_XO_SRC_CLK				5
-#define AFAB_EBI1_CH0_A_CLK			6
-#define AFAB_EBI1_CH1_A_CLK			7
-#define AFAB_AXI_S0_FCLK			8
-#define AFAB_AXI_S1_FCLK			9
-#define AFAB_AXI_S2_FCLK			10
-#define AFAB_AXI_S3_FCLK			11
-#define AFAB_AXI_S4_FCLK			12
-#define SFAB_CORE_CLK				13
-#define SFAB_AXI_S0_FCLK			14
-#define SFAB_AXI_S1_FCLK			15
-#define SFAB_AXI_S2_FCLK			16
-#define SFAB_AXI_S3_FCLK			17
-#define SFAB_AXI_S4_FCLK			18
-#define SFAB_AXI_S5_FCLK			19
-#define SFAB_AHB_S0_FCLK			20
-#define SFAB_AHB_S1_FCLK			21
-#define SFAB_AHB_S2_FCLK			22
-#define SFAB_AHB_S3_FCLK			23
-#define SFAB_AHB_S4_FCLK			24
-#define SFAB_AHB_S5_FCLK			25
-#define SFAB_AHB_S6_FCLK			26
-#define SFAB_AHB_S7_FCLK			27
-#define QDSS_AT_CLK_SRC				28
-#define QDSS_AT_CLK				29
-#define QDSS_TRACECLKIN_CLK_SRC			30
-#define QDSS_TRACECLKIN_CLK			31
-#define QDSS_TSCTR_CLK_SRC			32
-#define QDSS_TSCTR_CLK				33
-#define SFAB_ADM0_M0_A_CLK			34
-#define SFAB_ADM0_M1_A_CLK			35
-#define SFAB_ADM0_M2_H_CLK			36
-#define ADM0_CLK				37
-#define ADM0_PBUS_CLK				38
-#define IMEM0_A_CLK				39
-#define QDSS_H_CLK				40
-#define PCIE_A_CLK				41
-#define PCIE_AUX_CLK				42
-#define PCIE_H_CLK				43
-#define PCIE_PHY_CLK				44
-#define SFAB_CLK_SRC				45
-#define SFAB_LPASS_Q6_A_CLK			46
-#define SFAB_AFAB_M_A_CLK			47
-#define AFAB_SFAB_M0_A_CLK			48
-#define AFAB_SFAB_M1_A_CLK			49
-#define SFAB_SATA_S_H_CLK			50
-#define DFAB_CLK_SRC				51
-#define DFAB_CLK				52
-#define SFAB_DFAB_M_A_CLK			53
-#define DFAB_SFAB_M_A_CLK			54
-#define DFAB_SWAY0_H_CLK			55
-#define DFAB_SWAY1_H_CLK			56
-#define DFAB_ARB0_H_CLK				57
-#define DFAB_ARB1_H_CLK				58
-#define PPSS_H_CLK				59
-#define PPSS_PROC_CLK				60
-#define PPSS_TIMER0_CLK				61
-#define PPSS_TIMER1_CLK				62
-#define PMEM_A_CLK				63
-#define DMA_BAM_H_CLK				64
-#define SIC_H_CLK				65
-#define SPS_TIC_H_CLK				66
-#define CFPB_2X_CLK_SRC				67
-#define CFPB_CLK				68
-#define CFPB0_H_CLK				69
-#define CFPB1_H_CLK				70
-#define CFPB2_H_CLK				71
-#define SFAB_CFPB_M_H_CLK			72
-#define CFPB_MASTER_H_CLK			73
-#define SFAB_CFPB_S_H_CLK			74
-#define CFPB_SPLITTER_H_CLK			75
-#define TSIF_H_CLK				76
-#define TSIF_INACTIVITY_TIMERS_CLK		77
-#define TSIF_REF_SRC				78
-#define TSIF_REF_CLK				79
-#define CE1_H_CLK				80
-#define CE1_CORE_CLK				81
-#define CE1_SLEEP_CLK				82
-#define CE2_H_CLK				83
-#define CE2_CORE_CLK				84
-#define SFPB_H_CLK_SRC				85
-#define SFPB_H_CLK				86
-#define SFAB_SFPB_M_H_CLK			87
-#define SFAB_SFPB_S_H_CLK			88
-#define RPM_PROC_CLK				89
-#define RPM_BUS_H_CLK				90
-#define RPM_SLEEP_CLK				91
-#define RPM_TIMER_CLK				92
-#define RPM_MSG_RAM_H_CLK			93
-#define PMIC_ARB0_H_CLK				94
-#define PMIC_ARB1_H_CLK				95
-#define PMIC_SSBI2_SRC				96
-#define PMIC_SSBI2_CLK				97
-#define SDC1_H_CLK				98
-#define SDC2_H_CLK				99
-#define SDC3_H_CLK				100
-#define SDC4_H_CLK				101
-#define SDC1_SRC				102
-#define SDC1_CLK				103
-#define SDC2_SRC				104
-#define SDC2_CLK				105
-#define SDC3_SRC				106
-#define SDC3_CLK				107
-#define SDC4_SRC				108
-#define SDC4_CLK				109
-#define USB_HS1_H_CLK				110
-#define USB_HS1_XCVR_SRC			111
-#define USB_HS1_XCVR_CLK			112
-#define USB_HSIC_H_CLK				113
-#define USB_HSIC_XCVR_SRC			114
-#define USB_HSIC_XCVR_CLK			115
-#define USB_HSIC_SYSTEM_CLK_SRC			116
-#define USB_HSIC_SYSTEM_CLK			117
-#define CFPB0_C0_H_CLK				118
-#define CFPB0_D0_H_CLK				119
-#define CFPB0_C1_H_CLK				120
-#define CFPB0_D1_H_CLK				121
-#define USB_FS1_H_CLK				122
-#define USB_FS1_XCVR_SRC			123
-#define USB_FS1_XCVR_CLK			124
-#define USB_FS1_SYSTEM_CLK			125
-#define GSBI_COMMON_SIM_SRC			126
-#define GSBI1_H_CLK				127
-#define GSBI2_H_CLK				128
-#define GSBI3_H_CLK				129
-#define GSBI4_H_CLK				130
-#define GSBI5_H_CLK				131
-#define GSBI6_H_CLK				132
-#define GSBI7_H_CLK				133
-#define GSBI1_QUP_SRC				134
-#define GSBI1_QUP_CLK				135
-#define GSBI2_QUP_SRC				136
-#define GSBI2_QUP_CLK				137
-#define GSBI3_QUP_SRC				138
-#define GSBI3_QUP_CLK				139
-#define GSBI4_QUP_SRC				140
-#define GSBI4_QUP_CLK				141
-#define GSBI5_QUP_SRC				142
-#define GSBI5_QUP_CLK				143
-#define GSBI6_QUP_SRC				144
-#define GSBI6_QUP_CLK				145
-#define GSBI7_QUP_SRC				146
-#define GSBI7_QUP_CLK				147
-#define GSBI1_UART_SRC				148
-#define GSBI1_UART_CLK				149
-#define GSBI2_UART_SRC				150
-#define GSBI2_UART_CLK				151
-#define GSBI3_UART_SRC				152
-#define GSBI3_UART_CLK				153
-#define GSBI4_UART_SRC				154
-#define GSBI4_UART_CLK				155
-#define GSBI5_UART_SRC				156
-#define GSBI5_UART_CLK				157
-#define GSBI6_UART_SRC				158
-#define GSBI6_UART_CLK				159
-#define GSBI7_UART_SRC				160
-#define GSBI7_UART_CLK				161
-#define GSBI1_SIM_CLK				162
-#define GSBI2_SIM_CLK				163
-#define GSBI3_SIM_CLK				164
-#define GSBI4_SIM_CLK				165
-#define GSBI5_SIM_CLK				166
-#define GSBI6_SIM_CLK				167
-#define GSBI7_SIM_CLK				168
-#define USB_HSIC_HSIC_CLK_SRC			169
-#define USB_HSIC_HSIC_CLK			170
-#define USB_HSIC_HSIO_CAL_CLK			171
-#define SPDM_CFG_H_CLK				172
-#define SPDM_MSTR_H_CLK				173
-#define SPDM_FF_CLK_SRC				174
-#define SPDM_FF_CLK				175
-#define SEC_CTRL_CLK				176
-#define SEC_CTRL_ACC_CLK_SRC			177
-#define SEC_CTRL_ACC_CLK			178
-#define TLMM_H_CLK				179
-#define TLMM_CLK				180
-#define SATA_H_CLK				181
-#define SATA_CLK_SRC				182
-#define SATA_RXOOB_CLK				183
-#define SATA_PMALIVE_CLK			184
-#define SATA_PHY_REF_CLK			185
-#define SATA_A_CLK				186
-#define SATA_PHY_CFG_CLK			187
-#define TSSC_CLK_SRC				188
-#define TSSC_CLK				189
-#define PDM_SRC					190
-#define PDM_CLK					191
-#define GP0_SRC					192
-#define GP0_CLK					193
-#define GP1_SRC					194
-#define GP1_CLK					195
-#define GP2_SRC					196
-#define GP2_CLK					197
-#define MPM_CLK					198
-#define EBI1_CLK_SRC				199
-#define EBI1_CH0_CLK				200
-#define EBI1_CH1_CLK				201
-#define EBI1_2X_CLK				202
-#define EBI1_CH0_DQ_CLK				203
-#define EBI1_CH1_DQ_CLK				204
-#define EBI1_CH0_CA_CLK				205
-#define EBI1_CH1_CA_CLK				206
-#define EBI1_XO_CLK				207
-#define SFAB_SMPSS_S_H_CLK			208
-#define PRNG_SRC				209
-#define PRNG_CLK				210
-#define PXO_SRC					211
-#define SPDM_CY_PORT0_CLK			212
-#define SPDM_CY_PORT1_CLK			213
-#define SPDM_CY_PORT2_CLK			214
-#define SPDM_CY_PORT3_CLK			215
-#define SPDM_CY_PORT4_CLK			216
-#define SPDM_CY_PORT5_CLK			217
-#define SPDM_CY_PORT6_CLK			218
-#define SPDM_CY_PORT7_CLK			219
-#define PLL0					220
-#define PLL0_VOTE				221
-#define PLL3					222
-#define PLL3_VOTE				223
-#define PLL4_VOTE				225
-#define PLL8					226
-#define PLL8_VOTE				227
-#define PLL9					228
-#define PLL10					229
-#define PLL11					230
-#define PLL12					231
-#define PLL14					232
-#define PLL14_VOTE				233
-#define PLL18					234
-#define CE5_SRC					235
-#define CE5_H_CLK				236
-#define CE5_CORE_CLK				237
-#define CE3_SLEEP_CLK				238
-#define SFAB_AHB_S8_FCLK			239
-#define SPDM_CY_PORT8_CLK			246
-#define PCIE_ALT_REF_SRC			247
-#define PCIE_ALT_REF_CLK			248
-#define PCIE_1_A_CLK				249
-#define PCIE_1_AUX_CLK				250
-#define PCIE_1_H_CLK				251
-#define PCIE_1_PHY_CLK				252
-#define PCIE_1_ALT_REF_SRC			253
-#define PCIE_1_ALT_REF_CLK			254
-#define PCIE_2_A_CLK				255
-#define PCIE_2_AUX_CLK				256
-#define PCIE_2_H_CLK				257
-#define PCIE_2_PHY_CLK				258
-#define PCIE_2_ALT_REF_SRC			259
-#define PCIE_2_ALT_REF_CLK			260
-#define EBI2_CLK				261
-#define USB30_SLEEP_CLK				262
-#define USB30_UTMI_SRC				263
-#define USB30_0_UTMI_CLK			264
-#define USB30_1_UTMI_CLK			265
-#define USB30_MASTER_SRC			266
-#define USB30_0_MASTER_CLK			267
-#define USB30_1_MASTER_CLK			268
-#define GMAC_CORE1_CLK_SRC			269
-#define GMAC_CORE2_CLK_SRC			270
-#define GMAC_CORE3_CLK_SRC			271
-#define GMAC_CORE4_CLK_SRC			272
-#define GMAC_CORE1_CLK				273
-#define GMAC_CORE2_CLK				274
-#define GMAC_CORE3_CLK				275
-#define GMAC_CORE4_CLK				276
-#define UBI32_CORE1_CLK_SRC			277
-#define UBI32_CORE2_CLK_SRC			278
-#define UBI32_CORE1_CLK				279
-#define UBI32_CORE2_CLK				280
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8660.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8660.h
deleted file mode 100644
index 67665f6813d..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8660.h
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_MSM_GCC_8660_H
-#define _DT_BINDINGS_CLK_MSM_GCC_8660_H
-
-#define AFAB_CLK_SRC				0
-#define AFAB_CORE_CLK				1
-#define SCSS_A_CLK				2
-#define SCSS_H_CLK				3
-#define SCSS_XO_SRC_CLK				4
-#define AFAB_EBI1_CH0_A_CLK			5
-#define AFAB_EBI1_CH1_A_CLK			6
-#define AFAB_AXI_S0_FCLK			7
-#define AFAB_AXI_S1_FCLK			8
-#define AFAB_AXI_S2_FCLK			9
-#define AFAB_AXI_S3_FCLK			10
-#define AFAB_AXI_S4_FCLK			11
-#define SFAB_CORE_CLK				12
-#define SFAB_AXI_S0_FCLK			13
-#define SFAB_AXI_S1_FCLK			14
-#define SFAB_AXI_S2_FCLK			15
-#define SFAB_AXI_S3_FCLK			16
-#define SFAB_AXI_S4_FCLK			17
-#define SFAB_AHB_S0_FCLK			18
-#define SFAB_AHB_S1_FCLK			19
-#define SFAB_AHB_S2_FCLK			20
-#define SFAB_AHB_S3_FCLK			21
-#define SFAB_AHB_S4_FCLK			22
-#define SFAB_AHB_S5_FCLK			23
-#define SFAB_AHB_S6_FCLK			24
-#define SFAB_ADM0_M0_A_CLK			25
-#define SFAB_ADM0_M1_A_CLK			26
-#define SFAB_ADM0_M2_A_CLK			27
-#define ADM0_CLK				28
-#define ADM0_PBUS_CLK				29
-#define SFAB_ADM1_M0_A_CLK			30
-#define SFAB_ADM1_M1_A_CLK			31
-#define SFAB_ADM1_M2_A_CLK			32
-#define MMFAB_ADM1_M3_A_CLK			33
-#define ADM1_CLK				34
-#define ADM1_PBUS_CLK				35
-#define IMEM0_A_CLK				36
-#define MAHB0_CLK				37
-#define SFAB_LPASS_Q6_A_CLK			38
-#define SFAB_AFAB_M_A_CLK			39
-#define AFAB_SFAB_M0_A_CLK			40
-#define AFAB_SFAB_M1_A_CLK			41
-#define DFAB_CLK_SRC				42
-#define DFAB_CLK				43
-#define DFAB_CORE_CLK				44
-#define SFAB_DFAB_M_A_CLK			45
-#define DFAB_SFAB_M_A_CLK			46
-#define DFAB_SWAY0_H_CLK			47
-#define DFAB_SWAY1_H_CLK			48
-#define DFAB_ARB0_H_CLK				49
-#define DFAB_ARB1_H_CLK				50
-#define PPSS_H_CLK				51
-#define PPSS_PROC_CLK				52
-#define PPSS_TIMER0_CLK				53
-#define PPSS_TIMER1_CLK				54
-#define PMEM_A_CLK				55
-#define DMA_BAM_H_CLK				56
-#define SIC_H_CLK				57
-#define SPS_TIC_H_CLK				58
-#define SLIMBUS_H_CLK				59
-#define SLIMBUS_XO_SRC_CLK			60
-#define CFPB_2X_CLK_SRC				61
-#define CFPB_CLK				62
-#define CFPB0_H_CLK				63
-#define CFPB1_H_CLK				64
-#define CFPB2_H_CLK				65
-#define EBI2_2X_CLK				66
-#define EBI2_CLK				67
-#define SFAB_CFPB_M_H_CLK			68
-#define CFPB_MASTER_H_CLK			69
-#define SFAB_CFPB_S_HCLK			70
-#define CFPB_SPLITTER_H_CLK			71
-#define TSIF_H_CLK				72
-#define TSIF_INACTIVITY_TIMERS_CLK		73
-#define TSIF_REF_SRC				74
-#define TSIF_REF_CLK				75
-#define CE1_H_CLK				76
-#define CE2_H_CLK				77
-#define SFPB_H_CLK_SRC				78
-#define SFPB_H_CLK				79
-#define SFAB_SFPB_M_H_CLK			80
-#define SFAB_SFPB_S_H_CLK			81
-#define RPM_PROC_CLK				82
-#define RPM_BUS_H_CLK				83
-#define RPM_SLEEP_CLK				84
-#define RPM_TIMER_CLK				85
-#define MODEM_AHB1_H_CLK			86
-#define MODEM_AHB2_H_CLK			87
-#define RPM_MSG_RAM_H_CLK			88
-#define SC_H_CLK				89
-#define SC_A_CLK				90
-#define PMIC_ARB0_H_CLK				91
-#define PMIC_ARB1_H_CLK				92
-#define PMIC_SSBI2_SRC				93
-#define PMIC_SSBI2_CLK				94
-#define SDC1_H_CLK				95
-#define SDC2_H_CLK				96
-#define SDC3_H_CLK				97
-#define SDC4_H_CLK				98
-#define SDC5_H_CLK				99
-#define SDC1_SRC				100
-#define SDC2_SRC				101
-#define SDC3_SRC				102
-#define SDC4_SRC				103
-#define SDC5_SRC				104
-#define SDC1_CLK				105
-#define SDC2_CLK				106
-#define SDC3_CLK				107
-#define SDC4_CLK				108
-#define SDC5_CLK				109
-#define USB_HS1_H_CLK				110
-#define USB_HS1_XCVR_SRC			111
-#define USB_HS1_XCVR_CLK			112
-#define USB_HS2_H_CLK				113
-#define USB_HS2_XCVR_SRC			114
-#define USB_HS2_XCVR_CLK			115
-#define USB_FS1_H_CLK				116
-#define USB_FS1_XCVR_FS_SRC			117
-#define USB_FS1_XCVR_FS_CLK			118
-#define USB_FS1_SYSTEM_CLK			119
-#define USB_FS2_H_CLK				120
-#define USB_FS2_XCVR_FS_SRC			121
-#define USB_FS2_XCVR_FS_CLK			122
-#define USB_FS2_SYSTEM_CLK			123
-#define GSBI_COMMON_SIM_SRC			124
-#define GSBI1_H_CLK				125
-#define GSBI2_H_CLK				126
-#define GSBI3_H_CLK				127
-#define GSBI4_H_CLK				128
-#define GSBI5_H_CLK				129
-#define GSBI6_H_CLK				130
-#define GSBI7_H_CLK				131
-#define GSBI8_H_CLK				132
-#define GSBI9_H_CLK				133
-#define GSBI10_H_CLK				134
-#define GSBI11_H_CLK				135
-#define GSBI12_H_CLK				136
-#define GSBI1_UART_SRC				137
-#define GSBI1_UART_CLK				138
-#define GSBI2_UART_SRC				139
-#define GSBI2_UART_CLK				140
-#define GSBI3_UART_SRC				141
-#define GSBI3_UART_CLK				142
-#define GSBI4_UART_SRC				143
-#define GSBI4_UART_CLK				144
-#define GSBI5_UART_SRC				145
-#define GSBI5_UART_CLK				146
-#define GSBI6_UART_SRC				147
-#define GSBI6_UART_CLK				148
-#define GSBI7_UART_SRC				149
-#define GSBI7_UART_CLK				150
-#define GSBI8_UART_SRC				151
-#define GSBI8_UART_CLK				152
-#define GSBI9_UART_SRC				153
-#define GSBI9_UART_CLK				154
-#define GSBI10_UART_SRC				155
-#define GSBI10_UART_CLK				156
-#define GSBI11_UART_SRC				157
-#define GSBI11_UART_CLK				158
-#define GSBI12_UART_SRC				159
-#define GSBI12_UART_CLK				160
-#define GSBI1_QUP_SRC				161
-#define GSBI1_QUP_CLK				162
-#define GSBI2_QUP_SRC				163
-#define GSBI2_QUP_CLK				164
-#define GSBI3_QUP_SRC				165
-#define GSBI3_QUP_CLK				166
-#define GSBI4_QUP_SRC				167
-#define GSBI4_QUP_CLK				168
-#define GSBI5_QUP_SRC				169
-#define GSBI5_QUP_CLK				170
-#define GSBI6_QUP_SRC				171
-#define GSBI6_QUP_CLK				172
-#define GSBI7_QUP_SRC				173
-#define GSBI7_QUP_CLK				174
-#define GSBI8_QUP_SRC				175
-#define GSBI8_QUP_CLK				176
-#define GSBI9_QUP_SRC				177
-#define GSBI9_QUP_CLK				178
-#define GSBI10_QUP_SRC				179
-#define GSBI10_QUP_CLK				180
-#define GSBI11_QUP_SRC				181
-#define GSBI11_QUP_CLK				182
-#define GSBI12_QUP_SRC				183
-#define GSBI12_QUP_CLK				184
-#define GSBI1_SIM_CLK				185
-#define GSBI2_SIM_CLK				186
-#define GSBI3_SIM_CLK				187
-#define GSBI4_SIM_CLK				188
-#define GSBI5_SIM_CLK				189
-#define GSBI6_SIM_CLK				190
-#define GSBI7_SIM_CLK				191
-#define GSBI8_SIM_CLK				192
-#define GSBI9_SIM_CLK				193
-#define GSBI10_SIM_CLK				194
-#define GSBI11_SIM_CLK				195
-#define GSBI12_SIM_CLK				196
-#define SPDM_CFG_H_CLK				197
-#define SPDM_MSTR_H_CLK				198
-#define SPDM_FF_CLK_SRC				199
-#define SPDM_FF_CLK				200
-#define SEC_CTRL_CLK				201
-#define SEC_CTRL_ACC_CLK_SRC			202
-#define SEC_CTRL_ACC_CLK			203
-#define TLMM_H_CLK				204
-#define TLMM_CLK				205
-#define MARM_CLK_SRC				206
-#define MARM_CLK				207
-#define MAHB1_SRC				208
-#define MAHB1_CLK				209
-#define SFAB_MSS_S_H_CLK			210
-#define MAHB2_SRC				211
-#define MAHB2_CLK				212
-#define MSS_MODEM_CLK_SRC			213
-#define MSS_MODEM_CXO_CLK			214
-#define MSS_SLP_CLK				215
-#define MSS_SYS_REF_CLK				216
-#define TSSC_CLK_SRC				217
-#define TSSC_CLK				218
-#define PDM_SRC					219
-#define PDM_CLK					220
-#define GP0_SRC					221
-#define GP0_CLK					222
-#define GP1_SRC					223
-#define GP1_CLK					224
-#define GP2_SRC					225
-#define GP2_CLK					226
-#define PMEM_CLK				227
-#define MPM_CLK					228
-#define EBI1_ASFAB_SRC				229
-#define EBI1_CLK_SRC				230
-#define EBI1_CH0_CLK				231
-#define EBI1_CH1_CLK				232
-#define SFAB_SMPSS_S_H_CLK			233
-#define PRNG_SRC				234
-#define PRNG_CLK				235
-#define PXO_SRC					236
-#define LPASS_CXO_CLK				237
-#define LPASS_PXO_CLK				238
-#define SPDM_CY_PORT0_CLK			239
-#define SPDM_CY_PORT1_CLK			240
-#define SPDM_CY_PORT2_CLK			241
-#define SPDM_CY_PORT3_CLK			242
-#define SPDM_CY_PORT4_CLK			243
-#define SPDM_CY_PORT5_CLK			244
-#define SPDM_CY_PORT6_CLK			245
-#define SPDM_CY_PORT7_CLK			246
-#define PLL0					247
-#define PLL0_VOTE				248
-#define PLL5					249
-#define PLL6					250
-#define PLL6_VOTE				251
-#define PLL8					252
-#define PLL8_VOTE				253
-#define PLL9					254
-#define PLL10					255
-#define PLL11					256
-#define PLL12					257
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8960.h
deleted file mode 100644
index 7d20eedfee9..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8960.h
+++ /dev/null
@@ -1,323 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_MSM_GCC_8960_H
-#define _DT_BINDINGS_CLK_MSM_GCC_8960_H
-
-#define AFAB_CLK_SRC				0
-#define AFAB_CORE_CLK				1
-#define SFAB_MSS_Q6_SW_A_CLK			2
-#define SFAB_MSS_Q6_FW_A_CLK			3
-#define QDSS_STM_CLK				4
-#define SCSS_A_CLK				5
-#define SCSS_H_CLK				6
-#define SCSS_XO_SRC_CLK				7
-#define AFAB_EBI1_CH0_A_CLK			8
-#define AFAB_EBI1_CH1_A_CLK			9
-#define AFAB_AXI_S0_FCLK			10
-#define AFAB_AXI_S1_FCLK			11
-#define AFAB_AXI_S2_FCLK			12
-#define AFAB_AXI_S3_FCLK			13
-#define AFAB_AXI_S4_FCLK			14
-#define SFAB_CORE_CLK				15
-#define SFAB_AXI_S0_FCLK			16
-#define SFAB_AXI_S1_FCLK			17
-#define SFAB_AXI_S2_FCLK			18
-#define SFAB_AXI_S3_FCLK			19
-#define SFAB_AXI_S4_FCLK			20
-#define SFAB_AHB_S0_FCLK			21
-#define SFAB_AHB_S1_FCLK			22
-#define SFAB_AHB_S2_FCLK			23
-#define SFAB_AHB_S3_FCLK			24
-#define SFAB_AHB_S4_FCLK			25
-#define SFAB_AHB_S5_FCLK			26
-#define SFAB_AHB_S6_FCLK			27
-#define SFAB_AHB_S7_FCLK			28
-#define QDSS_AT_CLK_SRC				29
-#define QDSS_AT_CLK				30
-#define QDSS_TRACECLKIN_CLK_SRC			31
-#define QDSS_TRACECLKIN_CLK			32
-#define QDSS_TSCTR_CLK_SRC			33
-#define QDSS_TSCTR_CLK				34
-#define SFAB_ADM0_M0_A_CLK			35
-#define SFAB_ADM0_M1_A_CLK			36
-#define SFAB_ADM0_M2_H_CLK			37
-#define ADM0_CLK				38
-#define ADM0_PBUS_CLK				39
-#define MSS_XPU_CLK				40
-#define IMEM0_A_CLK				41
-#define QDSS_H_CLK				42
-#define PCIE_A_CLK				43
-#define PCIE_AUX_CLK				44
-#define PCIE_PHY_REF_CLK			45
-#define PCIE_H_CLK				46
-#define SFAB_CLK_SRC				47
-#define MAHB0_CLK				48
-#define Q6SW_CLK_SRC				49
-#define Q6SW_CLK				50
-#define Q6FW_CLK_SRC				51
-#define Q6FW_CLK				52
-#define SFAB_MSS_M_A_CLK			53
-#define SFAB_USB3_M_A_CLK			54
-#define SFAB_LPASS_Q6_A_CLK			55
-#define SFAB_AFAB_M_A_CLK			56
-#define AFAB_SFAB_M0_A_CLK			57
-#define AFAB_SFAB_M1_A_CLK			58
-#define SFAB_SATA_S_H_CLK			59
-#define DFAB_CLK_SRC				60
-#define DFAB_CLK				61
-#define SFAB_DFAB_M_A_CLK			62
-#define DFAB_SFAB_M_A_CLK			63
-#define DFAB_SWAY0_H_CLK			64
-#define DFAB_SWAY1_H_CLK			65
-#define DFAB_ARB0_H_CLK				66
-#define DFAB_ARB1_H_CLK				67
-#define PPSS_H_CLK				68
-#define PPSS_PROC_CLK				69
-#define PPSS_TIMER0_CLK				70
-#define PPSS_TIMER1_CLK				71
-#define PMEM_A_CLK				72
-#define DMA_BAM_H_CLK				73
-#define SIC_H_CLK				74
-#define SPS_TIC_H_CLK				75
-#define SLIMBUS_H_CLK				76
-#define SLIMBUS_XO_SRC_CLK			77
-#define CFPB_2X_CLK_SRC				78
-#define CFPB_CLK				79
-#define CFPB0_H_CLK				80
-#define CFPB1_H_CLK				81
-#define CFPB2_H_CLK				82
-#define SFAB_CFPB_M_H_CLK			83
-#define CFPB_MASTER_H_CLK			84
-#define SFAB_CFPB_S_H_CLK			85
-#define CFPB_SPLITTER_H_CLK			86
-#define TSIF_H_CLK				87
-#define TSIF_INACTIVITY_TIMERS_CLK		88
-#define TSIF_REF_SRC				89
-#define TSIF_REF_CLK				90
-#define CE1_H_CLK				91
-#define CE1_CORE_CLK				92
-#define CE1_SLEEP_CLK				93
-#define CE2_H_CLK				94
-#define CE2_CORE_CLK				95
-#define SFPB_H_CLK_SRC				97
-#define SFPB_H_CLK				98
-#define SFAB_SFPB_M_H_CLK			99
-#define SFAB_SFPB_S_H_CLK			100
-#define RPM_PROC_CLK				101
-#define RPM_BUS_H_CLK				102
-#define RPM_SLEEP_CLK				103
-#define RPM_TIMER_CLK				104
-#define RPM_MSG_RAM_H_CLK			105
-#define PMIC_ARB0_H_CLK				106
-#define PMIC_ARB1_H_CLK				107
-#define PMIC_SSBI2_SRC				108
-#define PMIC_SSBI2_CLK				109
-#define SDC1_H_CLK				110
-#define SDC2_H_CLK				111
-#define SDC3_H_CLK				112
-#define SDC4_H_CLK				113
-#define SDC5_H_CLK				114
-#define SDC1_SRC				115
-#define SDC2_SRC				116
-#define SDC3_SRC				117
-#define SDC4_SRC				118
-#define SDC5_SRC				119
-#define SDC1_CLK				120
-#define SDC2_CLK				121
-#define SDC3_CLK				122
-#define SDC4_CLK				123
-#define SDC5_CLK				124
-#define DFAB_A2_H_CLK				125
-#define USB_HS1_H_CLK				126
-#define USB_HS1_XCVR_SRC			127
-#define USB_HS1_XCVR_CLK			128
-#define USB_HSIC_H_CLK				129
-#define USB_HSIC_XCVR_FS_SRC			130
-#define USB_HSIC_XCVR_FS_CLK			131
-#define USB_HSIC_SYSTEM_CLK_SRC			132
-#define USB_HSIC_SYSTEM_CLK			133
-#define CFPB0_C0_H_CLK				134
-#define CFPB0_C1_H_CLK				135
-#define CFPB0_D0_H_CLK				136
-#define CFPB0_D1_H_CLK				137
-#define USB_FS1_H_CLK				138
-#define USB_FS1_XCVR_FS_SRC			139
-#define USB_FS1_XCVR_FS_CLK			140
-#define USB_FS1_SYSTEM_CLK			141
-#define USB_FS2_H_CLK				142
-#define USB_FS2_XCVR_FS_SRC			143
-#define USB_FS2_XCVR_FS_CLK			144
-#define USB_FS2_SYSTEM_CLK			145
-#define GSBI_COMMON_SIM_SRC			146
-#define GSBI1_H_CLK				147
-#define GSBI2_H_CLK				148
-#define GSBI3_H_CLK				149
-#define GSBI4_H_CLK				150
-#define GSBI5_H_CLK				151
-#define GSBI6_H_CLK				152
-#define GSBI7_H_CLK				153
-#define GSBI8_H_CLK				154
-#define GSBI9_H_CLK				155
-#define GSBI10_H_CLK				156
-#define GSBI11_H_CLK				157
-#define GSBI12_H_CLK				158
-#define GSBI1_UART_SRC				159
-#define GSBI1_UART_CLK				160
-#define GSBI2_UART_SRC				161
-#define GSBI2_UART_CLK				162
-#define GSBI3_UART_SRC				163
-#define GSBI3_UART_CLK				164
-#define GSBI4_UART_SRC				165
-#define GSBI4_UART_CLK				166
-#define GSBI5_UART_SRC				167
-#define GSBI5_UART_CLK				168
-#define GSBI6_UART_SRC				169
-#define GSBI6_UART_CLK				170
-#define GSBI7_UART_SRC				171
-#define GSBI7_UART_CLK				172
-#define GSBI8_UART_SRC				173
-#define GSBI8_UART_CLK				174
-#define GSBI9_UART_SRC				175
-#define GSBI9_UART_CLK				176
-#define GSBI10_UART_SRC				177
-#define GSBI10_UART_CLK				178
-#define GSBI11_UART_SRC				179
-#define GSBI11_UART_CLK				180
-#define GSBI12_UART_SRC				181
-#define GSBI12_UART_CLK				182
-#define GSBI1_QUP_SRC				183
-#define GSBI1_QUP_CLK				184
-#define GSBI2_QUP_SRC				185
-#define GSBI2_QUP_CLK				186
-#define GSBI3_QUP_SRC				187
-#define GSBI3_QUP_CLK				188
-#define GSBI4_QUP_SRC				189
-#define GSBI4_QUP_CLK				190
-#define GSBI5_QUP_SRC				191
-#define GSBI5_QUP_CLK				192
-#define GSBI6_QUP_SRC				193
-#define GSBI6_QUP_CLK				194
-#define GSBI7_QUP_SRC				195
-#define GSBI7_QUP_CLK				196
-#define GSBI8_QUP_SRC				197
-#define GSBI8_QUP_CLK				198
-#define GSBI9_QUP_SRC				199
-#define GSBI9_QUP_CLK				200
-#define GSBI10_QUP_SRC				201
-#define GSBI10_QUP_CLK				202
-#define GSBI11_QUP_SRC				203
-#define GSBI11_QUP_CLK				204
-#define GSBI12_QUP_SRC				205
-#define GSBI12_QUP_CLK				206
-#define GSBI1_SIM_CLK				207
-#define GSBI2_SIM_CLK				208
-#define GSBI3_SIM_CLK				209
-#define GSBI4_SIM_CLK				210
-#define GSBI5_SIM_CLK				211
-#define GSBI6_SIM_CLK				212
-#define GSBI7_SIM_CLK				213
-#define GSBI8_SIM_CLK				214
-#define GSBI9_SIM_CLK				215
-#define GSBI10_SIM_CLK				216
-#define GSBI11_SIM_CLK				217
-#define GSBI12_SIM_CLK				218
-#define USB_HSIC_HSIC_CLK_SRC			219
-#define USB_HSIC_HSIC_CLK			220
-#define USB_HSIC_HSIO_CAL_CLK			221
-#define SPDM_CFG_H_CLK				222
-#define SPDM_MSTR_H_CLK				223
-#define SPDM_FF_CLK_SRC				224
-#define SPDM_FF_CLK				225
-#define SEC_CTRL_CLK				226
-#define SEC_CTRL_ACC_CLK_SRC			227
-#define SEC_CTRL_ACC_CLK			228
-#define TLMM_H_CLK				229
-#define TLMM_CLK				230
-#define SFAB_MSS_S_H_CLK			231
-#define MSS_SLP_CLK				232
-#define MSS_Q6SW_JTAG_CLK			233
-#define MSS_Q6FW_JTAG_CLK			234
-#define MSS_S_H_CLK				235
-#define MSS_CXO_SRC_CLK				236
-#define SATA_H_CLK				237
-#define SATA_CLK_SRC				238
-#define SATA_RXOOB_CLK				239
-#define SATA_PMALIVE_CLK			240
-#define SATA_PHY_REF_CLK			241
-#define TSSC_CLK_SRC				242
-#define TSSC_CLK				243
-#define PDM_SRC					244
-#define PDM_CLK					245
-#define GP0_SRC					246
-#define GP0_CLK					247
-#define GP1_SRC					248
-#define GP1_CLK					249
-#define GP2_SRC					250
-#define GP2_CLK					251
-#define MPM_CLK					252
-#define EBI1_CLK_SRC				253
-#define EBI1_CH0_CLK				254
-#define EBI1_CH1_CLK				255
-#define EBI1_2X_CLK				256
-#define EBI1_CH0_DQ_CLK				257
-#define EBI1_CH1_DQ_CLK				258
-#define EBI1_CH0_CA_CLK				259
-#define EBI1_CH1_CA_CLK				260
-#define EBI1_XO_CLK				261
-#define SFAB_SMPSS_S_H_CLK			262
-#define PRNG_SRC				263
-#define PRNG_CLK				264
-#define PXO_SRC					265
-#define LPASS_CXO_CLK				266
-#define LPASS_PXO_CLK				267
-#define SPDM_CY_PORT0_CLK			268
-#define SPDM_CY_PORT1_CLK			269
-#define SPDM_CY_PORT2_CLK			270
-#define SPDM_CY_PORT3_CLK			271
-#define SPDM_CY_PORT4_CLK			272
-#define SPDM_CY_PORT5_CLK			273
-#define SPDM_CY_PORT6_CLK			274
-#define SPDM_CY_PORT7_CLK			275
-#define PLL0					276
-#define PLL0_VOTE				277
-#define PLL3					278
-#define PLL3_VOTE				279
-#define PLL4_VOTE				280
-#define PLL5					281
-#define PLL5_VOTE				282
-#define PLL6					283
-#define PLL6_VOTE				284
-#define PLL7_VOTE				285
-#define PLL8					286
-#define PLL8_VOTE				287
-#define PLL9					288
-#define PLL10					289
-#define PLL11					290
-#define PLL12					291
-#define PLL13					292
-#define PLL14					293
-#define PLL14_VOTE				294
-#define USB_HS3_H_CLK				295
-#define USB_HS3_XCVR_SRC			296
-#define USB_HS3_XCVR_CLK			297
-#define USB_HS4_H_CLK				298
-#define USB_HS4_XCVR_SRC			299
-#define USB_HS4_XCVR_CLK			300
-#define SATA_PHY_CFG_CLK			301
-#define SATA_A_CLK				302
-#define CE3_SRC					303
-#define CE3_CORE_CLK				304
-#define CE3_H_CLK				305
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8974.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8974.h
deleted file mode 100644
index 51e51c860fe..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8974.h
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_MSM_GCC_8974_H
-#define _DT_BINDINGS_CLK_MSM_GCC_8974_H
-
-#define GPLL0							0
-#define GPLL0_VOTE						1
-#define CONFIG_NOC_CLK_SRC					2
-#define GPLL2							3
-#define GPLL2_VOTE						4
-#define GPLL3							5
-#define GPLL3_VOTE						6
-#define PERIPH_NOC_CLK_SRC					7
-#define BLSP_UART_SIM_CLK_SRC					8
-#define QDSS_TSCTR_CLK_SRC					9
-#define BIMC_DDR_CLK_SRC					10
-#define SYSTEM_NOC_CLK_SRC					11
-#define GPLL1							12
-#define GPLL1_VOTE						13
-#define RPM_CLK_SRC						14
-#define GCC_BIMC_CLK						15
-#define BIMC_DDR_CPLL0_ROOT_CLK_SRC				16
-#define KPSS_AHB_CLK_SRC					17
-#define QDSS_AT_CLK_SRC						18
-#define USB30_MASTER_CLK_SRC					19
-#define BIMC_DDR_CPLL1_ROOT_CLK_SRC				20
-#define QDSS_STM_CLK_SRC					21
-#define ACC_CLK_SRC						22
-#define SEC_CTRL_CLK_SRC					23
-#define BLSP1_QUP1_I2C_APPS_CLK_SRC				24
-#define BLSP1_QUP1_SPI_APPS_CLK_SRC				25
-#define BLSP1_QUP2_I2C_APPS_CLK_SRC				26
-#define BLSP1_QUP2_SPI_APPS_CLK_SRC				27
-#define BLSP1_QUP3_I2C_APPS_CLK_SRC				28
-#define BLSP1_QUP3_SPI_APPS_CLK_SRC				29
-#define BLSP1_QUP4_I2C_APPS_CLK_SRC				30
-#define BLSP1_QUP4_SPI_APPS_CLK_SRC				31
-#define BLSP1_QUP5_I2C_APPS_CLK_SRC				32
-#define BLSP1_QUP5_SPI_APPS_CLK_SRC				33
-#define BLSP1_QUP6_I2C_APPS_CLK_SRC				34
-#define BLSP1_QUP6_SPI_APPS_CLK_SRC				35
-#define BLSP1_UART1_APPS_CLK_SRC				36
-#define BLSP1_UART2_APPS_CLK_SRC				37
-#define BLSP1_UART3_APPS_CLK_SRC				38
-#define BLSP1_UART4_APPS_CLK_SRC				39
-#define BLSP1_UART5_APPS_CLK_SRC				40
-#define BLSP1_UART6_APPS_CLK_SRC				41
-#define BLSP2_QUP1_I2C_APPS_CLK_SRC				42
-#define BLSP2_QUP1_SPI_APPS_CLK_SRC				43
-#define BLSP2_QUP2_I2C_APPS_CLK_SRC				44
-#define BLSP2_QUP2_SPI_APPS_CLK_SRC				45
-#define BLSP2_QUP3_I2C_APPS_CLK_SRC				46
-#define BLSP2_QUP3_SPI_APPS_CLK_SRC				47
-#define BLSP2_QUP4_I2C_APPS_CLK_SRC				48
-#define BLSP2_QUP4_SPI_APPS_CLK_SRC				49
-#define BLSP2_QUP5_I2C_APPS_CLK_SRC				50
-#define BLSP2_QUP5_SPI_APPS_CLK_SRC				51
-#define BLSP2_QUP6_I2C_APPS_CLK_SRC				52
-#define BLSP2_QUP6_SPI_APPS_CLK_SRC				53
-#define BLSP2_UART1_APPS_CLK_SRC				54
-#define BLSP2_UART2_APPS_CLK_SRC				55
-#define BLSP2_UART3_APPS_CLK_SRC				56
-#define BLSP2_UART4_APPS_CLK_SRC				57
-#define BLSP2_UART5_APPS_CLK_SRC				58
-#define BLSP2_UART6_APPS_CLK_SRC				59
-#define CE1_CLK_SRC						60
-#define CE2_CLK_SRC						61
-#define GP1_CLK_SRC						62
-#define GP2_CLK_SRC						63
-#define GP3_CLK_SRC						64
-#define PDM2_CLK_SRC						65
-#define QDSS_TRACECLKIN_CLK_SRC					66
-#define RBCPR_CLK_SRC						67
-#define SDCC1_APPS_CLK_SRC					68
-#define SDCC2_APPS_CLK_SRC					69
-#define SDCC3_APPS_CLK_SRC					70
-#define SDCC4_APPS_CLK_SRC					71
-#define SPMI_AHB_CLK_SRC					72
-#define SPMI_SER_CLK_SRC					73
-#define TSIF_REF_CLK_SRC					74
-#define USB30_MOCK_UTMI_CLK_SRC					75
-#define USB_HS_SYSTEM_CLK_SRC					76
-#define USB_HSIC_CLK_SRC					77
-#define USB_HSIC_IO_CAL_CLK_SRC					78
-#define USB_HSIC_SYSTEM_CLK_SRC					79
-#define GCC_BAM_DMA_AHB_CLK					80
-#define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK			81
-#define GCC_BIMC_CFG_AHB_CLK					82
-#define GCC_BIMC_KPSS_AXI_CLK					83
-#define GCC_BIMC_SLEEP_CLK					84
-#define GCC_BIMC_SYSNOC_AXI_CLK					85
-#define GCC_BIMC_XO_CLK						86
-#define GCC_BLSP1_AHB_CLK					87
-#define GCC_BLSP1_SLEEP_CLK					88
-#define GCC_BLSP1_QUP1_I2C_APPS_CLK				89
-#define GCC_BLSP1_QUP1_SPI_APPS_CLK				90
-#define GCC_BLSP1_QUP2_I2C_APPS_CLK				91
-#define GCC_BLSP1_QUP2_SPI_APPS_CLK				92
-#define GCC_BLSP1_QUP3_I2C_APPS_CLK				93
-#define GCC_BLSP1_QUP3_SPI_APPS_CLK				94
-#define GCC_BLSP1_QUP4_I2C_APPS_CLK				95
-#define GCC_BLSP1_QUP4_SPI_APPS_CLK				96
-#define GCC_BLSP1_QUP5_I2C_APPS_CLK				97
-#define GCC_BLSP1_QUP5_SPI_APPS_CLK				98
-#define GCC_BLSP1_QUP6_I2C_APPS_CLK				99
-#define GCC_BLSP1_QUP6_SPI_APPS_CLK				100
-#define GCC_BLSP1_UART1_APPS_CLK				101
-#define GCC_BLSP1_UART1_SIM_CLK					102
-#define GCC_BLSP1_UART2_APPS_CLK				103
-#define GCC_BLSP1_UART2_SIM_CLK					104
-#define GCC_BLSP1_UART3_APPS_CLK				105
-#define GCC_BLSP1_UART3_SIM_CLK					106
-#define GCC_BLSP1_UART4_APPS_CLK				107
-#define GCC_BLSP1_UART4_SIM_CLK					108
-#define GCC_BLSP1_UART5_APPS_CLK				109
-#define GCC_BLSP1_UART5_SIM_CLK					110
-#define GCC_BLSP1_UART6_APPS_CLK				111
-#define GCC_BLSP1_UART6_SIM_CLK					112
-#define GCC_BLSP2_AHB_CLK					113
-#define GCC_BLSP2_SLEEP_CLK					114
-#define GCC_BLSP2_QUP1_I2C_APPS_CLK				115
-#define GCC_BLSP2_QUP1_SPI_APPS_CLK				116
-#define GCC_BLSP2_QUP2_I2C_APPS_CLK				117
-#define GCC_BLSP2_QUP2_SPI_APPS_CLK				118
-#define GCC_BLSP2_QUP3_I2C_APPS_CLK				119
-#define GCC_BLSP2_QUP3_SPI_APPS_CLK				120
-#define GCC_BLSP2_QUP4_I2C_APPS_CLK				121
-#define GCC_BLSP2_QUP4_SPI_APPS_CLK				122
-#define GCC_BLSP2_QUP5_I2C_APPS_CLK				123
-#define GCC_BLSP2_QUP5_SPI_APPS_CLK				124
-#define GCC_BLSP2_QUP6_I2C_APPS_CLK				125
-#define GCC_BLSP2_QUP6_SPI_APPS_CLK				126
-#define GCC_BLSP2_UART1_APPS_CLK				127
-#define GCC_BLSP2_UART1_SIM_CLK					128
-#define GCC_BLSP2_UART2_APPS_CLK				129
-#define GCC_BLSP2_UART2_SIM_CLK					130
-#define GCC_BLSP2_UART3_APPS_CLK				131
-#define GCC_BLSP2_UART3_SIM_CLK					132
-#define GCC_BLSP2_UART4_APPS_CLK				133
-#define GCC_BLSP2_UART4_SIM_CLK					134
-#define GCC_BLSP2_UART5_APPS_CLK				135
-#define GCC_BLSP2_UART5_SIM_CLK					136
-#define GCC_BLSP2_UART6_APPS_CLK				137
-#define GCC_BLSP2_UART6_SIM_CLK					138
-#define GCC_BOOT_ROM_AHB_CLK					139
-#define GCC_CE1_AHB_CLK						140
-#define GCC_CE1_AXI_CLK						141
-#define GCC_CE1_CLK						142
-#define GCC_CE2_AHB_CLK						143
-#define GCC_CE2_AXI_CLK						144
-#define GCC_CE2_CLK						145
-#define GCC_CNOC_BUS_TIMEOUT0_AHB_CLK				146
-#define GCC_CNOC_BUS_TIMEOUT1_AHB_CLK				147
-#define GCC_CNOC_BUS_TIMEOUT2_AHB_CLK				148
-#define GCC_CNOC_BUS_TIMEOUT3_AHB_CLK				149
-#define GCC_CNOC_BUS_TIMEOUT4_AHB_CLK				150
-#define GCC_CNOC_BUS_TIMEOUT5_AHB_CLK				151
-#define GCC_CNOC_BUS_TIMEOUT6_AHB_CLK				152
-#define GCC_CFG_NOC_AHB_CLK					153
-#define GCC_CFG_NOC_DDR_CFG_CLK					154
-#define GCC_CFG_NOC_RPM_AHB_CLK					155
-#define GCC_BIMC_DDR_CPLL0_CLK					156
-#define GCC_BIMC_DDR_CPLL1_CLK					157
-#define GCC_DDR_DIM_CFG_CLK					158
-#define GCC_DDR_DIM_SLEEP_CLK					159
-#define GCC_DEHR_CLK						160
-#define GCC_AHB_CLK						161
-#define GCC_IM_SLEEP_CLK					162
-#define GCC_XO_CLK						163
-#define GCC_XO_DIV4_CLK						164
-#define GCC_GP1_CLK						165
-#define GCC_GP2_CLK						166
-#define GCC_GP3_CLK						167
-#define GCC_IMEM_AXI_CLK					168
-#define GCC_IMEM_CFG_AHB_CLK					169
-#define GCC_KPSS_AHB_CLK					170
-#define GCC_KPSS_AXI_CLK					171
-#define GCC_LPASS_Q6_AXI_CLK					172
-#define GCC_MMSS_NOC_AT_CLK					173
-#define GCC_MMSS_NOC_CFG_AHB_CLK				174
-#define GCC_OCMEM_NOC_CFG_AHB_CLK				175
-#define GCC_OCMEM_SYS_NOC_AXI_CLK				176
-#define GCC_MPM_AHB_CLK						177
-#define GCC_MSG_RAM_AHB_CLK					178
-#define GCC_MSS_CFG_AHB_CLK					179
-#define GCC_MSS_Q6_BIMC_AXI_CLK					180
-#define GCC_NOC_CONF_XPU_AHB_CLK				181
-#define GCC_PDM2_CLK						182
-#define GCC_PDM_AHB_CLK						183
-#define GCC_PDM_XO4_CLK						184
-#define GCC_PERIPH_NOC_AHB_CLK					185
-#define GCC_PERIPH_NOC_AT_CLK					186
-#define GCC_PERIPH_NOC_CFG_AHB_CLK				187
-#define GCC_PERIPH_NOC_MPU_CFG_AHB_CLK				188
-#define GCC_PERIPH_XPU_AHB_CLK					189
-#define GCC_PNOC_BUS_TIMEOUT0_AHB_CLK				190
-#define GCC_PNOC_BUS_TIMEOUT1_AHB_CLK				191
-#define GCC_PNOC_BUS_TIMEOUT2_AHB_CLK				192
-#define GCC_PNOC_BUS_TIMEOUT3_AHB_CLK				193
-#define GCC_PNOC_BUS_TIMEOUT4_AHB_CLK				194
-#define GCC_PRNG_AHB_CLK					195
-#define GCC_QDSS_AT_CLK						196
-#define GCC_QDSS_CFG_AHB_CLK					197
-#define GCC_QDSS_DAP_AHB_CLK					198
-#define GCC_QDSS_DAP_CLK					199
-#define GCC_QDSS_ETR_USB_CLK					200
-#define GCC_QDSS_STM_CLK					201
-#define GCC_QDSS_TRACECLKIN_CLK					202
-#define GCC_QDSS_TSCTR_DIV16_CLK				203
-#define GCC_QDSS_TSCTR_DIV2_CLK					204
-#define GCC_QDSS_TSCTR_DIV3_CLK					205
-#define GCC_QDSS_TSCTR_DIV4_CLK					206
-#define GCC_QDSS_TSCTR_DIV8_CLK					207
-#define GCC_QDSS_RBCPR_XPU_AHB_CLK				208
-#define GCC_RBCPR_AHB_CLK					209
-#define GCC_RBCPR_CLK						210
-#define GCC_RPM_BUS_AHB_CLK					211
-#define GCC_RPM_PROC_HCLK					212
-#define GCC_RPM_SLEEP_CLK					213
-#define GCC_RPM_TIMER_CLK					214
-#define GCC_SDCC1_AHB_CLK					215
-#define GCC_SDCC1_APPS_CLK					216
-#define GCC_SDCC1_INACTIVITY_TIMERS_CLK				217
-#define GCC_SDCC2_AHB_CLK					218
-#define GCC_SDCC2_APPS_CLK					219
-#define GCC_SDCC2_INACTIVITY_TIMERS_CLK				220
-#define GCC_SDCC3_AHB_CLK					221
-#define GCC_SDCC3_APPS_CLK					222
-#define GCC_SDCC3_INACTIVITY_TIMERS_CLK				223
-#define GCC_SDCC4_AHB_CLK					224
-#define GCC_SDCC4_APPS_CLK					225
-#define GCC_SDCC4_INACTIVITY_TIMERS_CLK				226
-#define GCC_SEC_CTRL_ACC_CLK					227
-#define GCC_SEC_CTRL_AHB_CLK					228
-#define GCC_SEC_CTRL_BOOT_ROM_PATCH_CLK				229
-#define GCC_SEC_CTRL_CLK					230
-#define GCC_SEC_CTRL_SENSE_CLK					231
-#define GCC_SNOC_BUS_TIMEOUT0_AHB_CLK				232
-#define GCC_SNOC_BUS_TIMEOUT2_AHB_CLK				233
-#define GCC_SPDM_BIMC_CY_CLK					234
-#define GCC_SPDM_CFG_AHB_CLK					235
-#define GCC_SPDM_DEBUG_CY_CLK					236
-#define GCC_SPDM_FF_CLK						237
-#define GCC_SPDM_MSTR_AHB_CLK					238
-#define GCC_SPDM_PNOC_CY_CLK					239
-#define GCC_SPDM_RPM_CY_CLK					240
-#define GCC_SPDM_SNOC_CY_CLK					241
-#define GCC_SPMI_AHB_CLK					242
-#define GCC_SPMI_CNOC_AHB_CLK					243
-#define GCC_SPMI_SER_CLK					244
-#define GCC_SNOC_CNOC_AHB_CLK					245
-#define GCC_SNOC_PNOC_AHB_CLK					246
-#define GCC_SYS_NOC_AT_CLK					247
-#define GCC_SYS_NOC_AXI_CLK					248
-#define GCC_SYS_NOC_KPSS_AHB_CLK				249
-#define GCC_SYS_NOC_QDSS_STM_AXI_CLK				250
-#define GCC_SYS_NOC_USB3_AXI_CLK				251
-#define GCC_TCSR_AHB_CLK					252
-#define GCC_TLMM_AHB_CLK					253
-#define GCC_TLMM_CLK						254
-#define GCC_TSIF_AHB_CLK					255
-#define GCC_TSIF_INACTIVITY_TIMERS_CLK				256
-#define GCC_TSIF_REF_CLK					257
-#define GCC_USB2A_PHY_SLEEP_CLK					258
-#define GCC_USB2B_PHY_SLEEP_CLK					259
-#define GCC_USB30_MASTER_CLK					260
-#define GCC_USB30_MOCK_UTMI_CLK					261
-#define GCC_USB30_SLEEP_CLK					262
-#define GCC_USB_HS_AHB_CLK					263
-#define GCC_USB_HS_INACTIVITY_TIMERS_CLK			264
-#define GCC_USB_HS_SYSTEM_CLK					265
-#define GCC_USB_HSIC_AHB_CLK					266
-#define GCC_USB_HSIC_CLK					267
-#define GCC_USB_HSIC_IO_CAL_CLK					268
-#define GCC_USB_HSIC_IO_CAL_SLEEP_CLK				269
-#define GCC_USB_HSIC_SYSTEM_CLK					270
-#define GCC_WCSS_GPLL1_CLK_SRC					271
-#define GCC_MMSS_GPLL0_CLK_SRC					272
-#define GCC_LPASS_GPLL0_CLK_SRC					273
-#define GCC_WCSS_GPLL1_CLK_SRC_SLEEP_ENA			274
-#define GCC_MMSS_GPLL0_CLK_SRC_SLEEP_ENA			275
-#define GCC_LPASS_GPLL0_CLK_SRC_SLEEP_ENA			276
-#define GCC_IMEM_AXI_CLK_SLEEP_ENA				277
-#define GCC_SYS_NOC_KPSS_AHB_CLK_SLEEP_ENA			278
-#define GCC_BIMC_KPSS_AXI_CLK_SLEEP_ENA				279
-#define GCC_KPSS_AHB_CLK_SLEEP_ENA				280
-#define GCC_KPSS_AXI_CLK_SLEEP_ENA				281
-#define GCC_MPM_AHB_CLK_SLEEP_ENA				282
-#define GCC_OCMEM_SYS_NOC_AXI_CLK_SLEEP_ENA			283
-#define GCC_BLSP1_AHB_CLK_SLEEP_ENA				284
-#define GCC_BLSP1_SLEEP_CLK_SLEEP_ENA				285
-#define GCC_BLSP2_AHB_CLK_SLEEP_ENA				286
-#define GCC_BLSP2_SLEEP_CLK_SLEEP_ENA				287
-#define GCC_PRNG_AHB_CLK_SLEEP_ENA				288
-#define GCC_BAM_DMA_AHB_CLK_SLEEP_ENA				289
-#define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK_SLEEP_ENA		290
-#define GCC_BOOT_ROM_AHB_CLK_SLEEP_ENA				291
-#define GCC_MSG_RAM_AHB_CLK_SLEEP_ENA				292
-#define GCC_TLMM_AHB_CLK_SLEEP_ENA				293
-#define GCC_TLMM_CLK_SLEEP_ENA					294
-#define GCC_SPMI_CNOC_AHB_CLK_SLEEP_ENA				295
-#define GCC_CE1_CLK_SLEEP_ENA					296
-#define GCC_CE1_AXI_CLK_SLEEP_ENA				297
-#define GCC_CE1_AHB_CLK_SLEEP_ENA				298
-#define GCC_CE2_CLK_SLEEP_ENA					299
-#define GCC_CE2_AXI_CLK_SLEEP_ENA				300
-#define GCC_CE2_AHB_CLK_SLEEP_ENA				301
-#define GPLL4							302
-#define GPLL4_VOTE						303
-#define GCC_SDCC1_CDCCAL_SLEEP_CLK				304
-#define GCC_SDCC1_CDCCAL_FF_CLK					305
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-ipq806x.h
deleted file mode 100644
index 4e944b85c56..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-ipq806x.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_LCC_IPQ806X_H
-#define _DT_BINDINGS_CLK_LCC_IPQ806X_H
-
-#define PLL4				0
-#define MI2S_OSR_SRC			1
-#define MI2S_OSR_CLK			2
-#define MI2S_DIV_CLK			3
-#define MI2S_BIT_DIV_CLK		4
-#define MI2S_BIT_CLK			5
-#define PCM_SRC				6
-#define PCM_CLK_OUT			7
-#define PCM_CLK				8
-#define SPDIF_SRC			9
-#define SPDIF_CLK			10
-#define AHBIX_CLK			11
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-msm8960.h
deleted file mode 100644
index 4fb2aa64d9f..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,lcc-msm8960.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H
-#define _DT_BINDINGS_CLK_LCC_MSM8960_H
-
-#define PLL4				0
-#define MI2S_OSR_SRC			1
-#define MI2S_OSR_CLK			2
-#define MI2S_DIV_CLK			3
-#define MI2S_BIT_DIV_CLK		4
-#define MI2S_BIT_CLK			5
-#define PCM_SRC				6
-#define PCM_CLK_OUT			7
-#define PCM_CLK				8
-#define SLIMBUS_SRC			9
-#define AUDIO_SLIMBUS_CLK		10
-#define SPS_SLIMBUS_CLK			11
-#define CODEC_I2S_MIC_OSR_SRC		12
-#define CODEC_I2S_MIC_OSR_CLK		13
-#define CODEC_I2S_MIC_DIV_CLK		14
-#define CODEC_I2S_MIC_BIT_DIV_CLK	15
-#define CODEC_I2S_MIC_BIT_CLK		16
-#define SPARE_I2S_MIC_OSR_SRC		17
-#define SPARE_I2S_MIC_OSR_CLK		18
-#define SPARE_I2S_MIC_DIV_CLK		19
-#define SPARE_I2S_MIC_BIT_DIV_CLK	20
-#define SPARE_I2S_MIC_BIT_CLK		21
-#define CODEC_I2S_SPKR_OSR_SRC		22
-#define CODEC_I2S_SPKR_OSR_CLK		23
-#define CODEC_I2S_SPKR_DIV_CLK		24
-#define CODEC_I2S_SPKR_BIT_DIV_CLK	25
-#define CODEC_I2S_SPKR_BIT_CLK		26
-#define SPARE_I2S_SPKR_OSR_SRC		27
-#define SPARE_I2S_SPKR_OSR_CLK		28
-#define SPARE_I2S_SPKR_DIV_CLK		29
-#define SPARE_I2S_SPKR_BIT_DIV_CLK	30
-#define SPARE_I2S_SPKR_BIT_CLK		31
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-apq8084.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-apq8084.h
deleted file mode 100644
index d72b5b35f15..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-apq8084.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_APQ_MMCC_8084_H
-#define _DT_BINDINGS_CLK_APQ_MMCC_8084_H
-
-#define MMSS_AHB_CLK_SRC		0
-#define MMSS_AXI_CLK_SRC		1
-#define MMPLL0				2
-#define MMPLL0_VOTE			3
-#define MMPLL1				4
-#define MMPLL1_VOTE			5
-#define MMPLL2				6
-#define MMPLL3				7
-#define MMPLL4				8
-#define CSI0_CLK_SRC			9
-#define CSI1_CLK_SRC			10
-#define CSI2_CLK_SRC			11
-#define CSI3_CLK_SRC			12
-#define VCODEC0_CLK_SRC			13
-#define VFE0_CLK_SRC			14
-#define VFE1_CLK_SRC			15
-#define MDP_CLK_SRC			16
-#define PCLK0_CLK_SRC			17
-#define PCLK1_CLK_SRC			18
-#define OCMEMNOC_CLK_SRC		19
-#define GFX3D_CLK_SRC			20
-#define JPEG0_CLK_SRC			21
-#define JPEG1_CLK_SRC			22
-#define JPEG2_CLK_SRC			23
-#define EDPPIXEL_CLK_SRC		24
-#define EXTPCLK_CLK_SRC			25
-#define VP_CLK_SRC			26
-#define CCI_CLK_SRC			27
-#define CAMSS_GP0_CLK_SRC		28
-#define CAMSS_GP1_CLK_SRC		29
-#define MCLK0_CLK_SRC			30
-#define MCLK1_CLK_SRC			31
-#define MCLK2_CLK_SRC			32
-#define MCLK3_CLK_SRC			33
-#define CSI0PHYTIMER_CLK_SRC		34
-#define CSI1PHYTIMER_CLK_SRC		35
-#define CSI2PHYTIMER_CLK_SRC		36
-#define CPP_CLK_SRC			37
-#define BYTE0_CLK_SRC			38
-#define BYTE1_CLK_SRC			39
-#define EDPAUX_CLK_SRC			40
-#define EDPLINK_CLK_SRC			41
-#define ESC0_CLK_SRC			42
-#define ESC1_CLK_SRC			43
-#define HDMI_CLK_SRC			44
-#define VSYNC_CLK_SRC			45
-#define MMSS_RBCPR_CLK_SRC		46
-#define RBBMTIMER_CLK_SRC		47
-#define MAPLE_CLK_SRC			48
-#define VDP_CLK_SRC			49
-#define VPU_BUS_CLK_SRC			50
-#define MMSS_CXO_CLK			51
-#define MMSS_SLEEPCLK_CLK		52
-#define AVSYNC_AHB_CLK			53
-#define AVSYNC_EDPPIXEL_CLK		54
-#define AVSYNC_EXTPCLK_CLK		55
-#define AVSYNC_PCLK0_CLK		56
-#define AVSYNC_PCLK1_CLK		57
-#define AVSYNC_VP_CLK			58
-#define CAMSS_AHB_CLK			59
-#define CAMSS_CCI_CCI_AHB_CLK		60
-#define CAMSS_CCI_CCI_CLK		61
-#define CAMSS_CSI0_AHB_CLK		62
-#define CAMSS_CSI0_CLK			63
-#define CAMSS_CSI0PHY_CLK		64
-#define CAMSS_CSI0PIX_CLK		65
-#define CAMSS_CSI0RDI_CLK		66
-#define CAMSS_CSI1_AHB_CLK		67
-#define CAMSS_CSI1_CLK			68
-#define CAMSS_CSI1PHY_CLK		69
-#define CAMSS_CSI1PIX_CLK		70
-#define CAMSS_CSI1RDI_CLK		71
-#define CAMSS_CSI2_AHB_CLK		72
-#define CAMSS_CSI2_CLK			73
-#define CAMSS_CSI2PHY_CLK		74
-#define CAMSS_CSI2PIX_CLK		75
-#define CAMSS_CSI2RDI_CLK		76
-#define CAMSS_CSI3_AHB_CLK		77
-#define CAMSS_CSI3_CLK			78
-#define CAMSS_CSI3PHY_CLK		79
-#define CAMSS_CSI3PIX_CLK		80
-#define CAMSS_CSI3RDI_CLK		81
-#define CAMSS_CSI_VFE0_CLK		82
-#define CAMSS_CSI_VFE1_CLK		83
-#define CAMSS_GP0_CLK			84
-#define CAMSS_GP1_CLK			85
-#define CAMSS_ISPIF_AHB_CLK		86
-#define CAMSS_JPEG_JPEG0_CLK		87
-#define CAMSS_JPEG_JPEG1_CLK		88
-#define CAMSS_JPEG_JPEG2_CLK		89
-#define CAMSS_JPEG_JPEG_AHB_CLK		90
-#define CAMSS_JPEG_JPEG_AXI_CLK		91
-#define CAMSS_MCLK0_CLK			92
-#define CAMSS_MCLK1_CLK			93
-#define CAMSS_MCLK2_CLK			94
-#define CAMSS_MCLK3_CLK			95
-#define CAMSS_MICRO_AHB_CLK		96
-#define CAMSS_PHY0_CSI0PHYTIMER_CLK	97
-#define CAMSS_PHY1_CSI1PHYTIMER_CLK	98
-#define CAMSS_PHY2_CSI2PHYTIMER_CLK	99
-#define CAMSS_TOP_AHB_CLK		100
-#define CAMSS_VFE_CPP_AHB_CLK		101
-#define CAMSS_VFE_CPP_CLK		102
-#define CAMSS_VFE_VFE0_CLK		103
-#define CAMSS_VFE_VFE1_CLK		104
-#define CAMSS_VFE_VFE_AHB_CLK		105
-#define CAMSS_VFE_VFE_AXI_CLK		106
-#define MDSS_AHB_CLK			107
-#define MDSS_AXI_CLK			108
-#define MDSS_BYTE0_CLK			109
-#define MDSS_BYTE1_CLK			110
-#define MDSS_EDPAUX_CLK			111
-#define MDSS_EDPLINK_CLK		112
-#define MDSS_EDPPIXEL_CLK		113
-#define MDSS_ESC0_CLK			114
-#define MDSS_ESC1_CLK			115
-#define MDSS_EXTPCLK_CLK		116
-#define MDSS_HDMI_AHB_CLK		117
-#define MDSS_HDMI_CLK			118
-#define MDSS_MDP_CLK			119
-#define MDSS_MDP_LUT_CLK		120
-#define MDSS_PCLK0_CLK			121
-#define MDSS_PCLK1_CLK			122
-#define MDSS_VSYNC_CLK			123
-#define MMSS_RBCPR_AHB_CLK		124
-#define MMSS_RBCPR_CLK			125
-#define MMSS_SPDM_AHB_CLK		126
-#define MMSS_SPDM_AXI_CLK		127
-#define MMSS_SPDM_CSI0_CLK		128
-#define MMSS_SPDM_GFX3D_CLK		129
-#define MMSS_SPDM_JPEG0_CLK		130
-#define MMSS_SPDM_JPEG1_CLK		131
-#define MMSS_SPDM_JPEG2_CLK		132
-#define MMSS_SPDM_MDP_CLK		133
-#define MMSS_SPDM_PCLK0_CLK		134
-#define MMSS_SPDM_PCLK1_CLK		135
-#define MMSS_SPDM_VCODEC0_CLK		136
-#define MMSS_SPDM_VFE0_CLK		137
-#define MMSS_SPDM_VFE1_CLK		138
-#define MMSS_SPDM_RM_AXI_CLK		139
-#define MMSS_SPDM_RM_OCMEMNOC_CLK	140
-#define MMSS_MISC_AHB_CLK		141
-#define MMSS_MMSSNOC_AHB_CLK		142
-#define MMSS_MMSSNOC_BTO_AHB_CLK	143
-#define MMSS_MMSSNOC_AXI_CLK		144
-#define MMSS_S0_AXI_CLK			145
-#define OCMEMCX_AHB_CLK			146
-#define OCMEMCX_OCMEMNOC_CLK		147
-#define OXILI_OCMEMGX_CLK		148
-#define OXILI_GFX3D_CLK			149
-#define OXILI_RBBMTIMER_CLK		150
-#define OXILICX_AHB_CLK			151
-#define VENUS0_AHB_CLK			152
-#define VENUS0_AXI_CLK			153
-#define VENUS0_CORE0_VCODEC_CLK		154
-#define VENUS0_CORE1_VCODEC_CLK		155
-#define VENUS0_OCMEMNOC_CLK		156
-#define VENUS0_VCODEC0_CLK		157
-#define VPU_AHB_CLK			158
-#define VPU_AXI_CLK			159
-#define VPU_BUS_CLK			160
-#define VPU_CXO_CLK			161
-#define VPU_MAPLE_CLK			162
-#define VPU_SLEEP_CLK			163
-#define VPU_VDP_CLK			164
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8960.h
deleted file mode 100644
index 85041b28f97..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8960.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
-#define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
-
-#define MMSS_AHB_SRC					0
-#define FAB_AHB_CLK					1
-#define APU_AHB_CLK					2
-#define TV_ENC_AHB_CLK					3
-#define AMP_AHB_CLK					4
-#define DSI2_S_AHB_CLK					5
-#define JPEGD_AHB_CLK					6
-#define GFX2D0_AHB_CLK					7
-#define DSI_S_AHB_CLK					8
-#define DSI2_M_AHB_CLK					9
-#define VPE_AHB_CLK					10
-#define SMMU_AHB_CLK					11
-#define HDMI_M_AHB_CLK					12
-#define VFE_AHB_CLK					13
-#define ROT_AHB_CLK					14
-#define VCODEC_AHB_CLK					15
-#define MDP_AHB_CLK					16
-#define DSI_M_AHB_CLK					17
-#define CSI_AHB_CLK					18
-#define MMSS_IMEM_AHB_CLK				19
-#define IJPEG_AHB_CLK					20
-#define HDMI_S_AHB_CLK					21
-#define GFX3D_AHB_CLK					22
-#define GFX2D1_AHB_CLK					23
-#define MMSS_FPB_CLK					24
-#define MMSS_AXI_SRC					25
-#define MMSS_FAB_CORE					26
-#define FAB_MSP_AXI_CLK					27
-#define JPEGD_AXI_CLK					28
-#define GMEM_AXI_CLK					29
-#define MDP_AXI_CLK					30
-#define MMSS_IMEM_AXI_CLK				31
-#define IJPEG_AXI_CLK					32
-#define GFX3D_AXI_CLK					33
-#define VCODEC_AXI_CLK					34
-#define VFE_AXI_CLK					35
-#define VPE_AXI_CLK					36
-#define ROT_AXI_CLK					37
-#define VCODEC_AXI_A_CLK				38
-#define VCODEC_AXI_B_CLK				39
-#define MM_AXI_S3_FCLK					40
-#define MM_AXI_S2_FCLK					41
-#define MM_AXI_S1_FCLK					42
-#define MM_AXI_S0_FCLK					43
-#define MM_AXI_S2_CLK					44
-#define MM_AXI_S1_CLK					45
-#define MM_AXI_S0_CLK					46
-#define CSI0_SRC					47
-#define CSI0_CLK					48
-#define CSI0_PHY_CLK					49
-#define CSI1_SRC					50
-#define CSI1_CLK					51
-#define CSI1_PHY_CLK					52
-#define CSI2_SRC					53
-#define CSI2_CLK					54
-#define CSI2_PHY_CLK					55
-#define DSI_SRC						56
-#define DSI_CLK						57
-#define CSI_PIX_CLK					58
-#define CSI_RDI_CLK					59
-#define MDP_VSYNC_CLK					60
-#define HDMI_DIV_CLK					61
-#define HDMI_APP_CLK					62
-#define CSI_PIX1_CLK					63
-#define CSI_RDI2_CLK					64
-#define CSI_RDI1_CLK					65
-#define GFX2D0_SRC					66
-#define GFX2D0_CLK					67
-#define GFX2D1_SRC					68
-#define GFX2D1_CLK					69
-#define GFX3D_SRC					70
-#define GFX3D_CLK					71
-#define IJPEG_SRC					72
-#define IJPEG_CLK					73
-#define JPEGD_SRC					74
-#define JPEGD_CLK					75
-#define MDP_SRC						76
-#define MDP_CLK						77
-#define MDP_LUT_CLK					78
-#define DSI2_PIXEL_SRC					79
-#define DSI2_PIXEL_CLK					80
-#define DSI2_SRC					81
-#define DSI2_CLK					82
-#define DSI1_BYTE_SRC					83
-#define DSI1_BYTE_CLK					84
-#define DSI2_BYTE_SRC					85
-#define DSI2_BYTE_CLK					86
-#define DSI1_ESC_SRC					87
-#define DSI1_ESC_CLK					88
-#define DSI2_ESC_SRC					89
-#define DSI2_ESC_CLK					90
-#define ROT_SRC						91
-#define ROT_CLK						92
-#define TV_ENC_CLK					93
-#define TV_DAC_CLK					94
-#define HDMI_TV_CLK					95
-#define MDP_TV_CLK					96
-#define TV_SRC						97
-#define VCODEC_SRC					98
-#define VCODEC_CLK					99
-#define VFE_SRC						100
-#define VFE_CLK						101
-#define VFE_CSI_CLK					102
-#define VPE_SRC						103
-#define VPE_CLK						104
-#define DSI_PIXEL_SRC					105
-#define DSI_PIXEL_CLK					106
-#define CAMCLK0_SRC					107
-#define CAMCLK0_CLK					108
-#define CAMCLK1_SRC					109
-#define CAMCLK1_CLK					110
-#define CAMCLK2_SRC					111
-#define CAMCLK2_CLK					112
-#define CSIPHYTIMER_SRC					113
-#define CSIPHY2_TIMER_CLK				114
-#define CSIPHY1_TIMER_CLK				115
-#define CSIPHY0_TIMER_CLK				116
-#define PLL1						117
-#define PLL2						118
-#define RGB_TV_CLK					119
-#define NPL_TV_CLK					120
-#define VCAP_AHB_CLK					121
-#define VCAP_AXI_CLK					122
-#define VCAP_SRC					123
-#define VCAP_CLK					124
-#define VCAP_NPL_CLK					125
-#define PLL15						126
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8974.h b/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8974.h
deleted file mode 100644
index 032ed87ef0f..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8974.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8974_H
-#define _DT_BINDINGS_CLK_MSM_MMCC_8974_H
-
-#define MMSS_AHB_CLK_SRC				0
-#define MMSS_AXI_CLK_SRC				1
-#define MMPLL0						2
-#define MMPLL0_VOTE					3
-#define MMPLL1						4
-#define MMPLL1_VOTE					5
-#define MMPLL2						6
-#define MMPLL3						7
-#define CSI0_CLK_SRC					8
-#define CSI1_CLK_SRC					9
-#define CSI2_CLK_SRC					10
-#define CSI3_CLK_SRC					11
-#define VFE0_CLK_SRC					12
-#define VFE1_CLK_SRC					13
-#define MDP_CLK_SRC					14
-#define GFX3D_CLK_SRC					15
-#define JPEG0_CLK_SRC					16
-#define JPEG1_CLK_SRC					17
-#define JPEG2_CLK_SRC					18
-#define PCLK0_CLK_SRC					19
-#define PCLK1_CLK_SRC					20
-#define VCODEC0_CLK_SRC					21
-#define CCI_CLK_SRC					22
-#define CAMSS_GP0_CLK_SRC				23
-#define CAMSS_GP1_CLK_SRC				24
-#define MCLK0_CLK_SRC					25
-#define MCLK1_CLK_SRC					26
-#define MCLK2_CLK_SRC					27
-#define MCLK3_CLK_SRC					28
-#define CSI0PHYTIMER_CLK_SRC				29
-#define CSI1PHYTIMER_CLK_SRC				30
-#define CSI2PHYTIMER_CLK_SRC				31
-#define CPP_CLK_SRC					32
-#define BYTE0_CLK_SRC					33
-#define BYTE1_CLK_SRC					34
-#define EDPAUX_CLK_SRC					35
-#define EDPLINK_CLK_SRC					36
-#define EDPPIXEL_CLK_SRC				37
-#define ESC0_CLK_SRC					38
-#define ESC1_CLK_SRC					39
-#define EXTPCLK_CLK_SRC					40
-#define HDMI_CLK_SRC					41
-#define VSYNC_CLK_SRC					42
-#define MMSS_RBCPR_CLK_SRC				43
-#define CAMSS_CCI_CCI_AHB_CLK				44
-#define CAMSS_CCI_CCI_CLK				45
-#define CAMSS_CSI0_AHB_CLK				46
-#define CAMSS_CSI0_CLK					47
-#define CAMSS_CSI0PHY_CLK				48
-#define CAMSS_CSI0PIX_CLK				49
-#define CAMSS_CSI0RDI_CLK				50
-#define CAMSS_CSI1_AHB_CLK				51
-#define CAMSS_CSI1_CLK					52
-#define CAMSS_CSI1PHY_CLK				53
-#define CAMSS_CSI1PIX_CLK				54
-#define CAMSS_CSI1RDI_CLK				55
-#define CAMSS_CSI2_AHB_CLK				56
-#define CAMSS_CSI2_CLK					57
-#define CAMSS_CSI2PHY_CLK				58
-#define CAMSS_CSI2PIX_CLK				59
-#define CAMSS_CSI2RDI_CLK				60
-#define CAMSS_CSI3_AHB_CLK				61
-#define CAMSS_CSI3_CLK					62
-#define CAMSS_CSI3PHY_CLK				63
-#define CAMSS_CSI3PIX_CLK				64
-#define CAMSS_CSI3RDI_CLK				65
-#define CAMSS_CSI_VFE0_CLK				66
-#define CAMSS_CSI_VFE1_CLK				67
-#define CAMSS_GP0_CLK					68
-#define CAMSS_GP1_CLK					69
-#define CAMSS_ISPIF_AHB_CLK				70
-#define CAMSS_JPEG_JPEG0_CLK				71
-#define CAMSS_JPEG_JPEG1_CLK				72
-#define CAMSS_JPEG_JPEG2_CLK				73
-#define CAMSS_JPEG_JPEG_AHB_CLK				74
-#define CAMSS_JPEG_JPEG_AXI_CLK				75
-#define CAMSS_JPEG_JPEG_OCMEMNOC_CLK			76
-#define CAMSS_MCLK0_CLK					77
-#define CAMSS_MCLK1_CLK					78
-#define CAMSS_MCLK2_CLK					79
-#define CAMSS_MCLK3_CLK					80
-#define CAMSS_MICRO_AHB_CLK				81
-#define CAMSS_PHY0_CSI0PHYTIMER_CLK			82
-#define CAMSS_PHY1_CSI1PHYTIMER_CLK			83
-#define CAMSS_PHY2_CSI2PHYTIMER_CLK			84
-#define CAMSS_TOP_AHB_CLK				85
-#define CAMSS_VFE_CPP_AHB_CLK				86
-#define CAMSS_VFE_CPP_CLK				87
-#define CAMSS_VFE_VFE0_CLK				88
-#define CAMSS_VFE_VFE1_CLK				89
-#define CAMSS_VFE_VFE_AHB_CLK				90
-#define CAMSS_VFE_VFE_AXI_CLK				91
-#define CAMSS_VFE_VFE_OCMEMNOC_CLK			92
-#define MDSS_AHB_CLK					93
-#define MDSS_AXI_CLK					94
-#define MDSS_BYTE0_CLK					95
-#define MDSS_BYTE1_CLK					96
-#define MDSS_EDPAUX_CLK					97
-#define MDSS_EDPLINK_CLK				98
-#define MDSS_EDPPIXEL_CLK				99
-#define MDSS_ESC0_CLK					100
-#define MDSS_ESC1_CLK					101
-#define MDSS_EXTPCLK_CLK				102
-#define MDSS_HDMI_AHB_CLK				103
-#define MDSS_HDMI_CLK					104
-#define MDSS_MDP_CLK					105
-#define MDSS_MDP_LUT_CLK				106
-#define MDSS_PCLK0_CLK					107
-#define MDSS_PCLK1_CLK					108
-#define MDSS_VSYNC_CLK					109
-#define MMSS_MISC_AHB_CLK				110
-#define MMSS_MMSSNOC_AHB_CLK				111
-#define MMSS_MMSSNOC_BTO_AHB_CLK			112
-#define MMSS_MMSSNOC_AXI_CLK				113
-#define MMSS_S0_AXI_CLK					114
-#define OCMEMCX_AHB_CLK					115
-#define OCMEMCX_OCMEMNOC_CLK				116
-#define OXILI_OCMEMGX_CLK				117
-#define OCMEMNOC_CLK					118
-#define OXILI_GFX3D_CLK					119
-#define OXILICX_AHB_CLK					120
-#define OXILICX_AXI_CLK					121
-#define VENUS0_AHB_CLK					122
-#define VENUS0_AXI_CLK					123
-#define VENUS0_OCMEMNOC_CLK				124
-#define VENUS0_VCODEC0_CLK				125
-#define OCMEMNOC_CLK_SRC				126
-#define SPDM_JPEG0					127
-#define SPDM_JPEG1					128
-#define SPDM_MDP					129
-#define SPDM_AXI					130
-#define SPDM_VCODEC0					131
-#define SPDM_VFE0					132
-#define SPDM_VFE1					133
-#define SPDM_JPEG2					134
-#define SPDM_PCLK1					135
-#define SPDM_GFX3D					136
-#define SPDM_AHB					137
-#define SPDM_PCLK0					138
-#define SPDM_OCMEMNOC					139
-#define SPDM_CSI0					140
-#define SPDM_RM_AXI					141
-#define SPDM_RM_OCMEMNOC				142
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/rockchip,rk808.h b/sys/gnu/dts/include/dt-bindings/clock/rockchip,rk808.h
deleted file mode 100644
index 1a873432f96..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/rockchip,rk808.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * This header provides constants clk index RK808 pmic clkout
- */
-#ifndef _CLK_ROCKCHIP_RK808
-#define _CLK_ROCKCHIP_RK808
-
-/* CLOCKOUT index */
-#define RK808_CLKOUT0		0
-#define RK808_CLKOUT1		1
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/clock/samsung,s3c64xx-clock.h b/sys/gnu/dts/include/dt-bindings/clock/samsung,s3c64xx-clock.h
deleted file mode 100644
index ad95c7f5009..00000000000
--- a/sys/gnu/dts/include/dt-bindings/clock/samsung,s3c64xx-clock.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Device Tree binding constants for Samsung S3C64xx clock controller.
-*/
-
-#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H
-#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H
-
-/*
- * Let each exported clock get a unique index, which is used on DT-enabled
- * platforms to lookup the clock from a clock specifier. These indices are
- * therefore considered an ABI and so must not be changed. This implies
- * that new clocks should be added either in free spaces between clock groups
- * or at the end.
- */
-
-/* Core clocks. */
-#define CLK27M			1
-#define CLK48M			2
-#define FOUT_APLL		3
-#define FOUT_MPLL		4
-#define FOUT_EPLL		5
-#define ARMCLK			6
-#define HCLKX2			7
-#define HCLK			8
-#define PCLK			9
-
-/* HCLK bus clocks. */
-#define HCLK_3DSE		16
-#define HCLK_UHOST		17
-#define HCLK_SECUR		18
-#define HCLK_SDMA1		19
-#define HCLK_SDMA0		20
-#define HCLK_IROM		21
-#define HCLK_DDR1		22
-#define HCLK_MEM1		23
-#define HCLK_MEM0		24
-#define HCLK_USB		25
-#define HCLK_HSMMC2		26
-#define HCLK_HSMMC1		27
-#define HCLK_HSMMC0		28
-#define HCLK_MDP		29
-#define HCLK_DHOST		30
-#define HCLK_IHOST		31
-#define HCLK_DMA1		32
-#define HCLK_DMA0		33
-#define HCLK_JPEG		34
-#define HCLK_CAMIF		35
-#define HCLK_SCALER		36
-#define HCLK_2D			37
-#define HCLK_TV			38
-#define HCLK_POST0		39
-#define HCLK_ROT		40
-#define HCLK_LCD		41
-#define HCLK_TZIC		42
-#define HCLK_INTC		43
-#define HCLK_MFC		44
-#define HCLK_DDR0		45
-
-/* PCLK bus clocks. */
-#define PCLK_IIC1		48
-#define PCLK_IIS2		49
-#define PCLK_SKEY		50
-#define PCLK_CHIPID		51
-#define PCLK_SPI1		52
-#define PCLK_SPI0		53
-#define PCLK_HSIRX		54
-#define PCLK_HSITX		55
-#define PCLK_GPIO		56
-#define PCLK_IIC0		57
-#define PCLK_IIS1		58
-#define PCLK_IIS0		59
-#define PCLK_AC97		60
-#define PCLK_TZPC		61
-#define PCLK_TSADC		62
-#define PCLK_KEYPAD		63
-#define PCLK_IRDA		64
-#define PCLK_PCM1		65
-#define PCLK_PCM0		66
-#define PCLK_PWM		67
-#define PCLK_RTC		68
-#define PCLK_WDT		69
-#define PCLK_UART3		70
-#define PCLK_UART2		71
-#define PCLK_UART1		72
-#define PCLK_UART0		73
-#define PCLK_MFC		74
-
-/* Special clocks. */
-#define SCLK_UHOST		80
-#define SCLK_MMC2_48		81
-#define SCLK_MMC1_48		82
-#define SCLK_MMC0_48		83
-#define SCLK_MMC2		84
-#define SCLK_MMC1		85
-#define SCLK_MMC0		86
-#define SCLK_SPI1_48		87
-#define SCLK_SPI0_48		88
-#define SCLK_SPI1		89
-#define SCLK_SPI0		90
-#define SCLK_DAC27		91
-#define SCLK_TV27		92
-#define SCLK_SCALER27		93
-#define SCLK_SCALER		94
-#define SCLK_LCD27		95
-#define SCLK_LCD		96
-#define SCLK_FIMC		97
-#define SCLK_POST0_27		98
-#define SCLK_AUDIO2		99
-#define SCLK_POST0		100
-#define SCLK_AUDIO1		101
-#define SCLK_AUDIO0		102
-#define SCLK_SECUR		103
-#define SCLK_IRDA		104
-#define SCLK_UART		105
-#define SCLK_MFC		106
-#define SCLK_CAM		107
-#define SCLK_JPEG		108
-#define SCLK_ONENAND		109
-
-/* MEM0 bus clocks - S3C6410-specific. */
-#define MEM0_CFCON		112
-#define MEM0_ONENAND1		113
-#define MEM0_ONENAND0		114
-#define MEM0_NFCON		115
-#define MEM0_SROM		116
-
-/* Muxes. */
-#define MOUT_APLL		128
-#define MOUT_MPLL		129
-#define MOUT_EPLL		130
-#define MOUT_MFC		131
-#define MOUT_AUDIO0		132
-#define MOUT_AUDIO1		133
-#define MOUT_UART		134
-#define MOUT_SPI0		135
-#define MOUT_SPI1		136
-#define MOUT_MMC0		137
-#define MOUT_MMC1		138
-#define MOUT_MMC2		139
-#define MOUT_UHOST		140
-#define MOUT_IRDA		141
-#define MOUT_LCD		142
-#define MOUT_SCALER		143
-#define MOUT_DAC27		144
-#define MOUT_TV27		145
-#define MOUT_AUDIO2		146
-
-/* Dividers. */
-#define DOUT_MPLL		160
-#define DOUT_SECUR		161
-#define DOUT_CAM		162
-#define DOUT_JPEG		163
-#define DOUT_MFC		164
-#define DOUT_MMC0		165
-#define DOUT_MMC1		166
-#define DOUT_MMC2		167
-#define DOUT_LCD		168
-#define DOUT_SCALER		169
-#define DOUT_UHOST		170
-#define DOUT_SPI0		171
-#define DOUT_SPI1		172
-#define DOUT_AUDIO0		173
-#define DOUT_AUDIO1		174
-#define DOUT_UART		175
-#define DOUT_IRDA		176
-#define DOUT_FIMC		177
-#define DOUT_AUDIO2		178
-
-/* Total number of clocks. */
-#define NR_CLKS			(DOUT_AUDIO2 + 1)
-
-#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H */
diff --git a/sys/gnu/dts/include/dt-bindings/iio/qcom,spmi-vadc.h b/sys/gnu/dts/include/dt-bindings/iio/qcom,spmi-vadc.h
deleted file mode 100644
index 42121fa238f..00000000000
--- a/sys/gnu/dts/include/dt-bindings/iio/qcom,spmi-vadc.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
-#define _DT_BINDINGS_QCOM_SPMI_VADC_H
-
-/* Voltage ADC channels */
-#define VADC_USBIN				0x00
-#define VADC_DCIN				0x01
-#define VADC_VCHG_SNS				0x02
-#define VADC_SPARE1_03				0x03
-#define VADC_USB_ID_MV				0x04
-#define VADC_VCOIN				0x05
-#define VADC_VBAT_SNS				0x06
-#define VADC_VSYS				0x07
-#define VADC_DIE_TEMP				0x08
-#define VADC_REF_625MV				0x09
-#define VADC_REF_1250MV				0x0a
-#define VADC_CHG_TEMP				0x0b
-#define VADC_SPARE1				0x0c
-#define VADC_SPARE2				0x0d
-#define VADC_GND_REF				0x0e
-#define VADC_VDD_VADC				0x0f
-
-#define VADC_P_MUX1_1_1				0x10
-#define VADC_P_MUX2_1_1				0x11
-#define VADC_P_MUX3_1_1				0x12
-#define VADC_P_MUX4_1_1				0x13
-#define VADC_P_MUX5_1_1				0x14
-#define VADC_P_MUX6_1_1				0x15
-#define VADC_P_MUX7_1_1				0x16
-#define VADC_P_MUX8_1_1				0x17
-#define VADC_P_MUX9_1_1				0x18
-#define VADC_P_MUX10_1_1			0x19
-#define VADC_P_MUX11_1_1			0x1a
-#define VADC_P_MUX12_1_1			0x1b
-#define VADC_P_MUX13_1_1			0x1c
-#define VADC_P_MUX14_1_1			0x1d
-#define VADC_P_MUX15_1_1			0x1e
-#define VADC_P_MUX16_1_1			0x1f
-
-#define VADC_P_MUX1_1_3				0x20
-#define VADC_P_MUX2_1_3				0x21
-#define VADC_P_MUX3_1_3				0x22
-#define VADC_P_MUX4_1_3				0x23
-#define VADC_P_MUX5_1_3				0x24
-#define VADC_P_MUX6_1_3				0x25
-#define VADC_P_MUX7_1_3				0x26
-#define VADC_P_MUX8_1_3				0x27
-#define VADC_P_MUX9_1_3				0x28
-#define VADC_P_MUX10_1_3			0x29
-#define VADC_P_MUX11_1_3			0x2a
-#define VADC_P_MUX12_1_3			0x2b
-#define VADC_P_MUX13_1_3			0x2c
-#define VADC_P_MUX14_1_3			0x2d
-#define VADC_P_MUX15_1_3			0x2e
-#define VADC_P_MUX16_1_3			0x2f
-
-#define VADC_LR_MUX1_BAT_THERM			0x30
-#define VADC_LR_MUX2_BAT_ID			0x31
-#define VADC_LR_MUX3_XO_THERM			0x32
-#define VADC_LR_MUX4_AMUX_THM1			0x33
-#define VADC_LR_MUX5_AMUX_THM2			0x34
-#define VADC_LR_MUX6_AMUX_THM3			0x35
-#define VADC_LR_MUX7_HW_ID			0x36
-#define VADC_LR_MUX8_AMUX_THM4			0x37
-#define VADC_LR_MUX9_AMUX_THM5			0x38
-#define VADC_LR_MUX10_USB_ID			0x39
-#define VADC_AMUX_PU1				0x3a
-#define VADC_AMUX_PU2				0x3b
-#define VADC_LR_MUX3_BUF_XO_THERM		0x3c
-
-#define VADC_LR_MUX1_PU1_BAT_THERM		0x70
-#define VADC_LR_MUX2_PU1_BAT_ID			0x71
-#define VADC_LR_MUX3_PU1_XO_THERM		0x72
-#define VADC_LR_MUX4_PU1_AMUX_THM1		0x73
-#define VADC_LR_MUX5_PU1_AMUX_THM2		0x74
-#define VADC_LR_MUX6_PU1_AMUX_THM3		0x75
-#define VADC_LR_MUX7_PU1_AMUX_HW_ID		0x76
-#define VADC_LR_MUX8_PU1_AMUX_THM4		0x77
-#define VADC_LR_MUX9_PU1_AMUX_THM5		0x78
-#define VADC_LR_MUX10_PU1_AMUX_USB_ID		0x79
-#define VADC_LR_MUX3_BUF_PU1_XO_THERM		0x7c
-
-#define VADC_LR_MUX1_PU2_BAT_THERM		0xb0
-#define VADC_LR_MUX2_PU2_BAT_ID			0xb1
-#define VADC_LR_MUX3_PU2_XO_THERM		0xb2
-#define VADC_LR_MUX4_PU2_AMUX_THM1		0xb3
-#define VADC_LR_MUX5_PU2_AMUX_THM2		0xb4
-#define VADC_LR_MUX6_PU2_AMUX_THM3		0xb5
-#define VADC_LR_MUX7_PU2_AMUX_HW_ID		0xb6
-#define VADC_LR_MUX8_PU2_AMUX_THM4		0xb7
-#define VADC_LR_MUX9_PU2_AMUX_THM5		0xb8
-#define VADC_LR_MUX10_PU2_AMUX_USB_ID		0xb9
-#define VADC_LR_MUX3_BUF_PU2_XO_THERM		0xbc
-
-#define VADC_LR_MUX1_PU1_PU2_BAT_THERM		0xf0
-#define VADC_LR_MUX2_PU1_PU2_BAT_ID		0xf1
-#define VADC_LR_MUX3_PU1_PU2_XO_THERM		0xf2
-#define VADC_LR_MUX4_PU1_PU2_AMUX_THM1		0xf3
-#define VADC_LR_MUX5_PU1_PU2_AMUX_THM2		0xf4
-#define VADC_LR_MUX6_PU1_PU2_AMUX_THM3		0xf5
-#define VADC_LR_MUX7_PU1_PU2_AMUX_HW_ID		0xf6
-#define VADC_LR_MUX8_PU1_PU2_AMUX_THM4		0xf7
-#define VADC_LR_MUX9_PU1_PU2_AMUX_THM5		0xf8
-#define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID	0xf9
-#define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM	0xfc
-
-#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */
diff --git a/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
deleted file mode 100644
index fa74d7cc960..00000000000
--- a/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * This header provides constants for the Qualcomm PMIC GPIO binding.
- */
-
-#ifndef _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
-#define _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
-
-#define PMIC_GPIO_PULL_UP_30		0
-#define PMIC_GPIO_PULL_UP_1P5		1
-#define PMIC_GPIO_PULL_UP_31P5		2
-#define PMIC_GPIO_PULL_UP_1P5_30	3
-
-#define PMIC_GPIO_STRENGTH_NO		0
-#define PMIC_GPIO_STRENGTH_HIGH		1
-#define PMIC_GPIO_STRENGTH_MED		2
-#define PMIC_GPIO_STRENGTH_LOW		3
-
-/*
- * Note: PM8018 GPIO3 and GPIO4 are supporting
- * only S3 and L2 options (1.8V)
- */
-#define PM8018_GPIO_L6			0
-#define PM8018_GPIO_L5			1
-#define PM8018_GPIO_S3			2
-#define PM8018_GPIO_L14			3
-#define PM8018_GPIO_L2			4
-#define PM8018_GPIO_L4			5
-#define PM8018_GPIO_VDD			6
-
-/*
- * Note: PM8038 GPIO7 and GPIO8 are supporting
- * only L11 and L4 options (1.8V)
- */
-#define PM8038_GPIO_VPH			0
-#define PM8038_GPIO_BB			1
-#define PM8038_GPIO_L11			2
-#define PM8038_GPIO_L15			3
-#define PM8038_GPIO_L4			4
-#define PM8038_GPIO_L3			5
-#define PM8038_GPIO_L17			6
-
-#define PM8058_GPIO_VPH			0
-#define PM8058_GPIO_BB			1
-#define PM8058_GPIO_S3			2
-#define PM8058_GPIO_L3			3
-#define PM8058_GPIO_L7			4
-#define PM8058_GPIO_L6			5
-#define PM8058_GPIO_L5			6
-#define PM8058_GPIO_L2			7
-
-#define PM8917_GPIO_VPH			0
-#define PM8917_GPIO_S4			2
-#define PM8917_GPIO_L15			3
-#define PM8917_GPIO_L4			4
-#define PM8917_GPIO_L3			5
-#define PM8917_GPIO_L17			6
-
-#define PM8921_GPIO_VPH			0
-#define PM8921_GPIO_BB			1
-#define PM8921_GPIO_S4			2
-#define PM8921_GPIO_L15			3
-#define PM8921_GPIO_L4			4
-#define PM8921_GPIO_L3			5
-#define PM8921_GPIO_L17			6
-
-/*
- * Note: PM8941 gpios from 15 to 18 are supporting
- * only S3 and L6 options (1.8V)
- */
-#define PM8941_GPIO_VPH			0
-#define PM8941_GPIO_L1			1
-#define PM8941_GPIO_S3			2
-#define PM8941_GPIO_L6			3
-
-/*
- * Note: PMA8084 gpios from 15 to 18 are supporting
- * only S4 and L6 options (1.8V)
- */
-#define PMA8084_GPIO_VPH		0
-#define PMA8084_GPIO_L1			1
-#define PMA8084_GPIO_S4			2
-#define PMA8084_GPIO_L6			3
-
-/* To be used with "function" */
-#define PMIC_GPIO_FUNC_NORMAL		"normal"
-#define PMIC_GPIO_FUNC_PAIRED		"paired"
-#define PMIC_GPIO_FUNC_FUNC1		"func1"
-#define PMIC_GPIO_FUNC_FUNC2		"func2"
-#define PMIC_GPIO_FUNC_DTEST1		"dtest1"
-#define PMIC_GPIO_FUNC_DTEST2		"dtest2"
-#define PMIC_GPIO_FUNC_DTEST3		"dtest3"
-#define PMIC_GPIO_FUNC_DTEST4		"dtest4"
-
-#define PM8038_GPIO1_2_LPG_DRV		PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO3_5V_BOOST_EN	PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO4_SSBI_ALT_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO5_6_EXT_REG_EN	PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO10_11_EXT_REG_EN	PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO6_7_CLK		PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO9_BAT_ALRM_OUT	PMIC_GPIO_FUNC_FUNC1
-#define PM8038_GPIO6_12_KYPD_DRV	PMIC_GPIO_FUNC_FUNC2
-
-#define PM8058_GPIO7_8_MP3_CLK		PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO7_8_BCLK_19P2MHZ	PMIC_GPIO_FUNC_FUNC2
-#define PM8058_GPIO9_26_KYPD_DRV	PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO21_23_UART_TX	PMIC_GPIO_FUNC_FUNC2
-#define PM8058_GPIO24_26_LPG_DRV	PMIC_GPIO_FUNC_FUNC2
-#define PM8058_GPIO33_BCLK_19P2MHZ	PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO34_35_MP3_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO36_BCLK_19P2MHZ	PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO37_UPL_OUT		PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO37_UART_M_RX		PMIC_GPIO_FUNC_FUNC2
-#define PM8058_GPIO38_XO_SLEEP_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO38_39_CLK_32KHZ	PMIC_GPIO_FUNC_FUNC2
-#define PM8058_GPIO39_MP3_CLK		PMIC_GPIO_FUNC_FUNC1
-#define PM8058_GPIO40_EXT_BB_EN		PMIC_GPIO_FUNC_FUNC1
-
-#define PM8917_GPIO9_18_KEYP_DRV	PMIC_GPIO_FUNC_FUNC1
-#define PM8917_GPIO20_BAT_ALRM_OUT	PMIC_GPIO_FUNC_FUNC1
-#define PM8917_GPIO21_23_UART_TX	PMIC_GPIO_FUNC_FUNC2
-#define PM8917_GPIO25_26_EXT_REG_EN	PMIC_GPIO_FUNC_FUNC1
-#define PM8917_GPIO37_38_XO_SLEEP_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PM8917_GPIO37_38_MP3_CLK	PMIC_GPIO_FUNC_FUNC2
-
-#define PM8941_GPIO9_14_KYPD_DRV	PMIC_GPIO_FUNC_FUNC1
-#define PM8941_GPIO15_18_DIV_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PM8941_GPIO15_18_SLEEP_CLK	PMIC_GPIO_FUNC_FUNC2
-#define PM8941_GPIO23_26_KYPD_DRV	PMIC_GPIO_FUNC_FUNC1
-#define PM8941_GPIO23_26_LPG_DRV_HI	PMIC_GPIO_FUNC_FUNC2
-#define PM8941_GPIO31_BAT_ALRM_OUT	PMIC_GPIO_FUNC_FUNC1
-#define PM8941_GPIO33_36_LPG_DRV_3D	PMIC_GPIO_FUNC_FUNC1
-#define PM8941_GPIO33_36_LPG_DRV_HI	PMIC_GPIO_FUNC_FUNC2
-
-#define PMA8084_GPIO4_5_LPG_DRV		PMIC_GPIO_FUNC_FUNC1
-#define PMA8084_GPIO7_10_LPG_DRV	PMIC_GPIO_FUNC_FUNC1
-#define PMA8084_GPIO5_14_KEYP_DRV	PMIC_GPIO_FUNC_FUNC2
-#define PMA8084_GPIO19_21_KEYP_DRV	PMIC_GPIO_FUNC_FUNC2
-#define PMA8084_GPIO15_18_DIV_CLK	PMIC_GPIO_FUNC_FUNC1
-#define PMA8084_GPIO15_18_SLEEP_CLK	PMIC_GPIO_FUNC_FUNC2
-#define PMA8084_GPIO22_BAT_ALRM_OUT	PMIC_GPIO_FUNC_FUNC1
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-mpp.h b/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-mpp.h
deleted file mode 100644
index d2c7dabe322..00000000000
--- a/sys/gnu/dts/include/dt-bindings/pinctrl/qcom,pmic-mpp.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This header provides constants for the Qualcomm PMIC's
- * Multi-Purpose Pin binding.
- */
-
-#ifndef _DT_BINDINGS_PINCTRL_QCOM_PMIC_MPP_H
-#define _DT_BINDINGS_PINCTRL_QCOM_PMIC_MPP_H
-
-/* power-source */
-#define PM8841_MPP_VPH			0
-#define PM8841_MPP_S3			2
-
-#define PM8941_MPP_VPH			0
-#define PM8941_MPP_L1			1
-#define PM8941_MPP_S3			2
-#define PM8941_MPP_L6			3
-
-#define PMA8084_MPP_VPH			0
-#define PMA8084_MPP_L1			1
-#define PMA8084_MPP_S4			2
-#define PMA8084_MPP_L6			3
-
-/*
- * Analog Input - Set the source for analog input.
- * To be used with "qcom,amux-route" property
- */
-#define PMIC_MPP_AMUX_ROUTE_CH5		0
-#define PMIC_MPP_AMUX_ROUTE_CH6		1
-#define PMIC_MPP_AMUX_ROUTE_CH7		2
-#define PMIC_MPP_AMUX_ROUTE_CH8		3
-#define PMIC_MPP_AMUX_ROUTE_ABUS1	4
-#define PMIC_MPP_AMUX_ROUTE_ABUS2	5
-#define PMIC_MPP_AMUX_ROUTE_ABUS3	6
-#define PMIC_MPP_AMUX_ROUTE_ABUS4	7
-
-/* To be used with "function" */
-#define PMIC_MPP_FUNC_NORMAL		"normal"
-#define PMIC_MPP_FUNC_PAIRED		"paired"
-#define PMIC_MPP_FUNC_DTEST1		"dtest1"
-#define PMIC_MPP_FUNC_DTEST2		"dtest2"
-#define PMIC_MPP_FUNC_DTEST3		"dtest3"
-#define PMIC_MPP_FUNC_DTEST4		"dtest4"
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/regulator/maxim,max77802.h b/sys/gnu/dts/include/dt-bindings/regulator/maxim,max77802.h
deleted file mode 100644
index cf28631d710..00000000000
--- a/sys/gnu/dts/include/dt-bindings/regulator/maxim,max77802.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (C) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Device Tree binding constants for the Maxim 77802 PMIC regulators
- */
-
-#ifndef _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
-#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
-
-/* Regulator operating modes */
-#define MAX77802_OPMODE_LP	1
-#define MAX77802_OPMODE_NORMAL	3
-
-#endif /* _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H */
diff --git a/sys/gnu/dts/include/dt-bindings/reset/altr,rst-mgr.h b/sys/gnu/dts/include/dt-bindings/reset/altr,rst-mgr.h
deleted file mode 100644
index 3f04908fb87..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/altr,rst-mgr.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
-#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
-
-/* MPUMODRST */
-#define CPU0_RESET		0
-#define CPU1_RESET		1
-#define WDS_RESET		2
-#define SCUPER_RESET		3
-#define L2_RESET		4
-
-/* PERMODRST */
-#define EMAC0_RESET		32
-#define EMAC1_RESET		33
-#define USB0_RESET		34
-#define USB1_RESET		35
-#define NAND_RESET		36
-#define QSPI_RESET		37
-#define L4WD0_RESET		38
-#define L4WD1_RESET		39
-#define OSC1TIMER0_RESET	40
-#define OSC1TIMER1_RESET	41
-#define SPTIMER0_RESET		42
-#define SPTIMER1_RESET		43
-#define I2C0_RESET		44
-#define I2C1_RESET		45
-#define I2C2_RESET		46
-#define I2C3_RESET		47
-#define UART0_RESET		48
-#define UART1_RESET		49
-#define SPIM0_RESET		50
-#define SPIM1_RESET		51
-#define SPIS0_RESET		52
-#define SPIS1_RESET		53
-#define SDMMC_RESET		54
-#define CAN0_RESET		55
-#define CAN1_RESET		56
-#define GPIO0_RESET		57
-#define GPIO1_RESET		58
-#define GPIO2_RESET		59
-#define DMA_RESET		60
-#define SDR_RESET		61
-
-/* PER2MODRST */
-#define DMAIF0_RESET		64
-#define DMAIF1_RESET		65
-#define DMAIF2_RESET		66
-#define DMAIF3_RESET		67
-#define DMAIF4_RESET		68
-#define DMAIF5_RESET		69
-#define DMAIF6_RESET		70
-#define DMAIF7_RESET		71
-
-/* BRGMODRST */
-#define HPS2FPGA_RESET		96
-#define LWHPS2FPGA_RESET	97
-#define FPGA2HPS_RESET		98
-
-/* MISCMODRST*/
-#define ROM_RESET		128
-#define OCRAM_RESET		129
-#define SYSMGR_RESET		130
-#define SYSMGRCOLD_RESET	131
-#define FPGAMGR_RESET		132
-#define ACPIDMAP_RESET		133
-#define S2F_RESET		134
-#define S2FCOLD_RESET		135
-#define NRSTPIN_RESET		136
-#define TIMESTAMPCOLD_RESET	137
-#define CLKMGRCOLD_RESET	138
-#define SCANMGR_RESET		139
-#define FRZCTRLCOLD_RESET	140
-#define SYSDBG_RESET		141
-#define DBG_RESET		142
-#define TAPCOLD_RESET		143
-#define SDRCOLD_RESET		144
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-apq8084.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-apq8084.h
deleted file mode 100644
index 527caaf48e3..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-apq8084.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_APQ_GCC_8084_H
-#define _DT_BINDINGS_RESET_APQ_GCC_8084_H
-
-#define GCC_SYSTEM_NOC_BCR		0
-#define GCC_CONFIG_NOC_BCR		1
-#define GCC_PERIPH_NOC_BCR		2
-#define GCC_IMEM_BCR			3
-#define GCC_MMSS_BCR			4
-#define GCC_QDSS_BCR			5
-#define GCC_USB_30_BCR			6
-#define GCC_USB3_PHY_BCR		7
-#define GCC_USB_HS_HSIC_BCR		8
-#define GCC_USB_HS_BCR			9
-#define GCC_USB2A_PHY_BCR		10
-#define GCC_USB2B_PHY_BCR		11
-#define GCC_SDCC1_BCR			12
-#define GCC_SDCC2_BCR			13
-#define GCC_SDCC3_BCR			14
-#define GCC_SDCC4_BCR			15
-#define GCC_BLSP1_BCR			16
-#define GCC_BLSP1_QUP1_BCR		17
-#define GCC_BLSP1_UART1_BCR		18
-#define GCC_BLSP1_QUP2_BCR		19
-#define GCC_BLSP1_UART2_BCR		20
-#define GCC_BLSP1_QUP3_BCR		21
-#define GCC_BLSP1_UART3_BCR		22
-#define GCC_BLSP1_QUP4_BCR		23
-#define GCC_BLSP1_UART4_BCR		24
-#define GCC_BLSP1_QUP5_BCR		25
-#define GCC_BLSP1_UART5_BCR		26
-#define GCC_BLSP1_QUP6_BCR		27
-#define GCC_BLSP1_UART6_BCR		28
-#define GCC_BLSP2_BCR			29
-#define GCC_BLSP2_QUP1_BCR		30
-#define GCC_BLSP2_UART1_BCR		31
-#define GCC_BLSP2_QUP2_BCR		32
-#define GCC_BLSP2_UART2_BCR		33
-#define GCC_BLSP2_QUP3_BCR		34
-#define GCC_BLSP2_UART3_BCR		35
-#define GCC_BLSP2_QUP4_BCR		36
-#define GCC_BLSP2_UART4_BCR		37
-#define GCC_BLSP2_QUP5_BCR		38
-#define GCC_BLSP2_UART5_BCR		39
-#define GCC_BLSP2_QUP6_BCR		40
-#define GCC_BLSP2_UART6_BCR		41
-#define GCC_PDM_BCR			42
-#define GCC_PRNG_BCR			43
-#define GCC_BAM_DMA_BCR			44
-#define GCC_TSIF_BCR			45
-#define GCC_TCSR_BCR			46
-#define GCC_BOOT_ROM_BCR		47
-#define GCC_MSG_RAM_BCR			48
-#define GCC_TLMM_BCR			49
-#define GCC_MPM_BCR			50
-#define GCC_MPM_AHB_RESET		51
-#define GCC_MPM_NON_AHB_RESET		52
-#define GCC_SEC_CTRL_BCR		53
-#define GCC_SPMI_BCR			54
-#define GCC_SPDM_BCR			55
-#define GCC_CE1_BCR			56
-#define GCC_CE2_BCR			57
-#define GCC_BIMC_BCR			58
-#define GCC_SNOC_BUS_TIMEOUT0_BCR	59
-#define GCC_SNOC_BUS_TIMEOUT2_BCR	60
-#define GCC_PNOC_BUS_TIMEOUT0_BCR	61
-#define GCC_PNOC_BUS_TIMEOUT1_BCR	62
-#define GCC_PNOC_BUS_TIMEOUT2_BCR	63
-#define GCC_PNOC_BUS_TIMEOUT3_BCR	64
-#define GCC_PNOC_BUS_TIMEOUT4_BCR	65
-#define GCC_CNOC_BUS_TIMEOUT0_BCR	66
-#define GCC_CNOC_BUS_TIMEOUT1_BCR	67
-#define GCC_CNOC_BUS_TIMEOUT2_BCR	68
-#define GCC_CNOC_BUS_TIMEOUT3_BCR	69
-#define GCC_CNOC_BUS_TIMEOUT4_BCR	70
-#define GCC_CNOC_BUS_TIMEOUT5_BCR	71
-#define GCC_CNOC_BUS_TIMEOUT6_BCR	72
-#define GCC_DEHR_BCR			73
-#define GCC_RBCPR_BCR			74
-#define GCC_MSS_RESTART			75
-#define GCC_LPASS_RESTART		76
-#define GCC_WCSS_RESTART		77
-#define GCC_VENUS_RESTART		78
-#define GCC_COPSS_SMMU_BCR		79
-#define GCC_SPSS_BCR			80
-#define GCC_PCIE_0_BCR			81
-#define GCC_PCIE_0_PHY_BCR		82
-#define GCC_PCIE_1_BCR			83
-#define GCC_PCIE_1_PHY_BCR		84
-#define GCC_USB_30_SEC_BCR		85
-#define GCC_USB3_SEC_PHY_BCR		86
-#define GCC_SATA_BCR			87
-#define GCC_CE3_BCR			88
-#define GCC_UFS_BCR			89
-#define GCC_USB30_PHY_COM_BCR		90
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-ipq806x.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-ipq806x.h
deleted file mode 100644
index 0ad5ef930b5..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-ipq806x.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_IPQ_806X_H
-#define _DT_BINDINGS_RESET_IPQ_806X_H
-
-#define QDSS_STM_RESET					0
-#define AFAB_SMPSS_S_RESET				1
-#define AFAB_SMPSS_M1_RESET				2
-#define AFAB_SMPSS_M0_RESET				3
-#define AFAB_EBI1_CH0_RESET				4
-#define AFAB_EBI1_CH1_RESET				5
-#define SFAB_ADM0_M0_RESET				6
-#define SFAB_ADM0_M1_RESET				7
-#define SFAB_ADM0_M2_RESET				8
-#define ADM0_C2_RESET					9
-#define ADM0_C1_RESET					10
-#define ADM0_C0_RESET					11
-#define ADM0_PBUS_RESET					12
-#define ADM0_RESET					13
-#define QDSS_CLKS_SW_RESET				14
-#define QDSS_POR_RESET					15
-#define QDSS_TSCTR_RESET				16
-#define QDSS_HRESET_RESET				17
-#define QDSS_AXI_RESET					18
-#define QDSS_DBG_RESET					19
-#define SFAB_PCIE_M_RESET				20
-#define SFAB_PCIE_S_RESET				21
-#define PCIE_EXT_RESET					22
-#define PCIE_PHY_RESET					23
-#define PCIE_PCI_RESET					24
-#define PCIE_POR_RESET					25
-#define PCIE_HCLK_RESET					26
-#define PCIE_ACLK_RESET					27
-#define SFAB_LPASS_RESET				28
-#define SFAB_AFAB_M_RESET				29
-#define AFAB_SFAB_M0_RESET				30
-#define AFAB_SFAB_M1_RESET				31
-#define SFAB_SATA_S_RESET				32
-#define SFAB_DFAB_M_RESET				33
-#define DFAB_SFAB_M_RESET				34
-#define DFAB_SWAY0_RESET				35
-#define DFAB_SWAY1_RESET				36
-#define DFAB_ARB0_RESET					37
-#define DFAB_ARB1_RESET					38
-#define PPSS_PROC_RESET					39
-#define PPSS_RESET					40
-#define DMA_BAM_RESET					41
-#define SPS_TIC_H_RESET					42
-#define SFAB_CFPB_M_RESET				43
-#define SFAB_CFPB_S_RESET				44
-#define TSIF_H_RESET					45
-#define CE1_H_RESET					46
-#define CE1_CORE_RESET					47
-#define CE1_SLEEP_RESET					48
-#define CE2_H_RESET					49
-#define CE2_CORE_RESET					50
-#define SFAB_SFPB_M_RESET				51
-#define SFAB_SFPB_S_RESET				52
-#define RPM_PROC_RESET					53
-#define PMIC_SSBI2_RESET				54
-#define SDC1_RESET					55
-#define SDC2_RESET					56
-#define SDC3_RESET					57
-#define SDC4_RESET					58
-#define USB_HS1_RESET					59
-#define USB_HSIC_RESET					60
-#define USB_FS1_XCVR_RESET				61
-#define USB_FS1_RESET					62
-#define GSBI1_RESET					63
-#define GSBI2_RESET					64
-#define GSBI3_RESET					65
-#define GSBI4_RESET					66
-#define GSBI5_RESET					67
-#define GSBI6_RESET					68
-#define GSBI7_RESET					69
-#define SPDM_RESET					70
-#define SEC_CTRL_RESET					71
-#define TLMM_H_RESET					72
-#define SFAB_SATA_M_RESET				73
-#define SATA_RESET					74
-#define TSSC_RESET					75
-#define PDM_RESET					76
-#define MPM_H_RESET					77
-#define MPM_RESET					78
-#define SFAB_SMPSS_S_RESET				79
-#define PRNG_RESET					80
-#define SFAB_CE3_M_RESET				81
-#define SFAB_CE3_S_RESET				82
-#define CE3_SLEEP_RESET					83
-#define PCIE_1_M_RESET					84
-#define PCIE_1_S_RESET					85
-#define PCIE_1_EXT_RESET				86
-#define PCIE_1_PHY_RESET				87
-#define PCIE_1_PCI_RESET				88
-#define PCIE_1_POR_RESET				89
-#define PCIE_1_HCLK_RESET				90
-#define PCIE_1_ACLK_RESET				91
-#define PCIE_2_M_RESET					92
-#define PCIE_2_S_RESET					93
-#define PCIE_2_EXT_RESET				94
-#define PCIE_2_PHY_RESET				95
-#define PCIE_2_PCI_RESET				96
-#define PCIE_2_POR_RESET				97
-#define PCIE_2_HCLK_RESET				98
-#define PCIE_2_ACLK_RESET				99
-#define SFAB_USB30_S_RESET				100
-#define SFAB_USB30_M_RESET				101
-#define USB30_0_PORT2_HS_PHY_RESET			102
-#define USB30_0_MASTER_RESET				103
-#define USB30_0_SLEEP_RESET				104
-#define USB30_0_UTMI_PHY_RESET				105
-#define USB30_0_POWERON_RESET				106
-#define USB30_0_PHY_RESET				107
-#define USB30_1_MASTER_RESET				108
-#define USB30_1_SLEEP_RESET				109
-#define USB30_1_UTMI_PHY_RESET				110
-#define USB30_1_POWERON_RESET				111
-#define USB30_1_PHY_RESET				112
-#define NSSFB0_RESET					113
-#define NSSFB1_RESET					114
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8660.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8660.h
deleted file mode 100644
index a83282fe546..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8660.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
-#define _DT_BINDINGS_RESET_MSM_GCC_8660_H
-
-#define AFAB_CORE_RESET					0
-#define SCSS_SYS_RESET					1
-#define SCSS_SYS_POR_RESET				2
-#define AFAB_SMPSS_S_RESET				3
-#define AFAB_SMPSS_M1_RESET				4
-#define AFAB_SMPSS_M0_RESET				5
-#define AFAB_EBI1_S_RESET				6
-#define SFAB_CORE_RESET					7
-#define SFAB_ADM0_M0_RESET				8
-#define SFAB_ADM0_M1_RESET				9
-#define SFAB_ADM0_M2_RESET				10
-#define ADM0_C2_RESET					11
-#define ADM0_C1_RESET					12
-#define ADM0_C0_RESET					13
-#define ADM0_PBUS_RESET					14
-#define ADM0_RESET					15
-#define SFAB_ADM1_M0_RESET				16
-#define SFAB_ADM1_M1_RESET				17
-#define SFAB_ADM1_M2_RESET				18
-#define MMFAB_ADM1_M3_RESET				19
-#define ADM1_C3_RESET					20
-#define ADM1_C2_RESET					21
-#define ADM1_C1_RESET					22
-#define ADM1_C0_RESET					23
-#define ADM1_PBUS_RESET					24
-#define ADM1_RESET					25
-#define IMEM0_RESET					26
-#define SFAB_LPASS_Q6_RESET				27
-#define SFAB_AFAB_M_RESET				28
-#define AFAB_SFAB_M0_RESET				29
-#define AFAB_SFAB_M1_RESET				30
-#define DFAB_CORE_RESET					31
-#define SFAB_DFAB_M_RESET				32
-#define DFAB_SFAB_M_RESET				33
-#define DFAB_SWAY0_RESET				34
-#define DFAB_SWAY1_RESET				35
-#define DFAB_ARB0_RESET					36
-#define DFAB_ARB1_RESET					37
-#define PPSS_PROC_RESET					38
-#define PPSS_RESET					39
-#define PMEM_RESET					40
-#define DMA_BAM_RESET					41
-#define SIC_RESET					42
-#define SPS_TIC_RESET					43
-#define CFBP0_RESET					44
-#define CFBP1_RESET					45
-#define CFBP2_RESET					46
-#define EBI2_RESET					47
-#define SFAB_CFPB_M_RESET				48
-#define CFPB_MASTER_RESET				49
-#define SFAB_CFPB_S_RESET				50
-#define CFPB_SPLITTER_RESET				51
-#define TSIF_RESET					52
-#define CE1_RESET					53
-#define CE2_RESET					54
-#define SFAB_SFPB_M_RESET				55
-#define SFAB_SFPB_S_RESET				56
-#define RPM_PROC_RESET					57
-#define RPM_BUS_RESET					58
-#define RPM_MSG_RAM_RESET				59
-#define PMIC_ARB0_RESET					60
-#define PMIC_ARB1_RESET					61
-#define PMIC_SSBI2_RESET				62
-#define SDC1_RESET					63
-#define SDC2_RESET					64
-#define SDC3_RESET					65
-#define SDC4_RESET					66
-#define SDC5_RESET					67
-#define USB_HS1_RESET					68
-#define USB_HS2_XCVR_RESET				69
-#define USB_HS2_RESET					70
-#define USB_FS1_XCVR_RESET				71
-#define USB_FS1_RESET					72
-#define USB_FS2_XCVR_RESET				73
-#define USB_FS2_RESET					74
-#define GSBI1_RESET					75
-#define GSBI2_RESET					76
-#define GSBI3_RESET					77
-#define GSBI4_RESET					78
-#define GSBI5_RESET					79
-#define GSBI6_RESET					80
-#define GSBI7_RESET					81
-#define GSBI8_RESET					82
-#define GSBI9_RESET					83
-#define GSBI10_RESET					84
-#define GSBI11_RESET					85
-#define GSBI12_RESET					86
-#define SPDM_RESET					87
-#define SEC_CTRL_RESET					88
-#define TLMM_H_RESET					89
-#define TLMM_RESET					90
-#define MARRM_PWRON_RESET				91
-#define MARM_RESET					92
-#define MAHB1_RESET					93
-#define SFAB_MSS_S_RESET				94
-#define MAHB2_RESET					95
-#define MODEM_SW_AHB_RESET				96
-#define MODEM_RESET					97
-#define SFAB_MSS_MDM1_RESET				98
-#define SFAB_MSS_MDM0_RESET				99
-#define MSS_SLP_RESET					100
-#define MSS_MARM_SAW_RESET				101
-#define MSS_WDOG_RESET					102
-#define TSSC_RESET					103
-#define PDM_RESET					104
-#define SCSS_CORE0_RESET				105
-#define SCSS_CORE0_POR_RESET				106
-#define SCSS_CORE1_RESET				107
-#define SCSS_CORE1_POR_RESET				108
-#define MPM_RESET					109
-#define EBI1_1X_DIV_RESET				110
-#define EBI1_RESET					111
-#define SFAB_SMPSS_S_RESET				112
-#define USB_PHY0_RESET					113
-#define USB_PHY1_RESET					114
-#define PRNG_RESET					115
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h
deleted file mode 100644
index 47c8686955d..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_GCC_8960_H
-#define _DT_BINDINGS_RESET_MSM_GCC_8960_H
-
-#define SFAB_MSS_Q6_SW_RESET				0
-#define SFAB_MSS_Q6_FW_RESET				1
-#define QDSS_STM_RESET					2
-#define AFAB_SMPSS_S_RESET				3
-#define AFAB_SMPSS_M1_RESET				4
-#define AFAB_SMPSS_M0_RESET				5
-#define AFAB_EBI1_CH0_RESET				6
-#define AFAB_EBI1_CH1_RESET				7
-#define SFAB_ADM0_M0_RESET				8
-#define SFAB_ADM0_M1_RESET				9
-#define SFAB_ADM0_M2_RESET				10
-#define ADM0_C2_RESET					11
-#define ADM0_C1_RESET					12
-#define ADM0_C0_RESET					13
-#define ADM0_PBUS_RESET					14
-#define ADM0_RESET					15
-#define QDSS_CLKS_SW_RESET				16
-#define QDSS_POR_RESET					17
-#define QDSS_TSCTR_RESET				18
-#define QDSS_HRESET_RESET				19
-#define QDSS_AXI_RESET					20
-#define QDSS_DBG_RESET					21
-#define PCIE_A_RESET					22
-#define PCIE_AUX_RESET					23
-#define PCIE_H_RESET					24
-#define SFAB_PCIE_M_RESET				25
-#define SFAB_PCIE_S_RESET				26
-#define SFAB_MSS_M_RESET				27
-#define SFAB_USB3_M_RESET				28
-#define SFAB_RIVA_M_RESET				29
-#define SFAB_LPASS_RESET				30
-#define SFAB_AFAB_M_RESET				31
-#define AFAB_SFAB_M0_RESET				32
-#define AFAB_SFAB_M1_RESET				33
-#define SFAB_SATA_S_RESET				34
-#define SFAB_DFAB_M_RESET				35
-#define DFAB_SFAB_M_RESET				36
-#define DFAB_SWAY0_RESET				37
-#define DFAB_SWAY1_RESET				38
-#define DFAB_ARB0_RESET					39
-#define DFAB_ARB1_RESET					40
-#define PPSS_PROC_RESET					41
-#define PPSS_RESET					42
-#define DMA_BAM_RESET					43
-#define SPS_TIC_H_RESET					44
-#define SLIMBUS_H_RESET					45
-#define SFAB_CFPB_M_RESET				46
-#define SFAB_CFPB_S_RESET				47
-#define TSIF_H_RESET					48
-#define CE1_H_RESET					49
-#define CE1_CORE_RESET					50
-#define CE1_SLEEP_RESET					51
-#define CE2_H_RESET					52
-#define CE2_CORE_RESET					53
-#define SFAB_SFPB_M_RESET				54
-#define SFAB_SFPB_S_RESET				55
-#define RPM_PROC_RESET					56
-#define PMIC_SSBI2_RESET				57
-#define SDC1_RESET					58
-#define SDC2_RESET					59
-#define SDC3_RESET					60
-#define SDC4_RESET					61
-#define SDC5_RESET					62
-#define DFAB_A2_RESET					63
-#define USB_HS1_RESET					64
-#define USB_HSIC_RESET					65
-#define USB_FS1_XCVR_RESET				66
-#define USB_FS1_RESET					67
-#define USB_FS2_XCVR_RESET				68
-#define USB_FS2_RESET					69
-#define GSBI1_RESET					70
-#define GSBI2_RESET					71
-#define GSBI3_RESET					72
-#define GSBI4_RESET					73
-#define GSBI5_RESET					74
-#define GSBI6_RESET					75
-#define GSBI7_RESET					76
-#define GSBI8_RESET					77
-#define GSBI9_RESET					78
-#define GSBI10_RESET					79
-#define GSBI11_RESET					80
-#define GSBI12_RESET					81
-#define SPDM_RESET					82
-#define TLMM_H_RESET					83
-#define SFAB_MSS_S_RESET				84
-#define MSS_SLP_RESET					85
-#define MSS_Q6SW_JTAG_RESET				86
-#define MSS_Q6FW_JTAG_RESET				87
-#define MSS_RESET					88
-#define SATA_H_RESET					89
-#define SATA_RXOOB_RESE					90
-#define SATA_PMALIVE_RESET				91
-#define SATA_SFAB_M_RESET				92
-#define TSSC_RESET					93
-#define PDM_RESET					94
-#define MPM_H_RESET					95
-#define MPM_RESET					96
-#define SFAB_SMPSS_S_RESET				97
-#define PRNG_RESET					98
-#define RIVA_RESET					99
-#define USB_HS3_RESET					100
-#define USB_HS4_RESET					101
-#define CE3_RESET					102
-#define PCIE_EXT_PCI_RESET				103
-#define PCIE_PHY_RESET					104
-#define PCIE_PCI_RESET					105
-#define PCIE_POR_RESET					106
-#define PCIE_HCLK_RESET					107
-#define PCIE_ACLK_RESET					108
-#define CE3_H_RESET					109
-#define SFAB_CE3_M_RESET				110
-#define SFAB_CE3_S_RESET				111
-#define SATA_RESET					112
-#define CE3_SLEEP_RESET					113
-#define GSS_SLP_RESET					114
-#define GSS_RESET					115
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8974.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8974.h
deleted file mode 100644
index 9bdf5432293..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8974.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_GCC_8974_H
-#define _DT_BINDINGS_RESET_MSM_GCC_8974_H
-
-#define GCC_SYSTEM_NOC_BCR			0
-#define GCC_CONFIG_NOC_BCR			1
-#define GCC_PERIPH_NOC_BCR			2
-#define GCC_IMEM_BCR				3
-#define GCC_MMSS_BCR				4
-#define GCC_QDSS_BCR				5
-#define GCC_USB_30_BCR				6
-#define GCC_USB3_PHY_BCR			7
-#define GCC_USB_HS_HSIC_BCR			8
-#define GCC_USB_HS_BCR				9
-#define GCC_USB2A_PHY_BCR			10
-#define GCC_USB2B_PHY_BCR			11
-#define GCC_SDCC1_BCR				12
-#define GCC_SDCC2_BCR				13
-#define GCC_SDCC3_BCR				14
-#define GCC_SDCC4_BCR				15
-#define GCC_BLSP1_BCR				16
-#define GCC_BLSP1_QUP1_BCR			17
-#define GCC_BLSP1_UART1_BCR			18
-#define GCC_BLSP1_QUP2_BCR			19
-#define GCC_BLSP1_UART2_BCR			20
-#define GCC_BLSP1_QUP3_BCR			21
-#define GCC_BLSP1_UART3_BCR			22
-#define GCC_BLSP1_QUP4_BCR			23
-#define GCC_BLSP1_UART4_BCR			24
-#define GCC_BLSP1_QUP5_BCR			25
-#define GCC_BLSP1_UART5_BCR			26
-#define GCC_BLSP1_QUP6_BCR			27
-#define GCC_BLSP1_UART6_BCR			28
-#define GCC_BLSP2_BCR				29
-#define GCC_BLSP2_QUP1_BCR			30
-#define GCC_BLSP2_UART1_BCR			31
-#define GCC_BLSP2_QUP2_BCR			32
-#define GCC_BLSP2_UART2_BCR			33
-#define GCC_BLSP2_QUP3_BCR			34
-#define GCC_BLSP2_UART3_BCR			35
-#define GCC_BLSP2_QUP4_BCR			36
-#define GCC_BLSP2_UART4_BCR			37
-#define GCC_BLSP2_QUP5_BCR			38
-#define GCC_BLSP2_UART5_BCR			39
-#define GCC_BLSP2_QUP6_BCR			40
-#define GCC_BLSP2_UART6_BCR			41
-#define GCC_PDM_BCR				42
-#define GCC_BAM_DMA_BCR				43
-#define GCC_TSIF_BCR				44
-#define GCC_TCSR_BCR				45
-#define GCC_BOOT_ROM_BCR			46
-#define GCC_MSG_RAM_BCR				47
-#define GCC_TLMM_BCR				48
-#define GCC_MPM_BCR				49
-#define GCC_SEC_CTRL_BCR			50
-#define GCC_SPMI_BCR				51
-#define GCC_SPDM_BCR				52
-#define GCC_CE1_BCR				53
-#define GCC_CE2_BCR				54
-#define GCC_BIMC_BCR				55
-#define GCC_MPM_NON_AHB_RESET			56
-#define GCC_MPM_AHB_RESET			57
-#define GCC_SNOC_BUS_TIMEOUT0_BCR		58
-#define GCC_SNOC_BUS_TIMEOUT2_BCR		59
-#define GCC_PNOC_BUS_TIMEOUT0_BCR		60
-#define GCC_PNOC_BUS_TIMEOUT1_BCR		61
-#define GCC_PNOC_BUS_TIMEOUT2_BCR		62
-#define GCC_PNOC_BUS_TIMEOUT3_BCR		63
-#define GCC_PNOC_BUS_TIMEOUT4_BCR		64
-#define GCC_CNOC_BUS_TIMEOUT0_BCR		65
-#define GCC_CNOC_BUS_TIMEOUT1_BCR		66
-#define GCC_CNOC_BUS_TIMEOUT2_BCR		67
-#define GCC_CNOC_BUS_TIMEOUT3_BCR		68
-#define GCC_CNOC_BUS_TIMEOUT4_BCR		69
-#define GCC_CNOC_BUS_TIMEOUT5_BCR		70
-#define GCC_CNOC_BUS_TIMEOUT6_BCR		71
-#define GCC_DEHR_BCR				72
-#define GCC_RBCPR_BCR				73
-#define GCC_MSS_RESTART				74
-#define GCC_LPASS_RESTART			75
-#define GCC_WCSS_RESTART			76
-#define GCC_VENUS_RESTART			77
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-apq8084.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-apq8084.h
deleted file mode 100644
index c1671396531..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-apq8084.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_APQ_MMCC_8084_H
-#define _DT_BINDINGS_RESET_APQ_MMCC_8084_H
-
-#define MMSS_SPDM_RESET			0
-#define MMSS_SPDM_RM_RESET		1
-#define VENUS0_RESET			2
-#define VPU_RESET			3
-#define MDSS_RESET			4
-#define AVSYNC_RESET			5
-#define CAMSS_PHY0_RESET		6
-#define CAMSS_PHY1_RESET		7
-#define CAMSS_PHY2_RESET		8
-#define CAMSS_CSI0_RESET		9
-#define CAMSS_CSI0PHY_RESET		10
-#define CAMSS_CSI0RDI_RESET		11
-#define CAMSS_CSI0PIX_RESET		12
-#define CAMSS_CSI1_RESET		13
-#define CAMSS_CSI1PHY_RESET		14
-#define CAMSS_CSI1RDI_RESET		15
-#define CAMSS_CSI1PIX_RESET		16
-#define CAMSS_CSI2_RESET		17
-#define CAMSS_CSI2PHY_RESET		18
-#define CAMSS_CSI2RDI_RESET		19
-#define CAMSS_CSI2PIX_RESET		20
-#define CAMSS_CSI3_RESET		21
-#define CAMSS_CSI3PHY_RESET		22
-#define CAMSS_CSI3RDI_RESET		23
-#define CAMSS_CSI3PIX_RESET		24
-#define CAMSS_ISPIF_RESET		25
-#define CAMSS_CCI_RESET			26
-#define CAMSS_MCLK0_RESET		27
-#define CAMSS_MCLK1_RESET		28
-#define CAMSS_MCLK2_RESET		29
-#define CAMSS_MCLK3_RESET		30
-#define CAMSS_GP0_RESET			31
-#define CAMSS_GP1_RESET			32
-#define CAMSS_TOP_RESET			33
-#define CAMSS_AHB_RESET			34
-#define CAMSS_MICRO_RESET		35
-#define CAMSS_JPEG_RESET		36
-#define CAMSS_VFE_RESET			37
-#define CAMSS_CSI_VFE0_RESET		38
-#define CAMSS_CSI_VFE1_RESET		39
-#define OXILI_RESET			40
-#define OXILICX_RESET			41
-#define OCMEMCX_RESET			42
-#define MMSS_RBCRP_RESET		43
-#define MMSSNOCAHB_RESET		44
-#define MMSSNOCAXI_RESET		45
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8960.h
deleted file mode 100644
index 11741113a84..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8960.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_MMCC_8960_H
-#define _DT_BINDINGS_RESET_MSM_MMCC_8960_H
-
-#define VPE_AXI_RESET					0
-#define IJPEG_AXI_RESET					1
-#define MPD_AXI_RESET					2
-#define VFE_AXI_RESET					3
-#define SP_AXI_RESET					4
-#define VCODEC_AXI_RESET				5
-#define ROT_AXI_RESET					6
-#define VCODEC_AXI_A_RESET				7
-#define VCODEC_AXI_B_RESET				8
-#define FAB_S3_AXI_RESET				9
-#define FAB_S2_AXI_RESET				10
-#define FAB_S1_AXI_RESET				11
-#define FAB_S0_AXI_RESET				12
-#define SMMU_GFX3D_ABH_RESET				13
-#define SMMU_VPE_AHB_RESET				14
-#define SMMU_VFE_AHB_RESET				15
-#define SMMU_ROT_AHB_RESET				16
-#define SMMU_VCODEC_B_AHB_RESET				17
-#define SMMU_VCODEC_A_AHB_RESET				18
-#define SMMU_MDP1_AHB_RESET				19
-#define SMMU_MDP0_AHB_RESET				20
-#define SMMU_JPEGD_AHB_RESET				21
-#define SMMU_IJPEG_AHB_RESET				22
-#define SMMU_GFX2D0_AHB_RESET				23
-#define SMMU_GFX2D1_AHB_RESET				24
-#define APU_AHB_RESET					25
-#define CSI_AHB_RESET					26
-#define TV_ENC_AHB_RESET				27
-#define VPE_AHB_RESET					28
-#define FABRIC_AHB_RESET				29
-#define GFX2D0_AHB_RESET				30
-#define GFX2D1_AHB_RESET				31
-#define GFX3D_AHB_RESET					32
-#define HDMI_AHB_RESET					33
-#define MSSS_IMEM_AHB_RESET				34
-#define IJPEG_AHB_RESET					35
-#define DSI_M_AHB_RESET					36
-#define DSI_S_AHB_RESET					37
-#define JPEGD_AHB_RESET					38
-#define MDP_AHB_RESET					39
-#define ROT_AHB_RESET					40
-#define VCODEC_AHB_RESET				41
-#define VFE_AHB_RESET					42
-#define DSI2_M_AHB_RESET				43
-#define DSI2_S_AHB_RESET				44
-#define CSIPHY2_RESET					45
-#define CSI_PIX1_RESET					46
-#define CSIPHY0_RESET					47
-#define CSIPHY1_RESET					48
-#define DSI2_RESET					49
-#define VFE_CSI_RESET					50
-#define MDP_RESET					51
-#define AMP_RESET					52
-#define JPEGD_RESET					53
-#define CSI1_RESET					54
-#define VPE_RESET					55
-#define MMSS_FABRIC_RESET				56
-#define VFE_RESET					57
-#define GFX2D0_RESET					58
-#define GFX2D1_RESET					59
-#define GFX3D_RESET					60
-#define HDMI_RESET					61
-#define MMSS_IMEM_RESET					62
-#define IJPEG_RESET					63
-#define CSI0_RESET					64
-#define DSI_RESET					65
-#define VCODEC_RESET					66
-#define MDP_TV_RESET					67
-#define MDP_VSYNC_RESET					68
-#define ROT_RESET					69
-#define TV_HDMI_RESET					70
-#define TV_ENC_RESET					71
-#define CSI2_RESET					72
-#define CSI_RDI1_RESET					73
-#define CSI_RDI2_RESET					74
-#define GFX3D_AXI_RESET					75
-#define VCAP_AXI_RESET					76
-#define SMMU_VCAP_AHB_RESET				77
-#define VCAP_AHB_RESET					78
-#define CSI_RDI_RESET					79
-#define CSI_PIX_RESET					80
-#define VCAP_NPL_RESET					81
-#define VCAP_RESET					82
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8974.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8974.h
deleted file mode 100644
index da3ec37f1b1..00000000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8974.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_MMCC_8974_H
-#define _DT_BINDINGS_RESET_MSM_MMCC_8974_H
-
-#define SPDM_RESET			0
-#define SPDM_RM_RESET			1
-#define VENUS0_RESET			2
-#define MDSS_RESET			3
-#define CAMSS_PHY0_RESET		4
-#define CAMSS_PHY1_RESET		5
-#define CAMSS_PHY2_RESET		6
-#define CAMSS_CSI0_RESET		7
-#define CAMSS_CSI0PHY_RESET		8
-#define CAMSS_CSI0RDI_RESET		9
-#define CAMSS_CSI0PIX_RESET		10
-#define CAMSS_CSI1_RESET		11
-#define CAMSS_CSI1PHY_RESET		12
-#define CAMSS_CSI1RDI_RESET		13
-#define CAMSS_CSI1PIX_RESET		14
-#define CAMSS_CSI2_RESET		15
-#define CAMSS_CSI2PHY_RESET		16
-#define CAMSS_CSI2RDI_RESET		17
-#define CAMSS_CSI2PIX_RESET		18
-#define CAMSS_CSI3_RESET		19
-#define CAMSS_CSI3PHY_RESET		20
-#define CAMSS_CSI3RDI_RESET		21
-#define CAMSS_CSI3PIX_RESET		22
-#define CAMSS_ISPIF_RESET		23
-#define CAMSS_CCI_RESET			24
-#define CAMSS_MCLK0_RESET		25
-#define CAMSS_MCLK1_RESET		26
-#define CAMSS_MCLK2_RESET		27
-#define CAMSS_MCLK3_RESET		28
-#define CAMSS_GP0_RESET			29
-#define CAMSS_GP1_RESET			30
-#define CAMSS_TOP_RESET			31
-#define CAMSS_MICRO_RESET		32
-#define CAMSS_JPEG_RESET		33
-#define CAMSS_VFE_RESET			34
-#define CAMSS_CSI_VFE0_RESET		35
-#define CAMSS_CSI_VFE1_RESET		36
-#define OXILI_RESET			37
-#define OXILICX_RESET			38
-#define OCMEMCX_RESET			39
-#define MMSS_RBCRP_RESET		40
-#define MMSSNOCAHB_RESET		41
-#define MMSSNOCAXI_RESET		42
-#define OCMEMNOC_RESET			43
-
-#endif
diff --git a/sys/gnu/dts/include/dt-bindings/soc/qcom,gsbi.h b/sys/gnu/dts/include/dt-bindings/soc/qcom,gsbi.h
deleted file mode 100644
index 7ac4292333a..00000000000
--- a/sys/gnu/dts/include/dt-bindings/soc/qcom,gsbi.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __DT_BINDINGS_QCOM_GSBI_H
-#define __DT_BINDINGS_QCOM_GSBI_H
-
-#define GSBI_PROT_IDLE		0
-#define GSBI_PROT_I2C_UIM	1
-#define GSBI_PROT_I2C		2
-#define GSBI_PROT_SPI		3
-#define GSBI_PROT_UART_W_FC	4
-#define GSBI_PROT_UIM		5
-#define GSBI_PROT_I2C_UART	6
-
-#define GSBI_CRCI_QUP		0
-#define GSBI_CRCI_UART		1
-
-#endif
diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c
index ced89274906..cb230de0c1d 100644
--- a/sys/i386/i386/mp_machdep.c
+++ b/sys/i386/i386/mp_machdep.c
@@ -842,8 +842,8 @@ set_interrupt_apic_ids(void)
 			continue;
 
 		/* Don't let hyperthreads service interrupts. */
-		if (hyperthreading_cpus > 1 &&
-		    apic_id % hyperthreading_cpus != 0)
+		if (cpu_logical > 1 &&
+		    apic_id % cpu_logical != 0)
 			continue;
 
 		intr_add_cpu(i);
diff --git a/sys/i386/isa/npx.c b/sys/i386/isa/npx.c
index 8cc81185394..b0ea4e76247 100644
--- a/sys/i386/isa/npx.c
+++ b/sys/i386/isa/npx.c
@@ -1365,9 +1365,7 @@ fpu_kern_leave(struct thread *td, struct fpu_kern_ctx *ctx)
 int
 fpu_kern_thread(u_int flags)
 {
-	struct pcb *pcb;
 
-	pcb = curpcb;
 	KASSERT((curthread->td_pflags & TDP_KTHREAD) != 0,
 	    ("Only kthread may use fpu_kern_thread"));
 	KASSERT(curpcb->pcb_save == get_pcb_user_save_pcb(curpcb),
diff --git a/sys/kern/imgact_elf.c b/sys/kern/imgact_elf.c
index 075139b922c..0a8b79a4a92 100644
--- a/sys/kern/imgact_elf.c
+++ b/sys/kern/imgact_elf.c
@@ -33,12 +33,13 @@ __FBSDID("$FreeBSD$");
 
 #include "opt_capsicum.h"
 #include "opt_compat.h"
-#include "opt_core.h"
+#include "opt_gzio.h"
 
 #include <sys/param.h>
 #include <sys/capsicum.h>
 #include <sys/exec.h>
 #include <sys/fcntl.h>
+#include <sys/gzio.h>
 #include <sys/imgact.h>
 #include <sys/imgact_elf.h>
 #include <sys/jail.h>
@@ -69,8 +70,6 @@ __FBSDID("$FreeBSD$");
 #include <sys/eventhandler.h>
 #include <sys/user.h>
 
-#include <net/zlib.h>
-
 #include <vm/vm.h>
 #include <vm/vm_kern.h>
 #include <vm/vm_param.h>
@@ -105,11 +104,7 @@ static Elf_Word __elfN(untrans_prot)(vm_prot_t);
 SYSCTL_NODE(_kern, OID_AUTO, __CONCAT(elf, __ELF_WORD_SIZE), CTLFLAG_RW, 0,
     "");
 
-#ifdef COMPRESS_USER_CORES
-static int compress_core(gzFile, char *, char *, unsigned int,
-    struct thread * td);
-#endif
-#define CORE_BUF_SIZE	(16 * 1024)
+#define	CORE_BUF_SIZE	(16 * 1024)
 
 int __elfN(fallback_brand) = -1;
 SYSCTL_INT(__CONCAT(_kern_elf, __ELF_WORD_SIZE), OID_AUTO,
@@ -1067,11 +1062,23 @@ struct note_info {
 
 TAILQ_HEAD(note_info_list, note_info);
 
+/* Coredump output parameters. */
+struct coredump_params {
+	off_t		offset;
+	struct ucred	*active_cred;
+	struct ucred	*file_cred;
+	struct thread	*td;
+	struct vnode	*vp;
+	struct gzio_stream *gzs;
+};
+
 static void cb_put_phdr(vm_map_entry_t, void *);
 static void cb_size_segment(vm_map_entry_t, void *);
+static int core_write(struct coredump_params *, void *, size_t, off_t,
+    enum uio_seg);
 static void each_writable_segment(struct thread *, segment_callback, void *);
-static int __elfN(corehdr)(struct thread *, struct vnode *, struct ucred *,
-    int, void *, size_t, struct note_info_list *, size_t, gzFile);
+static int __elfN(corehdr)(struct coredump_params *, int, void *, size_t,
+    struct note_info_list *, size_t);
 static void __elfN(prepare_notes)(struct thread *, struct note_info_list *,
     size_t *);
 static void __elfN(puthdr)(struct thread *, void *, size_t, int, size_t);
@@ -1095,42 +1102,60 @@ static void note_procstat_rlimit(void *, struct sbuf *, size_t *);
 static void note_procstat_umask(void *, struct sbuf *, size_t *);
 static void note_procstat_vmmap(void *, struct sbuf *, size_t *);
 
-#ifdef COMPRESS_USER_CORES
-extern int compress_user_cores;
+#ifdef GZIO
 extern int compress_user_cores_gzlevel;
-#endif
 
+/*
+ * Write out a core segment to the compression stream.
+ */
 static int
-core_output(struct vnode *vp, void *base, size_t len, off_t offset,
-    struct ucred *active_cred, struct ucred *file_cred,
-    struct thread *td, char *core_buf, gzFile gzfile) {
-
+compress_chunk(struct coredump_params *p, char *base, char *buf, u_int len)
+{
+	u_int chunk_len;
 	int error;
-	if (gzfile) {
-#ifdef COMPRESS_USER_CORES
-		error = compress_core(gzfile, base, core_buf, len, td);
-#else
-		panic("shouldn't be here");
-#endif
-	} else {
-		error = vn_rdwr_inchunks(UIO_WRITE, vp, base, len, offset,
-		    UIO_USERSPACE, IO_UNIT | IO_DIRECT | IO_RANGELOCKED,
-		    active_cred, file_cred, NULL, td);
+
+	while (len > 0) {
+		chunk_len = MIN(len, CORE_BUF_SIZE);
+		copyin(base, buf, chunk_len);
+		error = gzio_write(p->gzs, buf, chunk_len);
+		if (error != 0)
+			break;
+		base += chunk_len;
+		len -= chunk_len;
 	}
 	return (error);
 }
 
-/* Coredump output parameters for sbuf drain routine. */
-struct sbuf_drain_core_params {
-	off_t		offset;
-	struct ucred	*active_cred;
-	struct ucred	*file_cred;
-	struct thread	*td;
-	struct vnode	*vp;
-#ifdef COMPRESS_USER_CORES
-	gzFile		gzfile;
+static int
+core_gz_write(void *base, size_t len, off_t offset, void *arg)
+{
+
+	return (core_write((struct coredump_params *)arg, base, len, offset,
+	    UIO_SYSSPACE));
+}
+#endif /* GZIO */
+
+static int
+core_write(struct coredump_params *p, void *base, size_t len, off_t offset,
+    enum uio_seg seg)
+{
+
+	return (vn_rdwr_inchunks(UIO_WRITE, p->vp, base, len, offset,
+	    seg, IO_UNIT | IO_DIRECT | IO_RANGELOCKED,
+	    p->active_cred, p->file_cred, NULL, p->td));
+}
+
+static int
+core_output(void *base, size_t len, off_t offset, struct coredump_params *p,
+    void *tmpbuf)
+{
+
+#ifdef GZIO
+	if (p->gzs != NULL)
+		return (compress_chunk(p, base, tmpbuf, len));
 #endif
-};
+	return (core_write(p, base, len, offset, UIO_USERSPACE));
+}
 
 /*
  * Drain into a core file.
@@ -1138,10 +1163,10 @@ struct sbuf_drain_core_params {
 static int
 sbuf_drain_core_output(void *arg, const char *data, int len)
 {
-	struct sbuf_drain_core_params *p;
+	struct coredump_params *p;
 	int error, locked;
 
-	p = (struct sbuf_drain_core_params *)arg;
+	p = (struct coredump_params *)arg;
 
 	/*
 	 * Some kern_proc out routines that print to this sbuf may
@@ -1154,16 +1179,13 @@ sbuf_drain_core_output(void *arg, const char *data, int len)
 	locked = PROC_LOCKED(p->td->td_proc);
 	if (locked)
 		PROC_UNLOCK(p->td->td_proc);
-#ifdef COMPRESS_USER_CORES
-	if (p->gzfile != Z_NULL)
-		error = compress_core(p->gzfile, NULL, __DECONST(char *, data),
-		    len, p->td);
+#ifdef GZIO
+	if (p->gzs != NULL)
+		error = gzio_write(p->gzs, __DECONST(char *, data), len);
 	else
 #endif
-		error = vn_rdwr_inchunks(UIO_WRITE, p->vp,
-		    __DECONST(void *, data), len, p->offset, UIO_SYSSPACE,
-		    IO_UNIT | IO_DIRECT | IO_RANGELOCKED, p->active_cred,
-		    p->file_cred, NULL, p->td);
+		error = core_write(p, __DECONST(void *, data), len, p->offset,
+		    UIO_SYSSPACE);
 	if (locked)
 		PROC_LOCK(p->td->td_proc);
 	if (error != 0)
@@ -1192,42 +1214,16 @@ __elfN(coredump)(struct thread *td, struct vnode *vp, off_t limit, int flags)
 	int error = 0;
 	struct sseg_closure seginfo;
 	struct note_info_list notelst;
+	struct coredump_params params;
 	struct note_info *ninfo;
-	void *hdr;
+	void *hdr, *tmpbuf;
 	size_t hdrsize, notesz, coresize;
+	boolean_t compress;
 
-	gzFile gzfile = Z_NULL;
-	char *core_buf = NULL;
-#ifdef COMPRESS_USER_CORES
-	char gzopen_flags[8];
-	char *p;
-	int doing_compress = flags & IMGACT_CORE_COMPRESS;
-#endif
-
+	compress = (flags & IMGACT_CORE_COMPRESS) != 0;
 	hdr = NULL;
 	TAILQ_INIT(&notelst);
 
-#ifdef COMPRESS_USER_CORES
-        if (doing_compress) {
-                p = gzopen_flags;
-                *p++ = 'w';
-                if (compress_user_cores_gzlevel >= 0 &&
-                    compress_user_cores_gzlevel <= 9)
-                        *p++ = '0' + compress_user_cores_gzlevel;
-                *p = 0;
-                gzfile = gz_open("", gzopen_flags, vp);
-                if (gzfile == Z_NULL) {
-                        error = EFAULT;
-                        goto done;
-                }
-                core_buf = malloc(CORE_BUF_SIZE, M_TEMP, M_WAITOK | M_ZERO);
-                if (!core_buf) {
-                        error = ENOMEM;
-                        goto done;
-                }
-        }
-#endif
-
 	/* Size the program segments. */
 	seginfo.count = 0;
 	seginfo.size = 0;
@@ -1254,6 +1250,28 @@ __elfN(coredump)(struct thread *td, struct vnode *vp, off_t limit, int flags)
 		goto done;
 	}
 
+	/* Set up core dump parameters. */
+	params.offset = 0;
+	params.active_cred = cred;
+	params.file_cred = NOCRED;
+	params.td = td;
+	params.vp = vp;
+	params.gzs = NULL;
+
+	tmpbuf = NULL;
+#ifdef GZIO
+	/* Create a compression stream if necessary. */
+	if (compress) {
+		params.gzs = gzio_init(core_gz_write, GZIO_DEFLATE,
+		    CORE_BUF_SIZE, compress_user_cores_gzlevel, &params);
+		if (params.gzs == NULL) {
+			error = EFAULT;
+			goto done;
+		}
+		tmpbuf = malloc(CORE_BUF_SIZE, M_TEMP, M_WAITOK | M_ZERO);
+        }
+#endif
+
 	/*
 	 * Allocate memory for building the header, fill it up,
 	 * and write it out following the notes.
@@ -1263,8 +1281,8 @@ __elfN(coredump)(struct thread *td, struct vnode *vp, off_t limit, int flags)
 		error = EINVAL;
 		goto done;
 	}
-	error = __elfN(corehdr)(td, vp, cred, seginfo.count, hdr, hdrsize,
-	    &notelst, notesz, gzfile);
+	error = __elfN(corehdr)(&params, seginfo.count, hdr, hdrsize, &notelst,
+	    notesz);
 
 	/* Write the contents of all of the writable segments. */
 	if (error == 0) {
@@ -1275,13 +1293,17 @@ __elfN(coredump)(struct thread *td, struct vnode *vp, off_t limit, int flags)
 		php = (Elf_Phdr *)((char *)hdr + sizeof(Elf_Ehdr)) + 1;
 		offset = round_page(hdrsize + notesz);
 		for (i = 0; i < seginfo.count; i++) {
-			error = core_output(vp, (caddr_t)(uintptr_t)php->p_vaddr,
-			    php->p_filesz, offset, cred, NOCRED, curthread, core_buf, gzfile);
+			error = core_output((caddr_t)(uintptr_t)php->p_vaddr,
+			    php->p_filesz, offset, &params, tmpbuf);
 			if (error != 0)
 				break;
 			offset += php->p_filesz;
 			php++;
 		}
+#ifdef GZIO
+		if (error == 0 && compress)
+			error = gzio_flush(params.gzs);
+#endif
 	}
 	if (error) {
 		log(LOG_WARNING,
@@ -1290,11 +1312,11 @@ __elfN(coredump)(struct thread *td, struct vnode *vp, off_t limit, int flags)
 	}
 
 done:
-#ifdef COMPRESS_USER_CORES
-	if (core_buf)
-		free(core_buf, M_TEMP);
-	if (gzfile)
-		gzclose(gzfile);
+#ifdef GZIO
+	if (compress) {
+		free(tmpbuf, M_TEMP);
+		gzio_fini(params.gzs);
+	}
 #endif
 	while ((ninfo = TAILQ_FIRST(&notelst)) != NULL) {
 		TAILQ_REMOVE(&notelst, ninfo, link);
@@ -1419,29 +1441,19 @@ each_writable_segment(td, func, closure)
  * the page boundary.
  */
 static int
-__elfN(corehdr)(struct thread *td, struct vnode *vp, struct ucred *cred,
-    int numsegs, void *hdr, size_t hdrsize, struct note_info_list *notelst,
-    size_t notesz, gzFile gzfile)
+__elfN(corehdr)(struct coredump_params *p, int numsegs, void *hdr,
+    size_t hdrsize, struct note_info_list *notelst, size_t notesz)
 {
-	struct sbuf_drain_core_params params;
 	struct note_info *ninfo;
 	struct sbuf *sb;
 	int error;
 
 	/* Fill in the header. */
 	bzero(hdr, hdrsize);
-	__elfN(puthdr)(td, hdr, hdrsize, numsegs, notesz);
+	__elfN(puthdr)(p->td, hdr, hdrsize, numsegs, notesz);
 
-	params.offset = 0;
-	params.active_cred = cred;
-	params.file_cred = NOCRED;
-	params.td = td;
-	params.vp = vp;
-#ifdef COMPRESS_USER_CORES
-	params.gzfile = gzfile;
-#endif
 	sb = sbuf_new(NULL, NULL, CORE_BUF_SIZE, SBUF_FIXEDLEN);
-	sbuf_set_drain(sb, sbuf_drain_core_output, &params);
+	sbuf_set_drain(sb, sbuf_drain_core_output, p);
 	sbuf_start_section(sb, NULL);
 	sbuf_bcat(sb, hdr, hdrsize);
 	TAILQ_FOREACH(ninfo, notelst, link)
@@ -2108,58 +2120,6 @@ static struct execsw __elfN(execsw) = {
 };
 EXEC_SET(__CONCAT(elf, __ELF_WORD_SIZE), __elfN(execsw));
 
-#ifdef COMPRESS_USER_CORES
-/*
- * Compress and write out a core segment for a user process.
- *
- * 'inbuf' is the starting address of a VM segment in the process' address
- * space that is to be compressed and written out to the core file.  'dest_buf'
- * is a buffer in the kernel's address space.  The segment is copied from 
- * 'inbuf' to 'dest_buf' first before being processed by the compression
- * routine gzwrite().  This copying is necessary because the content of the VM
- * segment may change between the compression pass and the crc-computation pass
- * in gzwrite().  This is because realtime threads may preempt the UNIX kernel.
- *
- * If inbuf is NULL it is assumed that data is already copied to 'dest_buf'.
- */
-static int
-compress_core (gzFile file, char *inbuf, char *dest_buf, unsigned int len,
-    struct thread *td)
-{
-	int len_compressed;
-	int error = 0;
-	unsigned int chunk_len;
-
-	while (len) {
-		if (inbuf != NULL) {
-			chunk_len = (len > CORE_BUF_SIZE) ? CORE_BUF_SIZE : len;
-			copyin(inbuf, dest_buf, chunk_len);
-			inbuf += chunk_len;
-		} else {
-			chunk_len = len;
-		}
-		len_compressed = gzwrite(file, dest_buf, chunk_len);
-
-		EVENTHANDLER_INVOKE(app_coredump_progress, td, len_compressed);
-
-		if ((unsigned int)len_compressed != chunk_len) {
-			log(LOG_WARNING,
-			    "compress_core: length mismatch (0x%x returned, "
-			    "0x%x expected)\n", len_compressed, chunk_len);
-			EVENTHANDLER_INVOKE(app_coredump_error, td,
-			    "compress_core: length mismatch %x -> %x",
-			    chunk_len, len_compressed);
-			error = EFAULT;
-			break;
-		}
-		len -= chunk_len;
-		maybe_yield();
-	}
-
-	return (error);
-}
-#endif /* COMPRESS_USER_CORES */
-
 static vm_prot_t
 __elfN(trans_prot)(Elf_Word flags)
 {
diff --git a/sys/kern/kern_cons.c b/sys/kern/kern_cons.c
index f91fe035f7a..75f8b9cd6ec 100644
--- a/sys/kern/kern_cons.c
+++ b/sys/kern/kern_cons.c
@@ -292,7 +292,8 @@ sysctl_kern_console(SYSCTL_HANDLER_ARGS)
 	int delete, error;
 	struct sbuf *sb;
 
-	sb = sbuf_new(NULL, NULL, CNDEVPATHMAX * 2, SBUF_AUTOEXTEND);
+	sb = sbuf_new(NULL, NULL, CNDEVPATHMAX * 2, SBUF_AUTOEXTEND |
+	    SBUF_INCLUDENUL);
 	if (sb == NULL)
 		return (ENOMEM);
 	sbuf_clear(sb);
diff --git a/sys/kern/kern_descrip.c b/sys/kern/kern_descrip.c
index 42ca1efda41..c21047a5e85 100644
--- a/sys/kern/kern_descrip.c
+++ b/sys/kern/kern_descrip.c
@@ -3296,6 +3296,7 @@ sysctl_kern_proc_filedesc(SYSCTL_HANDLER_ARGS)
 	name = (int *)arg1;
 
 	sbuf_new_for_sysctl(&sb, NULL, FILEDESC_SBUF_SIZE, req);
+	sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
 	error = pget((pid_t)name[0], PGET_CANDEBUG | PGET_NOTWEXIT, &p);
 	if (error != 0) {
 		sbuf_delete(&sb);
@@ -3490,6 +3491,7 @@ sysctl_kern_proc_cwd(SYSCTL_HANDLER_ARGS)
 	name = (int *)arg1;
 
 	sbuf_new_for_sysctl(&sb, NULL, sizeof(struct kinfo_file), req);
+	sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
 	error = pget((pid_t)name[0], PGET_CANDEBUG | PGET_NOTWEXIT, &p);
 	if (error != 0) {
 		sbuf_delete(&sb);
diff --git a/sys/kern/kern_et.c b/sys/kern/kern_et.c
index 544e6e47673..5df53769a37 100644
--- a/sys/kern/kern_et.c
+++ b/sys/kern/kern_et.c
@@ -29,6 +29,7 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
+#include <sys/sbuf.h>
 #include <sys/sysctl.h>
 #include <sys/systm.h>
 #include <sys/queue.h>
@@ -238,22 +239,24 @@ et_free(struct eventtimer *et)
 static int
 sysctl_kern_eventtimer_choice(SYSCTL_HANDLER_ARGS)
 {
-	char buf[512], *spc;
+	struct sbuf sb;
 	struct eventtimer *et;
-	int error, off;
+	int error;
+
+	if ((error = sysctl_wire_old_buffer(req, 0)) != 0)
+		return (error);
+	sbuf_new_for_sysctl(&sb, NULL, 0, req);
 
-	spc = "";
-	error = 0;
-	buf[0] = 0;
-	off = 0;
 	ET_LOCK();
 	SLIST_FOREACH(et, &eventtimers, et_all) {
-		off += snprintf(buf + off, sizeof(buf) - off, "%s%s(%d)",
-		    spc, et->et_name, et->et_quality);
-		spc = " ";
+		if (et != SLIST_FIRST(&eventtimers))
+			sbuf_putc(&sb, ' ');
+		sbuf_printf(&sb, "%s(%d)", et->et_name, et->et_quality);
 	}
 	ET_UNLOCK();
-	error = SYSCTL_OUT(req, buf, strlen(buf));
+
+	error = sbuf_finish(&sb);
+	sbuf_delete(&sb);
 	return (error);
 }
 SYSCTL_PROC(_kern_eventtimer, OID_AUTO, choice,
diff --git a/sys/kern/kern_fail.c b/sys/kern/kern_fail.c
index 85d81e88405..e455c3c943e 100644
--- a/sys/kern/kern_fail.c
+++ b/sys/kern/kern_fail.c
@@ -394,11 +394,10 @@ fail_point_sysctl(SYSCTL_HANDLER_ARGS)
 	int error;
 
 	/* Retrieving */
-	sbuf_new(&sb, NULL, 128, SBUF_AUTOEXTEND);
+	sbuf_new_for_sysctl(&sb, NULL, 128, req);
 	fail_point_get(fp, &sb);
 	sbuf_trim(&sb);
-	sbuf_finish(&sb);
-	error = SYSCTL_OUT(req, sbuf_data(&sb), sbuf_len(&sb));
+	error = sbuf_finish(&sb);
 	sbuf_delete(&sb);
 
 	/* Setting */
diff --git a/sys/kern/kern_gzio.c b/sys/kern/kern_gzio.c
index 15dc3015ca2..a4974a729c3 100644
--- a/sys/kern/kern_gzio.c
+++ b/sys/kern/kern_gzio.c
@@ -1,400 +1,223 @@
-/*
- * $Id: kern_gzio.c,v 1.6 2008-10-18 22:54:45 lbazinet Exp $
+/*-
+ * Copyright (c) 2014 Mark Johnston <markj@FreeBSD.org>
  *
- * core_gzip.c -- gzip routines used in compressing user process cores
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
  *
- * This file is derived from src/lib/libz/gzio.c in FreeBSD.
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
  */
 
-/* gzio.c -- IO on .gz files
- * Copyright (C) 1995-1998 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h
- *
- */
-
-/* @(#) $FreeBSD$ */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
-#include <sys/proc.h>
+
+#include <sys/gzio.h>
+#include <sys/kernel.h>
 #include <sys/malloc.h>
-#include <sys/vnode.h>
-#include <sys/syslog.h>
-#include <sys/endian.h>
+
 #include <net/zutil.h>
-#include <sys/libkern.h>
 
-#include <sys/vnode.h>
-#include <sys/mount.h>
+#define	KERN_GZ_HDRLEN		10	/* gzip header length */
+#define	KERN_GZ_TRAILERLEN	8	/* gzip trailer length */
+#define	KERN_GZ_MAGIC1		0x1f	/* first magic byte */
+#define	KERN_GZ_MAGIC2		0x8b	/* second magic byte */
 
-#define GZ_HEADER_LEN	10
+MALLOC_DEFINE(M_GZIO, "gzio", "zlib state");
 
-#ifndef Z_BUFSIZE
-#  ifdef MAXSEG_64K
-#    define Z_BUFSIZE 4096 /* minimize memory usage for 16-bit DOS */
-#  else
-#    define Z_BUFSIZE 16384
-#  endif
-#endif
-#ifndef Z_PRINTF_BUFSIZE
-#  define Z_PRINTF_BUFSIZE 4096
-#endif
+struct gzio_stream {
+	uint8_t *	gz_buffer;	/* output buffer */
+	size_t		gz_bufsz;	/* total buffer size */
+	off_t		gz_off;		/* offset into the output stream */
+	enum gzio_mode	gz_mode;	/* stream mode */
+	uint32_t	gz_crc;		/* stream CRC32 */
+	gzio_cb		gz_cb;		/* output callback */
+	void *		gz_arg;		/* private callback arg */
+	z_stream	gz_stream;	/* zlib state */
+};
 
-#define ALLOC(size) malloc(size, M_TEMP, M_WAITOK | M_ZERO)
-#define TRYFREE(p) {if (p) free(p, M_TEMP);}
+static void *	gz_alloc(void *, u_int, u_int);
+static void	gz_free(void *, void *);
+static int	gz_write(struct gzio_stream *, void *, u_int, int);
 
-static int gz_magic[2] = {0x1f, 0x8b}; /* gzip magic header */
-
-/* gzip flag byte */
-#define ASCII_FLAG   0x01 /* bit 0 set: file probably ascii text */
-#define HEAD_CRC     0x02 /* bit 1 set: header CRC present */
-#define EXTRA_FIELD  0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME    0x08 /* bit 3 set: original file name present */
-#define COMMENT      0x10 /* bit 4 set: file comment present */
-#define RESERVED     0xE0 /* bits 5..7: reserved */
-
-typedef struct gz_stream {
-    z_stream stream;
-    int      z_err;   /* error code for last stream operation */
-    int      z_eof;   /* set if end of input file */
-    struct vnode *file; /* vnode pointer of .gz file */
-    Byte     *inbuf;  /* input buffer */
-    Byte     *outbuf; /* output buffer */
-    uLong    crc;     /* crc32 of uncompressed data */
-    char     *msg;    /* error message */
-    char     *path;   /* path name for debugging only */
-    int      transparent; /* 1 if input file is not a .gz file */
-    char     mode;    /* 'w' or 'r' */
-    long     startpos; /* start of compressed data in file (header skipped) */
-    off_t    outoff;  /* current offset in output file */
-    int	     flags;
-} gz_stream;
-
-
-local int do_flush        OF((gzFile file, int flush));
-local int    destroy      OF((gz_stream *s));
-local void   putU32      OF((gz_stream *file, uint32_t x));
-local void *gz_alloc      OF((void *notused, u_int items, u_int size));
-local void gz_free        OF((void *notused, void *ptr));
-
-/* ===========================================================================
-     Opens a gzip (.gz) file for reading or writing. The mode parameter
-   is as in fopen ("rb" or "wb"). The file is given either by file descriptor
-   or path name (if fd == -1).
-     gz_open return NULL if the file could not be opened or if there was
-   insufficient memory to allocate the (de)compression state; errno
-   can be checked to distinguish the two cases (if errno is zero, the
-   zlib error is Z_MEM_ERROR).
-*/
-gzFile gz_open (path, mode, vp)
-    const char *path;
-    const char *mode;
-    struct vnode *vp;
+struct gzio_stream *
+gzio_init(gzio_cb cb, enum gzio_mode mode, size_t bufsz, int level, void *arg)
 {
-    int err;
-    int level = Z_DEFAULT_COMPRESSION; /* compression level */
-    int strategy = Z_DEFAULT_STRATEGY; /* compression strategy */
-    const char *p = mode;
-    gz_stream *s;
-    char fmode[80]; /* copy of mode, without the compression level */
-    char *m = fmode;
-    ssize_t resid;
-    int error;
-    char buf[GZ_HEADER_LEN + 1];
+	struct gzio_stream *s;
+	uint8_t *hdr;
+	int error;
 
-    if (!path || !mode) return Z_NULL;
+	if (bufsz < KERN_GZ_HDRLEN)
+		return (NULL);
+	if (mode != GZIO_DEFLATE)
+		return (NULL);
 
-    s = (gz_stream *)ALLOC(sizeof(gz_stream));
-    if (!s) return Z_NULL;
+	s = gz_alloc(NULL, 1, sizeof(*s));
+	s->gz_bufsz = bufsz;
+	s->gz_buffer = gz_alloc(NULL, 1, s->gz_bufsz);
+	s->gz_mode = mode;
+	s->gz_crc = ~0U;
+	s->gz_cb = cb;
+	s->gz_arg = arg;
 
-    s->stream.zalloc = (alloc_func)gz_alloc;
-    s->stream.zfree = (free_func)gz_free;
-    s->stream.opaque = (voidpf)0;
-    s->stream.next_in = s->inbuf = Z_NULL;
-    s->stream.next_out = s->outbuf = Z_NULL;
-    s->stream.avail_in = s->stream.avail_out = 0;
-    s->file = NULL;
-    s->z_err = Z_OK;
-    s->z_eof = 0;
-    s->crc = 0;
-    s->msg = NULL;
-    s->transparent = 0;
-    s->outoff = 0;
-    s->flags = 0;
+	s->gz_stream.zalloc = gz_alloc;
+	s->gz_stream.zfree = gz_free;
+	s->gz_stream.opaque = NULL;
+	s->gz_stream.next_in = Z_NULL;
+	s->gz_stream.avail_in = 0;
 
-    s->path = (char*)ALLOC(strlen(path)+1);
-    if (s->path == NULL) {
-        return destroy(s), (gzFile)Z_NULL;
-    }
-    strcpy(s->path, path); /* do this early for debugging */
+	error = deflateInit2(&s->gz_stream, level, Z_DEFLATED, -MAX_WBITS,
+	    DEF_MEM_LEVEL, Z_DEFAULT_STRATEGY);
+	if (error != 0)
+		goto fail;
 
-    s->mode = '\0';
-    do {
-        if (*p == 'r') s->mode = 'r';
-        if (*p == 'w' || *p == 'a') s->mode = 'w';
-        if (*p >= '0' && *p <= '9') {
-	    level = *p - '0';
-	} else if (*p == 'f') {
-	  strategy = Z_FILTERED;
-	} else if (*p == 'h') {
-	  strategy = Z_HUFFMAN_ONLY;
-	} else {
-	    *m++ = *p; /* copy the mode */
-	}
-    } while (*p++ && m != fmode + sizeof(fmode));
+	s->gz_stream.avail_out = s->gz_bufsz;
+	s->gz_stream.next_out = s->gz_buffer;
 
-    if (s->mode != 'w') {
-        log(LOG_ERR, "gz_open: mode is not w (%c)\n", s->mode);
-        return destroy(s), (gzFile)Z_NULL;
-    }
-    
-    err = deflateInit2(&(s->stream), level,
-                       Z_DEFLATED, -MAX_WBITS, DEF_MEM_LEVEL, strategy);
-    /* windowBits is passed < 0 to suppress zlib header */
+	/* Write the gzip header to the output buffer. */
+	hdr = s->gz_buffer;
+	memset(hdr, 0, KERN_GZ_HDRLEN);
+	hdr[0] = KERN_GZ_MAGIC1;
+	hdr[1] = KERN_GZ_MAGIC2;
+	hdr[2] = Z_DEFLATED;
+	hdr[9] = OS_CODE;
+	s->gz_stream.next_out += KERN_GZ_HDRLEN;
+	s->gz_stream.avail_out -= KERN_GZ_HDRLEN;
 
-    s->stream.next_out = s->outbuf = (Byte*)ALLOC(Z_BUFSIZE);
-    if (err != Z_OK || s->outbuf == Z_NULL) {
-        return destroy(s), (gzFile)Z_NULL;
-    }
+	return (s);
 
-    s->stream.avail_out = Z_BUFSIZE;
-    s->file = vp;
-
-    /* Write a very simple .gz header:
-     */
-    snprintf(buf, sizeof(buf), "%c%c%c%c%c%c%c%c%c%c", gz_magic[0],
-             gz_magic[1], Z_DEFLATED, 0 /*flags*/, 0,0,0,0 /*time*/,
-             0 /*xflags*/, OS_CODE);
-
-    if ((error = vn_rdwr(UIO_WRITE, s->file, buf, GZ_HEADER_LEN, s->outoff,
-                         UIO_SYSSPACE, IO_UNIT, curproc->p_ucred,
-                         NOCRED, &resid, curthread))) {
-        s->outoff += GZ_HEADER_LEN - resid;
-        return destroy(s), (gzFile)Z_NULL;
-    }
-    s->outoff += GZ_HEADER_LEN;
-    s->startpos = 10L;
-    
-    return (gzFile)s;
+fail:
+	gz_free(NULL, s->gz_buffer);
+	gz_free(NULL, s);
+	return (NULL);
 }
 
-
- /* ===========================================================================
- * Cleanup then free the given gz_stream. Return a zlib error code.
-   Try freeing in the reverse order of allocations.
- */
-local int destroy (s)
-    gz_stream *s;
+int
+gzio_write(struct gzio_stream *s, void *data, u_int len)
 {
-    int err = Z_OK;
 
-    if (!s) return Z_STREAM_ERROR;
-
-    TRYFREE(s->msg);
-
-    if (s->stream.state != NULL) {
-	if (s->mode == 'w') {
-	    err = deflateEnd(&(s->stream));
-	}
-    }
-    if (s->z_err < 0) err = s->z_err;
-
-    TRYFREE(s->inbuf);
-    TRYFREE(s->outbuf);
-    TRYFREE(s->path);
-    TRYFREE(s);
-    return err;
+	return (gz_write(s, data, len, Z_NO_FLUSH));
 }
 
-
-/* ===========================================================================
-     Writes the given number of uncompressed bytes into the compressed file.
-   gzwrite returns the number of bytes actually written (0 in case of error).
-*/
-int ZEXPORT gzwrite (file, buf, len)
-    gzFile file;
-    const voidp buf;
-    unsigned len;
+int
+gzio_flush(struct gzio_stream *s)
 {
-    gz_stream *s = (gz_stream*)file;
-    off_t curoff;
-    size_t resid;
-    int error;
 
-    if (s == NULL || s->mode != 'w') return Z_STREAM_ERROR;
-
-    s->stream.next_in = (Bytef*)buf;
-    s->stream.avail_in = len;
-
-    curoff = s->outoff;
-    while (s->stream.avail_in != 0) {
-
-        if (s->stream.avail_out == 0) {
-
-            s->stream.next_out = s->outbuf;
-            error = vn_rdwr_inchunks(UIO_WRITE, s->file, s->outbuf, Z_BUFSIZE,
-                        curoff, UIO_SYSSPACE, IO_UNIT,
-                        curproc->p_ucred, NOCRED, &resid, curthread);
-            if (error) {
-                log(LOG_ERR, "gzwrite: vn_rdwr return %d\n", error);
-                curoff += Z_BUFSIZE - resid;
-                s->z_err = Z_ERRNO;
-                break;
-            }
-            curoff += Z_BUFSIZE;
-            s->stream.avail_out = Z_BUFSIZE;
-        }
-        s->z_err = deflate(&(s->stream), Z_NO_FLUSH);
-        if (s->z_err != Z_OK) {
-            log(LOG_ERR,
-                "gzwrite: deflate returned error %d\n", s->z_err);
-            break;
-        }
-    }
-
-    s->crc = ~crc32_raw(buf, len, ~s->crc);
-    s->outoff = curoff;
-
-    return (int)(len - s->stream.avail_in);
+	return (gz_write(s, NULL, 0, Z_FINISH));
 }
 
-
-/* ===========================================================================
-     Flushes all pending output into the compressed file. The parameter
-   flush is as in the deflate() function.
-*/
-local int do_flush (file, flush)
-    gzFile file;
-    int flush;
+void
+gzio_fini(struct gzio_stream *s)
 {
-    uInt len;
-    int done = 0;
-    gz_stream *s = (gz_stream*)file;
-    off_t curoff = s->outoff;
-    size_t resid;
-    int error;
 
-    if (s == NULL || s->mode != 'w') return Z_STREAM_ERROR;
-
-    if (s->stream.avail_in) {
-        log(LOG_WARNING, "do_flush: avail_in non-zero on entry\n");
-    } 
-
-    s->stream.avail_in = 0; /* should be zero already anyway */
-
-    for (;;) {
-        len = Z_BUFSIZE - s->stream.avail_out;
-
-        if (len != 0) {
-            error = vn_rdwr_inchunks(UIO_WRITE, s->file, s->outbuf, len, curoff,
-                        UIO_SYSSPACE, IO_UNIT, curproc->p_ucred,
-                        NOCRED, &resid, curthread);
-	    if (error) {
-                s->z_err = Z_ERRNO;
-                s->outoff = curoff + len - resid;
-                return Z_ERRNO;
-            }
-            s->stream.next_out = s->outbuf;
-            s->stream.avail_out = Z_BUFSIZE;
-            curoff += len;
-        }
-        if (done) break;
-        s->z_err = deflate(&(s->stream), flush);
-
-	/* Ignore the second of two consecutive flushes: */
-	if (len == 0 && s->z_err == Z_BUF_ERROR) s->z_err = Z_OK;
-
-        /* deflate has finished flushing only when it hasn't used up
-         * all the available space in the output buffer: 
-         */
-        done = (s->stream.avail_out != 0 || s->z_err == Z_STREAM_END);
- 
-        if (s->z_err != Z_OK && s->z_err != Z_STREAM_END) break;
-    }
-    s->outoff = curoff;
-
-    return  s->z_err == Z_STREAM_END ? Z_OK : s->z_err;
+	(void)deflateEnd(&s->gz_stream);
+	gz_free(NULL, s->gz_buffer);
+	gz_free(NULL, s);
 }
 
-int ZEXPORT gzflush (file, flush)
-     gzFile file;
-     int flush;
-{
-    gz_stream *s = (gz_stream*)file;
-    int err = do_flush (file, flush);
-
-    if (err) return err;
-    return  s->z_err == Z_STREAM_END ? Z_OK : s->z_err;
-}
-
-
-/* ===========================================================================
-   Outputs a long in LSB order to the given file
-*/
-local void putU32 (s, x)
-    gz_stream *s;
-    uint32_t x;
-{
-    uint32_t xx;
-    off_t curoff = s->outoff;
-    ssize_t resid;
-
-#if BYTE_ORDER == BIG_ENDIAN
-    xx = bswap32(x);
-#else
-    xx = x;
-#endif
-    vn_rdwr(UIO_WRITE, s->file, (caddr_t)&xx, sizeof(xx), curoff,
-            UIO_SYSSPACE, IO_UNIT, curproc->p_ucred,
-            NOCRED, &resid, curthread);
-    s->outoff += sizeof(xx) - resid;
-}
-
-
-/* ===========================================================================
-     Flushes all pending output if necessary, closes the compressed file
-   and deallocates all the (de)compression state.
-*/
-int ZEXPORT gzclose (file)
-    gzFile file;
-{
-    int err;
-    gz_stream *s = (gz_stream*)file;
-
-    if (s == NULL) return Z_STREAM_ERROR;
-
-    if (s->mode == 'w') {
-        err = do_flush (file, Z_FINISH);
-        if (err != Z_OK) {
-            log(LOG_ERR, "gzclose: do_flush failed (err %d)\n", err);
-            return destroy((gz_stream*)file);
-        }
-#if 0
-	printf("gzclose: putting crc: %lld total: %lld\n",
-	    (long long)s->crc, (long long)s->stream.total_in);
-	printf("sizeof uLong = %d\n", (int)sizeof(uLong));
-#endif
-        putU32 (s, s->crc);
-        putU32 (s, (uint32_t) s->stream.total_in);
-    }
-    return destroy((gz_stream*)file);
-}
-
-/*
- * Space allocation and freeing routines for use by zlib routines when called
- * from gzip modules.
- */
 static void *
-gz_alloc(void *notused __unused, u_int items, u_int size)
+gz_alloc(void *arg __unused, u_int n, u_int sz)
 {
-    void *ptr;
 
-    MALLOC(ptr, void *, items * size, M_TEMP, M_NOWAIT | M_ZERO);
-    return ptr;
+	/*
+	 * Memory for zlib state is allocated using M_NODUMP since it may be
+	 * used to compress a kernel dump, and we don't want zlib to attempt to
+	 * compress its own state.
+	 */
+	return (malloc(n * sz, M_GZIO, M_WAITOK | M_ZERO | M_NODUMP));
 }
-                                     
+
 static void
-gz_free(void *opaque __unused, void *ptr)
+gz_free(void *arg __unused, void *ptr)
 {
-    FREE(ptr, M_TEMP);
+
+	free(ptr, M_GZIO);
 }
 
+static int
+gz_write(struct gzio_stream *s, void *buf, u_int len, int zflag)
+{
+	uint8_t trailer[KERN_GZ_TRAILERLEN];
+	size_t room;
+	int error, zerror;
+
+	KASSERT(zflag == Z_FINISH || zflag == Z_NO_FLUSH,
+	    ("unexpected flag %d", zflag));
+	KASSERT(s->gz_mode == GZIO_DEFLATE,
+	    ("invalid stream mode %d", s->gz_mode));
+
+	if (len > 0) {
+		s->gz_stream.avail_in = len;
+		s->gz_stream.next_in = buf;
+		s->gz_crc = crc32_raw(buf, len, s->gz_crc);
+	} else
+		s->gz_crc ^= ~0U;
+
+	error = 0;
+	do {
+		zerror = deflate(&s->gz_stream, zflag);
+		if (zerror != Z_OK && zerror != Z_STREAM_END) {
+			error = EIO;
+			break;
+		}
+
+		if (s->gz_stream.avail_out == 0 || zerror == Z_STREAM_END) {
+			/*
+			 * Our output buffer is full or there's nothing left
+			 * to produce, so we're flushing the buffer.
+			 */
+			len = s->gz_bufsz - s->gz_stream.avail_out;
+			if (zerror == Z_STREAM_END) {
+				/*
+				 * Try to pack as much of the trailer into the
+				 * output buffer as we can.
+				 */
+				((uint32_t *)trailer)[0] = s->gz_crc;
+				((uint32_t *)trailer)[1] =
+				    s->gz_stream.total_in;
+				room = MIN(KERN_GZ_TRAILERLEN,
+				    s->gz_bufsz - len);
+				memcpy(s->gz_buffer + len, trailer, room);
+				len += room;
+			}
+
+			error = s->gz_cb(s->gz_buffer, len, s->gz_off,
+			    s->gz_arg);
+			if (error != 0)
+				break;
+
+			s->gz_off += len;
+			s->gz_stream.next_out = s->gz_buffer;
+			s->gz_stream.avail_out = s->gz_bufsz;
+
+			/*
+			 * If we couldn't pack the trailer into the output
+			 * buffer, write it out now.
+			 */
+			if (zerror == Z_STREAM_END && room < KERN_GZ_TRAILERLEN)
+				error = s->gz_cb(trailer + room,
+				    KERN_GZ_TRAILERLEN - room, s->gz_off,
+				    s->gz_arg);
+		}
+	} while (zerror != Z_STREAM_END &&
+	    (zflag == Z_FINISH || s->gz_stream.avail_in > 0));
+
+	return (error);
+}
diff --git a/sys/kern/kern_malloc.c b/sys/kern/kern_malloc.c
index 9e29030fb6f..aef1e4e23d3 100644
--- a/sys/kern/kern_malloc.c
+++ b/sys/kern/kern_malloc.c
@@ -918,6 +918,7 @@ sysctl_kern_malloc_stats(SYSCTL_HANDLER_ARGS)
 	if (error != 0)
 		return (error);
 	sbuf_new_for_sysctl(&sbuf, NULL, 128, req);
+	sbuf_clear_flags(&sbuf, SBUF_INCLUDENUL);
 	mtx_lock(&malloc_mtx);
 
 	/*
diff --git a/sys/kern/kern_proc.c b/sys/kern/kern_proc.c
index 2aa5c4a3d4c..a607d7b191b 100644
--- a/sys/kern/kern_proc.c
+++ b/sys/kern/kern_proc.c
@@ -1273,6 +1273,7 @@ sysctl_out_proc(struct proc *p, struct sysctl_req *req, int flags,
 
 	pid = p->p_pid;
 	sbuf_new_for_sysctl(&sb, (char *)&ki, sizeof(ki), req);
+	sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
 	error = kern_proc_out(p, &sb, flags);
 	error2 = sbuf_finish(&sb);
 	sbuf_delete(&sb);
@@ -1934,6 +1935,7 @@ sysctl_kern_proc_auxv(SYSCTL_HANDLER_ARGS)
 		return (0);
 	}
 	sbuf_new_for_sysctl(&sb, NULL, GET_PS_STRINGS_CHUNK_SZ, req);
+	sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
 	error = proc_getauxv(curthread, p, &sb);
 	error2 = sbuf_finish(&sb);
 	PRELE(p);
@@ -2421,6 +2423,7 @@ sysctl_kern_proc_vmmap(SYSCTL_HANDLER_ARGS)
 
 	name = (int *)arg1;
 	sbuf_new_for_sysctl(&sb, NULL, sizeof(struct kinfo_vmentry), req);
+	sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
 	error = pget((pid_t)name[0], PGET_CANDEBUG | PGET_NOTWEXIT, &p);
 	if (error != 0) {
 		sbuf_delete(&sb);
diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c
index 57f66b02632..58d9707029c 100644
--- a/sys/kern/kern_sig.c
+++ b/sys/kern/kern_sig.c
@@ -38,8 +38,8 @@
 __FBSDID("$FreeBSD$");
 
 #include "opt_compat.h"
+#include "opt_gzio.h"
 #include "opt_ktrace.h"
-#include "opt_core.h"
 
 #include <sys/param.h>
 #include <sys/ctype.h>
@@ -3075,17 +3075,18 @@ sysctl_debug_num_cores_check (SYSCTL_HANDLER_ARGS)
 SYSCTL_PROC(_debug, OID_AUTO, ncores, CTLTYPE_INT|CTLFLAG_RW,
 	    0, sizeof(int), sysctl_debug_num_cores_check, "I", "");
 
-#if defined(COMPRESS_USER_CORES)
-int compress_user_cores = 1;
-SYSCTL_INT(_kern, OID_AUTO, compress_user_cores, CTLFLAG_RW,
+#define	GZ_SUFFIX	".gz"
+
+#ifdef GZIO
+static int compress_user_cores = 1;
+SYSCTL_INT(_kern, OID_AUTO, compress_user_cores, CTLFLAG_RWTUN,
     &compress_user_cores, 0, "Compression of user corefiles");
 
-int compress_user_cores_gzlevel = -1; /* default level */
-SYSCTL_INT(_kern, OID_AUTO, compress_user_cores_gzlevel, CTLFLAG_RW,
-    &compress_user_cores_gzlevel, -1, "Corefile gzip compression level");
-
-#define GZ_SUFFIX	".gz"
-#define GZ_SUFFIX_LEN	3
+int compress_user_cores_gzlevel = 6;
+SYSCTL_INT(_kern, OID_AUTO, compress_user_cores_gzlevel, CTLFLAG_RWTUN,
+    &compress_user_cores_gzlevel, 0, "Corefile gzip compression level");
+#else
+static int compress_user_cores = 0;
 #endif
 
 static char corefilename[MAXPATHLEN] = {"%N.core"};
@@ -3162,10 +3163,8 @@ corefile_open(const char *comm, uid_t uid, pid_t pid, struct thread *td,
 		}
 	}
 	free(hostname, M_TEMP);
-#ifdef COMPRESS_USER_CORES
 	if (compress)
 		sbuf_printf(&sb, GZ_SUFFIX);
-#endif
 	if (sbuf_error(&sb) != 0) {
 		log(LOG_ERR, "pid %ld (%s), uid (%lu): corename is too "
 		    "long\n", (long)pid, comm, (u_long)uid);
@@ -3260,18 +3259,12 @@ coredump(struct thread *td)
 	char *name;			/* name of corefile */
 	void *rl_cookie;
 	off_t limit;
-	int compress;
 	char *data = NULL;
 	char *fullpath, *freepath = NULL;
 	size_t len;
 	static const char comm_name[] = "comm=";
 	static const char core_name[] = "core=";
 
-#ifdef COMPRESS_USER_CORES
-	compress = compress_user_cores;
-#else
-	compress = 0;
-#endif
 	PROC_LOCK_ASSERT(p, MA_OWNED);
 	MPASS((p->p_flag & P_HADTHREADS) == 0 || p->p_singlethread == td);
 	_STOPEVENT(p, S_CORE, 0);
@@ -3297,8 +3290,8 @@ coredump(struct thread *td)
 	}
 	PROC_UNLOCK(p);
 
-	error = corefile_open(p->p_comm, cred->cr_uid, p->p_pid, td, compress,
-	    &vp, &name);
+	error = corefile_open(p->p_comm, cred->cr_uid, p->p_pid, td,
+	    compress_user_cores, &vp, &name);
 	if (error != 0)
 		return (error);
 
@@ -3337,7 +3330,7 @@ coredump(struct thread *td)
 
 	if (p->p_sysent->sv_coredump != NULL) {
 		error = p->p_sysent->sv_coredump(td, vp, limit,
-		    compress ? IMGACT_CORE_COMPRESS : 0);
+		    compress_user_cores ? IMGACT_CORE_COMPRESS : 0);
 	} else {
 		error = ENOSYS;
 	}
diff --git a/sys/kern/kern_sysctl.c b/sys/kern/kern_sysctl.c
index f429a7bfdba..97ee6342853 100644
--- a/sys/kern/kern_sysctl.c
+++ b/sys/kern/kern_sysctl.c
@@ -1807,7 +1807,7 @@ sbuf_new_for_sysctl(struct sbuf *s, char *buf, int length,
     struct sysctl_req *req)
 {
 
-	s = sbuf_new(s, buf, length, SBUF_FIXEDLEN);
+	s = sbuf_new(s, buf, length, SBUF_FIXEDLEN | SBUF_INCLUDENUL);
 	sbuf_set_drain(s, sbuf_sysctl_drain, req);
 	return (s);
 }
diff --git a/sys/kern/kern_tc.c b/sys/kern/kern_tc.c
index 1c29041b1f2..6264c64e975 100644
--- a/sys/kern/kern_tc.c
+++ b/sys/kern/kern_tc.c
@@ -23,10 +23,9 @@ __FBSDID("$FreeBSD$");
 #include <sys/param.h>
 #include <sys/kernel.h>
 #include <sys/limits.h>
-#ifdef FFCLOCK
 #include <sys/lock.h>
 #include <sys/mutex.h>
-#endif
+#include <sys/sbuf.h>
 #include <sys/sysctl.h>
 #include <sys/syslog.h>
 #include <sys/systm.h>
@@ -1447,18 +1446,18 @@ SYSCTL_PROC(_kern_timecounter, OID_AUTO, hardware, CTLTYPE_STRING | CTLFLAG_RW,
 static int
 sysctl_kern_timecounter_choice(SYSCTL_HANDLER_ARGS)
 {
-	char buf[32], *spc;
+	struct sbuf sb;
 	struct timecounter *tc;
 	int error;
 
-	spc = "";
-	error = 0;
-	for (tc = timecounters; error == 0 && tc != NULL; tc = tc->tc_next) {
-		sprintf(buf, "%s%s(%d)",
-		    spc, tc->tc_name, tc->tc_quality);
-		error = SYSCTL_OUT(req, buf, strlen(buf));
-		spc = " ";
+	sbuf_new_for_sysctl(&sb, NULL, 0, req);
+	for (tc = timecounters; tc != NULL; tc = tc->tc_next) {
+		if (tc != timecounters)
+			sbuf_putc(&sb, ' ');
+		sbuf_printf(&sb, "%s(%d)", tc->tc_name, tc->tc_quality);
 	}
+	error = sbuf_finish(&sb);
+	sbuf_delete(&sb);
 	return (error);
 }
 
@@ -1498,7 +1497,10 @@ pps_fetch(struct pps_fetch_args *fapi, struct pps_state *pps)
 		cseq = pps->ppsinfo.clear_sequence;
 		while (aseq == pps->ppsinfo.assert_sequence &&
 		    cseq == pps->ppsinfo.clear_sequence) {
-			err = tsleep(pps, PCATCH, "ppsfch", timo);
+			if (pps->mtx != NULL)
+				err = msleep(pps, pps->mtx, PCATCH, "ppsfch", timo);
+			else
+				err = tsleep(pps, PCATCH, "ppsfch", timo);
 			if (err == EWOULDBLOCK && fapi->timeout.tv_sec == -1) {
 				continue;
 			} else if (err != 0) {
diff --git a/sys/kern/link_elf.c b/sys/kern/link_elf.c
index 3cf19e1323c..65c8276a950 100644
--- a/sys/kern/link_elf.c
+++ b/sys/kern/link_elf.c
@@ -411,7 +411,7 @@ link_elf_init(void* arg)
 
 	ef = (elf_file_t) linker_kernel_file;
 	ef->preloaded = 1;
-#ifdef __powerpc64__
+#ifdef __powerpc__
 	ef->address = (caddr_t) (__startkernel - KERNBASE);
 #else
 	ef->address = 0;
diff --git a/sys/kern/sched_ule.c b/sys/kern/sched_ule.c
index d394d9f56ae..17371e7fe25 100644
--- a/sys/kern/sched_ule.c
+++ b/sys/kern/sched_ule.c
@@ -2830,7 +2830,7 @@ sysctl_kern_sched_topology_spec(SYSCTL_HANDLER_ARGS)
 
 	KASSERT(cpu_top != NULL, ("cpu_top isn't initialized"));
 
-	topo = sbuf_new(NULL, NULL, 500, SBUF_AUTOEXTEND);
+	topo = sbuf_new_for_sysctl(NULL, NULL, 512, req);
 	if (topo == NULL)
 		return (ENOMEM);
 
@@ -2839,8 +2839,7 @@ sysctl_kern_sched_topology_spec(SYSCTL_HANDLER_ARGS)
 	sbuf_printf(topo, "</groups>\n");
 
 	if (err == 0) {
-		sbuf_finish(topo);
-		err = SYSCTL_OUT(req, sbuf_data(topo), sbuf_len(topo));
+		err = sbuf_finish(topo);
 	}
 	sbuf_delete(topo);
 	return (err);
diff --git a/sys/kern/subr_bus.c b/sys/kern/subr_bus.c
index 1c7b21ca7d9..fdb92e30fd8 100644
--- a/sys/kern/subr_bus.c
+++ b/sys/kern/subr_bus.c
@@ -212,7 +212,7 @@ devclass_sysctl_handler(SYSCTL_HANDLER_ARGS)
 	default:
 		return (EINVAL);
 	}
-	return (SYSCTL_OUT(req, value, strlen(value)));
+	return (SYSCTL_OUT_STR(req, value));
 }
 
 static void
@@ -269,7 +269,7 @@ device_sysctl_handler(SYSCTL_HANDLER_ARGS)
 	default:
 		return (EINVAL);
 	}
-	error = SYSCTL_OUT(req, value, strlen(value));
+	error = SYSCTL_OUT_STR(req, value);
 	if (buf != NULL)
 		free(buf, M_BUS);
 	return (error);
@@ -2682,6 +2682,25 @@ device_set_devclass(device_t dev, const char *classname)
 	return (error);
 }
 
+/**
+ * @brief Set the devclass of a device and mark the devclass fixed.
+ * @see device_set_devclass()
+ */
+int
+device_set_devclass_fixed(device_t dev, const char *classname)
+{
+	int error;
+
+	if (classname == NULL)
+		return (EINVAL);
+
+	error = device_set_devclass(dev, classname);
+	if (error)
+		return (error);
+	dev->flags |= DF_FIXEDCLASS;
+	return (0);
+}
+
 /**
  * @brief Set the driver of a device
  *
diff --git a/sys/kern/subr_param.c b/sys/kern/subr_param.c
index 95f3250ee23..f662ec26807 100644
--- a/sys/kern/subr_param.c
+++ b/sys/kern/subr_param.c
@@ -300,6 +300,5 @@ init_param2(long physpages)
 static int
 sysctl_kern_vm_guest(SYSCTL_HANDLER_ARGS)
 {
-	return (SYSCTL_OUT(req, vm_guest_sysctl_names[vm_guest], 
-	    strlen(vm_guest_sysctl_names[vm_guest])));
+	return (SYSCTL_OUT_STR(req, vm_guest_sysctl_names[vm_guest]));
 }
diff --git a/sys/kern/subr_prf.c b/sys/kern/subr_prf.c
index cc30de1f645..7e6fd091753 100644
--- a/sys/kern/subr_prf.c
+++ b/sys/kern/subr_prf.c
@@ -1009,7 +1009,7 @@ sysctl_kern_msgbuf(SYSCTL_HANDLER_ARGS)
 		len = msgbuf_peekbytes(msgbufp, buf, sizeof(buf), &seq);
 		mtx_unlock(&msgbuf_lock);
 		if (len == 0)
-			return (0);
+			return (SYSCTL_OUT(req, "", 1)); /* add nulterm */
 
 		error = sysctl_handle_opaque(oidp, buf, len, req);
 		if (error)
diff --git a/sys/kern/subr_sbuf.c b/sys/kern/subr_sbuf.c
index 1490bc6ebd4..801deba7915 100644
--- a/sys/kern/subr_sbuf.c
+++ b/sys/kern/subr_sbuf.c
@@ -262,6 +262,28 @@ sbuf_uionew(struct sbuf *s, struct uio *uio, int *error)
 }
 #endif
 
+int
+sbuf_get_flags(struct sbuf *s)
+{
+
+	return (s->s_flags & SBUF_USRFLAGMSK);
+}
+
+void
+sbuf_clear_flags(struct sbuf *s, int flags)
+{
+
+	s->s_flags &= ~(flags & SBUF_USRFLAGMSK);
+}
+
+void
+sbuf_set_flags(struct sbuf *s, int flags)
+{
+
+
+	s->s_flags |= (flags & SBUF_USRFLAGMSK);
+}
+
 /*
  * Clear an sbuf and reset its position.
  */
@@ -697,11 +719,13 @@ sbuf_finish(struct sbuf *s)
 	assert_sbuf_integrity(s);
 	assert_sbuf_state(s, 0);
 
+	s->s_buf[s->s_len] = '\0';
+	if (s->s_flags & SBUF_INCLUDENUL)
+		s->s_len++;
 	if (s->s_drain_func != NULL) {
 		while (s->s_len > 0 && s->s_error == 0)
 			s->s_error = sbuf_drain(s);
 	}
-	s->s_buf[s->s_len] = '\0';
 	SBUF_SETFLAG(s, SBUF_FINISHED);
 #ifdef _KERNEL
 	return (s->s_error);
@@ -743,6 +767,10 @@ sbuf_len(struct sbuf *s)
 
 	if (s->s_error != 0)
 		return (-1);
+
+	/* If finished, nulterm is already in len, else add one. */
+	if ((s->s_flags & (SBUF_INCLUDENUL | SBUF_FINISHED)) == SBUF_INCLUDENUL)
+		return (s->s_len + 1);
 	return (s->s_len);
 }
 
diff --git a/sys/ofed/drivers/net/mlx4/utils.c b/sys/kern/uipc_mbufhash.c
similarity index 56%
rename from sys/ofed/drivers/net/mlx4/utils.c
rename to sys/kern/uipc_mbufhash.c
index 2444ec5961c..75f4f93988f 100644
--- a/sys/ofed/drivers/net/mlx4/utils.c
+++ b/sys/kern/uipc_mbufhash.c
@@ -25,58 +25,34 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
-#include <sys/malloc.h>
 #include <sys/mbuf.h>
-#include <sys/queue.h>
+#include <sys/fnv_hash.h>
 #include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-#include <sys/module.h>
-#include <sys/priv.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/hash.h>
-#include <sys/lock.h>
-#include <sys/rmlock.h>
-#include <sys/taskqueue.h>
-#include <sys/eventhandler.h>
+
+#include <net/if.h>
+#include <net/if_var.h>
 
 #include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_clone.h>
-#include <net/if_arp.h>
-#include <net/if_dl.h>
-#include <net/if_llc.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-#include <net/bpf.h>
 
 #if defined(INET) || defined(INET6)
 #include <netinet/in.h>
 #endif
+
 #ifdef INET
-#include <netinet/in_systm.h>
-#include <netinet/if_ether.h>
 #include <netinet/ip.h>
 #endif
 
 #ifdef INET6
 #include <netinet/ip6.h>
-#include <netinet6/in6_var.h>
-#include <netinet6/in6_ifattach.h>
 #endif
 
 #include <net/if_vlan_var.h>
 
-#include "utils.h"
-
-/* XXX this code should be factored out */
-/* XXX copied from if_lagg.c */
-
 static const void *
-mlx4_en_gethdr(struct mbuf *m, u_int off, u_int len, void *buf)
+m_ether_tcpip_hash_gethdr(const struct mbuf *m, const u_int off,
+    const u_int len, void *buf)
 {
+
 	if (m->m_pkthdr.len < (off + len)) {
 		return (NULL);
 	} else if (m->m_len < (off + len)) {
@@ -87,22 +63,18 @@ mlx4_en_gethdr(struct mbuf *m, u_int off, u_int len, void *buf)
 }
 
 uint32_t
-mlx4_en_hashmbuf(uint32_t flags, struct mbuf *m, uint32_t key)
+m_ether_tcpip_hash_init(void)
+{
+	uint32_t seed;
+
+	seed = arc4random();
+	return (fnv_32_buf(&seed, sizeof(seed), FNV1_32_INIT));
+}
+
+uint32_t
+m_ether_tcpip_hash(const uint32_t flags, const struct mbuf *m,
+    const uint32_t key)
 {
-	uint16_t etype;
-	uint32_t p = key;
-	int off;
-	struct ether_header *eh;
-	const struct ether_vlan_header *vlan;
-#ifdef INET
-	const struct ip *ip;
-	const uint32_t *ports;
-	int iphlen;
-#endif
-#ifdef INET6
-	const struct ip6_hdr *ip6;
-	uint32_t flow;
-#endif
 	union {
 #ifdef INET
 		struct ip ip;
@@ -113,47 +85,57 @@ mlx4_en_hashmbuf(uint32_t flags, struct mbuf *m, uint32_t key)
 		struct ether_vlan_header vlan;
 		uint32_t port;
 	} buf;
+	struct ether_header *eh;
+	const struct ether_vlan_header *vlan;
+#ifdef INET
+	const struct ip *ip;
+#endif
+#ifdef INET6
+	const struct ip6_hdr *ip6;
+#endif
+	uint32_t p;
+	int off;
+	uint16_t etype;
 
-
+	p = key;
 	off = sizeof(*eh);
 	if (m->m_len < off)
-		goto out;
+		goto done;
 	eh = mtod(m, struct ether_header *);
 	etype = ntohs(eh->ether_type);
-	if (flags & MLX4_F_HASHL2) {
-		p = hash32_buf(&eh->ether_shost, ETHER_ADDR_LEN, p);
-		p = hash32_buf(&eh->ether_dhost, ETHER_ADDR_LEN, p);
+	if (flags & MBUF_HASHFLAG_L2) {
+		p = fnv_32_buf(&eh->ether_shost, ETHER_ADDR_LEN, p);
+		p = fnv_32_buf(&eh->ether_dhost, ETHER_ADDR_LEN, p);
 	}
-
 	/* Special handling for encapsulating VLAN frames */
-	if ((m->m_flags & M_VLANTAG) && (flags & MLX4_F_HASHL2)) {
-		p = hash32_buf(&m->m_pkthdr.ether_vtag,
+	if ((m->m_flags & M_VLANTAG) && (flags & MBUF_HASHFLAG_L2)) {
+		p = fnv_32_buf(&m->m_pkthdr.ether_vtag,
 		    sizeof(m->m_pkthdr.ether_vtag), p);
 	} else if (etype == ETHERTYPE_VLAN) {
-		vlan = mlx4_en_gethdr(m, off,  sizeof(*vlan), &buf);
+		vlan = m_ether_tcpip_hash_gethdr(m, off, sizeof(*vlan), &buf);
 		if (vlan == NULL)
-			goto out;
+			goto done;
 
-		if (flags & MLX4_F_HASHL2)
-			p = hash32_buf(&vlan->evl_tag, sizeof(vlan->evl_tag), p);
+		if (flags & MBUF_HASHFLAG_L2)
+			p = fnv_32_buf(&vlan->evl_tag, sizeof(vlan->evl_tag), p);
 		etype = ntohs(vlan->evl_proto);
 		off += sizeof(*vlan) - sizeof(*eh);
 	}
-
 	switch (etype) {
 #ifdef INET
 	case ETHERTYPE_IP:
-		ip = mlx4_en_gethdr(m, off, sizeof(*ip), &buf);
+		ip = m_ether_tcpip_hash_gethdr(m, off, sizeof(*ip), &buf);
 		if (ip == NULL)
-			goto out;
-
-		if (flags & MLX4_F_HASHL3) {
-			p = hash32_buf(&ip->ip_src, sizeof(struct in_addr), p);
-			p = hash32_buf(&ip->ip_dst, sizeof(struct in_addr), p);
-		}
-		if (!(flags & MLX4_F_HASHL4))
 			break;
-		switch (ip->ip_p) {
+		if (flags & MBUF_HASHFLAG_L3) {
+			p = fnv_32_buf(&ip->ip_src, sizeof(struct in_addr), p);
+			p = fnv_32_buf(&ip->ip_dst, sizeof(struct in_addr), p);
+		}
+		if (flags & MBUF_HASHFLAG_L4) {
+			const uint32_t *ports;
+			int iphlen;
+
+			switch (ip->ip_p) {
 			case IPPROTO_TCP:
 			case IPPROTO_UDP:
 			case IPPROTO_SCTP:
@@ -161,29 +143,39 @@ mlx4_en_hashmbuf(uint32_t flags, struct mbuf *m, uint32_t key)
 				if (iphlen < sizeof(*ip))
 					break;
 				off += iphlen;
-				ports = mlx4_en_gethdr(m, off, sizeof(*ports), &buf);
+				ports = m_ether_tcpip_hash_gethdr(m,
+				    off, sizeof(*ports), &buf);
 				if (ports == NULL)
 					break;
-				p = hash32_buf(ports, sizeof(*ports), p);
+				p = fnv_32_buf(ports, sizeof(*ports), p);
 				break;
+			default:
+				break;
+			}
 		}
 		break;
 #endif
 #ifdef INET6
 	case ETHERTYPE_IPV6:
-		if (!(flags & MLX4_F_HASHL3))
-			break;
-		ip6 = mlx4_en_gethdr(m, off, sizeof(*ip6), &buf);
+		ip6 = m_ether_tcpip_hash_gethdr(m, off, sizeof(*ip6), &buf);
 		if (ip6 == NULL)
-			goto out;
+			break;
+		if (flags & MBUF_HASHFLAG_L3) {
+			p = fnv_32_buf(&ip6->ip6_src, sizeof(struct in6_addr), p);
+			p = fnv_32_buf(&ip6->ip6_dst, sizeof(struct in6_addr), p);
+		}
+		if (flags & MBUF_HASHFLAG_L4) {
+			uint32_t flow;
 
-		p = hash32_buf(&ip6->ip6_src, sizeof(struct in6_addr), p);
-		p = hash32_buf(&ip6->ip6_dst, sizeof(struct in6_addr), p);
-		flow = ip6->ip6_flow & IPV6_FLOWLABEL_MASK;
-		p = hash32_buf(&flow, sizeof(flow), p);	/* IPv6 flow label */
+			/* IPv6 flow label */
+			flow = ip6->ip6_flow & IPV6_FLOWLABEL_MASK;
+			p = fnv_32_buf(&flow, sizeof(flow), p);
+		}
 		break;
 #endif
+	default:
+		break;
 	}
-out:
+done:
 	return (p);
 }
diff --git a/sys/mips/atheros/if_arge.c b/sys/mips/atheros/if_arge.c
index 1db0e3289da..ffbe2d3cc10 100644
--- a/sys/mips/atheros/if_arge.c
+++ b/sys/mips/atheros/if_arge.c
@@ -304,6 +304,8 @@ arge_reset_mac(struct arge_softc *sc)
 	uint32_t reg;
 	uint32_t reset_reg;
 
+	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s called\n", __func__);
+
 	/* Step 1. Soft-reset MAC */
 	ARGE_SET_BITS(sc, AR71XX_MAC_CFG1, MAC_CFG1_SOFT_RESET);
 	DELAY(20);
@@ -649,8 +651,7 @@ arge_attach(device_t dev)
 	}
 
 	/*
-	 *  Get default media & duplex mode, by default its Base100T
-	 *  and full duplex
+	 * Get default/hard-coded media & duplex mode.
 	 */
 	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
 	    "media", &hint) != 0)
@@ -658,8 +659,12 @@ arge_attach(device_t dev)
 
 	if (hint == 1000)
 		sc->arge_media_type = IFM_1000_T;
-	else
+	else if (hint == 100)
 		sc->arge_media_type = IFM_100_TX;
+	else if (hint == 10)
+		sc->arge_media_type = IFM_10_T;
+	else
+		sc->arge_media_type = 0;
 
 	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
 	    "fduplex", &hint) != 0)
@@ -847,9 +852,10 @@ arge_attach(device_t dev)
 			}
 		}
 	}
+
 	if (sc->arge_miibus == NULL) {
 		/* no PHY, so use hard-coded values */
-		ifmedia_init(&sc->arge_ifmedia, 0, 
+		ifmedia_init(&sc->arge_ifmedia, 0,
 		    arge_multiphy_mediachange,
 		    arge_multiphy_mediastatus);
 		ifmedia_add(&sc->arge_ifmedia,
@@ -1071,6 +1077,25 @@ arge_update_link_locked(struct arge_softc *sc)
 		return;
 	}
 
+	/*
+	 * If we have a static media type configured, then
+	 * use that.  Some PHY configurations (eg QCA955x -> AR8327)
+	 * use a static speed/duplex between the SoC and switch,
+	 * even though the front-facing PHY speed changes.
+	 */
+	if (sc->arge_media_type != 0) {
+		ARGEDEBUG(sc, ARGE_DBG_MII, "%s: fixed; media=%d, duplex=%d\n",
+		    __func__,
+		    sc->arge_media_type,
+		    sc->arge_duplex_mode);
+		if (mii->mii_media_status & IFM_ACTIVE) {
+			sc->arge_link_status = 1;
+		} else {
+			sc->arge_link_status = 0;
+		}
+		arge_set_pll(sc, sc->arge_media_type, sc->arge_duplex_mode);
+	}
+
 	if (mii->mii_media_status & IFM_ACTIVE) {
 
 		media = IFM_SUBTYPE(mii->mii_media_active);
@@ -1095,6 +1120,12 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex)
 	uint32_t		fifo_tx, pll;
 	int if_speed;
 
+	/*
+	 * XXX Verify - is this valid for all chips?
+	 * QCA955x (and likely some of the earlier chips!) define
+	 * this as nibble mode and byte mode, and those have to do
+	 * with the interface type (MII/SMII versus GMII/RGMII.)
+	 */
 	ARGEDEBUG(sc, ARGE_DBG_PLL, "set_pll(%04x, %s)\n", media,
 	    duplex == IFM_FDX ? "full" : "half");
 	cfg = ARGE_READ(sc, AR71XX_MAC_CFG2);
@@ -1199,6 +1230,9 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex)
 static void
 arge_reset_dma(struct arge_softc *sc)
 {
+
+	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: called\n", __func__);
+
 	ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, 0);
 	ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, 0);
 
@@ -1230,8 +1264,6 @@ arge_reset_dma(struct arge_softc *sc)
 	arge_flush_ddr(sc);
 }
 
-
-
 static void
 arge_init(void *xsc)
 {
diff --git a/sys/mips/conf/AP135.hints b/sys/mips/conf/AP135.hints
index 87074afefae..b1ea76a7dca 100644
--- a/sys/mips/conf/AP135.hints
+++ b/sys/mips/conf/AP135.hints
@@ -83,7 +83,11 @@ hint.arswitch.0.port.6.txpause=1
 hint.arswitch.0.port.6.rxpause=1
 
 # arge0 - hooked up to AR8327 GMAC6, RGMII
-hint.arge.0.phymask=0x0
+# set at 1000/full to the switch.
+# so, lock both sides of this connect up to 1000/full;
+# if_arge thus wont change the PLL configuration
+# upon a link status change.
+hint.arge.0.phymask=0x10
 hint.arge.0.miimode=3           # RGMII
 hint.arge.0.media=1000
 hint.arge.0.fduplex=1
diff --git a/sys/mips/conf/QCA955X_BASE b/sys/mips/conf/QCA955X_BASE
index 6ecb449bac5..93211c10b61 100644
--- a/sys/mips/conf/QCA955X_BASE
+++ b/sys/mips/conf/QCA955X_BASE
@@ -27,7 +27,7 @@ hints		"QCA955X_BASE.hints"
 
 makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
 # makeoptions	MODULES_OVERRIDE="random gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_ahb hwpmc"
-makeoptions	MODULES_OVERRIDE=""
+makeoptions	MODULES_OVERRIDE="if_vlan ipfw if_gre if_gif if_bridge bridgestp hwpmc"
 
 options 	DDB
 options 	KDB
diff --git a/sys/mips/conf/TL-WR1043NDv2 b/sys/mips/conf/TL-WR1043NDv2
new file mode 100644
index 00000000000..48fddf0bb73
--- /dev/null
+++ b/sys/mips/conf/TL-WR1043NDv2
@@ -0,0 +1,51 @@
+#
+# TP-Link TL-WR1043nd v2 - based on the AP135 reference design.
+#
+# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi,
+# 64MiB RAM and an AR8327 5-port gigabit ethernet switch.
+#
+# $FreeBSD$
+#
+
+# Include the default QCA955x parameters
+include         "QCA955X_BASE"
+
+ident           TL-WR1043NDv2
+
+# Override hints with board values
+hints           "TL-WR1043NDv2.hints"
+
+options         AR71XX_REALMEM=(64*1024*1024)
+
+# Options required for miiproxy and mdiobus
+options 	ARGE_MDIO	# Export an MDIO bus separate from arge
+device		miiproxy	# MDIO bus <-> MII PHY rendezvous
+
+device		etherswitch
+device		arswitch
+
+# read MSDOS formatted disks - USB
+options 	MSDOSFS
+
+# Enable the uboot environment stuff rather then the
+# redboot stuff.
+options 	AR71XX_ENV_UBOOT
+
+# uzip - to boot natively from flash
+device		geom_uncompress
+options 	GEOM_UNCOMPRESS
+
+# Used for the static uboot partition map
+device          geom_map
+
+# yes, this board has a PCI connected atheros device
+#device		ath_pci
+#options 	AR71XX_ATH_EEPROM
+#device		firmware		# Used by the above
+#options 	ATH_EEPROM_FIRMWARE
+
+# Boot off of the rootfs, as defined in the geom_map setup.
+options 	ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"
+
+# Default to accept
+options		IPFIREWALL_DEFAULT_TO_ACCEPT
diff --git a/sys/mips/conf/TL-WR1043NDv2.hints b/sys/mips/conf/TL-WR1043NDv2.hints
new file mode 100644
index 00000000000..b7e283118f3
--- /dev/null
+++ b/sys/mips/conf/TL-WR1043NDv2.hints
@@ -0,0 +1,149 @@
+# The TP-Link 1043NDv2 is based on the AP135 with a couple of minor
+# differences - well, besides having no 11ac.
+
+# $FreeBSD$
+
+# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
+hint.qca955x_gmac.0.gmac_cfg=0x1
+
+# mdiobus0 on arge0
+hint.argemdio.0.at="nexus0"
+hint.argemdio.0.maddr=0x19000000
+hint.argemdio.0.msize=0x1000
+hint.argemdio.0.order=0
+
+# mdiobus1 on arge1 - required to bring up arge1?
+hint.argemdio.1.at="nexus0"
+hint.argemdio.1.maddr=0x1a000000
+hint.argemdio.1.msize=0x1000
+hint.argemdio.1.order=0
+
+# AR8327 - connected via mdiobus0 on arge0
+hint.arswitch.0.at="mdio0"
+hint.arswitch.0.is_7240=0	# definitely not the internal switch!
+hint.arswitch.0.is_9340=0	# not the internal switch!
+hint.arswitch.0.numphys=5	# all ports are PHYs
+hint.arswitch.0.phy4cpu=0
+hint.arswitch.0.is_rgmii=0	# not needed
+hint.arswitch.0.is_gmii=0	# not needed
+
+# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
+# The current code only supports one CPU port.  So hm, what should
+# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?
+
+# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
+# That's currently supposed to be hooked up to CPU port 0.
+
+# Other AR8327 configuration parameters
+
+# AP136-020 parameters
+
+# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII
+
+# AR8327_PAD_MAC_SGMII
+hint.arswitch.0.pad.0.mode=3
+#hint.arswitch.0.pad.0.rxclk_delay_sel=0
+hint.arswitch.0.pad.0.sgmii_delay_en=1
+
+# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII
+
+# AR8327_PAD_MAC_RGMII
+hint.arswitch.0.pad.6.mode=6
+hint.arswitch.0.pad.6.txclk_delay_en=1
+hint.arswitch.0.pad.6.rxclk_delay_en=1
+# AR8327_CLK_DELAY_SEL1
+hint.arswitch.0.pad.6.txclk_delay_sel=1
+# AR8327_CLK_DELAY_SEL2
+hint.arswitch.0.pad.6.rxclk_delay_sel=2
+
+hint.arswitch.0.led.ctrl0=0xcc35cc35
+hint.arswitch.0.led.ctrl1=0xca35ca35
+hint.arswitch.0.led.ctrl2=0xc935c935
+hint.arswitch.0.led.ctrl3=0x03ffff00
+int.arswitch.0.led.open_drain=1
+
+# force_link=1 is required for the rest of the parameters
+# to be configured.
+hint.arswitch.0.port.0.force_link=1
+hint.arswitch.0.port.0.speed=1000
+hint.arswitch.0.port.0.duplex=1
+hint.arswitch.0.port.0.txpause=1
+hint.arswitch.0.port.0.rxpause=1
+
+# force_link=1 is required for the rest of the parameters
+# to be configured.
+hint.arswitch.0.port.6.force_link=1
+hint.arswitch.0.port.6.speed=1000
+hint.arswitch.0.port.6.duplex=1
+hint.arswitch.0.port.6.txpause=1
+hint.arswitch.0.port.6.rxpause=1
+
+# arge0 - hooked up to AR8327 GMAC6, RGMII
+# set at 1000/full to the switch.
+# so, lock both sides of this connect up to 1000/full;
+# if_arge thus wont change the PLL configuration
+# upon a link status change.
+hint.arge.0.phymask=0x0
+hint.arge.0.miimode=3           # RGMII
+hint.arge.0.media=1000
+hint.arge.0.fduplex=1
+hint.arge.0.pll_1000=0x56000000
+
+hint.arge.0.eeprommac=0x1f01fc00
+
+# arge1 - lock up to 1000/full
+hint.arge.1.phymask=0x0
+hint.arge.1.media=1000
+hint.arge.1.fduplex=1
+hint.arge.1.miimode=5		# SGMII
+hint.arge.1.pll_1000=0x03000101
+
+# hint.arge.1.eeprommac=0x1f01fc06
+
+# ath0: Where the ART is - last 64k in the flash
+hint.ath.0.eepromaddr=0x1fff0000
+hint.ath.0.eepromsize=16384
+
+# 128 KiB u-boot
+hint.map.0.at="flash/spi0"
+hint.map.0.start=0x00000000
+hint.map.0.end=0x00020000	# 128k u-boot
+hint.map.0.name="u-boot"
+hint.map.0.readonly=1
+
+# The TP-Link firmware will put the kernel first (variable size);
+# then the rootfs will be placed hopefully at a 64KiB alignment
+# by whatever calls mktplinkfw.
+
+hint.map.1.at="flash/spi0"
+hint.map.1.start=0x00020000
+hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh"
+hint.map.1.name="kernel"
+hint.map.1.readonly=1
+
+hint.map.2.at="flash/spi0"
+hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh"
+hint.map.2.end=0x007d0000
+hint.map.2.name="rootfs"
+hint.map.2.readonly=1
+
+# 64KiB cfg
+hint.map.3.at="flash/spi0"
+hint.map.3.start=0x007d0000
+hint.map.3.end=0x007e0000
+hint.map.3.name="cfg"
+hint.map.3.readonly=0
+
+# 64KiB mib0
+hint.map.4.at="flash/spi0"
+hint.map.4.start=0x007e0000
+hint.map.4.end=0x007f0000
+hint.map.4.name="mib0"
+hint.map.4.readonly=1
+
+# 64KiB ART
+hint.map.5.at="flash/spi0"
+hint.map.5.start=0x007f0000
+hint.map.5.end=0x00800000	# 64k ART
+hint.map.5.name="ART"
+hint.map.5.readonly=1
diff --git a/sys/mips/nlm/cms.c b/sys/mips/nlm/cms.c
index 2e363a7c660..a4b724489db 100644
--- a/sys/mips/nlm/cms.c
+++ b/sys/mips/nlm/cms.c
@@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/proc.h>
 #include <sys/limits.h>
 #include <sys/bus.h>
+#include <sys/sbuf.h>
 
 #include <sys/ktr.h>
 #include <sys/kernel.h>
@@ -473,27 +474,22 @@ SYSINIT(start_msgring_threads, SI_SUB_SMP, SI_ORDER_MIDDLE,
 static int
 sys_print_debug(SYSCTL_HANDLER_ARGS)
 {
-	int error, nb, i, fs;
-	static char xprintb[4096], *buf;
+	struct sbuf sb;
+	int error, i;
 
-	buf = xprintb;
-	fs = sizeof(xprintb);
-	nb = snprintf(buf, fs,
+	sbuf_new_for_sysctl(&sb, NULL, 64, req);
+	sbuf_printf(&sb, 
 	    "\nID     vc0       vc1       vc2     vc3     loops\n");
-	buf += nb;
-	fs -= nb;
 	for (i = 0; i < 32; i++) {
 		if ((xlp_hw_thread_mask & (1 << i)) == 0)
 			continue;
-		nb = snprintf(buf, fs,
-		    "%2d: %8d %8d %8d %8d %8d\n", i,
+		sbuf_printf(&sb, "%2d: %8d %8d %8d %8d %8d\n", i,
 		    fmn_msgcount[i][0], fmn_msgcount[i][1],
 		    fmn_msgcount[i][2], fmn_msgcount[i][3],
 		    fmn_loops[i]);
-		buf += nb;
-		fs -= nb;
 	}
-	error = SYSCTL_OUT(req, xprintb, buf - xprintb);
+	error = sbuf_finish(&sb);
+	sbuf_delete(&sb);
 	return (error);
 }
 
diff --git a/sys/mips/rmi/dev/iic/at24co2n.c b/sys/mips/rmi/dev/iic/at24co2n.c
index 19b97388faa..48f1880d8fa 100644
--- a/sys/mips/rmi/dev/iic/at24co2n.c
+++ b/sys/mips/rmi/dev/iic/at24co2n.c
@@ -84,7 +84,7 @@ at24co2n_mac_sysctl(SYSCTL_HANDLER_ARGS)
 	p = sc->sc_mac_addr;
 	len = snprintf(buf, sizeof(buf), "%02x:%02x:%02x:%02x:%02x:%02x",
 	    p[0], p[1], p[2], p[3], p[4], p[5]);
-	return SYSCTL_OUT(req, buf, len);
+	return SYSCTL_OUT_STR(req, buf);
 }
 
 
diff --git a/sys/mips/rmi/fmn.c b/sys/mips/rmi/fmn.c
index 9a6c4867078..4c0d5df7990 100644
--- a/sys/mips/rmi/fmn.c
+++ b/sys/mips/rmi/fmn.c
@@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/proc.h>
 #include <sys/limits.h>
 #include <sys/bus.h>
+#include <sys/sbuf.h>
 
 #include <sys/ktr.h>
 #include <sys/kernel.h>
@@ -468,27 +469,22 @@ SYSINIT(start_msgring_threads, SI_SUB_SMP, SI_ORDER_MIDDLE,
 static int
 sys_print_debug(SYSCTL_HANDLER_ARGS)
 {
-	int error, nb, i, fs;
-	static char xprintb[4096], *buf;
+	struct sbuf sb;
+	int error, i;
 
-	buf = xprintb;
-	fs = sizeof(xprintb);
-	nb = snprintf(buf, fs,
+	sbuf_new_for_sysctl(&sb, NULL, 64, req);
+	sbuf_printf(&sb, 
 	    "\nID      INTR   ER   WU-SLP   WU-ERR     MSGS\n");
-	buf += nb;
-	fs -= nb;
 	for (i = 0; i < 32; i++) {
 		if ((xlr_hw_thread_mask & (1 << i)) == 0)
 			continue;
-		nb = snprintf(buf, fs,
-		    "%2d: %8d %4d %8d %8d %8d\n", i,
+		sbuf_printf(&sb, "%2d: %8d %4d %8d %8d %8d\n", i,
 		    msgring_nintr[i/4], msgring_badintr[i/4],
 		    msgring_wakeup_sleep[i], msgring_wakeup_nosleep[i],
 		    msgring_nmsgs[i]);
-		buf += nb;
-		fs -= nb;
 	} 
-	error = SYSCTL_OUT(req, xprintb, buf - xprintb);
+	error = sbuf_finish(&sb);
+	sbuf_delete(&sb);
 	return (error);
 }
 
diff --git a/sys/modules/Makefile b/sys/modules/Makefile
index f4348b88098..96148e4ab0a 100644
--- a/sys/modules/Makefile
+++ b/sys/modules/Makefile
@@ -353,6 +353,7 @@ SUBDIR=	\
 	${_virtio} \
 	vge \
 	${_viawd} \
+	videomode \
 	vkbd \
 	${_vmm} \
 	${_vmware} \
diff --git a/sys/modules/dtb/am335x/Makefile b/sys/modules/dtb/am335x/Makefile
new file mode 100644
index 00000000000..d149c95fc54
--- /dev/null
+++ b/sys/modules/dtb/am335x/Makefile
@@ -0,0 +1,7 @@
+# $FreeBSD$
+# All the dts files for am335x systems we support.
+DTS=	\
+	beaglebone.dts \
+        beaglebone-black.dts
+
+.include <bsd.dtb.mk>
diff --git a/sys/modules/dtrace/dtraceall/dtraceall.c b/sys/modules/dtrace/dtraceall/dtraceall.c
index 734abc6bf5c..e06a4826f9b 100644
--- a/sys/modules/dtrace/dtraceall/dtraceall.c
+++ b/sys/modules/dtrace/dtraceall/dtraceall.c
@@ -69,7 +69,7 @@ MODULE_DEPEND(dtraceall, dtmalloc, 1, 1, 1);
 #if defined(NFSCL)
 MODULE_DEPEND(dtraceall, dtnfscl, 1, 1, 1);
 #endif
-#if defined(__amd64__) || defined(__i386__) || defined(__powerpc__)
+#if defined(__amd64__) || defined(__i386__) || defined(__powerpc__) || defined(__arm__)
 MODULE_DEPEND(dtraceall, fbt, 1, 1, 1);
 #endif
 #if defined(__amd64__) || defined(__i386__)
diff --git a/sys/modules/mlxen/Makefile b/sys/modules/mlxen/Makefile
index 02f777659fc..02cca400f74 100644
--- a/sys/modules/mlxen/Makefile
+++ b/sys/modules/mlxen/Makefile
@@ -4,7 +4,7 @@
 KMOD    = mlxen
 SRCS    = device_if.h bus_if.h pci_if.h vnode_if.h
 SRCS	+= en_cq.c en_main.c en_netdev.c en_port.c en_resources.c
-SRCS	+= en_rx.c en_tx.c utils.c
+SRCS	+= en_rx.c en_tx.c
 SRCS	+= opt_inet.h opt_inet6.h
 CFLAGS+= -I${.CURDIR}/../../ofed/drivers/net/mlx4
 CFLAGS+= -I${.CURDIR}/../../ofed/include/
diff --git a/sys/modules/vmm/Makefile b/sys/modules/vmm/Makefile
index e81c2438b35..d94ceba7e2f 100644
--- a/sys/modules/vmm/Makefile
+++ b/sys/modules/vmm/Makefile
@@ -19,13 +19,11 @@ SRCS+=	vmm.c		\
 	vmm_host.c	\
 	vmm_instruction_emul.c	\
 	vmm_ioport.c	\
-	vmm_ipi.c	\
 	vmm_lapic.c	\
 	vmm_mem.c	\
 	vmm_stat.c	\
 	vmm_util.c	\
-	x86.c		\
-	vmm_support.S
+	x86.c
 
 .PATH: ${.CURDIR}/../../amd64/vmm/io
 SRCS+=	iommu.c		\
diff --git a/sys/net/ieee8023ad_lacp.c b/sys/net/ieee8023ad_lacp.c
index 3052e4b526e..c422c25201a 100644
--- a/sys/net/ieee8023ad_lacp.c
+++ b/sys/net/ieee8023ad_lacp.c
@@ -35,7 +35,6 @@ __FBSDID("$FreeBSD$");
 #include <sys/eventhandler.h>
 #include <sys/mbuf.h>
 #include <sys/systm.h>
-#include <sys/fnv_hash.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h> /* hz */
 #include <sys/socket.h> /* for net/if.h */
@@ -758,16 +757,13 @@ void
 lacp_attach(struct lagg_softc *sc)
 {
 	struct lacp_softc *lsc;
-	uint32_t seed;
 
 	lsc = malloc(sizeof(struct lacp_softc), M_DEVBUF, M_WAITOK | M_ZERO);
 
 	sc->sc_psc = lsc;
 	lsc->lsc_softc = sc;
 
-	seed = arc4random();
-	lsc->lsc_hashkey = FNV1_32_INIT;
-	lsc->lsc_hashkey = fnv_32_buf(&seed, sizeof(seed), lsc->lsc_hashkey);
+	lsc->lsc_hashkey = m_ether_tcpip_hash_init();
 	lsc->lsc_active_aggregator = NULL;
 	lsc->lsc_strict_mode = 1;
 	LACP_LOCK_INIT(lsc);
@@ -843,7 +839,7 @@ lacp_select_tx_port(struct lagg_softc *sc, struct mbuf *m)
 	    M_HASHTYPE_GET(m) != M_HASHTYPE_NONE)
 		hash = m->m_pkthdr.flowid >> sc->flowid_shift;
 	else
-		hash = lagg_hashmbuf(sc, m, lsc->lsc_hashkey);
+		hash = m_ether_tcpip_hash(sc->sc_flags, m, lsc->lsc_hashkey);
 	hash %= pm->pm_count;
 	lp = pm->pm_map[hash];
 
diff --git a/sys/net/if.c b/sys/net/if.c
index 0c8d90223ba..9d56803863e 100644
--- a/sys/net/if.c
+++ b/sys/net/if.c
@@ -160,6 +160,7 @@ static void	if_attachdomain1(struct ifnet *);
 static int	ifconf(u_long, caddr_t);
 static void	if_freemulti(struct ifmultiaddr *);
 static void	if_grow(void);
+static void	if_input_default(struct ifnet *, struct mbuf *);
 static void	if_route(struct ifnet *, int flag, int fam);
 static int	if_setflag(struct ifnet *, int, int, int *, int);
 static int	if_transmit(struct ifnet *ifp, struct mbuf *m);
@@ -665,6 +666,8 @@ if_attach_internal(struct ifnet *ifp, int vmove, struct if_clone *ifc)
 		ifp->if_transmit = if_transmit;
 		ifp->if_qflush = if_qflush;
 	}
+	if (ifp->if_input == NULL)
+		ifp->if_input = if_input_default;
 
 	if (!vmove) {
 #ifdef MAC
@@ -3516,6 +3519,13 @@ if_transmit(struct ifnet *ifp, struct mbuf *m)
 	return (error);
 }
 
+static void
+if_input_default(struct ifnet *ifp __unused, struct mbuf *m)
+{
+
+	m_freem(m);
+}
+
 int
 if_handoff(struct ifqueue *ifq, struct mbuf *m, struct ifnet *ifp, int adjust)
 {
diff --git a/sys/net/if_lagg.c b/sys/net/if_lagg.c
index ec828fa8a94..46c5858069b 100644
--- a/sys/net/if_lagg.c
+++ b/sys/net/if_lagg.c
@@ -36,7 +36,6 @@ __FBSDID("$FreeBSD$");
 #include <sys/priv.h>
 #include <sys/systm.h>
 #include <sys/proc.h>
-#include <sys/fnv_hash.h>
 #include <sys/lock.h>
 #include <sys/rmlock.h>
 #include <sys/taskqueue.h>
@@ -131,7 +130,6 @@ static int	lagg_media_change(struct ifnet *);
 static void	lagg_media_status(struct ifnet *, struct ifmediareq *);
 static struct lagg_port *lagg_link_active(struct lagg_softc *,
 	    struct lagg_port *);
-static const void *lagg_gethdr(struct mbuf *, u_int, u_int, void *);
 
 /* Simple round robin */
 static void	lagg_rr_attach(struct lagg_softc *);
@@ -490,7 +488,7 @@ lagg_clone_create(struct if_clone *ifc, int unit, caddr_t params)
 	sc->flowid_shift = V_def_flowid_shift;
 
 	/* Hash all layers by default */
-	sc->sc_flags = LAGG_F_HASHL2|LAGG_F_HASHL3|LAGG_F_HASHL4;
+	sc->sc_flags = MBUF_HASHFLAG_L2|MBUF_HASHFLAG_L3|MBUF_HASHFLAG_L4;
 
 	lagg_proto_attach(sc, LAGG_PROTO_DEFAULT);
 
@@ -1349,7 +1347,15 @@ lagg_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 		LAGG_WUNLOCK(sc);
 		break;
 	case SIOCGLAGGFLAGS:
-		rf->rf_flags = sc->sc_flags;
+		rf->rf_flags = 0;
+		LAGG_RLOCK(sc, &tracker);
+		if (sc->sc_flags & MBUF_HASHFLAG_L2)
+			rf->rf_flags |= LAGG_F_HASHL2;
+		if (sc->sc_flags & MBUF_HASHFLAG_L3)
+			rf->rf_flags |= LAGG_F_HASHL3;
+		if (sc->sc_flags & MBUF_HASHFLAG_L4)
+			rf->rf_flags |= LAGG_F_HASHL4;
+		LAGG_RUNLOCK(sc, &tracker);
 		break;
 	case SIOCSLAGGHASH:
 		error = priv_check(td, PRIV_NET_LAGG);
@@ -1360,8 +1366,13 @@ lagg_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 			break;
 		}
 		LAGG_WLOCK(sc);
-		sc->sc_flags &= ~LAGG_F_HASHMASK;
-		sc->sc_flags |= rf->rf_flags & LAGG_F_HASHMASK;
+		sc->sc_flags = 0;
+		if (rf->rf_flags & LAGG_F_HASHL2)
+			sc->sc_flags |= MBUF_HASHFLAG_L2;
+		if (rf->rf_flags & LAGG_F_HASHL3)
+			sc->sc_flags |= MBUF_HASHFLAG_L3;
+		if (rf->rf_flags & LAGG_F_HASHL4)
+			sc->sc_flags |= MBUF_HASHFLAG_L4;
 		LAGG_WUNLOCK(sc);
 		break;
 	case SIOCGLAGGPORT:
@@ -1806,120 +1817,6 @@ lagg_link_active(struct lagg_softc *sc, struct lagg_port *lp)
 	return (rval);
 }
 
-static const void *
-lagg_gethdr(struct mbuf *m, u_int off, u_int len, void *buf)
-{
-	if (m->m_pkthdr.len < (off + len)) {
-		return (NULL);
-	} else if (m->m_len < (off + len)) {
-		m_copydata(m, off, len, buf);
-		return (buf);
-	}
-	return (mtod(m, char *) + off);
-}
-
-uint32_t
-lagg_hashmbuf(struct lagg_softc *sc, struct mbuf *m, uint32_t key)
-{
-	uint16_t etype;
-	uint32_t p = key;
-	int off;
-	struct ether_header *eh;
-	const struct ether_vlan_header *vlan;
-#ifdef INET
-	const struct ip *ip;
-	const uint32_t *ports;
-	int iphlen;
-#endif
-#ifdef INET6
-	const struct ip6_hdr *ip6;
-	uint32_t flow;
-#endif
-	union {
-#ifdef INET
-		struct ip ip;
-#endif
-#ifdef INET6
-		struct ip6_hdr ip6;
-#endif
-		struct ether_vlan_header vlan;
-		uint32_t port;
-	} buf;
-
-
-	off = sizeof(*eh);
-	if (m->m_len < off)
-		goto out;
-	eh = mtod(m, struct ether_header *);
-	etype = ntohs(eh->ether_type);
-	if (sc->sc_flags & LAGG_F_HASHL2) {
-		p = fnv_32_buf(&eh->ether_shost, ETHER_ADDR_LEN, p);
-		p = fnv_32_buf(&eh->ether_dhost, ETHER_ADDR_LEN, p);
-	}
-
-	/* Special handling for encapsulating VLAN frames */
-	if ((m->m_flags & M_VLANTAG) && (sc->sc_flags & LAGG_F_HASHL2)) {
-		p = fnv_32_buf(&m->m_pkthdr.ether_vtag,
-		    sizeof(m->m_pkthdr.ether_vtag), p);
-	} else if (etype == ETHERTYPE_VLAN) {
-		vlan = lagg_gethdr(m, off,  sizeof(*vlan), &buf);
-		if (vlan == NULL)
-			goto out;
-
-		if (sc->sc_flags & LAGG_F_HASHL2)
-			p = fnv_32_buf(&vlan->evl_tag, sizeof(vlan->evl_tag), p);
-		etype = ntohs(vlan->evl_proto);
-		off += sizeof(*vlan) - sizeof(*eh);
-	}
-
-	switch (etype) {
-#ifdef INET
-	case ETHERTYPE_IP:
-		ip = lagg_gethdr(m, off, sizeof(*ip), &buf);
-		if (ip == NULL)
-			goto out;
-
-		if (sc->sc_flags & LAGG_F_HASHL3) {
-			p = fnv_32_buf(&ip->ip_src, sizeof(struct in_addr), p);
-			p = fnv_32_buf(&ip->ip_dst, sizeof(struct in_addr), p);
-		}
-		if (!(sc->sc_flags & LAGG_F_HASHL4))
-			break;
-		switch (ip->ip_p) {
-			case IPPROTO_TCP:
-			case IPPROTO_UDP:
-			case IPPROTO_SCTP:
-				iphlen = ip->ip_hl << 2;
-				if (iphlen < sizeof(*ip))
-					break;
-				off += iphlen;
-				ports = lagg_gethdr(m, off, sizeof(*ports), &buf);
-				if (ports == NULL)
-					break;
-				p = fnv_32_buf(ports, sizeof(*ports), p);
-				break;
-		}
-		break;
-#endif
-#ifdef INET6
-	case ETHERTYPE_IPV6:
-		if (!(sc->sc_flags & LAGG_F_HASHL3))
-			break;
-		ip6 = lagg_gethdr(m, off, sizeof(*ip6), &buf);
-		if (ip6 == NULL)
-			goto out;
-
-		p = fnv_32_buf(&ip6->ip6_src, sizeof(struct in6_addr), p);
-		p = fnv_32_buf(&ip6->ip6_dst, sizeof(struct in6_addr), p);
-		flow = ip6->ip6_flow & IPV6_FLOWLABEL_MASK;
-		p = fnv_32_buf(&flow, sizeof(flow), p);	/* IPv6 flow label */
-		break;
-#endif
-	}
-out:
-	return (p);
-}
-
 int
 lagg_enqueue(struct ifnet *ifp, struct mbuf *m)
 {
@@ -2087,15 +1984,12 @@ lagg_lb_attach(struct lagg_softc *sc)
 {
 	struct lagg_port *lp;
 	struct lagg_lb *lb;
-	uint32_t seed;
 
 	lb = malloc(sizeof(struct lagg_lb), M_DEVBUF, M_WAITOK | M_ZERO);
 
 	sc->sc_capabilities = IFCAP_LAGG_FULLDUPLEX;
 
-	seed = arc4random();
-	lb->lb_key = FNV1_32_INIT;
-	lb->lb_key = fnv_32_buf(&seed, sizeof(seed), lb->lb_key);
+	lb->lb_key = m_ether_tcpip_hash_init();
 	sc->sc_psc = lb;
 
 	SLIST_FOREACH(lp, &sc->sc_ports, lp_entries)
@@ -2160,7 +2054,7 @@ lagg_lb_start(struct lagg_softc *sc, struct mbuf *m)
 	    M_HASHTYPE_GET(m) != M_HASHTYPE_NONE)
 		p = m->m_pkthdr.flowid >> sc->flowid_shift;
 	else
-		p = lagg_hashmbuf(sc, m, lb->lb_key);
+		p = m_ether_tcpip_hash(sc->sc_flags, m, lb->lb_key);
 	p %= sc->sc_count;
 	lp = lb->lb_ports[p];
 
diff --git a/sys/net/if_lagg.h b/sys/net/if_lagg.h
index 8d6decd3c06..a45fa169939 100644
--- a/sys/net/if_lagg.h
+++ b/sys/net/if_lagg.h
@@ -279,7 +279,6 @@ extern struct mbuf *(*lagg_input_p)(struct ifnet *, struct mbuf *);
 extern void	(*lagg_linkstate_p)(struct ifnet *, int );
 
 int		lagg_enqueue(struct ifnet *, struct mbuf *);
-uint32_t	lagg_hashmbuf(struct lagg_softc *, struct mbuf *, uint32_t);
 
 SYSCTL_DECL(_net_link_lagg);
 
diff --git a/sys/net/zlib.h b/sys/net/zlib.h
index 04941df360b..16edae12b6f 100644
--- a/sys/net/zlib.h
+++ b/sys/net/zlib.h
@@ -1010,13 +1010,6 @@ extern int EXPORT inflateInit2_ OF((z_streamp strm, int  windowBits,
 
 uLongf *get_crc_table OF((void)); /* can be used by asm versions of crc32() */
 
-#ifdef _KERNEL
-struct vnode;
-extern gzFile gz_open     OF((const char *path, const char *mode,
-	                              struct vnode *vp));
-#endif
-
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/sys/net80211/ieee80211_freebsd.c b/sys/net80211/ieee80211_freebsd.c
index 87cda607983..a292619780f 100644
--- a/sys/net80211/ieee80211_freebsd.c
+++ b/sys/net80211/ieee80211_freebsd.c
@@ -209,7 +209,7 @@ ieee80211_sysctl_parent(SYSCTL_HANDLER_ARGS)
 	struct ieee80211com *ic = arg1;
 	const char *name = ic->ic_ifp->if_xname;
 
-	return SYSCTL_OUT(req, name, strlen(name));
+	return SYSCTL_OUT_STR(req, name);
 }
 
 static int
diff --git a/sys/netinet/if_ether.c b/sys/netinet/if_ether.c
index 78ec2f40f78..fec6aa0777a 100644
--- a/sys/netinet/if_ether.c
+++ b/sys/netinet/if_ether.c
@@ -149,10 +149,10 @@ arp_ifscrub(struct ifnet *ifp, uint32_t addr)
 	addr4.sin_len    = sizeof(addr4);
 	addr4.sin_family = AF_INET;
 	addr4.sin_addr.s_addr = addr;
-	IF_AFDATA_RLOCK(ifp);
+	IF_AFDATA_WLOCK(ifp);
 	lla_lookup(LLTABLE(ifp), (LLE_DELETE | LLE_IFADDR),
 	    (struct sockaddr *)&addr4);
-	IF_AFDATA_RUNLOCK(ifp);
+	IF_AFDATA_WUNLOCK(ifp);
 }
 #endif
 
diff --git a/sys/netinet/ip_fw.h b/sys/netinet/ip_fw.h
index ab9ec63e626..9c53793126f 100644
--- a/sys/netinet/ip_fw.h
+++ b/sys/netinet/ip_fw.h
@@ -721,7 +721,7 @@ struct _ipfw_dyn_rule {
 #define	IPFW_VTYPE_TAG		0x00000020	/* tag/untag */
 #define	IPFW_VTYPE_DIVERT	0x00000040	/* divert/tee */
 #define	IPFW_VTYPE_NETGRAPH	0x00000080	/* netgraph/ngtee */
-#define	IPFW_VTYPE_LIMIT	0x00000100	/* IPv6 nexthop */
+#define	IPFW_VTYPE_LIMIT	0x00000100	/* limit */
 #define	IPFW_VTYPE_NH4		0x00000200	/* IPv4 nexthop */
 #define	IPFW_VTYPE_NH6		0x00000400	/* IPv6 nexthop */
 
@@ -817,10 +817,11 @@ typedef struct _ipfw_table_value {
 	uint32_t	nat;		/* O_NAT */
 	uint32_t	nh4;
 	uint8_t		dscp;
-	uint8_t		spare0[3];
+	uint8_t		spare0;
+	uint16_t	spare1;
 	struct in6_addr	nh6;
 	uint32_t	limit;		/* O_LIMIT */
-	uint32_t	spare1;
+	uint32_t	zoneid;		/* scope zone id for nh6 */
 	uint64_t	reserved;
 } ipfw_table_value;
 
diff --git a/sys/netinet/sctp.h b/sys/netinet/sctp.h
index 9b795ede256..8a033d8187c 100644
--- a/sys/netinet/sctp.h
+++ b/sys/netinet/sctp.h
@@ -128,6 +128,7 @@ struct sctp_paramhdr {
 #define SCTP_RECONFIG_SUPPORTED         0x00000029
 #define SCTP_NRSACK_SUPPORTED           0x00000030
 #define SCTP_PKTDROP_SUPPORTED          0x00000031
+#define SCTP_MAX_CWND                   0x00000032
 
 /*
  * read-only options
diff --git a/sys/netinet/sctp_cc_functions.c b/sys/netinet/sctp_cc_functions.c
index e32faf95a0c..17a897b93d4 100644
--- a/sys/netinet/sctp_cc_functions.c
+++ b/sys/netinet/sctp_cc_functions.c
@@ -52,6 +52,19 @@ __FBSDID("$FreeBSD$");
 #define SHIFT_MPTCP_MULTI_Z 16
 #define SHIFT_MPTCP_MULTI 8
 
+static void
+sctp_enforce_cwnd_limit(struct sctp_association *assoc, struct sctp_nets *net)
+{
+	if ((assoc->max_cwnd > 0) &&
+	    (net->cwnd > assoc->max_cwnd) &&
+	    (net->cwnd > (net->mtu - sizeof(struct sctphdr)))) {
+		net->cwnd = assoc->max_cwnd;
+		if (net->cwnd < (net->mtu - sizeof(struct sctphdr))) {
+			net->cwnd = net->mtu - sizeof(struct sctphdr);
+		}
+	}
+}
+
 static void
 sctp_set_initial_cc_param(struct sctp_tcb *stcb, struct sctp_nets *net)
 {
@@ -80,6 +93,7 @@ sctp_set_initial_cc_param(struct sctp_tcb *stcb, struct sctp_nets *net)
 			net->cwnd = net->mtu - sizeof(struct sctphdr);
 		}
 	}
+	sctp_enforce_cwnd_limit(assoc, net);
 	net->ssthresh = assoc->peers_rwnd;
 	SDT_PROBE(sctp, cwnd, net, init,
 	    stcb->asoc.my_vtag, ((stcb->sctp_ep->sctp_lport << 16) | (stcb->rport)), net,
@@ -178,6 +192,7 @@ sctp_cwnd_update_after_fr(struct sctp_tcb *stcb,
 					}
 				}
 				net->cwnd = net->ssthresh;
+				sctp_enforce_cwnd_limit(asoc, net);
 				SDT_PROBE(sctp, cwnd, net, fr,
 				    stcb->asoc.my_vtag, ((stcb->sctp_ep->sctp_lport << 16) | (stcb->rport)), net,
 				    old_cwnd, net->cwnd);
@@ -426,6 +441,7 @@ cc_bw_decrease(struct sctp_tcb *stcb, struct sctp_nets *net, uint64_t nbw, uint6
 			if ((net->cc_mod.rtcc.vol_reduce) &&
 			    (inst_ind != SCTP_INST_GAINING)) {
 				net->cwnd += net->mtu;
+				sctp_enforce_cwnd_limit(&stcb->asoc, net);
 				net->cc_mod.rtcc.vol_reduce--;
 			}
 			net->cc_mod.rtcc.last_step_state = 2;
@@ -457,6 +473,7 @@ cc_bw_decrease(struct sctp_tcb *stcb, struct sctp_nets *net, uint64_t nbw, uint6
 			if ((net->cc_mod.rtcc.vol_reduce) &&
 			    (inst_ind != SCTP_INST_GAINING)) {
 				net->cwnd += net->mtu;
+				sctp_enforce_cwnd_limit(&stcb->asoc, net);
 				net->cc_mod.rtcc.vol_reduce--;
 			}
 			net->cc_mod.rtcc.last_step_state = 3;
@@ -488,6 +505,7 @@ cc_bw_decrease(struct sctp_tcb *stcb, struct sctp_nets *net, uint64_t nbw, uint6
 		if ((net->cc_mod.rtcc.vol_reduce) &&
 		    (inst_ind != SCTP_INST_GAINING)) {
 			net->cwnd += net->mtu;
+			sctp_enforce_cwnd_limit(&stcb->asoc, net);
 			net->cc_mod.rtcc.vol_reduce--;
 		}
 		net->cc_mod.rtcc.last_step_state = 4;
@@ -882,6 +900,7 @@ sctp_cwnd_update_after_sack_common(struct sctp_tcb *stcb,
 						break;
 					}
 					net->cwnd += incr;
+					sctp_enforce_cwnd_limit(asoc, net);
 					if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 						sctp_log_cwnd(stcb, net, incr,
 						    SCTP_CWND_LOG_FROM_SS);
@@ -948,6 +967,7 @@ sctp_cwnd_update_after_sack_common(struct sctp_tcb *stcb,
 						break;
 					}
 					net->cwnd += incr;
+					sctp_enforce_cwnd_limit(asoc, net);
 					SDT_PROBE(sctp, cwnd, net, ack,
 					    stcb->asoc.my_vtag,
 					    ((stcb->sctp_ep->sctp_lport << 16) | (stcb->rport)),
@@ -1227,6 +1247,7 @@ sctp_cwnd_update_after_packet_dropped(struct sctp_tcb *stcb,
 		/* We always have 1 MTU */
 		net->cwnd = net->mtu;
 	}
+	sctp_enforce_cwnd_limit(&stcb->asoc, net);
 	if (net->cwnd - old_cwnd != 0) {
 		/* log only changes */
 		SDT_PROBE(sctp, cwnd, net, pd,
@@ -1251,6 +1272,7 @@ sctp_cwnd_update_after_output(struct sctp_tcb *stcb,
 		net->ssthresh = net->cwnd;
 	if (burst_limit) {
 		net->cwnd = (net->flight_size + (burst_limit * net->mtu));
+		sctp_enforce_cwnd_limit(&stcb->asoc, net);
 		SDT_PROBE(sctp, cwnd, net, bl,
 		    stcb->asoc.my_vtag,
 		    ((stcb->sctp_ep->sctp_lport << 16) | (stcb->rport)),
@@ -1589,6 +1611,7 @@ static void
 sctp_hs_cwnd_increase(struct sctp_tcb *stcb, struct sctp_nets *net)
 {
 	int cur_val, i, indx, incr;
+	int old_cwnd = net->cwnd;
 
 	cur_val = net->cwnd >> 10;
 	indx = SCTP_HS_TABLE_SIZE - 1;
@@ -1597,14 +1620,8 @@ sctp_hs_cwnd_increase(struct sctp_tcb *stcb, struct sctp_nets *net)
 		/* normal mode */
 		if (net->net_ack > net->mtu) {
 			net->cwnd += net->mtu;
-			if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
-				sctp_log_cwnd(stcb, net, net->mtu, SCTP_CWND_LOG_FROM_SS);
-			}
 		} else {
 			net->cwnd += net->net_ack;
-			if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
-				sctp_log_cwnd(stcb, net, net->net_ack, SCTP_CWND_LOG_FROM_SS);
-			}
 		}
 	} else {
 		for (i = net->last_hs_used; i < SCTP_HS_TABLE_SIZE; i++) {
@@ -1616,9 +1633,10 @@ sctp_hs_cwnd_increase(struct sctp_tcb *stcb, struct sctp_nets *net)
 		net->last_hs_used = indx;
 		incr = ((sctp_cwnd_adjust[indx].increase) << 10);
 		net->cwnd += incr;
-		if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
-			sctp_log_cwnd(stcb, net, incr, SCTP_CWND_LOG_FROM_SS);
-		}
+	}
+	sctp_enforce_cwnd_limit(&stcb->asoc, net);
+	if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
+		sctp_log_cwnd(stcb, net, (net->cwnd - old_cwnd), SCTP_CWND_LOG_FROM_SS);
 	}
 }
 
@@ -1657,6 +1675,7 @@ sctp_hs_cwnd_decrease(struct sctp_tcb *stcb, struct sctp_nets *net)
 			net->last_hs_used = indx;
 		}
 	}
+	sctp_enforce_cwnd_limit(&stcb->asoc, net);
 	if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 		sctp_log_cwnd(stcb, net, (net->cwnd - old_cwnd), SCTP_CWND_LOG_FROM_FR);
 	}
@@ -1788,9 +1807,7 @@ sctp_hs_cwnd_update_after_sack(struct sctp_tcb *stcb,
 			if (net->cwnd <= net->ssthresh) {
 				/* We are in slow start */
 				if (net->flight_size + net->net_ack >= net->cwnd) {
-
 					sctp_hs_cwnd_increase(stcb, net);
-
 				} else {
 					if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_LOGGING_ENABLE) {
 						sctp_log_cwnd(stcb, net, net->net_ack,
@@ -1804,6 +1821,7 @@ sctp_hs_cwnd_update_after_sack(struct sctp_tcb *stcb,
 				    (net->partial_bytes_acked >= net->cwnd)) {
 					net->partial_bytes_acked -= net->cwnd;
 					net->cwnd += net->mtu;
+					sctp_enforce_cwnd_limit(asoc, net);
 					if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 						sctp_log_cwnd(stcb, net, net->mtu,
 						    SCTP_CWND_LOG_FROM_CA);
@@ -2042,6 +2060,7 @@ htcp_cong_avoid(struct sctp_tcb *stcb, struct sctp_nets *net)
 					    SCTP_CWND_LOG_FROM_SS);
 				}
 			}
+			sctp_enforce_cwnd_limit(&stcb->asoc, net);
 		} else {
 			if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_LOGGING_ENABLE) {
 				sctp_log_cwnd(stcb, net, net->net_ack,
@@ -2063,6 +2082,7 @@ htcp_cong_avoid(struct sctp_tcb *stcb, struct sctp_nets *net)
 			 */
 			net->cwnd += net->mtu;
 			net->partial_bytes_acked = 0;
+			sctp_enforce_cwnd_limit(&stcb->asoc, net);
 			htcp_alpha_update(&net->cc_mod.htcp_ca);
 			if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 				sctp_log_cwnd(stcb, net, net->mtu,
@@ -2109,6 +2129,7 @@ sctp_htcp_set_initial_cc_param(struct sctp_tcb *stcb, struct sctp_nets *net)
 	 */
 	net->cwnd = min((net->mtu * 4), max((2 * net->mtu), SCTP_INITIAL_CWND));
 	net->ssthresh = stcb->asoc.peers_rwnd;
+	sctp_enforce_cwnd_limit(&stcb->asoc, net);
 	htcp_init(net);
 
 	if (SCTP_BASE_SYSCTL(sctp_logging_level) & (SCTP_CWND_MONITOR_ENABLE | SCTP_CWND_LOGGING_ENABLE)) {
@@ -2212,6 +2233,7 @@ sctp_htcp_cwnd_update_after_fr(struct sctp_tcb *stcb,
 				htcp_reset(&net->cc_mod.htcp_ca);
 				net->ssthresh = htcp_recalc_ssthresh(net);
 				net->cwnd = net->ssthresh;
+				sctp_enforce_cwnd_limit(asoc, net);
 				if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 					sctp_log_cwnd(stcb, net, (net->cwnd - old_cwnd),
 					    SCTP_CWND_LOG_FROM_FR);
@@ -2291,6 +2313,7 @@ sctp_htcp_cwnd_update_after_ecn_echo(struct sctp_tcb *stcb,
 			net->RTO <<= 1;
 		}
 		net->cwnd = net->ssthresh;
+		sctp_enforce_cwnd_limit(&stcb->asoc, net);
 		if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_CWND_MONITOR_ENABLE) {
 			sctp_log_cwnd(stcb, net, (net->cwnd - old_cwnd), SCTP_CWND_LOG_FROM_SAT);
 		}
diff --git a/sys/netinet/sctp_input.c b/sys/netinet/sctp_input.c
index 44932e03912..4fab9866486 100644
--- a/sys/netinet/sctp_input.c
+++ b/sys/netinet/sctp_input.c
@@ -2763,6 +2763,7 @@ sctp_handle_cookie_echo(struct mbuf *m, int iphlen, int offset,
 			inp->sctp_mobility_features = (*inp_p)->sctp_mobility_features;
 			inp->sctp_socket = so;
 			inp->sctp_frag_point = (*inp_p)->sctp_frag_point;
+			inp->max_cwnd = (*inp_p)->max_cwnd;
 			inp->sctp_cmt_on_off = (*inp_p)->sctp_cmt_on_off;
 			inp->ecn_supported = (*inp_p)->ecn_supported;
 			inp->prsctp_supported = (*inp_p)->prsctp_supported;
diff --git a/sys/netinet/sctp_os_bsd.h b/sys/netinet/sctp_os_bsd.h
index 2468c8af009..140f34194de 100644
--- a/sys/netinet/sctp_os_bsd.h
+++ b/sys/netinet/sctp_os_bsd.h
@@ -389,8 +389,11 @@ typedef struct callout sctp_os_timer_t;
 #define SCTP_CLEAR_SO_NBIO(so)	((so)->so_state &= ~SS_NBIO)
 /* get the socket type */
 #define SCTP_SO_TYPE(so)	((so)->so_type)
-/* Use a macro for renaming sb_cc to sb_ccc */
-#define sb_cc sb_ccc
+/* Use a macro for renaming sb_cc to sb_acc.
+ * Initially sb_ccc was used, but this broke select() when used
+ * with SCTP sockets.
+ */
+#define sb_cc sb_acc
 /* reserve sb space for a socket */
 #define SCTP_SORESERVE(so, send, recv)	soreserve(so, send, recv)
 /* wakeup a socket */
diff --git a/sys/netinet/sctp_pcb.c b/sys/netinet/sctp_pcb.c
index 701a0c23f00..592cf2263c5 100644
--- a/sys/netinet/sctp_pcb.c
+++ b/sys/netinet/sctp_pcb.c
@@ -2474,6 +2474,7 @@ sctp_inpcb_alloc(struct socket *so, uint32_t vrf_id)
 	inp->sctp_associd_counter = 1;
 	inp->partial_delivery_point = SCTP_SB_LIMIT_RCV(so) >> SCTP_PARTIAL_DELIVERY_SHIFT;
 	inp->sctp_frag_point = SCTP_DEFAULT_MAXSEGMENT;
+	inp->max_cwnd = 0;
 	inp->sctp_cmt_on_off = SCTP_BASE_SYSCTL(sctp_cmt_on_off);
 	inp->ecn_supported = (uint8_t) SCTP_BASE_SYSCTL(sctp_ecn_enable);
 	inp->prsctp_supported = (uint8_t) SCTP_BASE_SYSCTL(sctp_pr_enable);
diff --git a/sys/netinet/sctp_pcb.h b/sys/netinet/sctp_pcb.h
index c9183b1d820..963b89fbcac 100644
--- a/sys/netinet/sctp_pcb.h
+++ b/sys/netinet/sctp_pcb.h
@@ -404,6 +404,7 @@ struct sctp_inpcb {
 	uint32_t sctp_frag_point;
 	uint32_t partial_delivery_point;
 	uint32_t sctp_context;
+	uint32_t max_cwnd;
 	uint8_t local_strreset_support;
 	uint32_t sctp_cmt_on_off;
 	uint8_t ecn_supported;
diff --git a/sys/netinet/sctp_peeloff.c b/sys/netinet/sctp_peeloff.c
index cf41d29f71c..b7024765a7c 100644
--- a/sys/netinet/sctp_peeloff.c
+++ b/sys/netinet/sctp_peeloff.c
@@ -127,6 +127,7 @@ sctp_do_peeloff(struct socket *head, struct socket *so, sctp_assoc_t assoc_id)
 	n_inp->pktdrop_supported = inp->pktdrop_supported;
 	n_inp->partial_delivery_point = inp->partial_delivery_point;
 	n_inp->sctp_context = inp->sctp_context;
+	n_inp->max_cwnd = inp->max_cwnd;
 	n_inp->local_strreset_support = inp->local_strreset_support;
 	n_inp->inp_starting_point_for_iterator = NULL;
 	/* copy in the authentication parameters from the original endpoint */
diff --git a/sys/netinet/sctp_structs.h b/sys/netinet/sctp_structs.h
index a8d3a97d1f4..b1df17dbf3b 100644
--- a/sys/netinet/sctp_structs.h
+++ b/sys/netinet/sctp_structs.h
@@ -1199,6 +1199,7 @@ struct sctp_association {
 	uint8_t sctp_cmt_pf;
 	uint8_t use_precise_time;
 	uint64_t sctp_features;
+	uint32_t max_cwnd;
 	uint16_t port;		/* remote UDP encapsulation port */
 	/*
 	 * The mapping array is used to track out of order sequences above
diff --git a/sys/netinet/sctp_timer.c b/sys/netinet/sctp_timer.c
index d7a3f0c405b..d8422b90174 100644
--- a/sys/netinet/sctp_timer.c
+++ b/sys/netinet/sctp_timer.c
@@ -152,7 +152,7 @@ sctp_threshold_management(struct sctp_inpcb *inp, struct sctp_tcb *stcb,
 		struct mbuf *op_err;
 
 		op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION,
-		    "Association error couter exceeded");
+		    "Association error counter exceeded");
 		inp->last_abort_code = SCTP_FROM_SCTP_TIMER + SCTP_LOC_1;
 		sctp_abort_an_association(inp, stcb, op_err, SCTP_SO_NOT_LOCKED);
 		return (1);
diff --git a/sys/netinet/sctp_usrreq.c b/sys/netinet/sctp_usrreq.c
index 6e406548e1f..e745cc44749 100644
--- a/sys/netinet/sctp_usrreq.c
+++ b/sys/netinet/sctp_usrreq.c
@@ -3694,6 +3694,33 @@ sctp_getopt(struct socket *so, int optname, void *optval, size_t *optsize,
 			}
 			break;
 		}
+	case SCTP_MAX_CWND:
+		{
+			struct sctp_assoc_value *av;
+
+			SCTP_CHECK_AND_CAST(av, optval, struct sctp_assoc_value, *optsize);
+			SCTP_FIND_STCB(inp, stcb, av->assoc_id);
+
+			if (stcb) {
+				av->assoc_value = stcb->asoc.max_cwnd;
+				SCTP_TCB_UNLOCK(stcb);
+			} else {
+				if ((inp->sctp_flags & SCTP_PCB_FLAGS_TCPTYPE) ||
+				    (inp->sctp_flags & SCTP_PCB_FLAGS_IN_TCPPOOL) ||
+				    (av->assoc_id == SCTP_FUTURE_ASSOC)) {
+					SCTP_INP_RLOCK(inp);
+					av->assoc_value = inp->max_cwnd;
+					SCTP_INP_RUNLOCK(inp);
+				} else {
+					SCTP_LTRACE_ERR_RET(inp, NULL, NULL, SCTP_FROM_SCTP_USRREQ, EINVAL);
+					error = EINVAL;
+				}
+			}
+			if (error == 0) {
+				*optsize = sizeof(struct sctp_assoc_value);
+			}
+			break;
+		}
 	default:
 		SCTP_LTRACE_ERR_RET(inp, NULL, NULL, SCTP_FROM_SCTP_USRREQ, ENOPROTOOPT);
 		error = ENOPROTOOPT;
@@ -6162,14 +6189,16 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize,
 			}
 			if (stcb != NULL) {
 				if (net != NULL) {
+					net->failure_threshold = thlds->spt_pathmaxrxt;
+					net->pf_threshold = thlds->spt_pathpfthld;
 					if (net->dest_state & SCTP_ADDR_PF) {
-						if ((net->failure_threshold > thlds->spt_pathmaxrxt) ||
-						    (net->failure_threshold <= thlds->spt_pathpfthld)) {
+						if ((net->error_count > net->failure_threshold) ||
+						    (net->error_count <= net->pf_threshold)) {
 							net->dest_state &= ~SCTP_ADDR_PF;
 						}
 					} else {
-						if ((net->failure_threshold > thlds->spt_pathpfthld) &&
-						    (net->failure_threshold <= thlds->spt_pathmaxrxt)) {
+						if ((net->error_count > net->pf_threshold) &&
+						    (net->error_count <= net->failure_threshold)) {
 							net->dest_state |= SCTP_ADDR_PF;
 							sctp_send_hb(stcb, net, SCTP_SO_LOCKED);
 							sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3);
@@ -6177,28 +6206,28 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize,
 						}
 					}
 					if (net->dest_state & SCTP_ADDR_REACHABLE) {
-						if (net->failure_threshold > thlds->spt_pathmaxrxt) {
+						if (net->error_count > net->failure_threshold) {
 							net->dest_state &= ~SCTP_ADDR_REACHABLE;
 							sctp_ulp_notify(SCTP_NOTIFY_INTERFACE_DOWN, stcb, 0, net, SCTP_SO_LOCKED);
 						}
 					} else {
-						if (net->failure_threshold <= thlds->spt_pathmaxrxt) {
+						if (net->error_count <= net->failure_threshold) {
 							net->dest_state |= SCTP_ADDR_REACHABLE;
 							sctp_ulp_notify(SCTP_NOTIFY_INTERFACE_UP, stcb, 0, net, SCTP_SO_LOCKED);
 						}
 					}
-					net->failure_threshold = thlds->spt_pathmaxrxt;
-					net->pf_threshold = thlds->spt_pathpfthld;
 				} else {
 					TAILQ_FOREACH(net, &stcb->asoc.nets, sctp_next) {
+						net->failure_threshold = thlds->spt_pathmaxrxt;
+						net->pf_threshold = thlds->spt_pathpfthld;
 						if (net->dest_state & SCTP_ADDR_PF) {
-							if ((net->failure_threshold > thlds->spt_pathmaxrxt) ||
-							    (net->failure_threshold <= thlds->spt_pathpfthld)) {
+							if ((net->error_count > net->failure_threshold) ||
+							    (net->error_count <= net->pf_threshold)) {
 								net->dest_state &= ~SCTP_ADDR_PF;
 							}
 						} else {
-							if ((net->failure_threshold > thlds->spt_pathpfthld) &&
-							    (net->failure_threshold <= thlds->spt_pathmaxrxt)) {
+							if ((net->error_count > net->pf_threshold) &&
+							    (net->error_count <= net->failure_threshold)) {
 								net->dest_state |= SCTP_ADDR_PF;
 								sctp_send_hb(stcb, net, SCTP_SO_LOCKED);
 								sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3);
@@ -6206,22 +6235,21 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize,
 							}
 						}
 						if (net->dest_state & SCTP_ADDR_REACHABLE) {
-							if (net->failure_threshold > thlds->spt_pathmaxrxt) {
+							if (net->error_count > net->failure_threshold) {
 								net->dest_state &= ~SCTP_ADDR_REACHABLE;
 								sctp_ulp_notify(SCTP_NOTIFY_INTERFACE_DOWN, stcb, 0, net, SCTP_SO_LOCKED);
 							}
 						} else {
-							if (net->failure_threshold <= thlds->spt_pathmaxrxt) {
+							if (net->error_count <= net->failure_threshold) {
 								net->dest_state |= SCTP_ADDR_REACHABLE;
 								sctp_ulp_notify(SCTP_NOTIFY_INTERFACE_UP, stcb, 0, net, SCTP_SO_LOCKED);
 							}
 						}
-						net->failure_threshold = thlds->spt_pathmaxrxt;
-						net->pf_threshold = thlds->spt_pathpfthld;
 					}
 					stcb->asoc.def_net_failure = thlds->spt_pathmaxrxt;
 					stcb->asoc.def_net_pf_threshold = thlds->spt_pathpfthld;
 				}
+				SCTP_TCB_UNLOCK(stcb);
 			} else {
 				if ((inp->sctp_flags & SCTP_PCB_FLAGS_TCPTYPE) ||
 				    (inp->sctp_flags & SCTP_PCB_FLAGS_IN_TCPPOOL) ||
@@ -6572,6 +6600,42 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize,
 			}
 			break;
 		}
+	case SCTP_MAX_CWND:
+		{
+			struct sctp_assoc_value *av;
+			struct sctp_nets *net;
+
+			SCTP_CHECK_AND_CAST(av, optval, struct sctp_assoc_value, optsize);
+			SCTP_FIND_STCB(inp, stcb, av->assoc_id);
+
+			if (stcb) {
+				stcb->asoc.max_cwnd = av->assoc_value;
+				if (stcb->asoc.max_cwnd > 0) {
+					TAILQ_FOREACH(net, &stcb->asoc.nets, sctp_next) {
+						if ((net->cwnd > stcb->asoc.max_cwnd) &&
+						    (net->cwnd > (net->mtu - sizeof(struct sctphdr)))) {
+							net->cwnd = stcb->asoc.max_cwnd;
+							if (net->cwnd < (net->mtu - sizeof(struct sctphdr))) {
+								net->cwnd = net->mtu - sizeof(struct sctphdr);
+							}
+						}
+					}
+				}
+				SCTP_TCB_UNLOCK(stcb);
+			} else {
+				if ((inp->sctp_flags & SCTP_PCB_FLAGS_TCPTYPE) ||
+				    (inp->sctp_flags & SCTP_PCB_FLAGS_IN_TCPPOOL) ||
+				    (av->assoc_id == SCTP_FUTURE_ASSOC)) {
+					SCTP_INP_WLOCK(inp);
+					inp->max_cwnd = av->assoc_value;
+					SCTP_INP_WUNLOCK(inp);
+				} else {
+					SCTP_LTRACE_ERR_RET(inp, NULL, NULL, SCTP_FROM_SCTP_USRREQ, EINVAL);
+					error = EINVAL;
+				}
+			}
+			break;
+		}
 	default:
 		SCTP_LTRACE_ERR_RET(inp, NULL, NULL, SCTP_FROM_SCTP_USRREQ, ENOPROTOOPT);
 		error = ENOPROTOOPT;
diff --git a/sys/netinet/sctputil.c b/sys/netinet/sctputil.c
index 57c203251d8..98792828387 100644
--- a/sys/netinet/sctputil.c
+++ b/sys/netinet/sctputil.c
@@ -936,6 +936,7 @@ sctp_init_asoc(struct sctp_inpcb *inp, struct sctp_tcb *stcb,
 	asoc->sctp_frag_point = inp->sctp_frag_point;
 	asoc->sctp_features = inp->sctp_features;
 	asoc->default_dscp = inp->sctp_ep.default_dscp;
+	asoc->max_cwnd = inp->max_cwnd;
 #ifdef INET6
 	if (inp->sctp_ep.default_flowlabel) {
 		asoc->default_flowlabel = inp->sctp_ep.default_flowlabel;
@@ -2744,7 +2745,11 @@ sctp_notify_assoc_change(uint16_t state, struct sctp_tcb *stcb,
 
 static void
 sctp_notify_peer_addr_change(struct sctp_tcb *stcb, uint32_t state,
-    struct sockaddr *sa, uint32_t error)
+    struct sockaddr *sa, uint32_t error, int so_locked
+#if !defined(__APPLE__) && !defined(SCTP_SO_LOCK_TESTING)
+    SCTP_UNUSED
+#endif
+)
 {
 	struct mbuf *m_notify;
 	struct sctp_paddr_change *spc;
@@ -2827,7 +2832,7 @@ sctp_notify_peer_addr_change(struct sctp_tcb *stcb, uint32_t state,
 	    control,
 	    &stcb->sctp_socket->so_rcv, 1,
 	    SCTP_READ_LOCK_NOT_HELD,
-	    SCTP_SO_NOT_LOCKED);
+	    so_locked);
 }
 
 
@@ -3591,7 +3596,7 @@ sctp_ulp_notify(uint32_t notification, struct sctp_tcb *stcb,
 
 			net = (struct sctp_nets *)data;
 			sctp_notify_peer_addr_change(stcb, SCTP_ADDR_UNREACHABLE,
-			    (struct sockaddr *)&net->ro._l_addr, error);
+			    (struct sockaddr *)&net->ro._l_addr, error, so_locked);
 			break;
 		}
 	case SCTP_NOTIFY_INTERFACE_UP:
@@ -3600,7 +3605,7 @@ sctp_ulp_notify(uint32_t notification, struct sctp_tcb *stcb,
 
 			net = (struct sctp_nets *)data;
 			sctp_notify_peer_addr_change(stcb, SCTP_ADDR_AVAILABLE,
-			    (struct sockaddr *)&net->ro._l_addr, error);
+			    (struct sockaddr *)&net->ro._l_addr, error, so_locked);
 			break;
 		}
 	case SCTP_NOTIFY_INTERFACE_CONFIRMED:
@@ -3609,7 +3614,7 @@ sctp_ulp_notify(uint32_t notification, struct sctp_tcb *stcb,
 
 			net = (struct sctp_nets *)data;
 			sctp_notify_peer_addr_change(stcb, SCTP_ADDR_CONFIRMED,
-			    (struct sockaddr *)&net->ro._l_addr, error);
+			    (struct sockaddr *)&net->ro._l_addr, error, so_locked);
 			break;
 		}
 	case SCTP_NOTIFY_SPECIAL_SP_FAIL:
@@ -3680,15 +3685,15 @@ sctp_ulp_notify(uint32_t notification, struct sctp_tcb *stcb,
 		break;
 	case SCTP_NOTIFY_ASCONF_ADD_IP:
 		sctp_notify_peer_addr_change(stcb, SCTP_ADDR_ADDED, data,
-		    error);
+		    error, so_locked);
 		break;
 	case SCTP_NOTIFY_ASCONF_DELETE_IP:
 		sctp_notify_peer_addr_change(stcb, SCTP_ADDR_REMOVED, data,
-		    error);
+		    error, so_locked);
 		break;
 	case SCTP_NOTIFY_ASCONF_SET_PRIMARY:
 		sctp_notify_peer_addr_change(stcb, SCTP_ADDR_MADE_PRIM, data,
-		    error);
+		    error, so_locked);
 		break;
 	case SCTP_NOTIFY_PEER_SHUTDOWN:
 		sctp_notify_shutdown_event(stcb);
diff --git a/sys/netinet/tcp_hostcache.c b/sys/netinet/tcp_hostcache.c
index b03556ff67e..ca13f27edd9 100644
--- a/sys/netinet/tcp_hostcache.c
+++ b/sys/netinet/tcp_hostcache.c
@@ -596,7 +596,7 @@ tcp_hc_update(struct in_conninfo *inc, struct hc_metrics_lite *hcml)
 static int
 sysctl_tcp_hc_list(SYSCTL_HANDLER_ARGS)
 {
-	int linesize = 128;
+	const int linesize = 128;
 	struct sbuf sb;
 	int i, error;
 	struct hc_metrics *hc_entry;
@@ -605,7 +605,7 @@ sysctl_tcp_hc_list(SYSCTL_HANDLER_ARGS)
 #endif
 
 	sbuf_new(&sb, NULL, linesize * (V_tcp_hostcache.cache_count + 1),
-	    SBUF_FIXEDLEN);
+		SBUF_INCLUDENUL);
 
 	sbuf_printf(&sb,
 	        "\nIP address        MTU  SSTRESH      RTT   RTTVAR BANDWIDTH "
@@ -642,8 +642,9 @@ sysctl_tcp_hc_list(SYSCTL_HANDLER_ARGS)
 		THC_UNLOCK(&V_tcp_hostcache.hashbase[i].hch_mtx);
 	}
 #undef msec
-	sbuf_finish(&sb);
-	error = SYSCTL_OUT(req, sbuf_data(&sb), sbuf_len(&sb));
+	error = sbuf_finish(&sb);
+	if (error == 0)
+		error = SYSCTL_OUT(req, sbuf_data(&sb), sbuf_len(&sb));
 	sbuf_delete(&sb);
 	return(error);
 }
diff --git a/sys/netinet/tcp_usrreq.c b/sys/netinet/tcp_usrreq.c
index dee1c33186a..4ea39e300cf 100644
--- a/sys/netinet/tcp_usrreq.c
+++ b/sys/netinet/tcp_usrreq.c
@@ -476,8 +476,12 @@ tcp_usr_connect(struct socket *so, struct sockaddr *nam, struct thread *td)
 	inp = sotoinpcb(so);
 	KASSERT(inp != NULL, ("tcp_usr_connect: inp == NULL"));
 	INP_WLOCK(inp);
-	if (inp->inp_flags & (INP_TIMEWAIT | INP_DROPPED)) {
-		error = EINVAL;
+	if (inp->inp_flags & INP_TIMEWAIT) {
+		error = EADDRINUSE;
+		goto out;
+	}
+	if (inp->inp_flags & INP_DROPPED) {
+		error = ECONNREFUSED;
 		goto out;
 	}
 	tp = intotcpcb(inp);
@@ -523,8 +527,12 @@ tcp6_usr_connect(struct socket *so, struct sockaddr *nam, struct thread *td)
 	inp = sotoinpcb(so);
 	KASSERT(inp != NULL, ("tcp6_usr_connect: inp == NULL"));
 	INP_WLOCK(inp);
-	if (inp->inp_flags & (INP_TIMEWAIT | INP_DROPPED)) {
-		error = EINVAL;
+	if (inp->inp_flags & INP_TIMEWAIT) {
+		error = EADDRINUSE;
+		goto out;
+	}
+	if (inp->inp_flags & INP_DROPPED) {
+		error = ECONNREFUSED;
 		goto out;
 	}
 	tp = intotcpcb(inp);
diff --git a/sys/netinet6/in6.c b/sys/netinet6/in6.c
index 448f8f28806..ae68f26f795 100644
--- a/sys/netinet6/in6.c
+++ b/sys/netinet6/in6.c
@@ -1910,7 +1910,8 @@ in6if_do_dad(struct ifnet *ifp)
 	if ((ifp->if_flags & IFF_LOOPBACK) != 0)
 		return (0);
 
-	if (ND_IFINFO(ifp)->flags & ND6_IFF_IFDISABLED)
+	if ((ND_IFINFO(ifp)->flags & ND6_IFF_IFDISABLED) ||
+	    (ND_IFINFO(ifp)->flags & ND6_IFF_NO_DAD))
 		return (0);
 
 	/*
diff --git a/sys/netinet6/in6_pcb.c b/sys/netinet6/in6_pcb.c
index 7296ae64b0c..10cd3f2b1bf 100644
--- a/sys/netinet6/in6_pcb.c
+++ b/sys/netinet6/in6_pcb.c
@@ -645,7 +645,7 @@ in6_pcbnotify(struct inpcbinfo *pcbinfo, struct sockaddr *dst,
 		 * know the value, notify.
 		 * XXX: should we avoid to notify the value to TCP sockets?
 		 */
-		if (cmd == PRC_MSGSIZE)
+		if (cmd == PRC_MSGSIZE && cmdarg != NULL)
 			ip6_notify_pmtu(inp, (struct sockaddr_in6 *)dst,
 					*(u_int32_t *)cmdarg);
 
diff --git a/sys/netinet6/nd6.h b/sys/netinet6/nd6.h
index 80dc0375da5..22509ac946b 100644
--- a/sys/netinet6/nd6.h
+++ b/sys/netinet6/nd6.h
@@ -87,6 +87,8 @@ struct nd_ifinfo {
 #define ND6_IFF_AUTO_LINKLOCAL	0x20
 #define	ND6_IFF_NO_RADR		0x40
 #define ND6_IFF_NO_PREFER_IFACE	0x80 /* XXX: not related to ND. */
+#define ND6_IFF_IGNORELOOP	0x100
+#define ND6_IFF_NO_DAD		0x200
 
 #define	ND6_CREATE		LLE_CREATE
 #define	ND6_EXCLUSIVE		LLE_EXCLUSIVE
diff --git a/sys/netinet6/nd6_nbr.c b/sys/netinet6/nd6_nbr.c
index 6937971386e..827f44be2c4 100644
--- a/sys/netinet6/nd6_nbr.c
+++ b/sys/netinet6/nd6_nbr.c
@@ -1182,6 +1182,7 @@ struct dadq {
 	int dad_ns_icount;
 	int dad_na_icount;
 	int dad_ns_lcount;	/* looped back NS */
+	int dad_loopbackprobe;	/* probing state for loopback detection */
 	struct callout dad_timer_ch;
 	struct vnet *dad_vnet;
 	u_int dad_refcnt;
@@ -1223,7 +1224,6 @@ static struct dadq *
 nd6_dad_find(struct ifaddr *ifa, struct nd_opt_nonce *n)
 {
 	struct dadq *dp;
-	char ip6buf[INET6_ADDRSTRLEN];
 
 	DADQ_RLOCK();
 	TAILQ_FOREACH(dp, &V_dadq, dad_list) {
@@ -1238,10 +1238,6 @@ nd6_dad_find(struct ifaddr *ifa, struct nd_opt_nonce *n)
 		    n->nd_opt_nonce_len == (ND_OPT_NONCE_LEN + 2) / 8 &&
 		    memcmp(&n->nd_opt_nonce[0], &dp->dad_nonce[0],
 		        ND_OPT_NONCE_LEN) == 0) {
-			log(LOG_ERR, "%s: a looped back NS message is "
-			    "detected during DAD for %s.\n",
-			    if_name(ifa->ifa_ifp),
-			    ip6_sprintf(ip6buf, IFA_IN6(ifa)));
 			dp->dad_ns_lcount++;
 			continue;
 		}
@@ -1357,7 +1353,7 @@ nd6_dad_start(struct ifaddr *ifa, int delay)
 	dp->dad_count = V_ip6_dad_count;
 	dp->dad_ns_icount = dp->dad_na_icount = 0;
 	dp->dad_ns_ocount = dp->dad_ns_tcount = 0;
-	dp->dad_ns_lcount = 0;
+	dp->dad_ns_lcount = dp->dad_loopbackprobe = 0;
 	refcount_init(&dp->dad_refcnt, 1);
 	nd6_dad_add(dp);
 	if (delay == 0) {
@@ -1432,8 +1428,10 @@ nd6_dad_timer(struct dadq *dp)
 		goto err;
 	}
 
-	/* timeouted with IFF_{RUNNING,UP} check */
-	if (dp->dad_ns_tcount > V_dad_maxtry) {
+	/* Stop DAD if the interface is down even after dad_maxtry attempts. */
+	if ((dp->dad_ns_tcount > V_dad_maxtry) &&
+	    (((ifp->if_flags & IFF_UP) == 0) ||
+	     ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0))) {
 		nd6log((LOG_INFO, "%s: could not run DAD, driver problem?\n",
 		    if_name(ifa->ifa_ifp)));
 		goto err;
@@ -1456,7 +1454,42 @@ nd6_dad_timer(struct dadq *dp)
 		if (dp->dad_ns_icount > 0 || dp->dad_na_icount > 0)
 			/* We've seen NS or NA, means DAD has failed. */
 			nd6_dad_duplicated(ifa, dp);
-		else {
+		else if (V_dad_enhanced != 0 &&
+		    dp->dad_ns_lcount > 0 &&
+		    dp->dad_ns_lcount > dp->dad_loopbackprobe) {
+			/*
+			 * A looped back probe is detected,
+			 * Sec. 4.1 in draft-ietf-6man-enhanced-dad-13
+			 * requires transmission of additional probes until
+			 * the loopback condition becomes clear.
+			 */
+			log(LOG_ERR, "%s: a looped back NS message is "
+			    "detected during DAD for %s.  "
+			    "Another DAD probes are being sent.\n",
+			    if_name(ifa->ifa_ifp),
+			    ip6_sprintf(ip6buf, IFA_IN6(ifa)));
+			dp->dad_loopbackprobe = dp->dad_ns_lcount;
+			/*
+			 * An interface with IGNORELOOP is one which a
+			 * loopback is permanently expected while regular
+			 * traffic works.  In that case, stop DAD after
+			 * MAX_MULTICAST_SOLICIT number of NS messages
+			 * regardless of the number of received loopback NS
+			 * by increasing dad_loopbackprobe in advance.
+			 */
+			if (ND_IFINFO(ifa->ifa_ifp)->flags & ND6_IFF_IGNORELOOP)
+				dp->dad_loopbackprobe += V_nd6_mmaxtries;
+			/*
+			 * Send an NS immediately and increase dad_count by
+			 * V_nd6_mmaxtries - 1.
+			 */
+			nd6_dad_ns_output(dp, ifa);
+			dp->dad_count =
+			    dp->dad_ns_ocount + V_nd6_mmaxtries - 1;
+			nd6_dad_starttimer(dp,
+			    (long)ND_IFINFO(ifa->ifa_ifp)->retrans * hz / 1000);
+			goto done;
+		} else {
 			/*
 			 * We are done with DAD.  No NA came, no NS came.
 			 * No duplicate address found.  Check IFDISABLED flag
@@ -1470,6 +1503,12 @@ nd6_dad_timer(struct dadq *dp)
 			    "%s: DAD complete for %s - no duplicates found\n",
 			    if_name(ifa->ifa_ifp),
 			    ip6_sprintf(ip6buf, &ia->ia_addr.sin6_addr)));
+			if (dp->dad_ns_lcount > 0)
+				log(LOG_ERR, "%s: DAD completed while "
+				    "a looped back NS message is detected "
+				    "during DAD for %s.\n",
+				    if_name(ifa->ifa_ifp),
+				    ip6_sprintf(ip6buf, IFA_IN6(ifa)));
 		}
 	}
 err:
diff --git a/sys/netipsec/key.c b/sys/netipsec/key.c
index ef06ef4b887..a19adabd746 100644
--- a/sys/netipsec/key.c
+++ b/sys/netipsec/key.c
@@ -3870,7 +3870,7 @@ key_ismyaddr6(struct sockaddr_in6 *sin6)
 
 	IN6_IFADDR_RLOCK();
 	TAILQ_FOREACH(ia, &V_in6_ifaddrhead, ia_link) {
-		if (key_sockaddrcmp((struct sockaddr *)&sin6,
+		if (key_sockaddrcmp((struct sockaddr *)sin6,
 		    (struct sockaddr *)&ia->ia_addr, 0) == 0) {
 			IN6_IFADDR_RUNLOCK();
 			return 1;
diff --git a/sys/netpfil/ipfw/ip_fw2.c b/sys/netpfil/ipfw/ip_fw2.c
index 9c7a3bd8520..a30f6bf9fef 100644
--- a/sys/netpfil/ipfw/ip_fw2.c
+++ b/sys/netpfil/ipfw/ip_fw2.c
@@ -2387,13 +2387,48 @@ do {								\
 				if (q == NULL || q->rule != f ||
 				    dyn_dir == MATCH_FORWARD) {
 				    struct sockaddr_in *sa;
+
 				    sa = &(((ipfw_insn_sa *)cmd)->sa);
 				    if (sa->sin_addr.s_addr == INADDR_ANY) {
-					bcopy(sa, &args->hopstore,
-							sizeof(*sa));
-					args->hopstore.sin_addr.s_addr =
-						    htonl(tablearg);
-					args->next_hop = &args->hopstore;
+#ifdef INET6
+					/*
+					 * We use O_FORWARD_IP opcode for
+					 * fwd rule with tablearg, but tables
+					 * now support IPv6 addresses. And
+					 * when we are inspecting IPv6 packet,
+					 * we can use nh6 field from
+					 * table_value as next_hop6 address.
+					 */
+					if (is_ipv6) {
+						struct sockaddr_in6 *sa6;
+
+						sa6 = args->next_hop6 =
+						    &args->hopstore6;
+						sa6->sin6_family = AF_INET6;
+						sa6->sin6_len = sizeof(*sa6);
+						sa6->sin6_addr = TARG_VAL(
+						    chain, tablearg, nh6);
+						/*
+						 * Set sin6_scope_id only for
+						 * link-local unicast addresses.
+						 */
+						if (IN6_IS_ADDR_LINKLOCAL(
+						    &sa6->sin6_addr))
+							sa6->sin6_scope_id =
+							    TARG_VAL(chain,
+								tablearg,
+								zoneid);
+					} else
+#endif
+					{
+						sa = args->next_hop =
+						    &args->hopstore;
+						sa->sin_family = AF_INET;
+						sa->sin_len = sizeof(*sa);
+						sa->sin_addr.s_addr = htonl(
+						    TARG_VAL(chain, tablearg,
+						    nh4));
+					}
 				    } else {
 					args->next_hop = sa;
 				    }
diff --git a/sys/netpfil/ipfw/ip_fw_pfil.c b/sys/netpfil/ipfw/ip_fw_pfil.c
index b53a8cec7d3..61f182d11be 100644
--- a/sys/netpfil/ipfw/ip_fw_pfil.c
+++ b/sys/netpfil/ipfw/ip_fw_pfil.c
@@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$");
 #ifdef INET6
 #include <netinet/ip6.h>
 #include <netinet6/ip6_var.h>
+#include <netinet6/scope6_var.h>
 #endif
 
 #include <netgraph/ng_ipfw.h>
@@ -197,8 +198,20 @@ ipfw_check_packet(void *arg, struct mbuf **m0, struct ifnet *ifp, int dir,
 		}
 #ifdef INET6
 		if (args.next_hop6 != NULL) {
-			bcopy(args.next_hop6, (fwd_tag+1), len);
-			if (in6_localip(&args.next_hop6->sin6_addr))
+			struct sockaddr_in6 *sa6;
+
+			sa6 = (struct sockaddr_in6 *)(fwd_tag + 1);
+			bcopy(args.next_hop6, sa6, len);
+			/*
+			 * If nh6 address is link-local we should convert
+			 * it to kernel internal form before doing any
+			 * comparisons.
+			 */
+			if (sa6_embedscope(sa6, V_ip6_use_defzone) != 0) {
+				ret = EACCES;
+				break;
+			}
+			if (in6_localip(&sa6->sin6_addr))
 				(*m0)->m_flags |= M_FASTFWD_OURS;
 			(*m0)->m_flags |= M_IP6_NEXTHOP;
 		}
diff --git a/sys/netpfil/ipfw/ip_fw_private.h b/sys/netpfil/ipfw/ip_fw_private.h
index 3f46ddd48f6..bb5b3bab5ce 100644
--- a/sys/netpfil/ipfw/ip_fw_private.h
+++ b/sys/netpfil/ipfw/ip_fw_private.h
@@ -102,7 +102,10 @@ struct ip_fw_args {
 	struct inpcb	*inp;
 
 	struct _ip6dn_args	dummypar; /* dummynet->ip6_output */
-	struct sockaddr_in hopstore;	/* store here if cannot use a pointer */
+	union {		/* store here if cannot use a pointer */
+		struct sockaddr_in hopstore;
+		struct sockaddr_in6 hopstore6;
+	};
 };
 
 MALLOC_DECLARE(M_IPFW);
@@ -294,11 +297,12 @@ struct table_value {
 	uint32_t	nat;		/* O_NAT */
 	uint32_t	nh4;
 	uint8_t		dscp;
-	uint8_t		spare0[3];
+	uint8_t		spare0;
+	uint16_t	spare1;
 	/* -- 32 bytes -- */
 	struct in6_addr	nh6;
 	uint32_t	limit;		/* O_LIMIT */
-	uint32_t	spare1;
+	uint32_t	zoneid;		/* scope zone id for nh6 */
 	uint64_t	refcnt;		/* Number of references */
 };
 
diff --git a/sys/netpfil/ipfw/ip_fw_table_value.c b/sys/netpfil/ipfw/ip_fw_table_value.c
index 9d68901b3e4..c798ac1e43d 100644
--- a/sys/netpfil/ipfw/ip_fw_table_value.c
+++ b/sys/netpfil/ipfw/ip_fw_table_value.c
@@ -117,6 +117,7 @@ mask_table_value(struct table_value *src, struct table_value *dst,
 	_MCPY(dscp, IPFW_VTYPE_DSCP);
 	_MCPY(nh4, IPFW_VTYPE_NH4);
 	_MCPY(nh6, IPFW_VTYPE_NH6);
+	_MCPY(zoneid, IPFW_VTYPE_NH6);
 #undef	_MCPY
 }
 
@@ -666,6 +667,7 @@ ipfw_import_table_value_v1(ipfw_table_value *iv)
 	v.nh4 = iv->nh4;
 	v.nh6 = iv->nh6;
 	v.limit = iv->limit;
+	v.zoneid = iv->zoneid;
 
 	memcpy(iv, &v, sizeof(ipfw_table_value));
 }
@@ -691,6 +693,7 @@ ipfw_export_table_value_v1(struct table_value *v, ipfw_table_value *piv)
 	iv.limit = v->limit;
 	iv.nh4 = v->nh4;
 	iv.nh6 = v->nh6;
+	iv.zoneid = v->zoneid;
 
 	memcpy(piv, &iv, sizeof(iv));
 }
diff --git a/sys/netpfil/pf/pf.c b/sys/netpfil/pf/pf.c
index b32288b695c..7c3ddb808de 100644
--- a/sys/netpfil/pf/pf.c
+++ b/sys/netpfil/pf/pf.c
@@ -5470,6 +5470,7 @@ pf_route6(struct mbuf **m, struct pf_rule *r, int dir, struct ifnet *oifp,
 			PF_STATE_UNLOCK(s);
 		m0->m_flags |= M_SKIP_FIREWALL;
 		ip6_output(m0, NULL, NULL, 0, NULL, NULL, NULL);
+		*m = NULL;
 		return;
 	}
 
diff --git a/sys/ofed/drivers/net/mlx4/en_netdev.c b/sys/ofed/drivers/net/mlx4/en_netdev.c
index a0a310d6254..68ce12574b6 100644
--- a/sys/ofed/drivers/net/mlx4/en_netdev.c
+++ b/sys/ofed/drivers/net/mlx4/en_netdev.c
@@ -1916,19 +1916,22 @@ static int mlx4_en_ioctl(struct ifnet *dev, u_long command, caddr_t data)
 		error = -mlx4_en_change_mtu(dev, ifr->ifr_mtu);
 		break;
 	case SIOCSIFFLAGS:
-		mutex_lock(&mdev->state_lock);
 		if (dev->if_flags & IFF_UP) {
-			if ((dev->if_drv_flags & IFF_DRV_RUNNING) == 0)
+			if ((dev->if_drv_flags & IFF_DRV_RUNNING) == 0) {
+				mutex_lock(&mdev->state_lock);
 				mlx4_en_start_port(dev);
-			else
+				mutex_unlock(&mdev->state_lock);
+			} else {
 				mlx4_en_set_rx_mode(dev);
+			}
 		} else {
+			mutex_lock(&mdev->state_lock);
 			if (dev->if_drv_flags & IFF_DRV_RUNNING) {
 				mlx4_en_stop_port(dev);
-                                if_link_state_change(dev, LINK_STATE_DOWN);
+				if_link_state_change(dev, LINK_STATE_DOWN);
 			}
+			mutex_unlock(&mdev->state_lock);
 		}
-		mutex_unlock(&mdev->state_lock);
 		break;
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
diff --git a/sys/ofed/drivers/net/mlx4/en_tx.c b/sys/ofed/drivers/net/mlx4/en_tx.c
index 115dd0bebc1..2d7e8a8c353 100644
--- a/sys/ofed/drivers/net/mlx4/en_tx.c
+++ b/sys/ofed/drivers/net/mlx4/en_tx.c
@@ -49,7 +49,6 @@
 #include <netinet/udp.h>
 
 #include "mlx4_en.h"
-#include "utils.h"
 
 enum {
 	MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
@@ -699,10 +698,10 @@ static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct mbuf *mb,
 	tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
 }
 
-static unsigned long hashrandom;
+static uint32_t hashrandom;
 static void hashrandom_init(void *arg)
 {
-	hashrandom = random();
+	hashrandom = m_ether_tcpip_hash_init();
 }
 SYSINIT(hashrandom_init, SI_SUB_KLD, SI_ORDER_SECOND, &hashrandom_init, NULL);
 
@@ -724,7 +723,7 @@ u16 mlx4_en_select_queue(struct net_device *dev, struct mbuf *mb)
 	if (M_HASHTYPE_GET(mb) != M_HASHTYPE_NONE)
 		queue_index = mb->m_pkthdr.flowid;
 	else
-		queue_index = mlx4_en_hashmbuf(MLX4_F_HASHL3 | MLX4_F_HASHL4, mb, hashrandom);
+		queue_index = m_ether_tcpip_hash(MBUF_HASHFLAG_L3 | MBUF_HASHFLAG_L4, mb, hashrandom);
 
 	return ((queue_index % rings_p_up) + (up * rings_p_up));
 }
diff --git a/sys/ofed/drivers/net/mlx4/utils.h b/sys/ofed/drivers/net/mlx4/utils.h
deleted file mode 100644
index 51a654ccb1c..00000000000
--- a/sys/ofed/drivers/net/mlx4/utils.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2014 Mellanox Technologies Ltd.  All rights reserved.
- *
- * This software is available to you under a choice of one of two
- * licenses.  You may choose to be licensed under the terms of the GNU
- * General Public License (GPL) Version 2, available from the file
- * COPYING in the main directory of this source tree, or the
- * OpenIB.org BSD license below:
- *
- *     Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *      - Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *
- *      - Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _MLX4_UTILS_H_
-#define	_MLX4_UTILS_H_
-
-/* Lagg flags */
-#define	MLX4_F_HASHL2		0x00000001	/* hash layer 2 */
-#define	MLX4_F_HASHL3		0x00000002	/* hash layer 3 */
-#define	MLX4_F_HASHL4		0x00000004	/* hash layer 4 */
-#define	MLX4_F_HASHMASK		0x00000007
-
-uint32_t mlx4_en_hashmbuf(uint32_t flags, struct mbuf *m, uint32_t key);
-
-#endif		/* _MLX4_UTILS_H_ */
diff --git a/sys/powerpc/aim/locore32.S b/sys/powerpc/aim/locore32.S
index a2cb1028701..477ae88114e 100644
--- a/sys/powerpc/aim/locore32.S
+++ b/sys/powerpc/aim/locore32.S
@@ -108,36 +108,47 @@ kernel_text:
 	.text
 	.globl	__start
 __start:
-	li	8,0
-	li	9,0x100
-	mtctr	9
-1:
-	dcbf	0,8
-	icbi	0,8
-	addi	8,8,0x20
-	bdnz	1b
-	sync
-	isync
+	/* Figure out where we are */
+	bl	1f
+	.long	_DYNAMIC-.
+	.long	_GLOBAL_OFFSET_TABLE_-.
+	.long	tmpstk-.
+1:	mflr	%r30
 
-	/* Zero bss, in case we were started by something unhelpful */
-	li	0,0
-	lis	8,_edata@ha
-	addi	8,8,_edata@l
-	lis	9,_end@ha
-	addi	9,9,_end@l
-2:	stw     0,0(8)
-	addi	8,8,4
-	cmplw	8,9
-	blt	2b
+	/* Set up temporary stack pointer */
+	lwz	%r1,8(%r30)
+	add	%r1,%r1,%r30
+	addi	%r1,%r1,(8+TMPSTKSZ-32)
+
+	/* Relocate self */
+	stw	%r3,16(%r1)
+	stw	%r4,20(%r1)
+	stw	%r5,24(%r1)
+	stw	%r6,28(%r1)
+
+	lwz	%r3,0(%r30) /* _DYNAMIC in %r3 */
+	add	%r3,%r3,%r30
+	lwz	%r4,4(%r30) /* GOT pointer */
+	add	%r4,%r4,%r30
+	lwz	%r4,4(%r4)  /* got[0] is _DYNAMIC link addr */
+	subf	%r4,%r4,%r3 /* subtract to calculate relocbase */
+	bl	elf_reloc_self
 	
-	lis	1,(tmpstk+TMPSTKSZ-16)@ha
-	addi	1,1,(tmpstk+TMPSTKSZ-16)@l
+	lwz	%r3,16(%r1)
+	lwz	%r4,20(%r1)
+	lwz	%r5,24(%r1)
+	lwz	%r6,28(%r1)
 
+	/* MD setup */
 	bl	powerpc_init
+
+	/* Set stack pointer to new value and branch to mi_startup */
 	mr	%r1, %r3
 	li	%r3, 0
 	stw	%r3, 0(%r1)
 	bl	mi_startup
+
+	/* If mi_startup somehow returns, exit. This would be bad. */
 	b	OF_exit
 
 /*
diff --git a/sys/powerpc/aim/machdep.c b/sys/powerpc/aim/machdep.c
index 5d7c784ed60..22f3b2fe61d 100644
--- a/sys/powerpc/aim/machdep.c
+++ b/sys/powerpc/aim/machdep.c
@@ -235,10 +235,13 @@ extern void	*testppc64, *testppc64size;
 extern void	*restorebridge, *restorebridgesize;
 extern void	*rfid_patch, *rfi_patch1, *rfi_patch2;
 extern void	*trapcode64;
+
+extern Elf_Addr	_GLOBAL_OFFSET_TABLE_[];
 #endif
 
 extern void	*rstcode, *rstcodeend;
-extern void	*trapcode, *trapcodeend, *trapcode2;
+extern void	*trapcode, *trapcodeend;
+extern void	*generictrap, *generictrap64;
 extern void	*slbtrap, *slbtrapend;
 extern void	*alitrap, *aliend;
 extern void	*dsitrap, *dsiend;
@@ -254,7 +257,6 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
 {
 	struct		pcpu *pc;
 	vm_offset_t	startkernel, endkernel;
-	void		*generictrap;
 	size_t		trap_offset, trapsize;
 	vm_offset_t	trap;
 	void		*kmdp;
@@ -467,20 +469,9 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
 		/* rfi_patch2 is at the end of dbleave */
 		bcopy(&rfid_patch,&rfi_patch2,4);
 	#endif
-
-		/*
-		 * Set the common trap entry point to the one that
-		 * knows to restore 32-bit operation on execution.
-		 */
-
-		generictrap = &trapcode64;
-	} else {
-		generictrap = &trapcode;
 	}
-
 	#else /* powerpc64 */
 	cpu_features |= PPC_FEATURE_64;
-	generictrap = &trapcode;
 	#endif
 
 	trapsize = (size_t)&trapcodeend - (size_t)&trapcode;
@@ -490,7 +481,7 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
 	 * different ones in a minute.
 	 */
 	for (trap = EXC_RST; trap < EXC_LAST; trap += 0x20)
-		bcopy(generictrap, (void *)trap, trapsize);
+		bcopy(&trapcode, (void *)trap, trapsize);
 
 	#ifndef __powerpc64__
 	if (cpu_features & PPC_FEATURE_64) {
@@ -530,12 +521,19 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
 
 	#ifdef __powerpc64__
 	/* Set TOC base so that the interrupt code can get at it */
-	*((void **)TRAP_GENTRAP) = &trapcode2;
+	*((void **)TRAP_GENTRAP) = &generictrap;
 	*((register_t *)TRAP_TOCBASE) = toc;
 
 	bcopy(&slbtrap, (void *)EXC_DSE,(size_t)&slbtrapend - (size_t)&slbtrap);
 	bcopy(&slbtrap, (void *)EXC_ISE,(size_t)&slbtrapend - (size_t)&slbtrap);
 	#else
+	/* Set branch address for trap code */
+	if (cpu_features & PPC_FEATURE_64)
+		*((void **)TRAP_GENTRAP) = &generictrap64;
+	else
+		*((void **)TRAP_GENTRAP) = &generictrap;
+	*((void **)TRAP_TOCBASE) = _GLOBAL_OFFSET_TABLE_;
+
 	/* G2-specific TLB miss helper handlers */
 	bcopy(&imisstrap, (void *)EXC_IMISS,  (size_t)&imisssize);
 	bcopy(&dlmisstrap, (void *)EXC_DLMISS,  (size_t)&dlmisssize);
diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 6b3add7e266..41c830e21fe 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -1898,6 +1898,8 @@ moea64_get_unique_vsid(void) {
 			hash &= VSID_HASHMASK & ~(VSID_NBPW - 1);
 			hash |= i;
 		}
+		if (hash == VSID_VRMA)	/* also special, avoid this too */
+			continue;
 		KASSERT(!(moea64_vsid_bitmap[n] & mask),
 		    ("Allocating in-use VSID %#zx\n", hash));
 		moea64_vsid_bitmap[n] |= mask;
diff --git a/sys/powerpc/aim/trap_subr32.S b/sys/powerpc/aim/trap_subr32.S
index 7c753b541dd..056c0732367 100644
--- a/sys/powerpc/aim/trap_subr32.S
+++ b/sys/powerpc/aim/trap_subr32.S
@@ -74,8 +74,9 @@
  * Kernel SRs are loaded directly from kernel_pmap_
  */
 #define RESTORE_KERN_SRS(pmap,sr) \
-	lis	pmap,CNAME(kernel_pmap_store)@ha; \
-	lwzu	sr,CNAME(kernel_pmap_store)+PM_SR@l(pmap); \
+	lwz	pmap,TRAP_TOCBASE(0); \
+	lwz	pmap,CNAME(kernel_pmap_store)@got(pmap); \
+	lwzu	sr,PM_SR(pmap); \
 	RESTORE_SRS(pmap,sr)
 
 /*
@@ -301,7 +302,12 @@ CNAME(restorebridgesize) = .-CNAME(restorebridge)
  */
 	.globl	CNAME(rstcode), CNAME(rstcodeend)
 CNAME(rstcode):
-	ba	cpu_reset
+	bl	1f
+	.long	cpu_reset
+1:	mflr	%r31
+	lwz	%r31,0(%r31)
+	mtlr	%r31
+	blrl
 CNAME(rstcodeend):
 
 cpu_reset:
@@ -313,12 +319,12 @@ cpu_reset:
 	mflr	%r1
 	addi	%r1,%r1,(124-16)@l
 
-	bla	CNAME(cpudep_ap_early_bootstrap)
+	bl	CNAME(cpudep_ap_early_bootstrap)
 	lis	%r3,1@l
-	bla	CNAME(pmap_cpu_bootstrap)
-	bla	CNAME(cpudep_ap_bootstrap)
+	bl	CNAME(pmap_cpu_bootstrap)
+	bl	CNAME(cpudep_ap_bootstrap)
 	mr	%r1,%r3
-	bla	CNAME(cpudep_ap_setup)
+	bl	CNAME(cpudep_ap_setup)
 	GET_CPUINFO(%r5)
 	lwz	%r3,(PC_RESTORE)(%r5)
 	cmplwi	%cr0,%r3,0
@@ -327,7 +333,7 @@ cpu_reset:
 	b	CNAME(longjmp)
 2:
 #ifdef SMP
-	bla	CNAME(machdep_ap_bootstrap)
+	bl	CNAME(machdep_ap_bootstrap)
 #endif
 
 	/* Should not be reached */
@@ -344,21 +350,12 @@ CNAME(trapcode):
 	mtsprg1	%r1			/* save SP */
 	mflr	%r1			/* Save the old LR in r1 */
 	mtsprg2 %r1			/* And then in SPRG2 */
-	li	%r1, 0x20		/* How to get the vector from LR */
-	bla	generictrap		/* LR & SPRG3 is exception # */
+	lwz	%r1, TRAP_GENTRAP(0)	/* Get branch address */
+	mtlr	%r1
+	li	%r1, 0xe0		/* How to get the vector from LR */
+	blrl				/* LR & (0xff00 | r1) is exception # */
 CNAME(trapcodeend):
 
-/*
- * 64-bit version of trapcode. Identical, except it calls generictrap64.
- */
-	.globl	CNAME(trapcode64)
-CNAME(trapcode64):
-	mtsprg1	%r1			/* save SP */
-	mflr	%r1			/* Save the old LR in r1 */
-	mtsprg2 %r1			/* And then in SPRG2 */
-	li	%r1, 0x20		/* How to get the vector from LR */
-	bla	generictrap64		/* LR & SPRG3 is exception # */
-
 /*
  * For ALI: has to save DSISR and DAR
  */
@@ -385,7 +382,14 @@ CNAME(alitrap):
 	/* Test whether we already had PR set */
 	mfsrr1	%r31
 	mtcr	%r31
-	bla	s_trap
+
+	/* Jump to s_trap */
+	bl	1f
+	.long	s_trap
+1:	mflr	%r31
+	lwz	%r31,0(%r31)
+	mtlr	%r31
+	blrl
 CNAME(aliend):
 
 /*
@@ -449,7 +453,7 @@ isi1:
 	xoris %r0, %r0, 0x2		/* flip the msr<tgpr> bit */
 	mtcrf 0x80, %r3			/* restore CR0 */
 	mtmsr %r0			/* flip back to the native gprs */
-	ba EXC_ISI			/* go to instr. access interrupt */
+	ba EXC_ISI 			/* go to instr. access interrupt */
 
 CNAME(imisssize) = .-CNAME(imisstrap)
 
@@ -613,13 +617,15 @@ CNAME(dsitrap):
 	rlwinm	%r31,%r31,7,25,28	/* get segment * 8 */
 
 	/* get batu */
-	addis	%r31,%r31,CNAME(battable)@ha
-	lwz	%r30,CNAME(battable)@l(31)
+	lwz	%r30,TRAP_TOCBASE(0)
+	lwz	%r30,CNAME(battable)@got(%r30)
+	add	%r31,%r30,%r31
+	lwz	%r30,0(%r31)
 	mtcr	%r30
 	bf	30,1f			/* branch if supervisor valid is
 					   false */
 	/* get batl */
-	lwz	%r31,CNAME(battable)+4@l(31)
+	lwz	%r31,4(%r31)
 /* We randomly use the highest two bat registers here */
 	mftb	%r28
 	andi.	%r28,%r28,1
@@ -644,7 +650,14 @@ CNAME(dsitrap):
 	rfi				/* return to trapped code */
 1:
 	mflr	%r28			/* save LR (SP already saved) */
-	bla	disitrap
+
+	/* Jump to disitrap */
+	bl	4f
+	.long	disitrap
+4:	mflr	%r1
+	lwz	%r1,0(%r1)
+	mtlr	%r1
+	blrl
 CNAME(dsiend):
 
 /*
@@ -711,7 +724,7 @@ realtrap:
 	GET_CPUINFO(%r1)
 	lwz	%r1,PC_CURPCB(%r1)
 	RESTORE_KERN_SRS(%r30,%r31)	/* enable kernel mapping */
-	ba s_trap
+	b	s_trap
 
 /*
  * generictrap does some standard setup for trap handling to minimize
@@ -723,6 +736,7 @@ realtrap:
  * SPRG2 - Original LR
  */
 
+	.globl	CNAME(generictrap64)
 generictrap64:
 	mtsprg3	%r31
 	mfmsr	%r31
@@ -731,6 +745,7 @@ generictrap64:
 	mfsprg3	%r31
 	isync
 
+	.globl	CNAME(generictrap)
 generictrap:
 	/* Save R1 for computing the exception vector */
 	mtsprg3 %r1
@@ -848,8 +863,9 @@ dbtrap:
 	andi.	%r1,%r1,0xff00
 	mtsprg3	%r1
 
-	lis	%r1,(tmpstk+TMPSTKSZ-16)@ha	/* get new SP */
-	addi	%r1,%r1,(tmpstk+TMPSTKSZ-16)@l
+	lwz	%r1,TRAP_TOCBASE(0)		/* get new SP */
+	lwz	%r1,tmpstk@got(%r1)
+	addi	%r1,%r1,TMPSTKSZ-16
 
 	FRAME_SETUP(PC_DBSAVE)
 /* Call C trap code: */
@@ -896,9 +912,11 @@ CNAME(dblow):
         mfsprg2	%r29			/* ... and r29 */
         mflr	%r1			/* save LR */
 	mtsprg2 %r1			/* And then in SPRG2 */
-	li	%r1, 0	 		/* How to get the vector from LR */
 
-        bla     generictrap		/* and we look like a generic trap */
+	lwz	%r1, TRAP_GENTRAP(0)	/* Get branch address */
+	mtlr	%r1
+	li	%r1, 0			/* How to get the vector from LR */
+	blrl				/* LR & (0xff00 | r1) is exception # */
 1:
 	/* Privileged, so drop to KDB */
 	GET_CPUINFO(%r1)
@@ -908,6 +926,13 @@ CNAME(dblow):
         stw	%r30,(PC_DBSAVE+CPUSAVE_R30)(%r1)	/* free r30 */
         stw	%r31,(PC_DBSAVE+CPUSAVE_R31)(%r1)	/* free r31 */
         mflr	%r28					/* save LR */
-	bla	dbtrap
+
+	/* Jump to dbtrap */
+	bl	2f
+	.long	dbtrap
+2:	mflr	%r1
+	lwz	%r1,0(%r1)
+	mtlr	%r1
+	blrl
 CNAME(dbend):
 #endif /* KDB */
diff --git a/sys/powerpc/aim/trap_subr64.S b/sys/powerpc/aim/trap_subr64.S
index 76c2baec913..5f531551b34 100644
--- a/sys/powerpc/aim/trap_subr64.S
+++ b/sys/powerpc/aim/trap_subr64.S
@@ -62,7 +62,7 @@ restore_usersrs:
 	clrrdi	%r31,%r31,28
 	slbie	%r31
 1:	ld	%r31, 0(%r28)		/* Load SLB entry pointer */
-	cmpli	0, %r31, 0		/* If NULL, stop */
+	cmpdi	%r31, 0			/* If NULL, stop */
 	beqlr
 
 	ld	%r30, 0(%r31)		/* Load SLBV */
@@ -86,18 +86,18 @@ restore_kernsrs:
 	slbmfee	%r31,%r29		
 	clrrdi	%r31,%r31,28
 	slbie	%r31
-1:	cmpli	0, %r29, USER_SLB_SLOT	/* Skip the user slot */
+1:	cmpdi	%r29, USER_SLB_SLOT	/* Skip the user slot */
 	beq-	2f
 
 	ld	%r31, 8(%r28)		/* Load SLBE */
-	cmpli	0, %r31, 0		/* If SLBE is not valid, stop */
+	cmpdi	%r31, 0			/* If SLBE is not valid, stop */
 	beqlr
 	ld	%r30, 0(%r28)		/* Load SLBV  */
 	slbmte	%r30, %r31		/* Install SLB entry */
 
 2:	addi	%r28, %r28, 16		/* Advance pointer */
 	addi	%r29, %r29, 1
-	cmpli	0, %r29, 64		/* Repeat if we are not at the end */
+	cmpdi	%r29, 64		/* Repeat if we are not at the end */
 	blt	1b 
 	blr
 
@@ -356,8 +356,7 @@ CNAME(trapcode):
 	mtsprg1	%r1			/* save SP */
 	mflr	%r1			/* Save the old LR in r1 */
 	mtsprg2 %r1			/* And then in SPRG2 */
-	li	%r1,TRAP_GENTRAP
-	ld	%r1,0(%r1)
+	ld	%r1,TRAP_GENTRAP(0)
 	mtlr	%r1
 	li	%r1, 0xe0		/* How to get the vector from LR */
 	blrl				/* Branch to generictrap */
@@ -673,8 +672,7 @@ realtrap:
  * SPRG2 - Original LR
  */
 
-	.globl	CNAME(trapcode2)
-trapcode2:
+	.globl	CNAME(generictrap)
 generictrap:
 	/* Save R1 for computing the exception vector */
 	mtsprg3 %r1
@@ -792,8 +790,7 @@ dbtrap:
 	andi.	%r1,%r1,0xff00
 	mtsprg3	%r1
 
-	li	%r1,TRAP_TOCBASE		/* get new SP */
-	ld	%r1,0(%r1)
+	ld	%r1,TRAP_TOCBASE(0)		/* get new SP */
 	ld	%r1,TOC_REF(tmpstk)(%r1)
 	addi	%r1,%r1,(TMPSTKSZ-48)
 
diff --git a/sys/powerpc/booke/locore.S b/sys/powerpc/booke/locore.S
index 0fcca91c36e..37860e52dae 100644
--- a/sys/powerpc/booke/locore.S
+++ b/sys/powerpc/booke/locore.S
@@ -205,10 +205,28 @@ done_mapping:
 /*
  * Setup a temporary stack
  */
-	lis	%r1, tmpstack@ha
-	addi	%r1, %r1, tmpstack@l
+	bl	1f
+	.long tmpstack-.
+1:	mflr	%r1
+	lwz	%r2,0(%r1)
+	add	%r1,%r1,%r2
 	addi	%r1, %r1, (TMPSTACKSZ - 16)
 
+/*
+ * Relocate kernel
+ */
+	bl      1f
+	.long   _DYNAMIC-.
+	.long   _GLOBAL_OFFSET_TABLE_-.
+1:	mflr    %r5
+	lwz	%r3,0(%r5)	/* _DYNAMIC in %r3 */
+	add	%r3,%r3,%r5
+	lwz	%r4,4(%r5)	/* GOT pointer */
+	add	%r4,%r4,%r5
+	lwz	%r4,4(%r4)	/* got[0] is _DYNAMIC link addr */
+	subf	%r4,%r4,%r3	/* subtract to calculate relocbase */
+	bl	elf_reloc_self
+
 /*
  * Initialise exception vector offsets
  */
@@ -338,10 +356,13 @@ bp_tlb1_end:
 	blt	4b
 
 	/* Switch to the final mapping */
-	lis	%r5, __boot_page@ha
-	ori	%r5, %r5, __boot_page@l
 	bl	5f
-5:	mflr	%r3
+	.long __boot_page-.
+5:	mflr	%r5
+	lwz	%r3,0(%r3)
+	add	%r5,%r5,%r3		/* __boot_page in r5 */
+	bl	6f
+6:	mflr	%r3
 	rlwinm	%r3, %r3, 0, 0xfff	/* Offset from boot page start */
 	add	%r3, %r3, %r5		/* Make this virtual address */
 	addi	%r3, %r3, 32
@@ -365,8 +386,11 @@ bp_tlb1_end:
 /*
  * Setup a temporary stack
  */
-	lis	%r1, tmpstack@ha
-	addi	%r1, %r1, tmpstack@l
+	bl	1f
+	.long tmpstack-.
+1:	mflr	%r1
+	lwz	%r2,0(%r1)
+	add	%r1,%r1,%r2
 	addi	%r1, %r1, (TMPSTACKSZ - 16)
 
 /*
@@ -377,8 +401,11 @@ bp_tlb1_end:
 	/*
 	 * Assign our pcpu instance
 	 */
-	lis	%r3, ap_pcpu@h
-	ori	%r3, %r3, ap_pcpu@l
+	bl	1f
+	.long ap_pcpu-.
+1:	mflr	%r4
+	lwz	%r3, 0(%r4)
+	add	%r3, %r3, %r4
 	lwz	%r3, 0(%r3)
 	mtsprg0	%r3
 
@@ -536,42 +563,6 @@ __boot_page_padding:
 /* locore subroutines */
 /************************************************************************/
 
-ivor_setup:
-	/* Set base address of interrupt handler routines */
-	lis	%r3, interrupt_vector_base@h
-	mtspr	SPR_IVPR, %r3
-
-	/* Assign interrupt handler routines offsets */
-	li	%r3, int_critical_input@l
-	mtspr	SPR_IVOR0, %r3
-	li	%r3, int_machine_check@l
-	mtspr	SPR_IVOR1, %r3
-	li	%r3, int_data_storage@l
-	mtspr	SPR_IVOR2, %r3
-	li	%r3, int_instr_storage@l
-	mtspr	SPR_IVOR3, %r3
-	li	%r3, int_external_input@l
-	mtspr	SPR_IVOR4, %r3
-	li	%r3, int_alignment@l
-	mtspr	SPR_IVOR5, %r3
-	li	%r3, int_program@l
-	mtspr	SPR_IVOR6, %r3
-	li	%r3, int_syscall@l
-	mtspr	SPR_IVOR8, %r3
-	li	%r3, int_decrementer@l
-	mtspr	SPR_IVOR10, %r3
-	li	%r3, int_fixed_interval_timer@l
-	mtspr	SPR_IVOR11, %r3
-	li	%r3, int_watchdog@l
-	mtspr	SPR_IVOR12, %r3
-	li	%r3, int_data_tlb_error@l
-	mtspr	SPR_IVOR13, %r3
-	li	%r3, int_inst_tlb_error@l
-	mtspr	SPR_IVOR14, %r3
-	li	%r3, int_debug@l
-	mtspr	SPR_IVOR15, %r3
-	blr
-
 /*
  * void tid_flush(tlbtid_t tid);
  *
@@ -579,24 +570,14 @@ ivor_setup:
  * dedicated for cases when invalidation(s) should NOT be propagated to other
  * CPUs.
  *
- * Global vars tlb0_ways, tlb0_entries_per_way are assumed to have been set up
- * correctly (by tlb0_get_tlbconf()).
+ * void tid_flush(tlbtid_t tid, int tlb0_ways, int tlb0_entries_per_way);
  *
+ * XXX: why isn't this in C?
  */
 ENTRY(tid_flush)
 	cmpwi	%r3, TID_KERNEL
 	beq	tid_flush_end	/* don't evict kernel translations */
 
-	/* Number of TLB0 ways */
-	lis	%r4, tlb0_ways@h
-	ori	%r4, %r4, tlb0_ways@l
-	lwz	%r4, 0(%r4)
-
-	/* Number of entries / way */
-	lis	%r5, tlb0_entries_per_way@h
-	ori	%r5, %r5, tlb0_entries_per_way@l
-	lwz	%r5, 0(%r5)
-
 	/* Disable interrupts */
 	mfmsr	%r10
 	wrteei	0
@@ -754,6 +735,11 @@ setfault:
 /* Data section								*/
 /************************************************************************/
 	.data
+	.align 3
+GLOBAL(__startkernel)
+	.long   begin
+GLOBAL(__endkernel)
+	.long   end
 	.align	4
 tmpstack:
 	.space	TMPSTACKSZ
diff --git a/sys/powerpc/booke/machdep.c b/sys/powerpc/booke/machdep.c
index 42a4f04ea17..40f37243a9d 100644
--- a/sys/powerpc/booke/machdep.c
+++ b/sys/powerpc/booke/machdep.c
@@ -187,6 +187,51 @@ SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_booke_startup, NULL);
 void print_kernel_section_addr(void);
 void print_kenv(void);
 u_int booke_init(uint32_t, uint32_t);
+void ivor_setup(void);
+
+extern void *interrupt_vector_base;
+extern void *int_critical_input;
+extern void *int_machine_check;
+extern void *int_data_storage;
+extern void *int_instr_storage;
+extern void *int_external_input;
+extern void *int_alignment;
+extern void *int_program;
+extern void *int_syscall;
+extern void *int_decrementer;
+extern void *int_fixed_interval_timer;
+extern void *int_watchdog;
+extern void *int_data_tlb_error;
+extern void *int_inst_tlb_error;
+extern void *int_debug;
+
+#define SET_TRAP(ivor, handler) \
+	KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \
+	    ((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \
+	    ("Handler " #handler " too far from interrupt vector base")); \
+	mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL);
+
+void
+ivor_setup(void)
+{
+
+	mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & 0xffff0000);
+
+	SET_TRAP(SPR_IVOR0, int_critical_input);
+	SET_TRAP(SPR_IVOR1, int_machine_check);
+	SET_TRAP(SPR_IVOR2, int_data_storage);
+	SET_TRAP(SPR_IVOR3, int_instr_storage);
+	SET_TRAP(SPR_IVOR4, int_external_input);
+	SET_TRAP(SPR_IVOR5, int_alignment);
+	SET_TRAP(SPR_IVOR6, int_program);
+	SET_TRAP(SPR_IVOR8, int_syscall);
+	SET_TRAP(SPR_IVOR10, int_decrementer);
+	SET_TRAP(SPR_IVOR11, int_fixed_interval_timer);
+	SET_TRAP(SPR_IVOR12, int_watchdog);
+	SET_TRAP(SPR_IVOR13, int_data_tlb_error);
+	SET_TRAP(SPR_IVOR14, int_inst_tlb_error);
+	SET_TRAP(SPR_IVOR15, int_debug);
+}
 
 static void
 cpu_booke_startup(void *dummy)
diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c
index 5ee5b0a5940..573364afb67 100644
--- a/sys/powerpc/booke/pmap.c
+++ b/sys/powerpc/booke/pmap.c
@@ -159,7 +159,7 @@ unsigned int kernel_ptbls;	/* Number of KVA ptbls. */
 #define PMAP_REMOVE_DONE(pmap) \
 	((pmap) != kernel_pmap && (pmap)->pm_stats.resident_count == 0)
 
-extern void tid_flush(tlbtid_t);
+extern void tid_flush(tlbtid_t tid, int tlb0_ways, int tlb0_entries_per_way);
 extern int elf32_nxstack;
 
 /**************************************************************************/
@@ -2818,7 +2818,7 @@ tid_alloc(pmap_t pmap)
 		tidbusy[thiscpu][tid]->pm_tid[thiscpu] = TID_NONE;
 
 		/* Flush all entries from TLB0 matching this TID. */
-		tid_flush(tid);
+		tid_flush(tid, tlb0_ways, tlb0_entries_per_way);
 	}
 
 	tidbusy[thiscpu][tid] = pmap;
diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S
index 757644963b3..bc6bad3083c 100644
--- a/sys/powerpc/booke/trap_subr.S
+++ b/sys/powerpc/booke/trap_subr.S
@@ -542,8 +542,11 @@ INTERRUPT(int_data_tlb_error)
 
 search_kernel_pmap:
 	/* Load r26 with kernel_pmap address */
-	lis	%r26, kernel_pmap_store@h
-	ori	%r26, %r26, kernel_pmap_store@l
+	bl	1f
+	.long kernel_pmap_store-.
+1:	mflr	%r21
+	lwz	%r26, 0(%r21)
+	add	%r26, %r21, %r26	/* kernel_pmap_store in r26 */
 
 	/* Force kernel tid, set TID to 0 in MAS1. */
 	li	%r21, 0
@@ -737,12 +740,17 @@ INTERRUPT(int_debug)
 	FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_DEBUG)
 	GET_CPUINFO(%r3)
 	lwz	%r3, (PC_BOOKE_CRITSAVE+CPUSAVE_SRR0)(%r3)
-	lis	%r4, interrupt_vector_base@ha
-	addi	%r4, %r4, interrupt_vector_base@l
+	bl	0f
+	.long	interrupt_vector_base-.
+	.long	interrupt_vector_top-.
+0:	mflr	%r5
+	lwz	%r4,0(%r5)	/* interrupt_vector_base in r4 */
+	add	%r4,%r4,%r5
 	cmplw	cr0, %r3, %r4
 	blt	1f
-	lis	%r4, interrupt_vector_top@ha
-	addi	%r4, %r4, interrupt_vector_top@l
+	lwz	%r4,4(%r5)	/* interrupt_vector_top in r4 */
+	add	%r4,%r4,%r5
+	addi	%r4,%r4,4
 	cmplw	cr0, %r3, %r4
 	bge	1f
 	/* Disable single-stepping for the interrupt handlers. */
diff --git a/sys/powerpc/include/slb.h b/sys/powerpc/include/slb.h
index 637110c6853..32425908ed4 100644
--- a/sys/powerpc/include/slb.h
+++ b/sys/powerpc/include/slb.h
@@ -62,6 +62,9 @@
 #define	SLBE_ESID_MASK	0xfffffffff0000000UL /* Effective segment ID mask */
 #define	SLBE_ESID_SHIFT	28
 
+/* Virtual real-mode VSID in LPARs */
+#define VSID_VRMA	0x1ffffff
+
 /*
  * User segment for copyin/out
  */
diff --git a/sys/powerpc/include/ucontext.h b/sys/powerpc/include/ucontext.h
index 26f666cf878..34e391a9e13 100644
--- a/sys/powerpc/include/ucontext.h
+++ b/sys/powerpc/include/ucontext.h
@@ -46,6 +46,7 @@ typedef struct __mcontext {
 	uint32_t	mc_av[2];
 	register_t	mc_frame[42];
 	uint64_t	mc_fpreg[33];
+	uint64_t	mc_vsxfpreg[32];	/* low-order half of VSR0-31 */
 } mcontext_t __aligned(16);
 
 #if defined(_KERNEL) && defined(__powerpc64__)
@@ -60,6 +61,7 @@ typedef struct __mcontext32 {
 	uint32_t	mc_av[2];
 	uint32_t	mc_frame[42];
 	uint64_t	mc_fpreg[33];
+	uint64_t	mc_vsxfpreg[32];	/* low-order half of VSR0-31 */
 } mcontext32_t __aligned(16);
 #endif
 
diff --git a/sys/powerpc/ofw/ofwcall32.S b/sys/powerpc/ofw/ofwcall32.S
index d2ba70f49ae..6c460c11557 100644
--- a/sys/powerpc/ofw/ofwcall32.S
+++ b/sys/powerpc/ofw/ofwcall32.S
@@ -66,17 +66,21 @@ ASENTRY(ofwcall)
 	/* Record the old MSR */
 	mfmsr	%r6
 
+	/* GOT pointer in r7 */
+	bl	_GLOBAL_OFFSET_TABLE_@local-4
+	mflr	%r7
+
 	/* read client interface handler */
-	lis	%r4,openfirmware_entry@ha
-	lwz	%r4,openfirmware_entry@l(%r4)
+	lwz	%r4,openfirmware_entry@got(%r7)
+	lwz	%r4,0(%r4)
 
 	/*
 	 * Set the MSR to the OF value. This has the side effect of disabling
 	 * exceptions, which prevents preemption later.
 	 */
 
-	lis	%r5,ofmsr@ha
-	lwz	%r5,ofmsr@l(%r5)
+	lwz	%r5,ofmsr@got(%r7)
+	lwz	%r5,0(%r5)
 	mtmsr	%r5
 	isync
 
@@ -87,8 +91,8 @@ ASENTRY(ofwcall)
 	 * later.
 	 */
 	mr	%r5,%r1
-	lis	%r1,(ofwstk+OFWSTKSZ-32)@ha
-	addi	%r1,%r1,(ofwstk+OFWSTKSZ-32)@l
+	lwz	%r1,ofwstk@got(%r7)
+	addi	%r1,%r1,(OFWSTKSZ-32)
 	stw	%r5,20(%r1)	/* Save real stack pointer */
 	stw	%r2,24(%r1)	/* Save curthread */
 	stw	%r6,28(%r1)	/* Save old MSR */
@@ -124,18 +128,22 @@ ASENTRY(rtascall)
 	mflr	%r0
 	stw	%r0,4(%r1)
 
+	/* GOT pointer in r7 */
+	bl	_GLOBAL_OFFSET_TABLE_@local-4
+	mflr	%r7
+
 	/* Record the old MSR to real-mode-accessible area */
 	mfmsr	%r0
-	lis	%r5,rtas_regsave@ha
-	stw	%r0,rtas_regsave@l(%r5)
+	lwz	%r5,rtas_regsave@got(%r7)
+	stw	%r0,0(%r5)
 
 	/* read client interface handler */
-	lis	%r5,rtas_entry@ha
-	lwz	%r5,rtas_entry@l(%r5)
+	lwz	%r5,rtas_entry@got(%r7)
+	lwz	%r5,0(%r5)
 
 	/* Set the MSR to the RTAS value */
-	lis	%r6,rtasmsr@ha
-	lwz	%r6,rtasmsr@l(%r6)
+	lwz	%r6,rtasmsr@got(%r7)
+	lwz	%r6,0(%r6)
 	mtmsr	%r6
 	isync
 
@@ -143,9 +151,13 @@ ASENTRY(rtascall)
 	mtctr	%r5
 	bctrl
 
+	/* GOT pointer in r7 */
+	bl	_GLOBAL_OFFSET_TABLE_@local-4
+	mflr	%r7
+
 	/* Now set the MSR back */
-	lis	%r6,rtas_regsave@ha
-	lwz	%r6,rtas_regsave@l(%r6)
+	lwz	%r6,rtas_regsave@got(%r7)
+	lwz	%r6,0(%r6)
 	mtmsr	%r6
 	isync
 
diff --git a/sys/powerpc/powermac/platform_powermac.c b/sys/powerpc/powermac/platform_powermac.c
index 3e1bf7a6d12..f6e9d9932c5 100644
--- a/sys/powerpc/powermac/platform_powermac.c
+++ b/sys/powerpc/powermac/platform_powermac.c
@@ -126,6 +126,8 @@ powermac_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
 	int physacells = 1;
 
 	memory = OF_finddevice("/memory");
+	if (memory == -1)
+		memory = OF_finddevice("/memory@0");
 
 	/* "reg" has variable #address-cells, but #size-cells is always 1 */
 	OF_getprop(OF_parent(memory), "#address-cells", &physacells,
@@ -154,23 +156,32 @@ powermac_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
 	/* "available" always has #address-cells = 1 */
 	propsize = OF_getprop(memory, "available", memoryprop,
 	    sizeof(memoryprop));
-	propsize /= sizeof(cell_t);
-	for (i = 0, j = 0; i < propsize; i += 2, j++) {
-		avail[j].mr_start = memoryprop[i];
-		avail[j].mr_size = memoryprop[i + 1];
-	}
+	if (propsize <= 0) {
+		for (i = 0; i < *physsz; i++) {
+			avail[i].mr_start = phys[i].mr_start;
+			avail[i].mr_size = phys[i].mr_size;
+		}
+
+		*availsz = *physsz;
+	} else {
+		propsize /= sizeof(cell_t);
+		for (i = 0, j = 0; i < propsize; i += 2, j++) {
+			avail[j].mr_start = memoryprop[i];
+			avail[j].mr_size = memoryprop[i + 1];
+		}
 
 #ifdef __powerpc64__
-	/* Add in regions above 4 GB to the available list */
-	for (i = 0; i < *physsz; i++) {
-		if (phys[i].mr_start > BUS_SPACE_MAXADDR_32BIT) {
-			avail[j].mr_start = phys[i].mr_start;
-			avail[j].mr_size = phys[i].mr_size;
-			j++;
+		/* Add in regions above 4 GB to the available list */
+		for (i = 0; i < *physsz; i++) {
+			if (phys[i].mr_start > BUS_SPACE_MAXADDR_32BIT) {
+				avail[j].mr_start = phys[i].mr_start;
+				avail[j].mr_size = phys[i].mr_size;
+				j++;
+			}
 		}
-	}
 #endif
-	*availsz = j;
+		*availsz = j;
+	}
 }
 
 static int
diff --git a/sys/powerpc/powerpc/elf32_machdep.c b/sys/powerpc/powerpc/elf32_machdep.c
index 1e0b43b9928..ea00306787c 100644
--- a/sys/powerpc/powerpc/elf32_machdep.c
+++ b/sys/powerpc/powerpc/elf32_machdep.c
@@ -147,6 +147,8 @@ SYSINIT(oelf32, SI_SUB_EXEC, SI_ORDER_ANY,
 	(sysinit_cfunc_t) elf32_insert_brand_entry,
 	&freebsd_brand_oinfo);
 
+void elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase);
+
 void
 elf32_dump_thread(struct thread *td, void *dst, size_t *off)
 {
@@ -252,6 +254,39 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
 	return(0);
 }
 
+void
+elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase)
+{
+	Elf_Rela *rela = 0, *relalim;
+	Elf_Addr relasz = 0;
+	Elf_Addr *where;
+
+	/*
+	 * Extract the rela/relasz values from the dynamic section
+	 */
+	for (; dynp->d_tag != DT_NULL; dynp++) {
+		switch (dynp->d_tag) {
+		case DT_RELA:
+			rela = (Elf_Rela *)(relocbase+dynp->d_un.d_ptr);
+			break;
+		case DT_RELASZ:
+			relasz = dynp->d_un.d_val;
+			break;
+		}
+	}
+
+	/*
+	 * Relocate these values
+	 */
+	relalim = (Elf_Rela *)((caddr_t)rela + relasz);
+	for (; rela < relalim; rela++) {
+		if (ELF_R_TYPE(rela->r_info) != R_PPC_RELATIVE)
+			continue;
+		where = (Elf_Addr *)(relocbase + rela->r_offset);
+		*where = (Elf_Addr)(relocbase + rela->r_addend);
+	}
+}
+
 int
 elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type,
     elf_lookup_fn lookup)
diff --git a/sys/powerpc/powerpc/exec_machdep.c b/sys/powerpc/powerpc/exec_machdep.c
index 4b8288bc07a..67ce4bc60c6 100644
--- a/sys/powerpc/powerpc/exec_machdep.c
+++ b/sys/powerpc/powerpc/exec_machdep.c
@@ -393,12 +393,17 @@ grab_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 		}
 		mcp->mc_flags |= _MC_FP_VALID;
 		memcpy(&mcp->mc_fpscr, &pcb->pcb_fpu.fpscr, sizeof(double));
-		memcpy(mcp->mc_fpreg, pcb->pcb_fpu.fpr, 32*sizeof(double));
 		for (i = 0; i < 32; i++)
 			memcpy(&mcp->mc_fpreg[i], &pcb->pcb_fpu.fpr[i].fpr,
 			    sizeof(double));
 	}
 
+	if (pcb->pcb_flags & PCB_VSX) {
+		for (i = 0; i < 32; i++)
+			memcpy(&mcp->mc_vsxfpreg[i],
+			    &pcb->pcb_fpu.fpr[i].vsr[2], sizeof(double));
+	}
+
 	/*
 	 * Repeat for Altivec context
 	 */
@@ -415,8 +420,6 @@ grab_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 		memcpy(mcp->mc_avec, pcb->pcb_vec.vr, sizeof(mcp->mc_avec));
 	}
 
-	/* XXX VSX context */
-
 	mcp->mc_len = sizeof(*mcp);
 
 	return (0);
@@ -474,9 +477,12 @@ set_mcontext(struct thread *td, mcontext_t *mcp)
 		pcb->pcb_flags |= PCB_FPREGS;
 		memcpy(&pcb->pcb_fpu.fpscr, &mcp->mc_fpscr, sizeof(double));
 		bzero(pcb->pcb_fpu.fpr, sizeof(pcb->pcb_fpu.fpr));
-		for (i = 0; i < 32; i++)
+		for (i = 0; i < 32; i++) {
 			memcpy(&pcb->pcb_fpu.fpr[i].fpr, &mcp->mc_fpreg[i],
 			    sizeof(double));
+			memcpy(&pcb->pcb_fpu.fpr[i].vsr[2],
+			    &mcp->mc_vsxfpreg[i], sizeof(double));
+		}
 	}
 
 	if (mcp->mc_flags & _MC_AV_VALID) {
@@ -490,8 +496,6 @@ set_mcontext(struct thread *td, mcontext_t *mcp)
 		memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec));
 	}
 
-	/* XXX VSX context */
-
 	return (0);
 }
 
@@ -721,6 +725,7 @@ grab_mcontext32(struct thread *td, mcontext32_t *mcp, int flags)
 	for (i = 0; i < 42; i++)
 		mcp->mc_frame[i] = mcp64.mc_frame[i];
 	memcpy(mcp->mc_fpreg,mcp64.mc_fpreg,sizeof(mcp64.mc_fpreg));
+	memcpy(mcp->mc_vsxfpreg,mcp64.mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg));
 
 	return (0);
 }
@@ -756,6 +761,7 @@ set_mcontext32(struct thread *td, mcontext32_t *mcp)
 		mcp64.mc_frame[i] = mcp->mc_frame[i];
 	mcp64.mc_srr1 |= (td->td_frame->srr1 & 0xFFFFFFFF00000000ULL);
 	memcpy(mcp64.mc_fpreg,mcp->mc_fpreg,sizeof(mcp64.mc_fpreg));
+	memcpy(mcp64.mc_vsxfpreg,mcp->mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg));
 
 	error = set_mcontext(td, &mcp64);
 
diff --git a/sys/powerpc/powerpc/swtch32.S b/sys/powerpc/powerpc/swtch32.S
index dc28323866e..12b1bc03a39 100644
--- a/sys/powerpc/powerpc/swtch32.S
+++ b/sys/powerpc/powerpc/swtch32.S
@@ -121,8 +121,9 @@ ENTRY(cpu_switch)
 cpu_switchin:
 #if defined(SMP) && defined(SCHED_ULE)
 	/* Wait for the new thread to become unblocked */
-	lis	%r6,blocked_lock@ha
-	addi	%r6,%r6,blocked_lock@l
+	bl	_GLOBAL_OFFSET_TABLE_@local-4
+	mflr	%r6
+	lwz	%r6,blocked_lock@got(%r6)
 blocked_loop:
 	lwz	%r7,TD_LOCK(%r2)
 	cmpw	%r6,%r7 
diff --git a/sys/powerpc/powerpc/syncicache.c b/sys/powerpc/powerpc/syncicache.c
index 906bc3bb54a..9346c902cd6 100644
--- a/sys/powerpc/powerpc/syncicache.c
+++ b/sys/powerpc/powerpc/syncicache.c
@@ -31,10 +31,8 @@
  * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
  */
 
-#ifndef lint
-static const char rcsid[] =
-  "$FreeBSD$";
-#endif /* not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #if	defined(_KERNEL) || defined(_STANDALONE)
diff --git a/sys/powerpc/ps3/ps3_syscons.c b/sys/powerpc/ps3/ps3_syscons.c
index 521690c3944..4edf56eb513 100644
--- a/sys/powerpc/ps3/ps3_syscons.c
+++ b/sys/powerpc/ps3/ps3_syscons.c
@@ -191,7 +191,6 @@ ps3fb_init(struct vt_device *vd)
 	    L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 1, 0, 0, 0);
 
 	vt_fb_init(vd);
-	sc->fb_info.fb_flags &= ~FB_FLAG_NOMMAP; /* Set wrongly by vt_fb_init */
 
 	return (CN_INTERNAL);
 }
diff --git a/sys/powerpc/pseries/mmu_phyp.c b/sys/powerpc/pseries/mmu_phyp.c
index 91b342446a6..7ef7189797f 100644
--- a/sys/powerpc/pseries/mmu_phyp.c
+++ b/sys/powerpc/pseries/mmu_phyp.c
@@ -114,6 +114,8 @@ mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
 	uint32_t prop[2];
 	uint32_t nptlp, shift = 0, slb_encoding = 0;
 	uint32_t lp_size, lp_encoding;
+	struct lpte old;
+	uint64_t vsid;
 	phandle_t dev, node, root;
 	int idx, len, res;
 
@@ -150,6 +152,18 @@ mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
 
 	moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
 
+	/* Clear any old page table entries */
+	for (idx = 0; idx < moea64_pteg_count*8; idx++) {
+		phyp_pft_hcall(H_READ, 0, idx, 0, 0, &old.pte_hi,
+		    &old.pte_lo, &old.pte_lo);
+		vsid = (old.pte_hi << (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) >> 28;
+		if (vsid == VSID_VRMA || vsid == 0 /* Older VRMA */)
+			continue;
+		
+		if (old.pte_hi & LPTE_VALID)
+			phyp_hcall(H_REMOVE, 0, idx, 0);
+	}
+
 	/*
 	 * Scan the large page size property for PAPR compatible machines.
 	 * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties'
diff --git a/sys/powerpc/pseries/phyp_llan.c b/sys/powerpc/pseries/phyp_llan.c
index 0b25f398fb8..26dbcc07a21 100644
--- a/sys/powerpc/pseries/phyp_llan.c
+++ b/sys/powerpc/pseries/phyp_llan.c
@@ -273,6 +273,9 @@ llan_init(void *xsc)
 	sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 
 	mtx_unlock(&sc->io_lock);
+
+	/* Check for pending receives scheduled before interrupt enable */
+	llan_intr(sc);
 }
 
 static int
@@ -335,6 +338,7 @@ llan_intr(void *xsc)
 	struct mbuf *m;
 
 	mtx_lock(&sc->io_lock);
+restart:
 	phyp_hcall(H_VIO_SIGNAL, sc->unit, 0);
 
 	while ((sc->rx_buf[sc->rx_dma_slot].control >> 7) == sc->rx_valid_val) {
@@ -369,6 +373,15 @@ llan_intr(void *xsc)
 	}
 
 	phyp_hcall(H_VIO_SIGNAL, sc->unit, 1);
+
+	/*
+	 * H_VIO_SIGNAL enables interrupts for future packets only.
+	 * Make sure none were queued between the end of the loop and the
+	 * enable interrupts call.
+	 */
+	if ((sc->rx_buf[sc->rx_dma_slot].control >> 7) == sc->rx_valid_val)
+		goto restart;
+
 	mtx_unlock(&sc->io_lock);
 }
 
diff --git a/sys/sys/buf.h b/sys/sys/buf.h
index 71ef74f129c..72ab61bd43e 100644
--- a/sys/sys/buf.h
+++ b/sys/sys/buf.h
@@ -475,6 +475,8 @@ extern struct	buf *swbuf;		/* Swap I/O buffer headers. */
 extern int	nswbuf;			/* Number of swap I/O buffer headers. */
 extern int	cluster_pbuf_freecnt;	/* Number of pbufs for clusters */
 extern int	vnode_pbuf_freecnt;	/* Number of pbufs for vnode pager */
+extern int	vnode_async_pbuf_freecnt; /* Number of pbufs for vnode pager,
+					     asynchronous reads */
 extern caddr_t	unmapped_buf;
 
 void	runningbufwakeup(struct buf *);
diff --git a/sys/sys/bus.h b/sys/sys/bus.h
index d6dc53585eb..8b1f1736a17 100644
--- a/sys/sys/bus.h
+++ b/sys/sys/bus.h
@@ -522,6 +522,7 @@ void	device_quiet(device_t dev);
 void	device_set_desc(device_t dev, const char* desc);
 void	device_set_desc_copy(device_t dev, const char* desc);
 int	device_set_devclass(device_t dev, const char *classname);
+int	device_set_devclass_fixed(device_t dev, const char *classname);
 int	device_set_driver(device_t dev, driver_t *driver);
 void	device_set_flags(device_t dev, u_int32_t flags);
 void	device_set_softc(device_t dev, void *softc);
diff --git a/sys/sys/elf_common.h b/sys/sys/elf_common.h
index c496a901425..f124b1b1f5e 100644
--- a/sys/sys/elf_common.h
+++ b/sys/sys/elf_common.h
@@ -169,6 +169,8 @@ typedef struct {
 #define	ELFOSABI_OPENVMS	13	/* Open VMS */
 #define	ELFOSABI_NSK		14	/* HP Non-Stop Kernel */
 #define	ELFOSABI_AROS		15	/* Amiga Research OS */
+#define	ELFOSABI_FENIXOS	16	/* FenixOS */
+#define	ELFOSABI_CLOUDABI	17	/* Nuxi CloudABI */
 #define	ELFOSABI_ARM		97	/* ARM */
 #define	ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
 
diff --git a/sys/sys/gpio.h b/sys/sys/gpio.h
index b1f3ba8f889..c8724cbe6e8 100644
--- a/sys/sys/gpio.h
+++ b/sys/sys/gpio.h
@@ -93,5 +93,6 @@ struct gpio_req {
 #define	GPIOGET			_IOWR('G', 3, struct gpio_req)
 #define	GPIOSET			_IOW('G', 4, struct gpio_req)
 #define	GPIOTOGGLE		_IOWR('G', 5, struct gpio_req)
+#define	GPIOSETNAME		_IOW('G', 6, struct gpio_pin)
 
 #endif /* __GPIO_H__ */
diff --git a/sys/sys/gpt.h b/sys/sys/gpt.h
index ecf75368a23..e62a8037545 100644
--- a/sys/sys/gpt.h
+++ b/sys/sys/gpt.h
@@ -150,6 +150,8 @@ struct gpt_ent {
     	{0x4C616265,0x6c00,0x11aa,0xaa,0x11,{0x00,0x30,0x65,0x43,0xec,0xac}}
 #define	GPT_ENT_TYPE_APPLE_TV_RECOVERY	\
     	{0x5265636f,0x7665,0x11AA,0xaa,0x11,{0x00,0x30,0x65,0x43,0xec,0xac}}
+#define	GPT_ENT_TYPE_APPLE_CORE_STORAGE	\
+	{0x53746f72,0x6167,0x11AA,0xaa,0x11,{0x00,0x30,0x65,0x43,0xec,0xac}}
 
 #define	GPT_ENT_TYPE_NETBSD_FFS		\
 	{0x49f48d5a,0xb10e,0x11dc,0xb9,0x9b,{0x00,0x19,0xd1,0x87,0x96,0x48}}
diff --git a/sys/sys/gzio.h b/sys/sys/gzio.h
new file mode 100644
index 00000000000..c61c2818f2e
--- /dev/null
+++ b/sys/sys/gzio.h
@@ -0,0 +1,49 @@
+/*-
+ * Copyright (c) 2014 Mark Johnston <markj@FreeBSD.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _SYS__GZIO_H_
+#define _SYS__GZIO_H_
+
+#ifdef _KERNEL
+
+enum gzio_mode {
+	GZIO_DEFLATE,
+};
+
+typedef int (*gzio_cb)(void *, size_t, off_t, void *);
+
+struct gzio_stream;
+
+struct gzio_stream *gzio_init(gzio_cb cb, enum gzio_mode, size_t, int, void *);
+int		gzio_write(struct gzio_stream *, void *, u_int);
+int		gzio_flush(struct gzio_stream *);
+void		gzio_fini(struct gzio_stream *);
+
+#endif /* _KERNEL */
+
+#endif /* _SYS__GZIO_H_ */
diff --git a/sys/sys/mbuf.h b/sys/sys/mbuf.h
index 4b4a67776d2..6830c5918b3 100644
--- a/sys/sys/mbuf.h
+++ b/sys/sys/mbuf.h
@@ -1190,6 +1190,15 @@ rt_m_getfib(struct mbuf *m)
 	((_m)->m_pkthdr.fibnum) = (_fib);				\
 } while (0)
 
+/* flags passed as first argument for "m_ether_tcpip_hash()" */
+#define	MBUF_HASHFLAG_L2	(1 << 2)
+#define	MBUF_HASHFLAG_L3	(1 << 3)
+#define	MBUF_HASHFLAG_L4	(1 << 4)
+
+/* mbuf hashing helper routines */
+uint32_t	m_ether_tcpip_hash_init(void);
+uint32_t	m_ether_tcpip_hash(const uint32_t, const struct mbuf *, const uint32_t);
+
 #ifdef MBUF_PROFILING
  void m_profile(struct mbuf *m);
  #define M_PROFILE(m) m_profile(m)
diff --git a/sys/sys/param.h b/sys/sys/param.h
index 582a52d321d..34052f56ff7 100644
--- a/sys/sys/param.h
+++ b/sys/sys/param.h
@@ -58,7 +58,7 @@
  *		in the range 5 to 9.
  */
 #undef __FreeBSD_version
-#define __FreeBSD_version 1100062	/* Master, propagated to newvers */
+#define __FreeBSD_version 1100064	/* Master, propagated to newvers */
 
 /*
  * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD,
diff --git a/sys/sys/sbuf.h b/sys/sys/sbuf.h
index 9816a4cd6c5..40de36e38d3 100644
--- a/sys/sys/sbuf.h
+++ b/sys/sys/sbuf.h
@@ -48,6 +48,7 @@ struct sbuf {
 	ssize_t		 s_len;		/* current length of string */
 #define	SBUF_FIXEDLEN	0x00000000	/* fixed length buffer (default) */
 #define	SBUF_AUTOEXTEND	0x00000001	/* automatically extend buffer */
+#define	SBUF_INCLUDENUL	0x00000002	/* nulterm byte is counted in len */
 #define	SBUF_USRFLAGMSK	0x0000ffff	/* mask of flags the user may specify */
 #define	SBUF_DYNAMIC	0x00010000	/* s_buf must be freed */
 #define	SBUF_FINISHED	0x00020000	/* set by sbuf_finish() */
@@ -64,6 +65,9 @@ __BEGIN_DECLS
 struct sbuf	*sbuf_new(struct sbuf *, char *, int, int);
 #define		 sbuf_new_auto()				\
 	sbuf_new(NULL, NULL, 0, SBUF_AUTOEXTEND)
+int		 sbuf_get_flags(struct sbuf *);
+void		 sbuf_clear_flags(struct sbuf *, int);
+void		 sbuf_set_flags(struct sbuf *, int);
 void		 sbuf_clear(struct sbuf *);
 int		 sbuf_setpos(struct sbuf *, ssize_t);
 int		 sbuf_bcat(struct sbuf *, const void *, size_t);
diff --git a/sys/sys/sysctl.h b/sys/sys/sysctl.h
index f3173c28707..988dbae9408 100644
--- a/sys/sys/sysctl.h
+++ b/sys/sys/sysctl.h
@@ -186,6 +186,7 @@ struct sysctl_oid {
 
 #define	SYSCTL_IN(r, p, l)	(r->newfunc)(r, p, l)
 #define	SYSCTL_OUT(r, p, l)	(r->oldfunc)(r, p, l)
+#define	SYSCTL_OUT_STR(r, p)	(r->oldfunc)(r, p, strlen(p) + 1)
 
 int sysctl_handle_int(SYSCTL_HANDLER_ARGS);
 int sysctl_msec_to_ticks(SYSCTL_HANDLER_ARGS);
diff --git a/sys/sys/timepps.h b/sys/sys/timepps.h
index 8083f33a160..ae4b84d17d7 100644
--- a/sys/sys/timepps.h
+++ b/sys/sys/timepps.h
@@ -133,6 +133,8 @@ struct pps_kcbind_args {
 
 #ifdef _KERNEL
 
+struct mtx;
+
 struct pps_state {
 	/* Capture information. */
 	struct timehands *capth;
@@ -140,6 +142,9 @@ struct pps_state {
 	unsigned	capgen;
 	unsigned	capcount;
 
+	/* pointer to mutex protecting this state, if any */
+	struct mtx	*mtx;
+
 	/* State information. */
 	pps_params_t	ppsparam;
 	pps_info_t	ppsinfo;
diff --git a/sys/vm/uma_core.c b/sys/vm/uma_core.c
index 5e8eb605229..2bb6260c904 100644
--- a/sys/vm/uma_core.c
+++ b/sys/vm/uma_core.c
@@ -3451,6 +3451,7 @@ sysctl_vm_zone_stats(SYSCTL_HANDLER_ARGS)
 	if (error != 0)
 		return (error);
 	sbuf_new_for_sysctl(&sbuf, NULL, 128, req);
+	sbuf_clear_flags(&sbuf, SBUF_INCLUDENUL);
 
 	count = 0;
 	rw_rlock(&uma_rwlock);
diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c
index ba9f45ead24..a1d6701a3f2 100644
--- a/sys/vm/vm_object.c
+++ b/sys/vm/vm_object.c
@@ -1626,7 +1626,7 @@ vm_object_backing_scan(vm_object_t object, int op)
 					p = next;
 					continue;
 				}
-				VM_OBJECT_WLOCK(backing_object);
+				VM_OBJECT_WUNLOCK(backing_object);
 				VM_OBJECT_WUNLOCK(object);
 				VM_WAIT;
 				VM_OBJECT_WLOCK(object);
diff --git a/sys/vm/vm_pager.c b/sys/vm/vm_pager.c
index 65193c3d31a..5f69468c7a1 100644
--- a/sys/vm/vm_pager.c
+++ b/sys/vm/vm_pager.c
@@ -215,6 +215,7 @@ vm_pager_bufferinit()
 
 	cluster_pbuf_freecnt = nswbuf / 2;
 	vnode_pbuf_freecnt = nswbuf / 2 + 1;
+	vnode_async_pbuf_freecnt = nswbuf / 2;
 }
 
 /*
diff --git a/sys/vm/vm_reserv.c b/sys/vm/vm_reserv.c
index 23980e81812..585a7494060 100644
--- a/sys/vm/vm_reserv.c
+++ b/sys/vm/vm_reserv.c
@@ -428,7 +428,7 @@ vm_reserv_alloc_contig(vm_object_t object, vm_pindex_t pindex, u_long npages,
 		msucc = TAILQ_FIRST(&object->memq);
 	if (msucc != NULL) {
 		KASSERT(msucc->pindex > pindex,
-		    ("vm_reserv_alloc_page: pindex already allocated"));
+		    ("vm_reserv_alloc_contig: pindex already allocated"));
 		rv = vm_reserv_from_page(msucc);
 		if (rv->object == object && vm_reserv_has_pindex(rv, pindex))
 			goto found;
diff --git a/sys/vm/vnode_pager.c b/sys/vm/vnode_pager.c
index 3695d237278..f5bee64662f 100644
--- a/sys/vm/vnode_pager.c
+++ b/sys/vm/vnode_pager.c
@@ -104,6 +104,7 @@ struct pagerops vnodepagerops = {
 };
 
 int vnode_pbuf_freecnt;
+int vnode_async_pbuf_freecnt;
 
 /* Create the VM system backing object for this vnode */
 int
@@ -726,7 +727,7 @@ vnode_pager_local_getpages0(struct vnode *vp, vm_page_t *m, int bytecount,
 	/*
 	 * The requested page has valid blocks.  Invalid part can only
 	 * exist at the end of file, and the page is made fully valid
-	 * by zeroing in vm_pager_getpages().  Free non-requested
+	 * by zeroing in vm_pager_get_pages().  Free non-requested
 	 * pages, since no i/o is done to read its content.
 	 */
 	if (mreq->valid != 0) {
@@ -751,7 +752,7 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 {
 	vm_object_t object;
 	off_t foff;
-	int i, j, size, bsize, first;
+	int i, j, size, bsize, first, *freecnt;
 	daddr_t firstaddr, reqblock;
 	struct bufobj *bo;
 	int runpg;
@@ -771,6 +772,10 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 	bsize = vp->v_mount->mnt_stat.f_iosize;
 	foff = IDX_TO_OFF(m[reqpage]->pindex);
 
+	freecnt = iodone != NULL ?
+	    &vnode_async_pbuf_freecnt : &vnode_pbuf_freecnt;
+	bp = getpbuf(freecnt);
+
 	/*
 	 * Get the underlying device blocks for the file with VOP_BMAP().
 	 * If the file system doesn't support VOP_BMAP, use old way of
@@ -778,8 +783,8 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 	 */
 	error = VOP_BMAP(vp, foff / bsize, &bo, &reqblock, NULL, NULL);
 	if (error == EOPNOTSUPP) {
+		relpbuf(bp, freecnt);
 		VM_OBJECT_WLOCK(object);
-		
 		for (i = 0; i < count; i++)
 			if (i != reqpage) {
 				vm_page_lock(m[i]);
@@ -792,6 +797,7 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 		VM_OBJECT_WUNLOCK(object);
 		return (error);
 	} else if (error != 0) {
+		relpbuf(bp, freecnt);
 		vm_pager_free_nonreq(object, m, reqpage, count);
 		return (VM_PAGER_ERROR);
 
@@ -802,6 +808,7 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 		 */
 	} else if ((PAGE_SIZE / bsize) > 1 &&
 	    (vp->v_mount->mnt_stat.f_type != nfs_mount_type)) {
+		relpbuf(bp, freecnt);
 		vm_pager_free_nonreq(object, m, reqpage, count);
 		PCPU_INC(cnt.v_vnodein);
 		PCPU_INC(cnt.v_vnodepgsin);
@@ -820,9 +827,11 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 	 * media.
 	 */
 	if (m[reqpage]->valid == VM_PAGE_BITS_ALL) {
+		relpbuf(bp, freecnt);
 		vm_pager_free_nonreq(object, m, reqpage, count);
 		return (VM_PAGER_OK);
 	} else if (reqblock == -1) {
+		relpbuf(bp, freecnt);
 		pmap_zero_page(m[reqpage]);
 		KASSERT(m[reqpage]->dirty == 0,
 		    ("vnode_pager_generic_getpages: page %p is dirty", m));
@@ -853,6 +862,7 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 	for (first = 0, i = 0; i < count; i = runend) {
 		if (vnode_pager_addr(vp, IDX_TO_OFF(m[i]->pindex), &firstaddr,
 		    &runpg) != 0) {
+			relpbuf(bp, freecnt);
 			VM_OBJECT_WLOCK(object);
 			for (; i < count; i++)
 				if (i != reqpage) {
@@ -941,7 +951,6 @@ vnode_pager_generic_getpages(struct vnode *vp, vm_page_t *m, int bytecount,
 		size = (size + secmask) & ~secmask;
 	}
 
-	bp = getpbuf(&vnode_pbuf_freecnt);
 	bp->b_kvaalloc = bp->b_data;
 
 	/*
@@ -1016,7 +1025,7 @@ vnode_pager_generic_getpages_done_async(struct buf *bp)
 		bp->b_pages[i] = NULL;
 	bp->b_vp = NULL;
 	pbrelbo(bp);
-	relpbuf(bp, &vnode_pbuf_freecnt);
+	relpbuf(bp, &vnode_async_pbuf_freecnt);
 }
 
 static int
diff --git a/sys/x86/include/apicvar.h b/sys/x86/include/apicvar.h
index 048b6465012..0ed65de5600 100644
--- a/sys/x86/include/apicvar.h
+++ b/sys/x86/include/apicvar.h
@@ -111,11 +111,8 @@
 #define	IPI_INVLPG	(APIC_IPI_INTS + 2)
 #define	IPI_INVLRNG	(APIC_IPI_INTS + 3)
 #define	IPI_INVLCACHE	(APIC_IPI_INTS + 4)
-#ifdef __i386__
-#define	IPI_LAZYPMAP	(APIC_IPI_INTS + 5)	/* Lazy pmap release. */
-#endif
 /* Vector to handle bitmap based IPIs */
-#define	IPI_BITMAP_VECTOR	(APIC_IPI_INTS + 6) 
+#define	IPI_BITMAP_VECTOR	(APIC_IPI_INTS + 5) 
 
 /* IPIs handled by IPI_BITMAP_VECTOR */
 #define	IPI_AST		0 	/* Generate software trap. */
@@ -124,8 +121,15 @@
 #define IPI_BITMAP_LAST IPI_HARDCLOCK
 #define IPI_IS_BITMAPED(x) ((x) <= IPI_BITMAP_LAST)
 
-#define	IPI_STOP	(APIC_IPI_INTS + 7)	/* Stop CPU until restarted. */
-#define	IPI_SUSPEND	(APIC_IPI_INTS + 8)	/* Suspend CPU until restarted. */
+#define	IPI_STOP	(APIC_IPI_INTS + 6)	/* Stop CPU until restarted. */
+#define	IPI_SUSPEND	(APIC_IPI_INTS + 7)	/* Suspend CPU until restarted. */
+#ifdef __i386__
+#define	IPI_LAZYPMAP	(APIC_IPI_INTS + 8)	/* Lazy pmap release. */
+#define	IPI_DYN_FIRST	(APIC_IPI_INTS + 9)
+#else
+#define	IPI_DYN_FIRST	(APIC_IPI_INTS + 8)
+#endif
+#define	IPI_DYN_LAST	(254)			/* IPIs allocated at runtime */
 
 /*
  * IPI_STOP_HARD does not need to occupy a slot in the IPI vector space since
@@ -224,6 +228,8 @@ struct apic_ops {
 	void	(*ipi_raw)(register_t, u_int);
 	void	(*ipi_vectored)(u_int, int);
 	int	(*ipi_wait)(int);
+	int	(*ipi_alloc)(inthand_t *ipifunc);
+	void	(*ipi_free)(int vector);
 
 	/* LVT */
 	int	(*set_lvt_mask)(u_int, u_int, u_char);
@@ -396,6 +402,20 @@ lapic_ipi_wait(int delay)
 	return (apic_ops.ipi_wait(delay));
 }
 
+static inline int
+lapic_ipi_alloc(inthand_t *ipifunc)
+{
+
+	return (apic_ops.ipi_alloc(ipifunc));
+}
+
+static inline void
+lapic_ipi_free(int vector)
+{
+
+	return (apic_ops.ipi_free(vector));
+}
+
 static inline int
 lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked)
 {
diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c
index 51955fa0ac5..e0656ef1b8d 100644
--- a/sys/x86/x86/local_apic.c
+++ b/sys/x86/x86/local_apic.c
@@ -303,6 +303,8 @@ static int 	native_lapic_set_lvt_polarity(u_int apic_id, u_int lvt,
 		    enum intr_polarity pol);
 static int 	native_lapic_set_lvt_triggermode(u_int apic_id, u_int lvt,
 		    enum intr_trigger trigger);
+static int	native_lapic_ipi_alloc(inthand_t *ipifunc);
+static void	native_lapic_ipi_free(int vector);
 
 struct apic_ops apic_ops = {
 	.create			= native_lapic_create,
@@ -329,6 +331,8 @@ struct apic_ops apic_ops = {
 	.ipi_raw		= native_lapic_ipi_raw,
 	.ipi_vectored		= native_lapic_ipi_vectored,
 	.ipi_wait		= native_lapic_ipi_wait,
+	.ipi_alloc		= native_lapic_ipi_alloc,
+	.ipi_free		= native_lapic_ipi_free,
 #endif
 	.set_lvt_mask		= native_lapic_set_lvt_mask,
 	.set_lvt_mode		= native_lapic_set_lvt_mode,
@@ -1761,4 +1765,60 @@ native_lapic_ipi_vectored(u_int vector, int dest)
 	}
 #endif /* DETECT_DEADLOCK */
 }
+
+/*
+ * Since the IDT is shared by all CPUs the IPI slot update needs to be globally
+ * visible.
+ *
+ * Consider the case where an IPI is generated immediately after allocation:
+ *     vector = lapic_ipi_alloc(ipifunc);
+ *     ipi_selected(other_cpus, vector);
+ *
+ * In xAPIC mode a write to ICR_LO has serializing semantics because the
+ * APIC page is mapped as an uncached region. In x2APIC mode there is an
+ * explicit 'mfence' before the ICR MSR is written. Therefore in both cases
+ * the IDT slot update is globally visible before the IPI is delivered.
+ */
+static int
+native_lapic_ipi_alloc(inthand_t *ipifunc)
+{
+	struct gate_descriptor *ip;
+	long func;
+	int idx, vector;
+
+	KASSERT(ipifunc != &IDTVEC(rsvd), ("invalid ipifunc %p", ipifunc));
+
+	vector = -1;
+	mtx_lock_spin(&icu_lock);
+	for (idx = IPI_DYN_FIRST; idx <= IPI_DYN_LAST; idx++) {
+		ip = &idt[idx];
+		func = (ip->gd_hioffset << 16) | ip->gd_looffset;
+		if (func == (uintptr_t)&IDTVEC(rsvd)) {
+			vector = idx;
+			setidt(vector, ipifunc, SDT_APIC, SEL_KPL, GSEL_APIC);
+			break;
+		}
+	}
+	mtx_unlock_spin(&icu_lock);
+	return (vector);
+}
+
+static void
+native_lapic_ipi_free(int vector)
+{
+	struct gate_descriptor *ip;
+	long func;
+
+	KASSERT(vector >= IPI_DYN_FIRST && vector <= IPI_DYN_LAST,
+	    ("%s: invalid vector %d", __func__, vector));
+
+	mtx_lock_spin(&icu_lock);
+	ip = &idt[vector];
+	func = (ip->gd_hioffset << 16) | ip->gd_looffset;
+	KASSERT(func != (uintptr_t)&IDTVEC(rsvd),
+	    ("invalid idtfunc %#lx", func));
+	setidt(vector, &IDTVEC(rsvd), SDT_APICT, SEL_KPL, GSEL_APIC);
+	mtx_unlock_spin(&icu_lock);
+}
+
 #endif /* SMP */
diff --git a/sys/x86/xen/xen_apic.c b/sys/x86/xen/xen_apic.c
index ed86734f888..8e831842ee6 100644
--- a/sys/x86/xen/xen_apic.c
+++ b/sys/x86/xen/xen_apic.c
@@ -311,7 +311,22 @@ xen_pv_lapic_ipi_wait(int delay)
 	XEN_APIC_UNSUPPORTED;
 	return (0);
 }
-#endif
+
+static int
+xen_pv_lapic_ipi_alloc(inthand_t *ipifunc)
+{
+
+	XEN_APIC_UNSUPPORTED;
+	return (-1);
+}
+
+static void
+xen_pv_lapic_ipi_free(int vector)
+{
+
+	XEN_APIC_UNSUPPORTED;
+}
+#endif	/* SMP */
 
 static int
 xen_pv_lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked)
@@ -372,6 +387,8 @@ struct apic_ops xen_apic_ops = {
 	.ipi_raw		= xen_pv_lapic_ipi_raw,
 	.ipi_vectored		= xen_pv_lapic_ipi_vectored,
 	.ipi_wait		= xen_pv_lapic_ipi_wait,
+	.ipi_alloc		= xen_pv_lapic_ipi_alloc,
+	.ipi_free		= xen_pv_lapic_ipi_free,
 #endif
 	.set_lvt_mask		= xen_pv_lapic_set_lvt_mask,
 	.set_lvt_mode		= xen_pv_lapic_set_lvt_mode,
diff --git a/sys/xen/xenbus/xenbusb.c b/sys/xen/xenbus/xenbusb.c
index 1f84795e64f..4853b3a211a 100644
--- a/sys/xen/xenbus/xenbusb.c
+++ b/sys/xen/xenbus/xenbusb.c
@@ -330,7 +330,7 @@ xenbusb_device_sysctl_handler(SYSCTL_HANDLER_ARGS)
 	default:
 		return (EINVAL);
 	}
-	return (SYSCTL_OUT(req, value, strlen(value)));
+	return (SYSCTL_OUT_STR(req, value));
 }
 
 /**
diff --git a/tools/regression/usr.bin/env/regress-env.rgdata b/tools/regression/usr.bin/env/regress-env.rgdata
index 9f562e9c9e5..90c296e5c60 100644
--- a/tools/regression/usr.bin/env/regress-env.rgdata
+++ b/tools/regression/usr.bin/env/regress-env.rgdata
@@ -235,9 +235,9 @@ gblenv=OUTSIDEVAR=OutsideValue
    script:/bin/echo "=== set ==="
    script:# drop some environment variables that 'sh' itself sets, and
    script:# then have 'set' print out all remaining environment variables.
-   script:# (can't unset OPTIND, so we use grep to get rid of that)
-   script:unset -v IFS PS1 PS2 PPID
-   script:set | grep -v '^OPTIND=' | sort
+   script:# (can't unset OPTIND/PWD, so we use grep to get rid of those)
+   script:unset -v IFS PS1 PS2 PS4 PPID
+   script:set | grep -Ev '^(OPTIND|PWD)=' | sort
    stdout:=== set ===
    stdout:PATH=/bin:/usr/bin:/Not
    stdout:TESTVAR=SbValue
@@ -382,3 +382,36 @@ gblenv=OUTSIDEVAR=OutsideValue
    setenv:D=D_ThisisAlongstring_D1
    stdout:A_ThisisAlongstring_A1 B_ThisisAlongstring_B1 C_ThisisAlongstring_C1 D_ThisisAlongstring_D1 ScriptName: [%-script.pathname-%]
 [run]
+
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -S '\c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -S'\c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -u foo -S '\c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -u foo -S'\c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -S '-u bar \c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -S'-u bar \c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -u foo -S '-u bar \c' >/dev/null
+[run]
+[test]
+   sb_args:sh
+   script:[%-testpgm.pathname-%] -u foo -S'-u bar \c' >/dev/null
+[run]
diff --git a/tools/regression/usr.bin/env/regress-sb.rb b/tools/regression/usr.bin/env/regress-sb.rb
index f6333aa67c6..b43ddd3b6aa 100644
--- a/tools/regression/usr.bin/env/regress-sb.rb
+++ b/tools/regression/usr.bin/env/regress-sb.rb
@@ -346,6 +346,7 @@ class RGTestOptions
 	#   "just anything" that matches the general pattern.  There are
 	#   no blanks in the recognized values, but I use an x-tended
 	#   regexp and then add blanks to make it more readable.
+	optval.gsub!(/\[%- testpgm\.pathname -%\]/x, $testpgm)
 	optval.gsub!(/\[%- testpgm\.basename -%\]/x, File.basename($testpgm))
 	optval.gsub!(/\[%- script\.pathname  -%\]/x, $scriptfile)
 
diff --git a/usr.bin/Makefile b/usr.bin/Makefile
index 618170c58d4..aee201a7527 100644
--- a/usr.bin/Makefile
+++ b/usr.bin/Makefile
@@ -196,12 +196,9 @@ SUBDIR=	${_addr2line} \
 	write \
 	xargs \
 	xinstall \
-	${_xlint} \
 	xo \
-	${_xstr} \
 	xz \
 	xzdec \
-	${_yacc} \
 	yes \
 	${_ypcat} \
 	${_ypmatch} \
diff --git a/usr.bin/ctlstat/ctlstat.8 b/usr.bin/ctlstat/ctlstat.8
index 22da2bfd2a5..8351d9a372b 100644
--- a/usr.bin/ctlstat/ctlstat.8
+++ b/usr.bin/ctlstat/ctlstat.8
@@ -34,7 +34,7 @@
 .\" $Id: //depot/users/kenm/FreeBSD-test2/usr.bin/ctlstat/ctlstat.8#2 $
 .\" $FreeBSD$
 .\"
-.Dd March 6, 2013
+.Dd March 8, 2015
 .Dt CTLSTAT 8
 .Os
 .Sh NAME
@@ -69,7 +69,7 @@ and a combined total column that also includes non I/O operations.
 .It Fl c Ar count
 Display statistics this many times.
 .It Fl C
-Disable display of CPU statistics.
+Disable CPU statistics display.
 .It Fl d
 Display DMA operation time (latency) instead of overall I/O time (latency).
 .It Fl D
diff --git a/usr.bin/env/envopts.c b/usr.bin/env/envopts.c
index f8214305cc6..57400622912 100644
--- a/usr.bin/env/envopts.c
+++ b/usr.bin/env/envopts.c
@@ -372,9 +372,9 @@ split_spaces(const char *str, int *origind, int *origc, char ***origv)
 	*nextarg = NULL;
 
 	/* Update optind/argc/argv in the calling routine */
-	*origind = 1;
-	*origc += addcount;
+	*origc += addcount - *origind + 1;
 	*origv = newargv;
+	*origind = 1;
 }
 
 /**
diff --git a/usr.bin/m4/misc.c b/usr.bin/m4/misc.c
index 19594486e95..30fb6909484 100644
--- a/usr.bin/m4/misc.c
+++ b/usr.bin/m4/misc.c
@@ -64,6 +64,7 @@ unsigned char *bbase[MAXINP];		/* the base for each ilevel    */
 unsigned char *bp;			/* first available character   */
 unsigned char *endpbb;			/* end of push-back buffer     */
 
+static void *reallocarray(void *, size_t, size_t);
 
 /*
  * find the index of second str in the first str.
@@ -352,23 +353,6 @@ xrealloc(void *old, size_t n, const char *fmt, ...)
 	return p;
 }
 
-/*
- * This is sqrt(SIZE_MAX+1), as s1*s2 <= SIZE_MAX
- * if both s1 < MUL_NO_OVERFLOW and s2 < MUL_NO_OVERFLOW
- */
-#define MUL_NO_OVERFLOW	(1UL << (sizeof(size_t) * 4))
-
-static void *
-reallocarray(void *optr, size_t nmemb, size_t size)
-{
-	if ((nmemb >= MUL_NO_OVERFLOW || size >= MUL_NO_OVERFLOW) &&
-	    nmemb > 0 && SIZE_MAX / nmemb < size) {
-		errno = ENOMEM;
-		return NULL;
-	}
-	return realloc(optr, size * nmemb);
-}
-
 void *
 xreallocarray(void *old, size_t s1, size_t s2, const char *fmt, ...)
 {
@@ -483,3 +467,37 @@ dump_buffer(FILE *f, size_t m)
 	for (s = bp; s-buf > (long)m;)
 		fputc(*--s, f);
 }
+
+/*	$OpenBSD: reallocarray.c,v 1.2 2014/12/08 03:45:00 bcook Exp $	*/
+/*
+ * Copyright (c) 2008 Otto Moerbeek <otto@drijf.net>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This is sqrt(SIZE_MAX+1), as s1*s2 <= SIZE_MAX
+ * if both s1 < MUL_NO_OVERFLOW and s2 < MUL_NO_OVERFLOW
+ */
+#define MUL_NO_OVERFLOW	((size_t)1 << (sizeof(size_t) * 4))
+
+void *
+reallocarray(void *optr, size_t nmemb, size_t size)
+{
+	if ((nmemb >= MUL_NO_OVERFLOW || size >= MUL_NO_OVERFLOW) &&
+	    nmemb > 0 && SIZE_MAX / nmemb < size) {
+		errno = ENOMEM;
+		return NULL;
+	}
+	return realloc(optr, size * nmemb);
+}
diff --git a/usr.bin/procstat/Makefile b/usr.bin/procstat/Makefile
index 1744fe08321..211ce1a1431 100644
--- a/usr.bin/procstat/Makefile
+++ b/usr.bin/procstat/Makefile
@@ -8,6 +8,7 @@ SRCS=	procstat.c		\
 	procstat_basic.c	\
 	procstat_bin.c		\
 	procstat_cred.c		\
+	procstat_cs.c		\
 	procstat_files.c	\
 	procstat_kstack.c	\
 	procstat_rlimit.c	\
diff --git a/usr.bin/procstat/procstat.1 b/usr.bin/procstat/procstat.1
index f33c746bc73..3ef39ebc0c2 100644
--- a/usr.bin/procstat/procstat.1
+++ b/usr.bin/procstat/procstat.1
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd May 16, 2014
+.Dd March 10, 2015
 .Dt PROCSTAT 1
 .Os
 .Sh NAME
@@ -35,7 +35,7 @@
 .Nm
 .Op Fl CHhn
 .Op Fl w Ar interval
-.Op Fl b | c | e | f | i | j | k | l | r | s | t | v | x
+.Op Fl b | c | e | f | i | j | k | l | r | s | S | t | v | x
 .Op Fl a | Ar pid | Ar core ...
 .Sh DESCRIPTION
 The
@@ -75,6 +75,8 @@ Display resource limits for the process.
 Display resource usage information for the process.
 .It Fl s
 Display security credential information for the process.
+.It Fl S
+Display the cpuset information for the thread.
 .It Fl t
 Display thread information for the process.
 .It Fl v
@@ -108,9 +110,16 @@ flag may be used to request per-thread statistics rather than per-process
 statistics for some options.
 For those options, the second field in the table will list the thread ID
 to which the row of information corresponds.
+The
+.Fl H
+flag is implied for the
+.Fl S
+mode.
 .Pp
-Some information, such as VM and file descriptor information, is available
+Information for VM, file descriptor, and cpuset options is available
 only to the owner of a process or the superuser.
+A cpuset value displayed as -1 means that the information is either invalid
+or not available.
 .Ss Binary Information
 Display the process ID, command, and path to the process binary:
 .Pp
diff --git a/usr.bin/procstat/procstat.c b/usr.bin/procstat/procstat.c
index de0237f387c..48a2135180a 100644
--- a/usr.bin/procstat/procstat.c
+++ b/usr.bin/procstat/procstat.c
@@ -40,7 +40,7 @@
 #include "procstat.h"
 
 static int aflag, bflag, cflag, eflag, fflag, iflag, jflag, kflag, lflag, rflag;
-static int sflag, tflag, vflag, xflag;
+static int sflag, tflag, vflag, xflag, Sflag;
 int	hflag, nflag, Cflag, Hflag;
 
 static void
@@ -50,7 +50,7 @@ usage(void)
 	fprintf(stderr, "usage: procstat [-CHhn] [-M core] [-N system] "
 	    "[-w interval] \n");
 	fprintf(stderr, "                [-b | -c | -e | -f | -i | -j | -k | "
-	    "-l | -r | -s | -t | -v | -x]\n");
+	    "-l | -r | -s | -S | -t | -v | -x]\n");
 	fprintf(stderr, "                [-a | pid | core ...]\n");
 	exit(EX_USAGE);
 }
@@ -85,6 +85,8 @@ procstat(struct procstat *prstat, struct kinfo_proc *kipp)
 		procstat_vm(prstat, kipp);
 	else if (xflag)
 		procstat_auxv(prstat, kipp);
+	else if (Sflag)
+		procstat_cs(prstat, kipp);
 	else
 		procstat_basic(kipp);
 }
@@ -128,7 +130,7 @@ main(int argc, char *argv[])
 
 	interval = 0;
 	memf = nlistf = NULL;
-	while ((ch = getopt(argc, argv, "CHN:M:abcefijklhrstvw:x")) != -1) {
+	while ((ch = getopt(argc, argv, "CHN:M:abcefijklhrsStvw:x")) != -1) {
 		switch (ch) {
 		case 'C':
 			Cflag++;
@@ -144,6 +146,9 @@ main(int argc, char *argv[])
 		case 'N':
 			nlistf = optarg;
 			break;
+		case 'S':
+			Sflag++;
+			break;
 		case 'a':
 			aflag++;
 			break;
@@ -228,7 +233,7 @@ main(int argc, char *argv[])
 
 	/* We require that either 0 or 1 mode flags be set. */
 	tmp = bflag + cflag + eflag + fflag + iflag + jflag + (kflag ? 1 : 0) +
-	    lflag + rflag + sflag + tflag + vflag + xflag;
+	    lflag + rflag + sflag + tflag + vflag + xflag + Sflag;
 	if (!(tmp == 0 || tmp == 1))
 		usage();
 
diff --git a/usr.bin/procstat/procstat.h b/usr.bin/procstat/procstat.h
index 98282b3ac1e..50795219111 100644
--- a/usr.bin/procstat/procstat.h
+++ b/usr.bin/procstat/procstat.h
@@ -39,6 +39,7 @@ void	procstat_auxv(struct procstat *prstat, struct kinfo_proc *kipp);
 void	procstat_basic(struct kinfo_proc *kipp);
 void	procstat_bin(struct procstat *prstat, struct kinfo_proc *kipp);
 void	procstat_cred(struct procstat *prstat, struct kinfo_proc *kipp);
+void	procstat_cs(struct procstat *prstat, struct kinfo_proc *kipp);
 void	procstat_env(struct procstat *prstat, struct kinfo_proc *kipp);
 void	procstat_files(struct procstat *prstat, struct kinfo_proc *kipp);
 void	procstat_kstack(struct procstat *prstat, struct kinfo_proc *kipp,
diff --git a/usr.bin/procstat/procstat_cs.c b/usr.bin/procstat/procstat_cs.c
new file mode 100644
index 00000000000..8ccf1ea8222
--- /dev/null
+++ b/usr.bin/procstat/procstat_cs.c
@@ -0,0 +1,108 @@
+/*-
+ * Copyright (c) 2007 Robert N. M. Watson
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/param.h>
+#include <sys/cpuset.h>
+#include <sys/sysctl.h>
+#include <sys/user.h>
+
+#include <err.h>
+#include <errno.h>
+#include <libprocstat.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "procstat.h"
+
+void
+procstat_cs(struct procstat *procstat, struct kinfo_proc *kipp)
+{
+	cpusetid_t cs;
+	cpuset_t mask;
+	struct kinfo_proc *kip;
+	unsigned int count, i;
+	int once, twice, lastcpu, cpu;
+
+	if (!hflag)
+		printf("%5s %6s %-16s %-16s %2s %4s %-7s\n", "PID",
+		    "TID", "COMM", "TDNAME", "CPU", "CSID", "CPU MASK");
+
+	kip = procstat_getprocs(procstat, KERN_PROC_PID | KERN_PROC_INC_THREAD,
+	    kipp->ki_pid, &count);
+	if (kip == NULL)
+		return;
+	kinfo_proc_sort(kip, count);
+	for (i = 0; i < count; i++) {
+		kipp = &kip[i];
+		printf("%5d ", kipp->ki_pid);
+		printf("%6d ", kipp->ki_tid);
+		printf("%-16s ", strlen(kipp->ki_comm) ?
+		    kipp->ki_comm : "-");
+		printf("%-16s ", (strlen(kipp->ki_tdname) &&
+		    (strcmp(kipp->ki_comm, kipp->ki_tdname) != 0)) ?
+		    kipp->ki_tdname : "-");
+		if (kipp->ki_oncpu != 255)
+			printf("%3d ", kipp->ki_oncpu);
+		else if (kipp->ki_lastcpu != 255)
+			printf("%3d ", kipp->ki_lastcpu);
+		else
+			printf("%3s ", "-");
+		if (cpuset_getid(CPU_LEVEL_CPUSET, CPU_WHICH_TID,
+		    kipp->ki_tid, &cs) != 0) {
+			cs = CPUSET_INVALID;
+		}
+		printf("%4d ", cs);
+		if ((cs != CPUSET_INVALID) && 
+		    (cpuset_getaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID,
+		    kipp->ki_tid, sizeof(mask), &mask) == 0)) {
+			lastcpu = -1;
+			once = 0;
+			twice = 0;
+			for (cpu = 0; cpu < CPU_SETSIZE; cpu++) {
+				if (CPU_ISSET(cpu, &mask)) {
+					if (once == 0) {
+						printf("%d", cpu);
+						once = 1;
+					} else if (cpu == lastcpu + 1) {
+						twice = 1;
+					} else if (twice == 1) {
+						printf("-%d,%d", lastcpu, cpu);
+						twice = 0;
+					} else
+						printf(",%d", cpu);
+					lastcpu = cpu;
+				}
+			}
+			if (once && twice)
+				printf("-%d", lastcpu);
+		}
+		printf("\n");
+	}
+	procstat_freeprocs(procstat, kip);
+}
diff --git a/usr.bin/rlogin/Makefile b/usr.bin/rlogin/Makefile
index 195bffbb0b1..e41417dab31 100644
--- a/usr.bin/rlogin/Makefile
+++ b/usr.bin/rlogin/Makefile
@@ -5,6 +5,5 @@ PROG=	rlogin
 
 BINOWN=	root
 BINMODE=4555
-PRECIOUSPROG=
 
 .include <bsd.prog.mk>
diff --git a/usr.bin/rlogin/rlogin.c b/usr.bin/rlogin/rlogin.c
index 646630b366b..26692554958 100644
--- a/usr.bin/rlogin/rlogin.c
+++ b/usr.bin/rlogin/rlogin.c
@@ -131,7 +131,7 @@ main(int argc, char *argv[])
 	long omask;
 	int argoff, ch, dflag, Dflag, one;
 	uid_t uid;
-	char *host, *localname, *p, *user, term[1024];
+	char *host, *localname, *p, *user, term[1024] = "network";
 	speed_t ospeed;
 	struct sockaddr_storage ss;
 	socklen_t sslen;
diff --git a/usr.bin/rsh/Makefile b/usr.bin/rsh/Makefile
index 5c6951cd074..d7c26a5e71b 100644
--- a/usr.bin/rsh/Makefile
+++ b/usr.bin/rsh/Makefile
@@ -8,6 +8,5 @@ WARNS?=	2
 
 BINOWN=	root
 BINMODE=4555
-PRECIOUSPROG=
 
 .include <bsd.prog.mk>
diff --git a/usr.bin/touch/touch.1 b/usr.bin/touch/touch.1
index 6201b28dbd1..a3cc2a74e59 100644
--- a/usr.bin/touch/touch.1
+++ b/usr.bin/touch/touch.1
@@ -31,7 +31,7 @@
 .\"     @(#)touch.1	8.3 (Berkeley) 4/28/95
 .\" $FreeBSD$
 .\"
-.Dd June 10, 2012
+.Dd March 8, 2015
 .Dt TOUCH 1
 .Os
 .Sh NAME
@@ -238,7 +238,7 @@ If the
 letter pair is in the range 39 to 99, the year is set to 1939 to 1999,
 otherwise, the year is set in the 21st century.
 .Sh SEE ALSO
-.Xr utimes 2
+.Xr utimensat 2
 .Sh STANDARDS
 The
 .Nm
diff --git a/usr.bin/w/w.c b/usr.bin/w/w.c
index 0889c4c1b43..f21b9767fea 100644
--- a/usr.bin/w/w.c
+++ b/usr.bin/w/w.c
@@ -554,5 +554,6 @@ usage(int wcmd)
 		xo_error("usage: w [-dhin] [-M core] [-N system] [user ...]\n");
 	else
 		xo_error("usage: uptime\n");
+	xo_finish();
 	exit(1);
 }
diff --git a/usr.bin/xlint/Makefile.inc b/usr.bin/xlint/Makefile.inc
index a59b16cfa5b..2bd511c91f2 100644
--- a/usr.bin/xlint/Makefile.inc
+++ b/usr.bin/xlint/Makefile.inc
@@ -5,18 +5,10 @@ WARNS?=		0
 
 .PATH:		${.CURDIR}/../common
 
-# These assignments duplicate much of the functionality of
-# MACHINE_CPUARCH, but there's no easy way to export make functions...
-.if defined(TARGET_ARCH)
-TARGET_CPUARCH=	${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/}
+.if exists(${.CURDIR}/../arch/${MACHINE_ARCH})
+CFLAGS+=	-I${.CURDIR}/../arch/${MACHINE_ARCH}
 .else
-TARGET_CPUARCH=	${MACHINE_CPUARCH}
-TARGET_ARCH=	${MACHINE_ARCH}
-.endif
-.if exists(${.CURDIR}/../arch/${TARGET_ARCH})
-CFLAGS+=	-I${.CURDIR}/../arch/${TARGET_ARCH}
-.else
-CFLAGS+=	-I${.CURDIR}/../arch/${TARGET_CPUARCH}
+CFLAGS+=	-I${.CURDIR}/../arch/${MACHINE_CPUARCH}
 .endif
 CFLAGS+=	-I${.CURDIR}/../common
 
diff --git a/usr.sbin/autofs/auto_master.5 b/usr.sbin/autofs/auto_master.5
index 5aa389e3ab9..89100f75faf 100644
--- a/usr.sbin/autofs/auto_master.5
+++ b/usr.sbin/autofs/auto_master.5
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd January 9, 2015
+.Dd March 13, 2015
 .Dt AUTO_MASTER 5
 .Os
 .Sh NAME
@@ -260,6 +260,11 @@ when they are automatically created.
 .It Li -media
 Query devices that are not yet mounted, but contain valid filesystems.
 Generally used to access files on removable media.
+.It Li -noauto
+Mount filesystems configured in
+.Xr fstab 5
+as "noauto".
+This needs to be set up as a direct map.
 .It Li -null
 Prevent
 .Xr automountd 8
diff --git a/usr.sbin/autofs/automount.c b/usr.sbin/autofs/automount.c
index 3c59704b5c5..ce5d8614b13 100644
--- a/usr.sbin/autofs/automount.c
+++ b/usr.sbin/autofs/automount.c
@@ -141,8 +141,8 @@ mount_autofs(const char *from, const char *fspath, const char *options,
 }
 
 static void
-mount_if_not_already(const struct node *n, const char *map,
-    const struct statfs *mntbuf, int nitems)
+mount_if_not_already(const struct node *n, const char *map, const char *options,
+    const char *prefix, const struct statfs *mntbuf, int nitems)
 {
 	const struct statfs *sb;
 	char *mountpoint;
@@ -175,7 +175,7 @@ mount_if_not_already(const struct node *n, const char *map,
 		    mountpoint);
 	}
 
-	mount_autofs(from, mountpoint, n->n_options, n->n_key);
+	mount_autofs(from, mountpoint, options, prefix);
 	free(from);
 	free(mountpoint);
 }
@@ -184,7 +184,7 @@ static void
 mount_unmount(struct node *root)
 {
 	struct statfs *mntbuf;
-	struct node *n, *n2, *n3;
+	struct node *n, *n2;
 	int i, nitems;
 
 	nitems = getmntinfo(&mntbuf, MNT_WAIT);
@@ -216,15 +216,14 @@ mount_unmount(struct node *root)
 
 	TAILQ_FOREACH(n, &root->n_children, n_next) {
 		if (!node_is_direct_map(n)) {
-			mount_if_not_already(n, n->n_map, mntbuf, nitems);
+			mount_if_not_already(n, n->n_map, n->n_options,
+			    n->n_key, mntbuf, nitems);
 			continue;
 		}
 
 		TAILQ_FOREACH(n2, &n->n_children, n_next) {
-			TAILQ_FOREACH(n3, &n2->n_children, n_next) {
-				mount_if_not_already(n3, n->n_map,
-				    mntbuf, nitems);
-			}
+			mount_if_not_already(n2, n->n_map, n->n_options,
+			    "/", mntbuf, nitems);
 		}
 	}
 }
@@ -346,12 +345,7 @@ main_automount(int argc, char **argv)
 			force_unmount = true;
 			break;
 		case 'o':
-			if (options == NULL) {
-				options = checked_strdup(optarg);
-			} else {
-				options =
-				    separated_concat(options, optarg, ',');
-			}
+			options = concat(options, ',', optarg);
 			break;
 		case 'u':
 			do_unmount = true;
@@ -387,16 +381,12 @@ main_automount(int argc, char **argv)
 	parse_master(root, AUTO_MASTER_PATH);
 
 	if (show_maps) {
-		if (options != NULL) {
-			root->n_options = separated_concat(options,
-			    root->n_options, ',');
-		}
 		if (show_maps > 1) {
 			node_expand_indirect_maps(root);
 			node_expand_ampersand(root, NULL);
 		}
 		node_expand_defined(root);
-		node_print(root);
+		node_print(root, options);
 		return (0);
 	}
 
diff --git a/usr.sbin/autofs/automountd.8 b/usr.sbin/autofs/automountd.8
index 31fc8f20c70..175633b5f6d 100644
--- a/usr.sbin/autofs/automountd.8
+++ b/usr.sbin/autofs/automountd.8
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd April 20, 2014
+.Dd March 10, 2015
 .Dt AUTOMOUNTD 8
 .Os
 .Sh NAME
@@ -78,7 +78,7 @@ The default is 30.
 Debug mode: increase verbosity and do not daemonize.
 .It Fl o Ar options
 Specify mount options.
-Options specified here ill be overridden by options entered in maps or
+Options specified here will be overridden by options entered in maps or
 .Xr auto_master 5 .
 .It Fl v
 Increase verbosity.
diff --git a/usr.sbin/autofs/automountd.c b/usr.sbin/autofs/automountd.c
index ff60a997288..2c9b1a9faf9 100644
--- a/usr.sbin/autofs/automountd.c
+++ b/usr.sbin/autofs/automountd.c
@@ -177,7 +177,7 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 	const char *map;
 	struct node *root, *parent, *node;
 	FILE *f;
-	char *options, *fstype, *nobrowse, *retrycnt, *tmp;
+	char *key, *options, *fstype, *nobrowse, *retrycnt, *tmp;
 	int error;
 	bool wildcards;
 
@@ -199,11 +199,25 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 	map = adr->adr_from + 4; /* 4 for strlen("map "); */
 	root = node_new_root();
 	if (adr->adr_prefix[0] == '\0' || strcmp(adr->adr_prefix, "/") == 0) {
+		/*
+		 * Direct map.  autofs(4) doesn't have a way to determine
+		 * correct map key, but since it's a direct map, we can just
+		 * use adr_path instead.
+		 */
 		parent = root;
+		key = checked_strdup(adr->adr_path);
 	} else {
+		/*
+		 * Indirect map.
+		 */
 		parent = node_new_map(root, checked_strdup(adr->adr_prefix),
-		    checked_strdup(adr->adr_options), checked_strdup(map),
+		    NULL,  checked_strdup(map),
 		    checked_strdup("[kernel request]"), lineno);
+
+		if (adr->adr_key[0] == '\0')
+			key = NULL;
+		else
+			key = checked_strdup(adr->adr_key);
 	}
 
 	/*
@@ -213,8 +227,7 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 	 * needs to be done for maps with wildcard entries, but also
 	 * for special and executable maps.
 	 */
-	parse_map(parent, map, adr->adr_key[0] != '\0' ? adr->adr_key : NULL,
-	    &wildcards);
+	parse_map(parent, map, key, &wildcards);
 	if (!wildcards)
 		wildcards = node_has_wildcards(parent);
 	if (wildcards)
@@ -222,8 +235,8 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 	else
 		log_debugx("map does not contain wildcard entries");
 
-	if (adr->adr_key[0] != '\0')
-		node_expand_wildcard(root, adr->adr_key);
+	if (key != NULL)
+		node_expand_wildcard(root, key);
 
 	node = node_find(root, adr->adr_path);
 	if (node == NULL) {
@@ -231,22 +244,24 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 		    "failing mount", map, adr->adr_path);
 	}
 
+	options = node_options(node);
+
+	/*
+	 * Append options from auto_master.
+	 */
+	options = concat(options, ',', adr->adr_options);
+
+	/*
+	 * Prepend options passed via automountd(8) command line.
+	 */
+	options = concat(cmdline_options, ',', options);
+
 	if (node->n_location == NULL) {
 		log_debugx("found node defined at %s:%d; not a mountpoint",
 		    node->n_config_file, node->n_config_line);
 
-		options = node_options(node);
-
-		/*
-		 * Prepend options passed via automountd(8) command line.
-		 */
-		if (cmdline_options != NULL) {
-			options =
-			    separated_concat(cmdline_options, options, ',');
-		}
-
 		nobrowse = pick_option("nobrowse", &options);
-		if (nobrowse != NULL && adr->adr_key[0] == '\0') {
+		if (nobrowse != NULL && key == NULL) {
 			log_debugx("skipping map %s due to \"nobrowse\" "
 			    "option; exiting", map);
 			done(0, true);
@@ -263,13 +278,12 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 		 */
 		create_subtree(node, incomplete_hierarchy);
 
-		if (incomplete_hierarchy && adr->adr_key[0] != '\0') {
+		if (incomplete_hierarchy && key != NULL) {
 			/*
 			 * We still need to create the single subdirectory
 			 * user is trying to access.
 			 */
-			tmp = separated_concat(adr->adr_path,
-			    adr->adr_key, '/');
+			tmp = concat(adr->adr_path, '/', key);
 			node = node_find(root, tmp);
 			if (node != NULL)
 				create_subtree(node, false);
@@ -287,26 +301,18 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 	log_debugx("found node defined at %s:%d; it is a mountpoint",
 	    node->n_config_file, node->n_config_line);
 
-	node_expand_ampersand(node,
-	    adr->adr_key[0] != '\0' ? adr->adr_key : NULL);
+	if (key != NULL)
+		node_expand_ampersand(node, key);
 	error = node_expand_defined(node);
 	if (error != 0) {
 		log_errx(1, "variable expansion failed for %s; "
 		    "failing mount", adr->adr_path);
 	}
 
-	options = node_options(node);
-
-	/*
-	 * Prepend options passed via automountd(8) command line.
-	 */
-	if (cmdline_options != NULL)
-		options = separated_concat(cmdline_options, options, ',');
-
 	/*
 	 * Append "automounted".
 	 */
-	options = separated_concat(options, "automounted", ',');
+	options = concat(options, ',', "automounted");
 
 	/*
 	 * Remove "nobrowse", mount(8) doesn't understand it.
@@ -334,11 +340,10 @@ handle_request(const struct autofs_daemon_request *adr, char *cmdline_options,
 		if (retrycnt == NULL) {
 			log_debugx("retrycnt not specified in options; "
 			    "defaulting to 1");
-			options = separated_concat(options,
-			    separated_concat("retrycnt", "1", '='), ',');
+			options = concat(options, ',', "retrycnt=1");
 		} else {
-			options = separated_concat(options,
-			    separated_concat("retrycnt", retrycnt, '='), ',');
+			options = concat(options, ',',
+			    concat("retrycnt", '=', retrycnt));
 		}
 	}
 
@@ -462,12 +467,7 @@ main_automountd(int argc, char **argv)
 			maxproc = atoi(optarg);
 			break;
 		case 'o':
-			if (options == NULL) {
-				options = checked_strdup(optarg);
-			} else {
-				options =
-				    separated_concat(options, optarg, ',');
-			}
+			options = concat(options, ',', optarg);
 			break;
 		case 'v':
 			debug++;
diff --git a/usr.sbin/autofs/common.c b/usr.sbin/autofs/common.c
index 8ace69d5833..eae118fae62 100644
--- a/usr.sbin/autofs/common.c
+++ b/usr.sbin/autofs/common.c
@@ -85,59 +85,37 @@ checked_strdup(const char *s)
 	return (c);
 }
 
-/*
- * Take two pointers to strings, concatenate the contents with "/" in the
- * middle, make the first pointer point to the result, the second pointer
- * to NULL, and free the old strings.
- *
- * Concatenate pathnames, basically.
- */
-static void
-concat(char **p1, char **p2)
-{
-	int ret;
-	char *path;
-
-	assert(p1 != NULL);
-	assert(p2 != NULL);
-
-	if (*p1 == NULL)
-		*p1 = checked_strdup("");
-
-	if (*p2 == NULL)
-		*p2 = checked_strdup("");
-
-	ret = asprintf(&path, "%s/%s", *p1, *p2);
-	if (ret < 0)
-		log_err(1, "asprintf");
-
-	/*
-	 * XXX
-	 */
-	//free(*p1);
-	//free(*p2);
-
-	*p1 = path;
-	*p2 = NULL;
-}
-
 /*
  * Concatenate two strings, inserting separator between them, unless not needed.
- *
- * This function is very convenient to use when you do not care about freeing
- * memory - which is okay here, because we are a short running process.
  */
 char *
-separated_concat(const char *s1, const char *s2, char separator)
+concat(const char *s1, char separator, const char *s2)
 {
 	char *result;
+	char s1last, s2first;
 	int ret;
 
-	assert(s1 != NULL);
-	assert(s2 != NULL);
+	if (s1 == NULL)
+		s1 = "";
+	if (s2 == NULL)
+		s2 = "";
 
-	if (s1[0] == '\0' || s2[0] == '\0' ||
-	    s1[strlen(s1) - 1] == separator || s2[0] == separator) {
+	if (s1[0] == '\0')
+		s1last = '\0';
+	else
+		s1last = s1[strlen(s1) - 1];
+
+	s2first = s2[0];
+
+	if (s1last == separator && s2first == separator) {
+		/*
+		 * If s1 ends with the separator and s2 begins with
+		 * it - skip the latter; otherwise concatenating "/"
+		 * and "/foo" would end up returning "//foo".
+		 */
+		ret = asprintf(&result, "%s%s", s1, s2 + 1);
+	} else if (s1last == separator || s2first == separator ||
+	    s1[0] == '\0' || s2[0] == '\0') {
 		ret = asprintf(&result, "%s%s", s1, s2);
 	} else {
 		ret = asprintf(&result, "%s%c%s", s1, separator, s2);
@@ -145,7 +123,7 @@ separated_concat(const char *s1, const char *s2, char separator)
 	if (ret < 0)
 		log_err(1, "asprintf");
 
-	//log_debugx("separated_concat: got %s and %s, returning %s", s1, s2, result);
+	//log_debugx("%s: got %s and %s, returning %s", __func__, s1, s2, result);
 
 	return (result);
 }
@@ -153,7 +131,7 @@ separated_concat(const char *s1, const char *s2, char separator)
 void
 create_directory(const char *path)
 {
-	char *component, *copy, *tofree, *partial;
+	char *component, *copy, *tofree, *partial, *tmp;
 	int error;
 
 	assert(path[0] == '/');
@@ -163,12 +141,14 @@ create_directory(const char *path)
 	 */
 	copy = tofree = checked_strdup(path + 1);
 
-	partial = NULL;
+	partial = checked_strdup("");
 	for (;;) {
 		component = strsep(&copy, "/");
 		if (component == NULL)
 			break;
-		concat(&partial, &component);
+		tmp = concat(partial, '/', component);
+		free(partial);
+		partial = tmp;
 		//log_debugx("creating \"%s\"", partial);
 		error = mkdir(partial, 0755);
 		if (error != 0 && errno != EEXIST) {
@@ -480,6 +460,18 @@ node_expand_defined(struct node *n)
 	return (cumulated_error);
 }
 
+static bool
+node_is_direct_key(const struct node *n)
+{
+
+	if (n->n_parent != NULL && n->n_parent->n_parent == NULL &&
+	    strcmp(n->n_key, "/-") == 0) {
+		return (true);
+	}
+
+	return (false);
+}
+
 bool
 node_is_direct_map(const struct node *n)
 {
@@ -491,11 +483,7 @@ node_is_direct_map(const struct node *n)
 		n = n->n_parent;
 	}
 
-	assert(n->n_key != NULL);
-	if (strcmp(n->n_key, "/-") != 0)
-		return (false);
-
-	return (true);
+	return (node_is_direct_key(n));
 }
 
 bool
@@ -561,7 +549,6 @@ static char *
 node_path_x(const struct node *n, char *x)
 {
 	char *path;
-	size_t len;
 
 	if (n->n_parent == NULL)
 		return (x);
@@ -570,24 +557,13 @@ node_path_x(const struct node *n, char *x)
 	 * Return "/-" for direct maps only if we were asked for path
 	 * to the "/-" node itself, not to any of its subnodes.
 	 */
-	if (n->n_parent->n_parent == NULL &&
-	    strcmp(n->n_key, "/-") == 0 &&
-	    x[0] != '\0') {
+	if (node_is_direct_key(n) && x[0] != '\0')
 		return (x);
-	}
 
 	assert(n->n_key[0] != '\0');
-	path = separated_concat(n->n_key, x, '/');
+	path = concat(n->n_key, '/', x);
 	free(x);
 
-	/*
-	 * Strip trailing slash.
-	 */
-	len = strlen(path);
-	assert(len > 0);
-	if (path[len - 1] == '/')
-		path[len - 1] = '\0';
-
 	return (node_path_x(n->n_parent, path));
 }
 
@@ -598,8 +574,19 @@ node_path_x(const struct node *n, char *x)
 char *
 node_path(const struct node *n)
 {
+	char *path;
+	size_t len;
 
-	return (node_path_x(n, checked_strdup("")));
+	path = node_path_x(n, checked_strdup(""));
+
+	/*
+	 * Strip trailing slash, unless the whole path is "/".
+	 */
+	len = strlen(path);
+	if (len > 1 && path[len - 1] == '/')
+		path[len - 1] = '\0';
+
+	return (path);
 }
 
 static char *
@@ -607,9 +594,11 @@ node_options_x(const struct node *n, char *x)
 {
 	char *options;
 
-	options = separated_concat(x, n->n_options, ',');
-	if (n->n_parent == NULL)
-		return (options);
+	if (n == NULL)
+		return (x);
+
+	options = concat(x, ',', n->n_options);
+	free(x);
 
 	return (node_options_x(n->n_parent, options));
 }
@@ -627,13 +616,16 @@ node_options(const struct node *n)
 }
 
 static void
-node_print_indent(const struct node *n, int indent)
+node_print_indent(const struct node *n, const char *cmdline_options,
+    int indent)
 {
 	const struct node *child, *first_child;
-	char *path, *options;
+	char *path, *options, *tmp;
 
 	path = node_path(n);
-	options = node_options(n);
+	tmp = node_options(n);
+	options = concat(cmdline_options, ',', tmp);
+	free(tmp);
 
 	/*
 	 * Do not show both parent and child node if they have the same
@@ -664,16 +656,21 @@ node_print_indent(const struct node *n, int indent)
 	free(options);
 
 	TAILQ_FOREACH(child, &n->n_children, n_next)
-		node_print_indent(child, indent + 2);
+		node_print_indent(child, cmdline_options, indent + 2);
 }
 
+/*
+ * Recursively print node with all its children.  The cmdline_options
+ * argument is used for additional options to be prepended to all the
+ * others - usually those are the options passed by command line.
+ */
 void
-node_print(const struct node *n)
+node_print(const struct node *n, const char *cmdline_options)
 {
 	const struct node *child;
 
 	TAILQ_FOREACH(child, &n->n_children, n_next)
-		node_print_indent(child, 0);
+		node_print_indent(child, cmdline_options, 0);
 }
 
 static struct node *
@@ -683,23 +680,25 @@ node_find_x(struct node *node, const char *path)
 	char *tmp;
 	size_t tmplen;
 
-	//log_debugx("looking up %s in %s", path, node->n_key);
+	//log_debugx("looking up %s in %s", path, node_path(node));
 
-	tmp = node_path(node);
-	tmplen = strlen(tmp);
-	if (strncmp(tmp, path, tmplen) != 0) {
+	if (!node_is_direct_key(node)) {
+		tmp = node_path(node);
+		tmplen = strlen(tmp);
+		if (strncmp(tmp, path, tmplen) != 0) {
+			free(tmp);
+			return (NULL);
+		}
+		if (path[tmplen] != '/' && path[tmplen] != '\0') {
+			/*
+			 * If we have two map entries like 'foo' and 'foobar', make
+			 * sure the search for 'foobar' won't match 'foo' instead.
+			 */
+			free(tmp);
+			return (NULL);
+		}
 		free(tmp);
-		return (NULL);
 	}
-	if (path[tmplen] != '/' && path[tmplen] != '\0') {
-		/*
-		 * If we have two map entries like 'foo' and 'foobar', make
-		 * sure the search for 'foobar' won't match 'foo' instead.
-		 */
-		free(tmp);
-		return (NULL);
-	}
-	free(tmp);
 
 	TAILQ_FOREACH(child, &node->n_children, n_next) {
 		found = node_find_x(child, path);
@@ -707,6 +706,9 @@ node_find_x(struct node *node, const char *path)
 			return (found);
 	}
 
+	if (node->n_parent == NULL || node_is_direct_key(node))
+		return (NULL);
+
 	return (node);
 }
 
@@ -715,9 +717,12 @@ node_find(struct node *root, const char *path)
 {
 	struct node *node;
 
+	assert(root->n_parent == NULL);
+
 	node = node_find_x(root, path);
-	if (node == root)
-		return (NULL);
+	if (node != NULL)
+		assert(node != root);
+
 	return (node);
 }
 
diff --git a/usr.sbin/autofs/common.h b/usr.sbin/autofs/common.h
index 16a8d7395ae..dc84415aff8 100644
--- a/usr.sbin/autofs/common.h
+++ b/usr.sbin/autofs/common.h
@@ -70,7 +70,7 @@ void	log_warnx(const char *, ...) __printflike(1, 2);
 void	log_debugx(const char *, ...) __printf0like(1, 2);
 
 char	*checked_strdup(const char *);
-char	*separated_concat(const char *s1, const char *s2, char separator);
+char	*concat(const char *s1, char separator, const char *s2);
 void	create_directory(const char *path);
 
 struct node	*node_new_root(void);
@@ -87,7 +87,7 @@ void	node_expand_ampersand(struct node *root, const char *key);
 void	node_expand_wildcard(struct node *root, const char *key);
 int	node_expand_defined(struct node *root);
 void	node_expand_indirect_maps(struct node *n);
-void	node_print(const struct node *n);
+void	node_print(const struct node *n, const char *cmdline_options);
 void	parse_master(struct node *root, const char *path);
 void	parse_map(struct node *parent, const char *map, const char *args,
 	    bool *wildcards);
diff --git a/usr.sbin/autofs/popen.c b/usr.sbin/autofs/popen.c
index 6cd964daa61..e1148808244 100644
--- a/usr.sbin/autofs/popen.c
+++ b/usr.sbin/autofs/popen.c
@@ -104,7 +104,7 @@ auto_popen(const char *argv0, ...)
 		if (arg == NULL)
 			break;
 
-		command = separated_concat(command, arg, ' ');
+		command = concat(command, ' ', arg);
 	}
 	va_end(ap);
 
diff --git a/usr.sbin/bhyve/ahci.h b/usr.sbin/bhyve/ahci.h
index 7101dc50f4e..1fd9f208e8b 100644
--- a/usr.sbin/bhyve/ahci.h
+++ b/usr.sbin/bhyve/ahci.h
@@ -96,13 +96,14 @@
 #define         ATA_SS_SPD_NO_SPEED     0x00000000
 #define         ATA_SS_SPD_GEN1         0x00000010
 #define         ATA_SS_SPD_GEN2         0x00000020
-#define         ATA_SS_SPD_GEN3         0x00000040
+#define         ATA_SS_SPD_GEN3         0x00000030
 
 #define         ATA_SS_IPM_MASK         0x00000f00
 #define         ATA_SS_IPM_NO_DEVICE    0x00000000
 #define         ATA_SS_IPM_ACTIVE       0x00000100
 #define         ATA_SS_IPM_PARTIAL      0x00000200
 #define         ATA_SS_IPM_SLUMBER      0x00000600
+#define         ATA_SS_IPM_DEVSLEEP     0x00000800
 
 #define ATA_SERROR                      14
 #define         ATA_SE_DATA_CORRECTED   0x00000001
@@ -133,17 +134,19 @@
 #define         ATA_SC_SPD_NO_SPEED     0x00000000
 #define         ATA_SC_SPD_SPEED_GEN1   0x00000010
 #define         ATA_SC_SPD_SPEED_GEN2   0x00000020
-#define         ATA_SC_SPD_SPEED_GEN3   0x00000040
+#define         ATA_SC_SPD_SPEED_GEN3   0x00000030
 
 #define         ATA_SC_IPM_MASK         0x00000f00
 #define         ATA_SC_IPM_NONE         0x00000000
 #define         ATA_SC_IPM_DIS_PARTIAL  0x00000100
 #define         ATA_SC_IPM_DIS_SLUMBER  0x00000200
+#define         ATA_SC_IPM_DIS_DEVSLEEP 0x00000400
 
 #define ATA_SACTIVE                     16
 
 #define AHCI_MAX_PORTS			32
 #define AHCI_MAX_SLOTS			32
+#define AHCI_MAX_IRQS			16
 
 /* SATA AHCI v1.0 register defines */
 #define AHCI_CAP                    0x00
@@ -208,6 +211,9 @@
 #define		AHCI_CAP2_BOH	0x00000001
 #define		AHCI_CAP2_NVMP	0x00000002
 #define		AHCI_CAP2_APST	0x00000004
+#define		AHCI_CAP2_SDS	0x00000008
+#define		AHCI_CAP2_SADM	0x00000010
+#define		AHCI_CAP2_DESO	0x00000020
 
 #define AHCI_OFFSET                 0x100
 #define AHCI_STEP                   0x80
@@ -265,6 +271,7 @@
 #define         AHCI_P_CMD_ACTIVE   0x10000000
 #define         AHCI_P_CMD_PARTIAL  0x20000000
 #define         AHCI_P_CMD_SLUMBER  0x60000000
+#define         AHCI_P_CMD_DEVSLEEP 0x80000000
 
 #define AHCI_P_TFD                  0x20
 #define AHCI_P_SIG                  0x24
@@ -284,6 +291,17 @@
 #define 	AHCI_P_FBS_ADO_SHIFT 12
 #define 	AHCI_P_FBS_DWE      0x000f0000
 #define 	AHCI_P_FBS_DWE_SHIFT 16
+#define AHCI_P_DEVSLP               0x44
+#define 	AHCI_P_DEVSLP_ADSE  0x00000001
+#define 	AHCI_P_DEVSLP_DSP   0x00000002
+#define 	AHCI_P_DEVSLP_DETO  0x000003fc
+#define 	AHCI_P_DEVSLP_DETO_SHIFT 2
+#define 	AHCI_P_DEVSLP_MDAT  0x00007c00
+#define 	AHCI_P_DEVSLP_MDAT_SHIFT 10
+#define 	AHCI_P_DEVSLP_DITO  0x01ff8000
+#define 	AHCI_P_DEVSLP_DITO_SHIFT 15
+#define 	AHCI_P_DEVSLP_DM    0x0e000000
+#define 	AHCI_P_DEVSLP_DM_SHIFT 25
 
 /* Just to be sure, if building as module. */
 #if MAXPHYS < 512 * 1024
diff --git a/usr.sbin/bhyve/block_if.c b/usr.sbin/bhyve/block_if.c
index 8687e9a39d3..ceb48fe988d 100644
--- a/usr.sbin/bhyve/block_if.c
+++ b/usr.sbin/bhyve/block_if.c
@@ -55,15 +55,18 @@ __FBSDID("$FreeBSD$");
 #define BLOCKIF_SIG	0xb109b109
 
 #define BLOCKIF_MAXREQ	33
+#define BLOCKIF_NUMTHR	8
 
 enum blockop {
 	BOP_READ,
 	BOP_WRITE,
-	BOP_FLUSH
+	BOP_FLUSH,
+	BOP_DELETE
 };
 
 enum blockstat {
 	BST_FREE,
+	BST_BLOCK,
 	BST_PEND,
 	BST_BUSY,
 	BST_DONE
@@ -75,24 +78,28 @@ struct blockif_elem {
 	enum blockop	     be_op;
 	enum blockstat	     be_status;
 	pthread_t            be_tid;
+	off_t		     be_block;
 };
 
 struct blockif_ctxt {
 	int			bc_magic;
 	int			bc_fd;
+	int			bc_ischr;
+	int			bc_candelete;
 	int			bc_rdonly;
 	off_t			bc_size;
 	int			bc_sectsz;
-	pthread_t		bc_btid;
+	int			bc_psectsz;
+	int			bc_psectoff;
+	int			bc_closing;
+	pthread_t		bc_btid[BLOCKIF_NUMTHR];
         pthread_mutex_t		bc_mtx;
         pthread_cond_t		bc_cond;
-	int			bc_closing;
 
 	/* Request elements and free/pending/busy queues */
 	TAILQ_HEAD(, blockif_elem) bc_freeq;       
 	TAILQ_HEAD(, blockif_elem) bc_pendq;
 	TAILQ_HEAD(, blockif_elem) bc_busyq;
-	u_int			bc_req_count;
 	struct blockif_elem	bc_reqs[BLOCKIF_MAXREQ];
 };
 
@@ -111,64 +118,90 @@ static int
 blockif_enqueue(struct blockif_ctxt *bc, struct blockif_req *breq,
 		enum blockop op)
 {
-	struct blockif_elem *be;
-
-	assert(bc->bc_req_count < BLOCKIF_MAXREQ);
+	struct blockif_elem *be, *tbe;
+	off_t off;
+	int i;
 
 	be = TAILQ_FIRST(&bc->bc_freeq);
 	assert(be != NULL);
 	assert(be->be_status == BST_FREE);
-
 	TAILQ_REMOVE(&bc->bc_freeq, be, be_link);
-	be->be_status = BST_PEND;
 	be->be_req = breq;
 	be->be_op = op;
+	switch (op) {
+	case BOP_READ:
+	case BOP_WRITE:
+	case BOP_DELETE:
+		off = breq->br_offset;
+		for (i = 0; i < breq->br_iovcnt; i++)
+			off += breq->br_iov[i].iov_len;
+		break;
+	default:
+		off = OFF_MAX;
+	}
+	be->be_block = off;
+	TAILQ_FOREACH(tbe, &bc->bc_pendq, be_link) {
+		if (tbe->be_block == breq->br_offset)
+			break;
+	}
+	if (tbe == NULL) {
+		TAILQ_FOREACH(tbe, &bc->bc_busyq, be_link) {
+			if (tbe->be_block == breq->br_offset)
+				break;
+		}
+	}
+	if (tbe == NULL)
+		be->be_status = BST_PEND;
+	else
+		be->be_status = BST_BLOCK;
 	TAILQ_INSERT_TAIL(&bc->bc_pendq, be, be_link);
-
-	bc->bc_req_count++;
-
-	return (0);
+	return (be->be_status == BST_PEND);
 }
 
 static int
-blockif_dequeue(struct blockif_ctxt *bc, struct blockif_elem **bep)
+blockif_dequeue(struct blockif_ctxt *bc, pthread_t t, struct blockif_elem **bep)
 {
 	struct blockif_elem *be;
 
-	if (bc->bc_req_count == 0)
-		return (ENOENT);
-
-	be = TAILQ_FIRST(&bc->bc_pendq);
-	assert(be != NULL);
-	assert(be->be_status == BST_PEND);
+	TAILQ_FOREACH(be, &bc->bc_pendq, be_link) {
+		if (be->be_status == BST_PEND)
+			break;
+		assert(be->be_status == BST_BLOCK);
+	}
+	if (be == NULL)
+		return (0);
 	TAILQ_REMOVE(&bc->bc_pendq, be, be_link);
 	be->be_status = BST_BUSY;
-	be->be_tid = bc->bc_btid;
+	be->be_tid = t;
 	TAILQ_INSERT_TAIL(&bc->bc_busyq, be, be_link);
-
 	*bep = be;
-
-	return (0);
+	return (1);
 }
 
 static void
 blockif_complete(struct blockif_ctxt *bc, struct blockif_elem *be)
 {
-	assert(be->be_status == BST_DONE);
+	struct blockif_elem *tbe;
 
-	TAILQ_REMOVE(&bc->bc_busyq, be, be_link);
+	if (be->be_status == BST_DONE || be->be_status == BST_BUSY)
+		TAILQ_REMOVE(&bc->bc_busyq, be, be_link);
+	else
+		TAILQ_REMOVE(&bc->bc_pendq, be, be_link);
+	TAILQ_FOREACH(tbe, &bc->bc_pendq, be_link) {
+		if (tbe->be_req->br_offset == be->be_block)
+			tbe->be_status = BST_PEND;
+	}
 	be->be_tid = 0;
 	be->be_status = BST_FREE;
 	be->be_req = NULL;
 	TAILQ_INSERT_TAIL(&bc->bc_freeq, be, be_link);
-
-	bc->bc_req_count--;
 }
 
 static void
 blockif_proc(struct blockif_ctxt *bc, struct blockif_elem *be)
 {
 	struct blockif_req *br;
+	off_t arg[2];
 	int err;
 
 	br = be->be_req;
@@ -188,6 +221,24 @@ blockif_proc(struct blockif_ctxt *bc, struct blockif_elem *be)
 			err = errno;
 		break;
 	case BOP_FLUSH:
+		if (bc->bc_ischr) {
+			if (ioctl(bc->bc_fd, DIOCGFLUSH))
+				err = errno;
+		} else if (fsync(bc->bc_fd))
+			err = errno;
+		break;
+	case BOP_DELETE:
+		if (!bc->bc_candelete)
+			err = EOPNOTSUPP;
+		else if (bc->bc_rdonly)
+			err = EROFS;
+		else if (bc->bc_ischr) {
+			arg[0] = br->br_offset;
+			arg[1] = br->br_iov[0].iov_len;
+			if (ioctl(bc->bc_fd, DIOCGDELETE, arg))
+				err = errno;
+		} else
+			err = EOPNOTSUPP;
 		break;
 	default:
 		err = EINVAL;
@@ -204,28 +255,27 @@ blockif_thr(void *arg)
 {
 	struct blockif_ctxt *bc;
 	struct blockif_elem *be;
+	pthread_t t;
 
 	bc = arg;
+	t = pthread_self();
 
+	pthread_mutex_lock(&bc->bc_mtx);
 	for (;;) {
-		pthread_mutex_lock(&bc->bc_mtx);
-		while (!blockif_dequeue(bc, &be)) {
+		while (blockif_dequeue(bc, t, &be)) {
 			pthread_mutex_unlock(&bc->bc_mtx);
 			blockif_proc(bc, be);
 			pthread_mutex_lock(&bc->bc_mtx);
 			blockif_complete(bc, be);
 		}
-		pthread_cond_wait(&bc->bc_cond, &bc->bc_mtx);
-		pthread_mutex_unlock(&bc->bc_mtx);
-
-		/*
-		 * Check ctxt status here to see if exit requested
-		 */
+		/* Check ctxt status here to see if exit requested */
 		if (bc->bc_closing)
-			pthread_exit(NULL);
+			break;
+		pthread_cond_wait(&bc->bc_cond, &bc->bc_mtx);
 	}
+	pthread_mutex_unlock(&bc->bc_mtx);
 
-	/* Not reached */
+	pthread_exit(NULL);
 	return (NULL);
 }
 
@@ -268,9 +318,10 @@ blockif_open(const char *optstr, const char *ident)
 	char *nopt, *xopts;
 	struct blockif_ctxt *bc;
 	struct stat sbuf;
-	off_t size;
+	struct diocgattr_arg arg;
+	off_t size, psectsz, psectoff;
 	int extra, fd, i, sectsz;
-	int nocache, sync, ro;
+	int nocache, sync, ro, candelete;
 
 	pthread_once(&blockif_once, blockif_init);
 
@@ -323,6 +374,8 @@ blockif_open(const char *optstr, const char *ident)
 	 */
         size = sbuf.st_size;
 	sectsz = DEV_BSIZE;
+	psectsz = psectoff = 0;
+	candelete = 0;
 	if (S_ISCHR(sbuf.st_mode)) {
 		if (ioctl(fd, DIOCGMEDIASIZE, &size) < 0 ||
 		    ioctl(fd, DIOCGSECTORSIZE, &sectsz)) {
@@ -332,7 +385,14 @@ blockif_open(const char *optstr, const char *ident)
 		}
 		assert(size != 0);
 		assert(sectsz != 0);
-	}
+		if (ioctl(fd, DIOCGSTRIPESIZE, &psectsz) == 0 && psectsz > 0)
+			ioctl(fd, DIOCGSTRIPEOFFSET, &psectoff);
+		strlcpy(arg.name, "GEOM::candelete", sizeof(arg.name));
+		arg.len = sizeof(arg.value.i);
+		if (ioctl(fd, DIOCGATTR, &arg) == 0)
+			candelete = arg.value.i;
+	} else
+		psectsz = sbuf.st_blksize;
 
 	bc = calloc(1, sizeof(struct blockif_ctxt));
 	if (bc == NULL) {
@@ -342,24 +402,28 @@ blockif_open(const char *optstr, const char *ident)
 
 	bc->bc_magic = BLOCKIF_SIG;
 	bc->bc_fd = fd;
+	bc->bc_ischr = S_ISCHR(sbuf.st_mode);
+	bc->bc_candelete = candelete;
 	bc->bc_rdonly = ro;
 	bc->bc_size = size;
 	bc->bc_sectsz = sectsz;
+	bc->bc_psectsz = psectsz;
+	bc->bc_psectoff = psectoff;
 	pthread_mutex_init(&bc->bc_mtx, NULL);
 	pthread_cond_init(&bc->bc_cond, NULL);
 	TAILQ_INIT(&bc->bc_freeq);
 	TAILQ_INIT(&bc->bc_pendq);
 	TAILQ_INIT(&bc->bc_busyq);
-	bc->bc_req_count = 0;
 	for (i = 0; i < BLOCKIF_MAXREQ; i++) {
 		bc->bc_reqs[i].be_status = BST_FREE;
 		TAILQ_INSERT_HEAD(&bc->bc_freeq, &bc->bc_reqs[i], be_link);
 	}
 
-	pthread_create(&bc->bc_btid, NULL, blockif_thr, bc);
-
-	snprintf(tname, sizeof(tname), "blk-%s", ident);
-	pthread_set_name_np(bc->bc_btid, tname);
+	for (i = 0; i < BLOCKIF_NUMTHR; i++) {
+		pthread_create(&bc->bc_btid[i], NULL, blockif_thr, bc);
+		snprintf(tname, sizeof(tname), "blk-%s-%d", ident, i);
+		pthread_set_name_np(bc->bc_btid[i], tname);
+	}
 
 	return (bc);
 }
@@ -373,13 +437,13 @@ blockif_request(struct blockif_ctxt *bc, struct blockif_req *breq,
 	err = 0;
 
 	pthread_mutex_lock(&bc->bc_mtx);
-	if (bc->bc_req_count < BLOCKIF_MAXREQ) {
+	if (!TAILQ_EMPTY(&bc->bc_freeq)) {
 		/*
 		 * Enqueue and inform the block i/o thread
 		 * that there is work available
 		 */
-		blockif_enqueue(bc, breq, op);
-		pthread_cond_signal(&bc->bc_cond);
+		if (blockif_enqueue(bc, breq, op))
+			pthread_cond_signal(&bc->bc_cond);
 	} else {
 		/*
 		 * Callers are not allowed to enqueue more than
@@ -418,6 +482,14 @@ blockif_flush(struct blockif_ctxt *bc, struct blockif_req *breq)
 	return (blockif_request(bc, breq, BOP_FLUSH));
 }
 
+int
+blockif_delete(struct blockif_ctxt *bc, struct blockif_req *breq)
+{
+
+	assert(bc->bc_magic == BLOCKIF_SIG);
+	return (blockif_request(bc, breq, BOP_DELETE));
+}
+
 int
 blockif_cancel(struct blockif_ctxt *bc, struct blockif_req *breq)
 {
@@ -437,11 +509,7 @@ blockif_cancel(struct blockif_ctxt *bc, struct blockif_req *breq)
 		/*
 		 * Found it.
 		 */
-		TAILQ_REMOVE(&bc->bc_pendq, be, be_link);
-		be->be_status = BST_FREE;
-		be->be_req = NULL;
-		TAILQ_INSERT_TAIL(&bc->bc_freeq, be, be_link);
-		bc->bc_req_count--;
+		blockif_complete(bc, be);
 		pthread_mutex_unlock(&bc->bc_mtx);
 
 		return (0);
@@ -502,7 +570,7 @@ int
 blockif_close(struct blockif_ctxt *bc)
 {
 	void *jval;
-	int err;
+	int err, i;
 
 	err = 0;
 
@@ -512,8 +580,9 @@ blockif_close(struct blockif_ctxt *bc)
 	 * Stop the block i/o thread
 	 */
 	bc->bc_closing = 1;
-	pthread_cond_signal(&bc->bc_cond);
-	pthread_join(bc->bc_btid, &jval);
+	pthread_cond_broadcast(&bc->bc_cond);
+	for (i = 0; i < BLOCKIF_NUMTHR; i++)
+		pthread_join(bc->bc_btid[i], &jval);
 
 	/* XXX Cancel queued i/o's ??? */
 
@@ -595,6 +664,15 @@ blockif_sectsz(struct blockif_ctxt *bc)
 	return (bc->bc_sectsz);
 }
 
+void
+blockif_psectsz(struct blockif_ctxt *bc, int *size, int *off)
+{
+
+	assert(bc->bc_magic == BLOCKIF_SIG);
+	*size = bc->bc_psectsz;
+	*off = bc->bc_psectoff;
+}
+
 int
 blockif_queuesz(struct blockif_ctxt *bc)
 {
@@ -610,3 +688,11 @@ blockif_is_ro(struct blockif_ctxt *bc)
 	assert(bc->bc_magic == BLOCKIF_SIG);
 	return (bc->bc_rdonly);
 }
+
+int
+blockif_candelete(struct blockif_ctxt *bc)
+{
+
+	assert(bc->bc_magic == BLOCKIF_SIG);
+	return (bc->bc_candelete);
+}
diff --git a/usr.sbin/bhyve/block_if.h b/usr.sbin/bhyve/block_if.h
index c2c21f65744..4e2c1b4e55e 100644
--- a/usr.sbin/bhyve/block_if.h
+++ b/usr.sbin/bhyve/block_if.h
@@ -55,11 +55,14 @@ off_t	blockif_size(struct blockif_ctxt *bc);
 void	blockif_chs(struct blockif_ctxt *bc, uint16_t *c, uint8_t *h,
     uint8_t *s);
 int	blockif_sectsz(struct blockif_ctxt *bc);
+void	blockif_psectsz(struct blockif_ctxt *bc, int *size, int *off);
 int	blockif_queuesz(struct blockif_ctxt *bc);
 int	blockif_is_ro(struct blockif_ctxt *bc);
+int	blockif_candelete(struct blockif_ctxt *bc);
 int	blockif_read(struct blockif_ctxt *bc, struct blockif_req *breq);
 int	blockif_write(struct blockif_ctxt *bc, struct blockif_req *breq);
 int	blockif_flush(struct blockif_ctxt *bc, struct blockif_req *breq);
+int	blockif_delete(struct blockif_ctxt *bc, struct blockif_req *breq);
 int	blockif_cancel(struct blockif_ctxt *bc, struct blockif_req *breq);
 int	blockif_close(struct blockif_ctxt *bc);
 
diff --git a/usr.sbin/bhyve/pci_ahci.c b/usr.sbin/bhyve/pci_ahci.c
index 7db7ed5aa96..23038824a67 100644
--- a/usr.sbin/bhyve/pci_ahci.c
+++ b/usr.sbin/bhyve/pci_ahci.c
@@ -86,6 +86,7 @@ enum sata_fis_type {
 #define	READ_TOC		0x43
 #define	GET_EVENT_STATUS_NOTIFICATION 0x4A
 #define	MODE_SENSE_10		0x5A
+#define	REPORT_LUNS		0xA0
 #define	READ_12			0xA8
 #define	READ_CD			0xBE
 
@@ -134,6 +135,7 @@ struct ahci_port {
 	int reset;
 	int mult_sectors;
 	uint8_t xfermode;
+	uint8_t err_cfis[20];
 	uint8_t sense_key;
 	uint8_t asc;
 	uint32_t pending;
@@ -299,18 +301,27 @@ ahci_write_fis_piosetup(struct ahci_port *p)
 }
 
 static void
-ahci_write_fis_sdb(struct ahci_port *p, int slot, uint32_t tfd)
+ahci_write_fis_sdb(struct ahci_port *p, int slot, uint8_t *cfis, uint32_t tfd)
 {
 	uint8_t fis[8];
 	uint8_t error;
 
 	error = (tfd >> 8) & 0xff;
 	memset(fis, 0, sizeof(fis));
-	fis[0] = error;
+	fis[0] = FIS_TYPE_SETDEVBITS;
+	fis[1] = (1 << 6);
 	fis[2] = tfd & 0x77;
-	*(uint32_t *)(fis + 4) = (1 << slot);
-	if (fis[2] & ATA_S_ERROR)
+	fis[3] = error;
+	if (fis[2] & ATA_S_ERROR) {
 		p->is |= AHCI_P_IX_TFE;
+		p->err_cfis[0] = slot;
+		p->err_cfis[2] = tfd & 0x77;
+		p->err_cfis[3] = error;
+		memcpy(&p->err_cfis[4], cfis + 4, 16);
+	} else {
+		*(uint32_t *)(fis + 4) = (1 << slot);
+		p->sact &= ~(1 << slot);
+	}
 	p->tfd = tfd;
 	ahci_write_fis(p, FIS_TYPE_SETDEVBITS, fis);
 }
@@ -337,9 +348,13 @@ ahci_write_fis_d2h(struct ahci_port *p, int slot, uint8_t *cfis, uint32_t tfd)
 	fis[11] = cfis[11];
 	fis[12] = cfis[12];
 	fis[13] = cfis[13];
-	if (fis[2] & ATA_S_ERROR)
+	if (fis[2] & ATA_S_ERROR) {
 		p->is |= AHCI_P_IX_TFE;
-	else
+		p->err_cfis[0] = 0x80;
+		p->err_cfis[2] = tfd & 0xff;
+		p->err_cfis[3] = error;
+		memcpy(&p->err_cfis[4], cfis + 4, 16);
+	} else
 		p->ci &= ~(1 << slot);
 	p->tfd = tfd;
 	ahci_write_fis(p, FIS_TYPE_REGD2H, fis);
@@ -431,7 +446,6 @@ ahci_port_stop(struct ahci_port *p)
 static void
 ahci_port_reset(struct ahci_port *pr)
 {
-	pr->sctl = 0;
 	pr->serr = 0;
 	pr->sact = 0;
 	pr->xfermode = ATA_UDMA6;
@@ -443,8 +457,11 @@ ahci_port_reset(struct ahci_port *pr)
 		pr->tfd = 0x7F;
 		return;
 	}
-	pr->ssts = ATA_SS_DET_PHY_ONLINE | ATA_SS_SPD_GEN2 |
-		ATA_SS_IPM_ACTIVE;
+	pr->ssts = ATA_SS_DET_PHY_ONLINE | ATA_SS_IPM_ACTIVE;
+	if (pr->sctl & ATA_SC_SPD_MASK)
+		pr->ssts |= (pr->sctl & ATA_SC_SPD_MASK);
+	else
+		pr->ssts |= ATA_SS_SPD_GEN3;
 	pr->tfd = (1 << 8) | ATA_S_DSC | ATA_S_DMA;
 	if (!pr->atapi) {
 		pr->sig = PxSIG_ATA;
@@ -470,6 +487,7 @@ ahci_reset(struct pci_ahci_softc *sc)
 	for (i = 0; i < sc->ports; i++) {
 		sc->port[i].ie = 0;
 		sc->port[i].is = 0;
+		sc->port[i].sctl = 0;
 		ahci_port_reset(&sc->port[i]);
 	}
 }
@@ -520,12 +538,14 @@ ahci_handle_dma(struct ahci_port *p, int slot, uint8_t *cfis, uint32_t done,
 	readop = 1;
 
 	prdt += seek;
-	if (cfis[2] == ATA_WRITE_DMA || cfis[2] == ATA_WRITE_DMA48 ||
-			cfis[2] == ATA_WRITE_FPDMA_QUEUED)
+	if (cfis[2] == ATA_WRITE || cfis[2] == ATA_WRITE48 ||
+	    cfis[2] == ATA_WRITE_MUL || cfis[2] == ATA_WRITE_MUL48 ||
+	    cfis[2] == ATA_WRITE_DMA || cfis[2] == ATA_WRITE_DMA48 ||
+	    cfis[2] == ATA_WRITE_FPDMA_QUEUED)
 		readop = 0;
 
 	if (cfis[2] == ATA_WRITE_FPDMA_QUEUED ||
-			cfis[2] == ATA_READ_FPDMA_QUEUED) {
+	    cfis[2] == ATA_READ_FPDMA_QUEUED) {
 		lba = ((uint64_t)cfis[10] << 40) |
 			((uint64_t)cfis[9] << 32) |
 			((uint64_t)cfis[8] << 24) |
@@ -536,7 +556,9 @@ ahci_handle_dma(struct ahci_port *p, int slot, uint8_t *cfis, uint32_t done,
 		if (!len)
 			len = 65536;
 		ncq = 1;
-	} else if (cfis[2] == ATA_READ_DMA48 || cfis[2] == ATA_WRITE_DMA48) {
+	} else if (cfis[2] == ATA_READ48 || cfis[2] == ATA_WRITE48 ||
+	    cfis[2] == ATA_READ_MUL48 || cfis[2] == ATA_WRITE_MUL48 ||
+	    cfis[2] == ATA_READ_DMA48 || cfis[2] == ATA_WRITE_DMA48) {
 		lba = ((uint64_t)cfis[10] << 40) |
 			((uint64_t)cfis[9] << 32) |
 			((uint64_t)cfis[8] << 24) |
@@ -643,6 +665,105 @@ ahci_handle_flush(struct ahci_port *p, int slot, uint8_t *cfis)
 	assert(err == 0);
 }
 
+static inline void
+read_prdt(struct ahci_port *p, int slot, uint8_t *cfis,
+		void *buf, int size)
+{
+	struct ahci_cmd_hdr *hdr;
+	struct ahci_prdt_entry *prdt;
+	void *to;
+	int i, len;
+
+	hdr = (struct ahci_cmd_hdr *)(p->cmd_lst + slot * AHCI_CL_SIZE);
+	len = size;
+	to = buf;
+	prdt = (struct ahci_prdt_entry *)(cfis + 0x80);
+	for (i = 0; i < hdr->prdtl && len; i++) {
+		uint8_t *ptr;
+		uint32_t dbcsz;
+		int sublen;
+
+		dbcsz = (prdt->dbc & DBCMASK) + 1;
+		ptr = paddr_guest2host(ahci_ctx(p->pr_sc), prdt->dba, dbcsz);
+		sublen = len < dbcsz ? len : dbcsz;
+		memcpy(to, ptr, sublen);
+		len -= sublen;
+		to += sublen;
+		prdt++;
+	}
+}
+
+static void
+ahci_handle_dsm_trim(struct ahci_port *p, int slot, uint8_t *cfis, uint32_t done)
+{
+	struct ahci_ioreq *aior;
+	struct blockif_req *breq;
+	uint8_t *entry;
+	uint64_t elba;
+	uint32_t len, elen;
+	int err;
+	uint8_t buf[512];
+
+	if (cfis[2] == ATA_DATA_SET_MANAGEMENT) {
+		len = (uint16_t)cfis[13] << 8 | cfis[12];
+		len *= 512;
+	} else { /* ATA_SEND_FPDMA_QUEUED */
+		len = (uint16_t)cfis[11] << 8 | cfis[3];
+		len *= 512;
+	}
+	read_prdt(p, slot, cfis, buf, sizeof(buf));
+
+next:
+	entry = &buf[done];
+	elba = ((uint64_t)entry[5] << 40) |
+		((uint64_t)entry[4] << 32) |
+		((uint64_t)entry[3] << 24) |
+		((uint64_t)entry[2] << 16) |
+		((uint64_t)entry[1] << 8) |
+		entry[0];
+	elen = (uint16_t)entry[7] << 8 | entry[6];
+	done += 8;
+	if (elen == 0) {
+		if (done >= len) {
+			ahci_write_fis_d2h(p, slot, cfis, ATA_S_READY | ATA_S_DSC);
+			p->pending &= ~(1 << slot);
+			ahci_check_stopped(p);
+			return;
+		}
+		goto next;
+	}
+
+	/*
+	 * Pull request off free list
+	 */
+	aior = STAILQ_FIRST(&p->iofhd);
+	assert(aior != NULL);
+	STAILQ_REMOVE_HEAD(&p->iofhd, io_flist);
+	aior->cfis = cfis;
+	aior->slot = slot;
+	aior->len = len;
+	aior->done = done;
+	aior->prdtl = 0;
+
+	breq = &aior->io_req;
+	breq->br_offset = elba * blockif_sectsz(p->bctx);
+	breq->br_iovcnt = 1;
+	breq->br_iov[0].iov_len = elen * blockif_sectsz(p->bctx);
+
+	/*
+	 * Mark this command in-flight.
+	 */
+	p->pending |= 1 << slot;
+
+	/*
+	 * Stuff request onto busy list
+	 */
+	TAILQ_INSERT_HEAD(&p->iobhd, aior, io_blist);
+
+	err = blockif_delete(p->bctx, breq);
+	assert(err == 0);
+}
+
 static inline void
 write_prdt(struct ahci_port *p, int slot, uint8_t *cfis,
 		void *buf, int size)
@@ -672,6 +793,41 @@ write_prdt(struct ahci_port *p, int slot, uint8_t *cfis,
 	hdr->prdbc = size - len;
 }
 
+static void
+ahci_checksum(uint8_t *buf, int size)
+{
+	int i;
+	uint8_t sum = 0;
+
+	for (i = 0; i < size - 1; i++)
+		sum += buf[i];
+	buf[size - 1] = 0x100 - sum;
+}
+
+static void
+ahci_handle_read_log(struct ahci_port *p, int slot, uint8_t *cfis)
+{
+	struct ahci_cmd_hdr *hdr;
+	uint8_t buf[512];
+
+	hdr = (struct ahci_cmd_hdr *)(p->cmd_lst + slot * AHCI_CL_SIZE);
+	if (p->atapi || hdr->prdtl == 0 || cfis[4] != 0x10 ||
+	    cfis[5] != 0 || cfis[9] != 0 || cfis[12] != 1 || cfis[13] != 0) {
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
+		return;
+	}
+
+	memset(buf, 0, sizeof(buf));
+	memcpy(buf, p->err_cfis, sizeof(p->err_cfis));
+	ahci_checksum(buf, sizeof(buf));
+
+	if (cfis[2] == ATA_READ_LOG_EXT)
+		ahci_write_fis_piosetup(p);
+	write_prdt(p, slot, cfis, (void *)buf, sizeof(buf));
+	ahci_write_fis_d2h(p, slot, cfis, ATA_S_DSC | ATA_S_READY);
+}
+
 static void
 handle_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 {
@@ -679,16 +835,21 @@ handle_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 
 	hdr = (struct ahci_cmd_hdr *)(p->cmd_lst + slot * AHCI_CL_SIZE);
 	if (p->atapi || hdr->prdtl == 0) {
-		p->tfd = (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR;
-		p->is |= AHCI_P_IX_TFE;
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
 	} else {
 		uint16_t buf[256];
 		uint64_t sectors;
+		int sectsz, psectsz, psectoff, candelete, ro;
 		uint16_t cyl;
 		uint8_t sech, heads;
 
-		sectors = blockif_size(p->bctx) / blockif_sectsz(p->bctx);
+		ro = blockif_is_ro(p->bctx);
+		candelete = blockif_candelete(p->bctx);
+		sectsz = blockif_sectsz(p->bctx);
+		sectors = blockif_size(p->bctx) / sectsz;
 		blockif_chs(p->bctx, &cyl, &heads, &sech);
+		blockif_psectsz(p->bctx, &psectsz, &psectoff);
 		memset(buf, 0, sizeof(buf));
 		buf[0] = 0x0040;
 		buf[1] = cyl;
@@ -705,25 +866,38 @@ handle_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 		buf[53] = (1 << 1 | 1 << 2);
 		if (p->mult_sectors)
 			buf[59] = (0x100 | p->mult_sectors);
-		buf[60] = sectors;
-		buf[61] = (sectors >> 16);
+		if (sectors <= 0x0fffffff) {
+			buf[60] = sectors;
+			buf[61] = (sectors >> 16);
+		} else {
+			buf[60] = 0xffff;
+			buf[61] = 0x0fff;
+		}
 		buf[63] = 0x7;
 		if (p->xfermode & ATA_WDMA0)
 			buf[63] |= (1 << ((p->xfermode & 7) + 8));
 		buf[64] = 0x3;
-		buf[65] = 100;
-		buf[66] = 100;
-		buf[67] = 100;
-		buf[68] = 100;
+		buf[65] = 120;
+		buf[66] = 120;
+		buf[67] = 120;
+		buf[68] = 120;
+		buf[69] = 0;
 		buf[75] = 31;
-		buf[76] = (1 << 8 | 1 << 2);
-		buf[80] = 0x1f0;
+		buf[76] = (ATA_SATA_GEN1 | ATA_SATA_GEN2 | ATA_SATA_GEN3 |
+			   ATA_SUPPORT_NCQ);
+		buf[77] = (ATA_SUPPORT_RCVSND_FPDMA_QUEUED |
+			   (p->ssts & ATA_SS_SPD_MASK) >> 3);
+		buf[80] = 0x3f0;
 		buf[81] = 0x28;
-		buf[82] = (1 << 5 | 1 << 14);
-		buf[83] = (1 << 10 | 1 << 12 | 1 << 13 | 1 << 14);
+		buf[82] = (ATA_SUPPORT_POWERMGT | ATA_SUPPORT_WRITECACHE|
+			   ATA_SUPPORT_LOOKAHEAD | ATA_SUPPORT_NOP);
+		buf[83] = (ATA_SUPPORT_ADDRESS48 | ATA_SUPPORT_FLUSHCACHE |
+			   ATA_SUPPORT_FLUSHCACHE48 | 1 << 14);
 		buf[84] = (1 << 14);
-		buf[85] = (1 << 5 | 1 << 14);
-		buf[86] = (1 << 10 | 1 << 12 | 1 << 13);
+		buf[85] = (ATA_SUPPORT_POWERMGT | ATA_SUPPORT_WRITECACHE|
+			   ATA_SUPPORT_LOOKAHEAD | ATA_SUPPORT_NOP);
+		buf[86] = (ATA_SUPPORT_ADDRESS48 | ATA_SUPPORT_FLUSHCACHE |
+			   ATA_SUPPORT_FLUSHCACHE48 | 1 << 15);
 		buf[87] = (1 << 14);
 		buf[88] = 0x7f;
 		if (p->xfermode & ATA_UDMA0)
@@ -733,21 +907,40 @@ handle_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 		buf[101] = (sectors >> 16);
 		buf[102] = (sectors >> 32);
 		buf[103] = (sectors >> 48);
+		if (candelete && !ro) {
+			buf[69] |= ATA_SUPPORT_RZAT | ATA_SUPPORT_DRAT;
+			buf[105] = 1;
+			buf[169] = ATA_SUPPORT_DSM_TRIM;
+		}
+		buf[106] = 0x4000;
+		buf[209] = 0x4000;
+		if (psectsz > sectsz) {
+			buf[106] |= 0x2000;
+			buf[106] |= ffsl(psectsz / sectsz) - 1;
+			buf[209] |= (psectoff / sectsz);
+		}
+		if (sectsz > 512) {
+			buf[106] |= 0x1000;
+			buf[117] = sectsz / 2;
+			buf[118] = ((sectsz / 2) >> 16);
+		}
+		buf[119] = (ATA_SUPPORT_RWLOGDMAEXT | 1 << 14);
+		buf[120] = (ATA_SUPPORT_RWLOGDMAEXT | 1 << 14);
+		buf[222] = 0x1020;
+		buf[255] = 0x00a5;
+		ahci_checksum((uint8_t *)buf, sizeof(buf));
 		ahci_write_fis_piosetup(p);
 		write_prdt(p, slot, cfis, (void *)buf, sizeof(buf));
-		p->tfd = ATA_S_DSC | ATA_S_READY;
-		p->is |= AHCI_P_IX_DP;
-		p->ci &= ~(1 << slot);
+		ahci_write_fis_d2h(p, slot, cfis, ATA_S_DSC | ATA_S_READY);
 	}
-	ahci_generate_intr(p->pr_sc);
 }
 
 static void
 handle_atapi_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 {
 	if (!p->atapi) {
-		p->tfd = (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR;
-		p->is |= AHCI_P_IX_TFE;
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
 	} else {
 		uint16_t buf[256];
 
@@ -762,27 +955,34 @@ handle_atapi_identify(struct ahci_port *p, int slot, uint8_t *cfis)
 		buf[53] = (1 << 2 | 1 << 1);
 		buf[62] = 0x3f;
 		buf[63] = 7;
+		if (p->xfermode & ATA_WDMA0)
+			buf[63] |= (1 << ((p->xfermode & 7) + 8));
 		buf[64] = 3;
-		buf[65] = 100;
-		buf[66] = 100;
-		buf[67] = 100;
-		buf[68] = 100;
-		buf[76] = (1 << 2 | 1 << 1);
+		buf[65] = 120;
+		buf[66] = 120;
+		buf[67] = 120;
+		buf[68] = 120;
+		buf[76] = (ATA_SATA_GEN1 | ATA_SATA_GEN2 | ATA_SATA_GEN3);
+		buf[77] = ((p->ssts & ATA_SS_SPD_MASK) >> 3);
 		buf[78] = (1 << 5);
-		buf[80] = (0x1f << 4);
-		buf[82] = (1 << 4);
+		buf[80] = 0x3f0;
+		buf[82] = (ATA_SUPPORT_POWERMGT | ATA_SUPPORT_PACKET |
+			   ATA_SUPPORT_RESET | ATA_SUPPORT_NOP);
 		buf[83] = (1 << 14);
 		buf[84] = (1 << 14);
-		buf[85] = (1 << 4);
+		buf[85] = (ATA_SUPPORT_POWERMGT | ATA_SUPPORT_PACKET |
+			   ATA_SUPPORT_RESET | ATA_SUPPORT_NOP);
 		buf[87] = (1 << 14);
-		buf[88] = (1 << 14 | 0x7f);
+		buf[88] = 0x7f;
+		if (p->xfermode & ATA_UDMA0)
+			buf[88] |= (1 << ((p->xfermode & 7) + 8));
+		buf[222] = 0x1020;
+		buf[255] = 0x00a5;
+		ahci_checksum((uint8_t *)buf, sizeof(buf));
 		ahci_write_fis_piosetup(p);
 		write_prdt(p, slot, cfis, (void *)buf, sizeof(buf));
-		p->tfd = ATA_S_DSC | ATA_S_READY;
-		p->is |= AHCI_P_IX_DHR;
-		p->ci &= ~(1 << slot);
+		ahci_write_fis_d2h(p, slot, cfis, ATA_S_DSC | ATA_S_READY);
 	}
-	ahci_generate_intr(p->pr_sc);
 }
 
 static void
@@ -791,22 +991,41 @@ atapi_inquiry(struct ahci_port *p, int slot, uint8_t *cfis)
 	uint8_t buf[36];
 	uint8_t *acmd;
 	int len;
+	uint32_t tfd;
 
 	acmd = cfis + 0x40;
 
-	buf[0] = 0x05;
-	buf[1] = 0x80;
-	buf[2] = 0x00;
-	buf[3] = 0x21;
-	buf[4] = 31;
-	buf[5] = 0;
-	buf[6] = 0;
-	buf[7] = 0;
-	atapi_string(buf + 8, "BHYVE", 8);
-	atapi_string(buf + 16, "BHYVE DVD-ROM", 16);
-	atapi_string(buf + 32, "001", 4);
+	if (acmd[1] & 1) {		/* VPD */
+		if (acmd[2] == 0) {	/* Supported VPD pages */
+			buf[0] = 0x05;
+			buf[1] = 0;
+			buf[2] = 0;
+			buf[3] = 1;
+			buf[4] = 0;
+			len = 4 + buf[3];
+		} else {
+			p->sense_key = ATA_SENSE_ILLEGAL_REQUEST;
+			p->asc = 0x24;
+			tfd = (p->sense_key << 12) | ATA_S_READY | ATA_S_ERROR;
+			cfis[4] = (cfis[4] & ~7) | ATA_I_CMD | ATA_I_IN;
+			ahci_write_fis_d2h(p, slot, cfis, tfd);
+			return;
+		}
+	} else {
+		buf[0] = 0x05;
+		buf[1] = 0x80;
+		buf[2] = 0x00;
+		buf[3] = 0x21;
+		buf[4] = 31;
+		buf[5] = 0;
+		buf[6] = 0;
+		buf[7] = 0;
+		atapi_string(buf + 8, "BHYVE", 8);
+		atapi_string(buf + 16, "BHYVE DVD-ROM", 16);
+		atapi_string(buf + 32, "001", 4);
+		len = sizeof(buf);
+	}
 
-	len = sizeof(buf);
 	if (len > acmd[4])
 		len = acmd[4];
 	cfis[4] = (cfis[4] & ~7) | ATA_I_CMD | ATA_I_IN;
@@ -1009,6 +1228,19 @@ atapi_read_toc(struct ahci_port *p, int slot, uint8_t *cfis)
 	}
 }
 
+static void
+atapi_report_luns(struct ahci_port *p, int slot, uint8_t *cfis)
+{
+	uint8_t buf[16];
+
+	memset(buf, 0, sizeof(buf));
+	buf[3] = 8;
+
+	cfis[4] = (cfis[4] & ~7) | ATA_I_CMD | ATA_I_IN;
+	write_prdt(p, slot, cfis, buf, sizeof(buf));
+	ahci_write_fis_d2h(p, slot, cfis, ATA_S_READY | ATA_S_DSC);
+}
+
 static void
 atapi_read(struct ahci_port *p, int slot, uint8_t *cfis,
 		uint32_t done, int seek)
@@ -1278,6 +1510,9 @@ handle_packet_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
 	case READ_TOC:
 		atapi_read_toc(p, slot, cfis);
 		break;
+	case REPORT_LUNS:
+		atapi_report_luns(p, slot, cfis);
+		break;
 	case READ_10:
 	case READ_12:
 		atapi_read(p, slot, cfis, 0, 0);
@@ -1363,10 +1598,16 @@ ahci_handle_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
 			p->mult_sectors = cfis[12];
 			p->tfd = ATA_S_DSC | ATA_S_READY;
 		}
-		p->is |= AHCI_P_IX_DP;
-		p->ci &= ~(1 << slot);
-		ahci_generate_intr(p->pr_sc);
+		ahci_write_fis_d2h(p, slot, cfis, p->tfd);
 		break;
+	case ATA_READ:
+	case ATA_WRITE:
+	case ATA_READ48:
+	case ATA_WRITE48:
+	case ATA_READ_MUL:
+	case ATA_WRITE_MUL:
+	case ATA_READ_MUL48:
+	case ATA_WRITE_MUL48:
 	case ATA_READ_DMA:
 	case ATA_WRITE_DMA:
 	case ATA_READ_DMA48:
@@ -1379,10 +1620,36 @@ ahci_handle_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
 	case ATA_FLUSHCACHE48:
 		ahci_handle_flush(p, slot, cfis);
 		break;
-	case ATA_STANDBY_CMD:
+	case ATA_DATA_SET_MANAGEMENT:
+		if (cfis[11] == 0 && cfis[3] == ATA_DSM_TRIM &&
+		    cfis[13] == 0 && cfis[12] == 1) {
+			ahci_handle_dsm_trim(p, slot, cfis, 0);
+			break;
+		}
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
+		break;
+	case ATA_SEND_FPDMA_QUEUED:
+		if ((cfis[13] & 0x1f) == ATA_SFPDMA_DSM &&
+		    cfis[17] == 0 && cfis[16] == ATA_DSM_TRIM &&
+		    cfis[11] == 0 && cfis[13] == 1) {
+			ahci_handle_dsm_trim(p, slot, cfis, 0);
+			break;
+		}
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
+		break;
+	case ATA_READ_LOG_EXT:
+	case ATA_READ_LOG_DMA_EXT:
+		ahci_handle_read_log(p, slot, cfis);
 		break;
 	case ATA_NOP:
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
+		break;
+	case ATA_STANDBY_CMD:
 	case ATA_STANDBY_IMMEDIATE:
+	case ATA_IDLE_CMD:
 	case ATA_IDLE_IMMEDIATE:
 	case ATA_SLEEP:
 		ahci_write_fis_d2h(p, slot, cfis, ATA_S_READY | ATA_S_DSC);
@@ -1392,17 +1659,15 @@ ahci_handle_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
 		break;
 	case ATA_PACKET_CMD:
 		if (!p->atapi) {
-			p->tfd = (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR;
-			p->is |= AHCI_P_IX_TFE;
-			ahci_generate_intr(p->pr_sc);
+			ahci_write_fis_d2h(p, slot, cfis,
+			    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
 		} else
 			handle_packet_cmd(p, slot, cfis);
 		break;
 	default:
 		WPRINTF("Unsupported cmd:%02x\n", cfis[2]);
-		p->tfd = (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR;
-		p->is |= AHCI_P_IX_TFE;
-		ahci_generate_intr(p->pr_sc);
+		ahci_write_fis_d2h(p, slot, cfis,
+		    (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
 		break;
 	}
 }
@@ -1490,7 +1755,7 @@ ata_ioreq_cb(struct blockif_req *br, int err)
 	struct pci_ahci_softc *sc;
 	uint32_t tfd;
 	uint8_t *cfis;
-	int pending, slot, ncq;
+	int pending, slot, ncq, dsm;
 
 	DPRINTF("%s %d\n", __func__, err);
 
@@ -1504,8 +1769,13 @@ ata_ioreq_cb(struct blockif_req *br, int err)
 	hdr = (struct ahci_cmd_hdr *)(p->cmd_lst + slot * AHCI_CL_SIZE);
 
 	if (cfis[2] == ATA_WRITE_FPDMA_QUEUED ||
-			cfis[2] == ATA_READ_FPDMA_QUEUED)
+	    cfis[2] == ATA_READ_FPDMA_QUEUED ||
+	    cfis[2] == ATA_SEND_FPDMA_QUEUED)
 		ncq = 1;
+	if (cfis[2] == ATA_DATA_SET_MANAGEMENT ||
+	    (cfis[2] == ATA_SEND_FPDMA_QUEUED &&
+	     (cfis[13] & 0x1f) == ATA_SFPDMA_DSM))
+		dsm = 1;
 
 	pthread_mutex_lock(&sc->mtx);
 
@@ -1519,29 +1789,31 @@ ata_ioreq_cb(struct blockif_req *br, int err)
 	 */
 	STAILQ_INSERT_TAIL(&p->iofhd, aior, io_flist);
 
-	if (pending && !err) {
-		ahci_handle_dma(p, slot, cfis, aior->done,
-		    hdr->prdtl - pending);
-		goto out;
+	if (!err)
+		hdr->prdbc = aior->done;
+
+	if (dsm) {
+		if (aior->done != aior->len && !err) {
+			ahci_handle_dsm_trim(p, slot, cfis, aior->done);
+			goto out;
+		}
+	} else {
+		if (pending && !err) {
+			ahci_handle_dma(p, slot, cfis, aior->done,
+			    hdr->prdtl - pending);
+			goto out;
+		}
 	}
 
 	if (!err && aior->done == aior->len) {
 		tfd = ATA_S_READY | ATA_S_DSC;
-		if (ncq)
-			hdr->prdbc = 0;
-		else
-			hdr->prdbc = aior->len;
 	} else {
 		tfd = (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR;
-		hdr->prdbc = 0;
-		if (ncq)
-			p->serr |= (1 << slot);
 	}
 
-	if (ncq) {
-		p->sact &= ~(1 << slot);
-		ahci_write_fis_sdb(p, slot, tfd);
-	} else
+	if (ncq)
+		ahci_write_fis_sdb(p, slot, cfis, tfd);
+	else
 		ahci_write_fis_d2h(p, slot, cfis, tfd);
 
 	/*
@@ -1588,6 +1860,9 @@ atapi_ioreq_cb(struct blockif_req *br, int err)
 	 */
 	STAILQ_INSERT_TAIL(&p->iofhd, aior, io_flist);
 
+	if (!err)
+		hdr->prdbc = aior->done;
+
 	if (pending && !err) {
 		atapi_read(p, slot, cfis, aior->done, hdr->prdtl - pending);
 		goto out;
@@ -1595,12 +1870,10 @@ atapi_ioreq_cb(struct blockif_req *br, int err)
 
 	if (!err && aior->done == aior->len) {
 		tfd = ATA_S_READY | ATA_S_DSC;
-		hdr->prdbc = aior->len;
 	} else {
 		p->sense_key = ATA_SENSE_ILLEGAL_REQUEST;
 		p->asc = 0x21;
 		tfd = (p->sense_key << 12) | ATA_S_READY | ATA_S_ERROR;
-		hdr->prdbc = 0;
 	}
 
 	cfis[4] = (cfis[4] & ~7) | ATA_I_CMD | ATA_I_IN;
@@ -1714,10 +1987,10 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
 		WPRINTF("pci_ahci_port: read only registers 0x%"PRIx64"\n", offset);
 		break;
 	case AHCI_P_SCTL:
+		p->sctl = value;
 		if (!(p->cmd & AHCI_P_CMD_ST)) {
 			if (value & ATA_SC_DET_RESET)
 				ahci_port_reset(p);
-			p->sctl = value;
 		}
 		break;
 	case AHCI_P_SERR:
diff --git a/usr.sbin/bhyve/pci_virtio_block.c b/usr.sbin/bhyve/pci_virtio_block.c
index c66ad68936b..fef7fecfb54 100644
--- a/usr.sbin/bhyve/pci_virtio_block.c
+++ b/usr.sbin/bhyve/pci_virtio_block.c
@@ -64,7 +64,8 @@ __FBSDID("$FreeBSD$");
 
 /* Capability bits */
 #define	VTBLK_F_SEG_MAX		(1 << 2)	/* Maximum request segments */
-#define	VTBLK_F_BLK_SIZE       	(1 << 6)	/* cfg block size valid */
+#define	VTBLK_F_BLK_SIZE	(1 << 6)	/* cfg block size valid */
+#define	VTBLK_F_TOPOLOGY	(1 << 10)	/* Optimal I/O alignment */
 
 /*
  * Host capabilities
@@ -72,6 +73,7 @@ __FBSDID("$FreeBSD$");
 #define VTBLK_S_HOSTCAPS      \
   ( VTBLK_F_SEG_MAX  |						    \
     VTBLK_F_BLK_SIZE |						    \
+    VTBLK_F_TOPOLOGY |						    \
     VIRTIO_RING_F_INDIRECT_DESC )	/* indirect descriptors */
 
 /*
@@ -81,11 +83,19 @@ struct vtblk_config {
 	uint64_t	vbc_capacity;
 	uint32_t	vbc_size_max;
 	uint32_t	vbc_seg_max;
-	uint16_t	vbc_geom_c;
-	uint8_t		vbc_geom_h;
-	uint8_t		vbc_geom_s;
+	struct {
+		uint16_t cylinders;
+		uint8_t heads;
+		uint8_t sectors;
+	} vbc_geometry;
 	uint32_t	vbc_blk_size;
-	uint32_t	vbc_sectors_max;
+	struct {
+		uint8_t physical_block_exp;
+		uint8_t alignment_offset;
+		uint16_t min_io_size;
+		uint32_t opt_io_size;
+	} vbc_topology;
+	uint8_t		vbc_writeback;
 } __packed;
 
 /*
@@ -118,6 +128,7 @@ struct pci_vtblk_softc {
 	pthread_mutex_t vsc_mtx;
 	struct vqueue_info vbsc_vq;
 	int		vbsc_fd;
+	int		vbsc_ischr;
 	struct vtblk_config vbsc_cfg;	
 	char vbsc_ident[VTBLK_BLK_ID_BYTES];
 };
@@ -206,12 +217,15 @@ pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vqueue_info *vq)
 	DPRINTF(("virtio-block: %s op, %d bytes, %d segs, offset %ld\n\r", 
 		 writeop ? "write" : "read/ident", iolen, i - 1, offset));
 
+	err = 0;
 	switch (type) {
 	case VBH_OP_WRITE:
-		err = pwritev(sc->vbsc_fd, iov + 1, i - 1, offset);
+		if (pwritev(sc->vbsc_fd, iov + 1, i - 1, offset) < 0)
+			err = errno;
 		break;
 	case VBH_OP_READ:
-		err = preadv(sc->vbsc_fd, iov + 1, i - 1, offset);
+		if (preadv(sc->vbsc_fd, iov + 1, i - 1, offset) < 0)
+			err = errno;
 		break;
 	case VBH_OP_IDENT:
 		/* Assume a single buffer */
@@ -221,7 +235,11 @@ pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vqueue_info *vq)
 		break;
 	case VBH_OP_FLUSH:
 	case VBH_OP_FLUSH_OUT:
-		err = fsync(sc->vbsc_fd);
+		if (sc->vbsc_ischr) {
+			if (ioctl(sc->vbsc_fd, DIOCGFLUSH))
+				err = errno;
+		} else if (fsync(sc->vbsc_fd))
+			err = errno;
 		break;
 	default:
 		err = -ENOSYS;
@@ -229,12 +247,11 @@ pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vqueue_info *vq)
 	}
 
 	/* convert errno into a virtio block error return */
-	if (err < 0) {
-		if (err == -ENOSYS)
-			*status = VTBLK_S_UNSUPP;
-		else
-			*status = VTBLK_S_IOERR;
-	} else
+	if (err == -ENOSYS)
+		*status = VTBLK_S_UNSUPP;
+	else if (err != 0)
+		*status = VTBLK_S_IOERR;
+	else
 		*status = VTBLK_S_OK;
 
 	/*
@@ -262,7 +279,7 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
 	MD5_CTX mdctx;
 	u_char digest[16];
 	struct pci_vtblk_softc *sc;
-	off_t size;	
+	off_t size, sts, sto;
 	int fd;
 	int sectsz;
 
@@ -291,6 +308,7 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
 	 */
 	size = sbuf.st_size;
 	sectsz = DEV_BSIZE;
+	sts = sto = 0;
 	if (S_ISCHR(sbuf.st_mode)) {
 		if (ioctl(fd, DIOCGMEDIASIZE, &size) < 0 ||
 		    ioctl(fd, DIOCGSECTORSIZE, &sectsz)) {
@@ -300,12 +318,16 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
 		}
 		assert(size != 0);
 		assert(sectsz != 0);
-	}
+		if (ioctl(fd, DIOCGSTRIPESIZE, &sts) == 0 && sts > 0)
+			ioctl(fd, DIOCGSTRIPEOFFSET, &sto);
+	} else
+		sts = sbuf.st_blksize;
 
 	sc = calloc(1, sizeof(struct pci_vtblk_softc));
 
 	/* record fd of storage device/file */
 	sc->vbsc_fd = fd;
+	sc->vbsc_ischr = S_ISCHR(sbuf.st_mode);
 
 	pthread_mutex_init(&sc->vsc_mtx, NULL);
 
@@ -328,13 +350,19 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
 
 	/* setup virtio block config space */
 	sc->vbsc_cfg.vbc_capacity = size / DEV_BSIZE; /* 512-byte units */
-	sc->vbsc_cfg.vbc_seg_max = VTBLK_MAXSEGS;
-	sc->vbsc_cfg.vbc_blk_size = sectsz;
 	sc->vbsc_cfg.vbc_size_max = 0;	/* not negotiated */
-	sc->vbsc_cfg.vbc_geom_c = 0;	/* no geometry */
-	sc->vbsc_cfg.vbc_geom_h = 0;
-	sc->vbsc_cfg.vbc_geom_s = 0;
-	sc->vbsc_cfg.vbc_sectors_max = 0;
+	sc->vbsc_cfg.vbc_seg_max = VTBLK_MAXSEGS;
+	sc->vbsc_cfg.vbc_geometry.cylinders = 0;	/* no geometry */
+	sc->vbsc_cfg.vbc_geometry.heads = 0;
+	sc->vbsc_cfg.vbc_geometry.sectors = 0;
+	sc->vbsc_cfg.vbc_blk_size = sectsz;
+	sc->vbsc_cfg.vbc_topology.physical_block_exp =
+	    (sts > sectsz) ? (ffsll(sts / sectsz) - 1) : 0;
+	sc->vbsc_cfg.vbc_topology.alignment_offset =
+	    (sto != 0) ? ((sts - sto) / sectsz) : 0;
+	sc->vbsc_cfg.vbc_topology.min_io_size = 0;
+	sc->vbsc_cfg.vbc_topology.opt_io_size = 0;
+	sc->vbsc_cfg.vbc_writeback = 0;
 
 	/*
 	 * Should we move some of this into virtio.c?  Could
diff --git a/usr.sbin/freebsd-update/freebsd-update.sh b/usr.sbin/freebsd-update/freebsd-update.sh
index 4c8891f6b03..24349291960 100644
--- a/usr.sbin/freebsd-update/freebsd-update.sh
+++ b/usr.sbin/freebsd-update/freebsd-update.sh
@@ -1231,7 +1231,7 @@ fetch_metadata_sanity () {
 	# Some aliases to save space later: ${P} is a character which can
 	# appear in a path; ${M} is the four numeric metadata fields; and
 	# ${H} is a sha256 hash.
-	P="[-+./:=%@_[~[:alnum:]]"
+	P="[-+./:=,%@_[~[:alnum:]]"
 	M="[0-9]+\|[0-9]+\|[0-9]+\|[0-9]+"
 	H="[0-9a-f]{64}"
 
diff --git a/usr.sbin/gpioctl/gpioctl.8 b/usr.sbin/gpioctl/gpioctl.8
index a0bf6536f8f..dc2a5541fb0 100644
--- a/usr.sbin/gpioctl/gpioctl.8
+++ b/usr.sbin/gpioctl/gpioctl.8
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 7, 2013
+.Dd March 8, 2015
 .Dt GPIOCTL 1
 .Os
 .Sh NAME
@@ -35,20 +35,25 @@
 .Nd GPIO control utility
 .Sh SYNOPSIS
 .Nm
-.Cm -l
 .Op Fl f Ar ctldev
+.Cm -l
 .Op Fl v
 .Nm
-.Cm -t
 .Op Fl f Ar ctldev
+.Cm -t
 .Ar pin
 .Nm
-.Cm -c
 .Op Fl f Ar ctldev
+.Cm -c
 .Ar pin
 .Ar flag
 .Op flag ...
 .Nm
+.Op Fl f Ar ctldev
+.Cm -n
+.Ar pin
+.Ar pin-name
+.Nm
 .Op Cm -f Ar ctldev
 .Ar pin
 .Ar [0|1]
@@ -60,7 +65,8 @@ utility could be used to manage GPIO pins from userland and list available pins.
 The options are as follows:
 .Bl -tag -width ".Fl f Ar ctldev"
 .It Fl c Ar pin Ar flag Op flag ...
-Configure pin by setting provided flags. The following flags are currently defined:
+Configure pin by setting provided flags.
+The following flags are currently defined:
 .Bl -tag -offset indent -width ".Cm PULSE"
 .It Cm IN
 Input pin
@@ -87,6 +93,8 @@ If not specified, defaults to
 .Pa /dev/gpioc0
 .It Fl l
 list available pins
+.It Fl n Ar pin Ar pin-name
+set the name used to describe the pin
 .It Fl t Ar pin
 toggle value of provided pin number
 .It Fl v
diff --git a/usr.sbin/gpioctl/gpioctl.c b/usr.sbin/gpioctl/gpioctl.c
index 37f84fa16b9..38e53e7f2fe 100644
--- a/usr.sbin/gpioctl/gpioctl.c
+++ b/usr.sbin/gpioctl/gpioctl.c
@@ -68,6 +68,7 @@ usage(void)
 	fprintf(stderr, "\tgpioctl [-f ctldev] -l [-v]\n");
 	fprintf(stderr, "\tgpioctl [-f ctldev] -t pin\n");
 	fprintf(stderr, "\tgpioctl [-f ctldev] -c pin flag ...\n");
+	fprintf(stderr, "\tgpioctl [-f ctldev] -n pin pin-name\n");
 	fprintf(stderr, "\tgpioctl [-f ctldev] pin [0|1]\n");
 	exit(1);
 }
@@ -182,11 +183,11 @@ main(int argc, char **argv)
 	char *ctlfile = NULL;
 	int pinn, pinv, ch;
 	int flags, flag, ok;
-	int config, toggle, verbose, list;
+	int config, list, name, toggle, verbose;
 
-	config = toggle = verbose = list = pinn = 0;
+	config = toggle = verbose = list = name = pinn = 0;
 
-	while ((ch = getopt(argc, argv, "c:f:lt:v")) != -1) {
+	while ((ch = getopt(argc, argv, "c:f:ln:t:v")) != -1) {
 		switch (ch) {
 		case 'c':
 			config = 1;
@@ -200,6 +201,12 @@ main(int argc, char **argv)
 		case 'l':
 			list = 1;
 			break;
+		case 'n':
+			name = 1;
+			pinn = str2int(optarg, &ok);
+			if (!ok)
+				fail("Invalid pin number: %s\n", optarg);
+			break;
 		case 't':
 			toggle = 1;
 			pinn = str2int(optarg, &ok);
@@ -225,6 +232,19 @@ main(int argc, char **argv)
 		exit(1);
 	}
 
+	/* Set the pin name. */
+	if (name) {
+		if (argc == 0) {
+			usage();
+			exit(1);
+		}
+		if (gpio_pin_set_name(handle, pinn, argv[0]) < 0) {
+			perror("gpio_pin_set_name");
+			exit(1);
+		}
+		exit(0);
+	}
+
 	if (list) {
 		dump_pins(handle, verbose);
 		gpio_close(handle);
diff --git a/usr.sbin/sysrc/sysrc b/usr.sbin/sysrc/sysrc
index 8a1a86341d4..bcb2178e2af 100644
--- a/usr.sbin/sysrc/sysrc
+++ b/usr.sbin/sysrc/sysrc
@@ -1,6 +1,6 @@
 #!/bin/sh
 #-
-# Copyright (c) 2010-2014 Devin Teske
+# Copyright (c) 2010-2015 Devin Teske
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -40,7 +40,7 @@ BSDCFG_SHARE="/usr/share/bsdconfig"
 #
 # Version information
 #
-SYSRC_VERSION="6.2 Nov-3,2014"
+SYSRC_VERSION="6.3 Mar-4,2015"
 
 #
 # Options
@@ -94,7 +94,7 @@ help()
 	local optfmt="\t%-11s%s\n"
 	local envfmt="\t%-17s%s\n"
 
-	f_err "Usage: %s [OPTIONS] name[[+]=value] ...\n" "$pgm"
+	f_err "Usage: %s [OPTIONS] name[[+|-]=value] ...\n" "$pgm"
 
 	f_err "OPTIONS:\n"
 	f_err "$optfmt" "-a" \
@@ -531,6 +531,7 @@ while [ $# -gt 0 ]; do
 
 	case "$NAME" in
 	*+) mode=APPEND NAME="${NAME%+}" ;;
+	*-) mode=REMOVE NAME="${NAME%-}" ;;
 	 *) mode=ASSIGN
 	esac
 
@@ -594,29 +595,70 @@ while [ $# -gt 0 ]; do
 		fi
 
 		#
-		# If `-N' is passed, simplify the output
+		# Determine both `before' value and appropriate `new' value
 		#
-		if [ ! "$SHOW_VALUE" ]; then
-			echo "$NAME"
-			case "$mode" in
-			APPEND)
-				before=$( f_sysrc_get "$NAME" )
-				f_sysrc_set "$NAME" "$before${1#*=}"
-				;;
-			*)
-				f_sysrc_set "$NAME" "${1#*=}"
+		case "$mode" in
+		APPEND)
+			before=$( f_sysrc_get "$NAME" )
+			add="${1#*=}"
+			delim="${add%"${add#?}"}" # first character
+			oldIFS="$IFS"
+			case "$delim" in
+			""|[$IFS]|[a-zA-Z0-9]) delim=" " ;;
+			*) IFS="$delim"
 			esac
-		else
+			new="$before"
+			for a in $add; do
+				[ "$a" ] || continue
+				skip=
+				for b in $before; do
+					[ "$b" = "$a" ] && skip=1 break
+				done
+				[ "$skip" ] || new="$new$delim$a"
+			done
+			new="${new#"$delim"}" IFS="$oldIFS"
+			unset add delim oldIFS a skip b
+			[ "$SHOW_FILE" ] && before=$( f_sysrc_find "$NAME" )
+			;;
+		REMOVE)
+			before=$( f_sysrc_get "$NAME" )
+			remove="${1#*=}"
+			delim="${remove%"${remove#?}"}" # first character
+			oldIFS="$IFS"
+			case "$delim" in
+			""|[$IFS]|[a-zA-Z0-9]) delim=" " ;;
+			*) IFS="$delim"
+			esac
+			new=
+			for b in $before; do
+				[ "$b" ] || continue
+				add=1
+				for r in $remove; do
+					[ "$r" = "$b" ] && add= break
+				done
+				[ "$add" ] && new="$new$delim$b"
+			done
+			new="${new#"$delim"}" IFS="$oldIFS"
+			unset remove delim oldIFS b add r
+			[ "$SHOW_FILE" ] && before=$( f_sysrc_find "$NAME" )
+			;;
+		*)
 			if [ "$SHOW_FILE" ]; then
 				before=$( f_sysrc_find "$NAME" )
 			else
 				before=$( f_sysrc_get "$NAME" )
 			fi
-			if case "$mode" in
-				APPEND) f_sysrc_set "$NAME" "$before${1#*=}" ;;
-				     *) f_sysrc_set "$NAME" "${1#*=}"
-				esac
-			then
+			new="${1#*=}"
+		esac
+
+		#
+		# If `-N' is passed, simplify the output
+		#
+		if [ ! "$SHOW_VALUE" ]; then
+			echo "$NAME"
+			f_sysrc_set "$NAME" "$new"
+		else
+			if f_sysrc_set "$NAME" "$new"; then
 				if [ "$SHOW_FILE" ]; then
 					after=$( f_sysrc_find "$NAME" )
 				else
diff --git a/usr.sbin/sysrc/sysrc.8 b/usr.sbin/sysrc/sysrc.8
index cba481fe62c..1bd761a748f 100644
--- a/usr.sbin/sysrc/sysrc.8
+++ b/usr.sbin/sysrc/sysrc.8
@@ -1,4 +1,4 @@
-.\" Copyright (c) 2011-2014 Devin Teske
+.\" Copyright (c) 2011-2015 Devin Teske
 .\" All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 4, 2014
+.Dd March 4, 2015
 .Dt SYSRC 8
 .Os
 .Sh NAME
@@ -35,7 +35,7 @@
 .Op Fl cdDeFhinNqvx
 .Op Fl f Ar file
 .Op Fl j Ar jail | Fl R Ar dir
-.Ar name Ns Op Ns Oo + Oc Ns = Ns Ar value
+.Ar name Ns Op Ns Oo +|- Oc Ns = Ns Ar value
 .Ar ...
 .Nm
 .Op Fl cdDeFhinNqvx
@@ -136,9 +136,14 @@ and also has the same
 .Ql name[=value]
 syntax for making queries/assignments.
 In addition
-.Pq unlike Xr sysctl 8 ,
+.Pq but unlike Xr sysctl 8 ,
 .Ql name+=value
-is supported for appending values.
+is supported for adding items to values
+.Pq see APPENDING VALUES
+and
+.Ql name-=value
+is supported for removing items from values
+.Pq see SUBTRACTING VALUES .
 .Pp
 However, while
 .Xr sysctl 8
@@ -187,6 +192,115 @@ modifying these integral files (yet taking care not to allow the file to
 grow unwieldy should
 .Nm
 be called repeatedly).
+.Sh APPENDING VALUES
+When using the
+.Ql key+=value
+syntax to add items to existing values,
+the first character of the value is taken as the delimiter separating items
+.Pq usually Qo \  Qc or Qo , Qc .
+For example, in the following statement:
+.Bl -tag -width indent+
+.It \ 
+.Nm
+cloned_interfaces+=" gif0"
+.El
+.Pp
+the first character is a space, informing
+.Nm
+that existing values are to be considered separated by whitespace.
+If
+.Ql gif0
+is not found in the existing value for
+.Va cloned_interfaces ,
+it is added
+.Pq with delimiter only if existing value is non-NULL .
+.Pp
+For convenience, if the first character is alpha-numeric
+.Pq letters A-Z, a-z, or numbers 0-9 ,
+.Nm
+uses the default setting of whitespace as separator.
+For example, the above and below statements are equivalent since
+.Dq gif0
+starts with an alpha-numeric character
+.Pq the letter Li g :
+.Pp
+.Bl -tag -width indent+
+.It \ 
+.Nm
+cloned_interfaces+=gif0
+.El
+.Pp
+Take the following sequence for example:
+.Bl -tag -width indent+
+.It \ 
+.Nm
+cloned_interfaces= # start with NULL
+.It \ 
+.Nm
+cloned_interfaces+=gif0
+.Dl # NULL -> `gif0' Pq NB: no preceding delimiter
+.It \ 
+.Nm
+cloned_interfaces+=gif0 # no change
+.It \ 
+.Nm
+cloned_interfaces+="tun0 gif0"
+.Dl # `gif0' -> `gif0 tun0' Pq NB: no duplication
+.El
+.Pp
+.Nm
+prevents the same value from being added if already there.
+.Sh SUBTRACTING VALUES
+When using the
+.Ql key-=value
+syntax to remove items from existing values,
+the first character of the value is taken as the delimiter separating items
+.Pq usually Qo \  Qc or Qo , Qc .
+For example, in the following statement:
+.Pp
+.Dl Nm cloned_interfaces-=" gif0"
+.Pp
+the first character is a space, informing
+.Nm
+that existing values are to be considered separated by whitespace.
+If
+.Ql gif0
+is found in the existing value for
+.Va cloned_interfaces ,
+it is removed
+.Pq extra delimiters removed .
+.Pp
+For convenience, if the first character is alpha-numeric
+.Pq letters A-Z, a-z, or numbers 0-9 ,
+.Nm
+uses the default setting of whitespace as separator.
+For example, the above and below statements are equivalent since
+.Dq gif0
+starts with an alpha-numeric character
+.Pq the letter Li g :
+.Pp
+.Bl -tag -width indent+
+.It \ 
+.Nm
+cloned_interfaces-=gif0
+.El
+.Pp
+Take the following sequence for example:
+.Bl -tag -width indent+
+.It \ 
+.Nm
+foo="bar baz" # start
+.It \ 
+.Nm
+foo-=bar # `bar baz' -> `baz'
+.It \ 
+.Nm
+foo-=baz # `baz' -> NULL
+.El
+.Pp
+.Nm
+removes all occurrences of all items provided
+and collapses extra delimiters between items.
 .Sh ENVIRONMENT
 The following environment variables are referenced by
 .Nm :
@@ -250,8 +364,12 @@ Working on other files, such as
 Appending to existing values:
 .Pp
 .Nm
-\&cloned_interfaces+=" gif0"
-.Dl appends Qo \ gif0 Qc to $cloned_interfaces .
+\&cloned_interfaces+=gif0
+.Dl appends Qo gif0 Qc to $cloned_interfaces Pq see APPENDING VALUES .
+.Pp
+.Nm
+\&cloned_interfaces-=gif0
+.Dl removes Qo gif0 Qc from $cloned_interfaces Pq see SUBTRACTING VALUES .
 .Pp
 In addition to the above syntax,
 .Nm