bus: Document special ranges of IVARs
Some IVAR indices are special in that they have global meaning across multiple buses where as other IVARs are always private to the local bus. Try to document this a bit and add constants for the various ranges to avoid future conflicts. This is a no-op, but IVAR indices are now generally defined as enums as that makes it easier to define them in terms of ranges. Reviewed by: imp, royger, andrew Differential Revision: https://reviews.freebsd.org/D54159
This commit is contained in:
@@ -35,10 +35,12 @@ struct arm_gic_range {
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uint64_t size;
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};
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#define GIC_IVAR_HW_REV 500
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#define GIC_IVAR_BUS 501
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#define GIC_IVAR_VGIC 502
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#define GIC_IVAR_SUPPORT_LPIS 503
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enum {
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GIC_IVAR_HW_REV = BUS_IVARS_GIC,
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GIC_IVAR_BUS,
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GIC_IVAR_VGIC,
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GIC_IVAR_SUPPORT_LPIS
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};
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/* GIC_IVAR_BUS values */
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#define GIC_BUS_UNKNOWN 0
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@@ -109,10 +109,12 @@ struct gic_v3_devinfo {
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MALLOC_DECLARE(M_GIC_V3);
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/* ivars */
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#define GICV3_IVAR_NIRQS 1000
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/* 1001 was GICV3_IVAR_REDIST_VADDR */
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#define GICV3_IVAR_REDIST 1002
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#define GICV3_IVAR_FLAGS 1003
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enum {
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GICV3_IVAR_NIRQS = BUS_IVARS_GICV3,
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_GICV3_IVAR_REDIST_VADDR, /* unused */
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GICV3_IVAR_REDIST,
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GICV3_IVAR_FLAGS,
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};
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__BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int);
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__BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *);
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@@ -277,11 +277,13 @@ extern int acpi_override_isa_irq_polarity;
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* interface compatibility with ISA drivers which can also
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* attach to ACPI.
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*/
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#define ACPI_IVAR_HANDLE 0x100
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#define ACPI_IVAR_UNUSED 0x101 /* Unused/reserved. */
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#define ACPI_IVAR_PRIVATE 0x102
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#define ACPI_IVAR_FLAGS 0x103
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#define ACPI_IVAR_DOMAIN 0x104
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enum {
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ACPI_IVAR_HANDLE = BUS_IVARS_ACPI,
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ACPI_IVAR_UNUSED, /* Unused/reserved. */
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ACPI_IVAR_PRIVATE,
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ACPI_IVAR_FLAGS,
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ACPI_IVAR_DOMAIN
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};
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/*
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* ad_domain NUMA domain special value.
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@@ -215,7 +215,7 @@ typedef struct atkbdc_softc {
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} atkbdc_softc_t;
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enum kbdc_device_ivar {
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KBDC_IVAR_VENDORID,
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KBDC_IVAR_VENDORID = BUS_IVARS_PRIVATE,
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KBDC_IVAR_SERIAL,
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KBDC_IVAR_LOGICALID,
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KBDC_IVAR_COMPATID,
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+1
-1
@@ -60,7 +60,7 @@
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* bhnd child instance variables
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*/
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enum bhnd_device_vars {
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BHND_IVAR_VENDOR, /**< Designer's JEP-106 manufacturer ID. */
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BHND_IVAR_VENDOR = BUS_IVARS_PRIVATE, /**< Designer's JEP-106 manufacturer ID. */
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BHND_IVAR_DEVICE, /**< Part number */
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BHND_IVAR_HWREV, /**< Core revision */
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BHND_IVAR_DEVICE_CLASS, /**< Core class (@sa bhnd_devclass_t) */
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@@ -69,7 +69,7 @@ struct fdc_data {
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};
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enum fdc_device_ivars {
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FDC_IVAR_FDUNIT,
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FDC_IVAR_FDUNIT = BUS_IVARS_PRIVATE,
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FDC_IVAR_FDTYPE,
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};
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@@ -109,7 +109,7 @@ struct gpiobus_ivar
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};
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enum gpiobus_ivars {
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GPIOBUS_IVAR_NPINS = 10500,
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GPIOBUS_IVAR_NPINS = BUS_IVARS_GPIOBUS,
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GPIOBUS_IVAR_PINS,
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};
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@@ -27,7 +27,7 @@
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#define _HID_HIDBUS_H_
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enum {
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HIDBUS_IVAR_USAGE,
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HIDBUS_IVAR_USAGE = BUS_IVARS_PRIVATE,
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HIDBUS_IVAR_INDEX,
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HIDBUS_IVAR_FLAGS,
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#define HIDBUS_FLAG_AUTOCHILD (0<<1) /* Child is autodiscovered */
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@@ -57,7 +57,7 @@ struct iicbus_ivar
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/* Value of 0x100 is reserved for ACPI_IVAR_HANDLE used by acpi_iicbus */
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enum {
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IICBUS_IVAR_ADDR /* Address or base address */
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IICBUS_IVAR_ADDR = BUS_IVARS_PRIVATE /* Address or base address */
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};
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#define IICBUS_ACCESSOR(A, B, T) \
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@@ -250,7 +250,7 @@ struct mii_phydesc {
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(*(p)->mii_funcs->pf_reset)(p)
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enum miibus_device_ivars {
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MIIBUS_IVAR_FLAGS
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MIIBUS_IVAR_FLAGS = BUS_IVARS_PRIVATE
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};
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/*
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@@ -60,7 +60,7 @@
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#include "mmcbr_if.h"
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enum mmcbr_device_ivars {
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MMCBR_IVAR_BUS_TYPE,
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MMCBR_IVAR_BUS_TYPE = BUS_IVARS_PRIVATE,
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MMCBR_IVAR_BUS_MODE,
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MMCBR_IVAR_BUS_WIDTH,
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MMCBR_IVAR_CHIP_SELECT,
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@@ -56,7 +56,7 @@
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#define DEV_MMC_MMCVAR_H
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enum mmc_device_ivars {
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MMC_IVAR_SPEC_VERS,
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MMC_IVAR_SPEC_VERS = BUS_IVARS_PRIVATE,
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MMC_IVAR_DSR_IMP,
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MMC_IVAR_MEDIA_SIZE,
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MMC_IVAR_RCA,
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@@ -79,7 +79,7 @@ _Static_assert(sizeof(struct nvdimm_label) == 256, "Incorrect layout");
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typedef uint32_t nfit_handle_t;
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enum nvdimm_acpi_ivar {
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NVDIMM_ROOT_IVAR_ACPI_HANDLE,
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NVDIMM_ROOT_IVAR_ACPI_HANDLE = BUS_IVARS_PRIVATE,
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NVDIMM_ROOT_IVAR_DEVICE_HANDLE,
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NVDIMM_ROOT_IVAR_MAX,
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};
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+1
-1
@@ -27,7 +27,7 @@
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#define DEV_OW_OW_H 1
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enum ow_device_ivars {
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OW_IVAR_FAMILY,
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OW_IVAR_FAMILY = BUS_IVARS_PRIVATE,
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OW_IVAR_ROMID
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};
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@@ -191,7 +191,7 @@ int pccard_select_cfe(device_t dev, int entry);
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/* ivar interface */
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enum {
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PCCARD_IVAR_ETHADDR, /* read ethernet address from CIS tupple */
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PCCARD_IVAR_ETHADDR = BUS_IVARS_PRIVATE, /* read ethernet address from CIS tupple */
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PCCARD_IVAR_VENDOR,
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PCCARD_IVAR_PRODUCT,
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PCCARD_IVAR_PRODEXT,
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@@ -340,7 +340,7 @@ struct pci_devinfo {
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#include "pci_if.h"
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enum pci_device_ivars {
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PCI_IVAR_SUBVENDOR,
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PCI_IVAR_SUBVENDOR = BUS_IVARS_PRIVATE,
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PCI_IVAR_SUBDEVICE,
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PCI_IVAR_VENDOR,
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PCI_IVAR_DEVICE,
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@@ -414,7 +414,7 @@ pci_write_config(device_t dev, int reg, uint32_t val, int width)
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/*typedef enum pci_device_ivars pcib_device_ivars;*/
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enum pcib_device_ivars {
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PCIB_IVAR_DOMAIN,
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PCIB_IVAR_DOMAIN = BUS_IVARS_PRIVATE,
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PCIB_IVAR_BUS
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};
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@@ -178,7 +178,9 @@ struct ppb_context {
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/*
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* List of IVARS available to ppb device drivers
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*/
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#define PPBUS_IVAR_MODE 0
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enum {
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PPBUS_IVAR_MODE = BUS_IVARS_PRIVATE
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};
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/* other fields are reserved to the ppbus internals */
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@@ -208,9 +210,11 @@ struct ppb_device {
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#define EPP_1_7 0x1
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/* Parallel Port Chipset IVARS */ /* elsewhere XXX */
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#define PPC_IVAR_EPP_PROTO 0
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#define PPC_IVAR_LOCK 1
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#define PPC_IVAR_INTR_HANDLER 2
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enum {
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PPC_IVAR_EPP_PROTO = BUS_IVARS_PRIVATE,
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PPC_IVAR_LOCK,
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PPC_IVAR_INTR_HANDLER
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};
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/*
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* Maximum size of the PnP info string
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@@ -32,8 +32,10 @@
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#include <sys/serial.h>
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#include <serdev_if.h>
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#define PUC_IVAR_CLOCK 0
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#define PUC_IVAR_TYPE 1
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enum {
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PUC_IVAR_CLOCK = BUS_IVARS_PRIVATE,
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PUC_IVAR_TYPE
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};
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/* Port types. */
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#define PUC_TYPE_SERIAL 1
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@@ -38,7 +38,7 @@ struct pwmbus_ivars {
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};
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enum {
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PWMBUS_IVAR_CHANNEL, /* Channel used by child dev */
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PWMBUS_IVAR_CHANNEL = BUS_IVARS_PRIVATE, /* Channel used by child dev */
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};
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#define PWMBUS_ACCESSOR(A, B, T) \
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@@ -29,9 +29,11 @@
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#ifndef _DEV_QUICC_BUS_H_
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#define _DEV_QUICC_BUS_H_
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#define QUICC_IVAR_CLOCK 1 /* The CPM clock. */
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#define QUICC_IVAR_BRGCLK 2 /* The BRG clock affected by SCCR. */
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#define QUICC_IVAR_DEVTYPE 3
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enum {
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QUICC_IVAR_CLOCK = BUS_IVARS_PRIVATE + 1, /* The CPM clock. */
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QUICC_IVAR_BRGCLK, /* The BRG clock affected by SCCR. */
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QUICC_IVAR_DEVTYPE
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};
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/* Device types. */
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#define QUICC_DEVTYPE_SCC 1
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@@ -32,12 +32,14 @@
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#include <sys/serial.h>
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#include <serdev_if.h>
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#define SCC_IVAR_CHANNEL 0
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#define SCC_IVAR_CLASS 1
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#define SCC_IVAR_CLOCK 2
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#define SCC_IVAR_MODE 3
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#define SCC_IVAR_REGSHFT 4
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#define SCC_IVAR_HWMTX 5
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enum {
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SCC_IVAR_CHANNEL = BUS_IVARS_PRIVATE,
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SCC_IVAR_CLASS,
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SCC_IVAR_CLOCK,
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SCC_IVAR_MODE,
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SCC_IVAR_REGSHFT,
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SCC_IVAR_HWMTX
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};
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/* Hardware class -- the SCC type. */
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#define SCC_CLASS_UNUSED 0
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@@ -64,7 +64,7 @@
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#ifdef _SYS_BUS_H_
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/* Ivars for sdiob. */
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enum sdiob_dev_enum {
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SDIOB_IVAR_SUPPORT_MULTIBLK,
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SDIOB_IVAR_SUPPORT_MULTIBLK = BUS_IVARS_PRIVATE,
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SDIOB_IVAR_FUNCTION,
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SDIOB_IVAR_FUNCNUM,
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SDIOB_IVAR_CLASS,
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@@ -75,7 +75,7 @@
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* ivars codes
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*/
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enum smbus_ivars {
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SMBUS_IVAR_ADDR, /* slave address of the device */
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SMBUS_IVAR_ADDR = BUS_IVARS_PRIVATE, /* slave address of the device */
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};
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int smbus_request_bus(device_t, device_t, int);
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@@ -982,7 +982,7 @@ typedef int nid_t;
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****************************************************************************/
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enum hdac_device_ivars {
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HDA_IVAR_CODEC_ID,
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HDA_IVAR_CODEC_ID = BUS_IVARS_PRIVATE,
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HDA_IVAR_NODE_ID,
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HDA_IVAR_VENDOR_ID,
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HDA_IVAR_DEVICE_ID,
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@@ -48,7 +48,7 @@ struct spibus_ivar
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#define SPIBUS_CS_HIGH (1U << 31)
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enum {
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SPIBUS_IVAR_CS, /* chip select that we're on */
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SPIBUS_IVAR_CS = BUS_IVARS_PRIVATE, /* chip select that we're on */
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SPIBUS_IVAR_MODE, /* SPI mode (0-3) */
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SPIBUS_IVAR_CLOCK, /* maximum clock freq for device */
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SPIBUS_IVAR_CS_DELAY, /* delay in microseconds after toggling chip select */
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@@ -60,7 +60,7 @@ device_t superio_find_dev(device_t superio, superio_dev_type_t type,
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int ldn);
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enum superio_ivars {
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SUPERIO_IVAR_LDN = 10600,
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SUPERIO_IVAR_LDN = BUS_IVARS_SUPERIO,
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SUPERIO_IVAR_TYPE,
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SUPERIO_IVAR_IOBASE,
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SUPERIO_IVAR_IOBASE2,
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@@ -53,13 +53,15 @@ struct vq_alloc_info;
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/*
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* VirtIO instance variables indices.
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*/
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#define VIRTIO_IVAR_DEVTYPE 1
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#define VIRTIO_IVAR_FEATURE_DESC 2
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#define VIRTIO_IVAR_VENDOR 3
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#define VIRTIO_IVAR_DEVICE 4
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#define VIRTIO_IVAR_SUBVENDOR 5
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#define VIRTIO_IVAR_SUBDEVICE 6
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#define VIRTIO_IVAR_MODERN 7
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enum {
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VIRTIO_IVAR_DEVTYPE = BUS_IVARS_PRIVATE + 1,
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VIRTIO_IVAR_FEATURE_DESC,
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VIRTIO_IVAR_VENDOR,
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VIRTIO_IVAR_DEVICE,
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VIRTIO_IVAR_SUBVENDOR,
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VIRTIO_IVAR_SUBDEVICE,
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VIRTIO_IVAR_MODERN
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};
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struct virtio_feature_desc {
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uint64_t vfd_val;
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+1
-1
@@ -103,7 +103,7 @@ struct isa_pnp_id {
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};
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enum isa_device_ivars {
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ISA_IVAR_PORT,
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ISA_IVAR_PORT = BUS_IVARS_PRIVATE,
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ISA_IVAR_PORT_0 = ISA_IVAR_PORT,
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ISA_IVAR_PORT_1,
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ISA_IVAR_PORTSIZE,
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@@ -29,7 +29,7 @@
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#define _POWERPC_PS3_PS3BUS_H
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enum {
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PS3BUS_IVAR_BUS,
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PS3BUS_IVAR_BUS = BUS_IVARS_PRIVATE,
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PS3BUS_IVAR_DEVICE,
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PS3BUS_IVAR_BUSTYPE,
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PS3BUS_IVAR_DEVTYPE,
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@@ -35,7 +35,7 @@
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*/
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enum iobus_ivars {
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IOBUS_IVAR_NODE,
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IOBUS_IVAR_NODE = BUS_IVARS_PRIVATE,
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IOBUS_IVAR_NAME,
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IOBUS_IVAR_NREGS,
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IOBUS_IVAR_REGS,
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@@ -297,6 +297,22 @@ enum intr_polarity {
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INTR_POLARITY_LOW = 2
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};
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/**
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* Bus drivers may maintain a set of bus-specific instance variables
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* for each child device. The BUS_READ_IVAR/BUS_WRITE_IVAR API can be
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* used to access these variables using an index value. Some index
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* values are private to a single bus and should be defined in the
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* private range. Other index values are shared by multiple busses
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* and must have the same meaning in all bus drivers.
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*/
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#define BUS_IVARS_PRIVATE 0x0 /* private variables */
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#define BUS_IVARS_ACPI 0x100
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#define BUS_IVARS_GIC 500
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#define BUS_IVARS_GICV3 1000
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#define BUS_IVARS_GPIOBUS 10500
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#define BUS_IVARS_SUPERIO 10600
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/**
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* CPU sets supported by bus_get_cpus(). Note that not all sets may be
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* supported for a given device. If a request is not supported by a
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+6
-4
@@ -35,10 +35,12 @@
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* CPU device support.
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*/
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#define CPU_IVAR_PCPU 1
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#define CPU_IVAR_NOMINAL_MHZ 2
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#define CPU_IVAR_CPUID_SIZE 3
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#define CPU_IVAR_CPUID 4
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enum {
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CPU_IVAR_PCPU = BUS_IVARS_PRIVATE + 1,
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CPU_IVAR_NOMINAL_MHZ,
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CPU_IVAR_CPUID_SIZE,
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CPU_IVAR_CPUID
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};
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static __inline struct pcpu *
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cpu_get_pcpu(device_t dev)
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@@ -30,7 +30,7 @@
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#define _X86_LEGACYVAR_H_
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enum legacy_device_ivars {
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LEGACY_IVAR_PCIDOMAIN,
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LEGACY_IVAR_PCIDOMAIN = BUS_IVARS_PRIVATE,
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LEGACY_IVAR_PCIBUS,
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LEGACY_IVAR_PCISLOT,
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LEGACY_IVAR_PCIFUNC
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@@ -55,7 +55,7 @@ enum {
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/**
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* Path of this device node.
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*/
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XENBUS_IVAR_NODE,
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XENBUS_IVAR_NODE = BUS_IVARS_PRIVATE,
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/**
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* The device type (e.g. vif, vbd).
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