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sfxge(4): sync tlv_layout.h with firmwaresrc and update port-mode definition use

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It fixes driver attach issue to a new firmware which reports a new
port-modes.

Reviewed by:    gnn
Submitted by:   Tom Millington <tmillington at solarflare.com>
Sponsored by:   Solarflare Communications, Inc.
MFC after:      2 days
Differential Revision:  https://reviews.freebsd.org/D8203
This commit is contained in:
Andrew Rybchenko
2016-10-10 09:54:01 +00:00
parent 5d67f6752b
commit 622429035a
2 changed files with 29 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sys/dev/sfxge/common/ef10_nic.c
+5 -3
View File
@@ -164,6 +164,7 @@ ef10_nic_get_port_mode_bandwidth(
break;
case TLV_PORT_MODE_10G_10G_10G_10G:
case TLV_PORT_MODE_10G_10G_10G_10G_Q:
case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2:
case TLV_PORT_MODE_10G_10G_10G_10G_Q2:
bandwidth = 10000 * 4;
break;
@@ -1122,8 +1123,7 @@ static struct {
{
EFX_FAMILY_MEDFORD,
(1 << TLV_PORT_MODE_10G) |
(1 << TLV_PORT_MODE_10G_10G) |
(1 << TLV_PORT_MODE_10G_10G_10G_10G),
(1 << TLV_PORT_MODE_10G_10G),
1
},
/* Supported modes requiring 2 outputs per port */
@@ -1140,13 +1140,15 @@ static struct {
(1 << TLV_PORT_MODE_40G) |
(1 << TLV_PORT_MODE_40G_40G) |
(1 << TLV_PORT_MODE_40G_10G_10G) |
(1 << TLV_PORT_MODE_10G_10G_40G),
(1 << TLV_PORT_MODE_10G_10G_40G) |
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),
2
},
/* Supported modes requiring 4 outputs per port */
{
EFX_FAMILY_MEDFORD,
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q) |
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1) |
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q2),
4
},
sys/dev/sfxge/common/ef10_tlv_layout.h
+24 -8
View File
@@ -553,12 +553,14 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_40G (1) /* 40G, single QSFP/40G-KR */
#define TLV_PORT_MODE_10G_10G (2) /* 2x10G, dual SFP/10G-KR or single QSFP */
#define TLV_PORT_MODE_40G_40G (3) /* 40G + 40G, dual QSFP/40G-KR (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G (4) /* 2x10G + 2x10G, quad SFP/10G-KR or dual QSFP (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G_Q (5) /* 4x10G, single QSFP, cage 0 (Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G (4) /* 2x10G + 2x10G, quad SFP/10G-KR or dual QSFP (Greenport) */
#define TLV_PORT_MODE_10G_10G_10G_10G_Q1 (4) /* 4x10G, single QSFP, cage 0 (Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G_Q (5) /* 4x10G, single QSFP, cage 0 (Medford) OBSOLETE DO NOT USE */
#define TLV_PORT_MODE_40G_10G_10G (6) /* 1x40G + 2x10G, dual QSFP (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_40G (7) /* 2x10G + 1x40G, dual QSFP (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G_Q2 (8) /* 4x10G, single QSFP, cage 1 (Medford) */
#define TLV_PORT_MODE_MAX TLV_PORT_MODE_10G_10G_10G_10G_Q2
#define TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2 (9) /* 2x10G + 2x10G, dual QSFP (Medford) */
#define TLV_PORT_MODE_MAX TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2
};
/* Type of the v-switch created implicitly by the firmware */
@@ -765,8 +767,8 @@ struct tlv_rx_event_merging_config {
#define TLV_RX_EVENT_MERGING_CONFIG_MAX_EVENTS_MAX ((1 << 4) - 1)
uint32_t timeout_ns;
};
#define TLV_RX_EVENT_MERGING_MAX_EVENTS_DEFAULT 7
#define TLV_RX_EVENT_MERGING_TIMEOUT_NS_DEFAULT 8740
#define TLV_RX_EVENT_MERGING_MAX_EVENTS_DEFAULT (0xffffffff)
#define TLV_RX_EVENT_MERGING_TIMEOUT_NS_DEFAULT (0xffffffff)
#define TLV_TAG_PCIE_LINK_SETTINGS (0x101f0000)
struct tlv_pcie_link_settings {
@@ -791,9 +793,9 @@ struct tlv_tx_event_merging_config {
uint32_t timeout_ns;
uint32_t qempty_timeout_ns; /* Medford only */
};
#define TLV_TX_EVENT_MERGING_MAX_EVENTS_DEFAULT 7
#define TLV_TX_EVENT_MERGING_TIMEOUT_NS_DEFAULT 1400
#define TLV_TX_EVENT_MERGING_QEMPTY_TIMEOUT_NS_DEFAULT 700
#define TLV_TX_EVENT_MERGING_MAX_EVENTS_DEFAULT (0xffffffff)
#define TLV_TX_EVENT_MERGING_TIMEOUT_NS_DEFAULT (0xffffffff)
#define TLV_TX_EVENT_MERGING_QEMPTY_TIMEOUT_NS_DEFAULT (0xffffffff)
/* Tx vFIFO Low latency configuration
*
@@ -809,6 +811,20 @@ struct tlv_tx_vfifo_ull_mode {
#define TLV_TX_VFIFO_ULL_MODE_DEFAULT 0
};
/* BIU mode
*
* Medford2 tag for selecting VI window decode (see values below)
*/
#define TLV_TAG_BIU_VI_WINDOW_MODE (0x10280000)
struct tlv_biu_vi_window_mode {
uint32_t tag;
uint32_t length;
uint8_t mode;
#define TLV_BIU_VI_WINDOW_MODE_8K 0 /* 8k per VI, CTPIO not mapped, medford/hunt compatible */
#define TLV_BIU_VI_WINDOW_MODE_16K 1 /* 16k per VI, CTPIO mapped */
#define TLV_BIU_VI_WINDOW_MODE_64K 2 /* 64k per VI, CTPIO mapped, POWER-friendly */
};
#define TLV_TAG_LICENSE (0x30800000)
typedef struct tlv_license {