Add receiver timeout interrupt enable bit implemented in some

system on chips.

Submitted by:	kan
Sponsored by:	DARPA, AFRL

This commit is contained in:

Ruslan Bukin

2016-11-19 16:00:05 +00:00

parent cbfebd9a6e

commit 57b28934e9

1 changed files with 6 additions and 1 deletions

									
										sys/dev/ic/ns16550.h
									
		+6
		-1
	
												View File
												
				@@ -45,8 +45,13 @@

				#define	IER_ETXRDY	0x2

				#define	IER_ERLS	0x4

				#define	IER_EMSC	0x8

				/*

				 * Receive timeout interrupt enable.

				 * Implemented in Intel XScale, Ingenic XBurst.

				 */

				#define	IER_RXTMOUT	0x10

				#define	IER_BITS	"\20\1ERXRDY\2ETXRDY\3ERLS\4EMSC"

				#define	IER_BITS	"\20\1ERXRDY\2ETXRDY\3ERLS\4EMSC\5RXTMOUT"

				#define	com_iir		2	/* interrupt identification register (R) */

				#define	REG_IIR		com_iir