ioat(4): Add an API to get HW revision

Different revisions support different operations.  Refer to Intel
External Design Specifications to figure out what your hardware
supports.

Sponsored by:	EMC / Isilon Storage Division

share/man/man4/ioat.4

@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd December 14, 2015
+.Dd December 17, 2015
 .Dt IOAT 4
 .Os
 .Sh NAME
@@ -64,6 +64,8 @@ In
 .Ft void
 .Fn ioat_put_dmaengine "bus_dmaengine_t dmaengine"
 .Ft int
+.Fn ioat_get_hwversion "bus_dmaengine_t dmaengine"
+.Ft int
 .Fn ioat_set_interrupt_coalesce "bus_dmaengine_t dmaengine" "uint16_t delay"
 .Ft uint16_t
 .Fn ioat_get_max_coalesce_period "bus_dmaengine_t dmaengine"

sys/dev/ioat/ioat.c

@@ -735,6 +735,15 @@ ioat_put_dmaengine(bus_dmaengine_t dmaengine)
 	ioat_put(ioat, IOAT_DMAENGINE_REF);
 }
 
+int
+ioat_get_hwversion(bus_dmaengine_t dmaengine)
+{
+	struct ioat_softc *ioat;
+
+	ioat = to_ioat_softc(dmaengine);
+	return (ioat->version);
+}
+
 int
 ioat_set_interrupt_coalesce(bus_dmaengine_t dmaengine, uint16_t delay)
 {

sys/dev/ioat/ioat.h

@@ -48,6 +48,14 @@ __FBSDID("$FreeBSD$");
 #define	DMA_NO_WAIT	0x2
 #define	DMA_ALL_FLAGS	(DMA_INT_EN | DMA_NO_WAIT)
 
+/*
+ * Hardware revision number.  Different hardware revisions support different
+ * features.  For example, 3.2 cannot read from MMIO space, while 3.3 can.
+ */
+#define	IOAT_VER_3_0			0x30
+#define	IOAT_VER_3_2			0x32
+#define	IOAT_VER_3_3			0x33
+
 typedef void *bus_dmaengine_t;
 struct bus_dmadesc;
 typedef void (*bus_dmaengine_callback_t)(void *arg, int error);
@@ -60,6 +68,9 @@ bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index);
 /* Release the DMA channel */
 void ioat_put_dmaengine(bus_dmaengine_t dmaengine);
 
+/* Check the DMA engine's HW version */
+int ioat_get_hwversion(bus_dmaengine_t dmaengine);
+
 /*
  * Set interrupt coalescing on a DMA channel.
  *

sys/dev/ioat/ioat_hw.h

@@ -46,9 +46,6 @@ __FBSDID("$FreeBSD$");
 
 #define	IOAT_CBVER_OFFSET		0x08
 
-#define	IOAT_VER_3_0			0x30
-#define	IOAT_VER_3_3			0x33
-
 #define	IOAT_INTRDELAY_OFFSET		0x0C
 #define	IOAT_INTRDELAY_SUPPORTED	(1 << 15)
 /* Reserved.				(1 << 14) */