Add Matt Thomas's DC21040 PCI Ethernet driver. (This is turning out
to be quite a popular chip, so expect to see a number of products based on it.)
This commit is contained in:
+1180
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,65 @@
|
||||
$Id: README.de,v 1.1 1994/08/16 20:40:56 thomas Exp $
|
||||
|
||||
----------------
|
||||
|
||||
The enclosed driver should be considered as beta-test software. It
|
||||
has run on exactly one machine. Therefore testing has been limited.
|
||||
This driver is in no way supported by Digital Equipment. See the
|
||||
disclaimers in the sources for more.
|
||||
|
||||
This driver the DEC DE435 PCI NIC. It should also work with other PCI
|
||||
boards that use the DC21040-AA chip (also known as TULIP). This
|
||||
driver requires the DC21040-AA to be pass 2.3 or later. If you are
|
||||
using a eariler pass chip, you may encounter undetected transmit
|
||||
corruptions. This driver also requires that DC21040-AA use a serial
|
||||
Ethernet address ROM as described in the DC21040 specification.
|
||||
|
||||
The DEC DE425 ESIA NIC based on the DC21040-AA is not support at
|
||||
this time. A future update will include support for it.
|
||||
|
||||
The driver includes full support for both BPF and IP Multicast.
|
||||
If the autosensing of the driver fails, you can use ifconfig(8) to
|
||||
switch the driver to the correct port.
|
||||
|
||||
ifconfig de0 altphys Thinwire/AUI port
|
||||
ifconfig de0 -altphys 10baseT/UTP port
|
||||
|
||||
This driver requires the NCR 53C810 PCI SCSI package to be installed.
|
||||
This can be obtained from FTP.Uni-Koeln.DE:~ftp/packages/FreeBSD.
|
||||
|
||||
[All paths are relative to the top of sys source area, usually
|
||||
/usr/src/sys.]
|
||||
|
||||
The following files need to be moved into their respective
|
||||
directories:
|
||||
|
||||
if_de.c --> i386/pci
|
||||
dc21040.h --> i386/pci
|
||||
|
||||
You will need to apply the following patches:
|
||||
|
||||
pat.files.i386 --> i386/conf/files.i386
|
||||
pat.pci --> i386/pci/pci.c, i386/pci/pci_config.c
|
||||
|
||||
After that is done you will need to edit your config file (in
|
||||
i386/conf) and lines similar to:
|
||||
|
||||
controller pci0 at isa? irq 9
|
||||
device de0
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|
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The above assumes the board is configured to use IRQ 9 by your
|
||||
BIOS. Change the IRQ if need to match your configuration.
|
||||
|
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Now you are ready to rebuild your kernel, reboot, and see if the
|
||||
driver can configure your board. When the system boots, you will
|
||||
hopefully something close to:
|
||||
|
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on pci0:7 <digital dc21040 ethernet> irq a isa=9 [1] as de0
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||||
memory size=0x1000 virtual=0xf25e9000 physical=0xc0001000
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||||
de0: enabling Thinwire/AUI port
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de0: DC21040 pass 2.3 (TULIP) ethernet address 08:00:2b:e2:1e:09
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bpf: de0 attached
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||||
|
||||
in the startup log. If so, the board configured properly and
|
||||
should be ready to use.
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|
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@@ -0,0 +1,34 @@
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$Id: README,v 1.5 1994/08/16 20:40:56 thomas Exp $
|
||||
|
||||
----------------
|
||||
|
||||
The enclosed drivers should be considered beta-test software. These
|
||||
drivers are in no way supported by Digital Equipment. See the
|
||||
disclaimers in the sources for more information. Please be aware that
|
||||
Digital does not employee me to write drivers for FreeBSD.
|
||||
|
||||
This kit contains two drivers:
|
||||
|
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de DEC DE435 PCI NIC or compatible
|
||||
le DEC EtherWORKS II/EtherWORKS III NICs
|
||||
|
||||
See README.de and README.le for information and installation
|
||||
instruction specific to each driver.
|
||||
|
||||
Could you please send me the startup messages in the boot
|
||||
long along with the type of your PC once the driver configures?
|
||||
|
||||
If you have any problems, comments, suggestions, rant or raves, don't
|
||||
hesitate to send me mail @ thomas@lkg.dec.com.
|
||||
|
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Lastly, if you change or modify the code, I want context diffs of your
|
||||
changes. I want this to the canonical DEC EtherWORKS driver kit for
|
||||
FreeBSD, NetBSD, BSD/386, and any other BSD based O/S. Please make
|
||||
sure your diffs are approriate conditionalized.
|
||||
|
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Thanks,
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Matt Thomas
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||||
--
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||||
Mail: thomas@lkg.dec.com
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||||
URL: http://ftp.digital.com/~thomas/
|
||||
|
||||
@@ -0,0 +1,214 @@
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||||
/*-
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* Copyright (c) 1994 Matt Thomas (thomas@lkg.dec.com)
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software withough specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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||||
* $Id: dc21040.h,v 1.2 1994/08/15 20:42:25 thomas Exp thomas $
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*
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||||
* $Log: dc21040.h,v $
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||||
* Revision 1.2 1994/08/15 20:42:25 thomas
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||||
* misc additions
|
||||
*
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* Revision 1.1 1994/08/12 21:02:46 thomas
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* Initial revision
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||||
*
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||||
* Revision 1.8 1994/08/05 20:20:54 thomas
|
||||
* Enable change log
|
||||
*
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||||
* Revision 1.7 1994/08/05 20:20:14 thomas
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||||
* *** empty log message ***
|
||||
*
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||||
*/
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||||
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||||
#if !defined(_DC21040_H)
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#define _DC21040_H
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typedef signed int tulip_sint32_t;
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typedef unsigned int tulip_uint32_t;
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#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN
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#define TULIP_BITFIELD2(a, b) b, a
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#define TULIP_BITFIELD3(a, b, c) c, b, a
|
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#define TULIP_BITFIELD4(a, b, c, d) d, c, b, a
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#else
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#define TULIP_BITFIELD2(a, b) a, b
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#define TULIP_BITFIELD3(a, b, c) a, b, c
|
||||
#define TULIP_BITFIELD4(a, b, c, d) a, b, c, d
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#endif
|
||||
|
||||
typedef struct {
|
||||
tulip_uint32_t d_status;
|
||||
tulip_uint32_t TULIP_BITFIELD3(d_length1 : 11,
|
||||
d_length2 : 11,
|
||||
d_flag : 10);
|
||||
tulip_uint32_t d_addr1;
|
||||
tulip_uint32_t d_addr2;
|
||||
} tulip_desc_t;
|
||||
|
||||
#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = DC21040) */
|
||||
#define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */
|
||||
/*
|
||||
* Transmit Status
|
||||
*/
|
||||
#define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */
|
||||
#define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */
|
||||
#define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */
|
||||
#define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */
|
||||
#define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */
|
||||
#define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */
|
||||
#define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */
|
||||
#define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */
|
||||
#define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */
|
||||
#define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */
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||||
#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */
|
||||
/*
|
||||
* Receive Status
|
||||
*/
|
||||
#define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */
|
||||
#define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */
|
||||
#define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */
|
||||
#define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */
|
||||
#define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */
|
||||
#define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */
|
||||
#define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */
|
||||
#define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */
|
||||
#define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */
|
||||
#define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */
|
||||
#define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */
|
||||
#define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */
|
||||
#define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */
|
||||
|
||||
|
||||
#define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */
|
||||
#define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */
|
||||
|
||||
#define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */
|
||||
#define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */
|
||||
#define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */
|
||||
#define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */
|
||||
#define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */
|
||||
#define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */
|
||||
#define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */
|
||||
#define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */
|
||||
|
||||
/*
|
||||
* The DC21040 Registers (IO Space Addresses)
|
||||
*/
|
||||
#define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */
|
||||
#define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */
|
||||
#define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */
|
||||
#define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */
|
||||
#define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */
|
||||
#define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */
|
||||
#define TULIP_REG_CMD 0x30 /* CSR6 -- Command */
|
||||
#define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */
|
||||
#define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */
|
||||
#define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */
|
||||
#define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */
|
||||
#define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */
|
||||
#define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */
|
||||
#define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */
|
||||
#define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */
|
||||
#define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */
|
||||
|
||||
/*
|
||||
* CSR5 -- Status Register
|
||||
* CSR7 -- Interrupt Control
|
||||
*/
|
||||
#define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */
|
||||
#define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */
|
||||
#define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */
|
||||
#define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */
|
||||
#define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */
|
||||
#define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */
|
||||
#define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */
|
||||
#define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */
|
||||
#define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */
|
||||
#define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */
|
||||
#define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */
|
||||
#define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an
|
||||
unavailable transmit descriptor */
|
||||
#define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */
|
||||
#define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/
|
||||
#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */
|
||||
#define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */
|
||||
#define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive
|
||||
packet before prefetch of next descriptor */
|
||||
#define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */
|
||||
#define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of
|
||||
unavailable receive buffers */
|
||||
#define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */
|
||||
#define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame
|
||||
from the receive FIFO as a result of
|
||||
an unavailable receive buffer */
|
||||
#define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame
|
||||
from the receive FIFO into the receive
|
||||
buffer. */
|
||||
#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */
|
||||
#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */
|
||||
#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */
|
||||
#define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure */
|
||||
#define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd */
|
||||
#define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch */
|
||||
#define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */
|
||||
#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */
|
||||
#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */
|
||||
#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */
|
||||
#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */
|
||||
#define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */
|
||||
#define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */
|
||||
#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */
|
||||
#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */
|
||||
|
||||
/*
|
||||
* CSR6 -- Command (Operation Mode) Register
|
||||
*/
|
||||
#define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */
|
||||
#define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) */
|
||||
#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */
|
||||
#define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */
|
||||
#define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */
|
||||
#define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */
|
||||
#define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */
|
||||
#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */
|
||||
#define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */
|
||||
#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */
|
||||
#define TULIP_CMD_FULLDULPEX 0x00000200L /* (RW) Full Duplex Mode */
|
||||
#define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */
|
||||
#define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */
|
||||
#define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */
|
||||
#define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */
|
||||
#define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */
|
||||
#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */
|
||||
#define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */
|
||||
#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */
|
||||
#define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */
|
||||
|
||||
|
||||
#define TULIP_SIASTS_LINKFAIL 0x00000004L
|
||||
#define TULIP_SIACONN_RESET 0x00000000L
|
||||
|
||||
#define TULIP_SIACONN_AUI 0x0000000DL
|
||||
#define TULIP_SIACONN_10BASET 0x00000005L
|
||||
|
||||
#define TULIP_BUSMODE_SWRESET 0x00000001L
|
||||
|
||||
#endif /* !defined(_DC21040_H) */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,65 @@
|
||||
$Id: README.de,v 1.1 1994/08/16 20:40:56 thomas Exp $
|
||||
|
||||
----------------
|
||||
|
||||
The enclosed driver should be considered as beta-test software. It
|
||||
has run on exactly one machine. Therefore testing has been limited.
|
||||
This driver is in no way supported by Digital Equipment. See the
|
||||
disclaimers in the sources for more.
|
||||
|
||||
This driver the DEC DE435 PCI NIC. It should also work with other PCI
|
||||
boards that use the DC21040-AA chip (also known as TULIP). This
|
||||
driver requires the DC21040-AA to be pass 2.3 or later. If you are
|
||||
using a eariler pass chip, you may encounter undetected transmit
|
||||
corruptions. This driver also requires that DC21040-AA use a serial
|
||||
Ethernet address ROM as described in the DC21040 specification.
|
||||
|
||||
The DEC DE425 ESIA NIC based on the DC21040-AA is not support at
|
||||
this time. A future update will include support for it.
|
||||
|
||||
The driver includes full support for both BPF and IP Multicast.
|
||||
If the autosensing of the driver fails, you can use ifconfig(8) to
|
||||
switch the driver to the correct port.
|
||||
|
||||
ifconfig de0 altphys Thinwire/AUI port
|
||||
ifconfig de0 -altphys 10baseT/UTP port
|
||||
|
||||
This driver requires the NCR 53C810 PCI SCSI package to be installed.
|
||||
This can be obtained from FTP.Uni-Koeln.DE:~ftp/packages/FreeBSD.
|
||||
|
||||
[All paths are relative to the top of sys source area, usually
|
||||
/usr/src/sys.]
|
||||
|
||||
The following files need to be moved into their respective
|
||||
directories:
|
||||
|
||||
if_de.c --> i386/pci
|
||||
dc21040.h --> i386/pci
|
||||
|
||||
You will need to apply the following patches:
|
||||
|
||||
pat.files.i386 --> i386/conf/files.i386
|
||||
pat.pci --> i386/pci/pci.c, i386/pci/pci_config.c
|
||||
|
||||
After that is done you will need to edit your config file (in
|
||||
i386/conf) and lines similar to:
|
||||
|
||||
controller pci0 at isa? irq 9
|
||||
device de0
|
||||
|
||||
The above assumes the board is configured to use IRQ 9 by your
|
||||
BIOS. Change the IRQ if need to match your configuration.
|
||||
|
||||
Now you are ready to rebuild your kernel, reboot, and see if the
|
||||
driver can configure your board. When the system boots, you will
|
||||
hopefully something close to:
|
||||
|
||||
on pci0:7 <digital dc21040 ethernet> irq a isa=9 [1] as de0
|
||||
memory size=0x1000 virtual=0xf25e9000 physical=0xc0001000
|
||||
de0: enabling Thinwire/AUI port
|
||||
de0: DC21040 pass 2.3 (TULIP) ethernet address 08:00:2b:e2:1e:09
|
||||
bpf: de0 attached
|
||||
|
||||
in the startup log. If so, the board configured properly and
|
||||
should be ready to use.
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
$Id: README,v 1.5 1994/08/16 20:40:56 thomas Exp $
|
||||
|
||||
----------------
|
||||
|
||||
The enclosed drivers should be considered beta-test software. These
|
||||
drivers are in no way supported by Digital Equipment. See the
|
||||
disclaimers in the sources for more information. Please be aware that
|
||||
Digital does not employee me to write drivers for FreeBSD.
|
||||
|
||||
This kit contains two drivers:
|
||||
|
||||
de DEC DE435 PCI NIC or compatible
|
||||
le DEC EtherWORKS II/EtherWORKS III NICs
|
||||
|
||||
See README.de and README.le for information and installation
|
||||
instruction specific to each driver.
|
||||
|
||||
Could you please send me the startup messages in the boot
|
||||
long along with the type of your PC once the driver configures?
|
||||
|
||||
If you have any problems, comments, suggestions, rant or raves, don't
|
||||
hesitate to send me mail @ thomas@lkg.dec.com.
|
||||
|
||||
Lastly, if you change or modify the code, I want context diffs of your
|
||||
changes. I want this to the canonical DEC EtherWORKS driver kit for
|
||||
FreeBSD, NetBSD, BSD/386, and any other BSD based O/S. Please make
|
||||
sure your diffs are approriate conditionalized.
|
||||
|
||||
Thanks,
|
||||
Matt Thomas
|
||||
--
|
||||
Mail: thomas@lkg.dec.com
|
||||
URL: http://ftp.digital.com/~thomas/
|
||||
|
||||
@@ -0,0 +1,214 @@
|
||||
/*-
|
||||
* Copyright (c) 1994 Matt Thomas (thomas@lkg.dec.com)
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software withough specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: dc21040.h,v 1.2 1994/08/15 20:42:25 thomas Exp thomas $
|
||||
*
|
||||
* $Log: dc21040.h,v $
|
||||
* Revision 1.2 1994/08/15 20:42:25 thomas
|
||||
* misc additions
|
||||
*
|
||||
* Revision 1.1 1994/08/12 21:02:46 thomas
|
||||
* Initial revision
|
||||
*
|
||||
* Revision 1.8 1994/08/05 20:20:54 thomas
|
||||
* Enable change log
|
||||
*
|
||||
* Revision 1.7 1994/08/05 20:20:14 thomas
|
||||
* *** empty log message ***
|
||||
*
|
||||
*/
|
||||
|
||||
#if !defined(_DC21040_H)
|
||||
#define _DC21040_H
|
||||
|
||||
typedef signed int tulip_sint32_t;
|
||||
typedef unsigned int tulip_uint32_t;
|
||||
|
||||
#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN
|
||||
#define TULIP_BITFIELD2(a, b) b, a
|
||||
#define TULIP_BITFIELD3(a, b, c) c, b, a
|
||||
#define TULIP_BITFIELD4(a, b, c, d) d, c, b, a
|
||||
#else
|
||||
#define TULIP_BITFIELD2(a, b) a, b
|
||||
#define TULIP_BITFIELD3(a, b, c) a, b, c
|
||||
#define TULIP_BITFIELD4(a, b, c, d) a, b, c, d
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
tulip_uint32_t d_status;
|
||||
tulip_uint32_t TULIP_BITFIELD3(d_length1 : 11,
|
||||
d_length2 : 11,
|
||||
d_flag : 10);
|
||||
tulip_uint32_t d_addr1;
|
||||
tulip_uint32_t d_addr2;
|
||||
} tulip_desc_t;
|
||||
|
||||
#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = DC21040) */
|
||||
#define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */
|
||||
/*
|
||||
* Transmit Status
|
||||
*/
|
||||
#define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */
|
||||
#define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */
|
||||
#define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */
|
||||
#define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */
|
||||
#define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */
|
||||
#define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */
|
||||
#define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */
|
||||
#define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */
|
||||
#define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */
|
||||
#define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */
|
||||
#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */
|
||||
/*
|
||||
* Receive Status
|
||||
*/
|
||||
#define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */
|
||||
#define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */
|
||||
#define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */
|
||||
#define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */
|
||||
#define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */
|
||||
#define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */
|
||||
#define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */
|
||||
#define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */
|
||||
#define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */
|
||||
#define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */
|
||||
#define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */
|
||||
#define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */
|
||||
#define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */
|
||||
|
||||
|
||||
#define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */
|
||||
#define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */
|
||||
|
||||
#define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */
|
||||
#define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */
|
||||
#define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */
|
||||
#define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */
|
||||
#define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */
|
||||
#define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */
|
||||
#define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */
|
||||
#define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */
|
||||
|
||||
/*
|
||||
* The DC21040 Registers (IO Space Addresses)
|
||||
*/
|
||||
#define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */
|
||||
#define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */
|
||||
#define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */
|
||||
#define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */
|
||||
#define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */
|
||||
#define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */
|
||||
#define TULIP_REG_CMD 0x30 /* CSR6 -- Command */
|
||||
#define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */
|
||||
#define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */
|
||||
#define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */
|
||||
#define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */
|
||||
#define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */
|
||||
#define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */
|
||||
#define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */
|
||||
#define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */
|
||||
#define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */
|
||||
|
||||
/*
|
||||
* CSR5 -- Status Register
|
||||
* CSR7 -- Interrupt Control
|
||||
*/
|
||||
#define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */
|
||||
#define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */
|
||||
#define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */
|
||||
#define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */
|
||||
#define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */
|
||||
#define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */
|
||||
#define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */
|
||||
#define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */
|
||||
#define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */
|
||||
#define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */
|
||||
#define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */
|
||||
#define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an
|
||||
unavailable transmit descriptor */
|
||||
#define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */
|
||||
#define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/
|
||||
#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */
|
||||
#define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */
|
||||
#define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive
|
||||
packet before prefetch of next descriptor */
|
||||
#define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */
|
||||
#define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of
|
||||
unavailable receive buffers */
|
||||
#define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */
|
||||
#define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame
|
||||
from the receive FIFO as a result of
|
||||
an unavailable receive buffer */
|
||||
#define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame
|
||||
from the receive FIFO into the receive
|
||||
buffer. */
|
||||
#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */
|
||||
#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */
|
||||
#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */
|
||||
#define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure */
|
||||
#define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd */
|
||||
#define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch */
|
||||
#define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */
|
||||
#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */
|
||||
#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */
|
||||
#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */
|
||||
#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */
|
||||
#define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */
|
||||
#define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */
|
||||
#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */
|
||||
#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */
|
||||
|
||||
/*
|
||||
* CSR6 -- Command (Operation Mode) Register
|
||||
*/
|
||||
#define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */
|
||||
#define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) */
|
||||
#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */
|
||||
#define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */
|
||||
#define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */
|
||||
#define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */
|
||||
#define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */
|
||||
#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */
|
||||
#define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */
|
||||
#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */
|
||||
#define TULIP_CMD_FULLDULPEX 0x00000200L /* (RW) Full Duplex Mode */
|
||||
#define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */
|
||||
#define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */
|
||||
#define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */
|
||||
#define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */
|
||||
#define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */
|
||||
#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */
|
||||
#define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */
|
||||
#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */
|
||||
#define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */
|
||||
|
||||
|
||||
#define TULIP_SIASTS_LINKFAIL 0x00000004L
|
||||
#define TULIP_SIACONN_RESET 0x00000000L
|
||||
|
||||
#define TULIP_SIACONN_AUI 0x0000000DL
|
||||
#define TULIP_SIACONN_10BASET 0x00000005L
|
||||
|
||||
#define TULIP_BUSMODE_SWRESET 0x00000001L
|
||||
|
||||
#endif /* !defined(_DC21040_H) */
|
||||
+1180
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user