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Import device-tree files from Linux 6.7

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This commit is contained in:
Emmanuel Vadot
2024-04-19 18:03:26 +02:00
parent dbacf41c97
commit 1fcc28bca1
1064 changed files with 43112 additions and 4190 deletions
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Bindings/Makefile
+1 -1
View File
@@ -6,7 +6,7 @@ DT_MK_SCHEMA ?= dt-mk-schema
DT_SCHEMA_LINT = $(shell which yamllint || \
echo "warning: python package 'yamllint' not installed, skipping" >&2)
DT_SCHEMA_MIN_VERSION = 2022.3
DT_SCHEMA_MIN_VERSION = 2023.9
PHONY += check_dtschema_version
check_dtschema_version:
Bindings/arm/amd,pensando.yaml
+26
View File
@@ -0,0 +1,26 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/amd,pensando.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AMD Pensando SoC Platforms
maintainers:
- Brad Larson <blarson@amd.com>
properties:
$nodename:
const: "/"
compatible:
oneOf:
- description: Boards with Pensando Elba SoC
items:
- enum:
- amd,pensando-elba-ortano
- const: amd,pensando-elba
additionalProperties: true
...
Bindings/arm/amlogic.yaml
+3
View File
@@ -155,6 +155,7 @@ properties:
- enum:
- bananapi,bpi-m2s
- khadas,vim3
- libretech,aml-a311d-cc
- radxa,zero2
- const: amlogic,a311d
- const: amlogic,g12b
@@ -196,6 +197,7 @@ properties:
- hardkernel,odroid-hc4
- haochuangyi,h96-max
- khadas,vim3l
- libretech,aml-s905d3-cc
- seirobotics,sei610
- const: amlogic,sm1
@@ -203,6 +205,7 @@ properties:
items:
- enum:
- amlogic,ad401
- amlogic,ad402
- const: amlogic,a1
- description: Boards with the Amlogic C3 C302X/C308L SoC
Bindings/arm/arm,coresight-cti.yaml
+24 -10
View File
@@ -92,11 +92,8 @@ properties:
maxItems: 1
cpu:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Handle to cpu this device is associated with. This must appear in the
base cti node if compatible string arm,coresight-cti-v8-arch is used,
or may appear in a trig-conns child node when appropriate.
Handle to cpu this CTI is associated with.
power-domains:
maxItems: 1
@@ -113,12 +110,12 @@ properties:
description:
defines a phandle reference to an associated CoreSight trace device.
When the associated trace device is enabled, then the respective CTI
will be enabled. Use in a trig-conns node, or in CTI base node when
compatible string arm,coresight-cti-v8-arch used. If the associated
device has not been registered then the node name will be stored as
the connection name for later resolution. If the associated device is
not a CoreSight device or not registered then the node name will remain
the connection name and automatic enabling will not occur.
will be enabled. Use in CTI base node when compatible string
arm,coresight-cti-v8-arch used. If the associated device has not been
registered then the node name will be stored as the connection name for
later resolution. If the associated device is not a CoreSight device or
not registered then the node name will remain the connection name and
automatic enabling will not occur.
# size cells and address cells required if trig-conns node present.
"#size-cells":
@@ -130,6 +127,8 @@ properties:
patternProperties:
'^trig-conns@([0-9]+)$':
type: object
additionalProperties: false
description:
A trigger connections child node which describes the trigger signals
between this CTI and another hardware device. This device may be a CPU,
@@ -141,6 +140,21 @@ patternProperties:
reg:
maxItems: 1
cpu:
description:
Handle to cpu this trigger connection is associated with.
arm,cs-dev-assoc:
$ref: /schemas/types.yaml#/definitions/phandle
description:
defines a phandle reference to an associated CoreSight trace device.
When the associated trace device is enabled, then the respective CTI
will be enabled. If the associated device has not been registered
then the node name will be stored as the connection name for later
resolution. If the associated device is not a CoreSight device or
not registered then the node name will remain the connection name
and automatic enabling will not occur.
arm,trig-in-sigs:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
Bindings/arm/arm,integrator.yaml
-39
View File
@@ -40,45 +40,6 @@ properties:
items:
- const: arm,integrator-sp
core-module@10000000:
type: object
description: the root node in the Integrator platforms must contain
a core module child node. They are always at physical address
0x10000000 in all the Integrator variants.
properties:
compatible:
items:
- const: arm,core-module-integrator
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
patternProperties:
"^syscon@[0-9a-f]+$":
description: All Integrator boards must provide a system controller as a
node in the root of the device tree.
type: object
properties:
compatible:
items:
- enum:
- arm,integrator-ap-syscon
- arm,integrator-cp-syscon
- arm,integrator-sp-syscon
- const: syscon
reg:
maxItems: 1
required:
- compatible
- reg
required:
- compatible
- core-module@10000000
Bindings/arm/arm,realview.yaml
-37
View File
@@ -75,43 +75,6 @@ properties:
type: object
description: All RealView boards must provide a syscon system controller
node inside the soc node.
properties:
compatible:
oneOf:
- items:
- const: arm,realview-eb11mp-revb-syscon
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-eb11mp-revc-syscon
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pb1176-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pb11mp-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pba8-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pbx-syscon
- const: syscon
- const: simple-mfd
required:
- compatible
- reg
required:
- compatible
Bindings/arm/arm,versatile.yaml
+8 -32
View File
@@ -14,6 +14,14 @@ description: |+
with various pluggable interface boards, in essence the Versatile PB version
is a superset of the Versatile AB version.
The root node in the Versatile platforms must contain a core module child
node. They are always at physical address 0x10000000 in all the Versatile
variants.
When fitted with the IB2 Interface Board, the Versatile AB will present an
optional system controller node which controls the extra peripherals on the
interface board.
properties:
$nodename:
const: '/'
@@ -32,38 +40,6 @@ properties:
items:
- const: arm,versatile-pb
core-module@10000000:
type: object
description: the root node in the Versatile platforms must contain
a core module child node. They are always at physical address
0x10000000 in all the Versatile variants.
properties:
compatible:
items:
- const: arm,core-module-versatile
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
patternProperties:
"^syscon@[0-9a-f]+$":
type: object
description: When fitted with the IB2 Interface Board, the Versatile
AB will present an optional system controller node which controls the
extra peripherals on the interface board.
properties:
compatible:
contains:
const: arm,versatile-ib2-syscon
required:
- compatible
- reg
required:
- compatible
- core-module@10000000
Bindings/arm/aspeed/aspeed.yaml
+1
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@@ -79,6 +79,7 @@ properties:
- facebook,elbert-bmc
- facebook,fuji-bmc
- facebook,greatlakes-bmc
- facebook,minerva-cmc
- facebook,yosemite4-bmc
- ibm,everest-bmc
- ibm,rainier-bmc
Bindings/arm/atmel-at91.yaml
+7
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@@ -79,6 +79,13 @@ properties:
- const: atmel,sama5d2
- const: atmel,sama5
- description: Microchip SAMA5D29 Curiosity
items:
- const: microchip,sama5d29-curiosity
- const: atmel,sama5d29
- const: atmel,sama5d2
- const: atmel,sama5
- items:
- const: atmel,sama5d27
- const: atmel,sama5d2
Bindings/arm/cpus.yaml
+4 -1
View File
@@ -190,6 +190,7 @@ properties:
- qcom,kryo280
- qcom,kryo360
- qcom,kryo385
- qcom,kryo465
- qcom,kryo468
- qcom,kryo485
- qcom,kryo560
@@ -308,7 +309,9 @@ properties:
power-domains property.
For PSCI based platforms, the name corresponding to the index of the PSCI
PM domain provider, must be "psci".
PM domain provider, must be "psci". For SCMI based platforms, the name
corresponding to the index of an SCMI performance domain provider, must be
"perf".
qcom,saw:
$ref: /schemas/types.yaml#/definitions/phandle
Bindings/arm/fsl.yaml
+41 -2
View File
@@ -25,8 +25,11 @@ properties:
- description: i.MX23 based Boards
items:
- enum:
- creative,x-fi3
- fsl,imx23-evk
- fsl,stmp378x-devb
- olimex,imx23-olinuxino
- sandisk,sansa_fuze_plus
- const: fsl,imx23
- description: i.MX25 Product Development Kit
@@ -385,6 +388,12 @@ properties:
- const: toradex,apalis_imx6q
- const: fsl,imx6q
- description: i.MX6Q Variscite VAR-SOM-MX6 Boards
items:
- const: variscite,mx6customboard
- const: variscite,var-som-imx6q
- const: fsl,imx6q
- description: TQ-Systems TQMa6Q SoM (variant A) on MBa6x
items:
- const: tq,imx6q-mba6x-a
@@ -975,7 +984,9 @@ properties:
- description: PHYTEC phyCORE-i.MX8MM SoM based boards
items:
- const: phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK
- enum:
- phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK
- phytec,imx8mm-phygate-tauri-l # phyGATE-Tauri-L Gateway
- const: phytec,imx8mm-phycore-som # phyCORE-i.MX8MM SoM
- const: fsl,imx8mm
@@ -1389,6 +1400,13 @@ properties:
- fsl,ls1043a-qds
- const: fsl,ls1043a
- description: TQ-Systems LS1043A based Boards
items:
- enum:
- tq,ls1043a-tqmls1043a-mbls10xxa
- const: tq,ls1043a-tqmls1043a
- const: fsl,ls1043a
- description: LS1046A based Boards
items:
- enum:
@@ -1397,6 +1415,13 @@ properties:
- fsl,ls1046a-rdb
- const: fsl,ls1046a
- description: TQ-Systems LS1046A based Boards
items:
- enum:
- tq,ls1046a-tqmls1046a-mbls10xxa
- const: tq,ls1046a-tqmls1046a
- const: fsl,ls1046a
- description: LS1088A based Boards
items:
- enum:
@@ -1404,6 +1429,13 @@ properties:
- fsl,ls1088a-rdb
- const: fsl,ls1088a
- description: TQ-Systems LS1088A based Boards
items:
- enum:
- tq,ls1088a-tqmls1088a-mbls10xxa
- const: tq,ls1088a-tqmls1088a
- const: fsl,ls1088a
- description: LS2080A based Boards
items:
- enum:
@@ -1429,7 +1461,7 @@ properties:
- fsl,lx2162a-qds
- const: fsl,lx2160a
- description: SolidRun LX2160A based Boards
- description: SolidRun LX2160A CEX-7 based Boards
items:
- enum:
- solidrun,clearfog-cx
@@ -1437,6 +1469,13 @@ properties:
- const: solidrun,lx2160a-cex7
- const: fsl,lx2160a
- description: SolidRun LX2162A SoM based Boards
items:
- enum:
- solidrun,lx2162a-clearfog
- const: solidrun,lx2162a-som
- const: fsl,lx2160a
- description: S32G2 based Boards
items:
- enum:
Bindings/arm/intel-ixp4xx.yaml
+16
View File
@@ -16,12 +16,28 @@ properties:
oneOf:
- items:
- enum:
- adieng,coyote
- arcom,vulcan
- dlink,dsm-g600-a
- freecom,fsg-3
- gateway,7001
- gateworks,gw2348
- goramo,multilink-router
- intel,ixdp425
- intel,ixdpg425
- iom,nas-100d
- linksys,nslu2
- netgear,wg302v1
- netgear,wg302v2
- usr,8200
- welltech,epbx100
- linksys,wrv54g
- gemtek,gtwx5715
- const: intel,ixp42x
- items:
- enum:
- gateworks,gw2358
- intel,kixrp435
- const: intel,ixp43x
additionalProperties: true
Bindings/arm/mediatek.yaml
+16
View File
@@ -133,11 +133,22 @@ properties:
- enum:
- mediatek,mt8183-evb
- const: mediatek,mt8183
- description: Google Hayato rev5
items:
- const: google,hayato-rev5-sku2
- const: google,hayato-sku2
- const: google,hayato
- const: mediatek,mt8192
- description: Google Hayato
items:
- const: google,hayato-rev1
- const: google,hayato
- const: mediatek,mt8192
- description: Google Spherion rev4 (Acer Chromebook 514)
items:
- const: google,spherion-rev4
- const: google,spherion
- const: mediatek,mt8192
- description: Google Spherion (Acer Chromebook 514)
items:
- const: google,spherion-rev3
@@ -248,6 +259,11 @@ properties:
- enum:
- mediatek,mt8365-evk
- const: mediatek,mt8365
- items:
- enum:
- mediatek,mt8395-evk
- const: mediatek,mt8395
- const: mediatek,mt8195
- items:
- enum:
- mediatek,mt8516-pumpkin
Bindings/arm/mediatek/mediatek,mt7622-wed.yaml
+1
View File
@@ -22,6 +22,7 @@ properties:
- mediatek,mt7622-wed
- mediatek,mt7981-wed
- mediatek,mt7986-wed
- mediatek,mt7988-wed
- const: syscon
reg:
Bindings/arm/psci.yaml
+1
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@@ -101,6 +101,7 @@ properties:
patternProperties:
"^power-domain-":
$ref: /schemas/power/power-domain.yaml#
unevaluatedProperties: false
type: object
description: |
Bindings/arm/qcom.yaml
+45
View File
@@ -50,6 +50,7 @@ description: |
msm8998
qcs404
qcm2290
qcm6490
qdu1000
qrb2210
qrb4210
@@ -79,6 +80,7 @@ description: |
sm6125
sm6350
sm6375
sm7125
sm7225
sm8150
sm8250
@@ -189,6 +191,7 @@ properties:
- items:
- enum:
- longcheer,l9100
- samsung,a7
- sony,kanuti-tulip
- square,apq8039-t2
@@ -391,6 +394,11 @@ properties:
- const: qcom,qrb2210
- const: qcom,qcm2290
- items:
- enum:
- fairphone,fp5
- const: qcom,qcm6490
- description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
items:
- enum:
@@ -479,6 +487,11 @@ properties:
- const: google,lazor-rev8
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev9)
items:
- const: google,lazor-rev9
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (newest rev)
items:
- const: google,lazor
@@ -500,6 +513,11 @@ properties:
- const: google,lazor-rev8-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (rev9)
items:
- const: google,lazor-rev9-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (newest rev)
items:
- const: google,lazor-sku2
@@ -521,9 +539,16 @@ properties:
- const: google,lazor-rev8-sku0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (rev9)
items:
- const: google,lazor-rev9-sku0
- const: google,lazor-rev9-sku10
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (newest rev)
items:
- const: google,lazor-sku0
- const: google,lazor-sku10
- const: qcom,sc7180
- description: Acer Chromebook 511 (rev4 - rev8)
@@ -535,9 +560,16 @@ properties:
- const: google,lazor-rev8-sku4
- const: qcom,sc7180
- description: Acer Chromebook 511 (rev9)
items:
- const: google,lazor-rev9-sku4
- const: google,lazor-rev9-sku15
- const: qcom,sc7180
- description: Acer Chromebook 511 (newest rev)
items:
- const: google,lazor-sku4
- const: google,lazor-sku15
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev4)
@@ -554,9 +586,16 @@ properties:
- const: google,lazor-rev8-sku6
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev9)
items:
- const: google,lazor-rev9-sku6
- const: google,lazor-rev9-sku18
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (newest rev)
items:
- const: google,lazor-sku6
- const: google,lazor-sku18
- const: qcom,sc7180
- description: Google Mrbland with AUO panel (rev0)
@@ -943,6 +982,11 @@ properties:
- sony,pdx225
- const: qcom,sm6375
- items:
- enum:
- xiaomi,joyeuse
- const: qcom,sm7125
- items:
- enum:
- fairphone,fp4
@@ -1086,6 +1130,7 @@ allOf:
- qcom,sm6115
- qcom,sm6125
- qcom,sm6350
- qcom,sm7125
- qcom,sm7225
- qcom,sm8150
- qcom,sm8250
Bindings/arm/rockchip.yaml
+25
View File
@@ -660,6 +660,11 @@ properties:
- pine64,quartz64-b
- const: rockchip,rk3566
- description: Pine64 QuartzPro64
items:
- const: pine64,quartzpro64
- const: rockchip,rk3588
- description: Pine64 SoQuartz SoM
items:
- enum:
@@ -669,6 +674,11 @@ properties:
- const: pine64,soquartz
- const: rockchip,rk3566
- description: Powkiddy RGB30
items:
- const: powkiddy,rgb30
- const: rockchip,rk3566
- description: Radxa Compute Module 3(CM3)
items:
- enum:
@@ -870,6 +880,16 @@ properties:
- const: tronsmart,orion-r68-meta
- const: rockchip,rk3368
- description: Turing RK1
items:
- const: turing,rk1
- const: rockchip,rk3588
- description: Xunlong Orange Pi 5 Plus
items:
- const: xunlong,orangepi-5-plus
- const: rockchip,rk3588
- description: Xunlong Orange Pi R1 Plus / LTS
items:
- enum:
@@ -877,6 +897,11 @@ properties:
- xunlong,orangepi-r1-plus-lts
- const: rockchip,rk3328
- description: Xunlong Orange Pi 5
items:
- const: xunlong,orangepi-5
- const: rockchip,rk3588s
- description: Zkmagic A95X Z2
items:
- const: zkmagic,a95x-z2
Bindings/arm/sti.yaml
+15 -8
View File
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/sti.yaml#
@@ -13,13 +13,20 @@ properties:
$nodename:
const: '/'
compatible:
items:
- enum:
- st,stih415
- st,stih416
- st,stih407
- st,stih410
- st,stih418
oneOf:
- items:
- const: st,stih407-b2120
- const: st,stih407
- items:
- enum:
- st,stih410-b2120
- st,stih410-b2260
- const: st,stih410
- items:
- enum:
- st,stih418-b2199
- st,stih418-b2264
- const: st,stih418
additionalProperties: true
Bindings/arm/stm32/stm32.yaml
+1
View File
@@ -146,6 +146,7 @@ properties:
- lxa,stm32mp157c-mc1 # Linux Automation MC-1
- lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1)
- lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2)
- oct,stm32mp157c-osd32-red # Octavo OSD32MP1 RED board
- const: oct,stm32mp15xx-osd32
- enum:
- st,stm32mp157
Bindings/arm/sunxi.yaml
+16
View File
@@ -51,6 +51,11 @@ properties:
- const: allwinner,parrot
- const: allwinner,sun8i-a33
- description: Anbernic RG-Nano
items:
- const: anbernic,rg-nano
- const: allwinner,sun8i-v3s
- description: Amarula A64 Relic
items:
- const: amarula,a64-relic
@@ -151,6 +156,17 @@ properties:
- const: roofull,beelink-x2
- const: allwinner,sun8i-h3
- description: BigTreeTech Manta M4/8P
items:
- const: bigtreetech,cb1-manta
- const: bigtreetech,cb1
- const: allwinner,sun50i-h616
- description: BigTreeTech Pi
items:
- const: bigtreetech,pi
- const: allwinner,sun50i-h616
- description: Chuwi V7 CW0825
items:
- const: chuwi,v7-cw0825
Bindings/ata/nvidia,tegra-ahci.yaml
+1 -1
View File
@@ -151,7 +151,7 @@ allOf:
- interconnects
- power-domains
additionalProperties: true
additionalProperties: false
examples:
- |
Bindings/cache/qcom,llcc.yaml
Vendored
+10
View File
@@ -20,6 +20,7 @@ description: |
properties:
compatible:
enum:
- qcom,qdu1000-llcc
- qcom,sc7180-llcc
- qcom,sc7280-llcc
- qcom,sc8180x-llcc
@@ -44,6 +45,14 @@ properties:
interrupts:
maxItems: 1
nvmem-cells:
items:
- description: Reference to an nvmem node for multi channel DDR
nvmem-cell-names:
items:
- const: multi-chan-ddr
required:
- compatible
- reg
@@ -92,6 +101,7 @@ allOf:
compatible:
contains:
enum:
- qcom,qdu1000-llcc
- qcom,sc8180x-llcc
- qcom,sc8280xp-llcc
then:
Bindings/clock/amlogic,s4-peripherals-clkc.yaml
+96
View File
@@ -0,0 +1,96 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/amlogic,s4-peripherals-clkc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic S4 Peripherals Clock Controller
maintainers:
- Yu Tu <yu.tu@amlogic.com>
properties:
compatible:
const: amlogic,s4-peripherals-clkc
reg:
maxItems: 1
clocks:
minItems: 14
items:
- description: input fixed pll div2
- description: input fixed pll div2p5
- description: input fixed pll div3
- description: input fixed pll div4
- description: input fixed pll div5
- description: input fixed pll div7
- description: input hifi pll
- description: input gp0 pll
- description: input mpll0
- description: input mpll1
- description: input mpll2
- description: input mpll3
- description: input hdmi pll
- description: input oscillator (usually at 24MHz)
- description: input external 32kHz reference (optional)
clock-names:
minItems: 14
items:
- const: fclk_div2
- const: fclk_div2p5
- const: fclk_div3
- const: fclk_div4
- const: fclk_div5
- const: fclk_div7
- const: hifi_pll
- const: gp0_pll
- const: mpll0
- const: mpll1
- const: mpll2
- const: mpll3
- const: hdmi_pll
- const: xtal
- const: ext_32k
"#clock-cells":
const: 1
required:
- compatible
- reg
- clocks
- clock-names
- "#clock-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
clkc_periphs: clock-controller@fe000000 {
compatible = "amlogic,s4-peripherals-clkc";
reg = <0xfe000000 0x49c>;
clocks = <&clkc_pll 3>,
<&clkc_pll 13>,
<&clkc_pll 5>,
<&clkc_pll 7>,
<&clkc_pll 9>,
<&clkc_pll 11>,
<&clkc_pll 17>,
<&clkc_pll 15>,
<&clkc_pll 25>,
<&clkc_pll 27>,
<&clkc_pll 29>,
<&clkc_pll 31>,
<&clkc_pll 20>,
<&xtal>;
clock-names = "fclk_div2", "fclk_div2p5", "fclk_div3", "fclk_div4",
"fclk_div5", "fclk_div7", "hifi_pll", "gp0_pll",
"mpll0", "mpll1", "mpll2", "mpll3", "hdmi_pll", "xtal";
#clock-cells = <1>;
};
...
Bindings/clock/amlogic,s4-pll-clkc.yaml
+49
View File
@@ -0,0 +1,49 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/amlogic,s4-pll-clkc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic S4 PLL Clock Controller
maintainers:
- Yu Tu <yu.tu@amlogic.com>
properties:
compatible:
const: amlogic,s4-pll-clkc
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: xtal
"#clock-cells":
const: 1
required:
- compatible
- reg
- clocks
- clock-names
- "#clock-cells"
additionalProperties: false
examples:
- |
clkc_pll: clock-controller@fe008000 {
compatible = "amlogic,s4-pll-clkc";
reg = <0xfe008000 0x1e8>;
clocks = <&xtal>;
clock-names = "xtal";
#clock-cells = <1>;
};
...
Bindings/clock/qcom,hfpll.txt
+3
View File
@@ -12,6 +12,9 @@ PROPERTIES
"qcom,hfpll-apq8064", "qcom,hfpll"
"qcom,hfpll-msm8974", "qcom,hfpll"
"qcom,hfpll-msm8960", "qcom,hfpll"
"qcom,msm8976-hfpll-a53", "qcom,hfpll"
"qcom,msm8976-hfpll-a72", "qcom,hfpll"
"qcom,msm8976-hfpll-cci", "qcom,hfpll"
- reg:
Usage: required
Bindings/clock/qcom,rpmhcc.yaml
+1
View File
@@ -28,6 +28,7 @@ properties:
- qcom,sdx55-rpmh-clk
- qcom,sdx65-rpmh-clk
- qcom,sdx75-rpmh-clk
- qcom,sm4450-rpmh-clk
- qcom,sm6350-rpmh-clk
- qcom,sm8150-rpmh-clk
- qcom,sm8250-rpmh-clk
Bindings/clock/qcom,sm4450-gcc.yaml
+55
View File
@@ -0,0 +1,55 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller on SM4450
maintainers:
- Ajit Pandey <quic_ajipan@quicinc.com>
- Taniya Das <quic_tdas@quicinc.com>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on SM4450
See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h
properties:
compatible:
const: qcom,sm4450-gcc
clocks:
items:
- description: Board XO source
- description: Sleep clock source
- description: UFS Phy Rx symbol 0 clock source
- description: UFS Phy Rx symbol 1 clock source
- description: UFS Phy Tx symbol 0 clock source
- description: USB3 Phy wrapper pipe clock source
required:
- compatible
- clocks
allOf:
- $ref: qcom,gcc.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
clock-controller@100000 {
compatible = "qcom,sm4450-gcc";
reg = <0x00100000 0x001f4200>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
<&ufs_mem_phy 0>, <&ufs_mem_phy 1>,
<&ufs_mem_phy 2>, <&usb_1_qmpphy>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...
Bindings/clock/qcom,sm8450-camcc.yaml
+6 -2
View File
@@ -13,11 +13,15 @@ description: |
Qualcomm camera clock control module provides the clocks, resets and power
domains on SM8450.
See also:: include/dt-bindings/clock/qcom,sm8450-camcc.h
See also::
include/dt-bindings/clock/qcom,sm8450-camcc.h
include/dt-bindings/clock/qcom,sm8550-camcc.h
properties:
compatible:
const: qcom,sm8450-camcc
enum:
- qcom,sm8450-camcc
- qcom,sm8550-camcc
clocks:
items:
Bindings/clock/renesas,rzg2l-cpg.yaml
+1
View File
@@ -27,6 +27,7 @@ properties:
- renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five
- renesas,r9a07g044-cpg # RZ/G2{L,LC}
- renesas,r9a07g054-cpg # RZ/V2L
- renesas,r9a08g045-cpg # RZ/G3S
- renesas,r9a09g011-cpg # RZ/V2M
reg:
Bindings/cpufreq/cpufreq-qcom-hw.yaml
+4
View File
@@ -23,6 +23,7 @@ properties:
- enum:
- qcom,qcm2290-cpufreq-hw
- qcom,sc7180-cpufreq-hw
- qcom,sdm670-cpufreq-hw
- qcom,sdm845-cpufreq-hw
- qcom,sm6115-cpufreq-hw
- qcom,sm6350-cpufreq-hw
@@ -36,11 +37,13 @@ properties:
- qcom,sa8775p-cpufreq-epss
- qcom,sc7280-cpufreq-epss
- qcom,sc8280xp-cpufreq-epss
- qcom,sdx75-cpufreq-epss
- qcom,sm6375-cpufreq-epss
- qcom,sm8250-cpufreq-epss
- qcom,sm8350-cpufreq-epss
- qcom,sm8450-cpufreq-epss
- qcom,sm8550-cpufreq-epss
- qcom,sm8650-cpufreq-epss
- const: qcom,cpufreq-epss
reg:
@@ -128,6 +131,7 @@ allOf:
- qcom,qdu1000-cpufreq-epss
- qcom,sc7180-cpufreq-hw
- qcom,sc8280xp-cpufreq-epss
- qcom,sdm670-cpufreq-hw
- qcom,sdm845-cpufreq-hw
- qcom,sm6115-cpufreq-hw
- qcom,sm6350-cpufreq-hw
Bindings/cpufreq/qcom-cpufreq-nvmem.yaml
+7 -1
View File
@@ -27,8 +27,12 @@ select:
enum:
- qcom,apq8064
- qcom,apq8096
- qcom,ipq5332
- qcom,ipq6018
- qcom,ipq8064
- qcom,ipq8074
- qcom,ipq9574
- qcom,msm8909
- qcom,msm8939
- qcom,msm8960
- qcom,msm8974
@@ -43,7 +47,9 @@ patternProperties:
- if:
properties:
compatible:
const: operating-points-v2-kryo-cpu
enum:
- operating-points-v2-krait-cpu
- operating-points-v2-kryo-cpu
then:
$ref: /schemas/opp/opp-v2-kryo-cpu.yaml#
Bindings/crypto/fsl-imx-sahara.yaml
+40 -3
View File
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/crypto/fsl-imx-sahara.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale SAHARA Cryptographic Accelerator included in some i.MX chips
title: Freescale SAHARA Cryptographic Accelerator
maintainers:
- Steffen Trumtrar <s.trumtrar@pengutronix.de>
@@ -19,19 +19,56 @@ properties:
maxItems: 1
interrupts:
maxItems: 1
items:
- description: SAHARA Interrupt for Host 0
- description: SAHARA Interrupt for Host 1
minItems: 1
clocks:
items:
- description: Sahara IPG clock
- description: Sahara AHB clock
clock-names:
items:
- const: ipg
- const: ahb
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
allOf:
- if:
properties:
compatible:
contains:
enum:
- fsl,imx53-sahara
then:
properties:
interrupts:
minItems: 2
maxItems: 2
else:
properties:
interrupts:
maxItems: 1
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx27-clock.h>
crypto@10025000 {
compatible = "fsl,imx27-sahara";
reg = < 0x10025000 0x800>;
reg = <0x10025000 0x800>;
interrupts = <75>;
clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
<&clks IMX27_CLK_SAHARA_AHB_GATE>;
clock-names = "ipg", "ahb";
};
Bindings/crypto/qcom,inline-crypto-engine.yaml
+1
View File
@@ -13,6 +13,7 @@ properties:
compatible:
items:
- enum:
- qcom,sa8775p-inline-crypto-engine
- qcom,sm8450-inline-crypto-engine
- qcom,sm8550-inline-crypto-engine
- const: qcom,inline-crypto-engine
Bindings/crypto/qcom,prng.yaml
+23 -5
View File
@@ -11,9 +11,17 @@ maintainers:
properties:
compatible:
enum:
- qcom,prng # 8916 etc.
- qcom,prng-ee # 8996 and later using EE
oneOf:
- enum:
- qcom,prng # 8916 etc.
- qcom,prng-ee # 8996 and later using EE
- items:
- enum:
- qcom,sa8775p-trng
- qcom,sc7280-trng
- qcom,sm8450-trng
- qcom,sm8550-trng
- const: qcom,trng
reg:
maxItems: 1
@@ -28,8 +36,18 @@ properties:
required:
- compatible
- reg
- clocks
- clock-names
allOf:
- if:
not:
properties:
compatible:
contains:
const: qcom,trng
then:
required:
- clocks
- clock-names
additionalProperties: false
Bindings/devfreq/event/rockchip,dfi.yaml
+74
View File
@@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip DFI
maintainers:
- Sascha Hauer <s.hauer@pengutronix.de>
properties:
compatible:
enum:
- rockchip,rk3399-dfi
- rockchip,rk3568-dfi
- rockchip,rk3588-dfi
clocks:
maxItems: 1
clock-names:
items:
- const: pclk_ddr_mon
interrupts:
minItems: 1
maxItems: 4
reg:
maxItems: 1
rockchip,pmu:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the syscon managing the "PMU general register files".
required:
- compatible
- interrupts
- reg
if:
properties:
compatible:
contains:
enum:
- rockchip,rk3399-dfi
then:
required:
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/rk3308-cru.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
dfi: dfi@ff630000 {
compatible = "rockchip,rk3399-dfi";
reg = <0x00 0xff630000 0x00 0x4000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
rockchip,pmu = <&pmugrf>;
clocks = <&cru PCLK_DDR_MON>;
clock-names = "pclk_ddr_mon";
};
};
Bindings/display/bridge/adi,adv7533.yaml
+6
View File
@@ -9,6 +9,9 @@ title: Analog Devices ADV7533/35 HDMI Encoders
maintainers:
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
allOf:
- $ref: /schemas/sound/dai-common.yaml#
description: |
The ADV7533 and ADV7535 are HDMI audio and video transmitters
compatible with HDMI 1.4 and DVI 1.0. They support color space
@@ -89,6 +92,9 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 1, 2, 3, 4 ]
"#sound-dai-cells":
const: 0
ports:
description:
The ADV7533/35 has two video ports and one audio port.
Bindings/display/bridge/analogix,anx7814.yaml
+1
View File
@@ -17,6 +17,7 @@ properties:
- analogix,anx7808
- analogix,anx7812
- analogix,anx7814
- analogix,anx7816
- analogix,anx7818
reg:
Bindings/display/bridge/fsl,imx93-mipi-dsi.yaml
+115
View File
@@ -0,0 +1,115 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
maintainers:
- Liu Ying <victor.liu@nxp.com>
description: |
There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations
and extensions to them are controlled by i.MX93 media blk-ctrl.
allOf:
- $ref: snps,dw-mipi-dsi.yaml#
properties:
compatible:
const: fsl,imx93-mipi-dsi
clocks:
items:
- description: apb clock
- description: pixel clock
- description: PHY configuration clock
- description: PHY reference clock
clock-names:
items:
- const: pclk
- const: pix
- const: phy_cfg
- const: phy_ref
interrupts:
maxItems: 1
fsl,media-blk-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
i.MX93 media blk-ctrl, as a syscon, controls pixel component bit map
configurations from LCDIF display controller to the MIPI DSI host
controller and MIPI DPHY PLL related configurations through PLL SoC
interface.
power-domains:
maxItems: 1
required:
- compatible
- interrupts
- fsl,media-blk-ctrl
- power-domains
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/imx93-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/fsl,imx93-power.h>
dsi@4ae10000 {
compatible = "fsl,imx93-mipi-dsi";
reg = <0x4ae10000 0x10000>;
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_MIPI_DSI_GATE>,
<&clk IMX93_CLK_MEDIA_DISP_PIX>,
<&clk IMX93_CLK_MIPI_PHY_CFG>,
<&clk IMX93_CLK_24M>;
clock-names = "pclk", "pix", "phy_cfg", "phy_ref";
fsl,media-blk-ctrl = <&media_blk_ctrl>;
power-domains = <&media_blk_ctrl IMX93_MEDIABLK_PD_MIPI_DSI>;
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "raydium,rm67191";
reg = <0>;
reset-gpios = <&adp5585gpio 6 GPIO_ACTIVE_LOW>;
dsi-lanes = <4>;
video-mode = <2>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_to_lcdif: endpoint {
remote-endpoint = <&lcdif_to_dsi>;
};
};
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
Bindings/display/fsl,lcdif.yaml
+19 -1
View File
@@ -51,7 +51,10 @@ properties:
minItems: 1
interrupts:
maxItems: 1
items:
- description: LCDIF DMA interrupt
- description: LCDIF Error interrupt
minItems: 1
power-domains:
maxItems: 1
@@ -131,6 +134,21 @@ allOf:
then:
required:
- power-domains
- if:
properties:
compatible:
contains:
enum:
- fsl,imx23-lcdif
then:
properties:
interrupts:
minItems: 2
maxItems: 2
else:
properties:
interrupts:
maxItems: 1
examples:
- |
Bindings/display/ilitek,ili9486.yaml
-4
View File
@@ -50,10 +50,6 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
spi {
#address-cells = <1>;
#size-cells = <0>;
Bindings/display/lvds-data-mapping.yaml
+84
View File
@@ -0,0 +1,84 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/lvds-data-mapping.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LVDS Data Mapping
maintainers:
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
- Thierry Reding <thierry.reding@gmail.com>
description: |
LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
incompatible data link layers have been used over time to transmit image data
to LVDS devices. This bindings supports devices compatible with the following
specifications.
[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
Semiconductor
[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
Electronics Standards Association (VESA)
Device compatible with those specifications have been marketed under the
FPD-Link and FlatLink brands.
properties:
data-mapping:
enum:
- jeida-18
- jeida-24
- vesa-24
description: |
The color signals mapping order.
LVDS data mappings are defined as follows.
- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
specifications. Data are transferred as follows on 4 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
Data are transferred as follows on 4 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
Control signals are mapped as follows.
CTL0: HSync
CTL1: VSync
CTL2: Data Enable
CTL3: 0
additionalProperties: true
...
Bindings/display/lvds.yaml
+9 -68
View File
@@ -6,83 +6,24 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: LVDS Display Common Properties
allOf:
- $ref: lvds-data-mapping.yaml#
maintainers:
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
- Thierry Reding <thierry.reding@gmail.com>
description: |+
LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
incompatible data link layers have been used over time to transmit image data
to LVDS devices. This bindings supports devices compatible with the following
specifications.
[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
Semiconductor
[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
Electronics Standards Association (VESA)
Device compatible with those specifications have been marketed under the
FPD-Link and FlatLink brands.
description:
This binding extends the data mapping defined in lvds-data-mapping.yaml.
It supports reversing the bit order on the formats defined there in order
to accomodate for even more specialized data formats, since a variety of
data formats and layouts is used to drive LVDS displays.
properties:
data-mapping:
enum:
- jeida-18
- jeida-24
- vesa-24
description: |
The color signals mapping order.
LVDS data mappings are defined as follows.
- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
specifications. Data are transferred as follows on 4 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
Data are transferred as follows on 4 LVDS lanes.
Slot 0 1 2 3 4 5 6
________________ _________________
Clock \_______________________/
______ ______ ______ ______ ______ ______ ______
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
Control signals are mapped as follows.
CTL0: HSync
CTL1: VSync
CTL2: Data Enable
CTL3: 0
data-mirror:
type: boolean
description:
If set, reverse the bit order described in the data mappings below on all
If set, reverse the bit order described in the data mappings on all
data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.
additionalProperties: true
Bindings/display/mediatek/mediatek,dp.yaml
+2
View File
@@ -21,6 +21,8 @@ description: |
properties:
compatible:
enum:
- mediatek,mt8188-dp-tx
- mediatek,mt8188-edp-tx
- mediatek,mt8195-dp-tx
- mediatek,mt8195-edp-tx
Bindings/display/mediatek/mediatek,dsi.yaml
+1 -1
View File
@@ -10,7 +10,6 @@ maintainers:
- Chun-Kuang Hu <chunkuang.hu@kernel.org>
- Philipp Zabel <p.zabel@pengutronix.de>
- Jitao Shi <jitao.shi@mediatek.com>
- Xinlei Lee <xinlei.lee@mediatek.com>
description: |
The MediaTek DSI function block is a sink of the display subsystem and can
@@ -30,6 +29,7 @@ properties:
- mediatek,mt8173-dsi
- mediatek,mt8183-dsi
- mediatek,mt8186-dsi
- mediatek,mt8188-dsi
- items:
- enum:
- mediatek,mt6795-dsi
Bindings/display/msm/dp-controller.yaml
+1
View File
@@ -114,6 +114,7 @@ properties:
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: Output endpoint of the controller
properties:
endpoint:
Bindings/display/msm/gmu.yaml
+46 -1
View File
@@ -21,7 +21,7 @@ properties:
compatible:
oneOf:
- items:
- pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$'
- pattern: '^qcom,adreno-gmu-[67][0-9][0-9]\.[0-9]$'
- const: qcom,adreno-gmu
- const: qcom,adreno-gmu-wrapper
@@ -64,6 +64,10 @@ properties:
iommus:
maxItems: 1
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
description: Reference to the AOSS side-channel message RAM
operating-points-v2: true
opp-table:
@@ -213,6 +217,47 @@ allOf:
- const: axi
- const: memnoc
- if:
properties:
compatible:
contains:
enum:
- qcom,adreno-gmu-730.1
- qcom,adreno-gmu-740.1
then:
properties:
reg:
items:
- description: Core GMU registers
- description: Resource controller registers
- description: GMU PDC registers
reg-names:
items:
- const: gmu
- const: rscc
- const: gmu_pdc
clocks:
items:
- description: GPU AHB clock
- description: GMU clock
- description: GPU CX clock
- description: GPU AXI clock
- description: GPU MEMNOC clock
- description: GMU HUB clock
- description: GPUSS DEMET clock
clock-names:
items:
- const: ahb
- const: gmu
- const: cxo
- const: axi
- const: memnoc
- const: hub
- const: demet
required:
- qcom,qmp
- if:
properties:
compatible:
Bindings/display/msm/gpu.yaml
+2 -2
View File
@@ -23,7 +23,7 @@ properties:
The driver is parsing the compat string for Adreno to
figure out the gpu-id and patch level.
items:
- pattern: '^qcom,adreno-[3-6][0-9][0-9]\.[0-9]$'
- pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]$'
- const: qcom,adreno
- description: |
The driver is parsing the compat string for Imageon to
@@ -203,7 +203,7 @@ allOf:
properties:
compatible:
contains:
pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$'
pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]$'
then: # Starting with A6xx, the clocks are usually defined in the GMU node
properties:
Bindings/display/msm/qcom,msm8998-mdss.yaml
+6
View File
@@ -38,12 +38,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,msm8998-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -52,6 +56,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-10nm-8998
Bindings/display/msm/qcom,qcm2290-mdss.yaml
+6
View File
@@ -44,18 +44,24 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,qcm2290-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-ctrl-6g-qcm2290
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-14nm-2290
Bindings/display/msm/qcom,sc7180-mdss.yaml
+8
View File
@@ -44,18 +44,24 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc7180-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc7180-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -64,6 +70,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-10nm
Bindings/display/msm/qcom,sc7280-mdss.yaml
+10
View File
@@ -44,18 +44,24 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc7280-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc7280-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -64,12 +70,16 @@ patternProperties:
"^edp@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc7280-edp
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
enum:
Bindings/display/msm/qcom,sc8280xp-mdss.yaml
+4
View File
@@ -34,12 +34,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sc8280xp-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
enum:
Bindings/display/msm/qcom,sdm845-mdss.yaml
+8
View File
@@ -42,18 +42,24 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sdm845-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sdm845-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -62,6 +68,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-10nm
Bindings/display/msm/qcom,sm6115-mdss.yaml
+6
View File
@@ -32,12 +32,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6115-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
oneOf:
@@ -50,6 +54,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-14nm-2290
Bindings/display/msm/qcom,sm6125-mdss.yaml
+6
View File
@@ -43,12 +43,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6125-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -57,6 +61,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6125-dsi-phy-14nm
Bindings/display/msm/qcom,sm6350-mdss.yaml
+6
View File
@@ -43,12 +43,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6350-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -57,6 +61,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-10nm
Bindings/display/msm/qcom,sm6375-mdss.yaml
+6
View File
@@ -43,12 +43,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6375-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -57,6 +61,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm6375-dsi-phy-7nm
Bindings/display/msm/qcom,sm8150-mdss.yaml
+6
View File
@@ -47,12 +47,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8150-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -61,6 +65,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-7nm
Bindings/display/msm/qcom,sm8250-mdss.yaml
+6
View File
@@ -46,12 +46,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8250-dpu
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -60,6 +64,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,dsi-phy-7nm
Bindings/display/msm/qcom,sm8350-mdss.yaml
+8
View File
@@ -48,18 +48,24 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8350-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8350-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -68,6 +74,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8350-dsi-phy-5nm
Bindings/display/msm/qcom,sm8450-mdss.yaml
+8
View File
@@ -38,12 +38,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8450-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -52,6 +56,8 @@ patternProperties:
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -60,6 +66,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8450-dsi-phy-5nm
Bindings/display/msm/qcom,sm8550-mdss.yaml
+8
View File
@@ -38,12 +38,16 @@ properties:
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8550-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -52,6 +56,8 @@ patternProperties:
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
items:
@@ -60,6 +66,8 @@ patternProperties:
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sm8550-dsi-phy-4nm
Bindings/display/panel/ilitek,ili9163.yaml
-4
View File
@@ -48,10 +48,6 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
spi {
#address-cells = <1>;
#size-cells = <0>;
Bindings/display/panel/jdi,lpm102a188a.yaml
+94
View File
@@ -0,0 +1,94 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/jdi,lpm102a188a.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: JDI LPM102A188A 2560x1800 10.2" DSI Panel
maintainers:
- Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
description: |
This panel requires a dual-channel DSI host to operate. It supports two modes:
- left-right: each channel drives the left or right half of the screen
- even-odd: each channel drives the even or odd lines of the screen
Each of the DSI channels controls a separate DSI peripheral. The peripheral
driven by the first link (DSI-LINK1) is considered the primary peripheral
and controls the device. The 'link2' property contains a phandle to the
peripheral driven by the second link (DSI-LINK2).
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: jdi,lpm102a188a
reg: true
enable-gpios: true
reset-gpios: true
power-supply: true
backlight: true
ddi-supply:
description: The regulator that provides IOVCC (1.8V).
link2:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
phandle to the DSI peripheral on the secondary link. Note that the
presence of this property marks the containing node as DSI-LINK1.
required:
- compatible
- reg
if:
required:
- link2
then:
required:
- power-supply
- ddi-supply
- enable-gpios
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/tegra-gpio.h>
dsia: dsi@54300000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x54300000 0x0 0x00040000>;
link2: panel@0 {
compatible = "jdi,lpm102a188a";
reg = <0>;
};
};
dsib: dsi@54400000{
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x54400000 0x0 0x00040000>;
nvidia,ganged-mode = <&dsia>;
link1: panel@0 {
compatible = "jdi,lpm102a188a";
reg = <0>;
power-supply = <&pplcd_vdd>;
ddi-supply = <&pp1800_lcdio>;
enable-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
link2 = <&link2>;
backlight = <&backlight>;
};
};
...
Bindings/display/panel/leadtek,ltk050h3146w.yaml
+1
View File
@@ -17,6 +17,7 @@ properties:
enum:
- leadtek,ltk050h3146w
- leadtek,ltk050h3146w-a2
- leadtek,ltk050h3148w
reg: true
backlight: true
reset-gpios: true
Bindings/display/panel/newvision,nv3051d.yaml
+2 -3
View File
@@ -7,9 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: NewVision NV3051D based LCD panel
description: |
The NewVision NV3051D is a driver chip used to drive DSI panels. For now,
this driver only supports the 640x480 panels found in the Anbernic RG353
based devices.
The NewVision NV3051D is a driver chip used to drive DSI panels.
maintainers:
- Chris Morgan <macromorgan@hotmail.com>
@@ -21,6 +19,7 @@ properties:
compatible:
items:
- enum:
- anbernic,rg351v-panel
- anbernic,rg353p-panel
- anbernic,rg353v-panel
- const: newvision,nv3051d
Bindings/display/panel/panel-simple-dsi.yaml
+2
View File
@@ -42,6 +42,8 @@ properties:
- lg,acx467akm-7
# LG Corporation 7" WXGA TFT LCD panel
- lg,ld070wx3-sl01
# LG Corporation 5" HD TFT LCD panel
- lg,lh500wx1-sd03
# One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
- osddisplays,osd101t2587-53ts
# Panasonic 10" WUXGA TFT LCD panel
Bindings/display/panel/panel-simple-lvds-dual-ports.yaml
+118
View File
@@ -0,0 +1,118 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/panel-simple-lvds-dual-ports.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Simple LVDS panels with one power supply and dual LVDS ports
maintainers:
- Liu Ying <victor.liu@nxp.com>
- Thierry Reding <thierry.reding@gmail.com>
- Sam Ravnborg <sam@ravnborg.org>
description: |
This binding file is a collection of the LVDS panels that
has dual LVDS ports and requires only a single power-supply.
The first port receives odd pixels, and the second port receives even pixels.
There are optionally a backlight and an enable GPIO.
The panel may use an OF graph binding for the association to the display,
or it may be a direct child node of the display.
If the panel is more advanced a dedicated binding file is required.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
enum:
# compatible must be listed in alphabetical order, ordered by compatible.
# The description in the comment is mandatory for each compatible.
# AU Optronics Corporation 13.3" FHD (1920x1080) TFT LCD panel
- auo,g133han01
# AU Optronics Corporation 18.5" FHD (1920x1080) TFT LCD panel
- auo,g185han01
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
- auo,g190ean01
# Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel
- koe,tx26d202vm0bwa
# NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel
- nlt,nl192108ac18-02d
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: The first sink port.
properties:
dual-lvds-odd-pixels:
type: boolean
description: The first sink port for odd pixels.
required:
- dual-lvds-odd-pixels
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: The second sink port.
properties:
dual-lvds-even-pixels:
type: boolean
description: The second sink port for even pixels.
required:
- dual-lvds-even-pixels
required:
- port@0
- port@1
backlight: true
enable-gpios: true
power-supply: true
additionalProperties: false
required:
- compatible
- ports
- power-supply
examples:
- |
panel: panel-lvds {
compatible = "koe,tx26d202vm0bwa";
power-supply = <&vdd_lcd_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
dual-lvds-odd-pixels;
reg = <0>;
panel_lvds0_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
dual-lvds-even-pixels;
reg = <1>;
panel_lvds1_in: endpoint {
remote-endpoint = <&lvds1_out>;
};
};
};
};
Bindings/display/panel/panel-simple.yaml
+27 -13
View File
@@ -21,9 +21,9 @@ description: |
allOf:
- $ref: panel-common.yaml#
- $ref: ../lvds-data-mapping.yaml#
properties:
compatible:
enum:
# compatible must be listed in alphabetical order, ordered by compatible.
@@ -65,14 +65,8 @@ properties:
- auo,g104sn02
# AU Optronics Corporation 12.1" (1280x800) TFT LCD panel
- auo,g121ean01
# AU Optronics Corporation 13.3" FHD (1920x1080) TFT LCD panel
- auo,g133han01
# AU Optronics Corporation 15.6" (1366x768) TFT LCD panel
- auo,g156xtn01
# AU Optronics Corporation 18.5" FHD (1920x1080) TFT LCD panel
- auo,g185han01
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
- auo,g190ean01
# AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
- auo,p320hvn03
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
@@ -204,8 +198,6 @@ properties:
- kingdisplay,kd116n21-30nv-a010
# Kaohsiung Opto-Electronics Inc. 5.7" QVGA (320 x 240) TFT LCD panel
- koe,tx14d24vm1bpa
# Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel
- koe,tx26d202vm0bwa
# Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel
- koe,tx31d200vm0baa
# Kyocera Corporation 7" WVGA (800x480) transmissive color TFT
@@ -216,8 +208,6 @@ properties:
- lemaker,bl035-rgb-002
# LG 7" (800x480 pixels) TFT LCD panel
- lg,lb070wv8
# LG Corporation 5" HD TFT LCD panel
- lg,lh500wx1-sd03
# LG LP079QX1-SP0V 7.9" (1536x2048 pixels) TFT LCD panel
- lg,lp079qx1-sp0v
# LG 9.7" (2048x1536 pixels) TFT LCD panel
@@ -238,6 +228,8 @@ properties:
- logictechno,lttd800480070-l6wh-rt
# Mitsubishi "AA070MC01 7.0" WVGA TFT LCD panel
- mitsubishi,aa070mc01-ca1
# Mitsubishi AA084XE01 8.4" XGA TFT LCD panel
- mitsubishi,aa084xe01
# Multi-Inno Technology Co.,Ltd MI0700S4T-6 7" 800x480 TFT Resistive Touch Module
- multi-inno,mi0700s4t-6
# Multi-Inno Technology Co.,Ltd MI0800FT-9 8" 800x600 TFT Resistive Touch Module
@@ -254,8 +246,6 @@ properties:
- neweast,wjfh116008a
# Newhaven Display International 480 x 272 TFT LCD panel
- newhaven,nhd-4.3-480272ef-atxl
# NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel
- nlt,nl192108ac18-02d
# New Vision Display 7.0" 800 RGB x 480 TFT LCD panel
- nvd,9128
# OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
@@ -357,6 +347,17 @@ properties:
power-supply: true
no-hpd: true
hpd-gpios: true
data-mapping: true
if:
not:
properties:
compatible:
contains:
const: innolux,g101ice-l01
then:
properties:
data-mapping: false
additionalProperties: false
@@ -376,3 +377,16 @@ examples:
};
};
};
- |
panel_lvds: panel-lvds {
compatible = "innolux,g101ice-l01";
power-supply = <&vcc_lcd_reg>;
data-mapping = "jeida-24";
port {
panel_in_lvds: endpoint {
remote-endpoint = <&ltdc_out_lvds>;
};
};
};
Bindings/display/panel/raydium,rm692e5.yaml
+73
View File
@@ -0,0 +1,73 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/raydium,rm692e5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Raydium RM692E5 based DSI display panels
maintainers:
- Konrad Dybcio <konradybcio@kernel.org>
description:
The Raydium RM692E5 is a generic DSI Panel IC used to control
AMOLED panels.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
items:
- const: fairphone,fp5-rm692e5-boe
- const: raydium,rm692e5
dvdd-supply:
description: Digital voltage rail
vci-supply:
description: Analog voltage rail
vddio-supply:
description: I/O voltage rail
reg: true
port: true
required:
- compatible
- reg
- reset-gpios
- dvdd-supply
- vci-supply
- vddio-supply
- port
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "fairphone,fp5-rm692e5-boe", "raydium,rm692e5";
reg = <0>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
dvdd-supply = <&vreg_oled_vci>;
vci-supply = <&vreg_l12c>;
vddio-supply = <&vreg_oled_dvdd>;
port {
panel_in_0: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
...
Bindings/display/panel/rocktech,jh057n00900.yaml
+2
View File
@@ -22,6 +22,8 @@ properties:
enum:
# Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
- anbernic,rg353v-panel-v2
# Powkiddy RGB30 3.0" 720x720 TFT LCD panel
- powkiddy,rgb30-panel
# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
- rocktech,jh057n00900
# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
Bindings/display/renesas,shmobile-lcdc.yaml
+130
View File
@@ -0,0 +1,130 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas SH-Mobile LCD Controller (LCDC)
maintainers:
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
- Geert Uytterhoeven <geert+renesas@glider.be>
properties:
compatible:
enum:
- renesas,r8a7740-lcdc # R-Mobile A1
- renesas,sh73a0-lcdc # SH-Mobile AG5
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 1
maxItems: 5
description:
Only the functional clock is mandatory.
Some of the optional clocks are model-dependent (e.g. "video" (a.k.a.
"vou" or "dv_clk") is available on R-Mobile A1 only).
clock-names:
minItems: 1
items:
- const: fck
- enum: [ media, lclk, hdmi, video ]
- enum: [ media, lclk, hdmi, video ]
- enum: [ media, lclk, hdmi, video ]
- enum: [ media, lclk, hdmi, video ]
power-domains:
maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: LCD port (R-Mobile A1 and SH-Mobile AG5)
unevaluatedProperties: false
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: HDMI port (R-Mobile A1 LCDC1 and SH-Mobile AG5)
unevaluatedProperties: false
port@2:
$ref: /schemas/graph.yaml#/properties/port
description: MIPI-DSI port (SH-Mobile AG5)
unevaluatedProperties: false
required:
- port@0
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
- ports
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
const: renesas,r8a7740-lcdc
then:
properties:
ports:
properties:
port@2: false
- if:
properties:
compatible:
contains:
const: renesas,sh73a0-lcdc
then:
properties:
ports:
required:
- port@1
- port@2
examples:
- |
#include <dt-bindings/clock/r8a7740-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
lcd-controller@fe940000 {
compatible = "renesas,r8a7740-lcdc";
reg = <0xfe940000 0x4000>;
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7740_CLK_LCDC0>,
<&cpg_clocks R8A7740_CLK_M3>, <&lcdlclk0_clk>,
<&vou_clk>;
clock-names = "fck", "media", "lclk", "video";
power-domains = <&pd_a4lc>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lcdc0_rgb: endpoint {
};
};
};
};
Bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml
+2
View File
@@ -18,6 +18,7 @@ properties:
- rockchip,rk3288-mipi-dsi
- rockchip,rk3399-mipi-dsi
- rockchip,rk3568-mipi-dsi
- rockchip,rv1126-mipi-dsi
- const: snps,dw-mipi-dsi
interrupts:
@@ -77,6 +78,7 @@ allOf:
enum:
- rockchip,px30-mipi-dsi
- rockchip,rk3568-mipi-dsi
- rockchip,rv1126-mipi-dsi
then:
properties:
Bindings/display/rockchip/rockchip-vop.yaml
+1
View File
@@ -31,6 +31,7 @@ properties:
- rockchip,rk3368-vop
- rockchip,rk3399-vop-big
- rockchip,rk3399-vop-lit
- rockchip,rv1126-vop
reg:
minItems: 1
Bindings/display/sitronix,st7735r.yaml
-5
View File
@@ -54,11 +54,6 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
};
spi {
#address-cells = <1>;
#size-cells = <0>;
Bindings/display/solomon,ssd-common.yaml
+42
View File
@@ -0,0 +1,42 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/solomon,ssd-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Common properties for Solomon OLED Display Controllers
maintainers:
- Javier Martinez Canillas <javierm@redhat.com>
properties:
reg:
maxItems: 1
reset-gpios:
maxItems: 1
# Only required for SPI
dc-gpios:
description:
GPIO connected to the controller's D/C# (Data/Command) pin,
that is needed for 4-wire SPI to tell the controller if the
data sent is for a command register or the display data RAM
maxItems: 1
solomon,height:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Height in pixel of the screen driven by the controller.
The default value is controller-dependent.
solomon,width:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Width in pixel of the screen driven by the controller.
The default value is controller-dependent.
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
additionalProperties: true
Bindings/display/solomon,ssd1307fb.yaml
+1 -27
View File
@@ -27,38 +27,12 @@ properties:
- solomon,ssd1307
- solomon,ssd1309
reg:
maxItems: 1
pwms:
maxItems: 1
reset-gpios:
maxItems: 1
# Only required for SPI
dc-gpios:
description:
GPIO connected to the controller's D/C# (Data/Command) pin,
that is needed for 4-wire SPI to tell the controller if the
data sent is for a command register or the display data RAM
maxItems: 1
vbat-supply:
description: The supply for VBAT
solomon,height:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Height in pixel of the screen driven by the controller.
The default value is controller-dependent.
solomon,width:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Width in pixel of the screen driven by the controller.
The default value is controller-dependent.
solomon,page-offset:
$ref: /schemas/types.yaml#/definitions/uint32
default: 1
@@ -148,7 +122,7 @@ required:
- reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- $ref: solomon,ssd-common.yaml#
- if:
properties:
Bindings/display/solomon,ssd132x.yaml
+89
View File
@@ -0,0 +1,89 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/solomon,ssd132x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Solomon SSD132x OLED Display Controllers
maintainers:
- Javier Martinez Canillas <javierm@redhat.com>
properties:
compatible:
enum:
- solomon,ssd1322
- solomon,ssd1325
- solomon,ssd1327
required:
- compatible
- reg
allOf:
- $ref: solomon,ssd-common.yaml#
- if:
properties:
compatible:
contains:
const: solomon,ssd1322
then:
properties:
width:
default: 480
height:
default: 128
- if:
properties:
compatible:
contains:
const: solomon,ssd1325
then:
properties:
width:
default: 128
height:
default: 80
- if:
properties:
compatible:
contains:
const: solomon,ssd1327
then:
properties:
width:
default: 128
height:
default: 128
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
oled@3c {
compatible = "solomon,ssd1327";
reg = <0x3c>;
reset-gpios = <&gpio2 7>;
};
};
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
oled@0 {
compatible = "solomon,ssd1327";
reg = <0x0>;
reset-gpios = <&gpio2 7>;
dc-gpios = <&gpio2 8>;
spi-max-frequency = <10000000>;
};
};
Bindings/dma/qcom,gpi.yaml
+2
View File
@@ -69,6 +69,8 @@ properties:
dma-channel-mask:
maxItems: 1
dma-coherent: true
required:
- compatible
- reg
Bindings/eeprom/at24.yaml
+5
View File
@@ -12,6 +12,7 @@ maintainers:
allOf:
- $ref: /schemas/nvmem/nvmem.yaml
- $ref: /schemas/nvmem/nvmem-deprecated-cells.yaml
select:
properties:
@@ -67,10 +68,14 @@ properties:
pattern: cs16$
- items:
pattern: c32$
- items:
pattern: c32d-wl$
- items:
pattern: cs32$
- items:
pattern: c64$
- items:
pattern: c64d-wl$
- items:
pattern: cs64$
- items:
Bindings/firmware/arm,scmi.yaml
+13 -2
View File
@@ -38,6 +38,9 @@ properties:
with shmem address(4KB-page, offset) as parameters
items:
- const: arm,scmi-smc-param
- description: SCMI compliant firmware with Qualcomm SMC/HVC transport
items:
- const: qcom,scmi-smc
- description: SCMI compliant firmware with SCMI Virtio transport.
The virtio transport only supports a single device.
items:
@@ -149,8 +152,15 @@ properties:
'#clock-cells':
const: 1
required:
- '#clock-cells'
'#power-domain-cells':
const: 1
oneOf:
- required:
- '#clock-cells'
- required:
- '#power-domain-cells'
protocol@14:
$ref: '#/$defs/protocol-node'
@@ -306,6 +316,7 @@ else:
enum:
- arm,scmi-smc
- arm,scmi-smc-param
- qcom,scmi-smc
then:
required:
- arm,smc-id
Bindings/firmware/qcom,scm.yaml
+10
View File
@@ -24,6 +24,7 @@ properties:
- qcom,scm-apq8064
- qcom,scm-apq8084
- qcom,scm-ipq4019
- qcom,scm-ipq5018
- qcom,scm-ipq5332
- qcom,scm-ipq6018
- qcom,scm-ipq806x
@@ -56,6 +57,7 @@ properties:
- qcom,scm-sm6125
- qcom,scm-sm6350
- qcom,scm-sm6375
- qcom,scm-sm7150
- qcom,scm-sm8150
- qcom,scm-sm8250
- qcom,scm-sm8350
@@ -89,6 +91,14 @@ properties:
protocol to handle sleeping SCM calls.
maxItems: 1
qcom,sdi-enabled:
description:
Indicates that the SDI (Secure Debug Image) has been enabled by TZ
by default and it needs to be disabled.
If not disabled WDT assertion or reboot will cause the board to hang
in the debug mode.
type: boolean
qcom,dload-mode:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
Bindings/gpio/fsl-imx-gpio.yaml
+8
View File
@@ -18,9 +18,17 @@ properties:
- fsl,imx31-gpio
- fsl,imx35-gpio
- fsl,imx7d-gpio
- items:
- enum:
- fsl,imx27-gpio
- const: fsl,imx21-gpio
- items:
- const: fsl,imx35-gpio
- const: fsl,imx31-gpio
- items:
- enum:
- fsl,imx25-gpio
- const: fsl,imx35-gpio
- items:
- enum:
- fsl,imx50-gpio
Bindings/gpio/gpio-vf610.yaml
+34 -6
View File
@@ -20,6 +20,7 @@ description: |
properties:
compatible:
oneOf:
- const: fsl,imx8ulp-gpio
- const: fsl,vf610-gpio
- items:
- const: fsl,imx7ulp-gpio
@@ -27,16 +28,18 @@ properties:
- items:
- enum:
- fsl,imx93-gpio
- fsl,imx8ulp-gpio
- const: fsl,imx7ulp-gpio
- fsl,imx95-gpio
- const: fsl,imx8ulp-gpio
reg:
description: The first reg tuple represents the PORT module, the second tuple
represents the GPIO module.
minItems: 1
maxItems: 2
interrupts:
maxItems: 1
items:
- description: GPIO Trustzone non-secure interrupt number
- description: GPIO Trustzone secure interrupt number
minItems: 1
interrupt-controller: true
@@ -59,7 +62,8 @@ properties:
- const: port
gpio-ranges:
maxItems: 1
minItems: 1
maxItems: 4
patternProperties:
"^.+-hog(-[0-9]+)?$":
@@ -77,6 +81,30 @@ required:
- "#gpio-cells"
- gpio-controller
allOf:
- if:
properties:
compatible:
contains:
enum:
- fsl,vf610-gpio
- fsl,imx7ulp-gpio
then:
properties:
interrupts:
maxItems: 1
reg:
items:
- description: PORT register base address
- description: GPIO register base address
else:
properties:
interrupts:
minItems: 2
reg:
items:
- description: GPIO register base address
additionalProperties: false
examples:
Bindings/gpio/intel,ixp4xx-gpio.yaml
+73
View File
@@ -0,0 +1,73 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/intel,ixp4xx-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel IXP4xx XScale Networking Processors GPIO Controller
description: |
This GPIO controller is found in the Intel IXP4xx
processors. It supports 16 GPIO lines.
The interrupt portions of the GPIO controller is hierarchical.
The synchronous edge detector is part of the GPIO block, but the
actual enabling/disabling of the interrupt line is done in the
main IXP4xx interrupt controller which has a 1-to-1 mapping for
the first 12 GPIO lines to 12 system interrupts.
The remaining 4 GPIO lines can not be used for receiving
interrupts.
The interrupt parent of this GPIO controller must be the
IXP4xx interrupt controller.
GPIO 14 and 15 can be used as clock outputs rather than GPIO,
and this can be enabled by a special flag.
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
properties:
compatible:
const: intel,ixp4xx-gpio
reg:
maxItems: 1
gpio-controller: true
"#gpio-cells":
const: 2
interrupt-controller: true
"#interrupt-cells":
const: 2
intel,ixp4xx-gpio14-clkout:
description: If defined, enables clock output on GPIO 14
instead of GPIO.
type: boolean
intel,ixp4xx-gpio15-clkout:
description: If defined, enables clock output on GPIO 15
instead of GPIO.
type: boolean
required:
- compatible
- reg
- "#gpio-cells"
- interrupt-controller
- "#interrupt-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
gpio@c8004000 {
compatible = "intel,ixp4xx-gpio";
reg = <0xc8004000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
Bindings/gpio/loongson,ls-gpio.yaml
+17 -4
View File
@@ -11,9 +11,22 @@ maintainers:
properties:
compatible:
enum:
- loongson,ls2k-gpio
- loongson,ls7a-gpio
oneOf:
- enum:
- loongson,ls2k-gpio
- loongson,ls2k0500-gpio0
- loongson,ls2k0500-gpio1
- loongson,ls2k2000-gpio0
- loongson,ls2k2000-gpio1
- loongson,ls2k2000-gpio2
- loongson,ls3a5000-gpio
- loongson,ls7a-gpio
- items:
- const: loongson,ls2k1000-gpio
- const: loongson,ls2k-gpio
- items:
- const: loongson,ls7a1000-gpio
- const: loongson,ls7a-gpio
reg:
maxItems: 1
@@ -49,7 +62,7 @@ examples:
#include <dt-bindings/interrupt-controller/irq.h>
gpio0: gpio@1fe00500 {
compatible = "loongson,ls2k-gpio";
compatible = "loongson,ls2k1000-gpio", "loongson,ls2k-gpio";
reg = <0x1fe00500 0x38>;
ngpios = <64>;
#gpio-cells = <2>;
Bindings/hwmon/adi,ltc2991.yaml
+128
View File
@@ -0,0 +1,128 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwmon/adi,ltc2991.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices LTC2991 Octal I2C Voltage, Current and Temperature Monitor
maintainers:
- Antoniu Miclaus <antoniu.miclaus@analog.com>
description: |
The LTC2991 is used to monitor system temperatures, voltages and currents.
Through the I2C serial interface, the eight monitors can individually measure
supply voltages and can be paired for differential measurements of current
sense resistors or temperature sensing transistors.
Datasheet:
https://www.analog.com/en/products/ltc2991.html
properties:
compatible:
const: adi,ltc2991
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
vcc-supply: true
patternProperties:
"^channel@[0-3]$":
type: object
description:
Represents the differential/temperature channels.
properties:
reg:
description:
The channel number. LTC2991 can monitor 4 currents/temperatures.
items:
minimum: 0
maximum: 3
shunt-resistor-micro-ohms:
description:
The value of curent sense resistor in micro ohms. Pin configuration is
set for differential input pair.
adi,temperature-enable:
description:
Enables temperature readings. Pin configuration is set for remote
diode temperature measurement.
type: boolean
required:
- reg
allOf:
- if:
required:
- shunt-resistor-micro-ohms
then:
properties:
adi,temperature-enable: false
additionalProperties: false
required:
- compatible
- reg
- vcc-supply
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
hwmon@48 {
compatible = "adi,ltc2991";
reg = <0x48>;
vcc-supply = <&vcc>;
};
};
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
hwmon@48 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ltc2991";
reg = <0x48>;
vcc-supply = <&vcc>;
channel@0 {
reg = <0x0>;
shunt-resistor-micro-ohms = <100000>;
};
channel@1 {
reg = <0x1>;
shunt-resistor-micro-ohms = <100000>;
};
channel@2 {
reg = <0x2>;
adi,temperature-enable;
};
channel@3 {
reg = <0x3>;
adi,temperature-enable;
};
};
};
...
Bindings/hwmon/adi,max31827.yaml
+66
View File
@@ -32,6 +32,68 @@ properties:
Must have values in the interval (1.6V; 3.6V) in order for the device to
function correctly.
adi,comp-int:
description:
If present interrupt mode is used. If not present comparator mode is used
(default).
type: boolean
adi,alarm-pol:
description:
Sets the alarms active state.
- 0 = active low
- 1 = active high
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
adi,fault-q:
description:
Select how many consecutive temperature faults must occur before
overtemperature or undertemperature faults are indicated in the
corresponding status bits.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 4, 8]
adi,timeout-enable:
description:
Enables timeout. Bus timeout resets the I2C-compatible interface when SCL
is low for more than 30ms (nominal).
type: boolean
allOf:
- if:
properties:
compatible:
contains:
const: adi,max31829
then:
properties:
adi,alarm-pol:
default: 1
else:
properties:
adi,alarm-pol:
default: 0
- if:
properties:
compatible:
contains:
const: adi,max31827
then:
properties:
adi,fault-q:
default: 1
else:
properties:
adi,fault-q:
default: 4
required:
- compatible
- reg
@@ -49,6 +111,10 @@ examples:
compatible = "adi,max31827";
reg = <0x42>;
vref-supply = <&reg_vdd>;
adi,comp-int;
adi,alarm-pol = <0>;
adi,fault-q = <1>;
adi,timeout-enable;
};
};
...
Bindings/hwmon/npcm750-pwm-fan.txt
+5 -1
View File
@@ -1,12 +1,16 @@
Nuvoton NPCM7xx PWM and Fan Tacho controller device
Nuvoton NPCM PWM and Fan Tacho controller device
The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
controller outputs and 16 Fan tachometer controller inputs.
The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
controller outputs and 16 Fan tachometer controller inputs.
Required properties for pwm-fan node
- #address-cells : should be 1.
- #size-cells : should be 0.
- compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
: "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
- reg : specifies physical base address and size of the registers.
- reg-names : must contain:
* "pwm" for the PWM registers.
Bindings/hwmon/pmbus/infineon,tda38640.yaml
+49
View File
@@ -0,0 +1,49 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,tda38640.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Infineon TDA38640 Synchronous Buck Regulator with SVID and I2C
maintainers:
- Naresh Solanki <naresh.solanki@9elements.com>
description: |
The Infineon TDA38640 is a 40A Single-voltage Synchronous Buck
Regulator with SVID and I2C designed for Industrial use.
Datasheet: https://www.infineon.com/dgdl/Infineon-TDA38640-0000-DataSheet-v02_04-EN.pdf?fileId=8ac78c8c80027ecd018042f2337f00c9
properties:
compatible:
enum:
- infineon,tda38640
reg:
maxItems: 1
infineon,en-pin-fixed-level:
description:
Indicates that the chip EN pin is at fixed level or left
unconnected(has internal pull-down).
type: boolean
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
tda38640@40 {
compatible = "infineon,tda38640";
reg = <0x40>;
};
};
Bindings/hwmon/ti,ina2xx.yaml
+1
View File
@@ -26,6 +26,7 @@ properties:
- ti,ina226
- ti,ina230
- ti,ina231
- ti,ina237
- ti,ina238
reg:
Bindings/hwmon/ti,ina3221.yaml
+121
View File
@@ -0,0 +1,121 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwmon/ti,ina3221.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments INA3221 Current and Voltage Monitor
maintainers:
- Jean Delvare <jdelvare@suse.com>
- Guenter Roeck <linux@roeck-us.net>
properties:
compatible:
const: ti,ina3221
reg:
maxItems: 1
ti,single-shot:
description: |
This chip has two power modes: single-shot (chip takes one measurement
and then shuts itself down) and continuous (chip takes continuous
measurements). The continuous mode is more reliable and suitable for
hardware monitor type device, but the single-shot mode is more power-
friendly and useful for battery-powered device which cares power
consumptions while still needs some measurements occasionally.
If this property is present, the single-shot mode will be used, instead
of the default continuous one for monitoring.
$ref: /schemas/types.yaml#/definitions/flag
"#address-cells":
description: Required only if a child node is present.
const: 1
"#size-cells":
description: Required only if a child node is present.
const: 0
patternProperties:
"^input@[0-2]$":
description: The node contains optional child nodes for three channels.
Each child node describes the information of input source. Input channels
default to enabled in the chip. Unless channels are explicitly disabled
in device-tree, input channels will be enabled.
type: object
additionalProperties: false
properties:
reg:
description: Must be 0, 1 and 2, corresponding to the IN1, IN2 or IN3
ports of the INA3221, respectively.
enum: [ 0, 1, 2 ]
label:
description: name of the input source
shunt-resistor-micro-ohms:
description: shunt resistor value in micro-Ohm
ti,summation-disable:
description: |
The INA3221 has a critical alert pin that can be controlled by the
summation control function. This function adds the single
shunt-voltage conversions for the desired channels in order to
compare the combined sum to the programmed limit. The Shunt-Voltage
Sum Limit register contains the programmed value that is compared
to the value in the Shunt-Voltage Sum register in order to
determine if the total summed limit is exceeded. If the
shunt-voltage sum limit value is exceeded, the critical alert pin
is asserted.
For the summation limit to have a meaningful value, it is necessary
to use the same shunt-resistor value on all enabled channels. If
this is not the case or if a channel should not be used for
triggering the critical alert pin, then this property can be used
exclude specific channels from the summation control function.
type: boolean
required:
- reg
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
power-sensor@40 {
compatible = "ti,ina3221";
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
input@0 {
reg = <0x0>;
/*
* Input channels are enabled by default in the device and so
* to disable, must be explicitly disabled in device-tree.
*/
status = "disabled";
};
input@1 {
reg = <0x1>;
shunt-resistor-micro-ohms = <5000>;
};
input@2 {
reg = <0x2>;
label = "VDD_5V";
shunt-resistor-micro-ohms = <5000>;
};
};
};
Bindings/i2c/i2c-demux-pinctrl.yaml
+172
View File
@@ -0,0 +1,172 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Pinctrl-based I2C Bus Demultiplexer
maintainers:
- Wolfram Sang <wsa+renesas@sang-engineering.com>
description: |
This binding describes an I2C bus demultiplexer that uses pin multiplexing to
route the I2C signals, and represents the pin multiplexing configuration
using the pinctrl device tree bindings. This may be used to select one I2C
IP core at runtime which may have a better feature set for a given task than
another I2C IP core on the SoC. The most simple example is to fall back to
GPIO bitbanging if your current runtime configuration hits an errata of the
internal IP core.
+-------------------------------+
| SoC |
| | +-----+ +-----+
| +------------+ | | dev | | dev |
| |I2C IP Core1|--\ | +-----+ +-----+
| +------------+ \-------+ | | |
| |Pinctrl|--|------+--------+
| +------------+ +-------+ |
| |I2C IP Core2|--/ |
| +------------+ |
| |
+-------------------------------+
allOf:
- $ref: i2c-mux.yaml
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
const: i2c-demux-pinctrl
i2c-parent:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
List of phandles of I2C masters available for selection. The first one
will be used as default.
i2c-bus-name:
$ref: /schemas/types.yaml#/definitions/string
description:
The name of this bus. Also needed as pinctrl-name for the I2C parents.
required:
- compatible
- i2c-parent
- i2c-bus-name
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
gpioi2c2: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
// The I2C controller must have its status "disabled". The I2C bus
// demultiplexer will enable it at runtime when needed.
status = "disabled";
};
iic2: i2c@e6520000 {
reg = <0xe6520000 0x425>;
pinctrl-0 = <&iic2_pins>;
// The pinctrl property for the parent I2C controller needs a pinctrl
// state with the same name as i2c-bus-name in the I2C bus demultiplexer
// node, not "default"!
pinctrl-names = "i2c-hdmi";
clock-frequency = <100000>;
// The I2C controller must have its status "disabled". The I2C bus
// demultiplexer will enable it at runtime when needed.
status = "disabled";
};
i2c2: i2c@e6530000 {
reg = <0 0xe6530000 0 0x40>;
pinctrl-0 = <&i2c2_pins>;
// The pinctrl property for the parent I2C controller needs a pinctrl
// state with the same name as i2c-bus-name in the I2C bus demultiplexer
// node, not "default"!
pinctrl-names = "i2c-hdmi";
clock-frequency = <100000>;
// The I2C controller must have its status "disabled". The I2C bus
// demultiplexer will enable it at runtime when needed.
status = "disabled";
};
// Example for a bus to be demuxed. It contains various I2C clients for
// HDMI, so the bus is named "i2c-hdmi":
i2chdmi: i2c-mux3 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
avdd-supply = <&fixedregulator1v8>;
dvdd-supply = <&fixedregulator1v8>;
pvdd-supply = <&fixedregulator1v8>;
dvdd-3v-supply = <&fixedregulator3v3>;
bgvdd-supply = <&fixedregulator1v8>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
Bindings/i2c/qcom,i2c-cci.yaml
+2
View File
@@ -25,6 +25,7 @@ properties:
- items:
- enum:
- qcom,sc7280-cci
- qcom,sdm845-cci
- qcom,sm6350-cci
- qcom,sm8250-cci
@@ -159,6 +160,7 @@ allOf:
compatible:
contains:
enum:
- qcom,sc7280-cci
- qcom,sm8250-cci
- qcom,sm8450-cci
then:
Bindings/i3c/i3c.yaml
+8 -2
View File
@@ -55,6 +55,12 @@ properties:
May not be supported by all controllers.
mctp-controller:
type: boolean
description: |
Indicates that the system is accessible via this bus as an endpoint for
MCTP over I3C transport.
required:
- "#address-cells"
- "#size-cells"
@@ -119,12 +125,12 @@ patternProperties:
minimum: 0
maximum: 0x7f
- description: |
First half of the Provisional ID (following the PID
First half of the Provisioned ID (following the PID
definition provided by the I3C specification).
Contains the manufacturer ID left-shifted by 1.
- description: |
Second half of the Provisional ID (following the PID
Second half of the Provisioned ID (following the PID
definition provided by the I3C specification).
Contains the ORing of the part ID left-shifted by 16,
Bindings/iio/accel/kionix,kx022a.yaml
+9 -5
View File
@@ -4,19 +4,23 @@
$id: http://devicetree.org/schemas/iio/accel/kionix,kx022a.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ROHM/Kionix KX022A Accelerometer
title: ROHM/Kionix KX022A, KX132-1211 and KX132ACR-LBZ Accelerometers
maintainers:
- Matti Vaittinen <mazziesaccount@gmail.com>
description: |
KX022A is a 3-axis accelerometer supporting +/- 2G, 4G, 8G and 16G ranges,
output data-rates from 0.78Hz to 1600Hz and a hardware-fifo buffering.
KX022A can be accessed either via I2C or SPI.
KX022A, KX132ACR-LBZ and KX132-1211 are 3-axis accelerometers supporting
+/- 2G, 4G, 8G and 16G ranges, variable output data-rates and a
hardware-fifo buffering. These accelerometers can be accessed either
via I2C or SPI.
properties:
compatible:
const: kionix,kx022a
enum:
- kionix,kx022a
- kionix,kx132-1211
- rohm,kx132acr-lbz
reg:
maxItems: 1
Bindings/iio/adc/lltc,ltc2497.yaml
+15 -5
View File
@@ -4,21 +4,31 @@
$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2497.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Linear Technology / Analog Devices LTC2497 ADC
title: Linear Technology / Analog Devices LTC2497 and LTC2309 ADC
maintainers:
- Michael Hennerich <michael.hennerich@analog.com>
- Liam Beguin <liambeguin@gmail.com>
description: |
16bit ADC supporting up to 16 single ended or 8 differential inputs.
I2C interface.
LTC2309:
low noise, low power, 8-channel, 12-bit successive approximation ADC with an
I2C compatible serial interface.
https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/2309fd.pdf
LTC2497:
LTC2499:
16bit ADC supporting up to 16 single ended or 8 differential inputs.
I2C interface.
https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf
properties:
compatible:
enum:
- lltc,ltc2309
- lltc,ltc2497
- lltc,ltc2499
Bindings/iio/adc/microchip,mcp3564.yaml
+205
View File
@@ -0,0 +1,205 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip MCP346X and MCP356X ADC Family
maintainers:
- Marius Cristea <marius.cristea@microchip.com>
description: |
Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
Delta-Sigma ADCs with an SPI interface. Datasheet can be found here:
Datasheet for MCP3561, MCP3562, MCP3564 can be found here:
https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181C.pdf
Datasheet for MCP3561R, MCP3562R, MCP3564R can be found here:
https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
Datasheet for MCP3461, MCP3462, MCP3464 can be found here:
https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-Sigma-ADC-Data-Sheet-20006180D.pdf
Datasheet for MCP3461R, MCP3462R, MCP3464R can be found here:
https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404C.pdf
properties:
compatible:
enum:
- microchip,mcp3461
- microchip,mcp3462
- microchip,mcp3464
- microchip,mcp3461r
- microchip,mcp3462r
- microchip,mcp3464r
- microchip,mcp3561
- microchip,mcp3562
- microchip,mcp3564
- microchip,mcp3561r
- microchip,mcp3562r
- microchip,mcp3564r
reg:
maxItems: 1
spi-max-frequency:
maximum: 20000000
spi-cpha: true
spi-cpol: true
vdd-supply: true
avdd-supply: true
clocks:
description:
Phandle and clock identifier for external sampling clock.
If not specified, the internal crystal oscillator will be used.
maxItems: 1
interrupts:
description: IRQ line of the ADC
maxItems: 1
drive-open-drain:
description:
Whether to drive the IRQ signal as push-pull (default) or open-drain. Note
that the device requires this pin to become "high", otherwise it will stop
converting.
type: boolean
vref-supply:
description:
Some devices have a specific reference voltage supplied on a different
pin to the other supplies. Needed to be able to establish channel scaling
unless there is also an internal reference available (e.g. mcp3564r). In
case of "r" devices (e. g. mcp3564r), if it does not exists the internal
reference will be used.
microchip,hw-device-address:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
description:
The address is set on a per-device basis by fuses in the factory,
configured on request. If not requested, the fuses are set for 0x1.
The device address is part of the device markings to avoid
potential confusion. This address is coded on two bits, so four possible
addresses are available when multiple devices are present on the same
SPI bus with only one Chip Select line for all devices.
Each device communication starts by a CS falling edge, followed by the
clocking of the device address (BITS[7:6] - top two bits of COMMAND BYTE
which is first one on the wire).
"#io-channel-cells":
const: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^channel@([0-9]|([1-7][0-9]))$":
$ref: adc.yaml
type: object
unevaluatedProperties: false
description: Represents the external channels which are connected to the ADC.
properties:
reg:
description: The channel number in single-ended and differential mode.
minimum: 0
maximum: 79
required:
- reg
dependencies:
spi-cpol: [ spi-cpha ]
spi-cpha: [ spi-cpol ]
required:
- compatible
- reg
- microchip,hw-device-address
- spi-max-frequency
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- # External vref, no internal reference
if:
properties:
compatible:
contains:
enum:
- microchip,mcp3461
- microchip,mcp3462
- microchip,mcp3464
- microchip,mcp3561
- microchip,mcp3562
- microchip,mcp3564
then:
required:
- vref-supply
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "microchip,mcp3564r";
reg = <0>;
vref-supply = <&vref_reg>;
spi-cpha;
spi-cpol;
spi-max-frequency = <10000000>;
microchip,hw-device-address = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
/* CH0 to AGND */
reg = <0>;
label = "CH0";
};
channel@1 {
/* CH1 to AGND */
reg = <1>;
label = "CH1";
};
/* diff-channels */
channel@11 {
reg = <11>;
/* CN0, CN1 */
diff-channels = <0 1>;
label = "CH0_CH1";
};
channel@22 {
reg = <0x22>;
/* CN1, CN2 */
diff-channels = <1 2>;
label = "CH1_CH3";
};
channel@23 {
reg = <0x23>;
/* CN1, CN3 */
diff-channels = <1 3>;
label = "CH1_CH3";
};
};
};
...
Bindings/iio/adc/microchip,mcp3911.yaml
+6
View File
@@ -18,7 +18,13 @@ description: |
properties:
compatible:
enum:
- microchip,mcp3910
- microchip,mcp3911
- microchip,mcp3912
- microchip,mcp3913
- microchip,mcp3914
- microchip,mcp3918
- microchip,mcp3919
reg:
maxItems: 1
Bindings/iio/adc/ti,ads1015.yaml
+3
View File
@@ -23,6 +23,9 @@ properties:
reg:
maxItems: 1
interrupts:
maxItems: 1
"#address-cells":
const: 1

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