Remove all code under __SPE__
Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me> Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/1957
This commit is contained in:
@@ -187,10 +187,6 @@ extern void *int_debug;
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extern void *int_debug_ed;
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extern void *int_vec;
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extern void *int_vecast;
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#ifdef __SPE__
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extern void *int_spe_fpdata;
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extern void *int_spe_fpround;
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#endif
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#ifdef HWPMC_HOOKS
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extern void *int_performance_counter;
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#endif
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@@ -278,10 +274,6 @@ ivor_setup(void)
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case FSL_E500v1:
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case FSL_E500v2:
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SET_TRAP(SPR_IVOR32, int_vec);
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#ifdef __SPE__
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SET_TRAP(SPR_IVOR33, int_spe_fpdata);
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SET_TRAP(SPR_IVOR34, int_spe_fpround);
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#endif
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break;
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}
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@@ -636,28 +636,6 @@ INTERRUPT(int_vecast)
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b trap_common
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#ifdef __SPE__
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/*****************************************************************************
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* Floating point Assist interrupt
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****************************************************************************/
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INTERRUPT(int_spe_fpdata)
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STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
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FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPD)
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addi %r3, %r1, CALLSIZE
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bl spe_handle_fpdata
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FRAME_LEAVE(SPR_SRR0, SPR_SRR1)
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rfi
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INTERRUPT(int_spe_fpround)
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STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
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FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPR)
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addi %r3, %r1, CALLSIZE
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bl spe_handle_fpround
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FRAME_LEAVE(SPR_SRR0, SPR_SRR1)
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rfi
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#endif
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#ifdef HWPMC_HOOKS
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/*****************************************************************************
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* PMC Interrupt
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@@ -10,19 +10,11 @@
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/* Deprecated historical FPU control interface */
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typedef int fp_except_t;
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#ifdef __SPE__
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#define FP_X_OFL 0x01 /* overflow exception */
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#define FP_X_UFL 0x02 /* underflow exception */
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#define FP_X_DZ 0x04 /* divide-by-zero exception */
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#define FP_X_INV 0x08 /* invalid operation exception */
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#define FP_X_IMP 0x10 /* imprecise (loss of precision) */
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#else
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#define FP_X_IMP 0x01 /* imprecise (loss of precision) */
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#define FP_X_DZ 0x02 /* divide-by-zero exception */
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#define FP_X_UFL 0x04 /* underflow exception */
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#define FP_X_OFL 0x08 /* overflow exception */
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#define FP_X_INV 0x10 /* invalid operation exception */
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#endif
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typedef enum {
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FP_RN=0, /* round to nearest representable number */
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@@ -646,18 +646,6 @@ cpu_update_pcb(struct thread *td)
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pcb->pcb_dscr = mfspr(SPR_DSCRP);
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#endif
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#if defined(__SPE__)
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/*
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* On E500v2, single-precision scalar instructions and access to
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* SPEFSCR may be used without PSL_VEC turned on, as long as they
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* limit themselves to the low word of the registers.
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*
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* As such, we need to unconditionally save SPEFSCR, even though
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* it is also updated in save_vec_nodrop().
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*/
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pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR);
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#endif
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if (pcb_flags & PCB_FPU)
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save_fpu_nodrop(td);
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@@ -1155,9 +1143,6 @@ cpu_copy_thread(struct thread *td, struct thread *td0)
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pcb2->pcb_context[0] = pcb2->pcb_lr;
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#endif
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pcb2->pcb_cpu.aim.usr_vsid = 0;
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#ifdef __SPE__
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pcb2->pcb_vec.vscr = SPEFSCR_DFLT;
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#endif
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/* Setup to release spin count in fork_exit(). */
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td->td_md.md_spinlock_count = 1;
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@@ -1215,9 +1200,6 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
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}
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td->td_pcb->pcb_flags = 0;
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#ifdef __SPE__
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td->td_pcb->pcb_vec.vscr = SPEFSCR_DFLT;
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#endif
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td->td_retval[0] = (register_t)entry;
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td->td_retval[1] = 0;
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@@ -317,7 +317,6 @@ disable_fpu(struct thread *td)
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pcb->pcb_flags &= ~(PCB_FPU | PCB_VSX);
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}
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#ifndef __SPE__
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/*
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* XXX: Implement fpu_kern_alloc_ctx/fpu_kern_free_ctx once fpu_kern_enter and
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* fpu_kern_leave can handle !FPU_KERN_NOCTX.
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@@ -403,5 +402,3 @@ is_fpu_kern_thread(u_int flags __unused)
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curpcb = curthread->td_pcb;
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return ((curpcb->pcb_flags & PCB_KERN_FPU) != 0);
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}
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#endif /* !__SPE__ */
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@@ -37,11 +37,7 @@
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#include <machine/md_var.h>
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#include <machine/pcb.h>
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#ifdef __SPE__
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#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_SPE
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#else
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#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_ALTIVEC
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#endif
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int
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cpu_ptrace(struct thread *td, int req, void *addr, int data)
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@@ -119,10 +119,6 @@ ENTRY(cpu_switch)
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bl save_vec
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.L2:
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#if defined(__SPE__)
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mfspr %r3,SPR_SPEFSCR
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stw %r3,PCB_VSCR(%r17)
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#endif
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mr %r3,%r14 /* restore old thread ptr */
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bl pmap_deactivate /* Deactivate the current pmap */
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@@ -176,10 +172,6 @@ blocked_loop:
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bl enable_vec
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.L4:
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#if defined(__SPE__)
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lwz %r3,PCB_VSCR(%r17)
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mtspr SPR_SPEFSCR,%r3
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#endif
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/* thread to restore is in r3 */
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mr %r3,%r17 /* Recover PCB ptr */
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lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */
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@@ -224,9 +216,5 @@ ENTRY(fork_trampoline)
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trapframe to simulate FRAME_SETUP
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does when allocating space for
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a frame pointer/saved LR */
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#ifdef __SPE__
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li %r3,SPEFSCR_DFLT
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mtspr SPR_SPEFSCR, %r3
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#endif
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b trapexit
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END(fork_trampoline)
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@@ -861,41 +861,6 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
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int indicator, reg;
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double *fpr;
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#ifdef __SPE__
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indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
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if (indicator & ESR_SPE) {
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if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
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return (-1);
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reg = EXC_ALI_INST_RST(inst);
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fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
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fputhread = PCPU_GET(vecthread);
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/* Juggle the SPE to ensure that we've initialized
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* the registers, and that their current state is in
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* the PCB.
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*/
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if (fputhread != td) {
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if (fputhread)
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save_vec(fputhread);
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enable_vec(td);
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}
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save_vec(td);
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if (!(indicator & ESR_ST)) {
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if (copyin((void *)frame->dar, fpr,
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sizeof(double)) != 0)
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return (-1);
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frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
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enable_vec(td);
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} else {
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td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
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if (copyout(fpr, (void *)frame->dar,
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sizeof(double)) != 0)
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return (-1);
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}
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return (0);
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}
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#else
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#ifdef BOOKE
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indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
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#else
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@@ -939,7 +904,6 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
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return (0);
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break;
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}
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#endif
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return (-1);
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}
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