Remove all code under __SPE__

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1957
This commit is contained in:
Minsoo Choo
2026-01-09 23:32:35 -05:00
committed by Warner Losh
parent 7f8b4db9e0
commit c5dc38bcc2
12 changed files with 0 additions and 266 deletions
-8
View File
@@ -187,10 +187,6 @@ extern void *int_debug;
extern void *int_debug_ed;
extern void *int_vec;
extern void *int_vecast;
#ifdef __SPE__
extern void *int_spe_fpdata;
extern void *int_spe_fpround;
#endif
#ifdef HWPMC_HOOKS
extern void *int_performance_counter;
#endif
@@ -278,10 +274,6 @@ ivor_setup(void)
case FSL_E500v1:
case FSL_E500v2:
SET_TRAP(SPR_IVOR32, int_vec);
#ifdef __SPE__
SET_TRAP(SPR_IVOR33, int_spe_fpdata);
SET_TRAP(SPR_IVOR34, int_spe_fpround);
#endif
break;
}
-22
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@@ -636,28 +636,6 @@ INTERRUPT(int_vecast)
b trap_common
#ifdef __SPE__
/*****************************************************************************
* Floating point Assist interrupt
****************************************************************************/
INTERRUPT(int_spe_fpdata)
STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPD)
addi %r3, %r1, CALLSIZE
bl spe_handle_fpdata
FRAME_LEAVE(SPR_SRR0, SPR_SRR1)
rfi
INTERRUPT(int_spe_fpround)
STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPR)
addi %r3, %r1, CALLSIZE
bl spe_handle_fpround
FRAME_LEAVE(SPR_SRR0, SPR_SRR1)
rfi
#endif
#ifdef HWPMC_HOOKS
/*****************************************************************************
* PMC Interrupt
-8
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@@ -10,19 +10,11 @@
/* Deprecated historical FPU control interface */
typedef int fp_except_t;
#ifdef __SPE__
#define FP_X_OFL 0x01 /* overflow exception */
#define FP_X_UFL 0x02 /* underflow exception */
#define FP_X_DZ 0x04 /* divide-by-zero exception */
#define FP_X_INV 0x08 /* invalid operation exception */
#define FP_X_IMP 0x10 /* imprecise (loss of precision) */
#else
#define FP_X_IMP 0x01 /* imprecise (loss of precision) */
#define FP_X_DZ 0x02 /* divide-by-zero exception */
#define FP_X_UFL 0x04 /* underflow exception */
#define FP_X_OFL 0x08 /* overflow exception */
#define FP_X_INV 0x10 /* invalid operation exception */
#endif
typedef enum {
FP_RN=0, /* round to nearest representable number */
-18
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@@ -646,18 +646,6 @@ cpu_update_pcb(struct thread *td)
pcb->pcb_dscr = mfspr(SPR_DSCRP);
#endif
#if defined(__SPE__)
/*
* On E500v2, single-precision scalar instructions and access to
* SPEFSCR may be used without PSL_VEC turned on, as long as they
* limit themselves to the low word of the registers.
*
* As such, we need to unconditionally save SPEFSCR, even though
* it is also updated in save_vec_nodrop().
*/
pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR);
#endif
if (pcb_flags & PCB_FPU)
save_fpu_nodrop(td);
@@ -1155,9 +1143,6 @@ cpu_copy_thread(struct thread *td, struct thread *td0)
pcb2->pcb_context[0] = pcb2->pcb_lr;
#endif
pcb2->pcb_cpu.aim.usr_vsid = 0;
#ifdef __SPE__
pcb2->pcb_vec.vscr = SPEFSCR_DFLT;
#endif
/* Setup to release spin count in fork_exit(). */
td->td_md.md_spinlock_count = 1;
@@ -1215,9 +1200,6 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
}
td->td_pcb->pcb_flags = 0;
#ifdef __SPE__
td->td_pcb->pcb_vec.vscr = SPEFSCR_DFLT;
#endif
td->td_retval[0] = (register_t)entry;
td->td_retval[1] = 0;
-3
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@@ -317,7 +317,6 @@ disable_fpu(struct thread *td)
pcb->pcb_flags &= ~(PCB_FPU | PCB_VSX);
}
#ifndef __SPE__
/*
* XXX: Implement fpu_kern_alloc_ctx/fpu_kern_free_ctx once fpu_kern_enter and
* fpu_kern_leave can handle !FPU_KERN_NOCTX.
@@ -403,5 +402,3 @@ is_fpu_kern_thread(u_int flags __unused)
curpcb = curthread->td_pcb;
return ((curpcb->pcb_flags & PCB_KERN_FPU) != 0);
}
#endif /* !__SPE__ */
-4
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@@ -37,11 +37,7 @@
#include <machine/md_var.h>
#include <machine/pcb.h>
#ifdef __SPE__
#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_SPE
#else
#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_ALTIVEC
#endif
int
cpu_ptrace(struct thread *td, int req, void *addr, int data)
-12
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@@ -119,10 +119,6 @@ ENTRY(cpu_switch)
bl save_vec
.L2:
#if defined(__SPE__)
mfspr %r3,SPR_SPEFSCR
stw %r3,PCB_VSCR(%r17)
#endif
mr %r3,%r14 /* restore old thread ptr */
bl pmap_deactivate /* Deactivate the current pmap */
@@ -176,10 +172,6 @@ blocked_loop:
bl enable_vec
.L4:
#if defined(__SPE__)
lwz %r3,PCB_VSCR(%r17)
mtspr SPR_SPEFSCR,%r3
#endif
/* thread to restore is in r3 */
mr %r3,%r17 /* Recover PCB ptr */
lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */
@@ -224,9 +216,5 @@ ENTRY(fork_trampoline)
trapframe to simulate FRAME_SETUP
does when allocating space for
a frame pointer/saved LR */
#ifdef __SPE__
li %r3,SPEFSCR_DFLT
mtspr SPR_SPEFSCR, %r3
#endif
b trapexit
END(fork_trampoline)
-36
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@@ -861,41 +861,6 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
int indicator, reg;
double *fpr;
#ifdef __SPE__
indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
if (indicator & ESR_SPE) {
if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
return (-1);
reg = EXC_ALI_INST_RST(inst);
fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
fputhread = PCPU_GET(vecthread);
/* Juggle the SPE to ensure that we've initialized
* the registers, and that their current state is in
* the PCB.
*/
if (fputhread != td) {
if (fputhread)
save_vec(fputhread);
enable_vec(td);
}
save_vec(td);
if (!(indicator & ESR_ST)) {
if (copyin((void *)frame->dar, fpr,
sizeof(double)) != 0)
return (-1);
frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
enable_vec(td);
} else {
td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
if (copyout(fpr, (void *)frame->dar,
sizeof(double)) != 0)
return (-1);
}
return (0);
}
#else
#ifdef BOOKE
indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
#else
@@ -939,7 +904,6 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
return (0);
break;
}
#endif
return (-1);
}