KekenoBSD/src
3
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

specialreg: Fix typos

Browse Source 
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/885
This commit is contained in:
Elyes Haouas
2024-04-11 11:27:29 -06:00
committed by Warner Losh
parent ef764e4801
commit c1aa50bf31
1 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sys/x86/include/specialreg.h
+3 -3
View File
@@ -918,7 +918,7 @@
#define CCR4 0xe8 #define CCR4 0xe8
#define CCR4_IOMASK 0x07 #define CCR4_IOMASK 0x07
#define CCR4_MEM 0x08 /* Enables momory bypassing */ #define CCR4_MEM 0x08 /* Enables memory bypassing */
#define CCR4_DTE 0x10 /* Enables directory table entry cache */ #define CCR4_DTE 0x10 /* Enables directory table entry cache */
#define CCR4_FASTFPE 0x20 /* Fast FPU exception */ #define CCR4_FASTFPE 0x20 /* Fast FPU exception */
#define CCR4_CPUID 0x80 /* Enables CPUID instruction */ #define CCR4_CPUID 0x80 /* Enables CPUID instruction */
@@ -938,7 +938,7 @@
#define PCR0_RSTK 0x01 /* Enables return stack */ #define PCR0_RSTK 0x01 /* Enables return stack */
#define PCR0_BTB 0x02 /* Enables branch target buffer */ #define PCR0_BTB 0x02 /* Enables branch target buffer */
#define PCR0_LOOP 0x04 /* Enables loop */ #define PCR0_LOOP 0x04 /* Enables loop */
#define PCR0_AIS 0x08 /* Enables all instrcutions stalled to #define PCR0_AIS 0x08 /* Enables all instructions stalled to
serialize pipe. */ serialize pipe. */
#define PCR0_MLR 0x10 /* Enables reordering of misaligned loads */ #define PCR0_MLR 0x10 /* Enables reordering of misaligned loads */
#define PCR0_BTBRT 0x40 /* Enables BTB test register. */ #define PCR0_BTBRT 0x40 /* Enables BTB test register. */
@@ -1092,7 +1092,7 @@
/* /*
* The region control registers specify the attributes associated with * The region control registers specify the attributes associated with
* the ARRx addres regions. * the ARRx address regions.
*/ */
#define RCR0 0xdc #define RCR0 0xdc
#define RCR1 0xdd #define RCR1 0xdd