From 93a5341930304926f8f2608e6c7ed391df51a873 Mon Sep 17 00:00:00 2001 From: Brandon Bergren Date: Wed, 23 Sep 2020 02:28:19 +0000 Subject: [PATCH] [PowerPC64LE] Fix sleeping on POWER8. Due to enter_idle_powerx fabricating a MSR from scratch, it is necessary for it to care about the endianness, so we don't accidentally switch endian the first time we idle a thread. Took about five seconds to spot after seeing an unmangled backtrace. The hard bit was needing to temporarily set up a mutex to sort out the logjam that happens when every thread simultaneously wakes up in the wrong endian due to the panic IPI and panics, leaving what I can best describe as "alphabet soup" on the console. Luckily, I already had a patch sitting around to do that. This brings POWER8 up to equivilence with POWER9 on PPC64LE. Sponsored by: Tag1 Consulting, Inc. --- sys/powerpc/powerpc/cpu_subr64.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/powerpc/powerpc/cpu_subr64.S b/sys/powerpc/powerpc/cpu_subr64.S index 6f3ed66fa1c..1cc88255153 100644 --- a/sys/powerpc/powerpc/cpu_subr64.S +++ b/sys/powerpc/powerpc/cpu_subr64.S @@ -71,7 +71,11 @@ ENTRY(enter_idle_powerx) /* Set MSR */ li %r3,0 +#ifdef __LITTLE_ENDIAN__ + ori %r3,%r3,(PSL_ME | PSL_RI | PSL_LE) +#else ori %r3,%r3,(PSL_ME | PSL_RI) +#endif li %r8,0x9 /* PSL_SF and PSL_HV */ insrdi %r3,%r8,4,0 mtsrr1 %r3