buf_ring: Remove old arm-only dequeue code

In the single consumer dequeue the consumer thread controls
br_cons_head. As such no ordering between this and other data are
required.

Reviewed by:	alc, imp, kib, markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46153

This commit is contained in:

Andrew Turner

2024-08-19 10:07:10 +01:00

parent 44e1cfca41

commit 7eb0fffc77

1 changed files with 0 additions and 29 deletions

									
										sys/sys/buf_ring.h
									
		-29
	
												View File
												
					@@ -177,37 +177,8 @@ buf_ring_dequeue_sc(struct buf_ring *br)

						uint32_t prod_tail, mask;

						uint32_t prod_tail, mask;

						void *buf;

						void *buf;

						/*

						 * This is a workaround to allow using buf_ring on ARM and ARM64.

						 * ARM64TODO: Fix buf_ring in a generic way.

						 * REMARKS: It is suspected that br_cons_head does not require

						 *   load_acq operation, but this change was extensively tested

						 *   and confirmed it's working. To be reviewed once again in

						 *   FreeBSD-12.

						 *

						 * Preventing following situation:

						 * Core(0) - buf_ring_enqueue()                                       Core(1) - buf_ring_dequeue_sc()

						 * -----------------------------------------                                       ----------------------------------------------

						 *

						 *                                                                                cons_head = br->br_cons_head;

						 * atomic_cmpset_acq_32(&br->br_prod_head, ...));

						 *                                                                                buf = br->br_ring[cons_head];     <see <1>>

						 * br->br_ring[prod_head] = buf;

						 * atomic_store_rel_32(&br->br_prod_tail, ...);

						 *                                                                                prod_tail = br->br_prod_tail;

						 *                                                                                if (cons_head == prod_tail) 

						 *                                                                                        return (NULL);

						 *                                                                                <condition is false and code uses invalid(old) buf>`	

						 *

						 * <1> Load (on core 1) from br->br_ring[cons_head] can be reordered (speculative readed) by CPU.

						 */	

						mask = br->br_cons_mask;

						mask = br->br_cons_mask;

					#if defined(__arm__) || defined(__aarch64__)

						cons_head = atomic_load_acq_32(&br->br_cons_head);

					#else

						cons_head = br->br_cons_head;

						cons_head = br->br_cons_head;

					#endif

						prod_tail = atomic_load_acq_32(&br->br_prod_tail);

						prod_tail = atomic_load_acq_32(&br->br_prod_tail);

						cons_next = cons_head + 1;

						cons_next = cons_head + 1;