MFH

Sponsored by:	The FreeBSD Foundation

Makefile.inc1

@@ -1128,7 +1128,7 @@ distrib-dirs distribution: .MAKE .PHONY
 .if make(distribution)
 	${_+_}cd ${.CURDIR}; ${CROSSENV} PATH=${TMPPATH} \
 		${MAKE} -f Makefile.inc1 ${IMAKE_INSTALL} \
-		METALOG=${METALOG} installconfig
+		METALOG=${METALOG} MK_TESTS=no installconfig
 .endif
 
 #

bin/sh/tests/Makefile

@@ -14,6 +14,4 @@ TESTS_SUBDIRS+=	parameters
 TESTS_SUBDIRS+=	parser
 TESTS_SUBDIRS+=	set-e
 
-SUBDIR_PARALLEL=
-
 .include <bsd.test.mk>

cddl/usr.sbin/dtrace/tests/common/Makefile

@@ -86,6 +86,4 @@ TESTS_SUBDIRS+= aggs \
 .PATH:		${.CURDIR:H:H:H:H:H}/tests
 KYUAFILE=	YES
 
-SUBDIR_PARALLEL=
-
 .include <bsd.test.mk>

contrib/elftoolchain/elfcopy/main.c

@@ -641,6 +641,18 @@ create_file(struct elfcopy *ecp, const char *src, const char *dst)
 	 * ELF object before processing.
 	 */
 	if (ecp->itf != ETF_ELF) {
+		/*
+		 * If the output object is not an ELF file, choose an arbitrary
+		 * ELF format for the intermediate file. srec, ihex and binary
+		 * formats are independent of class, endianness and machine
+		 * type so these choices do not affect the output.
+		 */
+		if (ecp->otf != ETF_ELF) {
+			if (ecp->oec == ELFCLASSNONE)
+				ecp->oec = ELFCLASS64;
+			if (ecp->oed == ELFDATANONE)
+				ecp->oed = ELFDATA2LSB;
+		}
 		create_tempfile(&elftemp, &efd);
 		if ((ecp->eout = elf_begin(efd, ELF_C_WRITE, NULL)) == NULL)
 			errx(EXIT_FAILURE, "elf_begin() failed: %s",

gnu/usr.bin/rcs/doc/rcs.ms

@@ -16,7 +16,7 @@
 .R
 ..
 .de Id
-.ND \\$4
+.ND 1 June 1995
 ..
 .Id $FreeBSD$
 .RP

lib/clang/libllvmdebuginfodwarf/Makefile.depend

@@ -0,0 +1,15 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

lib/clang/libllvmdebuginfopdb/Makefile.depend

@@ -0,0 +1,15 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

lib/clang/libllvmlibdriver/Makefile.depend

@@ -0,0 +1,18 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+	usr.bin/clang/tblgen.host \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+LibDriver.o: Options.inc.h
+LibDriver.po: Options.inc.h
+.endif

lib/clang/libllvmlto/Makefile.depend

@@ -0,0 +1,18 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+	usr.bin/clang/tblgen.host \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+LTOCodeGenerator.o: Intrinsics.inc.h
+LTOCodeGenerator.po: Intrinsics.inc.h
+.endif

lib/clang/libllvmmirparser/Makefile.depend

@@ -0,0 +1,15 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

lib/clang/libllvmorcjit/Makefile.depend

@@ -0,0 +1,15 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

lib/clang/libllvmpasses/Makefile.depend

@@ -0,0 +1,18 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+	lib/libc++ \
+	lib/msun \
+	usr.bin/clang/tblgen.host \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+PassBuilder.o: Intrinsics.inc.h
+PassBuilder.po: Intrinsics.inc.h
+.endif

lib/libc/tests/Makefile

@@ -26,6 +26,8 @@ TESTS_SUBDIRS+=	termios
 TESTS_SUBDIRS+=	tls
 TESTS_SUBDIRS+=	ttyio
 
+SUBDIR_DEPEND_tls= tls_dso
+
 .if ${MK_LOCALES} != "no"
 TESTS_SUBDIRS+=	locale
 .endif

lib/libpe/Makefile.depend

@@ -0,0 +1,13 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+	include \
+	include/xlocale \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

libexec/Makefile

@@ -10,6 +10,7 @@ SUBDIR=	${_atf} \
 	${_dma} \
 	getty \
 	${_mail.local} \
+	${_makewhatis.local} \
 	${_mknetid} \
 	${_pppoed} \
 	revnetgroup \
@@ -88,6 +89,10 @@ _mail.local=	mail.local
 _smrsh=		smrsh
 .endif
 
+.if ${MK_MAN_UTILS} != "no"
+_makewhatis.local=	makewhatis.local
+.endif
+
 .if ${MK_TALK} != "no"
 SUBDIR+=	talkd
 .endif

libexec/makewhatis.local/Makefile

@@ -0,0 +1,9 @@
+# $FreeBSD$
+
+SCRIPTS=	makewhatis.local.sh
+MAN=		makewhatis.local.8
+SCRIPTSDIR=	${LIBEXECDIR}
+LINKS=		${SCRIPTSDIR}/makewhatis.local ${SCRIPTSDIR}/catman.local
+MLINKS=		makewhatis.local.8 catman.local.8
+
+.include <bsd.prog.mk>

libexec/makewhatis.local/Makefile.depend

@@ -0,0 +1,11 @@
+# $FreeBSD$
+# Autogenerated - do NOT edit!
+
+DIRDEPS = \
+
+
+.include <dirdeps.mk>
+
+.if ${DEP_RELDIR} == ${_DEP_RELDIR}
+# local dependencies - needed for -jN in clean tree
+.endif

libexec/makewhatis.local/makewhatis.local.8

@@ -0,0 +1,83 @@
+.\" Copyright (c) April 1996 Wolfram Schneider <wosch@FreeBSD.org>. Berlin.
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $FreeBSD$
+.Dd April 26, 1996
+.Dt MAKEWHATIS.LOCAL 8
+.Os
+.Sh NAME
+.Nm makewhatis.local , catman.local
+.Nd start makewhatis or catman for local file systems
+.Sh SYNOPSIS
+.Nm /usr/libexec/makewhatis.local
+.Op options
+.Ar directories ...
+.Nm /usr/libexec/catman.local
+.Op options
+.Ar directories ...
+.Sh DESCRIPTION
+The
+.Nm
+utility starts
+.Xr makewhatis 1
+only for file systems physically mounted on the system
+where the
+.Nm
+is being executed.
+Running makewhatis
+by
+.Pa periodic weekly
+for rw nfs-mounted /usr may kill
+your NFS server -- all NFS clients start makewhatis at the same time!
+So use this wrapper for
+.Xr cron 8
+instead of calling makewhatis directly.
+The
+.Nm catman.local
+utility is using for same purposes as
+.Nm
+but for
+.Xr catman 1 .
+.Sh FILES
+.Bl -tag -width /etc/periodic/weekly/320.whatis.XXX -compact
+.It Pa /etc/periodic/weekly/320.whatis
+run
+.Nm
+every week
+.It Pa /etc/periodic/weekly/330.catman
+run
+.Nm catman.local
+every week
+.El
+.Sh SEE ALSO
+.Xr catman 1 ,
+.Xr find 1 ,
+.Xr makewhatis 1 ,
+.Xr cron 8 ,
+.Xr periodic 8
+.Sh HISTORY
+The
+.Nm
+utility appeared in
+.Fx 2.2 .

libexec/makewhatis.local/makewhatis.local.sh

@@ -0,0 +1,58 @@
+#!/bin/sh
+#
+# Copyright (c) April 1996 Wolfram Schneider <wosch@FreeBSD.org>. Berlin.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# makewhatis.local - start makewhatis(1) only for file systems 
+#		     physically mounted on the system
+#
+# Running makewhatis from /etc/periodic/weekly/320.whatis for rw nfs-mounted
+# /usr may kill your NFS server -- all clients start makewhatis at the same
+# time! So use this wrapper instead calling makewhatis directly.
+#
+# PS: this wrapper works also for catman(1)
+#
+# $FreeBSD$
+
+PATH=/bin:/usr/bin:$PATH; export PATH
+opt= dirs= localdirs=
+
+for arg
+do
+	case "$arg" in
+		-*) 	opt="$opt $arg";;
+		*)	dirs="$dirs $arg";;
+	esac
+done
+
+dirs=`echo $dirs | sed 's/:/ /g'`
+case X"$dirs" in X) echo "usage: $0 [options] directories ..."; exit 1;; esac
+
+localdirs=`find -H $dirs -fstype local -type d -prune -print`
+
+case X"$localdirs" in
+	X) 	echo "$0: no local-mounted manual directories found: $dirs"
+		exit 1;;
+	*) 	exec `basename $0 .local` $opt $localdirs;;
+esac

libexec/rtld-elf/tests/Makefile

@@ -7,6 +7,7 @@ FILESGROUPS=	TESTS
 TESTSPACKAGE=	${PACKAGE}
 SUBDIR+=	libpythagoras target
 
+SUBDIR_DEPEND_target=	libpythagoras
 ATF_TESTS_C=	ld_library_pathfds
 
 .include <bsd.test.mk>

sbin/kldstat/Makefile.depend

@@ -8,6 +8,7 @@ DIRDEPS = \
 	lib/${CSU_DIR} \
 	lib/libc \
 	lib/libcompiler_rt \
+	lib/libutil \
 
 
 .include <dirdeps.mk>

secure/lib/libssh/Makefile.depend

@@ -6,6 +6,7 @@ DIRDEPS = \
 	gnu/lib/libgcc \
 	include \
 	include/arpa \
+	include/gssapi \
 	include/xlocale \
 	lib/${CSU_DIR} \
 	lib/libc \

share/misc/committers-ports.dot

@@ -175,6 +175,7 @@ nork [label="Norikatsu Shigemura\nnork@FreeBSD.org\n2002/04/01"]
 novel [label="Roman Bogorodskiy\nnovel@FreeBSD.org\n2005/03/07"]
 nox [label="Juergen Lock\nnox@FreeBSD.org\n2006/12/22"]
 obrien [label="David E. O'Brien\nobrien@FreeBSD.org\n1996/10/29"]
+olivier [label="Olivier Cochard-Labbe\nolivier@FreeBSD.org\n2016/02/02"]
 olivierd [label="Olivier Duchateau\nolivierd@FreeBSD.org\n2012/05/29"]
 osa [label="Sergey A. Osokin\nosa@FreeBSD.org\n2003/06/04"]
 pat [label="Patrick Li\npat@FreeBSD.org\n2001/11/14"]
@@ -400,6 +401,7 @@ itetcu -> sylvio
 
 jadawin -> bapt
 jadawin -> flo
+jadawin -> olivier
 jadawin -> riggs
 jadawin -> sbz
 jadawin -> wen

share/mk/bsd.dep.mk

@@ -5,6 +5,11 @@
 #
 # +++ variables +++
 #
+# CLEANDEPENDDIRS	Additional directories to remove for the cleandepend
+# 			target.
+#
+# CLEANDEPENDFILES	Additional files to remove for the cleandepend target.
+#
 # CTAGS		A tags file generation program [gtags]
 #
 # CTAGSFLAGS	Options for ctags(1) [not set]
@@ -27,7 +32,8 @@
 # +++ targets +++
 #
 #	cleandepend:
-#		Remove depend and tags file
+#		remove ${CLEANDEPENDFILES}; remove ${CLEANDEPENDDIRS} and all
+#		contents.
 #
 #	depend:
 #		Make the dependencies for the source files, and store
@@ -59,7 +65,7 @@ DEPENDFILE?=	.depend
 .if ${MK_DIRDEPS_BUILD} == "no"
 .MAKE.DEPENDFILE= ${DEPENDFILE}
 .endif
-DEPENDFILES=	${DEPENDFILE}
+CLEANDEPENDFILES=	${DEPENDFILE} ${DEPENDFILE}.*
 
 # Keep `tags' here, before SRCS are mangled below for `depend'.
 .if !target(tags) && defined(SRCS) && !defined(NO_TAGS)
@@ -156,7 +162,6 @@ ${_D}.po: ${_DSRC} ${POBJS:S/^${_D}.po$//}
 
 .if ${MK_FAST_DEPEND} == "yes" && \
     (${.MAKE.MODE:Mmeta} == "" || ${.MAKE.MODE:Mnofilemon} != "")
-DEPENDFILES+=	${DEPENDFILE}.*
 DEPEND_MP?=	-MP
 # Handle OBJS=../somefile.o hacks.  Just replace '/' rather than use :T to
 # avoid collisions.
@@ -205,14 +210,6 @@ depend: beforedepend ${DEPENDFILE} afterdepend
 # This could be simpler with bmake :tW but needs to support fmake for MFC.
 _CFLAGS_INCLUDES= ${CFLAGS:Q:S/\\ /,/g:C/-include,/-include%/g:C/,/ /g:M-include*:C/%/ /g}
 _CXXFLAGS_INCLUDES= ${CXXFLAGS:Q:S/\\ /,/g:C/-include,/-include%/g:C/,/ /g:M-include*:C/%/ /g}
-# XXX: Temporary hack to workaround .depend files not tracking -include
-_hdrincludes=${_CFLAGS_INCLUDES:M*.h} ${_CXXFLAGS_INCLUDES:M*.h}
-.for _hdr in ${_hdrincludes:O:u}
-.if exists(${_hdr})
-${OBJS} ${POBJS} ${SOBJS}: ${_hdr}
-.endif
-.endfor
-.undef _hdrincludes
 
 # Different types of sources are compiled with slightly different flags.
 # Split up the sources, and filter out headers and non-applicable flags.
@@ -261,16 +258,20 @@ afterdepend:
 .endif
 .endif
 
+.if ${CTAGS:T} == "gtags"
+CLEANDEPENDFILES+=	GPATH GRTAGS GSYMS GTAGS
+.if defined(HTML)
+CLEANDEPENDDIRS+=	HTML
+.endif
+.else
+CLEANDEPENDFILES+=	tags
+.endif
 .if !target(cleandepend)
 cleandepend:
 .if defined(SRCS)
-.if ${CTAGS:T} == "gtags"
+	rm -f ${CLEANDEPENDFILES}
-	rm -f ${DEPENDFILES} GPATH GRTAGS GSYMS GTAGS
+.if !empty(CLEANDEPENDDIRS)
-.if defined(HTML)
+	rm -rf ${CLEANDEPENDDIRS}
-	rm -rf HTML
-.endif
-.else
-	rm -f ${DEPENDFILES} tags
 .endif
 .endif
 .endif

share/mk/bsd.init.mk

@@ -15,6 +15,10 @@ __<bsd.init.mk>__:
 .endif
 .include <bsd.own.mk>
 .MAIN: all
+beforebuild: .PHONY .NOTMAIN
+.if !defined(_SKIP_BUILD)
+all: beforebuild .WAIT
+.endif
 
 .if ${.MAKE.LEVEL:U1} == 0 && ${BUILD_AT_LEVEL0:Uyes:tl} == "no" && !make(clean*)
 # this tells lib.mk and prog.mk to not actually build anything

share/mk/bsd.lib.mk

@@ -139,11 +139,6 @@ PO_FLAG=-pg
 	    -c ${.IMPSRC} -o ${.TARGET}
 	${CTFCONVERT_CMD}
 
-.if !defined(_SKIP_BUILD)
-all: beforebuild .WAIT
-beforebuild: objwarn
-.endif
-
 _LIBDIR:=${LIBDIR}
 _SHLIBDIR:=${SHLIBDIR}
 

share/mk/bsd.obj.mk

@@ -89,6 +89,7 @@ objwarn:
 		canonical ${CANONICALOBJDIR}"
 .endif
 .endif
+beforebuild: objwarn
 
 .if !defined(NO_OBJ)
 .if !target(obj)

share/mk/bsd.prog.mk

@@ -155,8 +155,7 @@ MAN1=	${MAN}
 .if defined(_SKIP_BUILD)
 all:
 .else
-all: beforebuild .WAIT ${PROG} ${SCRIPTS}
+all: ${PROG} ${SCRIPTS}
-beforebuild: objwarn
 .if ${MK_MAN} != "no"
 all: _manpages
 .endif

share/mk/bsd.subdir.mk

@@ -89,6 +89,7 @@ ${__stage}install:
 install:	beforeinstall realinstall afterinstall
 .ORDER:		beforeinstall realinstall afterinstall
 .endif
+.ORDER: all install
 
 # SUBDIR recursing may be disabled for MK_DIRDEPS_BUILD
 .if !target(_SUBDIR)

share/mk/bsd.test.mk

@@ -69,6 +69,7 @@ _TESTS=
 SUBDIR+= ${ts}
 .endif
 .endfor
+SUBDIR_PARALLEL= t
 .endif
 
 # it is rare for test cases to have man pages

sys/arm/allwinner/a10_ahci.c

@@ -41,7 +41,6 @@ __FBSDID("$FreeBSD$");
 #include <sys/rman.h>
 #include <sys/kernel.h>
 #include <sys/module.h>
-#include <sys/gpio.h>
 
 #include <machine/bus.h>
 #include <dev/ofw/ofw_bus.h> 
@@ -49,7 +48,6 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/ahci/ahci.h>
 #include <arm/allwinner/a10_clk.h>
-#include "gpio_if.h"
 
 /*
  * Allwinner a1x/a2x/a8x SATA attachment.  This is just the AHCI register
@@ -119,9 +117,6 @@ __FBSDID("$FreeBSD$");
 #define	AHCI_P0PHYCR	0x0078
 #define	AHCI_P0PHYSR	0x007C
 
-/* Kludge for CUBIEBOARD (and Banana PI too) */
-#define	GPIO_AHCI_PWR           40
-
 static void inline
 ahci_set(struct resource *m, bus_size_t off, uint32_t set)
 {
@@ -298,7 +293,6 @@ ahci_a10_probe(device_t dev)
 static int
 ahci_a10_attach(device_t dev)
 {
-	device_t gpio;
 	int error;
 	struct ahci_controller *ctlr;
 
@@ -316,19 +310,6 @@ ahci_a10_attach(device_t dev)
 	/* Turn on the PLL for SATA */
 	a10_clk_ahci_activate();
 
-	/* Apply power to the drive, if any */
-	gpio = devclass_get_device(devclass_find("gpio"), 0);
-	if (gpio == NULL) {
-		device_printf(dev,
-		    "GPIO device not yet present (SATA won't work).\n");
-		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid,
-		    ctlr->r_mem);
-		return (ENXIO);
-	}
-	GPIO_PIN_SETFLAGS(gpio, GPIO_AHCI_PWR, GPIO_PIN_OUTPUT);
-	GPIO_PIN_SET(gpio, GPIO_AHCI_PWR, GPIO_PIN_HIGH);
-	DELAY(10000);
-
 	/* Reset controller */
 	if ((error = ahci_a10_ctlr_reset(dev)) != 0) {
 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid,

sys/arm/allwinner/a10_codec.c

@@ -0,0 +1,850 @@
+/*-
+ * Copyright (c) 2014-2016 Jared D. McNeill <jmcneill@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Allwinner A10/A20 Audio Codec
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+#include <sys/condvar.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/gpio.h>
+
+#include <machine/bus.h>
+
+#include <dev/sound/pcm/sound.h>
+#include <dev/sound/chip.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <arm/allwinner/a10_clk.h>
+
+#include "sunxi_dma_if.h"
+#include "mixer_if.h"
+#include "gpio_if.h"
+
+#define	TX_TRIG_LEVEL	0xf
+#define	RX_TRIG_LEVEL	0x7
+#define	DRQ_CLR_CNT	0x3
+
+#define	AC_DAC_DPC	0x00
+#define	 DAC_DPC_EN_DA			0x80000000
+#define	AC_DAC_FIFOC	0x04
+#define	 DAC_FIFOC_FS_SHIFT		29
+#define	 DAC_FIFOC_FS_MASK		(7U << DAC_FIFOC_FS_SHIFT)
+#define	  DAC_FS_48KHZ			0
+#define	  DAC_FS_32KHZ			1
+#define	  DAC_FS_24KHZ			2
+#define	  DAC_FS_16KHZ			3
+#define	  DAC_FS_12KHZ			4
+#define	  DAC_FS_8KHZ			5
+#define	  DAC_FS_192KHZ			6
+#define	  DAC_FS_96KHZ			7
+#define	 DAC_FIFOC_FIFO_MODE_SHIFT	24
+#define	 DAC_FIFOC_FIFO_MODE_MASK	(3U << DAC_FIFOC_FIFO_MODE_SHIFT)
+#define	  FIFO_MODE_24_31_8		0
+#define	  FIFO_MODE_16_31_16		0
+#define	  FIFO_MODE_16_15_0		1
+#define	 DAC_FIFOC_DRQ_CLR_CNT_SHIFT	21
+#define	 DAC_FIFOC_DRQ_CLR_CNT_MASK	(3U << DAC_FIFOC_DRQ_CLR_CNT_SHIFT)
+#define	 DAC_FIFOC_TX_TRIG_LEVEL_SHIFT	8
+#define	 DAC_FIFOC_TX_TRIG_LEVEL_MASK	(0x7f << DAC_FIFOC_TX_TRIG_LEVEL_SHIFT)
+#define	 DAC_FIFOC_MONO_EN		(1U << 6)
+#define	 DAC_FIFOC_TX_BITS		(1U << 5)
+#define	 DAC_FIFOC_DRQ_EN		(1U << 4)
+#define	 DAC_FIFOC_FIFO_FLUSH		(1U << 0)
+#define	AC_DAC_FIFOS	0x08
+#define	AC_DAC_TXDATA	0x0c
+#define	AC_DAC_ACTL	0x10
+#define	 DAC_ACTL_DACAREN		(1U << 31)
+#define	 DAC_ACTL_DACALEN		(1U << 30)
+#define	 DAC_ACTL_MIXEN			(1U << 29)
+#define	 DAC_ACTL_DACPAS		(1U << 8)
+#define	 DAC_ACTL_PAMUTE		(1U << 6)
+#define	 DAC_ACTL_PAVOL_SHIFT		0
+#define	 DAC_ACTL_PAVOL_MASK		(0x3f << DAC_ACTL_PAVOL_SHIFT)
+#define	AC_ADC_FIFOC	0x1c
+#define	 ADC_FIFOC_FS_SHIFT		29
+#define	 ADC_FIFOC_FS_MASK		(7U << ADC_FIFOC_FS_SHIFT)
+#define	  ADC_FS_48KHZ		0
+#define	 ADC_FIFOC_EN_AD		(1U << 28)
+#define	 ADC_FIFOC_RX_FIFO_MODE		(1U << 24)
+#define	 ADC_FIFOC_RX_TRIG_LEVEL_SHIFT	8
+#define	 ADC_FIFOC_RX_TRIG_LEVEL_MASK	(0x1f << ADC_FIFOC_RX_TRIG_LEVEL_SHIFT)
+#define	 ADC_FIFOC_MONO_EN		(1U << 7)
+#define	 ADC_FIFOC_RX_BITS		(1U << 6)
+#define	 ADC_FIFOC_DRQ_EN		(1U << 4)
+#define	 ADC_FIFOC_FIFO_FLUSH		(1U << 1)
+#define	AC_ADC_FIFOS	0x20
+#define	AC_ADC_RXDATA	0x24
+#define	AC_ADC_ACTL	0x28
+#define	 ADC_ACTL_ADCREN		(1U << 31)
+#define	 ADC_ACTL_ADCLEN		(1U << 30)
+#define	 ADC_ACTL_PREG1EN		(1U << 29)
+#define	 ADC_ACTL_PREG2EN		(1U << 28)
+#define	 ADC_ACTL_VMICEN		(1U << 27)
+#define	 ADC_ACTL_ADCG_SHIFT		20
+#define	 ADC_ACTL_ADCG_MASK		(7U << ADC_ACTL_ADCG_SHIFT)
+#define	 ADC_ACTL_ADCIS_SHIFT		17
+#define	 ADC_ACTL_ADCIS_MASK		(7U << ADC_ACTL_ADCIS_SHIFT)
+#define	  ADC_IS_LINEIN			0
+#define	  ADC_IS_FMIN			1
+#define	  ADC_IS_MIC1			2
+#define	  ADC_IS_MIC2			3
+#define	  ADC_IS_MIC1_L_MIC2_R		4
+#define	  ADC_IS_MIC1_LR_MIC2_LR	5
+#define	  ADC_IS_OMIX			6
+#define	  ADC_IS_LINEIN_L_MIC1_R	7
+#define	 ADC_ACTL_LNRDF			(1U << 16)
+#define	 ADC_ACTL_LNPREG_SHIFT		13
+#define	 ADC_ACTL_LNPREG_MASK		(7U << ADC_ACTL_LNPREG_SHIFT)
+#define	 ADC_ACTL_PA_EN			(1U << 4)
+#define	 ADC_ACTL_DDE			(1U << 3)
+#define	AC_DAC_CNT	0x30
+#define	AC_ADC_CNT	0x34
+
+static uint32_t a10codec_fmt[] = {
+	SND_FORMAT(AFMT_S16_LE, 1, 0),
+	SND_FORMAT(AFMT_S16_LE, 2, 0),
+	0
+};
+
+static struct pcmchan_caps a10codec_pcaps = { 8000, 192000, a10codec_fmt, 0 };
+static struct pcmchan_caps a10codec_rcaps = { 8000, 48000, a10codec_fmt, 0 };
+
+struct a10codec_info;
+
+struct a10codec_chinfo {
+	struct snd_dbuf		*buffer;
+	struct pcm_channel	*channel;	
+	struct a10codec_info	*parent;
+	bus_dmamap_t		dmamap;
+	void			*dmaaddr;
+	bus_addr_t		physaddr;
+	bus_size_t		fifo;
+	device_t		dmac;
+	void			*dmachan;
+
+	int			dir;
+	int			run;
+	uint32_t		pos;
+	uint32_t		format;
+	uint32_t		blocksize;
+	uint32_t		speed;
+};
+
+struct a10codec_info {
+	device_t		dev;
+	struct resource		*res[2];
+	struct mtx		*lock;
+	bus_dma_tag_t		dmat;
+	unsigned		dmasize;
+	void			*ih;
+
+	unsigned		drqtype_codec;
+	unsigned		drqtype_sdram;
+
+	struct a10codec_chinfo	play;
+	struct a10codec_chinfo	rec;
+};
+
+static struct resource_spec a10codec_spec[] = {
+	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
+	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
+	{ -1, 0 }
+};
+
+#define	CODEC_READ(sc, reg)		bus_read_4((sc)->res[0], (reg))
+#define	CODEC_WRITE(sc, reg, val)	bus_write_4((sc)->res[0], (reg), (val))
+
+/*
+ * Mixer interface
+ */
+
+static int
+a10codec_mixer_init(struct snd_mixer *m)
+{
+	struct a10codec_info *sc = mix_getdevinfo(m);
+	pcell_t prop[4];
+	phandle_t node;
+	device_t gpio;
+	uint32_t val;
+	ssize_t len;
+	int pin;
+
+	mix_setdevs(m, SOUND_MASK_VOLUME | SOUND_MASK_LINE | SOUND_MASK_RECLEV);
+	mix_setrecdevs(m, SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC);
+
+	/* Unmute input source to PA */
+	val = CODEC_READ(sc, AC_DAC_ACTL);
+	val |= DAC_ACTL_PAMUTE;
+	CODEC_WRITE(sc, AC_DAC_ACTL, val);
+
+	/* Enable PA */
+	val = CODEC_READ(sc, AC_ADC_ACTL);
+	val |= ADC_ACTL_PA_EN;
+	CODEC_WRITE(sc, AC_ADC_ACTL, val);
+
+	/* Unmute PA */
+	node = ofw_bus_get_node(sc->dev);
+	len = OF_getencprop(node, "allwinner,pa-gpios", prop, sizeof(prop));
+	if (len > 0 && (len / sizeof(prop[0])) == 4) {
+		gpio = OF_device_from_xref(prop[0]);
+		if (gpio != NULL) {
+			pin = prop[1] * 32 + prop[2];
+			GPIO_PIN_SETFLAGS(gpio, pin, GPIO_PIN_OUTPUT);
+			GPIO_PIN_SET(gpio, pin, GPIO_PIN_LOW);
+		}
+	}
+
+	return (0);
+}
+
+static const struct a10codec_mixer {
+	unsigned reg;
+	unsigned mask;
+	unsigned shift;
+} a10codec_mixers[SOUND_MIXER_NRDEVICES] = {
+	[SOUND_MIXER_VOLUME]	= { AC_DAC_ACTL, DAC_ACTL_PAVOL_MASK,
+				    DAC_ACTL_PAVOL_SHIFT },
+	[SOUND_MIXER_LINE]	= { AC_ADC_ACTL, ADC_ACTL_LNPREG_MASK,
+				    ADC_ACTL_LNPREG_SHIFT },
+	[SOUND_MIXER_RECLEV]	= { AC_ADC_ACTL, ADC_ACTL_ADCG_MASK,
+				    ADC_ACTL_ADCG_SHIFT },
+}; 
+
+static int
+a10codec_mixer_set(struct snd_mixer *m, unsigned dev, unsigned left,
+    unsigned right)
+{
+	struct a10codec_info *sc = mix_getdevinfo(m);
+	uint32_t val;
+	unsigned nvol, max;
+
+	max = a10codec_mixers[dev].mask >> a10codec_mixers[dev].shift;
+	nvol = (left * max) / 100;
+
+	val = CODEC_READ(sc, a10codec_mixers[dev].reg);
+	val &= ~a10codec_mixers[dev].mask;
+	val |= (nvol << a10codec_mixers[dev].shift);
+	CODEC_WRITE(sc, a10codec_mixers[dev].reg, val);
+
+	left = right = (left * 100) / max;
+	return (left | (right << 8));
+}
+
+static uint32_t
+a10codec_mixer_setrecsrc(struct snd_mixer *m, uint32_t src)
+{
+	struct a10codec_info *sc = mix_getdevinfo(m);
+	uint32_t val;
+
+	val = CODEC_READ(sc, AC_ADC_ACTL);
+
+	switch (src) {
+	case SOUND_MASK_LINE:	/* line-in */
+		val &= ~ADC_ACTL_ADCIS_MASK;
+		val |= (ADC_IS_LINEIN << ADC_ACTL_ADCIS_SHIFT);
+		break;
+	case SOUND_MASK_MIC:	/* MIC1 */
+		val &= ~ADC_ACTL_ADCIS_MASK;
+		val |= (ADC_IS_MIC1 << ADC_ACTL_ADCIS_SHIFT);
+		break;
+	case SOUND_MASK_LINE1:	/* MIC2 */
+		val &= ~ADC_ACTL_ADCIS_MASK;
+		val |= (ADC_IS_MIC2 << ADC_ACTL_ADCIS_SHIFT);
+		break;
+	default:
+		break;
+	}
+
+	CODEC_WRITE(sc, AC_ADC_ACTL, val);
+
+	switch ((val & ADC_ACTL_ADCIS_MASK) >> ADC_ACTL_ADCIS_SHIFT) {
+	case ADC_IS_LINEIN:
+		return (SOUND_MASK_LINE);
+	case ADC_IS_MIC1:
+		return (SOUND_MASK_MIC);
+	case ADC_IS_MIC2:
+		return (SOUND_MASK_LINE1);
+	default:
+		return (0);
+	}
+}
+
+static kobj_method_t a10codec_mixer_methods[] = {
+	KOBJMETHOD(mixer_init,		a10codec_mixer_init),
+	KOBJMETHOD(mixer_set,		a10codec_mixer_set),
+	KOBJMETHOD(mixer_setrecsrc,	a10codec_mixer_setrecsrc),
+	KOBJMETHOD_END
+};
+MIXER_DECLARE(a10codec_mixer);
+
+
+/*
+ * Channel interface
+ */
+
+static void
+a10codec_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
+{
+	struct a10codec_chinfo *ch = arg;
+
+	if (error != 0)
+		return;
+
+	ch->physaddr = segs[0].ds_addr;
+}
+
+static void
+a10codec_transfer(struct a10codec_chinfo *ch)
+{
+	bus_addr_t src, dst;
+	int error;
+
+	if (ch->dir == PCMDIR_PLAY) {
+		src = ch->physaddr + ch->pos;
+		dst = ch->fifo;
+	} else {
+		src = ch->fifo;
+		dst = ch->physaddr + ch->pos;
+	}
+
+	error = SUNXI_DMA_TRANSFER(ch->dmac, ch->dmachan, src, dst,
+	    ch->blocksize);
+	if (error) {
+		ch->run = 0;
+		device_printf(ch->parent->dev, "DMA transfer failed: %d\n",
+		    error);
+	}
+}
+
+static void
+a10codec_dmaconfig(struct a10codec_chinfo *ch)
+{
+	struct a10codec_info *sc = ch->parent;
+	struct sunxi_dma_config conf;
+
+	memset(&conf, 0, sizeof(conf));
+	conf.src_width = conf.dst_width = 16;
+	conf.src_burst_len = conf.dst_burst_len = 4;
+
+	if (ch->dir == PCMDIR_PLAY) {
+		conf.dst_noincr = true;
+		conf.src_drqtype = sc->drqtype_sdram;
+		conf.dst_drqtype = sc->drqtype_codec;
+	} else {
+		conf.src_noincr = true;
+		conf.src_drqtype = sc->drqtype_codec;
+		conf.dst_drqtype = sc->drqtype_sdram;
+	}
+
+	SUNXI_DMA_SET_CONFIG(ch->dmac, ch->dmachan, &conf);
+}
+
+static void
+a10codec_dmaintr(void *priv)
+{
+	struct a10codec_chinfo *ch = priv;
+	unsigned bufsize;
+
+	bufsize = sndbuf_getsize(ch->buffer);
+
+	ch->pos += ch->blocksize;
+	if (ch->pos >= bufsize)
+		ch->pos -= bufsize;
+
+	if (ch->run) {
+		chn_intr(ch->channel);
+		a10codec_transfer(ch);
+	}
+}
+
+static unsigned
+a10codec_fs(struct a10codec_chinfo *ch)
+{
+	switch (ch->speed) {
+	case 48000:
+		return (DAC_FS_48KHZ);
+	case 24000:
+		return (DAC_FS_24KHZ);
+	case 12000:
+		return (DAC_FS_12KHZ);
+	case 192000:
+		return (DAC_FS_192KHZ);
+	case 32000:
+		return (DAC_FS_32KHZ);
+	case 16000:
+		return (DAC_FS_16KHZ);
+	case 8000:
+		return (DAC_FS_8KHZ);
+	case 96000:
+		return (DAC_FS_96KHZ);
+	default:
+		return (DAC_FS_48KHZ);
+	}
+}
+
+static void
+a10codec_start(struct a10codec_chinfo *ch)
+{
+	struct a10codec_info *sc = ch->parent;
+	uint32_t val;
+
+	ch->pos = 0;
+
+	if (ch->dir == PCMDIR_PLAY) {
+		/* Flush DAC FIFO */
+		CODEC_WRITE(sc, AC_DAC_FIFOC, DAC_FIFOC_FIFO_FLUSH);
+
+		/* Clear DAC FIFO status */
+		CODEC_WRITE(sc, AC_DAC_FIFOS, CODEC_READ(sc, AC_DAC_FIFOS));
+
+		/* Enable DAC analog left/right channels and output mixer */
+		val = CODEC_READ(sc, AC_DAC_ACTL);
+		val |= DAC_ACTL_DACAREN;
+		val |= DAC_ACTL_DACALEN;
+		val |= DAC_ACTL_DACPAS;
+		CODEC_WRITE(sc, AC_DAC_ACTL, val);
+
+		/* Configure DAC DMA channel */
+		a10codec_dmaconfig(ch);
+
+		/* Configure DAC FIFO */
+		CODEC_WRITE(sc, AC_DAC_FIFOC,
+		    (AFMT_CHANNEL(ch->format) == 1 ? DAC_FIFOC_MONO_EN : 0) |
+		    (a10codec_fs(ch) << DAC_FIFOC_FS_SHIFT) |
+		    (FIFO_MODE_16_15_0 << DAC_FIFOC_FIFO_MODE_SHIFT) |
+		    (DRQ_CLR_CNT << DAC_FIFOC_DRQ_CLR_CNT_SHIFT) |
+		    (TX_TRIG_LEVEL << DAC_FIFOC_TX_TRIG_LEVEL_SHIFT));
+
+		/* Enable DAC DRQ */
+		val = CODEC_READ(sc, AC_DAC_FIFOC);
+		val |= DAC_FIFOC_DRQ_EN;
+		CODEC_WRITE(sc, AC_DAC_FIFOC, val);
+	} else {
+		/* Flush ADC FIFO */
+		CODEC_WRITE(sc, AC_ADC_FIFOC, ADC_FIFOC_FIFO_FLUSH);
+
+		/* Clear ADC FIFO status */
+		CODEC_WRITE(sc, AC_ADC_FIFOS, CODEC_READ(sc, AC_ADC_FIFOS));
+
+		/* Enable ADC analog left/right channels, MIC1 preamp,
+		 * and VMIC pin voltage
+		 */
+		val = CODEC_READ(sc, AC_ADC_ACTL);
+		val |= ADC_ACTL_ADCREN;
+		val |= ADC_ACTL_ADCLEN;
+		val |= ADC_ACTL_PREG1EN;
+		val |= ADC_ACTL_VMICEN;
+		CODEC_WRITE(sc, AC_ADC_ACTL, val);
+
+		/* Configure ADC DMA channel */
+		a10codec_dmaconfig(ch);
+
+		/* Configure ADC FIFO */
+		CODEC_WRITE(sc, AC_ADC_FIFOC,
+		    ADC_FIFOC_EN_AD |
+		    ADC_FIFOC_RX_FIFO_MODE |
+		    (AFMT_CHANNEL(ch->format) == 1 ? ADC_FIFOC_MONO_EN : 0) |
+		    (a10codec_fs(ch) << ADC_FIFOC_FS_SHIFT) |
+		    (RX_TRIG_LEVEL << ADC_FIFOC_RX_TRIG_LEVEL_SHIFT));
+
+		/* Enable ADC DRQ */
+		val = CODEC_READ(sc, AC_ADC_FIFOC);
+		val |= ADC_FIFOC_DRQ_EN;
+		CODEC_WRITE(sc, AC_ADC_FIFOC, val);
+	}
+
+	/* Start DMA transfer */
+	a10codec_transfer(ch);
+}
+
+static void
+a10codec_stop(struct a10codec_chinfo *ch)
+{
+	struct a10codec_info *sc = ch->parent;
+	uint32_t val;
+
+	/* Disable DMA channel */
+	SUNXI_DMA_HALT(ch->dmac, ch->dmachan);
+
+	if (ch->dir == PCMDIR_PLAY) {
+		/* Disable DAC analog left/right channels and output mixer */
+		val = CODEC_READ(sc, AC_DAC_ACTL);
+		val &= ~DAC_ACTL_DACAREN;
+		val &= ~DAC_ACTL_DACALEN;
+		val &= ~DAC_ACTL_DACPAS;
+		CODEC_WRITE(sc, AC_DAC_ACTL, val);
+
+		/* Disable DAC DRQ */
+		CODEC_WRITE(sc, AC_DAC_FIFOC, 0);
+	} else {
+		/* Disable ADC analog left/right channels, MIC1 preamp,
+		 * and VMIC pin voltage
+		 */
+		val = CODEC_READ(sc, AC_ADC_ACTL);
+		val &= ~ADC_ACTL_ADCREN;
+		val &= ~ADC_ACTL_ADCLEN;
+		val &= ~ADC_ACTL_PREG1EN;
+		val &= ~ADC_ACTL_VMICEN;
+		CODEC_WRITE(sc, AC_ADC_ACTL, val);
+
+		/* Disable ADC DRQ */
+		CODEC_WRITE(sc, AC_ADC_FIFOC, 0);
+	}
+}
+
+static void *
+a10codec_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
+    struct pcm_channel *c, int dir)
+{
+	struct a10codec_info *sc = devinfo;
+	struct a10codec_chinfo *ch = dir == PCMDIR_PLAY ? &sc->play : &sc->rec;
+	int error;
+
+	ch->parent = sc;
+	ch->channel = c;
+	ch->buffer = b;
+	ch->dir = dir;
+	ch->fifo = rman_get_start(sc->res[0]) +
+	    (dir == PCMDIR_REC ? AC_ADC_RXDATA : AC_DAC_TXDATA);
+
+	ch->dmac = devclass_get_device(devclass_find("a10dmac"), 0);
+	if (ch->dmac == NULL) {
+		device_printf(sc->dev, "cannot find DMA controller\n");
+		return (NULL);
+	}
+	ch->dmachan = SUNXI_DMA_ALLOC(ch->dmac, false, a10codec_dmaintr, ch);
+	if (ch->dmachan == NULL) {
+		device_printf(sc->dev, "cannot allocate DMA channel\n");
+		return (NULL);
+	}
+
+	error = bus_dmamem_alloc(sc->dmat, &ch->dmaaddr,
+	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &ch->dmamap);
+	if (error != 0) {
+		device_printf(sc->dev, "cannot allocate channel buffer\n");
+		return (NULL);
+	}
+	error = bus_dmamap_load(sc->dmat, ch->dmamap, ch->dmaaddr,
+	    sc->dmasize, a10codec_dmamap_cb, ch, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		device_printf(sc->dev, "cannot load DMA map\n");
+		return (NULL);
+	}
+	memset(ch->dmaaddr, 0, sc->dmasize);
+
+	if (sndbuf_setup(ch->buffer, ch->dmaaddr, sc->dmasize) != 0) {
+		device_printf(sc->dev, "cannot setup sndbuf\n");
+		return (NULL);
+	}
+
+	return (ch);
+}
+
+static int
+a10codec_chan_free(kobj_t obj, void *data)
+{
+	struct a10codec_chinfo *ch = data;
+	struct a10codec_info *sc = ch->parent;
+
+	SUNXI_DMA_FREE(ch->dmac, ch->dmachan);
+	bus_dmamap_unload(sc->dmat, ch->dmamap);
+	bus_dmamem_free(sc->dmat, ch->dmaaddr, ch->dmamap);
+
+	return (0);
+}
+
+static int
+a10codec_chan_setformat(kobj_t obj, void *data, uint32_t format)
+{
+	struct a10codec_chinfo *ch = data;
+
+	ch->format = format;
+
+	return (0);
+}
+
+static uint32_t
+a10codec_chan_setspeed(kobj_t obj, void *data, uint32_t speed)
+{
+	struct a10codec_chinfo *ch = data;
+
+	/*
+	 * The codec supports full duplex operation but both DAC and ADC
+	 * use the same source clock (PLL2). Limit the available speeds to
+	 * those supported by a 24576000 Hz input.
+	 */
+	switch (speed) {
+	case 8000:
+	case 12000:
+	case 16000:
+	case 24000:
+	case 32000:
+	case 48000:
+		ch->speed = speed;
+		break;
+	case 96000:
+	case 192000:
+		/* 96 KHz / 192 KHz mode only supported for playback */
+		if (ch->dir == PCMDIR_PLAY) {
+			ch->speed = speed;
+		} else {
+			ch->speed = 48000;
+		}
+		break;
+	case 44100:
+		ch->speed = 48000;
+		break;
+	case 22050:
+		ch->speed = 24000;
+		break;
+	case 11025:
+		ch->speed = 12000;
+		break;
+	default:
+		ch->speed = 48000;
+		break;
+	}
+
+	return (ch->speed);
+}
+
+static uint32_t
+a10codec_chan_setblocksize(kobj_t obj, void *data, uint32_t blocksize)
+{
+	struct a10codec_chinfo *ch = data;
+
+	ch->blocksize = blocksize & ~3;
+
+	return (ch->blocksize);
+}
+
+static int
+a10codec_chan_trigger(kobj_t obj, void *data, int go)
+{
+	struct a10codec_chinfo *ch = data;
+	struct a10codec_info *sc = ch->parent;
+
+	if (!PCMTRIG_COMMON(go))
+		return (0);
+
+	snd_mtxlock(sc->lock);
+	switch (go) {
+	case PCMTRIG_START:
+		ch->run = 1;
+		a10codec_start(ch);
+		break;
+	case PCMTRIG_STOP:
+	case PCMTRIG_ABORT:
+		ch->run = 0;
+		a10codec_stop(ch);
+		break;
+	default:
+		break;
+	}
+	snd_mtxunlock(sc->lock);
+
+	return (0);
+}
+
+static uint32_t
+a10codec_chan_getptr(kobj_t obj, void *data)
+{
+	struct a10codec_chinfo *ch = data;
+
+	return (ch->pos);
+}
+
+static struct pcmchan_caps *
+a10codec_chan_getcaps(kobj_t obj, void *data)
+{
+	struct a10codec_chinfo *ch = data;
+
+	if (ch->dir == PCMDIR_PLAY) {
+		return (&a10codec_pcaps);
+	} else {
+		return (&a10codec_rcaps);
+	}
+}
+
+static kobj_method_t a10codec_chan_methods[] = {
+	KOBJMETHOD(channel_init,		a10codec_chan_init),
+	KOBJMETHOD(channel_free,		a10codec_chan_free),
+	KOBJMETHOD(channel_setformat,		a10codec_chan_setformat),
+	KOBJMETHOD(channel_setspeed,		a10codec_chan_setspeed),
+	KOBJMETHOD(channel_setblocksize,	a10codec_chan_setblocksize),
+	KOBJMETHOD(channel_trigger,		a10codec_chan_trigger),
+	KOBJMETHOD(channel_getptr,		a10codec_chan_getptr),
+	KOBJMETHOD(channel_getcaps,		a10codec_chan_getcaps),
+	KOBJMETHOD_END
+};
+CHANNEL_DECLARE(a10codec_chan);
+
+
+/*
+ * Device interface
+ */
+
+static int
+a10codec_probe(device_t dev)
+{
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (!ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-codec"))
+		return (ENXIO);
+
+	device_set_desc(dev, "Allwinner Audio Codec");
+	return (BUS_PROBE_DEFAULT);
+}
+
+static int
+a10codec_attach(device_t dev)
+{
+	struct a10codec_info *sc;
+	char status[SND_STATUSLEN];
+	uint32_t val;
+	int error;
+
+	sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
+	sc->dev = dev;
+	sc->lock = snd_mtxcreate(device_get_nameunit(dev), "a10codec softc");
+
+	if (bus_alloc_resources(dev, a10codec_spec, sc->res)) {
+		device_printf(dev, "cannot allocate resources for device\n");
+		error = ENXIO;
+		goto fail;
+	}
+
+	/* XXX DRQ types should come from FDT, but how? */
+	if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-codec") ||
+	    ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-codec")) {
+		sc->drqtype_codec = 19;
+		sc->drqtype_sdram = 22;
+	} else {
+		device_printf(dev, "DRQ types not known for this SoC\n");
+		error = ENXIO;
+		goto fail;
+	}
+
+	sc->dmasize = 131072;
+	error = bus_dma_tag_create(
+	    bus_get_dma_tag(dev),
+	    4, sc->dmasize,		/* alignment, boundary */
+	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
+	    BUS_SPACE_MAXADDR,		/* highaddr */
+	    NULL, NULL,			/* filter, filterarg */
+	    sc->dmasize, 1,		/* maxsize, nsegs */
+	    sc->dmasize, 0,		/* maxsegsize, flags */
+	    NULL, NULL,			/* lockfunc, lockarg */
+	    &sc->dmat);
+	if (error != 0) {
+		device_printf(dev, "cannot create DMA tag\n");
+		goto fail;
+	}
+
+	/* Activate audio codec clock. According to the A10 and A20 user
+	 * manuals, Audio_pll can be either 24.576MHz or 22.5792MHz. Most
+	 * audio sampling rates require an 24.576MHz input clock with the
+	 * exception of 44.1kHz, 22.05kHz, and 11.025kHz. Unfortunately,
+	 * both capture and playback use the same clock source so to
+	 * safely support independent full duplex operation, we use a fixed
+	 * 24.576MHz clock source and don't advertise native support for
+	 * the three sampling rates that require a 22.5792MHz input.
+	 */
+	a10_clk_codec_activate(24576000);
+
+	/* Enable DAC */
+	val = CODEC_READ(sc, AC_DAC_DPC);
+	val |= DAC_DPC_EN_DA;
+	CODEC_WRITE(sc, AC_DAC_DPC, val);
+
+#ifdef notdef
+	error = snd_setup_intr(dev, sc->irq, INTR_MPSAFE, a10codec_intr, sc,
+	    &sc->ih);
+	if (error != 0) {
+		device_printf(dev, "could not setup interrupt handler\n");
+		goto fail;
+	}
+#endif
+
+	if (mixer_init(dev, &a10codec_mixer_class, sc)) {
+		device_printf(dev, "mixer_init failed\n");
+		goto fail;
+	}
+
+	pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
+
+	if (pcm_register(dev, sc, 1, 1)) {
+		device_printf(dev, "pcm_register failed\n");
+		goto fail;
+	}
+
+	pcm_addchan(dev, PCMDIR_PLAY, &a10codec_chan_class, sc);
+	pcm_addchan(dev, PCMDIR_REC, &a10codec_chan_class, sc);
+
+	snprintf(status, SND_STATUSLEN, "at %s", ofw_bus_get_name(dev));
+	pcm_setstatus(dev, status);
+
+	return (0);
+
+fail:
+	bus_release_resources(dev, a10codec_spec, sc->res);
+	snd_mtxfree(sc->lock);
+	free(sc, M_DEVBUF);
+
+	return (error);
+}
+
+static device_method_t a10codec_pcm_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		a10codec_probe),
+	DEVMETHOD(device_attach,	a10codec_attach),
+
+	DEVMETHOD_END
+};
+
+static driver_t a10codec_pcm_driver = {
+	"pcm",
+	a10codec_pcm_methods,
+	PCM_SOFTC_SIZE,
+};
+
+DRIVER_MODULE(a10codec, simplebus, a10codec_pcm_driver, pcm_devclass, 0, 0);
+MODULE_DEPEND(a10codec, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
+MODULE_VERSION(a10codec, 1);

sys/arm/allwinner/a10_gpio.c

@@ -47,12 +47,15 @@ __FBSDID("$FreeBSD$");
 #include <machine/intr.h>
 
 #include <dev/fdt/fdt_common.h>
+#include <dev/fdt/fdt_pinctrl.h>
 #include <dev/gpio/gpiobusvar.h>
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
 
+#include <arm/allwinner/allwinner_machdep.h>
+#include <arm/allwinner/allwinner_pinctrl.h>
+
 #include "gpio_if.h"
-#include "a10_gpio.h"
 
 /*
  * A10 have 9 banks of gpio.
@@ -62,7 +65,6 @@ __FBSDID("$FreeBSD$");
  * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
  */
 
-#define	A10_GPIO_PINS		288
 #define	A10_GPIO_DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |	\
     GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
 
@@ -73,6 +75,9 @@ __FBSDID("$FreeBSD$");
 #define A10_GPIO_INPUT		0
 #define A10_GPIO_OUTPUT		1
 
+#define AW_GPIO_DRV_MASK	0x3
+#define AW_GPIO_PUD_MASK	0x3
+
 static struct ofw_compat_data compat_data[] = {
 	{"allwinner,sun4i-a10-pinctrl", 1},
 	{"allwinner,sun7i-a20-pinctrl", 1},
@@ -88,8 +93,19 @@ struct a10_gpio_softc {
 	bus_space_tag_t		sc_bst;
 	bus_space_handle_t	sc_bsh;
 	void *			sc_intrhand;
+	const struct allwinner_padconf *	padconf;
 };
 
+/* Defined in a10_padconf.c */
+#ifdef SOC_ALLWINNER_A10
+extern const struct allwinner_padconf a10_padconf;
+#endif
+
+/* Defined in a20_padconf.c */
+#ifdef SOC_ALLWINNER_A20
+extern const struct allwinner_padconf a20_padconf;
+#endif
+
 #define	A10_GPIO_LOCK(_sc)		mtx_lock_spin(&(_sc)->sc_mtx)
 #define	A10_GPIO_UNLOCK(_sc)		mtx_unlock_spin(&(_sc)->sc_mtx)
 #define	A10_GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
@@ -123,8 +139,10 @@ a10_gpio_get_function(struct a10_gpio_softc *sc, uint32_t pin)
 	/* Must be called with lock held. */
 	A10_GPIO_LOCK_ASSERT(sc);
 
-	bank = pin / 32;
+	if (pin > sc->padconf->npins)
-	pin = pin % 32;
+		return (0);
+	bank = sc->padconf->pins[pin].port;
+	pin = sc->padconf->pins[pin].pin;
 	offset = ((pin & 0x07) << 2);
 
 	func = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, pin >> 3));
@@ -146,8 +164,8 @@ a10_gpio_set_function(struct a10_gpio_softc *sc, uint32_t pin, uint32_t f)
 	/* Must be called with lock held. */
 	A10_GPIO_LOCK_ASSERT(sc);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 	offset = ((pin & 0x07) << 2);
 
 	data = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, pin >> 3));
@@ -164,8 +182,8 @@ a10_gpio_get_pud(struct a10_gpio_softc *sc, uint32_t pin)
 	/* Must be called with lock held. */
 	A10_GPIO_LOCK_ASSERT(sc);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 	offset = ((pin & 0x0f) << 1);
 
 	val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pin >> 4));
@@ -187,16 +205,34 @@ a10_gpio_set_pud(struct a10_gpio_softc *sc, uint32_t pin, uint32_t state)
 	/* Must be called with lock held. */
 	A10_GPIO_LOCK_ASSERT(sc);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 	offset = ((pin & 0x0f) << 1);
 
 	val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pin >> 4));
-	val &= ~(0x03 << offset);
+	val &= ~(AW_GPIO_PUD_MASK << offset);
 	val |= (state << offset);
 	A10_GPIO_WRITE(sc, A10_GPIO_GP_PUL(bank, pin >> 4), val);
 }
 
+static void
+a10_gpio_set_drv(struct a10_gpio_softc *sc, uint32_t pin, uint32_t drive)
+{
+	uint32_t bank, offset, val;
+
+	/* Must be called with lock held. */
+	A10_GPIO_LOCK_ASSERT(sc);
+
+	bank = sc->padconf->pins[pin].port;
+	pin = sc->padconf->pins[pin].pin;
+	offset = ((pin & 0x0f) << 1);
+
+	val = A10_GPIO_READ(sc, A10_GPIO_GP_DRV(bank, pin >> 4));
+	val &= ~(AW_GPIO_DRV_MASK << offset);
+	val |= (drive << offset);
+	A10_GPIO_WRITE(sc, A10_GPIO_GP_DRV(bank, pin >> 4), val);
+}
+
 static void
 a10_gpio_pin_configure(struct a10_gpio_softc *sc, uint32_t pin, uint32_t flags)
 {
@@ -218,7 +254,7 @@ a10_gpio_pin_configure(struct a10_gpio_softc *sc, uint32_t pin, uint32_t flags)
 			a10_gpio_set_pud(sc, pin, A10_GPIO_PULLUP);
 		else
 			a10_gpio_set_pud(sc, pin, A10_GPIO_PULLDOWN);
-	} else 
+	} else
 		a10_gpio_set_pud(sc, pin, A10_GPIO_NONE);
 }
 
@@ -235,16 +271,21 @@ a10_gpio_get_bus(device_t dev)
 static int
 a10_gpio_pin_max(device_t dev, int *maxpin)
 {
+	struct a10_gpio_softc *sc;
 
-	*maxpin = A10_GPIO_PINS - 1;
+	sc = device_get_softc(dev);
+
+	*maxpin = sc->padconf->npins - 1;
 	return (0);
 }
 
 static int
 a10_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
 {
+	struct a10_gpio_softc *sc;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin >= sc->padconf->npins)
 		return (EINVAL);
 
 	*caps = A10_GPIO_DEFAULT_CAPS;
@@ -257,10 +298,10 @@ a10_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
 {
 	struct a10_gpio_softc *sc;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin >= sc->padconf->npins)
 		return (EINVAL);
 
-	sc = device_get_softc(dev);
 	A10_GPIO_LOCK(sc);
 	*flags = a10_gpio_get_function(sc, pin);
 	*flags |= a10_gpio_get_pud(sc, pin);
@@ -272,14 +313,14 @@ a10_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
 static int
 a10_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
 {
-	uint32_t bank;
+	struct a10_gpio_softc *sc;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin >= sc->padconf->npins)
 		return (EINVAL);
 
-	bank = pin / 32;
+	snprintf(name, GPIOMAXNAME - 1, "%s",
-	snprintf(name, GPIOMAXNAME - 1, "pin %d (P%c%d)",
+	    sc->padconf->pins[pin].name);
-	    pin, bank + 'A', pin % 32);
 	name[GPIOMAXNAME - 1] = '\0';
 
 	return (0);
@@ -290,10 +331,10 @@ a10_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
 {
 	struct a10_gpio_softc *sc;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin > sc->padconf->npins)
 		return (EINVAL);
 
-	sc = device_get_softc(dev);
 	A10_GPIO_LOCK(sc);
 	a10_gpio_pin_configure(sc, pin, flags);
 	A10_GPIO_UNLOCK(sc);
@@ -307,13 +348,13 @@ a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
 	struct a10_gpio_softc *sc;
 	uint32_t bank, data;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin > sc->padconf->npins)
 		return (EINVAL);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 
-	sc = device_get_softc(dev);
 	A10_GPIO_LOCK(sc);
 	data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
 	if (value)
@@ -332,13 +373,13 @@ a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
 	struct a10_gpio_softc *sc;
 	uint32_t bank, reg_data;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin > sc->padconf->npins)
 		return (EINVAL);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 
-	sc = device_get_softc(dev);
 	A10_GPIO_LOCK(sc);
 	reg_data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
 	A10_GPIO_UNLOCK(sc);
@@ -353,13 +394,13 @@ a10_gpio_pin_toggle(device_t dev, uint32_t pin)
 	struct a10_gpio_softc *sc;
 	uint32_t bank, data;
 
-	if (pin >= A10_GPIO_PINS)
+	sc = device_get_softc(dev);
+	if (pin > sc->padconf->npins)
 		return (EINVAL);
 
-	bank = pin / 32;
+	bank = sc->padconf->pins[pin].port;
-	pin = pin % 32;
+	pin = sc->padconf->pins[pin].pin;
 
-	sc = device_get_softc(dev);
 	A10_GPIO_LOCK(sc);
 	data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
 	if (data & (1 << pin))
@@ -372,6 +413,92 @@ a10_gpio_pin_toggle(device_t dev, uint32_t pin)
 	return (0);
 }
 
+static int
+aw_find_pinnum_by_name(struct a10_gpio_softc *sc, const char *pinname)
+{
+	int i;
+
+	for (i = 0; i < sc->padconf->npins; i++)
+		if (!strcmp(pinname, sc->padconf->pins[i].name))
+			return i;
+
+	return (-1);
+}
+
+static int
+aw_find_pin_func(struct a10_gpio_softc *sc, int pin, const char *func)
+{
+	int i;
+
+	for (i = 0; i < AW_MAX_FUNC_BY_PIN; i++)
+		if (sc->padconf->pins[pin].functions[i] &&
+		    !strcmp(func, sc->padconf->pins[pin].functions[i]))
+			return (i);
+
+	return (-1);
+}
+
+static int
+aw_fdt_configure_pins(device_t dev, phandle_t cfgxref)
+{
+	struct a10_gpio_softc *sc;
+	phandle_t node;
+	const char **pinlist = NULL;
+	char *pin_function = NULL;
+	uint32_t pin_drive, pin_pull;
+	int pins_nb, pin_num, pin_func, i, ret;
+
+	sc = device_get_softc(dev);
+	node = OF_node_from_xref(cfgxref);
+	ret = 0;
+
+	/* Getting all prop for configuring pins */
+	pins_nb = ofw_bus_string_list_to_array(node, "allwinner,pins", &pinlist);
+	if (pins_nb <= 0)
+		return (ENOENT);
+	if (OF_getprop_alloc(node, "allwinner,function",
+			     sizeof(*pin_function),
+			     (void **)&pin_function) == -1) {
+		ret = ENOENT;
+		goto out;
+	}
+	if (OF_getencprop(node, "allwinner,drive",
+			  &pin_drive, sizeof(pin_drive)) == -1) {
+		ret = ENOENT;
+		goto out;
+	}
+	if (OF_getencprop(node, "allwinner,pull",
+			  &pin_pull, sizeof(pin_pull)) == -1) {
+		ret = ENOENT;
+		goto out;
+	}
+
+	/* Configure each pin to the correct function, drive and pull */
+	for (i = 0; i < pins_nb; i++) {
+		pin_num = aw_find_pinnum_by_name(sc, pinlist[i]);
+		if (pin_num == -1) {
+			ret = ENOENT;
+			goto out;
+		}
+		pin_func = aw_find_pin_func(sc, pin_num, pin_function);
+		if (pin_func == -1) {
+			ret = ENOENT;
+			goto out;
+		}
+
+		A10_GPIO_LOCK(sc);
+		a10_gpio_set_function(sc, pin_num, pin_func);
+		a10_gpio_set_drv(sc, pin_num, pin_drive);
+		a10_gpio_set_pud(sc, pin_num, pin_pull);
+		A10_GPIO_UNLOCK(sc);
+	}
+
+ out:
+	free(pinlist, M_OFWPROP);
+	free(pin_function, M_OFWPROP);
+	return (ret);
+}
+
 static int
 a10_gpio_probe(device_t dev)
 {
@@ -382,7 +509,7 @@ a10_gpio_probe(device_t dev)
 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
 		return (ENXIO);
 
-	device_set_desc(dev, "Allwinner GPIO controller");
+	device_set_desc(dev, "Allwinner GPIO/Pinmux controller");
 	return (BUS_PROBE_DEFAULT);
 }
 
@@ -428,6 +555,29 @@ a10_gpio_attach(device_t dev)
 	if (sc->sc_busdev == NULL)
 		goto fail;
 
+
+	/* Use the right pin data for the current SoC */
+	switch (allwinner_soc_type()) {
+#ifdef SOC_ALLWINNER_A10
+	case ALLWINNERSOC_A10:
+		sc->padconf = &a10_padconf;
+		break;
+#endif
+#ifdef SOC_ALLWINNER_A20
+	case ALLWINNERSOC_A20:
+		sc->padconf = &a20_padconf;
+		break;
+#endif
+	default:
+		return (ENOENT);
+	}
+
+	/*
+	 * Register as a pinctrl device
+	 */
+	fdt_pinctrl_register(dev, "allwinner,pins");
+	fdt_pinctrl_configure_tree(dev);
+
 	return (0);
 
 fail:
@@ -459,9 +609,18 @@ static int
 a10_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
     pcell_t *gpios, uint32_t *pin, uint32_t *flags)
 {
+	struct a10_gpio_softc *sc;
+	int i;
+
+	sc = device_get_softc(bus);
 
 	/* The GPIO pins are mapped as: <gpio-phandle bank pin flags>. */
-	*pin = gpios[0] * 32 + gpios[1];
+	for (i = 0; i < sc->padconf->npins; i++)
+		if (sc->padconf->pins[i].port == gpios[0] &&
+		    sc->padconf->pins[i].pin == gpios[1]) {
+			*pin = i;
+			break;
+		}
 	*flags = gpios[gcells - 1];
 
 	return (0);
@@ -488,6 +647,9 @@ static device_method_t a10_gpio_methods[] = {
 	/* ofw_bus interface */
 	DEVMETHOD(ofw_bus_get_node,	a10_gpio_get_node),
 
+        /* fdt_pinctrl interface */
+	DEVMETHOD(fdt_pinctrl_configure,aw_fdt_configure_pins),
+
 	DEVMETHOD_END
 };
 
@@ -501,22 +663,3 @@ static driver_t a10_gpio_driver = {
 
 EARLY_DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0,
     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
-
-
-int
-a10_gpio_ethernet_activate(uint32_t func)
-{
-	int i;
-	struct a10_gpio_softc *sc = a10_gpio_sc;
-
-	if (sc == NULL)
-		return (ENXIO);
-
-	/* Configure pin mux settings for MII. */
-	A10_GPIO_LOCK(sc);
-	for (i = 0; i <= 17; i++)
-		a10_gpio_set_function(sc, i, func);
-	A10_GPIO_UNLOCK(sc);
-
-	return (0);
-}

sys/arm/allwinner/a10_padconf.c

@@ -0,0 +1,227 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@bidouilliste.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+const static struct allwinner_pins a10_pins[] = {
+	{"PA0",  0, 0,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
+	{"PA1",  0, 1,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
+	{"PA2",  0, 2,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
+	{"PA3",  0, 3,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
+	{"PA4",  0, 4,  {"gpio_in", "gpio_out", "emac", "spi1", NULL, NULL, NULL, NULL}},
+	{"PA5",  0, 5,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
+	{"PA6",  0, 6,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
+	{"PA7",  0, 7,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
+	{"PA8",  0, 8,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
+	{"PA9",  0, 9,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
+	{"PA10", 0, 10, {"gpio_in", "gpio_out", "emac", NULL, "uart1", NULL, NULL, NULL}},
+	{"PA11", 0, 11, {"gpio_in", "gpio_out", "emac", NULL, "uart1", NULL, NULL, NULL}},
+	{"PA12", 0, 12, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", NULL, NULL, NULL}},
+	{"PA13", 0, 13, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", NULL, NULL, NULL}},
+	{"PA14", 0, 14, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", NULL, NULL, NULL}},
+	{"PA15", 0, 15, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", NULL, NULL, NULL}},
+	{"PA16", 0, 16, {"gpio_in", "gpio_out", NULL, "can", "uart1", NULL, NULL, NULL}},
+	{"PA17", 0, 17, {"gpio_in", "gpio_out", NULL, "can", "uart1", NULL, NULL, NULL}},
+
+	{"PB0",  1, 0,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB1",  1, 1,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB2",  1, 2,  {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, NULL, NULL}},
+	{"PB3",  1, 3,  {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB4",  1, 4,  {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB5",  1, 5,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB6",  1, 6,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB7",  1, 7,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB8",  1, 8,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB9",  1, 9,  {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
+	{"PB10", 1, 10, {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
+	{"PB11", 1, 11, {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
+	{"PB12", 1, 12, {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB13", 1, 13, {"gpio_in", "gpio_out", "spi2", NULL, NULL, NULL, NULL, NULL}},
+	{"PB14", 1, 14, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB15", 1, 15, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB16", 1, 16, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB17", 1, 17, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB19", 1, 19, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB20", 1, 20, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB21", 1, 21, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB22", 1, 22, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
+	{"PB23", 1, 23, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
+
+	{"PC0",  2,  0, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC1",  2,  1, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC2",  2,  2, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC3",  2,  3, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC4",  2,  4, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC5",  2,  5, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC6",  2,  6, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC7",  2,  7, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC8",  2,  8, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC9",  2,  9, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC10", 2, 10, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC11", 2, 11, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC12", 2, 12, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC13", 2, 13, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC14", 2, 14, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC15", 2, 15, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC16", 2, 16, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC17", 2, 17, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC18", 2, 18, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+	{"PC19", 2, 19, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
+	{"PC20", 2, 20, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
+	{"PC21", 2, 21, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
+	{"PC22", 2, 22, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
+	{"PC23", 2, 23, {"gpio_in", "gpio_out", "spi0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC24", 2, 24, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+
+	{"PD0",  3,  0, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD1",  3,  1, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD2",  3,  2, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD3",  3,  3, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD4",  3,  4, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD5",  3,  5, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD6",  3,  6, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD7",  3,  7, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD8",  3,  8, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD9",  3,  9, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD16", 3, 16, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD17", 3, 17, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
+	{"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", "csi1", NULL, NULL, NULL, NULL}},
+	{"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+
+	{"PE0",  4,  0, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE1",  4,  1, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE2",  4,  2, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE3",  4,  3, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE4",  4,  4, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE5",  4,  5, {"gpio_in", "gpio_out", "ts0", "csi0", "sim", NULL, NULL, NULL}},
+	{"PE6",  4,  6, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE7",  4,  7, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE8",  4,  8, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE9",  4,  9, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE10", 4, 10, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE11", 4, 11, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+
+	{"PF0",  5,  0, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF1",  5,  1, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF2",  5,  2, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}},
+	{"PF3",  5,  3, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF4",  5,  4, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF5",  5,  5, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+
+	{"PG0",  6,  0, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG1",  6,  1, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG2",  6,  2, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG3",  6,  3, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG4",  6,  4, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
+	{"PG5",  6,  5, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
+	{"PG6",  6,  6, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG7",  6,  7, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG8",  6,  8, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG9",  6,  9, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG10", 6, 10, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
+	{"PG11", 6, 11, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
+
+	{"PH0",  7,  0, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "eint", "csi1"}},
+	{"PH1",  7,  1, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "eint", "csi1"}},
+	{"PH2",  7,  2, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "eint", "csi1"}},
+	{"PH3",  7,  3, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "eint", "csi1"}},
+	{"PH4",  7,  4, {"gpio_in", "gpio_out", "lcd1", "pata", "uart4", NULL, "eint", "csi1"}},
+	{"PH5",  7,  5, {"gpio_in", "gpio_out", "lcd1", "pata", "uart4", NULL, "eint", "csi1"}},
+	{"PH6",  7,  6, {"gpio_in", "gpio_out", "lcd1", "pata", "uart5", "ms", "eint", "csi1"}},
+	{"PH7",  7,  7, {"gpio_in", "gpio_out", "lcd1", "pata", "uart5", "ms", "eint", "csi1"}},
+	{"PH8",  7,  8, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "eint", "csi1"}},
+	{"PH9",  7,  9, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "eint", "csi1"}},
+	{"PH10", 7, 10, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "eint", "csi1"}},
+	{"PH11", 7, 11, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "eint", "csi1"}},
+	{"PH12", 7, 12, {"gpio_in", "gpio_out", "lcd1", "pata", "ps2", NULL, "eint", "csi1"}},
+	{"PH13", 7, 13, {"gpio_in", "gpio_out", "lcd1", "pata", "ps2", "sim", "eint", "csi1"}},
+	{"PH14", 7, 14, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "eint", "csi1"}},
+	{"PH15", 7, 15, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "eint", "csi1"}},
+	{"PH16", 7, 16, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", NULL, "eint", "csi1"}},
+	{"PH17", 7, 17, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "eint", "csi1"}},
+	{"PH18", 7, 18, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "eint", "csi1"}},
+	{"PH19", 7, 19, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "eint", "csi1"}},
+	{"PH20", 7, 20, {"gpio_in", "gpio_out", "lcd1", "pata", "can", NULL, "eint", "csi1"}},
+	{"PH21", 7, 21, {"gpio_in", "gpio_out", "lcd1", "pata", "can", NULL, "eint", "csi1"}},
+	{"PH22", 7, 22, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+	{"PH23", 7, 23, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+	{"PH24", 7, 24, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+	{"PH25", 7, 25, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+	{"PH26", 7, 26, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+	{"PH27", 7, 27, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
+
+	{"PI0",  8,  0, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+	{"PI1",  8,  1, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+	{"PI2",  8,  2, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+	{"PI3",  8,  3, {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, NULL, NULL}},
+	{"PI4",  8,  4, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI5",  8,  5, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI6",  8,  6, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI7",  8,  7, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI8",  8,  8, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI9",  8,  9, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI10", 8, 10, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "eint", NULL}},
+	{"PI11", 8, 11, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "eint", NULL}},
+	{"PI12", 8, 12, {"gpio_in", "gpio_out", "spi0", "uart6", NULL, NULL, "eint", NULL}},
+	{"PI13", 8, 13, {"gpio_in", "gpio_out", "spi0", "uart6", NULL, NULL, "eint", NULL}},
+	{"PI14", 8, 14, {"gpio_in", "gpio_out", "spi0", "ps2", "timer4", NULL, "eint", NULL}},
+	{"PI15", 8, 15, {"gpio_in", "gpio_out", "spi1", "ps2", "timer5", NULL, "eint", NULL}},
+	{"PI16", 8, 16, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI17", 8, 17, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI18", 8, 18, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI19", 8, 19, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI20", 8, 20, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
+	{"PI21", 8, 21, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
+};
+
+const struct allwinner_padconf a10_padconf = {
+	.npins = sizeof(a10_pins) / sizeof(struct allwinner_pins),
+	.pins = a10_pins,
+};

sys/arm/allwinner/a20/a20_if_dwc.c

@@ -41,7 +41,6 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/ofw_bus_subr.h>
 
 #include <arm/allwinner/a10_clk.h>
-#include <arm/allwinner/a10_gpio.h>
 
 #include "if_dwc_if.h"
 
@@ -63,8 +62,7 @@ a20_if_dwc_init(device_t dev)
 {
 
 	/* Activate GMAC clock and set the pin mux to rgmii. */
-	if (a10_clk_gmac_activate(ofw_bus_get_node(dev)) != 0 ||
+	if (a10_clk_gmac_activate(ofw_bus_get_node(dev)) != 0) {
-	    a10_gpio_ethernet_activate(A10_GPIO_FUNC_RGMII)) {
 		device_printf(dev, "could not activate gmac module\n");
 		return (ENXIO);
 	}

sys/arm/allwinner/a20/a20_padconf.c

@@ -0,0 +1,227 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@bidouilliste.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+const static struct allwinner_pins a20_pins[] = {
+	{"PA0",  0, 0,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", "gmac", NULL, NULL}},
+	{"PA1",  0, 1,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", "gmac", NULL, NULL}},
+	{"PA2",  0, 2,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", "gmac", NULL, NULL}},
+	{"PA3",  0, 3,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", "gmac", NULL, NULL}},
+	{"PA4",  0, 4,  {"gpio_in", "gpio_out", "emac", "spi1", NULL, "gmac", NULL, NULL}},
+	{"PA5",  0, 5,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, "gmac", NULL, NULL}},
+	{"PA6",  0, 6,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, "gmac", NULL, NULL}},
+	{"PA7",  0, 7,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, "gmac", NULL, NULL}},
+	{"PA8",  0, 8,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, "gmac", NULL, NULL}},
+	{"PA9",  0, 9,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, "gmac", "i2c1", NULL}},
+	{"PA10", 0, 10, {"gpio_in", "gpio_out", "emac", NULL, "uart1", "gmac", NULL, NULL}},
+	{"PA11", 0, 11, {"gpio_in", "gpio_out", "emac", NULL, "uart1", "gmac", NULL, NULL}},
+	{"PA12", 0, 12, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", "gmac", NULL, NULL}},
+	{"PA13", 0, 13, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", "gmac", NULL, NULL}},
+	{"PA14", 0, 14, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", "gmac", "i2c1", NULL}},
+	{"PA15", 0, 15, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", "gmac", "i2c1", NULL}},
+	{"PA16", 0, 16, {"gpio_in", "gpio_out", NULL, "can", "uart1", "gmac", "i2c1", NULL}},
+	{"PA17", 0, 17, {"gpio_in", "gpio_out", NULL, "can", "uart1", "gmac", "i2c1", NULL}},
+
+	{"PB0",  1, 0,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB1",  1, 1,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB2",  1, 2,  {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, NULL, NULL}},
+	{"PB3",  1, 3,  {"gpio_in", "gpio_out", "ir0", NULL, "spdif", NULL, NULL, NULL}},
+	{"PB4",  1, 4,  {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB5",  1, 5,  {"gpio_in", "gpio_out", "i2s0", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB6",  1, 6,  {"gpio_in", "gpio_out", "i2c0", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB7",  1, 7,  {"gpio_in", "gpio_out", "i2c0", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB8",  1, 8,  {"gpio_in", "gpio_out", "i2c0", "ac97", NULL, NULL, NULL, NULL}},
+	{"PB9",  1, 9,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB10", 1, 10, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB11", 1, 11, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
+	{"PB12", 1, 12, {"gpio_in", "gpio_out", "i2c0", "ac97", "spdif", NULL, NULL, NULL}},
+	{"PB13", 1, 13, {"gpio_in", "gpio_out", "spi2", NULL, "spdif", NULL, NULL, NULL}},
+	{"PB14", 1, 14, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB15", 1, 15, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB16", 1, 16, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB17", 1, 17, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
+	{"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB19", 1, 19, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+	{"PB20", 1, 20, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
+	{"PB21", 1, 21, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
+	{"PB22", 1, 22, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
+	{"PB23", 1, 23, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
+
+	{"PC0",  2, 0,  {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC1",  2, 1,  {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC2",  2, 2,  {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}},
+	{"PC3",  2, 3,  {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC4",  2, 4,  {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC5",  2, 5,  {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC6",  2, 6,  {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC7",  2, 7,  {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC8",  2, 8,  {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC9",  2, 9,  {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC10", 2, 10, {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC11", 2, 11, {"gpio_in", "gpio_out", "nand0", "mmc2", NULL, NULL, NULL, NULL}},
+	{"PC12", 2, 12, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC13", 2, 13, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC14", 2, 14, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC15", 2, 15, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC16", 2, 16, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC17", 2, 17, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC18", 2, 18, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+	{"PC19", 2, 19, {"gpio_in", "gpio_out", "nand0", "spi2", NULL, NULL, "eint", NULL}},
+	{"PC20", 2, 20, {"gpio_in", "gpio_out", "nand0", "spi2", NULL, NULL, "eint", NULL}},
+	{"PC21", 2, 21, {"gpio_in", "gpio_out", "nand0", "spi2", NULL, NULL, "eint", NULL}},
+	{"PC22", 2, 22, {"gpio_in", "gpio_out", "nand0", "spi2", NULL, NULL, "eint", NULL}},
+	{"PC23", 2, 23, {"gpio_in", "gpio_out", NULL, "spi0", NULL, NULL, NULL, NULL}},
+	{"PC24", 2, 24, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}},
+
+	{"PD0",  3, 0,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD1",  3, 1,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD2",  3, 2,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD3",  3, 3,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD4",  3, 4,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD5",  3, 5,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD6",  3, 6,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD7",  3, 7,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD8",  3, 8,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD9",  3, 9,  {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD16", 3, 16, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD17", 3, 17, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
+	{"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", "csi1", NULL, NULL, NULL, NULL}},
+	{"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+	{"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
+
+	{"PE0",  4, 0,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE1",  4, 1,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE2",  4, 2,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE3",  4, 3,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE4",  4, 4,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE5",  4, 5,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE6",  4, 6,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE7",  4, 7,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE8",  4, 8,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE9",  4, 9,  {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE10", 4, 10, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+	{"PE11", 4, 11, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
+
+	{"PF0",  5, 0,  {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF1",  5, 1,  {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF2",  5, 2,  {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}},
+	{"PF3",  5, 3,  {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+	{"PF4",  5, 4,  {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}},
+	{"PF5",  5, 5,  {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
+
+	{"PG0",  6, 0,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG1",  6, 1,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG2",  6, 2,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG3",  6, 3,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
+	{"PG4",  6, 4,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
+	{"PG5",  6, 5,  {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
+	{"PG6",  6, 6,  {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG7",  6, 7,  {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG8",  6, 8,  {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG9",  6, 9,  {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
+	{"PG10", 6, 10, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
+	{"PG11", 6, 11, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
+
+	{"PH0",  7, 0,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart3", NULL, "eint", "csi1"}},
+	{"PH1",  7, 1,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart3", NULL, "eint", "csi1"}},
+	{"PH2",  7, 2,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart3", NULL, "eint", "csi1"}},
+	{"PH3",  7, 3,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart3", NULL, "eint", "csi1"}},
+	{"PH4",  7, 4,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart4", NULL, "eint", "csi1"}},
+	{"PH5",  7, 5,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart4", NULL, "eint", "csi1"}},
+	{"PH6",  7, 6,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart5", "ms", "eint", "csi1"}},
+	{"PH7",  7, 7,  {"gpio_in", "gpio_out", "lcd1", NULL, "uart5", "ms", "eint", "csi1"}},
+	{"PH8",  7, 8,  {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "ms", "eint", "csi1"}},
+	{"PH9",  7, 9,  {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "ms", "eint", "csi1"}},
+	{"PH10", 7, 10, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "ms", "eint", "csi1"}},
+	{"PH11", 7, 11, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "ms", "eint", "csi1"}},
+	{"PH12", 7, 12, {"gpio_in", "gpio_out", "lcd1", NULL, "ps2", NULL, "eint", "csi1"}},
+	{"PH13", 7, 13, {"gpio_in", "gpio_out", "lcd1", NULL, "ps2", "sim", "eint", "csi1"}},
+	{"PH14", 7, 14, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH15", 7, 15, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH16", 7, 16, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH17", 7, 17, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH18", 7, 18, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH19", 7, 19, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "sim", "eint", "csi1"}},
+	{"PH20", 7, 20, {"gpio_in", "gpio_out", "lcd1", NULL, "can", NULL, "eint", "csi1"}},
+	{"PH21", 7, 21, {"gpio_in", "gpio_out", "lcd1", NULL, "can", NULL, "eint", "csi1"}},
+	{"PH22", 7, 22, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+	{"PH23", 7, 23, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+	{"PH24", 7, 24, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+	{"PH25", 7, 25, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+	{"PH26", 7, 26, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+	{"PH27", 7, 27, {"gpio_in", "gpio_out", "lcd1", NULL, "keypad", "mmc1", NULL, "csi1"}},
+
+	{"PI0",  8, 0,  {"gpio_in", "gpio_out", NULL, "i2c3", NULL, NULL, NULL, NULL}},
+	{"PI1",  8, 1,  {"gpio_in", "gpio_out", NULL, "i2c3", NULL, NULL, NULL, NULL}},
+	{"PI2",  8, 2,  {"gpio_in", "gpio_out", NULL, "i2c4", NULL, NULL, NULL, NULL}},
+	{"PI3",  8, 3,  {"gpio_in", "gpio_out", "pwm", "i2c4", NULL, NULL, NULL, NULL}},
+	{"PI4",  8, 4,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI5",  8, 5,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI6",  8, 6,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI7",  8, 7,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI8",  8, 8,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI9",  8, 9,  {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
+	{"PI10", 8, 10, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "eint", NULL}},
+	{"PI11", 8, 11, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "eint", NULL}},
+	{"PI12", 8, 12, {"gpio_in", "gpio_out", "spi0", "uart6", "clk_out_a", NULL, "eint", NULL}},
+	{"PI13", 8, 13, {"gpio_in", "gpio_out", "spi0", "uart6", "clk_out_b", NULL, "eint", NULL}},
+	{"PI14", 8, 14, {"gpio_in", "gpio_out", "spi0", "ps2", "timer4", NULL, "eint", NULL}},
+	{"PI15", 8, 15, {"gpio_in", "gpio_out", "spi1", "ps2", "timer5", NULL, "eint", NULL}},
+	{"PI16", 8, 16, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI17", 8, 17, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI18", 8, 18, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI19", 8, 19, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "eint", NULL}},
+	{"PI20", 8, 20, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
+	{"PI21", 8, 21, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
+};
+
+const struct allwinner_padconf a20_padconf = {
+	.npins = sizeof(a20_pins) / sizeof(struct allwinner_pins),
+	.pins = a20_pins,
+};

sys/arm/allwinner/a20/files.a20

@@ -1,4 +1,5 @@
 # $FreeBSD$
 
+arm/allwinner/a20/a20_padconf.c		standard
 arm/allwinner/a20/a20_mp.c		optional	smp
 arm/allwinner/a20/a20_if_dwc.c		optional	dwc

sys/arm/allwinner/allwinner_pinctrl.h

@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@bidouilliste.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _ALLWINNER_PINCTRL_H_
+#define	_ALLWINNER_PINCTRL_H_
+
+#define AW_MAX_FUNC_BY_PIN	8
+
+struct allwinner_pins {
+	const char *name;
+	uint8_t port;
+	uint8_t pin;
+	const char *functions[8];
+};
+
+struct allwinner_padconf {
+	uint32_t			npins;
+	const struct allwinner_pins *	pins;
+};
+
+#endif /* _ALLWINNER_PINCTRL_H_ */

sys/arm/allwinner/axp209.c

@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/reboot.h>
 #include <sys/resource.h>
 #include <sys/rman.h>
+#include <sys/sysctl.h>
 
 #include <dev/iicbus/iicbus.h>
 #include <dev/iicbus/iiconf.h>
@@ -54,17 +55,31 @@ __FBSDID("$FreeBSD$");
 /* Power State Register */
 #define	AXP209_PSR		0x00
 #define	AXP209_PSR_ACIN		0x80
+#define	AXP209_PSR_ACIN_SHIFT	7
 #define	AXP209_PSR_VBUS		0x20
+#define	AXP209_PSR_VBUS_SHIFT	5
 
 /* Shutdown and battery control */
 #define	AXP209_SHUTBAT		0x32
 #define	AXP209_SHUTBAT_SHUTDOWN	0x80
 
+/* Temperature monitor */
+#define	AXP209_TEMPMON		0x5e
+#define	AXP209_TEMPMON_H(a)	((a) << 4)
+#define	AXP209_TEMPMON_L(a)	((a) & 0xf)
+#define	AXP209_TEMPMON_MIN	1447	/* -144.7C */
+
+#define	AXP209_0C_TO_K		2732
+
 struct axp209_softc {
 	uint32_t		addr;
 	struct intr_config_hook enum_hook;
 };
 
+enum axp209_sensor {
+	AXP209_TEMP
+};
+
 static int
 axp209_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
 {
@@ -102,6 +117,28 @@ axp209_write(device_t dev, uint8_t reg, uint8_t data)
 	return (iicbus_transfer(dev, &msg, 1));
 }
 
+static int
+axp209_sysctl(SYSCTL_HANDLER_ARGS)
+{
+	device_t dev = arg1;
+	enum axp209_sensor sensor = arg2;
+	uint8_t data[2];
+	int val, error;
+
+	if (sensor != AXP209_TEMP)
+		return (ENOENT);
+
+	error = axp209_read(dev, AXP209_TEMPMON, data, 2);
+	if (error != 0)
+		return (error);
+
+	/* Temperature is between -144.7C and 264.8C, step +0.1C */
+	val = (AXP209_TEMPMON_H(data[0]) | AXP209_TEMPMON_L(data[1])) -
+	    AXP209_TEMPMON_MIN + AXP209_0C_TO_K;
+
+	return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
+}
+
 static void
 axp209_shutdown(void *devp, int howto)
 {
@@ -136,30 +173,37 @@ static int
 axp209_attach(device_t dev)
 {
 	struct axp209_softc *sc;
+	const char *pwr_name[] = {"Battery", "AC", "USB", "AC and USB"};
 	uint8_t data;
 	uint8_t pwr_src;
-	char pwr_name[4][11] = {"Battery", "AC", "USB", "AC and USB"};
 
 	sc = device_get_softc(dev);
 
 	sc->addr = iicbus_get_addr(dev);
 
-	/*
+	if (bootverbose) {
-	 * Read the Power State register
+		/*
-	 * bit 7 is AC presence, bit 5 is VBUS presence.
+		 * Read the Power State register.
-	 * If none are set then we are running from battery (obviously).
+		 * Shift the AC presence into bit 0.
-	 */
+		 * Shift the Battery presence into bit 1.
-	axp209_read(dev, AXP209_PSR, &data, 1);
+		 */
-	pwr_src = ((data & AXP209_PSR_ACIN) >> 7) |
+		axp209_read(dev, AXP209_PSR, &data, 1);
-		  ((data & AXP209_PSR_VBUS) >> 4);
+		pwr_src = ((data & AXP209_PSR_ACIN) >> AXP209_PSR_ACIN_SHIFT) |
+		    ((data & AXP209_PSR_VBUS) >> (AXP209_PSR_VBUS_SHIFT - 1));
 
-	if (bootverbose)
 		device_printf(dev, "AXP209 Powered by %s\n",
 		    pwr_name[pwr_src]);
+	}
 
 	EVENTHANDLER_REGISTER(shutdown_final, axp209_shutdown, dev,
 	    SHUTDOWN_PRI_LAST);
 
+	SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
+	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
+	    OID_AUTO, "temp",
+	    CTLTYPE_INT | CTLFLAG_RD,
+	    dev, AXP209_TEMP, axp209_sysctl, "IK", "Internal temperature");
+
 	return (0);
 }
 

sys/arm/allwinner/files.a10

@@ -1,4 +1,5 @@
 # $FreeBSD$
 
+arm/allwinner/a10_padconf.c		standard
 arm/allwinner/aintc.c			standard
 arm/allwinner/timer.c			standard

sys/arm/allwinner/files.allwinner

@@ -3,6 +3,7 @@ kern/kern_clocksource.c			standard
 
 arm/allwinner/a10_ahci.c		optional	ahci
 arm/allwinner/a10_clk.c			standard
+arm/allwinner/a10_codec.c		optional	sound
 arm/allwinner/a10_common.c		standard
 arm/allwinner/a10_dmac.c		standard
 arm/allwinner/a10_ehci.c		optional	ehci

sys/arm/allwinner/if_emac.c

@@ -84,7 +84,6 @@ __FBSDID("$FreeBSD$");
 
 #include "a10_clk.h"
 #include "a10_sramc.h"
-#include "a10_gpio.h"
 
 struct emac_softc {
 	struct ifnet		*emac_ifp;
@@ -145,8 +144,6 @@ emac_sys_setup(void)
 
 	/* Activate EMAC clock. */
 	a10_clk_emac_activate();
-	/* Set the pin mux to EMAC (mii). */
-	a10_gpio_ethernet_activate(A10_GPIO_FUNC_MII);
 	/* Map sram. */
 	a10_map_to_emac();
 }

sys/arm/arm/bus_space_generic.c

@@ -71,8 +71,8 @@ generic_bs_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
 
 	/*
 	 * We don't even examine the passed-in flags.  For ARM, the CACHEABLE
-	 * flag doesn't make sense (we create PTE_DEVICE mappings), and the
+	 * flag doesn't make sense (we create VM_MEMATTR_DEVICE mappings), and
-	 * LINEAR flag is just implied because we use kva_alloc(size).
+	 * the LINEAR flag is just implied because we use kva_alloc(size).
 	 */
 	if ((va = pmap_mapdev(bpa, size)) == NULL)
 		return (ENOMEM);

sys/arm/arm/devmap.c

@@ -52,7 +52,6 @@ static boolean_t devmap_bootstrap_done = false;
 
 #if defined(__aarch64__)
 #define	MAX_VADDR	VM_MAX_KERNEL_ADDRESS
-#define	PTE_DEVICE	VM_MEMATTR_DEVICE
 #elif defined(__arm__)
 #define	MAX_VADDR	ARM_VECTORS_HIGH
 #endif
@@ -165,8 +164,6 @@ arm_devmap_add_entry(vm_paddr_t pa, vm_size_t sz)
 	m->pd_va    = akva_devmap_vaddr;
 	m->pd_pa    = pa;
 	m->pd_size  = sz;
-	m->pd_prot  = VM_PROT_READ | VM_PROT_WRITE;
-	m->pd_cache = PTE_DEVICE;
 }
 
 /*
@@ -209,10 +206,10 @@ arm_devmap_bootstrap(vm_offset_t l1pt, const struct arm_devmap_entry *table)
 #if defined(__arm__)
 #if __ARM_ARCH >= 6
 		pmap_preboot_map_attr(pd->pd_pa, pd->pd_va, pd->pd_size,
-		    pd->pd_prot, pd->pd_cache);
+		    VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
 #else
 		pmap_map_chunk(l1pt, pd->pd_va, pd->pd_pa, pd->pd_size,
-		    pd->pd_prot, pd->pd_cache);
+		    VM_PROT_READ | VM_PROT_WRITE, PTE_DEVICE);
 #endif
 #elif defined(__aarch64__)
 		pmap_kenter_device(pd->pd_va, pd->pd_size, pd->pd_pa);
@@ -270,7 +267,8 @@ arm_devmap_vtop(void * vpva, vm_size_t size)
  * range, otherwise it allocates kva space and maps the physical pages into it.
  *
  * This routine is intended to be used for mapping device memory, NOT real
- * memory; the mapping type is inherently PTE_DEVICE in pmap_kenter_device().
+ * memory; the mapping type is inherently VM_MEMATTR_DEVICE in
+ * pmap_kenter_device().
  */
 void *
 pmap_mapdev(vm_offset_t pa, vm_size_t size)

sys/arm/arm/fiq.c

@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/param.h>
 #include <sys/systm.h>
 
+#include <machine/acle-compat.h>
 #include <machine/armreg.h>
 #include <machine/cpufunc.h>
 #include <machine/fiq.h>
@@ -73,13 +74,13 @@ fiq_installhandler(void *func, size_t size)
 {
 	const uint32_t fiqvector = 7 * sizeof(uint32_t);
 
-#if !defined(__ARM_FIQ_INDIRECT)
+#if __ARM_ARCH < 6 && !defined(__ARM_FIQ_INDIRECT)
 	vector_page_setprot(VM_PROT_READ|VM_PROT_WRITE);
 #endif
 
 	memcpy((void *)(vector_page + fiqvector), func, size);
 
-#if !defined(__ARM_FIQ_INDIRECT)
+#if __ARM_ARCH < 6 && !defined(__ARM_FIQ_INDIRECT)
 	vector_page_setprot(VM_PROT_READ);
 #endif
 	icache_sync((vm_offset_t) fiqvector, size);

sys/arm/arm/genassym.c

@@ -129,7 +129,9 @@ ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap));
 #endif
 
 ASSYM(PAGE_SIZE, PAGE_SIZE);
+#if __ARM_ARCH < 6
 ASSYM(PMAP_DOMAIN_KERNEL, PMAP_DOMAIN_KERNEL);
+#endif
 #ifdef PMAP_INCLUDE_PTE_SYNC
 ASSYM(PMAP_INCLUDE_PTE_SYNC, 1);
 #endif

sys/arm/arm/locore-v6.S

@@ -280,7 +280,7 @@ ASENTRY_NP(init_mmu)
 	mcr	CP15_CONTEXTIDR(r0)	/* Set ASID to 0 */
 
 	/* Set the Domain Access register */
-	mov	r0, #((DOMAIN_CLIENT <<	(PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
+	mov	r0, #DOMAIN_CLIENT	/* Only domain #0 is used */
 	mcr	CP15_DACR(r0)
 
 	/*

sys/arm/arm/ofw_machdep.c

@@ -38,7 +38,7 @@ __FBSDID("$FreeBSD$");
 
 int
 OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
-    bus_space_handle_t *handle)
+    bus_space_handle_t *handle, bus_size_t *sz)
 {
 	bus_addr_t addr;
 	bus_size_t size;
@@ -66,6 +66,10 @@ OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
 	*tag = fdtbus_bs_tag;
 	flags = 0;
 #endif
+
+	if (sz != NULL)
+		*sz = size;
+
 	return (bus_space_map(*tag, addr, size, flags, handle));
 }
 

sys/arm/arm/pmap-v6.c

@@ -1022,6 +1022,7 @@ pmap_preboot_map_attr(vm_paddr_t pa, vm_offset_t va, vm_size_t size,
 	pt2_entry_t *pte2p;
 
 	l2_prot = prot & VM_PROT_WRITE ? PTE2_AP_KRW : PTE2_AP_KR;
+	l2_prot |= (prot & VM_PROT_EXECUTE) ? PTE2_X : PTE2_NX;
 	l2_attr = vm_memattr_to_pte2(attr);
 	l1_prot = ATTR_TO_L1(l2_prot);
 	l1_attr = ATTR_TO_L1(l2_attr);
@@ -6313,11 +6314,6 @@ pmap_fault(pmap_t pmap, vm_offset_t far, uint32_t fsr, int idx, bool usermode)
 	return (KERN_FAILURE);
 }
 
-/* !!!! REMOVE !!!! */
-void vector_page_setprot(int p)
-{
-}
-
 #if defined(PMAP_DEBUG)
 /*
  *  Reusing of KVA used in pmap_zero_page function !!!

sys/arm/at91/at91_machdep.c

@@ -128,8 +128,6 @@ const struct arm_devmap_entry at91_devmap[] = {
 		0xdff00000,
 		0xfff00000,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/* There's a notion that we should do the rest of these lazily. */
 	/*
@@ -152,16 +150,12 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91RM92_OHCI_VA_BASE,
 		AT91RM92_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/* CompactFlash controller. Portion of EBI CS4 1MB */
 		AT91RM92_CF_VA_BASE,
 		AT91RM92_CF_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * The next two should be good for the 9260, 9261 and 9G20 since
@@ -172,16 +166,12 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91SAM9G20_OHCI_VA_BASE,
 		AT91SAM9G20_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/* EBI CS3 256MB */
 		AT91SAM9G20_NAND_VA_BASE,
 		AT91SAM9G20_NAND_BASE,
 		AT91SAM9G20_NAND_SIZE,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * The next should be good for the 9G45.
@@ -191,10 +181,8 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91SAM9G45_OHCI_VA_BASE,
 		AT91SAM9G45_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 #ifdef LINUX_BOOT_ABI

sys/arm/broadcom/bcm2835/bcm2835_dma.c

@@ -104,6 +104,15 @@ __FBSDID("$FreeBSD$");
 /* relative offset from BCM_VC_DMA0_BASE (p.39) */
 #define	BCM_DMA_CH(n)		(0x100*(n))
 
+/* channels used by GPU */
+#define	BCM_DMA_CH_BULK		0
+#define	BCM_DMA_CH_FAST1	2
+#define	BCM_DMA_CH_FAST2	3
+
+#define	BCM_DMA_CH_GPU_MASK	((1 << BCM_DMA_CH_BULK) |	\
+				 (1 << BCM_DMA_CH_FAST1) |	\
+				 (1 << BCM_DMA_CH_FAST2))
+
 /* DMA Control Block - 256bit aligned (p.40) */
 struct bcm_dma_cb {
 	uint32_t info;		/* Transfer Information */
@@ -143,6 +152,7 @@ struct bcm_dma_softc {
 };
 
 static struct bcm_dma_softc *bcm_dma_sc = NULL;
+static uint32_t bcm_dma_channel_mask;
 
 static void
 bcm_dmamap_cb(void *arg, bus_dma_segment_t *segs,
@@ -205,16 +215,32 @@ static int
 bcm_dma_init(device_t dev)
 {
 	struct bcm_dma_softc *sc = device_get_softc(dev);
-	uint32_t mask;
+	uint32_t reg;
 	struct bcm_dma_ch *ch;
 	void *cb_virt;
 	vm_paddr_t cb_phys;
 	int err;
 	int i;
 
-	/* disable and clear interrupt status */
+	/*
-	bus_write_4(sc->sc_mem, BCM_DMA_ENABLE, 0);
+	 * Only channels set in bcm_dma_channel_mask can be controlled by us.
-	bus_write_4(sc->sc_mem, BCM_DMA_INT_STATUS, 0);
+	 * The others are out of our control as well as the corresponding bits
+	 * in both BCM_DMA_ENABLE and BCM_DMA_INT_STATUS global registers. As
+	 * these registers are RW ones, there is no safe way how to write only
+	 * the bits which can be controlled by us.
+	 *
+	 * Fortunately, after reset, all channels are enabled in BCM_DMA_ENABLE
+	 * register and all statuses are cleared in BCM_DMA_INT_STATUS one.
+	 * Not touching these registers is a trade off between correct
+	 * initialization which does not count on anything and not messing up
+	 * something we have no control over.
+	 */
+	reg = bus_read_4(sc->sc_mem, BCM_DMA_ENABLE);
+	if ((reg & bcm_dma_channel_mask) != bcm_dma_channel_mask)
+		device_printf(dev, "channels are not enabled\n");
+	reg = bus_read_4(sc->sc_mem, BCM_DMA_INT_STATUS);
+	if ((reg & bcm_dma_channel_mask) != 0)
+		device_printf(dev, "statuses are not cleared\n");
 
 	/* Allocate DMA chunks control blocks */
 	/* p.40 of spec - control block should be 32-bit aligned */
@@ -227,7 +253,7 @@ bcm_dma_init(device_t dev)
 	    &sc->sc_dma_tag);
 
 	if (err) {
-		device_printf(dev, "failed allocate DMA tag");
+		device_printf(dev, "failed allocate DMA tag\n");
 		return (err);
 	}
 
@@ -235,6 +261,13 @@ bcm_dma_init(device_t dev)
 	for (i = 0; i < BCM_DMA_CH_MAX; i++) {
 		ch = &sc->sc_dma_ch[i];
 
+		bzero(ch, sizeof(struct bcm_dma_ch));
+		ch->ch = i;
+		ch->flags = BCM_DMA_CH_UNMAP;
+
+		if ((bcm_dma_channel_mask & (1 << i)) == 0)
+			continue;
+
 		err = bus_dmamem_alloc(sc->sc_dma_tag, &cb_virt,
 		    BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO,
 		    &ch->dma_map);
@@ -263,33 +296,15 @@ bcm_dma_init(device_t dev)
 			break;
 		}
 
-		bzero(ch, sizeof(struct bcm_dma_ch));
-		ch->ch = i;
 		ch->cb = cb_virt;
 		ch->vc_cb = cb_phys;
-		ch->intr_func = NULL;
+		ch->flags = BCM_DMA_CH_FREE;
-		ch->intr_arg = NULL;
-		ch->flags = BCM_DMA_CH_UNMAP;
-
 		ch->cb->info = INFO_WAIT_RESP;
 
 		/* reset DMA engine */
-		bcm_dma_reset(dev, i);
+		bus_write_4(sc->sc_mem, BCM_DMA_CS(i), CS_RESET);
 	}
 
-	/* now use DMA2/DMA3 only */
-	sc->sc_dma_ch[2].flags = BCM_DMA_CH_FREE;
-	sc->sc_dma_ch[3].flags = BCM_DMA_CH_FREE;
-
-	/* enable DMAs */
-	mask = 0;
-
-	for (i = 0; i < BCM_DMA_CH_MAX; i++)
-		if (sc->sc_dma_ch[i].flags & BCM_DMA_CH_FREE)
-			mask |= (1 << i);
-
-	bus_write_4(sc->sc_mem, BCM_DMA_ENABLE, mask);
-
 	return (0);
 }
 
@@ -599,8 +614,11 @@ bcm_dma_intr(void *arg)
 	/* my interrupt? */
 	cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch->ch));
 
-	if (!(cs & (CS_INT | CS_ERR)))
+	if (!(cs & (CS_INT | CS_ERR))) {
+		device_printf(sc->sc_dev,
+		    "unexpected DMA intr CH=%d, CS=%x\n", ch->ch, cs);
 		return;
+	}
 
 	/* running? */
 	if (!(ch->flags & BCM_DMA_CH_USED)) {
@@ -651,6 +669,7 @@ static int
 bcm_dma_attach(device_t dev)
 {
 	struct bcm_dma_softc *sc = device_get_softc(dev);
+	phandle_t node;
 	int rid, err = 0;
 	int i;
 
@@ -664,6 +683,19 @@ bcm_dma_attach(device_t dev)
 		sc->sc_intrhand[i] = NULL;
 	}
 
+	/* Get DMA channel mask. */
+	node = ofw_bus_get_node(sc->sc_dev);
+	if (OF_getencprop(node, "brcm,dma-channel-mask", &bcm_dma_channel_mask,
+	    sizeof(bcm_dma_channel_mask)) == -1 &&
+	    OF_getencprop(node, "broadcom,channels", &bcm_dma_channel_mask,
+	    sizeof(bcm_dma_channel_mask)) == -1) {
+		device_printf(dev, "could not get channel mask property\n");
+		return (ENXIO);
+	}
+
+	/* Mask out channels used by GPU. */
+	bcm_dma_channel_mask &= ~BCM_DMA_CH_GPU_MASK;
+
 	/* DMA0 - DMA14 */
 	rid = 0;
 	sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
@@ -674,6 +706,9 @@ bcm_dma_attach(device_t dev)
 
 	/* IRQ DMA0 - DMA11 XXX NOT USE DMA12(spurious?) */
 	for (rid = 0; rid < BCM_DMA_CH_MAX; rid++) {
+		if ((bcm_dma_channel_mask & (1 << rid)) == 0)
+			continue;
+
 		sc->sc_irq[rid] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
 						       RF_ACTIVE);
 		if (sc->sc_irq[rid] == NULL) {

sys/arm/broadcom/bcm2835/bcm2835_dma.h

@@ -37,8 +37,6 @@
 /* request CH for any nubmer */
 #define	BCM_DMA_CH_INVALID	(-1)
 #define	BCM_DMA_CH_ANY		(-1)
-#define	BCM_DMA_CH_FAST1	(2)
-#define	BCM_DMA_CH_FAST2	(3)
 
 /* Peripheral DREQ Signals (4.2.1.3) */
 #define	BCM_DMA_DREQ_NONE	0

sys/arm/broadcom/bcm2835/bcm2835_sdhci.c

@@ -214,11 +214,7 @@ bcm_sdhci_attach(device_t dev)
  
 	sdhci_init_slot(dev, &sc->sc_slot, 0);
 
-	sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_FAST1);
+	sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_ANY);
-	if (sc->sc_dma_ch == BCM_DMA_CH_INVALID)
-		sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_FAST2);
-	if (sc->sc_dma_ch == BCM_DMA_CH_INVALID)
-		sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_ANY);
 	if (sc->sc_dma_ch == BCM_DMA_CH_INVALID)
 		goto fail;
 

sys/arm/cavium/cns11xx/econa_machdep.c

@@ -113,8 +113,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_SDRAM_BASE, /*virtual*/
 		ECONA_SDRAM_BASE, /*physical*/
 		ECONA_SDRAM_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * Map the on-board devices VA == PA so that we can access them
@@ -128,8 +126,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_IO_BASE, /*virtual*/
 		ECONA_IO_BASE, /*physical*/
 		ECONA_IO_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/*
@@ -138,8 +134,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_OHCI_VBASE, /*virtual*/
 		ECONA_OHCI_PBASE, /*physical*/
 		ECONA_USB_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/*
@@ -148,15 +142,11 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_CFI_VBASE, /*virtual*/
 		ECONA_CFI_PBASE, /*physical*/
 		ECONA_CFI_SIZE,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		0,
 		0,
 		0,
-		0,
-		0,
 	}
 };
 

sys/arm/conf/A10

@@ -23,6 +23,8 @@ ident		A10
 include 	"std.armv6"
 include 	"../allwinner/std.a10"
 
+options 	SOC_ALLWINNER_A10
+
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler
 options 	PLATFORM
@@ -102,6 +104,9 @@ device		emac
 # USB ethernet support, requires miibus
 device		miibus
 
+# Pinmux
+device		fdt_pinctrl
+
 # Flattened Device Tree
 options 	FDT			# Configure using FDT/DTB data
 makeoptions	MODULES_EXTRA=dtb/allwinner

sys/arm/conf/A20

@@ -25,6 +25,8 @@ include 	"../allwinner/a20/std.a20"
 
 options 	ARM_INTRNG
 
+options 	SOC_ALLWINNER_A20
+
 options 	HZ=100
 options 	SCHED_ULE		# ULE scheduler
 options 	SMP			# Enable multiple cores
@@ -112,6 +114,12 @@ device		dwc			# 10/100/1000 integrated GMAC controller
 # USB ethernet support, requires miibus
 device		miibus
 
+# Sound support
+device		sound
+
+# Pinmux
+device		fdt_pinctrl
+
 # Flattened Device Tree
 options 	FDT			# Configure using FDT/DTB data
 makeoptions	MODULES_EXTRA=dtb/allwinner

sys/arm/conf/CUBIEBOARD

@@ -24,6 +24,8 @@ ident		CUBIEBOARD
 include 	"std.armv6"
 include 	"../allwinner/std.a10"
 
+options 	SOC_ALLWINNER_A10
+
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler
 options 	PLATFORM
@@ -103,6 +105,9 @@ device		emac
 # USB ethernet support, requires miibus
 device		miibus
 
+# Pinmux
+device		fdt_pinctrl
+
 # Flattened Device Tree
 options 	FDT			# Configure using FDT/DTB data
 options 	FDT_DTB_STATIC

sys/arm/freescale/imx/imx6_machdep.c

@@ -136,7 +136,7 @@ imx6_late_init(platform_t plat)
  * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
  * the memory map.  When we get support for graphics it might make sense to
  * static map some of that area.  Be careful with other things in that area such
- * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
+ * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
  */
 static int
 imx6_devmap_init(platform_t plat)

sys/arm/include/devmap.h

@@ -37,8 +37,6 @@ struct arm_devmap_entry {
 	vm_offset_t	pd_va;		/* virtual address */
 	vm_paddr_t	pd_pa;		/* physical address */
 	vm_size_t	pd_size;	/* size of region */
-	vm_prot_t	pd_prot;	/* protection code */
-	int		pd_cache;	/* cache attributes */
 };
 
 /*

sys/arm/include/pmap-v6.h

@@ -220,39 +220,4 @@ void pmap_preboot_map_attr(vm_paddr_t, vm_offset_t, vm_size_t, vm_prot_t,
     vm_memattr_t);
 
 #endif	/* _KERNEL */
-
-// ----------------- TO BE DELETED ---------------------------------------------
-#include <machine/pte-v6.h>
-
-#ifdef _KERNEL
-
-/*
- * sys/arm/arm/elf_trampoline.c
- * sys/arm/arm/genassym.c
- * sys/arm/arm/machdep.c
- * sys/arm/arm/mp_machdep.c
- * sys/arm/arm/locore.S
- * sys/arm/arm/pmap.c
- * sys/arm/arm/swtch.S
- * sys/arm/at91/at91_machdep.c
- * sys/arm/cavium/cns11xx/econa_machdep.c
- * sys/arm/s3c2xx0/s3c24x0_machdep.c
- * sys/arm/xscale/ixp425/avila_machdep.c
- * sys/arm/xscale/i8134x/crb_machdep.c
- * sys/arm/xscale/i80321/ep80219_machdep.c
- * sys/arm/xscale/i80321/iq31244_machdep.c
- * sys/arm/xscale/pxa/pxa_machdep.c
- */
-#define	PMAP_DOMAIN_KERNEL	0	/* The kernel uses domain #0 */
-
-/*
- * sys/arm/arm/cpufunc.c
- */
-void vector_page_setprot(int);
-
-#define PTE_DEVICE	VM_MEMATTR_DEVICE
-
-#endif	/* _KERNEL */
-// -----------------------------------------------------------------------------
-
 #endif	/* !_MACHINE_PMAP_H_ */

sys/arm/include/pmap_var.h

@@ -31,6 +31,7 @@
 #define _MACHINE_PMAP_VAR_H_
 
 #include <machine/cpu-v6.h>
+#include <machine/pte-v6.h>
 /*
  *  Various PMAP defines, exports, and inline functions
  *  definitions also usable in other MD code.

sys/arm/include/vm.h

@@ -32,8 +32,6 @@
 #include <machine/acle-compat.h>
 
 #if __ARM_ARCH >= 6
-#include <machine/pte-v6.h>
-
 #define VM_MEMATTR_WB_WA		((vm_memattr_t)0)
 #define VM_MEMATTR_NOCACHE		((vm_memattr_t)1)
 #define VM_MEMATTR_DEVICE		((vm_memattr_t)2)

sys/arm/mv/mv_localbus.c

@@ -477,8 +477,6 @@ fdt_localbus_devmap(phandle_t dt_node, struct arm_devmap_entry *fdt_devmap,
 		fdt_devmap[j].pd_va = localbus_virtmap[va_index].va;
 		fdt_devmap[j].pd_pa = offset;
 		fdt_devmap[j].pd_size = size;
-		fdt_devmap[j].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-		fdt_devmap[j].pd_cache = PTE_DEVICE;
 
 		/* Copy data to structure used by localbus driver */
 		localbus_banks[bank].va = fdt_devmap[j].pd_va;

sys/arm/mv/mv_machdep.c

@@ -271,7 +271,7 @@ platform_late_init(void)
 
 #define FDT_DEVMAP_MAX	(MV_WIN_CPU_MAX + 2)
 static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 static int
@@ -302,8 +302,6 @@ platform_sram_devmap(struct arm_devmap_entry *map)
 	map->pd_va = MV_CESA_SRAM_BASE; /* XXX */
 	map->pd_pa = base;
 	map->pd_size = size;
-	map->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	map->pd_cache = PTE_DEVICE;
 
 	return (0);
 out:
@@ -368,8 +366,6 @@ platform_devmap_init(void)
 	fdt_devmap[i].pd_va = fdt_immr_va;
 	fdt_devmap[i].pd_pa = fdt_immr_pa;
 	fdt_devmap[i].pd_size = fdt_immr_size;
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
 	i++;
 
 	/*

sys/arm/mv/mv_pci.c

@@ -233,15 +233,11 @@ mv_pci_devmap(phandle_t node, struct arm_devmap_entry *devmap, vm_offset_t io_va
 	devmap->pd_va = (io_va ? io_va : io_space.base_parent);
 	devmap->pd_pa = io_space.base_parent;
 	devmap->pd_size = io_space.len;
-	devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	devmap->pd_cache = PTE_DEVICE;
 	devmap++;
 
 	devmap->pd_va = (mem_va ? mem_va : mem_space.base_parent);
 	devmap->pd_pa = mem_space.base_parent;
 	devmap->pd_size = mem_space.len;
-	devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	devmap->pd_cache = PTE_DEVICE;
 	return (0);
 }
 

sys/arm/mv/orion/db88f5xxx.c

@@ -82,45 +82,33 @@ const struct arm_devmap_entry db88f5xxx_devmap[] = {
 		MV_BASE,
 		MV_PHYS_BASE,
 		MV_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCIE I/O */
 		MV_PCIE_IO_BASE,
 		MV_PCIE_IO_PHYS_BASE,
 		MV_PCIE_IO_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCIE Memory */
 		MV_PCIE_MEM_BASE,
 		MV_PCIE_MEM_PHYS_BASE,
 		MV_PCIE_MEM_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCI I/O */
 		MV_PCI_IO_BASE,
 		MV_PCI_IO_PHYS_BASE,
 		MV_PCI_IO_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCI Memory */
 		MV_PCI_MEM_BASE,
 		MV_PCI_MEM_PHYS_BASE,
 		MV_PCI_MEM_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* 7-seg LED */
 		MV_DEV_CS0_BASE,
 		MV_DEV_CS0_PHYS_BASE,
 		MV_DEV_CS0_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 /*

sys/arm/ti/ti_scm.c

@@ -170,4 +170,5 @@ static driver_t ti_scm_driver = {
 
 static devclass_t ti_scm_devclass;
 
-DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0);
+EARLY_DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0,
+    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);

sys/arm/versatile/versatile_machdep.c

@@ -82,8 +82,8 @@ platform_late_init(void)
 
 #define FDT_DEVMAP_MAX	(2)		/* FIXME */
 static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
-	{ 0, 0, 0, 0, 0, },
+	{ 0, 0, 0, },
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 
@@ -97,8 +97,6 @@ platform_devmap_init(void)
 	fdt_devmap[i].pd_va = 0xf0100000;
 	fdt_devmap[i].pd_pa = 0x10100000;
 	fdt_devmap[i].pd_size = 0x01000000;       /* 1 MB */
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
 
 	arm_devmap_register_table(&fdt_devmap[0]);
 	return (0);

sys/arm/xscale/i8134x/crb_machdep.c

@@ -125,8 +125,6 @@ static const struct arm_devmap_entry iq81342_devmap[] = {
 		    IOP34X_VADDR,
 		    IOP34X_HWADDR,
 		    IOP34X_SIZE,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {
 		    /*
@@ -136,22 +134,16 @@ static const struct arm_devmap_entry iq81342_devmap[] = {
 		    IOP34X_PCIX_OIOBAR_VADDR &~ (0x100000 - 1),
 		    IOP34X_PCIX_OIOBAR &~ (0x100000 - 1),
 		    0x100000,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {
 		    IOP34X_PCE1_VADDR,
 		    IOP34X_PCE1,
 		    IOP34X_PCE1_SIZE,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {	
 		    0,
 		    0,
 		    0,
-		    0,
-		    0,
 	    }
 };
 

sys/arm/xscale/ixp425/avila_machdep.c

@@ -119,32 +119,26 @@ struct pv_addr minidataclean;
 /* Static device mappings. */
 static const struct arm_devmap_entry ixp425_devmap[] = {
 	/* Physical/Virtual address for I/O space */
-    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
+    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* Expansion Bus */
-    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
+    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* CFI Flash on the Expansion Bus */
     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
-      IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+      IXP425_EXP_BUS_CS0_SIZE, },
 
 	/* IXP425 PCI Configuration */
-    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
+    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* SDRAM Controller */
-    { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
+    { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* PCI Memory Space */
-    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
+    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* Q-Mgr Memory Space */
-    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
+    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
     { 0 },
 };
@@ -152,46 +146,36 @@ static const struct arm_devmap_entry ixp425_devmap[] = {
 /* Static device mappings. */
 static const struct arm_devmap_entry ixp435_devmap[] = {
 	/* Physical/Virtual address for I/O space */
-    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
+    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
-    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
+    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* IXP425 PCI Configuration */
-    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
+    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* DDRII Controller NB: mapped same place as IXP425 */
-    { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
+    { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* PCI Memory Space */
-    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
+    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* Q-Mgr Memory Space */
-    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
+    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* CFI Flash on the Expansion Bus */
     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
-      IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+      IXP425_EXP_BUS_CS0_SIZE, },
 
 	/* USB1 Memory Space */
-    { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
+    { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 	/* USB2 Memory Space */
-    { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
+    { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* GPS Memory Space */
-    { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
+    { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
 	/* RS485 Memory Space */
-    { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
+    { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, },
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
 
     { 0 }
 };

sys/arm/xscale/pxa/pxa_machdep.c

@@ -129,10 +129,8 @@ static const struct arm_devmap_entry pxa_devmap[] = {
 		PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
 		PXA2X0_PERIPH_START,
 		PXA250_PERIPH_END - PXA2X0_PERIPH_START,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 #define SDRAM_START 0xa0000000

sys/arm64/arm64/ofw_machdep.c

@@ -39,7 +39,7 @@ extern struct bus_space memmap_bus;
 
 int
 OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
-    bus_space_handle_t *handle)
+    bus_space_handle_t *handle, bus_size_t *sz)
 {
 	bus_addr_t addr;
 	bus_size_t size;
@@ -50,5 +50,9 @@ OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
 		return (err);
 
 	*tag = &memmap_bus;
+
+	if (sz != NULL)
+		*sz = size;
+
 	return (bus_space_map(*tag, addr, size, 0, handle));
 }

sys/arm64/cavium/thunder_pcie_common.h

@@ -33,6 +33,7 @@
 #define	RANGES_TUPLES_INVALID (RANGES_TUPLES_MAX + 1)
 
 DECLARE_CLASS(thunder_pcie_driver);
+DECLARE_CLASS(thunder_pem_driver);
 
 MALLOC_DECLARE(M_THUNDER_PCIE);
 

sys/arm64/cavium/thunder_pcie_pem.c

@@ -49,12 +49,12 @@ __FBSDID("$FreeBSD$");
 #include <machine/smp.h>
 #include <machine/intr.h>
 
-#include "thunder_pcie_common.h"
+#include <arm64/cavium/thunder_pcie_common.h>
+#include <arm64/cavium/thunder_pcie_pem.h>
 #include "pcib_if.h"
 
 #define	THUNDER_PEM_DEVICE_ID		0xa020
 #define	THUNDER_PEM_VENDOR_ID		0x177d
-#define	THUNDER_PEM_DESC		"ThunderX PEM"
 
 /* ThunderX specific defines */
 #define	THUNDER_PEMn_REG_BASE(unit)	(0x87e0c0000000UL | ((unit) << 24))
@@ -109,21 +109,7 @@ __FBSDID("$FreeBSD$");
 #define	PCI_MEMORY_BASE		PCI_IO_SIZE
 #define	PCI_MEMORY_SIZE		0xFFF00000UL
 
-struct thunder_pem_softc {
+#define	RID_PEM_SPACE		1
-	device_t		dev;
-	struct resource		*reg;
-	bus_space_tag_t		reg_bst;
-	bus_space_handle_t	reg_bsh;
-	struct pcie_range	ranges[RANGES_TUPLES_MAX];
-	struct rman		mem_rman;
-	struct rman		io_rman;
-	bus_space_handle_t	pem_sli_base;
-	uint32_t		node;
-	uint32_t		id;
-	uint32_t		sli;
-	uint32_t		sli_group;
-	uint64_t		sli_window_base;
-};
 
 static struct resource * thunder_pem_alloc_resource(device_t, device_t, int,
     int *, rman_res_t, rman_res_t, rman_res_t, u_int);
@@ -174,11 +160,13 @@ static device_method_t thunder_pem_methods[] = {
 	DEVMETHOD_END
 };
 
-static driver_t thunder_pem_driver = {
+DEFINE_CLASS_0(pcib, thunder_pem_driver, thunder_pem_methods,
-	"pcib",
+    sizeof(struct thunder_pem_softc));
-	thunder_pem_methods,
+
-	sizeof(struct thunder_pem_softc),
+static devclass_t thunder_pem_devclass;
-};
+
+DRIVER_MODULE(thunder_pem, pci, thunder_pem_driver, thunder_pem_devclass, 0, 0);
+MODULE_DEPEND(thunder_pem, pci, 1, 1, 1);
 
 static int
 thunder_pem_maxslots(device_t dev)
@@ -526,6 +514,8 @@ thunder_pem_probe(device_t dev)
 static int
 thunder_pem_attach(device_t dev)
 {
+	devclass_t pci_class;
+	device_t parent;
 	struct thunder_pem_softc *sc;
 	int error;
 	int rid;
@@ -533,8 +523,14 @@ thunder_pem_attach(device_t dev)
 	sc = device_get_softc(dev);
 	sc->dev = dev;
 
-	/* Allocate memory for BAR(0) */
+	/* Allocate memory for resource */
-	rid = PCIR_BAR(0);
+	pci_class = devclass_find("pci");
+	parent = device_get_parent(dev);
+	if (device_get_devclass(parent) == pci_class)
+		rid = PCIR_BAR(0);
+	else
+		rid = RID_PEM_SPACE;
+
 	sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 	    &rid, RF_ACTIVE);
 	if (sc->reg == NULL) {
@@ -583,6 +579,13 @@ thunder_pem_attach(device_t dev)
 		goto fail_mem;
 	}
 
+	/*
+	 * We ignore the values that may have been provided in FDT
+	 * and configure ranges according to the below formula
+	 * for all types of devices. This is because some DTBs provided
+	 * by EFI do not have proper ranges property or don't have them
+	 * at all.
+	 */
 	/* Fill memory window */
 	sc->ranges[0].pci_base = PCI_MEMORY_BASE;
 	sc->ranges[0].size = PCI_MEMORY_SIZE;
@@ -639,8 +642,3 @@ thunder_pem_detach(device_t dev)
 
 	return (0);
 }
-
-static devclass_t thunder_pem_devclass;
-
-DRIVER_MODULE(thunder_pem, pci, thunder_pem_driver, thunder_pem_devclass, 0, 0);
-MODULE_DEPEND(thunder_pem, pci, 1, 1, 1);

sys/arm64/cavium/thunder_pcie_pem.h

@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 Cavium Inc.
+ * All rights reserved.
+ *
+ * Developed by Semihalf.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+
+#ifndef __THUNDER_PCIE_PEM_H__
+#define	__THUNDER_PCIE_PEM_H__
+
+#define	THUNDER_PEM_DESC		"ThunderX PEM"
+
+struct thunder_pem_softc {
+	device_t		dev;
+	struct resource		*reg;
+	bus_space_tag_t		reg_bst;
+	bus_space_handle_t	reg_bsh;
+	struct pcie_range	ranges[RANGES_TUPLES_MAX];
+	struct rman		mem_rman;
+	struct rman		io_rman;
+	bus_space_handle_t	pem_sli_base;
+	uint32_t		node;
+	uint32_t		id;
+	uint32_t		sli;
+	uint32_t		sli_group;
+	uint64_t		sli_window_base;
+};
+
+#endif

sys/arm64/cavium/thunder_pcie_pem_fdt.c

@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 Cavium Inc.
+ * All rights reserved.
+ *
+ * Developed by Semihalf.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/types.h>
+#include <sys/sysctl.h>
+#include <sys/kernel.h>
+#include <sys/rman.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/endian.h>
+#include <sys/cpuset.h>
+
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include "thunder_pcie_common.h"
+#include "thunder_pcie_pem.h"
+
+static int thunder_pem_fdt_probe(device_t);
+
+static device_method_t thunder_pem_fdt_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		thunder_pem_fdt_probe),
+
+	/* End */
+	DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(pcib, thunder_pem_fdt_driver, thunder_pem_fdt_methods,
+    sizeof(struct thunder_pem_softc), thunder_pem_driver);
+
+static devclass_t thunder_pem_fdt_devclass;
+
+DRIVER_MODULE(thunder_pem, simplebus, thunder_pem_fdt_driver,
+    thunder_pem_fdt_devclass, 0, 0);
+DRIVER_MODULE(thunder_pem, ofwbus, thunder_pem_fdt_driver,
+    thunder_pem_fdt_devclass, 0, 0);
+
+static int
+thunder_pem_fdt_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (ofw_bus_is_compatible(dev, "cavium,pci-host-thunder-pem")) {
+		device_set_desc(dev, THUNDER_PEM_DESC);
+		return (BUS_PROBE_DEFAULT);
+	}
+
+	return (ENXIO);
+}

sys/arm64/include/devmap.h

@@ -37,8 +37,6 @@ struct arm_devmap_entry {
 	vm_offset_t	pd_va;		/* virtual address */
 	vm_paddr_t	pd_pa;		/* physical address */
 	vm_size_t	pd_size;	/* size of region */
-	vm_prot_t	pd_prot;	/* protection code */
-	int		pd_cache;	/* cache attributes */
 };
 
 /*
@@ -70,7 +68,7 @@ void arm_devmap_register_table(const struct arm_devmap_entry * _table);
  * custom initarm() routines in older code.  If the table pointer is NULL, this
  * will use the table installed previously by arm_devmap_register_table().
  */
-void arm_devmap_bootstrap(vm_offset_t _l1pt, 
+void arm_devmap_bootstrap(vm_offset_t _l1pt,
     const struct arm_devmap_entry *_table);
 
 /*

sys/boot/efi/boot1/Makefile.depend

@@ -3,6 +3,8 @@
 
 DIRDEPS = \
 	include \
+	include/xlocale \
+	lib/libstand \
 
 
 .include <dirdeps.mk>

sys/boot/fdt/dts/arm/bananapi.dts

@@ -30,7 +30,6 @@
 
 #include "sun7i-a20.dtsi"
 
-
 #include <dt-bindings/gpio/gpio.h>
 
 / {
@@ -68,6 +67,8 @@
 		gmac@01c50000 {
 			phy-mode = "rgmii-bpi";
 			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&gmac_pins_rgmii>;
 		};
 
 		ahci: sata@01c18000 {

sys/boot/fdt/dts/arm/cubieboard.dts

@@ -28,7 +28,7 @@
 
 /dts-v1/;
 
-/include/ "sun4i-a10.dtsi"
+#include "sun4i-a10.dtsi"
 
 / {
 	model = "Cubietech Cubieboard";
@@ -63,6 +63,8 @@
 
 		emac@01c0b000 {
 			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&emac_pins>;
 		};
 
 		ahci: sata@01c18000 {

sys/boot/fdt/dts/arm/pandaboard-common.dtsi

@@ -41,6 +41,10 @@
 			reg = <0x48240200 0x20>;
 			interrupts = <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
+
+		elm: elm@48078000 {
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 	chosen {
 		stdin = "serial2";

sys/boot/fdt/dts/arm/sun4i-a10.dtsi

@@ -26,6 +26,8 @@
  * $FreeBSD$
  */
 
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
 / {
 	compatible = "allwinner,sun4i-a10";
 	#address-cells = <1>;
@@ -87,6 +89,17 @@
 			reg =<  0x01c20800 0x400 >;
 			interrupts = < 28 >;
 			interrupt-parent = <&AINTC>;
+
+			emac_pins: emac@0 {
+				allwinner,pins = "PA0", "PA1", "PA2",
+						"PA3", "PA4", "PA5", "PA6",
+						"PA7", "PA8", "PA9", "PA10",
+						"PA11", "PA12", "PA13", "PA14",
+						"PA15", "PA16";
+				allwinner,function = "emac";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
 		};
 
 		usb1: usb@01c14000 {

sys/boot/fdt/dts/arm/sun7i-a20.dtsi

@@ -27,6 +27,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
 
 / {
 	compatible = "allwinner,sun7i-a20";
@@ -113,6 +114,29 @@
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&GIC>;
+
+			gmac_pins_mii: gmac_mii@0 {
+				allwinner,pins = "PA0", "PA1", "PA2",
+						"PA3", "PA4", "PA5", "PA6",
+						"PA7", "PA8", "PA9", "PA10",
+						"PA11", "PA12", "PA13", "PA14",
+						"PA15", "PA16";
+				allwinner,function = "gmac";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			gmac_pins_rgmii: gmac_rgmii@0 {
+				allwinner,pins = "PA0", "PA1", "PA2",
+						"PA3", "PA4", "PA5", "PA6",
+						"PA7", "PA8", "PA10",
+						"PA11", "PA12", "PA13",
+						"PA15", "PA16";
+				allwinner,function = "gmac";
+				allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
 		};
 
 		usb1: usb@01c14000 {
@@ -180,6 +204,14 @@
 			interrupts = <27>;
 			interrupt-parent = <&GIC>;
 		};
+
+		codec: codec@01c22c00 {
+			compatible = "allwinner,sun7i-a20-codec";
+			reg = <0x01c22c00 0x40>;
+			interrupts = <30>;
+			interrupt-parent = <&GIC>;
+			status = "disabled";
+		};
 	};
 };
 

sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c

@@ -314,7 +314,7 @@ vdev_geom_io(struct g_consumer *cp, int cmd, void *data, off_t offset, off_t siz
 	error = 0;
 
 	for (; off < offset; off += maxio, p += maxio, size -= maxio) {
-		bzero(bp, sizeof(*bp));
+		g_reset_bio(bp);
 		bp->bio_cmd = cmd;
 		bp->bio_done = NULL;
 		bp->bio_offset = off;

sys/conf/files.arm64

@@ -52,10 +52,11 @@ arm64/arm64/uma_machdep.c	standard
 arm64/arm64/unwind.c		optional	ddb | kdtrace_hooks | stack
 arm64/arm64/vfp.c		standard
 arm64/arm64/vm_machdep.c	standard
-arm64/cavium/thunder_pcie.c	optional	soc_cavm_thunderx pci
+arm64/cavium/thunder_pcie.c		optional	soc_cavm_thunderx pci
-arm64/cavium/thunder_pcie_fdt.c	optional	soc_cavm_thunderx pci fdt
+arm64/cavium/thunder_pcie_fdt.c		optional	soc_cavm_thunderx pci fdt
-arm64/cavium/thunder_pcie_pem.c	optional	soc_cavm_thunderx pci
+arm64/cavium/thunder_pcie_pem.c		optional	soc_cavm_thunderx pci
-arm64/cavium/thunder_pcie_common.c	optional soc_cavm_thunderx pci
+arm64/cavium/thunder_pcie_pem_fdt.c	optional	soc_cavm_thunderx pci fdt
+arm64/cavium/thunder_pcie_common.c	optional	soc_cavm_thunderx pci
 arm64/cloudabi64/cloudabi64_sysvec.c	optional compat_cloudabi64
 crypto/blowfish/bf_enc.c	optional	crypto | ipsec
 crypto/des/des_enc.c		optional	crypto | ipsec | netsmb

sys/conf/kern.post.mk

@@ -50,7 +50,7 @@ modules-${target}:
 LOCALBASE?=	/usr/local
 # SRC_BASE is how the ports tree refers to the location of the base source files
 .if !defined(SRC_BASE)
-SRC_BASE!=	realpath "${SYSDIR:H}/"
+SRC_BASE=	${SYSDIR:H:tA}
 .endif
 # OSVERSION is used by some ports to determine build options
 .if !defined(OSRELDATE)

sys/conf/kmod.mk

@@ -249,8 +249,7 @@ _ILINKS+=x86
 .endif
 CLEANFILES+=${_ILINKS}
 
-all: beforebuild .WAIT ${PROG}
+all: ${PROG}
-beforebuild: objwarn
 
 beforedepend: ${_ILINKS}
 beforebuild: ${_ILINKS}

sys/conf/options.arm

@@ -38,6 +38,8 @@ SOCDEV_PA		opt_global.h
 SOCDEV_VA		opt_global.h
 PV_STATS		opt_pmap.h
 QEMU_WORKAROUNDS	opt_global.h
+SOC_ALLWINNER_A10	opt_global.h
+SOC_ALLWINNER_A20	opt_global.h
 SOC_BCM2835		opt_global.h
 SOC_BCM2836		opt_global.h
 SOC_IMX51		opt_global.h

sys/dev/ae/if_ae.c

@@ -1660,7 +1660,7 @@ ae_stop_rxmac(ae_softc_t *sc)
 	/*
 	 * Wait for IDLE state.
 	 */
-	for (i = 0; i < AE_IDLE_TIMEOUT; i--) {
+	for (i = 0; i < AE_IDLE_TIMEOUT; i++) {
 		val = AE_READ_4(sc, AE_IDLE_REG);
 		if ((val & (AE_IDLE_RXMAC | AE_IDLE_DMAWRITE)) == 0)
 			break;

sys/dev/ata/chipsets/ata-promise.c

@@ -191,7 +191,7 @@ ata_promise_probe(device_t dev)
 	!BUS_READ_IVAR(device_get_parent(GRANDPARENT(dev)),
 		       GRANDPARENT(dev), PCI_IVAR_DEVID, &devid) &&
 	((devid == ATA_DEC_21150) || (devid == ATA_DEC_21150_1))) {
-	static long start = 0, end = 0;
+	static rman_res_t start = 0, end = 0;
 
 	if (pci_get_slot(dev) == 1) {
 	    bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &end);

sys/dev/ata/chipsets/ata-serverworks.c

@@ -162,9 +162,8 @@ ata_serverworks_chipinit(device_t dev)
 	}
     }
     else {
-	pci_write_config(dev, 0x5a,
+	pci_write_config(dev, 0x5a, (pci_read_config(dev, 0x5a, 1) & ~0x40) |
-			 (pci_read_config(dev, 0x5a, 1) & ~0x40) |
+	    ((ctlr->chip->cfg1 == SWKS_100) ? 0x03 : 0x02), 1);
-			 (ctlr->chip->cfg1 == SWKS_100) ? 0x03 : 0x02, 1);
     }
     ctlr->setmode = ata_serverworks_setmode;
     return 0;

sys/dev/filemon/filemon_wrapper.c

@@ -96,7 +96,7 @@ filemon_pid_check(struct proc *p)
 		return (NULL);
 	}
 	sx_slock(&proctree_lock);
-	while (p != initproc) {
+	while (p->p_pid != 0) {
 		TAILQ_FOREACH(filemon, &filemons_inuse, link) {
 			if (p == filemon->p) {
 				sx_sunlock(&proctree_lock);

sys/dev/ichsmb/ichsmb_pci.c

@@ -92,6 +92,7 @@ __FBSDID("$FreeBSD$");
 #define ID_WCPT				0x8ca28086
 #define ID_WCPTLP			0x9ca28086
 #define	ID_WELLSBURG			0x8d228086
+#define	ID_SRPT				0xa1238086
 
 #define PCIS_SERIALBUS_SMBUS_PROGIF	0x00
 
@@ -216,6 +217,9 @@ ichsmb_pci_probe(device_t dev)
 	case ID_WELLSBURG:
 		device_set_desc(dev, "Intel Wellsburg SMBus controller");
 		break;
+	case ID_SRPT:
+		device_set_desc(dev, "Intel Sunrise Point-H SMBus controller");
+		break;
 	default:
 		return (ENXIO);
 	}

sys/dev/mmc/mmcsd.c

@@ -65,6 +65,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/module.h>
 #include <sys/mutex.h>
 #include <sys/time.h>
+#include <geom/geom.h>
 #include <geom/geom_disk.h>
 
 #include <dev/mmc/mmcbrvar.h>
@@ -487,7 +488,7 @@ mmcsd_dump(void *arg, void *virtual, vm_offset_t physical,
 	if (!length)
 		return (0);
 
-	bzero(&bp, sizeof(struct bio));
+	g_reset_bio(&bp);
 	bp.bio_disk = disk;
 	bp.bio_pblkno = offset / disk->d_sectorsize;
 	bp.bio_bcount = length;

sys/dev/ofw/openfirm.h

@@ -176,7 +176,7 @@ int		OF_interpret(const char *cmd, int nreturns, ...);
  */
 #ifndef __sparc64__
 int		OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *ptag,
-		    bus_space_handle_t *phandle);
+		    bus_space_handle_t *phandle, bus_size_t *sz);
 #endif
 
 #endif /* _KERNEL */

sys/dev/pci/pci_pci.c

@@ -388,7 +388,7 @@ pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
 	char buf[64];
 	int error, rid;
 
-	if (max_address != (u_long)max_address)
+	if (max_address != (rman_res_t)max_address)
 		max_address = ~0ul;
 	w->rman.rm_start = 0;
 	w->rman.rm_end = max_address;
@@ -1247,14 +1247,14 @@ pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
 		return (ENOSPC);
 	}
 
-	wmask = (1ul << w->step) - 1;
+	wmask = ((rman_res_t)1 << w->step) - 1;
 	if (RF_ALIGNMENT(flags) < w->step) {
 		flags &= ~RF_ALIGNMENT_MASK;
 		flags |= RF_ALIGNMENT_LOG2(w->step);
 	}
 	start &= ~wmask;
 	end |= wmask;
-	count = roundup2(count, 1ul << w->step);
+	count = roundup2(count, (rman_res_t)1 << w->step);
 	rid = w->reg;
 	res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
 	    flags & ~RF_ACTIVE);
@@ -1389,7 +1389,7 @@ pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
 		end = w->rman.rm_end;
 	if (start + count - 1 > end || start + count < start)
 		return (EINVAL);
-	wmask = (1ul << w->step) - 1;
+	wmask = ((rman_res_t)1 << w->step) - 1;
 
 	/*
 	 * If there is no resource at all, just try to allocate enough
@@ -1435,7 +1435,7 @@ pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
 		device_printf(sc->dev,
 		    "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
 		    w->name, start, end, count);
-	align = 1ul << RF_ALIGNMENT(flags);
+	align = (rman_res_t)1 << RF_ALIGNMENT(flags);
 	if (start < w->base) {
 		if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
 		    0 || start_free != w->base)

sys/dev/random/nehemiah.c

@@ -131,9 +131,10 @@ nehemiah_modevent(module_t mod, int type, void *unused)
 		break;
 
 	case MOD_UNLOAD:
-		if (via_feature_rng & VIA_HAS_RNG)
+		if (via_feature_rng & VIA_HAS_RNG) {
 			random_nehemiah_deinit();
 			random_source_deregister(&random_nehemiah);
+		}
 		break;
 
 	case MOD_SHUTDOWN:

sys/dev/tsec/if_tsec_fdt.c

@@ -167,7 +167,7 @@ tsec_fdt_attach(device_t dev)
 	}
 
 	phy = OF_node_from_xref(phy);
-	OF_decode_addr(OF_parent(phy), 0, &sc->phy_bst, &sc->phy_bsh);
+	OF_decode_addr(OF_parent(phy), 0, &sc->phy_bst, &sc->phy_bsh, NULL);
 	OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));
 
 	/* Init timer */

sys/dev/uart/uart_cpu_fdt.c

@@ -212,5 +212,5 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->stopbits = 1;
 	di->parity = UART_PARITY_NONE;
 
-	return (OF_decode_addr(node, 0, &di->bas.bst, &di->bas.bsh));
+	return (OF_decode_addr(node, 0, &di->bas.bst, &di->bas.bsh, NULL));
 }

sys/dev/uart/uart_cpu_powerpc.c

@@ -180,7 +180,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	if (class == NULL)
 		return (ENXIO);
 
-	error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh);
+	error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh, NULL);
 	if (error)
 		return (error);