Support RISC-V implementations that do not manage the A and D bits

(e.g. RocketChip, lowRISC and derivatives).

RISC-V page table entries support A (accessed) and D (dirty) bits. The
spec makes hardware support for these bits optional. Implementations that
do not manage these bits in hardware raise page faults for accesses to a
valid page without A set and writes to a writable page without D set.
Check for these types of faults when handling a page fault and fixup the
PTE without calling vm_fault if they occur.

Reviewed by:	jhb, markj
Approved by:	re (gjb)
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D17424

This commit is contained in:

Ruslan Bukin

2018-10-18 15:08:14 +00:00

parent 4520f617c9

commit 53c6ad1d62

10 changed files with 89 additions and 13 deletions

sys/arm/conf/GENERIC-MMCCAM

View File

@@ -20,3 +20,6 @@ device		pass
 nodevice	mmc
 nodevice	mmcsd
 # dwmmc_altera.c fails to build
 nodevice	dwmmc