From 50c55142271e40c6e58fecf7361ec776dd63b254 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Wed, 9 Oct 2013 02:01:20 +0000 Subject: [PATCH] Fix interrupt handling from the APB periperals (ie, UART) - it also requires an explicit acknowledgement. Tested: * AR9344 (DB120) SoC Approved by: re@ (gjb) --- sys/mips/atheros/apb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/mips/atheros/apb.c b/sys/mips/atheros/apb.c index ef44e0ad47f..94cb1aa58e1 100644 --- a/sys/mips/atheros/apb.c +++ b/sys/mips/atheros/apb.c @@ -359,6 +359,9 @@ apb_filter(void *arg) case AR71XX_SOC_AR7242: case AR71XX_SOC_AR9330: case AR71XX_SOC_AR9331: + case AR71XX_SOC_AR9341: + case AR71XX_SOC_AR9342: + case AR71XX_SOC_AR9344: /* Ack/clear the irq on status register for AR724x */ ATH_WRITE_REG(AR71XX_MISC_INTR_STATUS, reg & ~(1 << irq));