diff --git a/COPYRIGHT b/COPYRIGHT
index f35a1efb4b9..f1dce1ea287 100644
--- a/COPYRIGHT
+++ b/COPYRIGHT
@@ -4,7 +4,7 @@
 The compilation of software known as FreeBSD is distributed under the
 following terms:
 
-Copyright (c) 1992-2017 The FreeBSD Project. All rights reserved.
+Copyright (c) 1992-2018 The FreeBSD Project. All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions
diff --git a/Makefile.inc1 b/Makefile.inc1
index 73afbbfcbbc..ab7ce00ee55 100644
--- a/Makefile.inc1
+++ b/Makefile.inc1
@@ -262,10 +262,11 @@ SUBDIR+=	tests
 SUBDIR+=contrib/ofed
 .endif
 
-# Local directories are last, since it is nice to at least get the base
-# system rebuilt before you do them.
+# Local directories are built in parallel with the base system directories.
+# Users may insert a .WAIT directive at the beginning or elsewhere within
+# the LOCAL_DIRS and LOCAL_LIB_DIRS lists as needed.
 .for _DIR in ${LOCAL_DIRS}
-.if exists(${.CURDIR}/${_DIR}/Makefile)
+.if ${_DIR} == ".WAIT" || exists(${.CURDIR}/${_DIR}/Makefile)
 SUBDIR+=	${_DIR}
 .endif
 .endfor
@@ -276,7 +277,7 @@ SUBDIR+=	${_DIR}
 _REDUNDANT_LIB_DIRS+=    ${LOCAL_LIB_DIRS:M${_DIR}*}
 .endfor
 .for _DIR in ${LOCAL_LIB_DIRS}
-.if empty(_REDUNDANT_LIB_DIRS:M${_DIR}) && exists(${.CURDIR}/${_DIR}/Makefile)
+.if ${_DIR} == ".WAIT" || (empty(_REDUNDANT_LIB_DIRS:M${_DIR}) && exists(${.CURDIR}/${_DIR}/Makefile))
 SUBDIR+=	${_DIR}
 .endif
 .endfor
@@ -2445,7 +2446,7 @@ _generic_libs=	${_cddl_lib} gnu/lib ${_kerberos5_lib} lib ${_secure_lib} usr.bin
 _generic_libs+=	sbin/ipf/libipf
 .endif
 .for _DIR in ${LOCAL_LIB_DIRS}
-.if exists(${.CURDIR}/${_DIR}/Makefile) && empty(_generic_libs:M${_DIR})
+.if ${_DIR} == ".WAIT"  || (empty(_generic_libs:M${_DIR}) && exists(${.CURDIR}/${_DIR}/Makefile))
 _generic_libs+= ${_DIR}
 .endif
 .endfor
diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc
index 81d521de759..74b3400b35a 100644
--- a/ObsoleteFiles.inc
+++ b/ObsoleteFiles.inc
@@ -38,7 +38,7 @@
 #   xargs -n1 | sort | uniq -d;
 # done
 
-# 2017mmdd: new clang import which bumps version from 5.0.1 to 6.0.0.
+# 2018mmdd: new clang import which bumps version from 5.0.1 to 6.0.0.
 OLD_FILES+=usr/lib/clang/5.0.1/include/sanitizer/allocator_interface.h
 OLD_FILES+=usr/lib/clang/5.0.1/include/sanitizer/asan_interface.h
 OLD_FILES+=usr/lib/clang/5.0.1/include/sanitizer/common_interface_defs.h
@@ -155,6 +155,8 @@ OLD_FILES+=usr/lib/clang/5.0.1/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_
 OLD_DIRS+=usr/lib/clang/5.0.1/lib/freebsd
 OLD_DIRS+=usr/lib/clang/5.0.1/lib
 OLD_DIRS+=usr/lib/clang/5.0.1
+# 20171230: Remove /etc/skel from mtree
+OLD_DIRS+=/etc/skel
 # 20171208: Remove basename_r(3)
 OLD_FILES+=usr/share/man/man3/basename_r.3.gz
 # 20171204: Move fdformat man page from volume 1 to volume 8.
diff --git a/UPDATING b/UPDATING
index 799a1755e47..dfe3c2b5b14 100644
--- a/UPDATING
+++ b/UPDATING
@@ -51,6 +51,20 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 12.x IS SLOW:
 
 ****************************** SPECIAL WARNING: ******************************
 
+20180104:
+	The use of RSS hash from the network card aka flowid has been
+	disabled by default for lagg(4) as it's currently incompatible with
+	the lacp and loadbalance protocols.
+
+	This can be re-enabled by setting the following in loader.conf:
+	net.link.lagg.default_use_flowid="1"
+
+20180102:
+	The SW_WATCHDOG option is no longer necessary to enable the
+	hardclock-based software watchdog if no hardware watchdog is
+	configured. As before, SW_WATCHDOG will cause the software
+	watchdog to be enabled even if a hardware watchdog is configured.
+
 20171215:
 	r326887 fixes the issue described in the 20171214 UPDATING entry.
 	r326888 flips the switch back to building GELI support always.
diff --git a/bin/cat/cat.c b/bin/cat/cat.c
index 4632b88f56c..b69adbdcd7f 100644
--- a/bin/cat/cat.c
+++ b/bin/cat/cat.c
@@ -300,6 +300,7 @@ cook_cat(FILE *fp)
 static void
 raw_cat(int rfd)
 {
+	long pagesize;
 	int off, wfd;
 	ssize_t nr, nw;
 	static size_t bsize;
@@ -316,9 +317,12 @@ raw_cat(int rfd)
 				bsize = MIN(BUFSIZE_MAX, MAXPHYS * 8);
 			else
 				bsize = BUFSIZE_SMALL;
-		} else
-			bsize = MAX(sbuf.st_blksize,
-			    (blksize_t)sysconf(_SC_PAGESIZE));
+		} else {
+			bsize = sbuf.st_blksize;
+			pagesize = sysconf(_SC_PAGESIZE);
+			if (pagesize > 0)
+				bsize = MAX(bsize, (size_t)pagesize);
+		}
 		if ((buf = malloc(bsize)) == NULL)
 			err(1, "malloc() failure of IO buffer");
 	}
diff --git a/bin/sh/jobs.c b/bin/sh/jobs.c
index d5293a08158..60cd1484911 100644
--- a/bin/sh/jobs.c
+++ b/bin/sh/jobs.c
@@ -75,6 +75,42 @@ __FBSDID("$FreeBSD$");
 #include "builtins.h"
 
 
+/*
+ * A job structure contains information about a job.  A job is either a
+ * single process or a set of processes contained in a pipeline.  In the
+ * latter case, pidlist will be non-NULL, and will point to a -1 terminated
+ * array of pids.
+ */
+
+struct procstat {
+	pid_t pid;		/* process id */
+	int status;		/* status flags (defined above) */
+	char *cmd;		/* text of command being run */
+};
+
+
+/* states */
+#define JOBSTOPPED 1		/* all procs are stopped */
+#define JOBDONE 2		/* all procs are completed */
+
+
+struct job {
+	struct procstat ps0;	/* status of process */
+	struct procstat *ps;	/* status or processes when more than one */
+	short nprocs;		/* number of processes */
+	pid_t pgrp;		/* process group of this job */
+	char state;		/* true if job is finished */
+	char used;		/* true if this entry is in used */
+	char changed;		/* true if status has changed */
+	char foreground;	/* true if running in the foreground */
+	char remembered;	/* true if $! referenced */
+#if JOBS
+	char jobctl;		/* job running under job control */
+	struct job *next;	/* job used after this one */
+#endif
+};
+
+
 static struct job *jobtab;	/* array of jobs */
 static int njobs;		/* size of array */
 static pid_t backgndpid = -1;	/* pid of last background process */
diff --git a/bin/sh/jobs.h b/bin/sh/jobs.h
index 888d6042a3f..d0caf063861 100644
--- a/bin/sh/jobs.h
+++ b/bin/sh/jobs.h
@@ -40,40 +40,7 @@
 
 #include <signal.h>		/* for sig_atomic_t */
 
-/*
- * A job structure contains information about a job.  A job is either a
- * single process or a set of processes contained in a pipeline.  In the
- * latter case, pidlist will be non-NULL, and will point to a -1 terminated
- * array of pids.
- */
-
-struct procstat {
-	pid_t pid;		/* process id */
-	int status;		/* status flags (defined above) */
-	char *cmd;		/* text of command being run */
-};
-
-
-/* states */
-#define JOBSTOPPED 1		/* all procs are stopped */
-#define JOBDONE 2		/* all procs are completed */
-
-
-struct job {
-	struct procstat ps0;	/* status of process */
-	struct procstat *ps;	/* status or processes when more than one */
-	short nprocs;		/* number of processes */
-	pid_t pgrp;		/* process group of this job */
-	char state;		/* true if job is finished */
-	char used;		/* true if this entry is in used */
-	char changed;		/* true if status has changed */
-	char foreground;	/* true if running in the foreground */
-	char remembered;	/* true if $! referenced */
-#if JOBS
-	char jobctl;		/* job running under job control */
-	struct job *next;	/* job used after this one */
-#endif
-};
+struct job;
 
 enum {
 	SHOWJOBS_DEFAULT,	/* job number, status, command */
diff --git a/contrib/elftoolchain/elfcopy/binary.c b/contrib/elftoolchain/elfcopy/binary.c
index ad86a6533c5..0b56ae0566c 100644
--- a/contrib/elftoolchain/elfcopy/binary.c
+++ b/contrib/elftoolchain/elfcopy/binary.c
@@ -101,10 +101,10 @@ create_binary(int ifd, int ofd)
 		    sh.sh_size == 0)
 			continue;
 		(void) elf_errno();
-		if ((d = elf_getdata(scn, NULL)) == NULL) {
+		if ((d = elf_rawdata(scn, NULL)) == NULL) {
 			elferr = elf_errno();
 			if (elferr != 0)
-				warnx("elf_getdata failed: %s", elf_errmsg(-1));
+				warnx("elf_rawdata failed: %s", elf_errmsg(-1));
 			continue;
 		}
 		if (d->d_buf == NULL || d->d_size == 0)
diff --git a/etc/mtree/BSD.root.dist b/etc/mtree/BSD.root.dist
index 4ee3b89746c..db05eeb348f 100644
--- a/etc/mtree/BSD.root.dist
+++ b/etc/mtree/BSD.root.dist
@@ -70,8 +70,6 @@
         ..
         security
         ..
-        skel
-        ..
         ssh
         ..
         ssl
diff --git a/etc/mtree/BSD.tests.dist b/etc/mtree/BSD.tests.dist
index d025fbf62fc..944f080f232 100644
--- a/etc/mtree/BSD.tests.dist
+++ b/etc/mtree/BSD.tests.dist
@@ -664,6 +664,8 @@
         ..
         file2c
         ..
+        find
+        ..
         fold
         ..
         getconf
diff --git a/etc/services b/etc/services
index 2b5e3e0618b..246504de919 100644
--- a/etc/services
+++ b/etc/services
@@ -2291,6 +2291,7 @@ ipfix		4739/udp   #IP Flow Info Export
 ipfixs		4740/sctp  #ipfix protocol over DTLS
 ipfixs		4740/tcp   #ipfix protocol over TLS
 ipfixs		4740/udp   #ipfix protocol over DTLS
+vxlan		4789/udp   #Virtual eXtensible Local Area Network (VXLAN)
 commplex-main	5000/tcp
 commplex-main	5000/udp
 commplex-link	5001/tcp
diff --git a/lib/libc/gen/isgreater.3 b/lib/libc/gen/isgreater.3
index 9a6d85cd50c..27e958f19b0 100644
--- a/lib/libc/gen/isgreater.3
+++ b/lib/libc/gen/isgreater.3
@@ -75,9 +75,9 @@ macro takes arguments
 .Fa x
 and
 .Fa y
-and returns non-zero if and only if neither
+and returns non-zero if and only if any of
 .Fa x
-nor
+or
 .Fa y
 are NaNs.
 For any pair of floating-point values, one
diff --git a/lib/libc/gen/pw_scan.c b/lib/libc/gen/pw_scan.c
index 82679311429..7e88a227cf4 100644
--- a/lib/libc/gen/pw_scan.c
+++ b/lib/libc/gen/pw_scan.c
@@ -44,9 +44,7 @@ __FBSDID("$FreeBSD$");
 
 #include <err.h>
 #include <errno.h>
-#include <fcntl.h>
 #include <pwd.h>
-#include <stdio.h>
 #include <string.h>
 #include <stdlib.h>
 #include <unistd.h>
diff --git a/lib/libc/locale/xlocale.c b/lib/libc/locale/xlocale.c
index 86ef8b53bc0..87160b26b4d 100644
--- a/lib/libc/locale/xlocale.c
+++ b/lib/libc/locale/xlocale.c
@@ -275,7 +275,7 @@ locale_t newlocale(int mask, const char *locale, locale_t base)
 	for (type=0 ; type<XLC_LAST ; type++) {
 		if (mask & 1) {
 			if (useenv) {
-				realLocale = __get_locale_env(type);
+				realLocale = __get_locale_env(type + 1);
 			}
 			new->components[type] =
 			     constructors[type](realLocale, new);
diff --git a/lib/libc/net/rcmd.c b/lib/libc/net/rcmd.c
index 38a150452d2..3cb475a6bec 100644
--- a/lib/libc/net/rcmd.c
+++ b/lib/libc/net/rcmd.c
@@ -457,8 +457,8 @@ iruserok_sa(const void *ra, int rlen, int superuser, const char *ruser,
 		first = 0;
 		if ((pwd = getpwnam(luser)) == NULL)
 			return (-1);
-		(void)strcpy(pbuf, pwd->pw_dir);
-		(void)strcat(pbuf, "/.rhosts");
+		(void)strlcpy(pbuf, pwd->pw_dir, sizeof(pbuf));
+		(void)strlcat(pbuf, "/.rhosts", sizeof(pbuf));
 
 		/*
 		 * Change effective uid while opening .rhosts.  If root and
diff --git a/lib/libcasper/libcasper/libcasper.3 b/lib/libcasper/libcasper/libcasper.3
index c7beb300e14..896674d6f71 100644
--- a/lib/libcasper/libcasper/libcasper.3
+++ b/lib/libcasper/libcasper/libcasper.3
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd October 29, 2017
+.Dd January 3, 2018
 .Dt LIBCASPER 3
 .Os
 .Sh NAME
@@ -190,6 +190,30 @@ obtained via the
 .Fn cap_init
 function.
 The function returns capability that provides access to opened service.
+Casper supports the following services in the base system:
+.Bl -tag -width "system.random" -compact -offset indent
+.Pp
+.It system.dns
+provides DNS libc compatible API
+.It system.grp
+provides
+.Xr getgrent 3
+compatible API
+.It system.pwd
+provides
+.Xr getpwent 3
+compatible API
+.It system.random
+allows to obtain entropy from
+.Pa /dev/random
+.It system.sysctl
+provides
+.Xr sysctlbyname 3
+compatible API
+.It system.syslog
+provides
+.Xr syslog 3
+compatible API
 .Sh RETURN VALUES
 The
 .Fn cap_clone ,
diff --git a/lib/libcasper/libcasper/libcasper.h b/lib/libcasper/libcasper/libcasper.h
index 8ad15bc6510..a75017058ab 100644
--- a/lib/libcasper/libcasper/libcasper.h
+++ b/lib/libcasper/libcasper/libcasper.h
@@ -122,7 +122,15 @@ cap_wrap(int sock)
 #ifdef WITH_CASPER
 int	cap_unwrap(cap_channel_t *chan);
 #else
-#define	cap_unwrap(chan)	(chan->cch_fd)
+static inline int
+cap_unwrap(cap_channel_t *chan)
+{
+	int fd;
+
+	fd = chan->cch_fd;
+	free(chan);
+	return (fd);
+}
 #endif
 
 /*
diff --git a/lib/libcasper/services/cap_dns/tests/Makefile b/lib/libcasper/services/cap_dns/tests/Makefile
index 20049a06ccb..55c163bbdb4 100644
--- a/lib/libcasper/services/cap_dns/tests/Makefile
+++ b/lib/libcasper/services/cap_dns/tests/Makefile
@@ -7,6 +7,7 @@ TAP_TESTS_C=	dns_test
 .if ${MK_CASPER} != "no"
 LIBADD+=	casper
 LIBADD+=	cap_dns
+CFLAGS+=-DWITH_CASPER
 .endif
 LIBADD+=	nv
 
diff --git a/lib/libcasper/services/cap_grp/tests/Makefile b/lib/libcasper/services/cap_grp/tests/Makefile
index b1b7e05d0ee..ff2f2f18e25 100644
--- a/lib/libcasper/services/cap_grp/tests/Makefile
+++ b/lib/libcasper/services/cap_grp/tests/Makefile
@@ -7,6 +7,7 @@ TAP_TESTS_C=	grp_test
 .if ${MK_CASPER} != "no"
 LIBADD+=	casper
 LIBADD+=	cap_grp
+CFLAGS+=-DWITH_CASPER
 .endif
 LIBADD+=	nv
 
diff --git a/lib/libcasper/services/cap_pwd/tests/Makefile b/lib/libcasper/services/cap_pwd/tests/Makefile
index b4e75d346fc..d010cc45efd 100644
--- a/lib/libcasper/services/cap_pwd/tests/Makefile
+++ b/lib/libcasper/services/cap_pwd/tests/Makefile
@@ -7,6 +7,7 @@ TAP_TESTS_C=	pwd_test
 .if ${MK_CASPER} != "no"
 LIBADD+=	casper
 LIBADD+=	cap_pwd
+CFLAGS+=-DWITH_CASPER
 .endif
 LIBADD+=	nv
 
diff --git a/lib/libcasper/services/cap_sysctl/tests/Makefile b/lib/libcasper/services/cap_sysctl/tests/Makefile
index b11c45fb656..3afd703846d 100644
--- a/lib/libcasper/services/cap_sysctl/tests/Makefile
+++ b/lib/libcasper/services/cap_sysctl/tests/Makefile
@@ -7,6 +7,7 @@ TAP_TESTS_C=	sysctl_test
 .if ${MK_CASPER} != "no"
 LIBADD+=	casper
 LIBADD+=	cap_sysctl
+CFLAGS+=-DWITH_CASPER
 .endif
 LIBADD+=	nv
 
diff --git a/lib/libefivar/efivar-dp-xlate.c b/lib/libefivar/efivar-dp-xlate.c
index 58c89068645..a0a61e710dd 100644
--- a/lib/libefivar/efivar-dp-xlate.c
+++ b/lib/libefivar/efivar-dp-xlate.c
@@ -527,12 +527,17 @@ find_geom_efimedia(struct gmesh *mesh, const char *dev)
 static int
 build_dp(const char *efimedia, const char *relpath, efidp *dp)
 {
-	char *fp, *dptxt = NULL;
+	char *fp, *dptxt = NULL, *cp, *rp;
 	int rv = 0;
 	efidp out = NULL;
 	size_t len;
 
-	fp = path_to_file_dp(relpath);
+	rp = strdup(relpath);
+	for (cp = rp; *cp; cp++)
+		if (*cp == '/')
+			*cp = '\\';
+	fp = path_to_file_dp(rp);
+	free(rp);
 	if (fp == NULL) {
 		rv = ENOMEM;
 		goto errout;
@@ -663,6 +668,7 @@ path_to_dp(struct gmesh *mesh, char *path, efidp *dp)
 	free(rp);
 	if (rv != 0) {
 		free(*dp);
+		*dp = NULL;
 	}
 	return (rv);
 }
diff --git a/lib/msun/man/cacos.3 b/lib/msun/man/cacos.3
index 6d9f20a0154..ea30f9600da 100644
--- a/lib/msun/man/cacos.3
+++ b/lib/msun/man/cacos.3
@@ -136,9 +136,9 @@ corresponding ranges for the return values, adopted by the C language.
 .It Sy Function Ta Sy Branch Cut(s) Ta Sy Range
 .It cacos Ta (-\*(If, -1) \*(Un (1, \*(If) Ta [0, \*(Pi]
 .It casin Ta (-\*(If, -1) \*(Un (1, \*(If) Ta [-\*(Pi/2, \*(Pi/2]
-.It catan Ta (-\*(If*I, -i) \*(Un (I, \*(If*I) Ta [-\*(Pi/2, \*(Pi/2]
+.It catan Ta (-\*(If*I, -I) \*(Un (I, \*(If*I) Ta [-\*(Pi/2, \*(Pi/2]
 .It cacosh Ta (-\*(If, 1) Ta [-\*(Pi*I, \*(Pi*I]
-.It casinh Ta (-\*(If*I, -i) \*(Un (I, \*(If*I) Ta [-\*(Pi/2*I, \*(Pi/2*I]
+.It casinh Ta (-\*(If*I, -I) \*(Un (I, \*(If*I) Ta [-\*(Pi/2*I, \*(Pi/2*I]
 .It catanh Ta (-\*(If, -1) \*(Un (1, \*(If) Ta [-\*(Pi/2*I, \*(Pi/2*I]
 .El
 .Sh SEE ALSO
diff --git a/release/powerpc/mkisoimages.sh b/release/powerpc/mkisoimages.sh
index ef61f9cbb2e..02e2d58160a 100644
--- a/release/powerpc/mkisoimages.sh
+++ b/release/powerpc/mkisoimages.sh
@@ -23,31 +23,9 @@
 # extra-bits-dir, if provided, contains additional files to be merged
 # into base-bits-dir as part of making the image.
 
+
 if [ "$1" = "-b" ]; then
-	# Apple boot code
-	uudecode -o /tmp/hfs-boot-block.bz2 "`dirname "$0"`/hfs-boot.bz2.uu"
-	bzip2 -d /tmp/hfs-boot-block.bz2
-	OFFSET=$(hd /tmp/hfs-boot-block | grep 'Loader START' | cut -f 1 -d ' ')
-	OFFSET=0x$(echo 0x$OFFSET | awk '{printf("%x\n",$1/512);}')
-	dd if="$4/boot/loader" of=/tmp/hfs-boot-block seek=$OFFSET conv=notrunc
-
-	bootable="-o bootimage=macppc;/tmp/hfs-boot-block -o no-emul-boot"
-
-	# pSeries/PAPR boot code
-	mkdir -p "$4/ppc/chrp"
-	cp "$4/boot/loader" "$4/ppc/chrp"
-	cat > "$4/ppc/bootinfo.txt" << EOF
-<chrp-boot>
-<description>FreeBSD Install</description>
-<os-name>FreeBSD</os-name>
-<boot-script>boot &device;:,\ppc\chrp\loader</boot-script>
-</chrp-boot>
-EOF
-	bootable="$bootable -o chrp-boot"
-
-	# Playstation 3 boot code
-	echo "FreeBSD Install='/boot/loader.ps3'" > "$4/etc/kboot.conf"
-
+	bootable=1
 	shift
 else
 	bootable=""
@@ -61,6 +39,34 @@ fi
 LABEL=`echo "$1" | tr '[:lower:]' '[:upper:]'`; shift
 NAME="$1"; shift
 
+if [ -n "$bootable" ]; then
+	echo "Building bootable disc"
+
+	# Apple boot code
+	uudecode -o /tmp/hfs-boot-block.bz2 "`dirname "$0"`/hfs-boot.bz2.uu"
+	bzip2 -d /tmp/hfs-boot-block.bz2
+	OFFSET=$(hd /tmp/hfs-boot-block | grep 'Loader START' | cut -f 1 -d ' ')
+	OFFSET=0x$(echo 0x$OFFSET | awk '{printf("%x\n",$1/512);}')
+	dd if="$1/boot/loader" of=/tmp/hfs-boot-block seek=$OFFSET conv=notrunc
+
+	bootable="-o bootimage=macppc;/tmp/hfs-boot-block -o no-emul-boot"
+
+	# pSeries/PAPR boot code
+	mkdir -p "$1/ppc/chrp"
+	cp "$1/boot/loader" "$1/ppc/chrp"
+	cat > "$1/ppc/bootinfo.txt" << EOF
+<chrp-boot>
+<description>FreeBSD Install</description>
+<os-name>FreeBSD</os-name>
+<boot-script>boot &device;:,\ppc\chrp\loader</boot-script>
+</chrp-boot>
+EOF
+	bootable="$bootable -o chrp-boot"
+
+	# Petitboot config for PS3/PowerNV
+	echo FreeBSD Install=\'/boot/kernel/kernel vfs.root.mountfrom=cd9660:/dev/iso9660/$LABEL\' > "$1/etc/kboot.conf"
+fi
+
 publisher="The FreeBSD Project.  https://www.FreeBSD.org/"
 echo "/dev/iso9660/$LABEL / cd9660 ro 0 0" > "$1/etc/fstab"
 makefs -t cd9660 $bootable -o rockridge -o label="$LABEL" -o publisher="$publisher" "$NAME" "$@"
diff --git a/sbin/ccdconfig/ccdconfig.8 b/sbin/ccdconfig/ccdconfig.8
index 392b9e9aec7..778a7f921c7 100644
--- a/sbin/ccdconfig/ccdconfig.8
+++ b/sbin/ccdconfig/ccdconfig.8
@@ -1,5 +1,3 @@
-.\"	$NetBSD: ccdconfig.8,v 1.4 1996/02/28 01:01:17 thorpej Exp $
-.\"
 .\" Copyright (c) 1996 The NetBSD Foundation, Inc.
 .\" All rights reserved.
 .\"
@@ -14,13 +12,6 @@
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
-.\" 3. All advertising materials mentioning features or use of this software
-.\"    must display the following acknowledgement:
-.\"        This product includes software developed by the NetBSD
-.\"        Foundation, Inc. and its contributors.
-.\" 4. Neither the name of The NetBSD Foundation nor the names of its
-.\"    contributors may be used to endorse or promote products derived
-.\"    from this software without specific prior written permission.
 .\"
 .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -34,6 +25,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
+.\" $NetBSD: ccdconfig.8,v 1.4 1996/02/28 01:01:17 thorpej Exp $
 .\" $FreeBSD$
 .\"
 .Dd October 3, 2016
diff --git a/sbin/ccdconfig/ccdconfig.c b/sbin/ccdconfig/ccdconfig.c
index 69dccffaafd..6d22b14deed 100644
--- a/sbin/ccdconfig/ccdconfig.c
+++ b/sbin/ccdconfig/ccdconfig.c
@@ -1,7 +1,5 @@
-/*	$NetBSD: ccdconfig.c,v 1.6 1996/05/16 07:11:18 thorpej Exp $	*/
-
 /*-
- * SPDX-License-Identifier: BSD-4-Clause
+ * SPDX-License-Identifier: BSD-2-Clause
  *
  * Copyright (c) 2003 Poul-Henning Kamp
  * Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -18,13 +16,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,6 +28,8 @@
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * NetBSD: ccdconfig.c,v 1.6 1996/05/16 07:11:18 thorpej Exp $
  */
 
 #include <sys/cdefs.h>
diff --git a/sbin/ccdconfig/pathnames.h b/sbin/ccdconfig/pathnames.h
index 0b67c6dc800..85791ddbfcf 100644
--- a/sbin/ccdconfig/pathnames.h
+++ b/sbin/ccdconfig/pathnames.h
@@ -1,5 +1,3 @@
-/*	$NetBSD: pathnames.h,v 1.4 2008/04/28 20:23:07 martin Exp $	*/
-
 /*-
  * SPDX-License-Identifier: BSD-2-Clause-NetBSD
  *
@@ -30,6 +28,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
+ * $NetBSD: pathnames.h,v 1.4 2008/04/28 20:23:07 martin Exp $
  * $FreeBSD$
  */
 
diff --git a/sbin/ifconfig/ifvxlan.c b/sbin/ifconfig/ifvxlan.c
index ba4f7fa0999..7f78d2be888 100644
--- a/sbin/ifconfig/ifvxlan.c
+++ b/sbin/ifconfig/ifvxlan.c
@@ -236,25 +236,23 @@ DECL_CMD_FUNC(setvxlan_local, addr, d)
 	switch (ai->ai_family) {
 #ifdef INET
 	case AF_INET: {
-		struct in_addr addr = ((struct sockaddr_in *) sa)->sin_addr;
+		struct sockaddr_in *sin = (struct sockaddr_in *)sa;
 
-		if (IN_MULTICAST(ntohl(addr.s_addr)))
+		if (IN_MULTICAST(ntohl(sin->sin_addr.s_addr)))
 			errx(1, "local address cannot be multicast");
 
-		cmd.vxlcmd_sa.in4.sin_family = AF_INET;
-		cmd.vxlcmd_sa.in4.sin_addr = addr;
+		cmd.vxlcmd_sa.in4 = *sin;
 		break;
 	}
 #endif
 #ifdef INET6
 	case AF_INET6: {
-		struct in6_addr *addr = &((struct sockaddr_in6 *)sa)->sin6_addr;
+		struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)sa;
 
-		if (IN6_IS_ADDR_MULTICAST(addr))
+		if (IN6_IS_ADDR_MULTICAST(&sin6->sin6_addr))
 			errx(1, "local address cannot be multicast");
 
-		cmd.vxlcmd_sa.in6.sin6_family = AF_INET6;
-		cmd.vxlcmd_sa.in6.sin6_addr = *addr;
+		cmd.vxlcmd_sa.in6 = *sin6;
 		break;
 	}
 #endif
@@ -267,10 +265,10 @@ DECL_CMD_FUNC(setvxlan_local, addr, d)
 	if (!vxlan_exists(s)) {
 		if (cmd.vxlcmd_sa.sa.sa_family == AF_INET) {
 			params.vxlp_with |= VXLAN_PARAM_WITH_LOCAL_ADDR4;
-			params.vxlp_local_in4 = cmd.vxlcmd_sa.in4.sin_addr;
+			params.vxlp_local_sa.in4 = cmd.vxlcmd_sa.in4;
 		} else {
 			params.vxlp_with |= VXLAN_PARAM_WITH_LOCAL_ADDR6;
-			params.vxlp_local_in6 = cmd.vxlcmd_sa.in6.sin6_addr;
+			params.vxlp_local_sa.in6 = cmd.vxlcmd_sa.in6;
 		}
 		return;
 	}
@@ -298,25 +296,23 @@ DECL_CMD_FUNC(setvxlan_remote, addr, d)
 	switch (ai->ai_family) {
 #ifdef INET
 	case AF_INET: {
-		struct in_addr addr = ((struct sockaddr_in *)sa)->sin_addr;
+		struct sockaddr_in *sin = (struct sockaddr_in *)sa;
 
-		if (IN_MULTICAST(ntohl(addr.s_addr)))
+		if (IN_MULTICAST(ntohl(sin->sin_addr.s_addr)))
 			errx(1, "remote address cannot be multicast");
 
-		cmd.vxlcmd_sa.in4.sin_family = AF_INET;
-		cmd.vxlcmd_sa.in4.sin_addr = addr;
+		cmd.vxlcmd_sa.in4 = *sin;
 		break;
 	}
 #endif
 #ifdef INET6
 	case AF_INET6: {
-		struct in6_addr *addr = &((struct sockaddr_in6 *)sa)->sin6_addr;
+		struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)sa;
 
-		if (IN6_IS_ADDR_MULTICAST(addr))
+		if (IN6_IS_ADDR_MULTICAST(&sin6->sin6_addr))
 			errx(1, "remote address cannot be multicast");
 
-		cmd.vxlcmd_sa.in6.sin6_family = AF_INET6;
-		cmd.vxlcmd_sa.in6.sin6_addr = *addr;
+		cmd.vxlcmd_sa.in6 = *sin6;
 		break;
 	}
 #endif
@@ -329,10 +325,10 @@ DECL_CMD_FUNC(setvxlan_remote, addr, d)
 	if (!vxlan_exists(s)) {
 		if (cmd.vxlcmd_sa.sa.sa_family == AF_INET) {
 			params.vxlp_with |= VXLAN_PARAM_WITH_REMOTE_ADDR4;
-			params.vxlp_remote_in4 = cmd.vxlcmd_sa.in4.sin_addr;
+			params.vxlp_remote_sa.in4 = cmd.vxlcmd_sa.in4;
 		} else {
 			params.vxlp_with |= VXLAN_PARAM_WITH_REMOTE_ADDR6;
-			params.vxlp_remote_in6 = cmd.vxlcmd_sa.in6.sin6_addr;
+			params.vxlp_remote_sa.in6 = cmd.vxlcmd_sa.in6;
 		}
 		return;
 	}
@@ -360,25 +356,23 @@ DECL_CMD_FUNC(setvxlan_group, addr, d)
 	switch (ai->ai_family) {
 #ifdef INET
 	case AF_INET: {
-		struct in_addr addr = ((struct sockaddr_in *)sa)->sin_addr;
+		struct sockaddr_in *sin = (struct sockaddr_in *)sa;
 
-		if (!IN_MULTICAST(ntohl(addr.s_addr)))
+		if (!IN_MULTICAST(ntohl(sin->sin_addr.s_addr)))
 			errx(1, "group address must be multicast");
 
-		cmd.vxlcmd_sa.in4.sin_family = AF_INET;
-		cmd.vxlcmd_sa.in4.sin_addr = addr;
+		cmd.vxlcmd_sa.in4 = *sin;
 		break;
 	}
 #endif
 #ifdef INET6
 	case AF_INET6: {
-		struct in6_addr *addr = &((struct sockaddr_in6 *)sa)->sin6_addr;
+		struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)sa;
 
-		if (!IN6_IS_ADDR_MULTICAST(addr))
+		if (!IN6_IS_ADDR_MULTICAST(&sin6->sin6_addr))
 			errx(1, "group address must be multicast");
 
-		cmd.vxlcmd_sa.in6.sin6_family = AF_INET6;
-		cmd.vxlcmd_sa.in6.sin6_addr = *addr;
+		cmd.vxlcmd_sa.in6 = *sin6;
 		break;
 	}
 #endif
@@ -391,10 +385,10 @@ DECL_CMD_FUNC(setvxlan_group, addr, d)
 	if (!vxlan_exists(s)) {
 		if (cmd.vxlcmd_sa.sa.sa_family == AF_INET) {
 			params.vxlp_with |= VXLAN_PARAM_WITH_REMOTE_ADDR4;
-			params.vxlp_remote_in4 = cmd.vxlcmd_sa.in4.sin_addr;
+			params.vxlp_remote_sa.in4 = cmd.vxlcmd_sa.in4;
 		} else {
 			params.vxlp_with |= VXLAN_PARAM_WITH_REMOTE_ADDR6;
-			params.vxlp_remote_in6 = cmd.vxlcmd_sa.in6.sin6_addr;
+			params.vxlp_remote_sa.in6 = cmd.vxlcmd_sa.in6;
 		}
 		return;
 	}
diff --git a/sbin/newfs_msdos/mkfs_msdos.c b/sbin/newfs_msdos/mkfs_msdos.c
index 9459db65f04..7c2e4722eab 100644
--- a/sbin/newfs_msdos/mkfs_msdos.c
+++ b/sbin/newfs_msdos/mkfs_msdos.c
@@ -717,8 +717,10 @@ mkfs_msdos(const char *fname, const char *dtype, const struct msdos_options *op)
     rv = 0;
 done:
     free(img);
-    close(fd);
-    close(fd1);
+    if (fd != -1)
+	    close(fd);
+    if (fd1 != -1)
+	    close(fd1);
 
     return rv;
 }
diff --git a/sbin/shutdown/shutdown.8 b/sbin/shutdown/shutdown.8
index b388aaf92fe..557a942bb40 100644
--- a/sbin/shutdown/shutdown.8
+++ b/sbin/shutdown/shutdown.8
@@ -28,7 +28,7 @@
 .\"     @(#)shutdown.8	8.2 (Berkeley) 4/27/95
 .\" $FreeBSD$
 .\"
-.Dd October 23, 2017
+.Dd January 1, 2018
 .Dt SHUTDOWN 8
 .Os
 .Sh NAME
@@ -138,6 +138,14 @@ suffix:
 .Dq Li min .
 .Dq Li h ,
 .Dq Li hour .
+.Pp
+If an absolute time is specified, but not a date,
+and that time today has already passed,
+.Nm
+will assume that the same time tomorrow was meant.
+(If a complete date is specified which has already passed,
+.Nm
+will print an error and exit without shutting the system down.)
 .It Ar warning-message
 Any other arguments comprise the warning message that is broadcast
 to users currently logged into the system.
diff --git a/sbin/shutdown/shutdown.c b/sbin/shutdown/shutdown.c
index c8e77883f6b..67a433b8edd 100644
--- a/sbin/shutdown/shutdown.c
+++ b/sbin/shutdown/shutdown.c
@@ -431,7 +431,7 @@ getoffset(char *timearg)
 	struct tm *lt;
 	char *p;
 	time_t now;
-	int this_year;
+	int maybe_today, this_year;
 	char *timeunit;
 
 	(void)time(&now);
@@ -482,6 +482,7 @@ getoffset(char *timearg)
 
 	unsetenv("TZ");					/* OUR timezone */
 	lt = localtime(&now);				/* current time val */
+	maybe_today = 1;
 
 	switch(strlen(timearg)) {
 	case 10:
@@ -503,6 +504,7 @@ getoffset(char *timearg)
 			badtime();
 		/* FALLTHROUGH */
 	case 6:
+		maybe_today = 0;
 		lt->tm_mday = ATOI2(timearg);
 		if (lt->tm_mday < 1 || lt->tm_mday > 31)
 			badtime();
@@ -517,8 +519,23 @@ getoffset(char *timearg)
 		lt->tm_sec = 0;
 		if ((shuttime = mktime(lt)) == -1)
 			badtime();
-		if ((offset = shuttime - now) < 0)
-			errx(1, "that time is already past.");
+
+		if ((offset = shuttime - now) < 0) {
+			if (!maybe_today)
+				errx(1, "that time is already past.");
+
+			/*
+			 * If the user only gave a time, assume that
+			 * any time earlier than the current time
+			 * was intended to be that time tomorrow.
+			 */
+			lt->tm_mday++;
+			if ((shuttime = mktime(lt)) == -1)
+				badtime();
+			if ((offset = shuttime - now) < 0) {
+				errx(1, "tomorrow is before today?");
+			}
+		}
 		break;
 	default:
 		badtime();
diff --git a/share/examples/sunrpc/msg/msg_proc.c b/share/examples/sunrpc/msg/msg_proc.c
index ed088839e52..45ffe7cc115 100644
--- a/share/examples/sunrpc/msg/msg_proc.c
+++ b/share/examples/sunrpc/msg/msg_proc.c
@@ -9,7 +9,7 @@
 #include "msg.h"	/* need this too: msg.h will be generated by rpcgen */
 
 /*
- * Remote verson of "printmessage"
+ * Remote version of "printmessage"
  */
 int *
 printmessage_1(msg)
diff --git a/share/man/man3/assert.3 b/share/man/man3/assert.3
index ae56162d846..35433572600 100644
--- a/share/man/man3/assert.3
+++ b/share/man/man3/assert.3
@@ -28,7 +28,7 @@
 .\"     @(#)assert.3	8.1 (Berkeley) 6/9/93
 .\" $FreeBSD$
 .\"
-.Dd January 26, 1999
+.Dd January 1, 2018
 .Dt ASSERT 3
 .Os
 .Sh NAME
@@ -68,6 +68,14 @@ as a macro
 .Xr cc 1
 option
 .Fl D Ns Dv NDEBUG ) .
+Unlike most other include files,
+.In assert.h
+may be included multiple times.
+Each time whether or not
+.Dv NDEBUG
+is defined determines the behavior of assert from that point forward
+until the end of the unit or another include of
+.In assert.h .
 .Sh EXAMPLES
 The assertion:
 .Pp
@@ -87,4 +95,4 @@ macro conforms to
 An
 .Nm
 macro appeared in
-.At v6 .
+.At v7 .
diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile
index dc74e1ddbcb..fd8865f4658 100644
--- a/share/man/man4/Makefile
+++ b/share/man/man4/Makefile
@@ -73,6 +73,7 @@ MAN=	aac.4 \
 	${_aw_gpio.4} \
 	${_aw_mmc.4} \
 	${_aw_rtc.4} \
+	${_aw_sid.4} \
 	axe.4 \
 	axge.4 \
 	bce.4 \
@@ -763,6 +764,7 @@ _armv8crypto.4=	armv8crypto.4
 _aw_gpio.4=	aw_gpio.4
 _aw_mmc.4=	aw_mmc.4
 _aw_rtc.4=	aw_rtc.4
+_aw_sid.4=	aw_sid.4
 .endif
 
 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
diff --git a/share/man/man4/aw_sid.4 b/share/man/man4/aw_sid.4
new file mode 100644
index 00000000000..1ac6c62fcc6
--- /dev/null
+++ b/share/man/man4/aw_sid.4
@@ -0,0 +1,74 @@
+.\"-
+.\" Copyright (c) 2018 Kyle Evans <kevans@FreeBSD.org>
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $FreeBSD$
+.\"
+.Dd January 2, 2018
+.Dt AW_SID 4
+.Os
+.Sh NAME
+.Nm aw_sid
+.Nd driver for the SID controller in Allwinner SoC
+.Sh DESCRIPTION
+The
+.Nm
+device driver provides support for the Allwinner SID (Security ID) controller.
+This controller provides root security keys that may be used as either a device
+unique ID or to generate a MAC address.
+.Sh HARDWARE
+The
+.Nm
+driver supports the SID controller with one of the following compatible
+strings:
+.Pp
+.Bl -bullet -compact
+.It
+allwinner,sun4i-a10-sid
+.It
+allwinner,sun7i-a20-sid
+.It
+allwinner,sun50i-a64-sid
+.It
+allwinner,sun8i-a83t-sid
+.El
+.Sh SYSCTL VARIABLES
+The following read-only variables are available via
+.Xr sysctl 8 :
+.Bl -tag -width indent
+.It Va dev.aw_sid.rootkey
+Root security key for this device.
+.El
+.Sh HISTORY
+The
+.Nm
+device driver first appeared in
+.Fx 11.0 .
+.Sh AUTHORS
+The
+.Nm
+device driver was written by
+.An Jared McNeill Aq Mt jmcneill@invisible.ca .
+This manual page was written by
+.An Kyle Evans Aq Mt kevans@FreeBSD.org .
diff --git a/share/man/man4/cxgbe.4 b/share/man/man4/cxgbe.4
index 761eb391e06..6d436e637b4 100644
--- a/share/man/man4/cxgbe.4
+++ b/share/man/man4/cxgbe.4
@@ -243,6 +243,13 @@ Permitted interrupt types.
 Bit 0 represents INTx (line interrupts), bit 1 MSI, and bit 2 MSI-X.
 The default is 7 (all allowed).
 The driver selects the best possible type out of the allowed types.
+.It Va hw.cxgbe.pcie_relaxed_ordering
+PCIe Relaxed Ordering.
+-1 indicates the driver should determine whether to enable or disable PCIe RO.
+0 disables PCIe RO.
+1 enables PCIe RO.
+2 indicates the driver should not modify the PCIe RO setting.
+The default is -1.
 .It Va hw.cxgbe.fw_install
 0 prohibits the driver from installing a firmware on the card.
 1 allows the driver to install a new firmware if internal driver
diff --git a/share/man/man4/md.4 b/share/man/man4/md.4
index 7c26fa61974..133c0855d3e 100644
--- a/share/man/man4/md.4
+++ b/share/man/man4/md.4
@@ -116,19 +116,19 @@ The default value is 32, which is sufficient to map 128 MiB.
 .It Cd options VM_KMEM_SIZE_SCALE=<num>
 This configures the amount of kernel virtual address (KVA) space to
 dedicate to the kmem_arena map.
-The value is the ratio of physical to virtual pages.
+The scale value is the ratio of physical to virtual pages.
 The default value of 3 allocates a page of KVA for each 3 pages
 of physical ram in the system.
 
 The kernel and modules, including the root image, also consume KVA.
 The combination of a large root image and the default scaling
-may preallocate so much KVA to kmem_arena that there is not enough
+may preallocate so much KVA that there is not enough
 remaining address space to allocate kernel stacks, IO buffers,
 and other resources that are not part of kmem_arena.
 Overallocating kmem_arena space is likely to manifest as failure to
 launch userland processes with "cannot allocate kernel stack" messages.
 
-Setting the value too high may result in kernel failure to allocate
+Setting the scale value too high may result in kernel failure to allocate
 memory because kmem_arena is too small, and the failure may require
 significant runtime to manifest.
 Empirically, a value of 5 works well for a 200 MiB root image on
diff --git a/share/man/man4/vt.4 b/share/man/man4/vt.4
index 2f5d0875655..489ed31f61d 100644
--- a/share/man/man4/vt.4
+++ b/share/man/man4/vt.4
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd July 19, 2016
+.Dd December 28, 2017
 .Dt "VT" 4
 .Os
 .Sh NAME
@@ -45,6 +45,7 @@ In
 .Xr loader.conf 5 :
 .Cd hw.vga.textmode=1
 .Cd kern.vty=vt
+.Cd kern.vt.color.<colornum>.rgb="<colorspec>"
 .Cd kern.vt.fb.default_mode="<X>x<Y>"
 .Cd kern.vt.fb.modes.<connector>="<X>x<Y>"
 .Pp
@@ -206,6 +207,16 @@ The
 kernel uses
 .Nm
 when this value is not set.
+.It Va kern.vt.color. Ns Ar colornum Ns Va .rgb
+Set this value to override default palette entry for color
+.Pa colornum
+which should be in a range from 0 to 15 inclusive.
+The value should be either a comma-separated triplet of
+red, green, and blue values in a range from 0 to 255 or
+HTML-like hex triplet.
+See
+.Sx EXAMPLES
+below.
 .It Va kern.vt.fb.default_mode
 Set this value to a graphic mode to override the default mode picked by the
 .Nm
@@ -310,6 +321,11 @@ The connector name was found in
 .Dl info: [drm] Connector LVDS-1: get mode from tunables:
 .Dl info: [drm]   - kern.vt.fb.modes.LVDS-1
 .Dl info: [drm]   - kern.vt.fb.default_mode
+.Pp
+To set black and white colors of console palette
+.Pp
+.Dl kern.vt.color.0.rgb="10,10,10"
+.Dl kern.vt.color.15.rgb="#f0f0f0"
 .Sh SEE ALSO
 .Xr kbdcontrol 1 ,
 .Xr login 1 ,
diff --git a/share/man/man4/vxlan.4 b/share/man/man4/vxlan.4
index 15b40e61feb..5dac2b0a4e8 100644
--- a/share/man/man4/vxlan.4
+++ b/share/man/man4/vxlan.4
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd December 16, 2014
+.Dd December 31, 2017
 .Dt VXLAN 4
 .Os
 .Sh NAME
@@ -214,10 +214,21 @@ Once created, the
 .Nm
 interface can be configured with
 .Xr ifconfig 8 .
+.Ed
+.Pp
+The following when placed in the file
+.Pa /etc/rc.conf
+will cause a vxlan interface called
+.Dq Li vxlan0
+to be created, and will configure the interface in unicast mode.
+.Bd -literal -offset indent
+cloned_interfaces="vxlan0"
+create_args_vxlan0="vxlanid 108 vxlanlocal 192.168.100.1 vxlanremote 192.168.100.2"
 .Sh SEE ALSO
 .Xr inet 4 ,
 .Xr inet6 4 ,
 .Xr vlan 4 ,
+.Xr rc.conf 5 ,
 .Xr ifconfig 8 ,
 .Xr sysctl 8
 .Rs
diff --git a/share/man/man4/watchdog.4 b/share/man/man4/watchdog.4
index cb592f58cf5..b6117233593 100644
--- a/share/man/man4/watchdog.4
+++ b/share/man/man4/watchdog.4
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd December 21, 2009
+.Dd January 2, 2018
 .Dt WATCHDOG 4
 .Os
 .Sh NAME
@@ -40,8 +40,11 @@ facility is used for controlling hardware and software watchdogs.
 .Pp
 The device
 .Pa /dev/fido
-responds to a single
+supports several optional
 .Xr ioctl 2
+calls for configuration, and
+responds to a single operational
+.Xr ioctl
 call,
 .Dv WDIOCPATPAT .
 It takes a single argument which represents a timeout value specified as a
@@ -60,12 +63,16 @@ indicates that the
 will be kept from timing out from the kernel.
 .Pp
 The
+.Dv WDIOCPATPAT
 .Xr ioctl 2
 call will return success if just one of the available
 .Xr watchdog 9
 implementations supports setting the timeout to the specified timeout.
 This
 means that at least one watchdog is armed.
+By default, this will be a hardware watchdog if one is present, but if
+no hardware watchdog is able to process the request, a default software
+watchdog is enabled.
 If the call fails, for instance if
 none of
 .Xr watchdog 9
@@ -77,8 +84,53 @@ To disable the watchdogs pass
 If disarming the watchdog(s) failed an error is returned.
 The watchdog might
 still be armed!
+.Pp
+The optional configuration
+.Xr ioctl
+commands are listed here, along with the type of the parameter used.
+Examples of their use can be found in
+.Xr watchdogd 8 .
+.Bl -tag -width "WDIOC_SETSOFTTIMEOUTACT int  "
+.It Dv WDIOC_SETTIMEOUT Fa int
+set/reset the timer
+.It Dv WDIOC_GETTIMEOUT Fa int
+get total timeout
+.It Dv WDIOC_GETTIMELEFT Fa int
+get time left
+.It Dv WDIOC_GETPRETIMEOUT Fa int
+get the pre-timeout
+.It Dv WDIOC_SETPRETIMEOUT Fa int
+set the pre-timeout
+.It Dv WDIOC_SETPRETIMEOUTACT Fa int
+Set the action when a pre-timeout occurs (see
+.Li WD_SOFT_*
+below).
+.It Dv WDIOC_SETSOFT Fa int
+Use an internal software watchdog instead of hardware.
+There is also an external software watchdog, which is used by default
+if no hardware watchdog was attached.
+.It Dv WDIOC_SETSOFTTIMEOUTACT Fa int
+Set the action whan a soft timeout occurs.
+.El
+.Pp
+The actions that may be specified for the pre-timeout or the internal software
+watchdog are listed here.
+Multiple actions can be specified by ORing values together.
+.Bl -tag -width  WD_SOFT_PRINT
+.It Dv WD_SOFT_PANIC
+panic
+.It Dv WD_SOFT_DDB
+enter debugger
+.It Dv WD_SOFT_LOG
+log(9)
+.It Dv WD_SOFT_PRINT
+printf(9)
+.El
 .Sh RETURN VALUES
-The ioctl returns zero on success and non-zero on failure.
+The
+.Dv WDIOCPATPAT
+.Xr ioctl
+returns zero on success and non-zero on failure.
 .Bl -tag -width Er
 .It Bq Er EOPNOTSUPP
 No watchdog present in the kernel or
@@ -89,6 +141,10 @@ Watchdog could not be disabled (timeout value of 0).
 .It Bq Er EINVAL
 Invalid flag combination passed.
 .El
+.Pp
+The configuration
+.Xr ioctl
+operations return zero on success and non-zero on failure.
 .Sh EXAMPLES
 .Bd -literal -offset indent
 #include <paths.h>
@@ -122,8 +178,10 @@ Enables a watchdog to recover from a potentially freezing piece of code.
 .Pp
 .Dl "options SW_WATCHDOG"
 .Pp
-in your kernel config adds a software watchdog in the kernel, dropping to KDB
-or panic-ing when firing.
+in your kernel config forces a software watchdog in the kernel
+to be configured even if a hardware watchdog is configured,
+dropping to KDB or panicking when firing, depending
+on the KDB and KDB_UNATTENDED kernel configuration options.
 .Sh SEE ALSO
 .Xr watchdogd 8 ,
 .Xr watchdog 9
diff --git a/share/man/man7/build.7 b/share/man/man7/build.7
index aabae96fa7a..d3f01661835 100644
--- a/share/man/man7/build.7
+++ b/share/man/man7/build.7
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 3, 2017
+.Dd December 24, 2017
 .Dt BUILD 7
 .Os
 .Sh NAME
@@ -509,6 +509,15 @@ If set, this variable supplies a list of additional directories relative to
 the root of the source tree to build as part of the
 .Cm everything
 target.
+The directories are built in parallel with each other,
+and with the base system directories.
+Insert a
+.Va .WAIT
+directive at the beginning of the
+.Va LOCAL_DIRS
+list to ensure all base system directories are built first.
+.Va .WAIT
+may also be used as needed elsewhere within the list.
 .It Va LOCAL_ITOOLS
 If set, this variable supplies a list of additional tools that are used by the
 .Cm installworld
@@ -520,6 +529,15 @@ If set, this variable supplies a list of additional directories relative to
 the root of the source tree to build as part of the
 .Cm libraries
 target.
+The directories are built in parallel with each other,
+and with the base system libraries.
+Insert a
+.Va .WAIT
+directive at the beginning of the
+.Va LOCAL_DIRS
+list to ensure all base system libraries are built first.
+.Va .WAIT
+may also be used as needed elsewhere within the list.
 .It Va LOCAL_MTREE
 If set, this variable supplies a list of additional mtrees relative to the
 root of the source tree to use as part of the
diff --git a/share/man/man9/ieee80211.9 b/share/man/man9/ieee80211.9
index 3b4bbe4e3f9..1529238d20a 100644
--- a/share/man/man9/ieee80211.9
+++ b/share/man/man9/ieee80211.9
@@ -1,4 +1,6 @@
 .\"
+.\" Copyright (c) 2004 Bruce M. Simpson <bms@spc.org>
+.\" Copyright (c) 2004 Darron Broad <darron@kewl.org>
 .\" Copyright (c) 2009 Sam Leffler, Errno Consulting
 .\" All rights reserved.
 .\"
@@ -25,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd April 28, 2010
+.Dd December 31, 2017
 .Dt IEEE80211 9
 .Os
 .Sh NAME
@@ -34,9 +36,31 @@
 .Sh SYNOPSIS
 .In net80211/ieee80211_var.h
 .Ft void
-.Fn ieee80211_ifattach "struct ieee80211com *ic" "const uint8_t macaddr[IEEE80211_ADDR_LEN]"
+.Fn ieee80211_ifattach "struct ieee80211com *ic"
 .Ft void
 .Fn ieee80211_ifdetach "struct ieee80211com *ic"
+.Ft int
+.Fn ieee80211_mhz2ieee "u_int freq" "u_int flags"
+.Ft int
+.Fn ieee80211_chan2ieee "struct ieee80211com *ic" "const struct ieee80211_channel *c"
+.Ft u_int
+.Fn ieee80211_ieee2mhz "u_int chan" "u_int flags"
+.Ft int
+.Fn ieee80211_media_change "struct ifnet *ifp"
+.Ft void
+.Fn ieee80211_media_status "struct ifnet *ifp" "struct ifmediareq *imr"
+.Ft int
+.Fn ieee80211_setmode "struct ieee80211com *ic" "enum ieee80211_phymode mode"
+.Ft enum ieee80211_phymode
+.Fo ieee80211_chan2mode
+.Fa "const struct ieee80211_channel *chan"
+.Fc
+.Ft int
+.Fo ieee80211_rate2media
+.Fa "struct ieee80211com *ic" "int rate" "enum ieee80211_phymode mode"
+.Fc
+.Ft int
+.Fn ieee80211_media2rate "int mword"
 .Sh DESCRIPTION
 IEEE 802.11 device drivers are written to use the infrastructure provided
 by the
@@ -89,6 +113,112 @@ The virtual radio interface defined by the
 layer means that drivers must be structured to follow specific rules.
 Drivers that support only a single interface at any time must still
 follow these rules.
+.Pp
+Most of these functions require that attachment to the stack is performed
+before calling.
+.Pp
+.\"
+The
+.Fn ieee80211_ifattach
+function attaches the wireless network interface
+.Fa ic
+to the 802.11 network stack layer.
+This function must be called before using any of the
+.Nm
+functions which need to store driver state across invocations.
+.Pp
+.\"
+The
+.Fn ieee80211_ifdetach
+function frees any
+.Nm
+structures associated with the driver, and performs Ethernet and BPF
+detachment on behalf of the caller.
+.Pp
+.\"
+The
+.Fn ieee80211_mhz2ieee
+utility function converts the frequency
+.Fa freq
+(specified in MHz) to an IEEE 802.11 channel number.
+The
+.Fa flags
+argument is a hint which specifies whether the frequency is in
+the 2GHz ISM band
+.Pq Vt IEEE80211_CHAN_2GHZ
+or the 5GHz band
+.Pq Vt IEEE80211_CHAN_5GHZ ;
+appropriate clipping of the result is then performed.
+.Pp
+.\"
+The
+.Fn ieee80211_chan2ieee
+function converts the channel specified in
+.Fa *c
+to an IEEE channel number for the driver
+.Fa ic .
+If the conversion would be invalid, an error message is printed to the
+system console.
+This function REQUIRES that the driver is hooked up to the
+.Nm
+subsystem.
+.Pp
+.\"
+The
+.Fn ieee80211_ieee2mhz
+utility function converts the IEEE channel number
+.Ft chan
+to a frequency (in MHz).
+The
+.Fa flags
+argument is a hint which specifies whether the frequency is in
+the 2GHz ISM band
+.Pq Vt IEEE80211_CHAN_2GHZ
+or the 5GHz band
+.Pq Vt IEEE80211_CHAN_5GHZ ;
+appropriate clipping of the result is then performed.
+.Pp
+.\"
+The
+.Fn ieee80211_media_status
+and
+.Fn ieee80211_media_change
+functions are device-independent handlers for
+.Vt ifmedia
+commands and are not intended to be called directly.
+.Pp
+.\"
+The
+.Fn ieee80211_setmode
+function is called from within the 802.11 stack to change the mode
+of the driver's PHY; it is not intended to be called directly.
+.Pp
+.\"
+The
+.Fn ieee80211_chan2mode
+function returns the PHY mode required for use with the channel
+.Fa chan .
+This is typically used when selecting a rate set, to be advertised in
+beacons, for example.
+.Pp
+.\"
+The
+.Fn ieee80211_rate2media
+function converts the bit rate
+.Fa rate
+(measured in units of 0.5Mbps) to an
+.Vt ifmedia
+sub-type, for the device
+.Fa ic
+running in PHY mode
+.Fa mode .
+The
+.Fn ieee80211_media2rate
+performs the reverse of this conversion, returning the bit rate (in 0.5Mbps
+units) corresponding to an
+.Vt ifmedia
+sub-type.
+.
 .Sh DATA STRUCTURES
 The virtual radio architecture splits state between a single per-device
 .Vt ieee80211com
@@ -566,3 +696,23 @@ Device supports Reduced Inter Frame Spacing (RIFS).
 .Xr ieee80211_vap 9 ,
 .Xr ifnet 9 ,
 .Xr malloc 9
+.Sh HISTORY
+The
+.Nm
+series of functions first appeared in
+.Nx 1.5 ,
+and were later ported to
+.Fx 4.6 .
+This man page was updated with the information from
+.Nx
+.Nm
+man page. 
+.Sh AUTHORS
+.An -nosplit
+The original
+.Nx
+.Nm
+man page was written by
+.An Bruce M. Simpson Aq Mt bms@FreeBSD.org
+and
+.An Darron Broad Aq Mt darron@kewl.org .
diff --git a/share/misc/bsd-family-tree b/share/misc/bsd-family-tree
index d35654d68f4..c4d4cc259ea 100644
--- a/share/misc/bsd-family-tree
+++ b/share/misc/bsd-family-tree
@@ -355,28 +355,22 @@ FreeBSD 5.2           |      |                 |                       |
  |   11.0     |     10.12   | | NetBSD 7.0.2   |                       |
  |     |      |       |     | |                |                       |
  |     |      |       |     | *- NetBSD 7.1    |                       |
- |     |      |     macOS   |                  |               DragonFly 4.8.0
- |     |      |     10.13   |             OpenBSD 6.1                  |
- |  FreeBSD   |       |     |                  |               DragonFly 5.0.0
- |   11.1  FreeBSD    |     |                  |                       |
- |     |    10.4      |     |             OpenBSD 6.2          DragonFly 5.0.1
- |     |      |       v     |                  |                       |
- |     |      |             |                  |               DragonFly 5.0.2
- |     |      |             |                  |                       |
- |     |   FreeBSD          |                  |                       |
- |     |   10-stable        |                  |                       |
- |  FreeBSD    \            |                  |                       |
- |  11-stable   \           |                  |                       |
- |    /          `|         |                  |                       |
- | HardenedBSD    |         |                  |                       |
- |  11-stable  HardenedBSD  |                  |                       |
- |              10-stable   |                  |                       |
- |                          |                  |                       |
- |                          |                  |                       |
- |                          |                  |                       |
-FreeBSD 12 -current   NetBSD -current   OpenBSD -current    DragonFly -current
- |                          |                  |                       |
- v                          v                  v                       v
+ |     |      |       |     |      |           |                       |
+ |     |      |       |     |      |           |                       |
+ |     |      |     macOS   |      |           |               DragonFly 4.8.0
+ |     |      |     10.13   |      |      OpenBSD 6.1                  |
+ |  FreeBSD   |       |     |      |           |               DragonFly 5.0.0
+ |   11.1  FreeBSD    |     |      |           |                       |
+ |     |    10.4      |     |      |      OpenBSD 6.2          DragonFly 5.0.1
+ |     |              |     |      |           |                       |
+ |     |              |     |  NetBSD 7.1.1    |               DragonFly 5.0.2
+ |     |              |     |      |           |                       |
+ |     |              |     |      v           |                       |
+ |     v              |     |                  |                       |
+ |                    |     |                  |                       |
+FreeBSD 12 -current   | NetBSD -current   OpenBSD -current    DragonFly -current
+ |                    |     |                  |                       |
+ v                    v     v                  v                       v
 
 Time
 ----------------
@@ -698,15 +692,15 @@ NetBSD 6.0.4		2014-01-25 [NBD]
 NetBSD 6.1.3		2014-01-25 [NBD]
 DragonFly 3.6.1 	2014-02-22 [DFB]
 DragonFly 3.6.2		2014-04-10 [DFB]
-NetBSD 6.0.5		2014-04-12 [NDB]
-NetBSD 6.1.4		2014-04-12 [NDB]
+NetBSD 6.0.5		2014-04-12 [NBD]
+NetBSD 6.1.4		2014-04-12 [NBD]
 OpenBSD 5.5		2014-05-01 [OBD]
 DragonFly 3.8.0		2014-06-04 [DFB]
 DragonFly 3.8.1		2014-06-16 [DFB]
 DragonFly 3.6.3		2014-06-17 [DFB]
 FreeBSD 9.3		2014-07-05 [FBD]
 DragonFly 3.8.2		2014-08-08 [DFB]
-NetBSD 6.0.6		2014-09-22 [NDB]
+NetBSD 6.0.6		2014-09-22 [NBD]
 NetBSD 6.1.5		2014-09-22 [NBD]
 Mac OS X 10.10		2014-10-16 [APL]
 OpenBSD 5.6		2014-11-01 [OBD]
@@ -729,8 +723,8 @@ NetBSD 7.0.1		2016-05-22 [NBD]
 DragonFly 4.6.0		2016-08-02 [DFB]
 OpenBSD 6.0		2016-09-01 [OBD]
 macOS 10.12		2016-09-20 [APL]
-NetBSD 7.0.2		2016-10-21 [NBD]
 FreeBSD 11.0		2016-10-10 [FBD]
+NetBSD 7.0.2		2016-10-21 [NBD]
 NetBSD 7.1		2017-03-11 [NBD]
 DragonFly 4.8.0		2017-03-27 [DFB]
 OpenBSD 6.1		2017-04-11 [OBD]
@@ -741,6 +735,7 @@ OpenBSD 6.2		2017-10-09 [OBD]
 DragonFly 5.0.0		2017-10-16 [DFB]
 DragonFly 5.0.1		2017-11-06 [DFB]
 DragonFly 5.0.2		2017-12-04 [DFB]
+NetBSD 7.1.1		2017-12-22 [NBD]
 
 Bibliography
 ------------------------
diff --git a/share/misc/iso639 b/share/misc/iso639
index 1902e51c21b..1a7da216bfb 100644
--- a/share/misc/iso639
+++ b/share/misc/iso639
@@ -127,6 +127,7 @@ cu	chu	chu	Church Slavic; Old Slavonic; Church Slavonic; Old Bulgarian; Old Chur
 cv	chv	chv	Chuvash
 	chy	chy	Cheyenne
 	cmc	cmc	Chamic languages
+	cnr	cnr	Montenegrin
 	cop	cop	Coptic
 kw	cor	cor	Cornish
 co	cos	cos	Corsican
diff --git a/share/misc/organization.dot b/share/misc/organization.dot
index 5c295f9c324..e60a1b73271 100644
--- a/share/misc/organization.dot
+++ b/share/misc/organization.dot
@@ -34,7 +34,7 @@ portmgr [label="Port Management Team\nportmgr@FreeBSD.org\nadamw, antoine, bapt,
 portmgrsecretary [label="Port Management Team Secretary\nportmgr-secretary@FreeBSD.org\nrene"]
 re [label="Primary Release Engineering Team\nre@FreeBSD.org\ngjb, kib,\nbdrewery, blackend,\nrgrimes, delphij,\nhrs, glebius,\nmarius, rwatson"]
 secteam [label="Security Team\nsecteam@FreeBSD.org\ndelphij,\ndes, gavin, gjb,\nglebius, remko"]
-portssecteam [label="Ports Security Team\nports-secteam@FreeBSD.org\ndelphij, amdmi3, eadler, feld, jgh, junovitch, rea, sbz, simon, swills, zi"]
+portssecteam [label="Ports Security Team\nports-secteam@FreeBSD.org\ndelphij, amdmi3, eadler, feld, jgh, rea, sbz, simon, swills, zi"]
 secteamsecretary [label="Security Team Secretary\nsecteam-secretary@FreeBSD.org\nremko"]
 securityofficer [label="Security Officer Team\nsecurity-officer@FreeBSD.org\ndelphij, des,\ngavin, gjb,\nglebius, remko"]
 srccommitters [label="Src Committers\nsrc-committers@FreeBSD.org"]
diff --git a/share/skel/dot.shrc b/share/skel/dot.shrc
index 974db460c9c..e56256e5bd7 100644
--- a/share/skel/dot.shrc
+++ b/share/skel/dot.shrc
@@ -21,7 +21,7 @@
 # some useful aliases
 alias h='fc -l'
 alias j=jobs
-alias m=$PAGER
+alias m="$PAGER"
 alias ll='ls -laFo'
 alias l='ls -l'
 alias g='egrep -i'
diff --git a/stand/defs.mk b/stand/defs.mk
index 8d4be1ee767..79e52690a59 100644
--- a/stand/defs.mk
+++ b/stand/defs.mk
@@ -58,6 +58,13 @@ LIBGELIBOOT=	${BOOTOBJ}/geli/libgeliboot.a
 .endif # MK_LOADER_GELI
 .endif # HAVE_GELI
 
+# These should be confined to loader.mk, but can't because uboot/lib
+# also uses it. It's part of loader, but isn't a loader so we can't
+# just include loader.mk
+.if ${LOADER_DISK_SUPPORT:Uyes} == "yes"
+CFLAGS+= -DLOADER_DISK_SUPPORT
+.endif
+
 # Machine specific flags for all builds here
 
 # All PowerPC builds are 32 bit. We have no 64-bit loaders on powerpc
diff --git a/stand/efi/fdt/efi_fdt.c b/stand/efi/fdt/efi_fdt.c
index d6757689c89..5fcb6ad1588 100644
--- a/stand/efi/fdt/efi_fdt.c
+++ b/stand/efi/fdt/efi_fdt.c
@@ -44,19 +44,27 @@ int
 fdt_platform_load_dtb(void)
 {
 	struct fdt_header *hdr;
+	const char *s;
 
 	hdr = efi_get_table(&fdtdtb);
-	if (hdr != NULL) {
-		if (fdt_load_dtb_addr(hdr) == 0) {
-			printf("Using DTB provided by EFI at %p.\n", hdr);
-			return (0);
-		}
+	if (hdr == NULL)
+		return (1);
+	if (fdt_load_dtb_addr(hdr) != 0)
+		return (1);
+	printf("Using DTB provided by EFI at %p.\n", hdr);
+
+	s = getenv("fdt_overlays");
+	if (s != NULL && *s != '\0') {
+		printf("Loading DTB overlays: '%s'\n", s);
+		fdt_load_dtb_overlays(s);
 	}
 
-	return (1);
+	return (0);
 }
 
 void
 fdt_platform_fixups(void)
 {
+
+	fdt_apply_overlays();
 }
diff --git a/stand/fdt/fdt_loader_cmd.c b/stand/fdt/fdt_loader_cmd.c
index a21a99895ea..849e42a3ed5 100644
--- a/stand/fdt/fdt_loader_cmd.c
+++ b/stand/fdt/fdt_loader_cmd.c
@@ -31,8 +31,8 @@
 __FBSDID("$FreeBSD$");
 
 #include <stand.h>
-#include <fdt.h>
 #include <libfdt.h>
+#include <fdt.h>
 #include <sys/param.h>
 #include <sys/linker.h>
 #include <machine/elf.h>
@@ -386,7 +386,8 @@ fdt_apply_overlays()
 	for (fp = file_findfile(NULL, "dtbo"); fp != NULL; fp = fp->f_next) {
 		printf("applying DTB overlay '%s'\n", fp->f_name);
 		COPYOUT(fp->f_addr, overlay, fp->f_size);
-		fdt_overlay_apply(new_fdtp, overlay, fp->f_size);
+		/* Both overlay and new_fdtp may be modified in place */
+		fdt_overlay_apply(new_fdtp, overlay);
 	}
 
 	free(fdtp);
diff --git a/stand/fdt/fdt_overlay.c b/stand/fdt/fdt_overlay.c
index e49c5d586e2..9763f2310a6 100644
--- a/stand/fdt/fdt_overlay.c
+++ b/stand/fdt/fdt_overlay.c
@@ -409,41 +409,23 @@ fdt_overlay_apply_fragments(void *main_fdtp, void *overlay_fdtp)
 }
 
 int
-fdt_overlay_apply(void *main_fdtp, void *overlay_fdtp, size_t overlay_length)
+fdt_overlay_apply(void *main_fdtp, void *overlay_fdtp)
 {
-	void *overlay_copy;
-	int rv;
 
-	rv = 0;
-
-	/* We modify overlay in-place, so we need writable copy */
-	overlay_copy = malloc(overlay_length);
-	if (overlay_copy == NULL) {
-		printf("failed to allocate memory for overlay copy\n");
+	if (fdt_overlay_do_fixups(main_fdtp, overlay_fdtp) < 0) {
+		printf("failed to perform fixups in overlay\n");
 		return (-1);
 	}
 
-	memcpy(overlay_copy, overlay_fdtp, overlay_length);
-
-	if (fdt_overlay_do_fixups(main_fdtp, overlay_copy) < 0) {
-		printf("failed to perform fixups in overlay\n");
-		rv = -1;
-		goto out;
-	}
-
-	if (fdt_overlay_do_local_fixups(main_fdtp, overlay_copy) < 0) {
+	if (fdt_overlay_do_local_fixups(main_fdtp, overlay_fdtp) < 0) {
 		printf("failed to perform local fixups in overlay\n");
-		rv = -1;
-		goto out;
+		return (-1);
 	}
 
-	if (fdt_overlay_apply_fragments(main_fdtp, overlay_copy) < 0) {
+	if (fdt_overlay_apply_fragments(main_fdtp, overlay_fdtp) < 0) {
 		printf("failed to apply fragments\n");
-		rv = -1;
+		return (-1);
 	}
 
-out:
-	free(overlay_copy);
-
-	return (rv);
+	return (0);
 }
diff --git a/stand/fdt/fdt_overlay.h b/stand/fdt/fdt_overlay.h
index 0f9134384d3..4b9933e9715 100644
--- a/stand/fdt/fdt_overlay.h
+++ b/stand/fdt/fdt_overlay.h
@@ -29,6 +29,6 @@
 #ifndef FDT_OVERLAY_H
 #define FDT_OVERLAY_H
 
-int fdt_overlay_apply(void *main_fdtp, void *overlay_fdtp, size_t overlay_length);
+int fdt_overlay_apply(void *main_fdtp, void *overlay_fdtp);
 
 #endif /* FDT_OVERLAY_H */
diff --git a/stand/i386/libfirewire/firewire.c b/stand/i386/libfirewire/firewire.c
index 48403259873..e0b0bf98dc1 100644
--- a/stand/i386/libfirewire/firewire.c
+++ b/stand/i386/libfirewire/firewire.c
@@ -108,11 +108,11 @@ fw_probe(int index, struct fwohci_softc *sc)
 	biospci_write_config(sc->locator,
 		0x4	/* command */,
 		0x6	/* enable bus master and memory mapped I/O */,
-		1	/* word */);
+		BIOSPCI_16BITS);
 
-	biospci_read_config(sc->locator, 0x00 /*devid*/, 2 /*dword*/,
+	biospci_read_config(sc->locator, 0x00 /*devid*/, BIOSPCI_32BITS,
 		&sc->devid);
-	biospci_read_config(sc->locator, 0x10 /*base_addr*/, 2 /*dword*/,
+	biospci_read_config(sc->locator, 0x10 /*base_addr*/, BIOSPCI_32BITS,
 		&sc->base_addr);
 
         sc->handle = (uint32_t)PTOV(sc->base_addr);
diff --git a/stand/i386/libi386/biospci.c b/stand/i386/libi386/biospci.c
index 098e30caa5f..7f038670c13 100644
--- a/stand/i386/libi386/biospci.c
+++ b/stand/i386/libi386/biospci.c
@@ -285,7 +285,7 @@ biospci_enumerate(void)
 			break;
 
 		    /* Read the device identifier from the nominated device */
-		    err = biospci_read_config(locator, 0, 2, &devid);
+		    err = biospci_read_config(locator, 0, BIOSPCI_32BITS, &devid);
 		    if (err != 0)
 			break;
 		    
diff --git a/stand/i386/libi386/comconsole.c b/stand/i386/libi386/comconsole.c
index bd2a2e864fa..b9fcf032e18 100644
--- a/stand/i386/libi386/comconsole.c
+++ b/stand/i386/libi386/comconsole.c
@@ -263,10 +263,20 @@ comc_pcidev_handle(uint32_t locator)
 	uint32_t port;
 
 	if (biospci_read_config(locator & 0xffff,
-				(locator & 0xff0000) >> 16, 2, &port) == -1) {
+	    (locator & 0xff0000) >> 16, BIOSPCI_32BITS, &port) == -1) {
 		printf("Cannot read bar at 0x%x\n", locator);
 		return (CMD_ERROR);
 	}
+
+	/* 
+	 * biospci_read_config() sets port == 0xffffffff if the pcidev
+	 * isn't found on the bus.  Check for 0xffffffff and return to not
+	 * panic in BTX.
+	 */
+	if (port == 0xffffffff) {
+		printf("Cannot find specified pcidev\n");
+		return (CMD_ERROR);
+	}
 	if (!PCI_BAR_IO(port)) {
 		printf("Memory bar at 0x%x\n", locator);
 		return (CMD_ERROR);
diff --git a/stand/i386/libi386/libi386.h b/stand/i386/libi386/libi386.h
index e65a060acb7..297d493422b 100644
--- a/stand/i386/libi386/libi386.h
+++ b/stand/i386/libi386/libi386.h
@@ -135,6 +135,13 @@ extern vm_offset_t	memtop_copyin;	/* memtop less heap size for the cases */
 extern uint32_t		high_heap_size;	/* extended memory region available */
 extern vm_offset_t	high_heap_base;	/* for use as the heap */
 
+/*
+ * Values for width parameter to biospci_{read,write}_config
+ */
+#define BIOSPCI_8BITS	0
+#define BIOSPCI_16BITS	1
+#define BIOSPCI_32BITS	2
+
 void	biospci_detect(void);
 int	biospci_find_devclass(uint32_t class, int index, uint32_t *locator);
 int	biospci_read_config(uint32_t locator, int offset, int width, uint32_t *val);
diff --git a/stand/libsa/Makefile b/stand/libsa/Makefile
index 73cbe16c74e..f95bb64806b 100644
--- a/stand/libsa/Makefile
+++ b/stand/libsa/Makefile
@@ -36,7 +36,7 @@ SRCS+=	bcmp.c bcopy.c bzero.c ffs.c fls.c \
 	memccpy.c memchr.c memcmp.c memcpy.c memmove.c memset.c \
 	qdivrem.c strcat.c strchr.c strcmp.c strcpy.c stpcpy.c stpncpy.c \
 	strcspn.c strlcat.c strlcpy.c strlen.c strncat.c strncmp.c strncpy.c \
-	strpbrk.c strrchr.c strsep.c strspn.c strstr.c strtok.c swab.c
+	strnlen.c strpbrk.c strrchr.c strsep.c strspn.c strstr.c strtok.c swab.c
 .if ${MACHINE_CPUARCH} == "arm"
 .PATH: ${LIBC_SRC}/arm/gen
 
diff --git a/stand/libsa/stand.h b/stand/libsa/stand.h
index aa5f056706c..847d4aeb8d6 100644
--- a/stand/libsa/stand.h
+++ b/stand/libsa/stand.h
@@ -354,6 +354,7 @@ extern char const	hex2ascii_data[];
 #define	bcd2bin(bcd)	(bcd2bin_data[bcd])
 #define	bin2bcd(bin)	(bin2bcd_data[bin])
 #define	hex2ascii(hex)	(hex2ascii_data[hex])
+#define	validbcd(bcd)	(bcd == 0 || (bcd > 0 && bcd <= 0x99 && bcd2bin_data[bcd] != 0))
 
 /* min/max (undocumented) */
 static __inline int imax(int a, int b) { return (a > b ? a : b); }
diff --git a/stand/loader.mk b/stand/loader.mk
index 4acd9c75f96..9a6b19203db 100644
--- a/stand/loader.mk
+++ b/stand/loader.mk
@@ -105,16 +105,13 @@ CFLAGS+=	-DLOADER_NFS_SUPPORT
 CFLAGS+=	-DLOADER_TFTP_SUPPORT
 .endif
 
-# Disk and partition support
-.if ${LOADER_DISK_SUPPORT:Uyes} == "yes"
-CFLAGS+= -DLOADER_DISK_SUPPORT
+# Partition support
 .if ${LOADER_GPT_SUPPORT:Uyes} == "yes"
 CFLAGS+= -DLOADER_GPT_SUPPORT
 .endif
 .if ${LOADER_MBR_SUPPORT:Uyes} == "yes"
 CFLAGS+= -DLOADER_MBR_SUPPORT
 .endif
-.endif
 
 .if defined(HAVE_ZFS)
 CFLAGS+=	-DLOADER_ZFS_SUPPORT
diff --git a/stand/mips/beri/boot2/Makefile b/stand/mips/beri/boot2/Makefile
index 4b1654f8d9d..ce09b6e3efe 100644
--- a/stand/mips/beri/boot2/Makefile
+++ b/stand/mips/beri/boot2/Makefile
@@ -53,8 +53,7 @@ CFLAGS+=	-I${LDRSRC}			\
 		-fno-pic -mno-abicalls		\
 		-g
 
-LDFLAGS=	-nostdlib			\
-		-static				\
+LDFLAGS+=	-static				\
 		-Wl,-N				\
 		-G0				\
 		-L${.CURDIR}
diff --git a/stand/mips/beri/common/sdcard.c b/stand/mips/beri/common/sdcard.c
index e50f4e70017..4de3db4b98e 100644
--- a/stand/mips/beri/common/sdcard.c
+++ b/stand/mips/beri/common/sdcard.c
@@ -109,10 +109,10 @@
     ALTERA_SDCARD_RR1_COMMANDCRCFAILED | ALTERA_SDCARD_RR1_ADDRESSMISALIGNED |\
     ALTERA_SDCARD_RR1_ADDRBLOCKRANGE)
 
-extern void __cheri_sdcard_vaddr__;
+extern uint8_t __cheri_sdcard_vaddr__[];
 
 #define	ALTERA_SDCARD_PTR(type, offset)					\
-	(volatile type *)((uint8_t *)&__cheri_sdcard_vaddr__ + (offset))
+	(volatile type *)(&__cheri_sdcard_vaddr__[(offset)])
 
 static __inline uint16_t
 altera_sdcard_read_uint16(u_int offset)
diff --git a/stand/mips/beri/loader/Makefile b/stand/mips/beri/loader/Makefile
index c791294b974..46b927fddff 100644
--- a/stand/mips/beri/loader/Makefile
+++ b/stand/mips/beri/loader/Makefile
@@ -85,8 +85,7 @@ CFLAGS+=	-G0					\
 		-mno-abicalls				\
 		-g
 
-LDFLAGS=	-nostdlib				\
-		-static					\
+LDFLAGS+=	-static					\
 		-T ${.CURDIR}/loader.ldscript		\
 		-L${.CURDIR}				\
 		-e __start
diff --git a/stand/mips/beri/loader/main.c b/stand/mips/beri/loader/main.c
index 71b69b78157..ac630cf6961 100644
--- a/stand/mips/beri/loader/main.c
+++ b/stand/mips/beri/loader/main.c
@@ -78,8 +78,8 @@ struct console *consoles[] = {
 	NULL
 };
 
-extern void	__bss_start, __bss_end;
-extern void	__heap_start, __heap_end;
+extern uint8_t	__bss_start, __bss_end;
+extern uint8_t	__heap_start, __heap_end;
 
 static int
 __elfN(exec)(struct preloaded_file *fp)
@@ -108,14 +108,14 @@ main(int argc, char *argv[], char *envv[], struct bootinfo *bootinfop)
 	struct devsw **dp;
 
 	/* NB: Must be sure to bzero() before using any globals. */
-	bzero(&__bss_start, (uintptr_t)&__bss_end - (uintptr_t)&__bss_start);
+	bzero(&__bss_start, &__bss_end - &__bss_start);
 
 	boot2_argc = argc;
 	boot2_argv = argv;
 	boot2_envv = envv;
 	boot2_bootinfo = *bootinfop;	/* Copy rather than by reference. */
 
-	setheap((void *)&__heap_start, (void *)&__heap_end);
+	setheap(&__heap_start, &__heap_end);
 
 	/*
 	 * Pick up console settings from boot2; probe console.
diff --git a/stand/powerpc/ps3/Makefile b/stand/powerpc/ps3/Makefile
deleted file mode 100644
index 69b1597147d..00000000000
--- a/stand/powerpc/ps3/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-# $FreeBSD$
-
-LOADER_UFS_SUPPORT?=	yes
-LOADER_CD9660_SUPPORT?=	yes
-LOADER_EXT2FS_SUPPORT?=	yes
-LOADER_NET_SUPPORT?=	yes
-LOADER_NFS_SUPPORT?=	yes
-LOADER_TFTP_SUPPORT?=	no
-LOADER_GZIP_SUPPORT?=	yes
-LOADER_BZIP2_SUPPORT?=	no
-
-.include <bsd.init.mk>
-MK_SSP=		no
-MAN=
-
-PROG=		loader.ps3
-NEWVERSWHAT=	"Playstation 3 loader" ${MACHINE_ARCH}
-INSTALLFLAGS=	-b
-
-# Architecture-specific loader code
-SRCS=		start.S conf.c metadata.c vers.c main.c devicename.c ppc64_elf_freebsd.c
-SRCS+=		lv1call.S ps3cons.c font.h ps3mmu.c ps3net.c ps3repo.c \
-		ps3stor.c ps3disk.c ps3cdrom.c
-SRCS+=		ucmpdi2.c
-
-CFLAGS+=	-mcpu=powerpc64
-
-# Always add MI sources
-.include	"${BOOTSRC}/loader.mk"
-.PATH:		${SYSDIR}/libkern
-
-CFLAGS+=	-Wall -DAIM
-# load address. set in linker script
-RELOC?=		0x0
-CFLAGS+=	-DRELOC=${RELOC}
-
-LDFLAGS=	-nostdlib -static -T ${.CURDIR}/ldscript.powerpc
-
-DPADD=		${LIBFICL} ${LIBOFW} ${LIBSA}
-LDADD=		${LIBFICL} ${LIBOFW} ${LIBSA}
-
-SC_DFLT_FONT=cp437
-
-font.h:
-	uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h
-
-.include <bsd.prog.mk>
diff --git a/stand/powerpc/ps3/conf.c b/stand/powerpc/ps3/conf.c
deleted file mode 100644
index 3a5ae4c41f0..00000000000
--- a/stand/powerpc/ps3/conf.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*-
- * Copyright (C) 1999 Michael Smith <msmith@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stand.h>
-#include "bootstrap.h"
-
-#if defined(LOADER_NET_SUPPORT)
-#include "dev_net.h"
-#endif
-
-extern struct devsw ps3disk;
-extern struct devsw ps3cdrom;
-
-/*
- * We could use linker sets for some or all of these, but
- * then we would have to control what ended up linked into
- * the bootstrap.  So it's easier to conditionalise things
- * here.
- *
- * XXX rename these arrays to be consistent and less namespace-hostile
- */
-
-/* Exported for libstand */
-struct devsw *devsw[] = {
-#if defined(LOADER_CD9660_SUPPORT)
-    &ps3cdrom,
-#endif
-#if defined(LOADER_DISK_SUPPORT)
-    &ps3disk,
-#endif
-#if defined(LOADER_NET_SUPPORT)
-    &netdev,
-#endif
-    NULL
-};
-
-struct fs_ops *file_system[] = {
-#if defined(LOADER_UFS_SUPPORT)
-    &ufs_fsops,
-#endif
-#if defined(LOADER_CD9660_SUPPORT)
-    &cd9660_fsops,
-#endif
-#if defined(LOADER_EXT2FS_SUPPORT)
-    &ext2fs_fsops,
-#endif
-#if defined(LOADER_NFS_SUPPORT)
-    &nfs_fsops,
-#endif
-#if defined(LOADER_TFTP_SUPPORT)
-    &tftp_fsops,
-#endif
-#if defined(LOADER_GZIP_SUPPORT)
-    &gzipfs_fsops,
-#endif
-#if defined(LOADER_BZIP2_SUPPORT)
-    &bzipfs_fsops,
-#endif
-    NULL
-};
-
-extern struct netif_driver ps3net;
-
-struct netif_driver *netif_drivers[] = {
-#if defined(LOADER_NET_SUPPORT)
-	&ps3net,
-#endif
-	NULL,
-};
-
-/* Exported for PowerPC only */
-/* 
- * Sort formats so that those that can detect based on arguments
- * rather than reading the file go first.
- */
-
-extern struct file_format ppc_elf64;
-
-struct file_format *file_formats[] = {
-    &ppc_elf64,
-    NULL
-};
-
-/* 
- * Consoles 
- */
-extern struct console ps3console;
-
-struct console *consoles[] = {
-    &ps3console,
-    NULL
-};
-
-/*
- * reloc - our load address
- */
-vm_offset_t	reloc = RELOC;
diff --git a/stand/powerpc/ps3/devicename.c b/stand/powerpc/ps3/devicename.c
deleted file mode 100644
index 041f853986d..00000000000
--- a/stand/powerpc/ps3/devicename.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/*-
- * Copyright (c) 1998 Michael Smith <msmith@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/disklabel.h>
-
-#include <stand.h>
-#include <string.h>
-
-#include "bootstrap.h"
-#include "ps3.h"
-#include "ps3devdesc.h"
-
-static int ps3_parsedev(struct ps3_devdesc **dev, const char *devspec,
-    const char **path);
-
-/*
- * Point (dev) at an allocated device specifier for the device matching the
- * path in (devspec). If it contains an explicit device specification,
- * use that.  If not, use the default device.
- */
-int
-ps3_getdev(void **vdev, const char *devspec, const char **path)
-{
-	struct ps3_devdesc **dev = (struct ps3_devdesc **)vdev;
-	int rv = 0;
-
-	/*
-	 * If it looks like this is just a path and no
-	 * device, go with the current device.
-	 */
-	if ((devspec == NULL) || (devspec[0] == '/') ||
-	    (strchr(devspec, ':') == NULL)) {
-		rv = ps3_parsedev(dev, getenv("currdev"), NULL);
-
-		if (rv == 0 && path != NULL)
-			*path = devspec;
-		return(rv);
-	}
-
-	/*
-	 * Try to parse the device name off the beginning of the devspec.
-	 */
-	return (ps3_parsedev(dev, devspec, path));
-}
-
-/*
- * Point (dev) at an allocated device specifier matching the string version
- * at the beginning of (devspec).  Return a pointer to the remaining
- * text in (path).
- *
- * In all cases, the beginning of (devspec) is compared to the names
- * of known devices in the device switch, and then any following text
- * is parsed according to the rules applied to the device type.
- *
- * For disk-type devices, the syntax is:
- *
- * disk<unit>[<partition>]:
- *
- */
-static int
-ps3_parsedev(struct ps3_devdesc **dev, const char *devspec, const char **path)
-{
-	struct ps3_devdesc *idev;
-	struct devsw *dv;
-	char *cp;
-	const char *np;
-	int i, unit, pnum, ptype, err;
-
-	/* minimum length check */
-	if (strlen(devspec) < 2)
-		return(EINVAL);
-
-	/* look for a device that matches */
-	for (i = 0, dv = NULL; devsw[i] != NULL; i++) {
-		if (!strncmp(devspec, devsw[i]->dv_name,
-		    strlen(devsw[i]->dv_name))) {
-			dv = devsw[i];
-			break;
-		}
-	}
-	if (dv == NULL)
-		return(ENOENT);
-	idev = malloc(sizeof(struct ps3_devdesc));
-	err = 0;
-	np = (devspec + strlen(dv->dv_name));
-
-	switch(dv->dv_type) {
-	case DEVT_NONE:
-		break;
-
-	case DEVT_DISK:
-		unit = -1;
-		pnum = -1;
-		ptype = -1;
-		if (*np && (*np != ':')) {
-			/* next comes the unit number */
-			unit = strtol(np, &cp, 10);
-			if (cp == np) {
-				err = EUNIT;
-				goto fail;
-			}
-			if (*cp && (*cp != ':')) {
-				/* get partition */
-				if (*cp == 'p' && *(cp + 1) &&
-				    *(cp + 1) != ':') {
-					pnum = strtol(cp + 1, &cp, 10);
-					ptype = PTYPE_GPT;
-				} else {
-					pnum = *cp - 'a';
-					ptype = PTYPE_BSDLABEL;
-					if ((pnum < 0) ||
-					    (pnum >= MAXPARTITIONS)) {
-						err = EPART;
-						goto fail;
-					}
-					cp++;
-				}
-			}
-		}
-		if (*cp && (*cp != ':')) {
-			err = EINVAL;
-			goto fail;
-		}
-
-		idev->d_unit = unit;
-		idev->d_disk.pnum = pnum;
-		idev->d_disk.ptype = ptype;
-		idev->d_disk.data = NULL;
-		if (path != NULL)
-			*path = (*cp == 0) ? cp : cp + 1;
-		break;
-
-	case DEVT_NET:
-	case DEVT_CD:
-		/*
-		 * PS3 only has one network interface (well, two, but
-		 * netbooting over wireless is not something I'm going
-		 * to worry about.
-		 */
-
-		idev->d_unit = 0;
-		break;
-
-	default:
-		err = EINVAL;
-		goto fail;
-	}
-	idev->d_dev = dv;
-	idev->d_type = dv->dv_type;
-	if (dev == NULL) {
-		free(idev);
-	} else {
-		*dev = idev;
-	}
-	return (0);
-
-fail:
-	free(idev);
-	return (err);
-}
-
-
-char *
-ps3_fmtdev(void *vdev)
-{
-	struct ps3_devdesc *dev = (struct ps3_devdesc *)vdev;
-	char *cp;
-	static char buf[128];
-
-	switch(dev->d_type) {
-	case DEVT_NONE:
-		strcpy(buf, "(no device)");
-		break;
-
-	case DEVT_DISK:
-		cp = buf;
-		cp += sprintf(cp, "%s%d", dev->d_dev->dv_name, dev->d_unit);
-		if (dev->d_kind.disk.pnum >= 0) {
-			if (dev->d_kind.disk.ptype == PTYPE_BSDLABEL)
-				cp += sprintf(cp, "%c",
-				    dev->d_kind.disk.pnum + 'a');
-			else if (dev->d_kind.disk.ptype == PTYPE_GPT)
-				cp += sprintf(cp, "p%i",
-				    dev->d_kind.disk.pnum);
-		}
-
-		strcat(cp, ":");
-		break;
-
-	case DEVT_NET:
-	case DEVT_CD:
-		sprintf(buf, "%s%d:", dev->d_dev->dv_name, dev->d_unit);
-		break;
-	}
-	return(buf);
-}
-
-/*
- * Set currdev to suit the value being supplied in (value).
- */
-int
-ps3_setcurrdev(struct env_var *ev, int flags, const void *value)
-{
-	struct ps3_devdesc *ncurr;
-	int rv;
-
-	if ((rv = ps3_parsedev(&ncurr, value, NULL)) != 0)
-		return (rv);
-	free(ncurr);
-	env_setenv(ev->ev_name, flags | EV_NOHOOK, value, NULL, NULL);
-	return (0);
-}
diff --git a/stand/powerpc/ps3/ldscript.powerpc b/stand/powerpc/ps3/ldscript.powerpc
deleted file mode 100644
index 12f3e751fb5..00000000000
--- a/stand/powerpc/ps3/ldscript.powerpc
+++ /dev/null
@@ -1,111 +0,0 @@
-/* $FreeBSD$ */
-
-OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd",
-	      "elf32-powerpc-freebsd")
-OUTPUT_ARCH(powerpc:common)
-ENTRY(_start)
-SEARCH_DIR(/usr/lib);
-PROVIDE (__stack = 0);
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = 0x0;
-  .text      :
-  {
-    *(.text)
-    /* .gnu.warning sections are handled specially by elf32.em.  */
-    *(.gnu.warning)
-    *(.gnu.linkonce.t*)
-  } =0
-  _etext = .;
-  .interp     : { *(.interp) 	}
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .gnu.version   : { *(.gnu.version)	}
-  .gnu.version_d   : { *(.gnu.version_d)	}
-  .gnu.version_r   : { *(.gnu.version_r)	}
-  .rela.text     :
-    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
-  .rela.data     :
-    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
-  .rela.rodata   :
-    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
-  .rela.got      : { *(.rela.got)		}
-  .rela.got1     : { *(.rela.got1)		}
-  .rela.got2     : { *(.rela.got2)		}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rela.init     : { *(.rela.init)	}
-  .rela.fini     : { *(.rela.fini)	}
-  .rela.bss      : { *(.rela.bss)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .rela.sbss     : { *(.rela.sbss)		}
-  .rela.sbss2    : { *(.rela.sbss2)		}
-  .text      :
-  {
-    *(.text)
-    /* .gnu.warning sections are handled specially by elf32.em.  */
-    *(.gnu.warning)
-    *(.gnu.linkonce.t*)
-  } =0
-  _etext = .;
-  PROVIDE (etext = .);
-  .init      : { *(.init)    } =0
-  .fini      : { *(.fini)    } =0
-  .rodata    : { *(.rodata) *(.gnu.linkonce.r*) }
-  .rodata1   : { *(.rodata1) }
-  .sbss2     : { *(.sbss2)   }
-  /* Adjust the address for the data segment to the next page up. */
-  . = ((. + 0x1000) & ~(0x1000 - 1));
-  .data    :
-  {
-    *(.data)
-    *(.gnu.linkonce.d*)
-    CONSTRUCTORS
-  }
-  .data1   : { *(.data1) }
-  .got1           : { *(.got1) }
-  .dynamic        : { *(.dynamic) }
-  /* Put .ctors and .dtors next to the .got2 section, so that the pointers
-     get relocated with -mrelocatable. Also put in the .fixup pointers.
-     The current compiler no longer needs this, but keep it around for 2.7.2  */
-                PROVIDE (_GOT2_START_ = .);
-  .got2           :  { *(.got2) }
-                PROVIDE (__CTOR_LIST__ = .);
-  .ctors          : { *(.ctors) }
-                PROVIDE (__CTOR_END__ = .);
-                PROVIDE (__DTOR_LIST__ = .);
-  .dtors          : { *(.dtors) }
-                PROVIDE (__DTOR_END__ = .);
-                PROVIDE (_FIXUP_START_ = .);
-  .fixup          : { *(.fixup) }
-                PROVIDE (_FIXUP_END_ = .);
-                PROVIDE (_GOT2_END_ = .);
-                PROVIDE (_GOT_START_ = .);
-  .got            : { *(.got) }
-  .got.plt        : { *(.got.plt) }
-                PROVIDE (_GOT_END_ = .);
-  _edata  =  .;
-  PROVIDE (edata = .);
-  .sbss      :
-  {
-    PROVIDE (__sbss_start = .);
-    *(.sbss)
-    *(.scommon)
-    *(.dynsbss)
-    PROVIDE (__sbss_end = .);
-  }
-  .plt   : { *(.plt) }
-  .bss       :
-  {
-   PROVIDE (__bss_start = .);
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  . = ALIGN(4096);
-  _end = . ;
-  PROVIDE (end = .);
-}
-
diff --git a/stand/powerpc/ps3/lv1call.S b/stand/powerpc/ps3/lv1call.S
deleted file mode 100644
index a399a9c3bbf..00000000000
--- a/stand/powerpc/ps3/lv1call.S
+++ /dev/null
@@ -1,346 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/* Hypercall stubs. Note: this is all a hack and should die. */
-
-#define	hc	.long   0x44000022
-
-#define LD64_IM(r, highest, higher, high, low) \
-	lis	r,highest; \
-	addi	r,r,higher; \
-	sldi	r,r,32; \
-	addis	r,r,high; \
-	addi	r,r,low;
-
-#define SIMPLE_HVCALL(x, c) \
-.global x;			\
-x:				\
-	mflr	%r0;		\
-	stw	%r0,4(%r1);	\
-	clrldi	%r3,%r3,32;	\
-	clrldi	%r4,%r4,32;	\
-	clrldi	%r5,%r5,32;	\
-	clrldi	%r6,%r6,32;	\
-	clrldi	%r7,%r7,32;	\
-	clrldi	%r8,%r8,32;	\
-	clrldi	%r9,%r9,32;	\
-	clrldi	%r10,%r10,32;	\
-	li	%r11,c;		\
-	hc;			\
-	extsw	%r3,%r3;	\
-	lwz	%r0,4(%r1);	\
-	mtlr	%r0;		\
-	blr
-
-SIMPLE_HVCALL(lv1_open_device, 170)
-SIMPLE_HVCALL(lv1_close_device, 171)
-SIMPLE_HVCALL(lv1_gpu_open, 210)
-SIMPLE_HVCALL(lv1_gpu_context_attribute, 225)
-SIMPLE_HVCALL(lv1_panic, 255)
-SIMPLE_HVCALL(lv1_net_start_tx_dma, 187)
-SIMPLE_HVCALL(lv1_net_stop_tx_dma, 188)
-SIMPLE_HVCALL(lv1_net_start_rx_dma, 189)
-SIMPLE_HVCALL(lv1_net_stop_rx_dma, 190)
-
-.global lv1_get_physmem
-lv1_get_physmem:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r3,-8(%r1)	/* Address for maxmem */
-
-	li	%r11,69		/* Get PU ID */
-	hc
-	std	%r4,-16(%r1)
-
-	li	%r11,74		/* Get LPAR ID */
-	hc
-	std	%r4,-24(%r1)
-
-	ld	%r3,-24(%r1)
-	LD64_IM(%r4,0x0000,0x0000,0x6269,0x0000 /* "bi" */)
-	LD64_IM(%r5,0x7075,0x0000,0x0000,0x0000 /* "pu" */)
-	ld	%r6,-16(%r1)
-	LD64_IM(%r7,0x726d,0x5f73,0x697a,0x6500 /* "rm_size" */)
-	li	%r11,91
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r5,-8(%r1)
-	std	%r4,0(%r5)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_setup_address_space
-lv1_setup_address_space:
-	mflr	%r0
-	stw	%r0,4(%r1)
-
-	stw	%r3,-4(%r1)
-	stw	%r4,-8(%r1)
-
-	li	%r3,18		/* PT size: log2(256 KB) */
-	li	%r4,2		/* Two page sizes */
-	li	%r5,24		/* Page sizes: (24 << 56) | (16 << 48) */
-	sldi	%r5,%r5,24
-	li	%r6,16
-	sldi	%r6,%r6,16
-	or	%r5,%r5,%r6
-	sldi	%r5,%r5,32
-
-	li	%r11,2		/* lv1_construct_virtual_address_space */
-	hc
-
-	lwz	%r6,-4(%r1)
-	lwz	%r7,-8(%r1)
-	std	%r4,0(%r6)
-	std	%r5,0(%r7)
-
-	/* AS_ID in r4 */
-	mr	%r3,%r4
-	li	%r11,7		/* lv1_select_virtual_address_space */
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_insert_pte
-lv1_insert_pte:
-	mflr	%r0
-	stw	%r0,4(%r1)
-
-	mr	%r11,%r4	/* Save R4 */
-
-	clrldi	%r3,%r3,32
-	clrldi	%r7,%r5,32
-
-	sldi	%r4,%r3,3	/* Convert ptegidx into base PTE slot */
-	li	%r3,0		/* Current address space */
-	ld	%r5,0(%r11)
-	ld	%r6,8(%r11)
-	li	%r8,0		/* No other flags */
-	
-	li	%r11,158
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_gpu_context_allocate
-lv1_gpu_context_allocate:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r7,-4(%r1)
-
-	sldi	%r3,%r3,32
-	clrldi	%r4,%r4,32
-	or	%r3,%r3,%r4
-	clrldi	%r4,%r5,32
-	clrldi	%r5,%r6,32
-
-	li	%r11,217
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r7,-4(%r1)
-	std	%r4,0(%r7)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-	
-.global lv1_gpu_memory_allocate
-lv1_gpu_memory_allocate:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r8,-4(%r1)
-	stw	%r9,-8(%r1)
-
-	li	%r11,214
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r8,-4(%r1)
-	lwz	%r9,-8(%r1)
-	std	%r4,0(%r8)
-	std	%r5,0(%r9)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_net_control
-lv1_net_control:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r9,-4(%r1)
-
-	li	%r11,194
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r8,-4(%r1)
-	std	%r4,0(%r8)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_setup_dma
-lv1_setup_dma:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r3,-4(%r1)
-	stw	%r4,-8(%r1)
-	stw	%r5,-12(%r1)
-
-	lwz	%r3,-4(%r1)
-	lwz	%r4,-8(%r1)
-	lis	%r5,0x0800	/* 128 MB */
-	li	%r6,24		/* log2(IO_PAGESIZE) */
-	li	%r7,0		/* flags */
-	li	%r11,174	/* lv1_allocate_device_dma_region */
-	hc
-	extsw	%r3,%r3
-	cmpdi	%r3,0
-	bne	1f
-	std	%r4,-24(%r1)
-
-	lwz	%r3,-4(%r1)
-	lwz	%r4,-8(%r1)
-	li	%r5,0
-	ld	%r6,-24(%r1)
-	lis	%r7,0x0800	/* 128 MB */
-	lis	%r8,0xf800	/* flags */
-	sldi	%r8,%r8,32
-	li	%r11,176	/* lv1_map_device_dma_region */
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r9,-12(%r1)
-	ld	%r6,-24(%r1)
-	std	%r6,0(%r9)
-
-1:	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_get_repository_node_value
-lv1_get_repository_node_value:
-	mflr	%r0
-	stw	%r0,4(%r1)
-
-	sldi	%r3,%r3,32
-	clrldi	%r4,%r4,32
-	or	%r3,%r3,%r4
-	sldi	%r4,%r5,32
-	clrldi	%r5,%r6,32
-	or	%r4,%r4,%r5
-	sldi	%r5,%r7,32
-	clrldi	%r6,%r8,32
-	or	%r5,%r5,%r6
-	sldi	%r6,%r9,32
-	clrldi	%r7,%r10,32
-	or	%r6,%r6,%r7
-	lwz     %r7,8(%r1)
-	lwz     %r8,12(%r1)
-	sldi	%r7,%r7,32
-	or	%r7,%r7,%r8
-
-	li	%r11,91
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r6,16(%r1)
-	std	%r4,0(%r6)
-	lwz	%r6,20(%r1)
-	std	%r5,0(%r6)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_storage_read
-lv1_storage_read:
-	mflr	%r0
-	stw	%r0,4(%r1)
-
-	sldi	%r3,%r3,32
-	clrldi	%r4,%r4,32
-	or	%r3,%r3,%r4
-	sldi	%r4,%r5,32
-	clrldi	%r5,%r6,32
-	or	%r4,%r4,%r5
-	sldi	%r5,%r7,32
-	clrldi	%r6,%r8,32
-	or	%r5,%r5,%r6
-	sldi	%r6,%r9,32
-	clrldi	%r7,%r10,32
-	or	%r6,%r6,%r7
-	ld	%r7,8(%r1)
-	ld	%r8,16(%r1)
-
-	li	%r11,245
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r5,24(%r1)
-	std	%r4,0(%r5)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
-
-.global lv1_storage_check_async_status
-lv1_storage_check_async_status:
-	mflr	%r0
-	stw	%r0,4(%r1)
-	stw	%r7,-4(%r1)
-
-	sldi	%r3,%r3,32
-	clrldi	%r4,%r4,32
-	or	%r3,%r3,%r4
-	sldi	%r4,%r5,32
-	clrldi	%r5,%r6,32
-	or	%r4,%r4,%r5
-
-	li	%r11,254
-	hc
-	extsw	%r3,%r3
-
-	lwz	%r5,-4(%r1)
-	std	%r4,0(%r5)
-
-	lwz	%r0,4(%r1)
-	mtlr	%r0
-	blr
diff --git a/stand/powerpc/ps3/lv1call.h b/stand/powerpc/ps3/lv1call.h
deleted file mode 100644
index fb8044825bd..00000000000
--- a/stand/powerpc/ps3/lv1call.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_LV1CALL_H
-#define _PS3_LV1CALL_H
-
-#include <machine/pte.h>
-
-int lv1_get_physmem(uint64_t *maxmem);
-int lv1_setup_address_space(uint64_t *as_id, uint64_t *ptsize);
-int lv1_insert_pte(u_int ptegidx, struct lpte *pte, int lockflags);
-int lv1_panic(int reboot);
-
-#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET	0x0100
-#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC		0x0101
-#define  L1GPU_DISPLAY_SYNC_HSYNC			1
-#define  L1GPU_DISPLAY_SYNC_VSYNC			2
-#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP		0x0102
-
-int lv1_gpu_open(int);
-int lv1_gpu_context_attribute(int context, int op, int, int, int, int);
-int lv1_gpu_memory_allocate(int size, int, int, int, int, uint64_t *handle,
-	uint64_t *paddr);
-int lv1_gpu_context_allocate(uint64_t handle, int, uint64_t *context);
-
-int lv1_open_device(int, int, int /* 0 */);
-int lv1_close_device(int, int);
-int lv1_setup_dma(int, int, uint64_t *dmabase);
-
-#define GELIC_GET_MAC_ADDRESS	0x0001
-#define GELIC_GET_LINK_STATUS	0x0002
-#define  GELIC_LINK_UP		0x0001
-#define  GELIC_FULL_DUPLEX	0x0002
-#define  GELIC_AUTO_NEG		0x0004
-#define  GELIC_SPEED_10		0x0010
-#define  GELIC_SPEED_100	0x0020
-#define  GELIC_SPEED_1000	0x0040
-#define GELIC_GET_VLAN_ID	0x0004
-
-int lv1_net_init(int bus, int dev);
-int lv1_net_control(int bus, int dev, int, int, int, int, uint64_t *);
-int lv1_net_start_tx_dma(int bus, int dev, uint32_t addr, int);
-int lv1_net_start_rx_dma(int bus, int dev, uint32_t addr, int);
-int lv1_net_stop_tx_dma(int bus, int dev, int);
-int lv1_net_stop_rx_dma(int bus, int dev, int);
-
-int lv1_get_repository_node_value(uint64_t lpar_id, uint64_t n1, uint64_t n2,
-    uint64_t n3, uint64_t n4, uint64_t *v1, uint64_t *v2);
-
-int lv1_storage_read(uint64_t dev_id, uint64_t region_id, uint64_t start_sector,
-    uint64_t sector_count, uint64_t flags, uint64_t buf, uint64_t *tag);
-int lv1_storage_check_async_status(uint64_t dev_id, uint64_t tag,
-    uint64_t *status);
-
-#endif
-
diff --git a/stand/powerpc/ps3/main.c b/stand/powerpc/ps3/main.c
deleted file mode 100644
index db9ea50959f..00000000000
--- a/stand/powerpc/ps3/main.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stand.h>
-#include <sys/param.h>
-
-#define _KERNEL
-#include <machine/cpufunc.h>
-
-#include "bootstrap.h"
-#include "lv1call.h"
-#include "ps3.h"
-#include "ps3devdesc.h"
-
-struct arch_switch	archsw;
-extern void *_end;
-
-extern char bootprog_info[];
-
-int ps3_getdev(void **vdev, const char *devspec, const char **path);
-ssize_t ps3_copyin(const void *src, vm_offset_t dest, const size_t len);
-ssize_t ps3_copyout(vm_offset_t src, void *dest, const size_t len);
-ssize_t ps3_readin(const int fd, vm_offset_t dest, const size_t len);
-int ps3_autoload(void);
-int ps3_setcurrdev(struct env_var *ev, int flags, const void *value);
-
-static uint64_t basetb;
-
-int
-main(void)
-{
-	uint64_t maxmem = 0;
-	void *heapbase;
-	int i, err;
-	struct ps3_devdesc currdev;
-	struct open_file f;
-
-	lv1_get_physmem(&maxmem);
-	
-	ps3mmu_init(maxmem);
-
-	/*
-	 * Set up console.
-	 */
-	cons_probe();
-
-	/*
-	 * Set the heap to one page after the end of the loader.
-	 */
-	heapbase = (void *)(maxmem - 0x80000);
-	setheap(heapbase, maxmem);
-
-	/*
-	 * March through the device switch probing for things.
-	 */
-	for (i = 0; devsw[i] != NULL; i++) {
-		if (devsw[i]->dv_init != NULL) {
-			err = (devsw[i]->dv_init)();
-			if (err) {
-				printf("\n%s: initialization failed err=%d\n",
-					devsw[i]->dv_name, err);
-				continue;
-			}
-		}
-
-		currdev.d_dev = devsw[i];
-		currdev.d_type = currdev.d_dev->dv_type;
-
-		if (strcmp(devsw[i]->dv_name, "cd") == 0) {
-			f.f_devdata = &currdev;
-			currdev.d_unit = 0;
-
-			if (devsw[i]->dv_open(&f, &currdev) == 0)
-				break;
-		}
-
-		if (strcmp(devsw[i]->dv_name, "disk") == 0) {
-			f.f_devdata = &currdev;
-			currdev.d_unit = 3;
-			currdev.d_disk.pnum = 1;
-			currdev.d_disk.ptype = PTYPE_GPT;
-
-			if (devsw[i]->dv_open(&f, &currdev) == 0)
-				break;
-		}
-
-		if (strcmp(devsw[i]->dv_name, "net") == 0)
-			break;
-	}
-
-	if (devsw[i] == NULL)
-		panic("No boot device found!");
-	else
-		printf("Boot device: %s\n", devsw[i]->dv_name);
-
-	/*
-	 * Get timebase at boot.
-	 */
-	basetb = mftb();
-
-	archsw.arch_getdev = ps3_getdev;
-	archsw.arch_copyin = ps3_copyin;
-	archsw.arch_copyout = ps3_copyout;
-	archsw.arch_readin = ps3_readin;
-	archsw.arch_autoload = ps3_autoload;
-
-	printf("\n%s", bootprog_info);
-	printf("Memory: %lldKB\n", maxmem / 1024);
-
-	env_setenv("currdev", EV_VOLATILE, ps3_fmtdev(&currdev),
-	    ps3_setcurrdev, env_nounset);
-	env_setenv("loaddev", EV_VOLATILE, ps3_fmtdev(&currdev), env_noset,
-	    env_nounset);
-	setenv("LINES", "24", 1);
-	setenv("hw.platform", "ps3", 1);
-
-	interact();			/* doesn't return */
-
-	return (0);
-}
-
-void
-ppc_exception(int code, vm_offset_t where, register_t msr)
-{
-	mtmsr(PSL_IR | PSL_DR | PSL_RI);
-	printf("Exception %x at %#lx!\n", code, where);
-	printf("Rebooting in 5 seconds...\n");
-	delay(10000000);
-	lv1_panic(1);
-}
-
-const u_int ns_per_tick = 12;
-
-void
-exit(int code)
-{
-	lv1_panic(code);
-}
-
-void
-delay(int usecs)
-{
-	uint64_t tb,ttb;
-	tb = mftb();
-
-	ttb = tb + howmany(usecs * 1000, ns_per_tick);
-	while (tb < ttb)
-		tb = mftb();
-}
-
-time_t
-getsecs(void)
-{
-	return ((time_t)((mftb() - basetb)*ns_per_tick/1000000000));
-}
-
-time_t
-time(time_t *tloc)
-{
-	time_t rv;
-	
-	rv = getsecs();
-	if (tloc != NULL)
-		*tloc = rv;
-
-	return (rv);
-}
-
-ssize_t
-ps3_copyin(const void *src, vm_offset_t dest, const size_t len)
-{
-	bcopy(src, (void *)dest, len);
-	return (len);
-}
-
-ssize_t
-ps3_copyout(vm_offset_t src, void *dest, const size_t len)
-{
-	bcopy((void *)src, dest, len);
-	return (len);
-}
-
-ssize_t
-ps3_readin(const int fd, vm_offset_t dest, const size_t len)
-{
-	void            *buf;
-	size_t          resid, chunk, get;
-	ssize_t         got;
-	vm_offset_t     p;
-
-	p = dest;
-
-	chunk = min(PAGE_SIZE, len);
-	buf = malloc(chunk);
-	if (buf == NULL) {
-		printf("ps3_readin: buf malloc failed\n");
-		return(0);
-	}
-
-	for (resid = len; resid > 0; resid -= got, p += got) {
-		get = min(chunk, resid);
-		got = read(fd, buf, get);
-		if (got <= 0) {
-			if (got < 0)
-				printf("ps3_readin: read failed\n");
-			break;
-		}
-
-		bcopy(buf, (void *)p, got);
-	}
-
-	free(buf);
-	return (len - resid);
-}
-
-int
-ps3_autoload(void)
-{
-
-	return (0);
-}
-
diff --git a/stand/powerpc/ps3/metadata.c b/stand/powerpc/ps3/metadata.c
deleted file mode 100644
index 6f29c5774ef..00000000000
--- a/stand/powerpc/ps3/metadata.c
+++ /dev/null
@@ -1,333 +0,0 @@
-/*-
- * Copyright (c) 1998 Michael Smith <msmith@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: FreeBSD: src/sys/boot/sparc64/loader/metadata.c,v 1.6
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stand.h>
-#include <sys/param.h>
-#include <sys/reboot.h>
-#include <sys/linker.h>
-#include <sys/boot.h>
-
-#include <machine/metadata.h>
-
-#include "bootstrap.h"
-
-int
-md_getboothowto(char *kargs)
-{
-    char	*cp;
-    int		howto;
-    int		active;
-    int		i;
-    
-    /* Parse kargs */
-    howto = 0;
-    if (kargs != NULL) {
-	cp = kargs;
-	active = 0;
-	while (*cp != 0) {
-	    if (!active && (*cp == '-')) {
-		active = 1;
-	    } else if (active)
-		switch (*cp) {
-		case 'a':
-		    howto |= RB_ASKNAME;
-		    break;
-		case 'C':
-		    howto |= RB_CDROM;
-		    break;
-		case 'd':
-		    howto |= RB_KDB;
-		    break;
-		case 'D':
-		    howto |= RB_MULTIPLE;
-		    break;
-		case 'm':
-		    howto |= RB_MUTE;
-		    break;
-		case 'g':
-		    howto |= RB_GDB;
-		    break;
-		case 'h':
-		    howto |= RB_SERIAL;
-		    break;
-		case 'p':
-		    howto |= RB_PAUSE;
-		    break;
-		case 'r':
-		    howto |= RB_DFLTROOT;
-		    break;
-		case 's':
-		    howto |= RB_SINGLE;
-		    break;
-		case 'v':
-		    howto |= RB_VERBOSE;
-		    break;
-		default:
-		    active = 0;
-		    break;
-		}
-	    cp++;
-	}
-    }
-    /* get equivalents from the environment */
-    for (i = 0; howto_names[i].ev != NULL; i++)
-	if (getenv(howto_names[i].ev) != NULL)
-	    howto |= howto_names[i].mask;
-    if (!strcmp(getenv("console"), "comconsole"))
-	howto |= RB_SERIAL;
-    if (!strcmp(getenv("console"), "nullconsole"))
-	howto |= RB_MUTE;
-    return(howto);
-}
-
-/*
- * Copy the environment into the load area starting at (addr).
- * Each variable is formatted as <name>=<value>, with a single nul
- * separating each variable, and a double nul terminating the environment.
- */
-vm_offset_t
-md_copyenv(vm_offset_t addr)
-{
-    struct env_var	*ep;
-    
-    /* traverse the environment */
-    for (ep = environ; ep != NULL; ep = ep->ev_next) {
-	archsw.arch_copyin(ep->ev_name, addr, strlen(ep->ev_name));
-	addr += strlen(ep->ev_name);
-	archsw.arch_copyin("=", addr, 1);
-	addr++;
-	if (ep->ev_value != NULL) {
-	    archsw.arch_copyin(ep->ev_value, addr, strlen(ep->ev_value));
-	    addr += strlen(ep->ev_value);
-	}
-	archsw.arch_copyin("", addr, 1);
-	addr++;
-    }
-    archsw.arch_copyin("", addr, 1);
-    addr++;
-    return(addr);
-}
-
-/*
- * Copy module-related data into the load area, where it can be
- * used as a directory for loaded modules.
- *
- * Module data is presented in a self-describing format.  Each datum
- * is preceded by a 32-bit identifier and a 32-bit size field.
- *
- * Currently, the following data are saved:
- *
- * MOD_NAME	(variable)		module name (string)
- * MOD_TYPE	(variable)		module type (string)
- * MOD_ARGS	(variable)		module parameters (string)
- * MOD_ADDR	sizeof(vm_offset_t)	module load address
- * MOD_SIZE	sizeof(size_t)		module size
- * MOD_METADATA	(variable)		type-specific metadata
- */
-
-static int align;
-
-#define COPY32(v, a, c) {			\
-    u_int32_t	x = (v);			\
-    if (c)					\
-        archsw.arch_copyin(&x, a, sizeof(x));	\
-    a += sizeof(x);				\
-}
-
-#define MOD_STR(t, a, s, c) {			\
-    COPY32(t, a, c);				\
-    COPY32(strlen(s) + 1, a, c)			\
-    if (c)					\
-        archsw.arch_copyin(s, a, strlen(s) + 1);\
-    a += roundup(strlen(s) + 1, align);		\
-}
-
-#define MOD_NAME(a, s, c)	MOD_STR(MODINFO_NAME, a, s, c)
-#define MOD_TYPE(a, s, c)	MOD_STR(MODINFO_TYPE, a, s, c)
-#define MOD_ARGS(a, s, c)	MOD_STR(MODINFO_ARGS, a, s, c)
-
-#define MOD_VAR(t, a, s, c) {			\
-    COPY32(t, a, c);				\
-    COPY32(sizeof(s), a, c);			\
-    if (c)					\
-        archsw.arch_copyin(&s, a, sizeof(s));	\
-    a += roundup(sizeof(s), align);		\
-}
-
-#define MOD_ADDR(a, s, c)	MOD_VAR(MODINFO_ADDR, a, s, c)
-#define MOD_SIZE(a, s, c)	MOD_VAR(MODINFO_SIZE, a, s, c)
-
-#define MOD_METADATA(a, mm, c) {		\
-    COPY32(MODINFO_METADATA | mm->md_type, a, c);\
-    COPY32(mm->md_size, a, c);			\
-    if (c)					\
-        archsw.arch_copyin(mm->md_data, a, mm->md_size);\
-    a += roundup(mm->md_size, align);		\
-}
-
-#define MOD_END(a, c) {				\
-    COPY32(MODINFO_END, a, c);			\
-    COPY32(0, a, c);				\
-}
-
-vm_offset_t
-md_copymodules(vm_offset_t addr, int kern64)
-{
-    struct preloaded_file	*fp;
-    struct file_metadata	*md;
-    uint64_t			scratch64;
-    int				c;
-
-    c = addr != 0;
-    /* start with the first module on the list, should be the kernel */
-    for (fp = file_findfile(NULL, NULL); fp != NULL; fp = fp->f_next) {
-
-	MOD_NAME(addr, fp->f_name, c);	/* this field must come first */
-	MOD_TYPE(addr, fp->f_type, c);
-	if (fp->f_args)
-	    MOD_ARGS(addr, fp->f_args, c);
-	if (kern64) {
-		scratch64 = fp->f_addr;
-		MOD_ADDR(addr, scratch64, c);
-		scratch64 = fp->f_size;
-		MOD_SIZE(addr, scratch64, c);
-	} else {
-		MOD_ADDR(addr, fp->f_addr, c);
-		MOD_SIZE(addr, fp->f_size, c);
-	}
-	for (md = fp->f_metadata; md != NULL; md = md->md_next) {
-	    if (!(md->md_type & MODINFOMD_NOCOPY)) {
-		MOD_METADATA(addr, md, c);
-	    }
-	}
-    }
-    MOD_END(addr, c);
-    return(addr);
-}
-
-/*
- * Load the information expected by a powerpc kernel.
- *
- * - The 'boothowto' argument is constructed
- * - The 'bootdev' argument is constructed
- * - The kernel environment is copied into kernel space.
- * - Module metadata are formatted and placed in kernel space.
- */
-int
-md_load_dual(char *args, vm_offset_t *modulep, int kern64)
-{
-    struct preloaded_file	*kfp;
-    struct preloaded_file	*xp;
-    struct file_metadata	*md;
-    vm_offset_t			kernend;
-    vm_offset_t			addr;
-    vm_offset_t			envp;
-    vm_offset_t			size;
-    uint64_t			scratch64;
-    char			*rootdevname;
-    int				howto;
-
-    align = kern64 ? 8 : 4;
-    howto = md_getboothowto(args);
-
-    /* 
-     * Allow the environment variable 'rootdev' to override the supplied device 
-     * This should perhaps go to MI code and/or have $rootdev tested/set by
-     * MI code before launching the kernel.
-     */
-    rootdevname = getenv("rootdev");
-    if (rootdevname == NULL)
-	    rootdevname = getenv("currdev");
-    /* Try reading the /etc/fstab file to select the root device */
-    getrootmount(rootdevname);
-
-    /* find the last module in the chain */
-    addr = 0;
-    for (xp = file_findfile(NULL, NULL); xp != NULL; xp = xp->f_next) {
-	if (addr < (xp->f_addr + xp->f_size))
-	    addr = xp->f_addr + xp->f_size;
-    }
-    /* pad to a page boundary */
-    addr = roundup(addr, PAGE_SIZE);
-
-    /* copy our environment */
-    envp = addr;
-    addr = md_copyenv(addr);
-
-    /* pad to a page boundary */
-    addr = roundup(addr, PAGE_SIZE);
-
-    kernend = 0;
-    kfp = file_findfile(NULL, kern64 ? "elf64 kernel" : "elf32 kernel");
-    if (kfp == NULL)
-	kfp = file_findfile(NULL, "elf kernel");
-    if (kfp == NULL)
-	panic("can't find kernel file");
-    file_addmetadata(kfp, MODINFOMD_HOWTO, sizeof howto, &howto);
-    if (kern64) {
-	scratch64 = envp;
-	file_addmetadata(kfp, MODINFOMD_ENVP, sizeof scratch64, &scratch64);
-	scratch64 = kernend;
-	file_addmetadata(kfp, MODINFOMD_KERNEND, sizeof scratch64, &scratch64);
-    } else {
-	file_addmetadata(kfp, MODINFOMD_ENVP, sizeof envp, &envp);
-	file_addmetadata(kfp, MODINFOMD_KERNEND, sizeof kernend, &kernend);
-    }
-
-    *modulep = addr;
-    size = md_copymodules(0, kern64);
-    kernend = roundup(addr + size, PAGE_SIZE);
-
-    md = file_findmetadata(kfp, MODINFOMD_KERNEND);
-    if (kern64) {
-	scratch64 = kernend;
-	bcopy(&scratch64, md->md_data, sizeof scratch64);
-    } else {
-	bcopy(&kernend, md->md_data, sizeof kernend);
-    }
-	
-    (void)md_copymodules(addr, kern64);
-
-    return(0);
-}
-
-int
-md_load(char *args, vm_offset_t *modulep)
-{
-    return (md_load_dual(args, modulep, 0));
-}
-
-int
-md_load64(char *args, vm_offset_t *modulep)
-{
-    return (md_load_dual(args, modulep, 1));
-}
-
diff --git a/stand/powerpc/ps3/ppc64_elf_freebsd.c b/stand/powerpc/ps3/ppc64_elf_freebsd.c
deleted file mode 100644
index 2fbb30de117..00000000000
--- a/stand/powerpc/ps3/ppc64_elf_freebsd.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*-
- * Copyright (c) 2001 Benno Rice <benno@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#define __ELF_WORD_SIZE 64
-
-#include <sys/param.h>
-#include <sys/linker.h>
-
-#include <machine/metadata.h>
-#include <machine/elf.h>
-
-#include <stand.h>
-
-#include "bootstrap.h"
-
-extern char		end[];
-extern vm_offset_t	reloc;	/* From <arch>/conf.c */
-
-int
-ppc64_elf_loadfile(char *filename, u_int64_t dest,
-    struct preloaded_file **result)
-{
-	int	r;
-
-	r = __elfN(loadfile)(filename, dest, result);
-	if (r != 0)
-		return (r);
-
-	/*
-	 * No need to sync the icache for modules: this will
-	 * be done by the kernel after relocation.
-	 */
-	if (!strcmp((*result)->f_type, "elf kernel"))
-		__syncicache((void *) (*result)->f_addr, (*result)->f_size);
-	return (0);
-}
-
-int
-ppc64_elf_exec(struct preloaded_file *fp)
-{
-	struct file_metadata	*fmp;
-	vm_offset_t		mdp;
-	Elf_Ehdr		*e;
-	int			error;
-	int (*entry)(u_long, u_long, u_long, void *, u_long);
-
-	if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == NULL) {
-		return(EFTYPE);
-	}
-	e = (Elf_Ehdr *)&fmp->md_data;
-	
-	/* Handle function descriptor for ELFv1 kernels */
-	if ((e->e_flags & 3) == 2)
-		entry = e->e_entry;
-	else
-		entry = (void *)(uintptr_t)(*(uint64_t *)e->e_entry);
-
-	if ((error = md_load64(fp->f_args, &mdp)) != 0)
-		return (error);
-
-	printf("Kernel entry at %p ...\n", entry);
-
-	dev_cleanup();
-
-	entry(0 /* FDT */, 0 /* Phys. mem offset */, 0 /* OF entry */,
-	     (void *)mdp, 0xfb5d104d);
-
-	panic("exec returned");
-}
-
-struct file_format	ppc_elf64 =
-{
-	ppc64_elf_loadfile,
-	ppc64_elf_exec
-};
diff --git a/stand/powerpc/ps3/ps3.h b/stand/powerpc/ps3/ps3.h
deleted file mode 100644
index 1a770029a5c..00000000000
--- a/stand/powerpc/ps3/ps3.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_H
-#define _PS3_H
-
-int ps3mmu_init(int maxmem);
-int ps3mmu_map(uint64_t va, uint64_t pa);
-void *ps3mmu_mapdev(uint64_t pa, size_t length);
-
-#endif
diff --git a/stand/powerpc/ps3/ps3bus.h b/stand/powerpc/ps3/ps3bus.h
deleted file mode 100644
index a3b20f3bd88..00000000000
--- a/stand/powerpc/ps3/ps3bus.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_BUS_H
-#define _PS3_BUS_H
-
-enum {
-	PS3_BUS_TYPE_STOR = 5,
-};
-
-enum {
-	PS3_DEV_TYPE_STOR_DISK = 0,
-	PS3_DEV_TYPE_STOR_CDROM = 5,
-	PS3_DEV_TYPE_STOR_FLASH = 14,
-};
-
-#endif
diff --git a/stand/powerpc/ps3/ps3cdrom.c b/stand/powerpc/ps3/ps3cdrom.c
deleted file mode 100644
index d8d41fde49a..00000000000
--- a/stand/powerpc/ps3/ps3cdrom.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand <geoffrey.levand@mail.ru>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <machine/stdarg.h>
-#include <stand.h>
-
-#include "bootstrap.h"
-#include "ps3bus.h"
-#include "ps3devdesc.h"
-#include "ps3stor.h"
-
-#define dev_printf(dev, fmt, args...)	\
-	printf("%s%d: " fmt "\n", dev->d_dev->dv_name, dev->d_unit, ##args)
-
-#ifdef CD_DEBUG
-#define DEBUG(fmt, args...)		printf("%s:%d: " fmt "\n", __func__, __LINE__, ##args)
-#else
-#define DEBUG(fmt, args...)
-#endif
-
-static int ps3cdrom_init(void);
-static int ps3cdrom_strategy(void *devdata, int flag, daddr_t dblk,
-	size_t size, char *buf, size_t *rsize);
-static int ps3cdrom_open(struct open_file *f, ...);
-static int ps3cdrom_close(struct open_file *f);
-static int ps3cdrom_print(int verbose);
-
-struct devsw ps3cdrom = {
-	"cd",
-	DEVT_CD,
-	ps3cdrom_init,
-	ps3cdrom_strategy,
-	ps3cdrom_open,
-	ps3cdrom_close,
-	noioctl,
-	ps3cdrom_print,
-};
-
-static struct ps3_stordev stor_dev;
-
-static int ps3cdrom_init(void)
-{
-	int err;
-
-	err = ps3stor_setup(&stor_dev, PS3_DEV_TYPE_STOR_CDROM);
-	if (err)
-		return err;
-
-	return 0;
-}
-
-static int ps3cdrom_strategy(void *devdata, int flag, daddr_t dblk,
-	size_t size, char *buf, size_t *rsize)
-{
-	struct ps3_devdesc *dev = (struct ps3_devdesc *) devdata;
-	int err;
-
-	DEBUG("d_unit=%u dblk=%llu size=%u", dev->d_unit, dblk, size);
-
-	flag &= F_MASK;
-	if (flag != F_READ) {
-		dev_printf(dev, "write operation is not supported!");
-		return EROFS;
-	}
-
-	if (dblk % (stor_dev.sd_blksize / DEV_BSIZE) != 0)
-		return EINVAL;
-
-	dblk /= (stor_dev.sd_blksize / DEV_BSIZE);
-
-	if (size % stor_dev.sd_blksize) {
-		dev_printf(dev,
-		    "size=%u is not multiple of device block size=%llu", size,
-		    stor_dev.sd_blksize);
-		return EINVAL;
-	}
-
-	if (rsize)
-		*rsize = 0;
-
-	err = ps3stor_read_sectors(&stor_dev, dev->d_unit, dblk,
-		size / stor_dev.sd_blksize, 0, buf);
-
-	if (!err && rsize)
-		*rsize = size;
-
-	if (err)
-		dev_printf(dev,
-		    "read operation failed dblk=%llu size=%d err=%d", dblk,
-		    size, err);
-
-	return err;
-}
-
-static int ps3cdrom_open(struct open_file *f, ...)
-{
-	char buf[2048];
-	va_list ap;
-	struct ps3_devdesc *dev;
-	int err;
-
-	va_start(ap, f);
-	dev = va_arg(ap, struct ps3_devdesc *);
-	va_end(ap);
-
-	if (dev->d_unit > 0) {
-		dev_printf(dev, "attempt to open nonexistent disk");
-		return ENXIO;
-	}
-
-	err = ps3stor_read_sectors(&stor_dev, dev->d_unit, 16, 1, 0, buf);
-	if (err)
-		return EIO;
-
-	/* Do not attach if not ISO9660 (workaround for buggy firmware) */
-	if (memcmp(buf, "\001CD001", 6) != 0)
-		return EIO;
-
-	return 0;
-}
-
-static int ps3cdrom_close(struct open_file *f)
-{
-	return 0;
-}
-
-static int ps3cdrom_print(int verbose)
-{
-	return (0);
-}
diff --git a/stand/powerpc/ps3/ps3cons.c b/stand/powerpc/ps3/ps3cons.c
deleted file mode 100644
index fa9ef321c62..00000000000
--- a/stand/powerpc/ps3/ps3cons.c
+++ /dev/null
@@ -1,173 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stand.h>
-#include "bootstrap.h"
-#include "font.h"
-#include "lv1call.h"
-#include "ps3.h"
-
-#define FONT_SIZE 14
-#define FONT dflt_font_14
-#define XMARGIN 40
-#define YMARGIN 30
-#define BG_COLOR 0x00000000
-#define FG_COLOR 0xffffffff
-
-#define FB_SIZE	(16*1024*1024)
-uint64_t fb_paddr = 0;
-uint32_t *fb_vaddr;
-
-int fb_width, fb_height;
-int x, y;
-
-static void ps3cons_probe(struct console *cp);
-static int ps3cons_init(int arg);
-static void ps3cons_putchar(int c);
-static int ps3cons_getchar();
-static int ps3cons_poll();
-
-struct console ps3console = {
-	"ps3",
-	"Playstation 3 Framebuffer",
-	0,
-	ps3cons_probe,
-	ps3cons_init,
-	ps3cons_putchar,
-	ps3cons_getchar,
-	ps3cons_poll,
-};
-
-static void
-ps3cons_probe(struct console *cp)
-{
-	/* XXX: Get from HV */
-	fb_width = 720;
-	fb_height = 480;
-
-	cp->c_flags |= C_PRESENTIN|C_PRESENTOUT;
-}
-
-static int
-ps3cons_init(int arg)
-{
-	uint64_t fbhandle, fbcontext;
-	int i;
-
-	lv1_gpu_open(0);
-	lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET,
-	    0,0,0,0);
-	lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET,
-	    0,0,1,0);
-	lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
-	    0,L1GPU_DISPLAY_SYNC_VSYNC,0,0);
-	lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
-	    1,L1GPU_DISPLAY_SYNC_VSYNC,0,0);
-	lv1_gpu_memory_allocate(FB_SIZE, 0, 0, 0, 0, &fbhandle, &fb_paddr);
-	lv1_gpu_context_allocate(fbhandle, 0, &fbcontext);
-
-	lv1_gpu_context_attribute(fbcontext,
-	    L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 0, 0, 0, 0);
-	lv1_gpu_context_attribute(fbcontext,
-	    L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 1, 0, 0, 0);
-
-	fb_vaddr = ps3mmu_mapdev(fb_paddr, FB_SIZE);
-
-	x = y = 0;
-
-	/* Blank console */
-	for (i = 0; i < fb_width*fb_height; i++)
-		fb_vaddr[i] = BG_COLOR;
-
-	return (0);
-}
-
-static void
-ps3cons_putchar(int c)
-{
-	uint32_t fg, bg;
-	uint32_t *addr;
-	int i, j, k;
-	u_char *p;
-
-	fg = FG_COLOR;
-	bg = BG_COLOR;
-
-	switch (c) {
-	case '\0':
-		break;
-	case '\r':
-		x = 0;
-		break;
-	case '\n':
-		y += FONT_SIZE;
-		break;
-	case '\b':
-		x = max(0, x - 8);
-		break;
-	default:
-		/* Wrap long lines */
-		if (x + XMARGIN + FONT_SIZE > fb_width - XMARGIN) {
-			y += FONT_SIZE;
-			x = 0;
-		}
-
-		if (y + YMARGIN + FONT_SIZE > fb_height - YMARGIN)
-			y = 0;
-		
-		addr = fb_vaddr + (y + YMARGIN)*fb_width + (x + XMARGIN);
-		p = FONT + c*FONT_SIZE;
-
-		for (i = 0; i < FONT_SIZE; i++) {
-			for (j = 0, k = 7; j < 8; j++, k--) {
-				if ((p[i] & (1 << k)) == 0)
-					*(addr + j) = bg;
-				else
-					*(addr + j) = fg;
-			}
-
-			addr += fb_width;
-		}
-
-		x += 8;
-		break;
-	}
-}
-
-static int
-ps3cons_getchar()
-{
-	return (-1);
-}
-
-static int
-ps3cons_poll()
-{
-	return (0);
-}
-
diff --git a/stand/powerpc/ps3/ps3devdesc.h b/stand/powerpc/ps3/ps3devdesc.h
deleted file mode 100644
index 5a6e52ff527..00000000000
--- a/stand/powerpc/ps3/ps3devdesc.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*-
- * Copyright (C) 2000 Benno Rice.
- * Copyright (C) 2007 Semihalf, Rafal Jaworowski <raj@semihalf.com>
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_DEV_DESC_H
-#define _PS3_DEV_DESC_H
-
-/* Note: Must match the 'struct devdesc' in bootstrap.h */
-struct ps3_devdesc {
-	struct devsw *d_dev;
-	int d_type;
-	int d_unit;
-
-	union {
-		struct {
-			void	*data;
-			int	pnum;
-			int	ptype;
-		} disk;
-	} d_kind;
-};
-
-#define d_disk	d_kind.disk
-
-#define PTYPE_BSDLABEL	1
-#define PTYPE_GPT	2
-
-#endif
diff --git a/stand/powerpc/ps3/ps3disk.c b/stand/powerpc/ps3/ps3disk.c
deleted file mode 100644
index c33a023e70a..00000000000
--- a/stand/powerpc/ps3/ps3disk.c
+++ /dev/null
@@ -1,315 +0,0 @@
-/*-
- * Copyright (C) 2008 Semihalf, Rafal Jaworowski
- * Copyright (C) 2009 Semihalf, Piotr Ziecik
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/endian.h>
-#include <machine/stdarg.h>
-#include <stand.h>
-#include <uuid.h>
-
-#define FSTYPENAMES
-#include <sys/disklabel.h>
-#include <sys/diskmbr.h>
-#include <sys/gpt.h>
-
-#include "bootstrap.h"
-#include "ps3bus.h"
-#include "ps3devdesc.h"
-#include "ps3stor.h"
-
-#define dev_printf(dev, fmt, args...)	\
-	printf("%s%d: " fmt "\n" , dev->d_dev->dv_name, dev->d_unit, ##args)
-
-#ifdef DISK_DEBUG
-#define DEBUG(fmt, args...)		printf("%s:%d: " fmt "\n" , __func__ , __LINE__, ##args)
-#else
-#define DEBUG(fmt, args...)
-#endif
-
-struct open_dev;
-
-static int ps3disk_open_gpt(struct ps3_devdesc *dev, struct open_dev *od);
-static void ps3disk_uuid_letoh(uuid_t *uuid);
-
-static int ps3disk_init(void);
-static int ps3disk_strategy(void *devdata, int flag, daddr_t dblk,
-	size_t size, char *buf, size_t *rsize);
-static int ps3disk_open(struct open_file *f, ...);
-static int ps3disk_close(struct open_file *f);
-static int ps3disk_print(int verbose);
-
-struct devsw ps3disk = {
-	"disk",
-	DEVT_DISK,
-	ps3disk_init,
-	ps3disk_strategy,
-	ps3disk_open,
-	ps3disk_close,
-	noioctl,
-	ps3disk_print,
-};
-
-struct gpt_part {
-	int		gp_index;
-	uuid_t		gp_type;
-	uint64_t	gp_start;
-	uint64_t	gp_end;
-};
-
-struct open_dev {
-	uint64_t od_start;
-
-	union {
-		struct {
-			int 		nparts;
-			struct gpt_part	*parts;
-		} gpt;
-	} od_kind;
-};
-
-#define od_gpt_nparts	od_kind.gpt.nparts
-#define od_gpt_parts	od_kind.gpt.parts
-
-static struct ps3_stordev stor_dev;
-
-static int ps3disk_init(void)
-{
-	int err;
-
-	err = ps3stor_setup(&stor_dev, PS3_DEV_TYPE_STOR_DISK);
-	if (err)
-		return err;
-
-	return 0;
-}
-
-static int ps3disk_strategy(void *devdata, int flag, daddr_t dblk,
-    size_t size, char *buf, size_t *rsize)
-{
-	struct ps3_devdesc *dev = (struct ps3_devdesc *) devdata;
-	struct open_dev *od = (struct open_dev *) dev->d_disk.data;
-	int err;
-
-	flag &= F_MASK;
-	if (flag != F_READ) {
-		dev_printf(dev, "write operation is not supported!\n");
-		return EROFS;
-	}
-
-	if (size % stor_dev.sd_blksize) {
-		dev_printf(dev, "size=%u is not multiple of device block size=%llu\n",
-			size, stor_dev.sd_blksize);
-		return EIO;
-	}
-
-	if (rsize)
-		*rsize = 0;
-
-	err = ps3stor_read_sectors(&stor_dev, dev->d_unit, od->od_start + dblk,
-		size / stor_dev.sd_blksize,  0, buf);
-
-	if (!err && rsize)
-		*rsize = size;
-
-	if (err)
-		dev_printf(dev, "read operation failed dblk=%llu size=%d err=%d\n",
-			dblk, size, err);
-
-	return err;
-}
-
-static int ps3disk_open(struct open_file *f, ...)
-{
-	va_list ap;
-	struct ps3_devdesc *dev;
-	struct open_dev *od;
-	int err;
-
-	va_start(ap, f);
-	dev = va_arg(ap, struct ps3_devdesc *);
-	va_end(ap);
-
-	od = malloc(sizeof(struct open_dev));
-	if (!od) {
-		dev_printf(dev, "couldn't allocate memory for new open_dev\n");
-		return ENOMEM;
-	}
-
-	err = ps3disk_open_gpt(dev, od);
-
-	if (err) {
-		dev_printf(dev, "couldn't open GPT disk error=%d\n", err);
-		free(od);
-	} else {
-		((struct ps3_devdesc *) (f->f_devdata))->d_disk.data = od;
-	}
-
-	return err;
-}
-
-static int ps3disk_close(struct open_file *f)
-{
-	struct ps3_devdesc *dev = f->f_devdata;
-	struct open_dev *od = dev->d_disk.data;
-
-	if (dev->d_disk.ptype == PTYPE_GPT && od->od_gpt_nparts)
-		free(od->od_gpt_parts);
-
-	free(od);
-
-	dev->d_disk.data = NULL;
-
-	return 0;
-}
-
-static int ps3disk_print(int verbose)
-{
-	return (0);
-}
-
-static int ps3disk_open_gpt(struct ps3_devdesc *dev, struct open_dev *od)
-{
-	char buf[512];
-	struct gpt_hdr *hdr;
-	struct gpt_ent *ent;
-	daddr_t slba, elba, lba;
-	int nparts, eps, i, part, err;
-
-	od->od_gpt_nparts = 0;
-	od->od_gpt_parts = NULL;
-
-	err = ps3stor_read_sectors(&stor_dev, dev->d_unit, 0, 1, 0, buf);
-	if (err) {
-		err = EIO;
-		goto out;
-	}
-
-	if (le16toh(*((uint16_t *) (buf + DOSMAGICOFFSET))) != DOSMAGIC) {
-		err = ENXIO;
-		goto out;
-	}
-
-	err = ps3stor_read_sectors(&stor_dev, dev->d_unit, 1, 1, 0, buf);
-	if (err) {
-		err = EIO;
-		goto out;
-	}
-
-	hdr = (struct gpt_hdr *) buf;
-
-	if (bcmp(hdr->hdr_sig, GPT_HDR_SIG, sizeof(hdr->hdr_sig)) ||
-		le64toh(hdr->hdr_lba_self) != 1 || le32toh(hdr->hdr_revision) < 0x00010000 ||
-		le32toh(hdr->hdr_entsz) < sizeof(struct gpt_ent) ||
-		stor_dev.sd_blksize % le32toh(hdr->hdr_entsz) != 0) {
-		err = ENXIO;
-		goto out;
-	}
-
-	nparts = 0;
-	eps = stor_dev.sd_blksize / le32toh(hdr->hdr_entsz);
-	slba = le64toh(hdr->hdr_lba_table);
-	elba = slba + le32toh(hdr->hdr_entries) / eps;
-
-	for (lba = slba; lba < elba; lba++) {
-		err = ps3stor_read_sectors(&stor_dev, dev->d_unit, lba, 1, 0, buf);
-		if (err) {
-			err = EIO;
-			goto out;
-		}
-
-		ent = (struct gpt_ent *) buf;
-
-		for (i = 0; i < eps; i++) {
-			if (uuid_is_nil(&ent[i].ent_type, NULL) ||
-				le64toh(ent[i].ent_lba_start) == 0 ||
-				le64toh(ent[i].ent_lba_end) < le64toh(ent[i].ent_lba_start))
-				continue;
-
-			nparts++;
-		}
-	}
-
-	if (nparts) {
-		od->od_gpt_nparts = nparts;
-
-		od->od_gpt_parts = malloc(nparts * sizeof(struct gpt_part));
-		if (!od->od_gpt_parts) {
-			err = ENOMEM;
-			goto out;
-		}
-
-		for (lba = slba, part = 0; lba < elba; lba++) {
-			err = ps3stor_read_sectors(&stor_dev, dev->d_unit, lba, 1, 0, buf);
-			if (err) {
-				err = EIO;
-				goto out;
-			}
-
-			ent = (struct gpt_ent *) buf;
-
-			for (i = 0; i < eps; i++) {
-				if (uuid_is_nil(&ent[i].ent_type, NULL) ||
-					le64toh(ent[i].ent_lba_start) == 0 ||
-					le64toh(ent[i].ent_lba_end) < le64toh(ent[i].ent_lba_start))
-					continue;
-
-				od->od_gpt_parts[part].gp_index = (lba - slba) * eps + i + 1;
-				od->od_gpt_parts[part].gp_type = ent[i].ent_type;
-				od->od_gpt_parts[part].gp_start = le64toh(ent[i].ent_lba_start);
-				od->od_gpt_parts[part].gp_end = le64toh(ent[i].ent_lba_end);
-				ps3disk_uuid_letoh(&od->od_gpt_parts[part].gp_type);
-				part++;
-			}
-		}
-	}
-
-	dev->d_disk.ptype = PTYPE_GPT;
-
-	if (od->od_gpt_nparts && !dev->d_disk.pnum)
-		dev->d_disk.pnum = od->od_gpt_parts[0].gp_index;
-
-	for (i = 0; i < od->od_gpt_nparts; i++)
-		if (od->od_gpt_parts[i].gp_index == dev->d_disk.pnum)
-			od->od_start = od->od_gpt_parts[i].gp_start;
-
-	err = 0;
-
-out:
-
-	if (err && od->od_gpt_parts)
-		free(od->od_gpt_parts);
-
-	return err;
-}
-
-static void ps3disk_uuid_letoh(uuid_t *uuid)
-{
-	uuid->time_low = le32toh(uuid->time_low);
-	uuid->time_mid = le16toh(uuid->time_mid);
-	uuid->time_hi_and_version = le16toh(uuid->time_hi_and_version);
-}
diff --git a/stand/powerpc/ps3/ps3mmu.c b/stand/powerpc/ps3/ps3mmu.c
deleted file mode 100644
index 08dcf75d283..00000000000
--- a/stand/powerpc/ps3/ps3mmu.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stand.h>
-#include <stdint.h>
-
-#define _KERNEL
-#include <machine/cpufunc.h>
-#include <machine/psl.h>
-#include <machine/pte.h>
-#include <machine/slb.h>
-#include <machine/param.h>
-
-#include "bootstrap.h"
-#include "lv1call.h"
-#include "ps3.h"
-
-register_t pteg_count, pteg_mask;
-uint64_t as_id;
-uint64_t virtual_avail;
-
-int
-ps3mmu_map(uint64_t va, uint64_t pa)
-{
-	struct lpte pt;
-	int shift;
-	uint64_t vsid, ptegidx;
-	
-	if (pa < 0x8000000) { /* Phys mem? */
-		pt.pte_hi = LPTE_BIG;
-		pt.pte_lo = LPTE_M;
-		shift = 24;
-		vsid = 0;
-	} else {
-		pt.pte_hi = 0;
-		pt.pte_lo = LPTE_I | LPTE_G | LPTE_M | LPTE_NOEXEC;
-		shift = ADDR_PIDX_SHFT;
-		vsid = 1;
-	}
-
-	pt.pte_hi |= (vsid << LPTE_VSID_SHIFT) |
-            (((uint64_t)(va & ADDR_PIDX) >> ADDR_API_SHFT64) & LPTE_API);
-	pt.pte_lo |= pa;
-	ptegidx = vsid ^ (((uint64_t)va & ADDR_PIDX) >> shift);
-
-	pt.pte_hi |= LPTE_LOCKED | LPTE_VALID;
-	ptegidx &= pteg_mask;
-
-	return (lv1_insert_pte(ptegidx, &pt, LPTE_LOCKED));
-}
-
-void *
-ps3mmu_mapdev(uint64_t pa, size_t length)
-{
-	uint64_t spa;
-	void *mapstart;
-	int err;
-	
-	mapstart = (void *)(uintptr_t)virtual_avail;
-
-	for (spa = pa; spa < pa + length; spa += PAGE_SIZE) {
-		err = ps3mmu_map(virtual_avail, spa);
-		virtual_avail += PAGE_SIZE;
-		if (err != 0)
-			return (NULL);
-	}
-
-	return (mapstart);
-}
-
-int
-ps3mmu_init(int maxmem)
-{
-	uint64_t ptsize;
-	int i;
-
-	i = lv1_setup_address_space(&as_id, &ptsize);
-	pteg_count = ptsize / sizeof(struct lpteg);
-	pteg_mask = pteg_count - 1;
-
-	for (i = 0; i < maxmem; i += 16*1024*1024)
-		ps3mmu_map(i,i);
-
-	virtual_avail = 0x10000000;
-
-	__asm __volatile ("slbia; slbmte %0, %1; slbmte %2,%3" ::
-	    "r"((0 << SLBV_VSID_SHIFT) | SLBV_L), "r"(0 | SLBE_VALID),
-	    "r"(1 << SLBV_VSID_SHIFT),
-	    "r"((1 << SLBE_ESID_SHIFT) | SLBE_VALID | 1));
-
-	mtmsr(PSL_IR | PSL_DR | PSL_RI | PSL_ME);
-
-	return (0);
-}
-
diff --git a/stand/powerpc/ps3/ps3net.c b/stand/powerpc/ps3/ps3net.c
deleted file mode 100644
index 142eab8243a..00000000000
--- a/stand/powerpc/ps3/ps3net.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/socket.h>
-  
-#include <net/if.h>
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/if_ether.h>
-#include <netinet/ip.h>
-
-#define _KERNEL
-#include <machine/cpufunc.h>
-
-#include <stand.h>
-#include <net.h>
-#include <netif.h>
-#include "bootstrap.h"
-#include "lv1call.h"
-#include "ps3.h"
-
-#define GELIC_DESCR_OWNED	0xa0000000
-#define GELIC_CMDSTAT_NOIPSEC	0x00080000
-#define GELIC_CMDSTAT_LAST	0x00040000
-#define GELIC_RXERRORS		0x7def8000
-
-#define GELIC_POLL_PERIOD	100 /* microseconds */
-
-static int	ps3net_probe(struct netif *, void *);
-static int	ps3net_match(struct netif *, void *);
-static void	ps3net_init(struct iodesc *, void *);
-static int	ps3net_get(struct iodesc *, void *, size_t, time_t);
-static int	ps3net_put(struct iodesc *, void *, size_t);
-static void	ps3net_end(struct netif *);
-
-struct netif_stats ps3net_stats[1];
-struct netif_dif ps3net_ifs[] = {{0, 1, ps3net_stats, 0}};
-
-/* XXX: Get from firmware, not hardcoding */
-static int busid = 1;
-static int devid = 0;
-static int vlan;
-static uint64_t dma_base;
-
-struct gelic_dmadesc {
-	uint32_t paddr;
-	uint32_t len;
-	uint32_t next;
-	uint32_t cmd_stat;
-	uint32_t result_size;
-	uint32_t valid_size;
-	uint32_t data_stat;
-	uint32_t rxerror;
-};
-
-struct netif_driver ps3net = {
-	"net",
-	ps3net_match,
-	ps3net_probe,
-	ps3net_init,
-	ps3net_get,
-	ps3net_put,
-	ps3net_end,
-	ps3net_ifs, 1
-};
-
-static int
-ps3net_match(struct netif *nif, void *machdep_hint)
-{
-	return (1);
-}
-
-static int
-ps3net_probe(struct netif *nif, void *machdep_hint)
-{
-	return (0);
-}
-
-static int
-ps3net_put(struct iodesc *desc, void *pkt, size_t len)
-{
-	volatile static struct gelic_dmadesc txdesc __aligned(32);
-	volatile static char txbuf[1536] __aligned(128);
-	size_t sendlen;
-	int err;
-
-#if defined(NETIF_DEBUG)
-	struct ether_header *eh;
-
-	printf("net_put: desc %p, pkt %p, len %d\n", desc, pkt, len);
-	eh = pkt;
-	printf("dst: %s ", ether_sprintf(eh->ether_dhost));
-	printf("src: %s ", ether_sprintf(eh->ether_shost));
-	printf("type: 0x%x\n", eh->ether_type & 0xffff);
-#endif
-
-	while (txdesc.cmd_stat & GELIC_DESCR_OWNED) {
-		printf("Stalled XMIT!\n");
-		delay(10);
-	}
-
-	/*
-	 * We must add 4 extra bytes to this packet to store the destination
-	 * VLAN. 
-	 */
-	memcpy(txbuf, pkt, 12);
-	sendlen = 12;
-	
-	if (vlan >= 0) {
-		sendlen += 4;
-		((uint8_t *)txbuf)[12] = 0x81;
-		((uint8_t *)txbuf)[13] = 0x00;
-		((uint8_t *)txbuf)[14] = vlan >> 8;
-		((uint8_t *)txbuf)[15] = vlan & 0xff;
-	}
-	memcpy((void *)txbuf + sendlen, pkt + 12, len - 12);
-	sendlen += len - 12;
-
-	bzero(&txdesc, sizeof(txdesc));
-	txdesc.paddr = dma_base + (uint32_t)txbuf;
-	txdesc.len = sendlen;
-	txdesc.cmd_stat = GELIC_CMDSTAT_NOIPSEC | GELIC_CMDSTAT_LAST |
-	    GELIC_DESCR_OWNED;
-
-	powerpc_sync();
-
-	do {
-		err = lv1_net_start_tx_dma(busid, devid,
-		    dma_base + (uint32_t)&txdesc, 0);
-		delay(1);
-		if (err != 0)
-			printf("TX Error: %d\n",err);
-	} while (err != 0);
-
-	return (len);
-}
-
-static int
-ps3net_get(struct iodesc *desc, void *pkt, size_t len, time_t timeout)
-{
-	volatile static struct gelic_dmadesc rxdesc __aligned(32);
-	volatile static char rxbuf[1536] __aligned(128);
-	int err = 0;
-
-	if (len == 0)
-		goto restartdma;
-
-	timeout *= 1000000; /* convert to microseconds */
-	while (rxdesc.cmd_stat & GELIC_DESCR_OWNED) {
-		if (timeout < GELIC_POLL_PERIOD) 
-			return (ETIMEDOUT);
-		delay(GELIC_POLL_PERIOD);
-		timeout -= GELIC_POLL_PERIOD;
-	}
-
-	delay(200);
-	if (rxdesc.rxerror & GELIC_RXERRORS) {
-		err = -1;
-		goto restartdma;
-	}
-
-	/*
-	 * Copy the packet to the receive buffer, leaving out the
-	 * 2 byte VLAN header.
-	 */
-	len = min(len, rxdesc.valid_size - 2);
-	memcpy(pkt, (u_char *)rxbuf + 2, len);
-	err = len;
-
-#if defined(NETIF_DEBUG)
-{
-	struct ether_header *eh;
-
-	printf("net_get: desc %p, pkt %p, len %d\n", desc, pkt, len);
-	eh = pkt;
-	printf("dst: %s ", ether_sprintf(eh->ether_dhost));
-	printf("src: %s ", ether_sprintf(eh->ether_shost));
-	printf("type: 0x%x\n", eh->ether_type & 0xffff);
-}
-#endif
-
-restartdma:
-	lv1_net_stop_rx_dma(busid, devid, 0);
-	powerpc_sync();
-
-	bzero(&rxdesc, sizeof(rxdesc));
-	rxdesc.paddr = dma_base + (uint32_t)rxbuf;
-	rxdesc.len = sizeof(rxbuf);
-	rxdesc.next = 0;
-	rxdesc.cmd_stat = GELIC_DESCR_OWNED;
-	powerpc_sync();
-
-	lv1_net_start_rx_dma(busid, devid, dma_base + (uint32_t)&rxdesc, 0);
-
-	return (err);
-}
-
-static void
-ps3net_init(struct iodesc *desc, void *machdep_hint)
-{
-	uint64_t mac, val;
-	int i,err;
-
-	err = lv1_open_device(busid, devid, 0);
-
-	lv1_net_stop_tx_dma(busid, devid, 0);
-	lv1_net_stop_rx_dma(busid, devid, 0);
-
-	/*
-	 * Wait for link to come up
-	 */
-
-	for (i = 0; i < 1000; i++) {
-		lv1_net_control(busid, devid, GELIC_GET_LINK_STATUS, 2, 0,
-		    0, &val);
-		if (val & GELIC_LINK_UP)
-			break;
-		delay(500);
-	}
-
-	/*
-	 * Set up DMA IOMMU entries
-	 */
-
-	err = lv1_setup_dma(busid, devid, &dma_base);
-
-	/*
-	 * Get MAC address and VLAN IDs
-	 */
-
-	lv1_net_control(busid, devid, GELIC_GET_MAC_ADDRESS, 0, 0, 0, &mac);
-	bcopy(&((uint8_t *)&mac)[2], desc->myea, sizeof(desc->myea));
-
-	vlan = -1;
-	err = lv1_net_control(busid, devid, GELIC_GET_VLAN_ID, 2, 0,
-	    0, &val);
-	if (err == 0)
-		vlan = val;
-
-	/*
-	 * Start RX DMA engine
-	 */
-
-	ps3net_get(NULL, NULL, 0, 0);
-}
-
-static void
-ps3net_end(struct netif *nif)
-{
-	lv1_close_device(busid, devid);
-}
-
diff --git a/stand/powerpc/ps3/ps3repo.c b/stand/powerpc/ps3/ps3repo.c
deleted file mode 100644
index 00647692547..00000000000
--- a/stand/powerpc/ps3/ps3repo.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <stand.h>
-
-#include "lv1call.h"
-#include "ps3.h"
-#include "ps3repo.h"
-
-static uint64_t make_n1(const char *text, unsigned int index)
-{
-	uint64_t n1;
-
-	n1 = 0;
-	strncpy((char *) &n1, text, sizeof(n1));
-	n1 = (n1 >> 32) + index;
-
-	return n1;
-}
-
-static uint64_t make_n(const char *text, unsigned int index)
-{
-	uint64_t n;
-
-	n = 0;
-	strncpy((char *) &n, text, sizeof(n));
-	n = n + index;
-
-	return n;
-}
-
-int ps3repo_read_bus_type(unsigned int bus_index, uint64_t *bus_type)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("type", 0), 0, 0, &v1, &v2);
-
-	*bus_type = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_id(unsigned int bus_index, uint64_t *bus_id)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("id", 0), 0, 0, &v1, &v2);
-
-	*bus_id = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_num_dev(unsigned int bus_index, uint64_t *num_dev)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("num_dev", 0), 0, 0, &v1, &v2);
-
-	*num_dev = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_type(unsigned int bus_index, unsigned int dev_index, uint64_t *dev_type)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("type", 0), 0, &v1, &v2);
-
-	*dev_type = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_id(unsigned int bus_index, unsigned int dev_index, uint64_t *dev_id)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("id", 0), 0, &v1, &v2);
-
-	*dev_id = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_blk_size(unsigned int bus_index, unsigned int dev_index, uint64_t *blk_size)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("blk_size", 0), 0, &v1, &v2);
-
-	*blk_size = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_nblocks(unsigned int bus_index, unsigned int dev_index, uint64_t *nblocks)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("n_blocks", 0), 0, &v1, &v2);
-
-	*nblocks = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_nregs(unsigned int bus_index, unsigned int dev_index, uint64_t *nregs)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("n_regs", 0), 0, &v1, &v2);
-
-	*nregs = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_reg_id(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_id)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("region", reg_index), make_n("id", 0), &v1, &v2);
-
-	*reg_id = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_reg_start(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_start)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("region", reg_index), make_n("start", 0), &v1, &v2);
-
-	*reg_start = v1;
-
-	return err;
-}
-
-int ps3repo_read_bus_dev_reg_size(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_size)
-{
-	uint64_t v1, v2;
-	int err;
-
-	err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, make_n1("bus", bus_index),
-		make_n("dev", dev_index), make_n("region", reg_index), make_n("size", 0), &v1, &v2);
-
-	*reg_size = v1;
-
-	return err;
-}
-
-int ps3repo_find_bus_by_type(uint64_t bus_type, unsigned int *bus_index)
-{
-	unsigned int i;
-	uint64_t type;
-	int err;
-
-	for (i = 0; i < 10; i++) {
-		err = ps3repo_read_bus_type(i, &type);
-		if (err) {
-			*bus_index = (unsigned int) -1;
-			return err;
-		}
-
-		if (type == bus_type) {
-			*bus_index = i;
-			return 0;
-		}
-	}
-
-	*bus_index = (unsigned int) -1;
-
-	return ENODEV;
-}
-
-int ps3repo_find_bus_dev_by_type(unsigned int bus_index, uint64_t dev_type,
-	unsigned int *dev_index)
-{
-	unsigned int i;
-	uint64_t type;
-	int err;
-
-	for (i = 0; i < 10; i++) {
-		err = ps3repo_read_bus_dev_type(bus_index, i, &type);
-		if (err) {
-			*dev_index = (unsigned int) -1;
-			return err;
-		}
-
-		if (type == dev_type) {
-			*dev_index = i;
-			return 0;
-		}
-	}
-
-	*dev_index = (unsigned int) -1;
-
-	return ENODEV;
-}
diff --git a/stand/powerpc/ps3/ps3repo.h b/stand/powerpc/ps3/ps3repo.h
deleted file mode 100644
index 68001df3509..00000000000
--- a/stand/powerpc/ps3/ps3repo.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_REPO_H
-#define _PS3_REPO_H
-
-#define PS3_LPAR_ID_PME	1
-
-int ps3repo_read_bus_type(unsigned int bus_index, uint64_t *bus_type);
-int ps3repo_read_bus_id(unsigned int bus_index, uint64_t *bus_id);
-int ps3repo_read_bus_num_dev(unsigned int bus_index, uint64_t *num_dev);
-int ps3repo_read_bus_dev_type(unsigned int bus_index, unsigned int dev_index, uint64_t *dev_type);
-int ps3repo_read_bus_dev_id(unsigned int bus_index, unsigned int dev_index, uint64_t *dev_id);
-int ps3repo_read_bus_dev_blk_size(unsigned int bus_index, unsigned int dev_index, uint64_t *blk_size);
-int ps3repo_read_bus_dev_nblocks(unsigned int bus_index, unsigned int dev_index, uint64_t *nblocks);
-int ps3repo_read_bus_dev_nregs(unsigned int bus_index, unsigned int dev_index, uint64_t *nregs);
-int ps3repo_read_bus_dev_reg_id(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_id);
-int ps3repo_read_bus_dev_reg_start(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_start);
-int ps3repo_read_bus_dev_reg_size(unsigned int bus_index, unsigned int dev_index,
-	unsigned int reg_index, uint64_t *reg_size);
-int ps3repo_find_bus_by_type(uint64_t bus_type, unsigned int *bus_index);
-int ps3repo_find_bus_dev_by_type(unsigned int bus_index, uint64_t dev_type,
-	unsigned int *dev_index);
-
-#endif
diff --git a/stand/powerpc/ps3/ps3stor.c b/stand/powerpc/ps3/ps3stor.c
deleted file mode 100644
index bbfc56a7ae2..00000000000
--- a/stand/powerpc/ps3/ps3stor.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <stand.h>
-
-#include "bootstrap.h"
-#include "lv1call.h"
-#include "ps3bus.h"
-#include "ps3repo.h"
-#include "ps3stor.h"
-
-int ps3stor_setup(struct ps3_stordev *sd, int type)
-{
-	unsigned int i;
-	int err;
-
-	sd->sd_type = type;
-
-	err = ps3repo_find_bus_by_type(PS3_BUS_TYPE_STOR, &sd->sd_busidx);
-	if (err)
-		goto out;
-
-	err = ps3repo_read_bus_id(sd->sd_busidx, &sd->sd_busid);
-	if (err)
-		goto out;
-
-	err = ps3repo_find_bus_dev_by_type(sd->sd_busidx, type, &sd->sd_devidx);
-	if (err)
-		goto out;
-
-	err = ps3repo_read_bus_dev_id(sd->sd_busidx, sd->sd_devidx,
-	    &sd->sd_devid);
-	if (err)
-		goto out;
-
-	err = ps3repo_read_bus_dev_blk_size(sd->sd_busidx, sd->sd_devidx,
-	    &sd->sd_blksize);
-	if (err)
-		goto out;
-
-	err = ps3repo_read_bus_dev_nblocks(sd->sd_busidx, sd->sd_devidx,
-	    &sd->sd_nblocks);
-	if (err)
-		goto out;
-
-	err = ps3repo_read_bus_dev_nregs(sd->sd_busidx, sd->sd_devidx,
-	    &sd->sd_nregs);
-	if (err)
-		goto out;
-
-	for (i = 0; i < sd->sd_nregs; i++) {
-		err = ps3repo_read_bus_dev_reg_id(sd->sd_busidx, sd->sd_devidx,
-		    i, &sd->sd_regs[i].sr_id);
-		if (err)
-			goto out;
-
-		err = ps3repo_read_bus_dev_reg_start(sd->sd_busidx,
-		    sd->sd_devidx, i, &sd->sd_regs[i].sr_start);
-		if (err)
-			goto out;
-
-		err = ps3repo_read_bus_dev_reg_size(sd->sd_busidx,
-		    sd->sd_devidx, i, &sd->sd_regs[i].sr_size);
-		if (err)
-			goto out;
-	}
-
-	if (!sd->sd_nregs) {
-		err = ENODEV;
-		goto out;
-	}
-
-	err = lv1_open_device(sd->sd_busid, sd->sd_devid, 0);
-	if (err)
-		goto out;
-
-	err = lv1_setup_dma(sd->sd_busid, sd->sd_devid, &sd->sd_dmabase);
-	if (err)
-		goto close_dev;
-
-	return 0;
-
-close_dev:
-
-	lv1_close_device(sd->sd_busid, sd->sd_devid);
-
-out:
-
-	return err;
-}
-
-static char dma_buf[2048] __aligned(2048);
-
-int ps3stor_read_sectors(struct ps3_stordev *sd, int regidx,
-        uint64_t start_sector, uint64_t sector_count, uint64_t flags, char *buf)
-{
-#define MIN(a, b)			((a) <= (b) ? (a) : (b))
-#define BOUNCE_SECTORS			(sizeof(dma_buf) / sd->sd_blksize)
-#define ASYNC_STATUS_POLL_PERIOD	100 /* microseconds */
-
-	struct ps3_storreg *reg = &sd->sd_regs[regidx];
-	uint64_t nleft, nread, nsectors;
-	uint64_t tag, status;
-	unsigned int timeout;
-	int err = 0;
-
-	nleft = sector_count;
-	nread = 0;
-
-	while (nleft) {
-		nsectors = MIN(nleft, BOUNCE_SECTORS);
-
-		err = lv1_storage_read(sd->sd_devid, reg->sr_id,
-		    start_sector + nread, nsectors, flags, (uint32_t)dma_buf,
-		    &tag);
-		if (err)
-			return err;
-
-		timeout = 5000000; /* microseconds */
-
-		while (1) {
-			if (timeout < ASYNC_STATUS_POLL_PERIOD)
-				return ETIMEDOUT;
-
-			err = lv1_storage_check_async_status(sd->sd_devid, tag,
-			    &status);
-			if (!err && !status)
-				break;
-
-			delay(ASYNC_STATUS_POLL_PERIOD);
-			timeout -= ASYNC_STATUS_POLL_PERIOD;
-		}
-
-		if (status != 0)
-			return EIO;
-
-		memcpy(buf + nread * sd->sd_blksize, (u_char *)dma_buf,
-		    nsectors * sd->sd_blksize);
-		nread += nsectors;
-		nleft -= nsectors;
-	}
-
-	return err;
-
-#undef MIN
-#undef BOUNCE_SECTORS
-#undef ASYNC_STATUS_POLL_PERIOD
-}
-
-void ps3stor_print(struct ps3_stordev *sd)
-{
-}
diff --git a/stand/powerpc/ps3/ps3stor.h b/stand/powerpc/ps3/ps3stor.h
deleted file mode 100644
index 350b716f7aa..00000000000
--- a/stand/powerpc/ps3/ps3stor.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*-
- * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PS3_STOR_H
-#define _PS3_STOR_H
-
-#define PS3_STOR_DEV_MAXREGS	8
-
-struct ps3_storreg {
-	uint64_t sr_id;
-	uint64_t sr_start;
-	uint64_t sr_size;
-};
-
-struct ps3_stordev {
-	int			sd_type;
-	unsigned int		sd_busidx;
-	unsigned int		sd_devidx;
-	uint64_t		sd_busid;
-	uint64_t		sd_devid;
-	uint64_t		sd_blksize;
-	uint64_t		sd_nblocks;
-	uint64_t		sd_nregs;
-	struct ps3_storreg	sd_regs[PS3_STOR_DEV_MAXREGS];
-	uint64_t		sd_dmabase;
-};
-
-int ps3stor_setup(struct ps3_stordev *sd, int type);
-
-int ps3stor_read_sectors(struct ps3_stordev *sd, int regidx,
-	uint64_t start_sector, uint64_t sector_count, uint64_t flags, char *buf);
-
-void ps3stor_print(struct ps3_stordev *sd);
-
-#endif
diff --git a/stand/powerpc/ps3/start.S b/stand/powerpc/ps3/start.S
deleted file mode 100644
index 570b3f52cc6..00000000000
--- a/stand/powerpc/ps3/start.S
+++ /dev/null
@@ -1,169 +0,0 @@
-/*-
- * Copyright (C) 2010 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define LOCORE
-
-#include <machine/trap.h>
-
-/*
- * KBoot and simulators will start this program from the _start symbol, with
- * r3 pointing to a flattened device tree (kexec), r4 the physical address
- * at which we were loaded, and r5 0 (kexec) or a pointer to Open Firmware
- * (simulator). If r4 is non-zero, the first order of business is relocating
- * ourselves to 0. In the kboot case, the PPE secondary thread will enter
- * at 0x60.
- *
- * If started directly by the LV1 hypervisor, we are loaded to address 0
- * and execution on both threads begins at 0x100 (EXC_RST).
- */
-
-#define CACHELINE_SIZE			128
-#define SPR_CTRL			136
-
-/* KBoot thread 0 entry -- do relocation, then jump to main */
-.global _start
-_start:
-	mfmsr   %r31
-	clrldi  %r31,%r31,1
-	mtmsrd  %r31
-	isync
-	cmpwi	%r4,0
-	bne	relocate_self
-relocated_start:
-	lis	%r1,0x100
-	bl	main
-
-. = 0x40
-.global secondary_spin_sem
-secondary_spin_sem:
-	.long	0
-
-. = 0x60
-thread1_start_kboot:
-	mfmsr   %r31
-	clrldi  %r31,%r31,1
-	mtmsrd  %r31
-	isync
-
-	ba	thread1_start	/* kboot copies the first 256 bytes to
-				 * address 0, so we are safe to jump
-				 * (and stay) there */
-
-thread1_start:
-	li	%r3,secondary_spin_sem@l
-1:	lwz	%r1,0(%r3)	/* Spin on SECONDARY_SPIN_SEM_ADDRESS */
-	cmpwi	%r1,0
-	beq	1b		/* If the semaphore is still zero, spin again */
-
-	/* We have been woken up by thread 0 */
-	li	%r0,0x100	/* Invalidate reset vector cache line */
-	icbi	0,%r0
-	isync
-	sync
-	ba	0x100		/* Jump to the reset vector */
-
-. = EXC_RST
-exc_rst:
-	mfmsr   %r31
-	clrldi  %r31,%r31,1
-	mtmsrd  %r31
-	isync
-
-	mfspr	%r3,SPR_CTRL
-	/* The first two bits of r0 are 01 (thread 1) or 10 (thread 0) */
-	cntlzw	%r3,%r3		/* Now 0 for thread 0, 1 for thread 1 */
-
-	cmpwi	%r3,0
-	bne	thread1_start	/* Send thread 1 to wait */
-
-	b	relocated_start /* Main entry point for thread 0 */
-
-#define EXCEPTION_HANDLER(exc) \
-. = exc; \
-	li	%r3, exc; \
-	mfsrr0	%r4; \
-	mfmsr	%r5; \
-	clrldi  %r6,%r5,1; \
-	mtmsrd  %r6; \
-	isync; \
-	lis	%r1,0x100; \
-	bl	ppc_exception
-
-EXCEPTION_HANDLER(EXC_MCHK)
-EXCEPTION_HANDLER(EXC_DSI)
-EXCEPTION_HANDLER(EXC_DSE)
-EXCEPTION_HANDLER(EXC_ISI)
-EXCEPTION_HANDLER(EXC_ISE)
-EXCEPTION_HANDLER(EXC_EXI)
-EXCEPTION_HANDLER(EXC_ALI)
-EXCEPTION_HANDLER(EXC_PGM)
-EXCEPTION_HANDLER(EXC_FPU)
-EXCEPTION_HANDLER(EXC_DECR)
-EXCEPTION_HANDLER(EXC_SC)
-
-relocate_self:
-	/* We enter this with r4 the physical offset for our relocation */
-	lis	%r8,_end@ha	/* r8: copy length */
-	addi	%r8,%r8,_end@l
-	li	%r5,0x100	/* r5: dest address */
-1:	add	%r6,%r4,%r5	/* r6: source address */
-	ld	%r7,0(%r6)
-	std	%r7,0(%r5)
-	addi	%r5,%r5,8
-	cmpw	%r5,%r8
-	blt	1b
-
-	/*
-	 * Now invalidate the cacheline with the second half of relocate_self,
-	 * and do an absolute branch there in case we overwrote part of
-	 * ourselves.
-	 */
-	
-	lis	%r9,relocate_self_cache@ha
-	addi	%r9,%r9,relocate_self_cache@l
-	dcbst	0,%r9
-	sync
-	icbi	0,%r9
-	sync
-	isync
-	ba	relocate_self_cache
-
-relocate_self_cache:
-	/* Now invalidate the icache */
-	li	%r5,0x100
-2:	dcbst	0,%r5
-	sync
-	icbi	0,%r5
-	sync
-	isync
-	cmpw	%r5,%r8
-	addi	%r5,%r5,CACHELINE_SIZE
-	blt	2b
-
-	/* All done: absolute jump to relocated entry point */
-	ba	relocated_start
-
diff --git a/stand/powerpc/ps3/version b/stand/powerpc/ps3/version
deleted file mode 100644
index fdac54e40aa..00000000000
--- a/stand/powerpc/ps3/version
+++ /dev/null
@@ -1,8 +0,0 @@
-$FreeBSD$
-
-NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE.  The format of this
-file is important.  Make sure the current version number is on line 6.
-
-0.3:	Added GPT support to disk.
-0.2:	Added disk support.
-0.1:	Initial PS3/PowerPC version.
diff --git a/stand/uboot/fdt/uboot_fdt.c b/stand/uboot/fdt/uboot_fdt.c
index 18653100540..5d7581d699c 100644
--- a/stand/uboot/fdt/uboot_fdt.c
+++ b/stand/uboot/fdt/uboot_fdt.c
@@ -64,7 +64,8 @@ fdt_platform_load_dtb(void)
 			if (fdt_load_dtb_addr(hdr) == 0) {
 				printf("Using DTB provided by U-Boot at "
 				    "address %p.\n", hdr);
-				return (0);
+				rv = 0;
+				goto exit;
 			}
 		}
 	}
@@ -83,9 +84,11 @@ fdt_platform_load_dtb(void)
 		if (fdt_load_dtb_file(s) == 0) {
 			printf("Loaded DTB from file '%s'.\n", s);
 			rv = 0;
+			goto exit;
 		}
 	}
 
+exit:
 	if (rv == 0) {
 		s = getenv("fdt_overlays");
 		if (s == NULL)
diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c
index c9a41d738f7..98af2841bcd 100644
--- a/sys/amd64/amd64/machdep.c
+++ b/sys/amd64/amd64/machdep.c
@@ -1525,6 +1525,8 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
 	size_t kstack0_sz;
 	int late_console;
 
+	TSRAW(&thread0, TS_ENTER, __func__, NULL);
+
 	/*
  	 * This may be done better later if it gets more high level
  	 * components in it. If so just link td->td_proc here.
@@ -1533,7 +1535,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
 
 	kmdp = init_ops.parse_preload_data(modulep);
 
-	identify_cpu();
+	identify_cpu1();
 	identify_hypervisor();
 
 	/* Init basic tunables, hz etc */
@@ -1774,6 +1776,8 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
 #endif
 	thread0.td_critnest = 0;
 
+	TSEXIT();
+
 	/* Location of kernel stack for locore */
 	return ((u_int64_t)thread0.td_pcb);
 }
diff --git a/sys/amd64/amd64/support.S b/sys/amd64/amd64/support.S
index 2d8b7b18b25..0ef6f498dbd 100644
--- a/sys/amd64/amd64/support.S
+++ b/sys/amd64/amd64/support.S
@@ -238,7 +238,7 @@ END(fillw)
  */
 
 /*
- * copyout(from_kernel, to_user, len)  - MP SAFE
+ * copyout(from_kernel, to_user, len)
  *         %rdi,        %rsi,    %rdx
  */
 ENTRY(copyout)
@@ -301,7 +301,7 @@ copyout_fault:
 END(copyout)
 
 /*
- * copyin(from_user, to_kernel, len) - MP SAFE
+ * copyin(from_user, to_kernel, len)
  *        %rdi,      %rsi,      %rdx
  */
 ENTRY(copyin)
@@ -518,7 +518,7 @@ fusufault:
 
 /*
  * Store a 64-bit word, a 32-bit word, a 16-bit word, or an 8-bit byte to
- * user memory.  All these functions are MPSAFE.
+ * user memory.
  * addr = %rdi, value = %rsi
  */
 ALTENTRY(suword64)
@@ -593,7 +593,7 @@ ENTRY(subyte)
 END(subyte)
 
 /*
- * copyinstr(from, to, maxlen, int *lencopied) - MP SAFE
+ * copyinstr(from, to, maxlen, int *lencopied)
  *           %rdi, %rsi, %rdx, %rcx
  *
  *	copy a string from 'from' to 'to', stop when a 0 character is reached.
@@ -664,7 +664,7 @@ cpystrflt_x:
 END(copyinstr)
 
 /*
- * copystr(from, to, maxlen, int *lencopied) - MP SAFE
+ * copystr(from, to, maxlen, int *lencopied)
  *         %rdi, %rsi, %rdx, %rcx
  */
 ENTRY(copystr)
@@ -704,7 +704,6 @@ END(copystr)
 
 /*
  * Handling of special amd64 registers and descriptor tables etc
- * %rdi
  */
 /* void lgdt(struct region_descriptor *rdp); */
 ENTRY(lgdt)
diff --git a/sys/amd64/amd64/trap.c b/sys/amd64/amd64/trap.c
index 514eb0f60b0..584c5a0073e 100644
--- a/sys/amd64/amd64/trap.c
+++ b/sys/amd64/amd64/trap.c
@@ -608,7 +608,6 @@ trap_pfault(struct trapframe *frame, int usermode)
 	td = curthread;
 	p = td->td_proc;
 	eva = frame->tf_addr;
-	rv = 0;
 
 	if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
 		/*
@@ -660,7 +659,7 @@ trap_pfault(struct trapframe *frame, int usermode)
 		 * Don't allow user-mode faults in kernel address space.
 		 */
 		if (usermode)
-			goto nogo;
+			return (SIGSEGV);
 
 		map = kernel_map;
 	} else {
@@ -715,7 +714,6 @@ trap_pfault(struct trapframe *frame, int usermode)
 #endif
 		return (0);
 	}
-nogo:
 	if (!usermode) {
 		if (td->td_intr_nesting_level == 0 &&
 		    curpcb->pcb_onfault != NULL) {
diff --git a/sys/amd64/vmm/amd/vmcb.h b/sys/amd64/vmm/amd/vmcb.h
index 9c4f582cebd..163f48f0106 100644
--- a/sys/amd64/vmm/amd/vmcb.h
+++ b/sys/amd64/vmm/amd/vmcb.h
@@ -246,8 +246,8 @@ struct vmcb_ctrl {
 	uint8_t :3;
 	uint8_t	v_intr_masking:1; /* Guest and host sharing of RFLAGS. */
 	uint8_t	:7;
-	uint8_t	v_intr_vector;	/* 0x65: Vector for virtual interrupt. */
-	uint8_t pad3[3];	/* Bit64-40 Reserved. */
+	uint8_t	v_intr_vector;	/* 0x64: Vector for virtual interrupt. */
+	uint8_t pad3[3];	/* 0x65-0x67 Reserved. */
 	uint64_t intr_shadow:1; /* 0x68: Interrupt shadow, section15.2.1 APM2 */
 	uint64_t :63;
 	uint64_t exitcode;	/* 0x70, Exitcode */
diff --git a/sys/arm/allwinner/aw_sid.c b/sys/arm/allwinner/aw_sid.c
index 429ebf960d3..ecc12567bb1 100644
--- a/sys/arm/allwinner/aw_sid.c
+++ b/sys/arm/allwinner/aw_sid.c
@@ -52,28 +52,42 @@ __FBSDID("$FreeBSD$");
 #define	SID_THERMAL_CALIB0	(SID_SRAM + 0x34)
 #define	SID_THERMAL_CALIB1	(SID_SRAM + 0x38)
 
-#define	A10_ROOT_KEY_OFF	0x0
-#define	A83T_ROOT_KEY_OFF	SID_SRAM
-
 #define	ROOT_KEY_SIZE		4
 
-enum sid_type {
-	A10_SID = 1,
-	A20_SID,
-	A83T_SID,
+struct aw_sid_conf {
+	bus_size_t	rootkey_offset;
+	bool		has_thermal;
+};
+
+static const struct aw_sid_conf a10_conf = {
+	.rootkey_offset = 0,
+};
+
+static const struct aw_sid_conf a20_conf = {
+	.rootkey_offset = 0,
+};
+
+static const struct aw_sid_conf a64_conf = {
+	.rootkey_offset = SID_SRAM,
+	.has_thermal = true,
+};
+
+static const struct aw_sid_conf a83t_conf = {
+	.rootkey_offset = SID_SRAM,
+	.has_thermal = true,
 };
 
 static struct ofw_compat_data compat_data[] = {
-	{ "allwinner,sun4i-a10-sid",		A10_SID},
-	{ "allwinner,sun7i-a20-sid",		A20_SID},
-	{ "allwinner,sun8i-a83t-sid",		A83T_SID},
+	{ "allwinner,sun4i-a10-sid",		(uintptr_t)&a10_conf},
+	{ "allwinner,sun7i-a20-sid",		(uintptr_t)&a20_conf},
+	{ "allwinner,sun50i-a64-sid",		(uintptr_t)&a64_conf},
+	{ "allwinner,sun8i-a83t-sid",		(uintptr_t)&a83t_conf},
 	{ NULL,					0 }
 };
 
 struct aw_sid_softc {
 	struct resource		*res;
-	int			type;
-	bus_size_t		root_key_off;
+	struct aw_sid_conf	*sid_conf;
 };
 
 static struct aw_sid_softc *aw_sid_sc;
@@ -118,16 +132,7 @@ aw_sid_attach(device_t dev)
 	}
 
 	aw_sid_sc = sc;
-
-	sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
-	switch (sc->type) {
-	case A83T_SID:
-		sc->root_key_off = A83T_ROOT_KEY_OFF;
-		break;
-	default:
-		sc->root_key_off = A10_ROOT_KEY_OFF;
-		break;
-	}
+	sc->sid_conf = (struct aw_sid_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
 
 	SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
@@ -146,7 +151,7 @@ aw_sid_read_tscalib(uint32_t *calib0, uint32_t *calib1)
 	sc = aw_sid_sc;
 	if (sc == NULL)
 		return (ENXIO);
-	if (sc->type != A83T_SID)
+	if (!sc->sid_conf->has_thermal)
 		return (ENXIO);
 
 	*calib0 = RD4(sc, SID_THERMAL_CALIB0);
@@ -160,14 +165,15 @@ aw_sid_get_rootkey(u_char *out)
 {
 	struct aw_sid_softc *sc;
 	int i;
+	bus_size_t root_key_off;
 	u_int tmp;
 
 	sc = aw_sid_sc;
 	if (sc == NULL)
 		return (ENXIO);
-
+	root_key_off = aw_sid_sc->sid_conf->rootkey_offset;
 	for (i = 0; i < ROOT_KEY_SIZE ; i++) {
-		tmp = RD4(aw_sid_sc, aw_sid_sc->root_key_off + (i * 4));
+		tmp = RD4(aw_sid_sc, root_key_off + (i * 4));
 		be32enc(&out[i * 4], tmp);
 	}
 
diff --git a/sys/arm/allwinner/files.allwinner b/sys/arm/allwinner/files.allwinner
index e62db3cedd2..eadd1686fb7 100644
--- a/sys/arm/allwinner/files.allwinner
+++ b/sys/arm/allwinner/files.allwinner
@@ -20,7 +20,7 @@ arm/allwinner/aw_usbphy.c		optional	ehci | ohci
 arm/allwinner/aw_wdog.c			standard
 arm/allwinner/axp209.c			optional	axp209
 arm/allwinner/axp81x.c			optional	axp81x
-arm/allwinner/if_awg.c			optional	awg
+arm/allwinner/if_awg.c			optional	awg ext_resources syscon
 arm/allwinner/if_emac.c			optional	emac
 arm/allwinner/sunxi_dma_if.m		standard
 dev/iicbus/twsi/a10_twsi.c		optional	twsi
diff --git a/sys/arm/allwinner/if_awg.c b/sys/arm/allwinner/if_awg.c
index 9b233956f24..b106b269899 100644
--- a/sys/arm/allwinner/if_awg.c
+++ b/sys/arm/allwinner/if_awg.c
@@ -69,7 +69,9 @@ __FBSDID("$FreeBSD$");
 #include <dev/extres/clk/clk.h>
 #include <dev/extres/hwreset/hwreset.h>
 #include <dev/extres/regulator/regulator.h>
+#include <dev/extres/syscon/syscon.h>
 
+#include "syscon_if.h"
 #include "miibus_if.h"
 #include "gpio_if.h"
 
@@ -105,6 +107,7 @@ __FBSDID("$FreeBSD$");
 #define	RX_BATCH_DEFAULT	64
 
 /* syscon EMAC clock register */
+#define	EMAC_CLK_REG		0x30
 #define	EMAC_CLK_EPHY_ADDR	(0x1f << 20)	/* H3 */
 #define	EMAC_CLK_EPHY_ADDR_SHIFT 20
 #define	EMAC_CLK_EPHY_LED_POL	(1 << 17)	/* H3 */
@@ -203,6 +206,7 @@ struct awg_softc {
 	int			link;
 	int			if_flags;
 	enum awg_type		type;
+	struct syscon		*syscon;
 
 	struct awg_txring	tx;
 	struct awg_rxring	rx;
@@ -217,6 +221,9 @@ static struct resource_spec awg_spec[] = {
 
 static void awg_txeof(struct awg_softc *sc);
 
+static uint32_t syscon_read_emac_clk_reg(device_t dev);
+static void syscon_write_emac_clk_reg(device_t dev, uint32_t val);
+
 static int
 awg_miibus_readreg(device_t dev, int phy, int reg)
 {
@@ -1153,6 +1160,32 @@ awg_ioctl(if_t ifp, u_long cmd, caddr_t data)
 	return (error);
 }
 
+static uint32_t
+syscon_read_emac_clk_reg(device_t dev)
+{
+	struct awg_softc *sc;
+
+	sc = device_get_softc(dev);
+	if (sc->syscon != NULL)
+		return (SYSCON_READ_4(sc->syscon, EMAC_CLK_REG));
+	else if (sc->res[_RES_SYSCON] != NULL)
+		return (bus_read_4(sc->res[_RES_SYSCON], 0));
+
+	return (0);
+}
+
+static void
+syscon_write_emac_clk_reg(device_t dev, uint32_t val)
+{
+	struct awg_softc *sc;
+
+	sc = device_get_softc(dev);
+	if (sc->syscon != NULL)
+		SYSCON_WRITE_4(sc->syscon, EMAC_CLK_REG, val);
+	else if (sc->res[_RES_SYSCON] != NULL)
+		bus_write_4(sc->res[_RES_SYSCON], 0, val);
+}
+
 static int
 awg_setup_phy(device_t dev)
 {
@@ -1163,19 +1196,31 @@ awg_setup_phy(device_t dev)
 	phandle_t node;
 	uint32_t reg, tx_delay, rx_delay;
 	int error;
+	bool use_syscon;
 
 	sc = device_get_softc(dev);
 	node = ofw_bus_get_node(dev);
+	use_syscon = false;
 
 	if (OF_getprop_alloc(node, "phy-mode", 1, (void **)&phy_type) == 0)
 		return (0);
 
+	if (sc->syscon != NULL || sc->res[_RES_SYSCON] != NULL)
+		use_syscon = true;
+
 	if (bootverbose)
 		device_printf(dev, "PHY type: %s, conf mode: %s\n", phy_type,
-		    sc->res[_RES_SYSCON] != NULL ? "reg" : "clk");
+		    use_syscon ? "reg" : "clk");
 
-	if (sc->res[_RES_SYSCON] != NULL) {
-		reg = bus_read_4(sc->res[_RES_SYSCON], 0);
+	if (use_syscon) {
+		/*
+		 * Abstract away writing to syscon for devices like the pine64.
+		 * For the pine64, we get dtb from U-Boot and it still uses the
+		 * legacy setup of specifying syscon register in emac node
+		 * rather than as its own node and using an xref in emac.
+		 * These abstractions can go away once U-Boot dts is up-to-date.
+		 */
+		reg = syscon_read_emac_clk_reg(dev);
 		reg &= ~(EMAC_CLK_PIT | EMAC_CLK_SRC | EMAC_CLK_RMII_EN);
 		if (strncmp(phy_type, "rgmii", 5) == 0)
 			reg |= EMAC_CLK_PIT_RGMII | EMAC_CLK_SRC_RGMII;
@@ -1215,7 +1260,7 @@ awg_setup_phy(device_t dev)
 
 		if (bootverbose)
 			device_printf(dev, "EMAC clock: 0x%08x\n", reg);
-		bus_write_4(sc->res[_RES_SYSCON], 0, reg);
+		syscon_write_emac_clk_reg(dev, reg);
 	} else {
 		if (strncmp(phy_type, "rgmii", 5) == 0)
 			tx_parent_name = "emac_int_tx";
@@ -1263,6 +1308,7 @@ static int
 awg_setup_extres(device_t dev)
 {
 	struct awg_softc *sc;
+	phandle_t node;
 	hwreset_t rst_ahb, rst_ephy;
 	clk_t clk_ahb, clk_ephy;
 	regulator_t reg;
@@ -1273,6 +1319,7 @@ awg_setup_extres(device_t dev)
 	rst_ahb = rst_ephy = NULL;
 	clk_ahb = clk_ephy = NULL;
 	reg = NULL;
+	node = ofw_bus_get_node(dev);
 
 	/* Get AHB clock and reset resources */
 	error = hwreset_get_by_ofw_name(dev, 0, "ahb", &rst_ahb);
@@ -1289,7 +1336,13 @@ awg_setup_extres(device_t dev)
 	}
 	if (clk_get_by_ofw_name(dev, 0, "ephy", &clk_ephy) != 0)
 		clk_ephy = NULL;
-	
+
+	if (OF_hasprop(node, "syscon") && syscon_get_by_ofw_property(dev, node,
+	    "syscon", &sc->syscon) != 0) {
+		device_printf(dev, "cannot get syscon driver handle\n");
+		goto fail;
+	}
+
 	/* Configure PHY for MII or RGMII mode */
 	if (awg_setup_phy(dev) != 0)
 		goto fail;
diff --git a/sys/arm/allwinner/std.allwinner b/sys/arm/allwinner/std.allwinner
index 360d16932e0..4823d64a9f0 100644
--- a/sys/arm/allwinner/std.allwinner
+++ b/sys/arm/allwinner/std.allwinner
@@ -5,9 +5,6 @@ cpu		CPU_CORTEXA
 machine 	arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0200000
-options 	KERNVIRTADDR=0xc0200000
-
 options 	IPI_IRQ_START=0
 options 	IPI_IRQ_END=15
 
diff --git a/sys/arm/allwinner/std.allwinner_up b/sys/arm/allwinner/std.allwinner_up
index 0d5661eed55..3fdfb7bba15 100644
--- a/sys/arm/allwinner/std.allwinner_up
+++ b/sys/arm/allwinner/std.allwinner_up
@@ -5,9 +5,6 @@ cpu		CPU_CORTEXA
 machine 	arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0200000
-options 	KERNVIRTADDR=0xc0200000
-
 files		"../allwinner/files.allwinner_up"
 files		"../allwinner/files.allwinner"
 files		"../allwinner/a10/files.a10"
diff --git a/sys/arm/altera/socfpga/files.socfpga b/sys/arm/altera/socfpga/files.socfpga
index ea29d0e35de..0aef6887858 100644
--- a/sys/arm/altera/socfpga/files.socfpga
+++ b/sys/arm/altera/socfpga/files.socfpga
@@ -10,6 +10,7 @@ arm/altera/socfpga/socfpga_mp.c			optional smp
 arm/altera/socfpga/socfpga_gpio.c		optional gpio
 
 dev/mmc/host/dwmmc.c				optional dwmmc
+dev/mmc/host/dwmmc_altera.c			optional dwmmc
 
 # Arria 10
 arm/altera/socfpga/socfpga_a10_manager.c	standard
diff --git a/sys/arm/altera/socfpga/std.socfpga b/sys/arm/altera/socfpga/std.socfpga
index bbfb218da28..563491ca76c 100644
--- a/sys/arm/altera/socfpga/std.socfpga
+++ b/sys/arm/altera/socfpga/std.socfpga
@@ -4,9 +4,6 @@ cpu		CPU_CORTEXA
 machine		arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0f00000
-options		KERNVIRTADDR=0xc0f00000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
 
diff --git a/sys/arm/amlogic/aml8726/aml8726_timer.c b/sys/arm/amlogic/aml8726/aml8726_timer.c
index 2fa4db8f398..102b4757db6 100644
--- a/sys/arm/amlogic/aml8726/aml8726_timer.c
+++ b/sys/arm/amlogic/aml8726/aml8726_timer.c
@@ -347,6 +347,7 @@ DELAY(int usec)
 			}
 		return;
 	}
+	TSENTER();
 
 	/*
 	 * Some of the other timers in the source tree do this calculation as:
@@ -391,4 +392,5 @@ DELAY(int usec)
 		previous = now;
 		remaining -= delta;
 	}
+	TSEXIT();
 }
diff --git a/sys/arm/arm/dump_machdep.c b/sys/arm/arm/dump_machdep.c
index c339689fe29..ead54ca7b22 100644
--- a/sys/arm/arm/dump_machdep.c
+++ b/sys/arm/arm/dump_machdep.c
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/md_var.h>
 #include <machine/pcb.h>
 #include <machine/armreg.h>
+#include <machine/vmparam.h>	/* For KERNVIRTADDR */
 
 int do_minidump = 1;
 SYSCTL_INT(_debug, OID_AUTO, minidump, CTLFLAG_RWTUN, &do_minidump, 0,
diff --git a/sys/arm/arm/elf_trampoline.c b/sys/arm/arm/elf_trampoline.c
index 4b9396adcec..0d93998016d 100644
--- a/sys/arm/arm/elf_trampoline.c
+++ b/sys/arm/arm/elf_trampoline.c
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/cpufunc.h>
 #include <machine/armreg.h>
 #include <machine/cpu.h>
+#include <machine/vmparam.h>	/* For KERNVIRTADDR */
 
 #if __ARM_ARCH >= 6
 #error "elf_trampline is not supported on ARMv6/v7 platforms"
diff --git a/sys/arm/arm/genassym.c b/sys/arm/arm/genassym.c
index ab7ec0f6636..6884b803701 100644
--- a/sys/arm/arm/genassym.c
+++ b/sys/arm/arm/genassym.c
@@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/cpuinfo.h>
 #include <machine/intr.h>
 #include <machine/sysarch.h>
+#include <machine/vmparam.h>	/* For KERNVIRTADDR */
 
 #include <netinet/in.h>
 #include <netinet/in_systm.h>
@@ -59,6 +60,7 @@ __FBSDID("$FreeBSD$");
 #include <netinet/ip_var.h>
 
 ASSYM(KERNBASE, KERNBASE);
+ASSYM(KERNVIRTADDR, KERNVIRTADDR);
 #if __ARM_ARCH >= 6
 ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
 #endif
diff --git a/sys/arm/arm/generic_timer.c b/sys/arm/arm/generic_timer.c
index 9a28885077e..5e9cabab14d 100644
--- a/sys/arm/arm/generic_timer.c
+++ b/sys/arm/arm/generic_timer.c
@@ -526,6 +526,7 @@ DELAY(int usec)
 {
 	int32_t counts;
 
+	TSENTER();
 	/*
 	 * Check the timers are setup, if not just
 	 * use a for loop for the meantime
@@ -540,6 +541,7 @@ DELAY(int usec)
 				cpufunc_nullop();
 	} else
 		arm_tmr_do_delay(usec, arm_tmr_sc);
+	TSEXIT();
 }
 #endif
 
diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c
index e33252c1427..474fa82df58 100644
--- a/sys/arm/arm/machdep.c
+++ b/sys/arm/arm/machdep.c
@@ -347,7 +347,9 @@ void
 DELAY(int usec)
 {
 
+	TSENTER();
 	delay_impl(usec, delay_arg);
+	TSEXIT();
 }
 #endif
 
diff --git a/sys/arm/arm/machdep_boot.c b/sys/arm/arm/machdep_boot.c
index cb2c68203f6..adb15f427be 100644
--- a/sys/arm/arm/machdep_boot.c
+++ b/sys/arm/arm/machdep_boot.c
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/machdep.h>
 #include <machine/metadata.h>
 #include <machine/physmem.h>
+#include <machine/vmparam.h>	/* For KERNVIRTADDR */
 
 #ifdef FDT
 #include <contrib/libfdt/libfdt.h>
diff --git a/sys/arm/arm/mpcore_timer.c b/sys/arm/arm/mpcore_timer.c
index 0b0ac2a4149..b9d372fd1a4 100644
--- a/sys/arm/arm/mpcore_timer.c
+++ b/sys/arm/arm/mpcore_timer.c
@@ -547,6 +547,7 @@ DELAY(int usec)
 	struct arm_tmr_softc *sc;
 	int32_t counts;
 
+	TSENTER();
 	/* Check the timers are setup, if not just use a for loop for the meantime */
 	if (arm_tmr_tc == NULL || arm_tmr_timecount.tc_frequency == 0) {
 		for (; usec > 0; usec--)
@@ -558,5 +559,6 @@ DELAY(int usec)
 		sc = arm_tmr_tc->tc_priv;
 		arm_tmr_delay(usec, sc);
 	}
+	TSEXIT();
 }
 #endif
diff --git a/sys/arm/at91/at91_machdep.c b/sys/arm/at91/at91_machdep.c
index 5f3dc7fc445..5a0eb28194c 100644
--- a/sys/arm/at91/at91_machdep.c
+++ b/sys/arm/at91/at91_machdep.c
@@ -672,8 +672,10 @@ void
 DELAY(int n)
 {
 
+	TSENTER();
 	if (soc_info.soc_data)
 		soc_info.soc_data->soc_delay(n);
+	TSEXIT();
 }
 
 void
diff --git a/sys/arm/broadcom/bcm2835/std.rpi b/sys/arm/broadcom/bcm2835/std.rpi
index 793eab16c79..48593c117c5 100644
--- a/sys/arm/broadcom/bcm2835/std.rpi
+++ b/sys/arm/broadcom/bcm2835/std.rpi
@@ -1,5 +1,3 @@
 # $FreeBSD$
 
-options		KERNVIRTADDR=0xc0100000
-makeoptions	KERNVIRTADDR=0xc0100000
 options		LINUX_BOOT_ABI
diff --git a/sys/arm/cavium/cns11xx/timer.c b/sys/arm/cavium/cns11xx/timer.c
index e79a70ad0a4..c61af0f85ec 100644
--- a/sys/arm/cavium/cns11xx/timer.c
+++ b/sys/arm/cavium/cns11xx/timer.c
@@ -122,6 +122,7 @@ DELAY(int usec)
 				;
 		return;
 	}
+	TSENTER();
 
 	val = read_timer_counter_noint();
 	nticks = (((APB_clock / 1000) * usec) / 1000) + 100;
@@ -135,7 +136,7 @@ DELAY(int usec)
 
 		val = val_temp;
 	}
-
+	TSEXIT();
 }
 
 /*
diff --git a/sys/arm/conf/GENERIC b/sys/arm/conf/GENERIC
index e48cc57ce30..116ea87cd6c 100644
--- a/sys/arm/conf/GENERIC
+++ b/sys/arm/conf/GENERIC
@@ -25,9 +25,6 @@ options 	SMP_ON_UP
 machine 	arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0000000
-options 	KERNVIRTADDR=0xc0000000
-
 include 	"std.armv7"
 files		"../allwinner/files.allwinner"
 files		"../allwinner/files.allwinner_up"
@@ -72,6 +69,7 @@ device		clk
 device		phy
 device		hwreset
 device		regulator
+device		syscon
 
 # CPU frequency control
 device		cpufreq
diff --git a/sys/arm/conf/NOTES b/sys/arm/conf/NOTES
index 4b8dbc3edf1..9f5f6574abc 100644
--- a/sys/arm/conf/NOTES
+++ b/sys/arm/conf/NOTES
@@ -24,11 +24,9 @@ files	"../xscale/ixp425/files.ixp425"
 files	"../xscale/pxa/files.pxa"
 
 options 	PHYSADDR=0x00000000
-options 	KERNVIRTADDR=0xc0000000
 
 makeoptions	LDFLAGS="-zmuldefs"
 makeoptions	KERNPHYSADDR=0x00000000
-makeoptions	KERNVIRTADDR=0xc0000000
 
 options 	FDT
 
diff --git a/sys/arm/freescale/imx/std.imx51 b/sys/arm/freescale/imx/std.imx51
index 730c976899a..7f8a95dc0c4 100644
--- a/sys/arm/freescale/imx/std.imx51
+++ b/sys/arm/freescale/imx/std.imx51
@@ -3,9 +3,6 @@ machine		arm	armv7
 cpu 		CPU_CORTEXA
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-options		KERNVIRTADDR=0xc0100000
-makeoptions	KERNVIRTADDR=0xc0100000
-
 device  	fdt_pinctrl
 
 files "../freescale/imx/files.imx5"
diff --git a/sys/arm/freescale/imx/std.imx53 b/sys/arm/freescale/imx/std.imx53
index 730c976899a..7f8a95dc0c4 100644
--- a/sys/arm/freescale/imx/std.imx53
+++ b/sys/arm/freescale/imx/std.imx53
@@ -3,9 +3,6 @@ machine		arm	armv7
 cpu 		CPU_CORTEXA
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-options		KERNVIRTADDR=0xc0100000
-makeoptions	KERNVIRTADDR=0xc0100000
-
 device  	fdt_pinctrl
 
 files "../freescale/imx/files.imx5"
diff --git a/sys/arm/freescale/imx/std.imx6 b/sys/arm/freescale/imx/std.imx6
index 8778a29a705..0d57ff5c22e 100644
--- a/sys/arm/freescale/imx/std.imx6
+++ b/sys/arm/freescale/imx/std.imx6
@@ -3,9 +3,6 @@ machine		arm	armv7
 cpu 		CPU_CORTEXA
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-options		KERNVIRTADDR		= 0xc2000000
-makeoptions	KERNVIRTADDR		= 0xc2000000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
 
diff --git a/sys/arm/freescale/vybrid/std.vybrid b/sys/arm/freescale/vybrid/std.vybrid
index 25d2a6b3915..d92a520898b 100644
--- a/sys/arm/freescale/vybrid/std.vybrid
+++ b/sys/arm/freescale/vybrid/std.vybrid
@@ -4,7 +4,4 @@ cpu		CPU_CORTEXA
 machine		arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0100000
-options		KERNVIRTADDR=0xc0100000
-
 files		"../freescale/vybrid/files.vybrid"
diff --git a/sys/arm/include/vmparam.h b/sys/arm/include/vmparam.h
index 916cb1377ec..ba43e9e91e6 100644
--- a/sys/arm/include/vmparam.h
+++ b/sys/arm/include/vmparam.h
@@ -74,6 +74,19 @@
 #define	KERNBASE		0xc0000000
 #endif
 
+/*
+ * The virtual address the kernel is linked to run at.  For armv4/5 platforms
+ * the low-order 30 bits of this must match the low-order bits of the physical
+ * address the kernel is loaded at, so the value is most often provided as a
+ * kernel config option in the std.platform file. For armv6/7 the kernel can
+ * be loaded at any 2MB boundary, and KERNVIRTADDR can also be set to any 2MB
+ * boundary.  It is typically overridden in the std.platform file only when
+ * KERNBASE is also set to a lower address to provide more KVA.
+ */
+#ifndef KERNVIRTADDR
+#define	KERNVIRTADDR		0xc0000000
+#endif
+
 /*
  * max number of non-contig chunks of physical RAM you can have
  */
diff --git a/sys/arm/lpc/lpc_timer.c b/sys/arm/lpc/lpc_timer.c
index 0c0019eef65..4054877a276 100644
--- a/sys/arm/lpc/lpc_timer.c
+++ b/sys/arm/lpc/lpc_timer.c
@@ -292,6 +292,7 @@ DELAY(int usec)
 				;
 		return;
 	}
+	TSENTER();
 
 	first = lpc_get_timecount(&lpc_timecounter);
 	while (val > 0) {
@@ -304,4 +305,5 @@ DELAY(int usec)
 		val -= (last - first);
 		first = last;
 	}
+	TSEXIT();
 }
diff --git a/sys/arm/mv/armada38x/std.armada38x b/sys/arm/mv/armada38x/std.armada38x
index abda7a76940..5ed40d13374 100644
--- a/sys/arm/mv/armada38x/std.armada38x
+++ b/sys/arm/mv/armada38x/std.armada38x
@@ -5,8 +5,6 @@ cpu		CPU_CORTEXA
 machine		arm	armv7
 
 makeoptions	CONF_CFLAGS="-march=armv7a"
-makeoptions	KERNVIRTADDR=0xc0000000
 
-options         KERNVIRTADDR=0xc0000000
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
diff --git a/sys/arm/mv/armadaxp/std.armadaxp b/sys/arm/mv/armadaxp/std.armadaxp
index 84361f53eb2..b720e3de68b 100644
--- a/sys/arm/mv/armadaxp/std.armadaxp
+++ b/sys/arm/mv/armadaxp/std.armadaxp
@@ -1,4 +1,2 @@
 # $FreeBSD$
 
-makeoptions	KERNVIRTADDR=0xc0200000
-options		KERNVIRTADDR=0xc0200000
diff --git a/sys/arm/mv/timer.c b/sys/arm/mv/timer.c
index e0ca2dee218..be92f62040c 100644
--- a/sys/arm/mv/timer.c
+++ b/sys/arm/mv/timer.c
@@ -272,6 +272,7 @@ DELAY(int usec)
 				__asm __volatile("nop" ::: "memory");
 		return;
 	}
+	TSENTER();
 
 	val = mv_get_timer(1);
 	nticks = ((MV_CLOCK_SRC / 1000000 + 1) * usec);
@@ -285,6 +286,7 @@ DELAY(int usec)
 
 		val = val_temp;
 	}
+	TSEXIT();
 }
 
 static uint32_t
diff --git a/sys/arm/nvidia/tegra124/std.tegra124 b/sys/arm/nvidia/tegra124/std.tegra124
index e9688732d69..ab58d763216 100644
--- a/sys/arm/nvidia/tegra124/std.tegra124
+++ b/sys/arm/nvidia/tegra124/std.tegra124
@@ -3,9 +3,6 @@ cpu 		CPU_CORTEXA
 machine		arm	armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-options		KERNVIRTADDR		= 0xc0200000
-makeoptions	KERNVIRTADDR		= 0xc0200000
-
 options		INTRNG
 
 options		IPI_IRQ_START=0
diff --git a/sys/arm/ralink/rt1310_timer.c b/sys/arm/ralink/rt1310_timer.c
index 6834bbdc388..a7203064a13 100644
--- a/sys/arm/ralink/rt1310_timer.c
+++ b/sys/arm/ralink/rt1310_timer.c
@@ -326,6 +326,7 @@ DELAY(int usec)
 				;
 		return;
 	}
+	TSENTER();
 
 	first = rt1310_get_timecount(&rt1310_timecounter);
 	while (val > 0) {
@@ -338,4 +339,5 @@ DELAY(int usec)
 		val -= (last - first);
 		first = last;
 	}
+	TSEXIT();
 }
diff --git a/sys/arm/rockchip/files.rk30xx b/sys/arm/rockchip/files.rk30xx
index b058ed91c57..53c4cf0dae4 100644
--- a/sys/arm/rockchip/files.rk30xx
+++ b/sys/arm/rockchip/files.rk30xx
@@ -9,3 +9,4 @@ arm/rockchip/rk30xx_gpio.c		optional	gpio
 arm/rockchip/rk30xx_mp.c		optional	smp
 
 dev/mmc/host/dwmmc.c			optional	dwmmc
+dev/mmc/host/dwmmc_rockchip.c		optional	dwmmc
diff --git a/sys/arm/rockchip/std.rk30xx b/sys/arm/rockchip/std.rk30xx
index 4747145d4b8..6cf2ecbc9ca 100644
--- a/sys/arm/rockchip/std.rk30xx
+++ b/sys/arm/rockchip/std.rk30xx
@@ -5,9 +5,6 @@ cpu		CPU_CORTEXA
 machine		arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0400000
-options		KERNVIRTADDR=0xc0400000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
 
diff --git a/sys/arm/samsung/exynos/files.exynos5 b/sys/arm/samsung/exynos/files.exynos5
index 84c92c49c83..aea6a670b7d 100644
--- a/sys/arm/samsung/exynos/files.exynos5
+++ b/sys/arm/samsung/exynos/files.exynos5
@@ -22,3 +22,4 @@ arm/samsung/exynos/chrome_ec_spi.c		optional	chrome_ec_spi
 arm/samsung/exynos/chrome_kb.c			optional	chrome_kb
 
 dev/mmc/host/dwmmc.c				optional	dwmmc
+dev/mmc/host/dwmmc_samsung.c			optional	dwmmc
diff --git a/sys/arm/samsung/exynos/std.exynos5250 b/sys/arm/samsung/exynos/std.exynos5250
index 7f0a2fb190e..0c14f0c7293 100644
--- a/sys/arm/samsung/exynos/std.exynos5250
+++ b/sys/arm/samsung/exynos/std.exynos5250
@@ -4,9 +4,6 @@ cpu		CPU_CORTEXA
 machine		arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0f00000
-options		KERNVIRTADDR=0xc0f00000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
 
diff --git a/sys/arm/samsung/exynos/std.exynos5420 b/sys/arm/samsung/exynos/std.exynos5420
index 7f0a2fb190e..0c14f0c7293 100644
--- a/sys/arm/samsung/exynos/std.exynos5420
+++ b/sys/arm/samsung/exynos/std.exynos5420
@@ -4,9 +4,6 @@ cpu		CPU_CORTEXA
 machine		arm armv7
 makeoptions	CONF_CFLAGS="-march=armv7a"
 
-makeoptions	KERNVIRTADDR=0xc0f00000
-options		KERNVIRTADDR=0xc0f00000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
 
diff --git a/sys/arm/ti/am335x/std.am335x b/sys/arm/ti/am335x/std.am335x
index 717d6046e80..98b1d3c310a 100644
--- a/sys/arm/ti/am335x/std.am335x
+++ b/sys/arm/ti/am335x/std.am335x
@@ -5,7 +5,4 @@ include		"../ti/std.ti"
 
 cpu 		CPU_CORTEXA
 
-options		KERNVIRTADDR=0xc0200000		# Used in ldscript.arm
-makeoptions	KERNVIRTADDR=0xc0200000
-
 options		SOC_TI_AM335X
diff --git a/sys/arm/ti/omap4/std.omap4 b/sys/arm/ti/omap4/std.omap4
index 1426fa8f959..b3edb8bec42 100644
--- a/sys/arm/ti/omap4/std.omap4
+++ b/sys/arm/ti/omap4/std.omap4
@@ -5,7 +5,4 @@ include		"../ti/std.ti"
 
 cpu 		CPU_CORTEXA
 
-options		KERNVIRTADDR=0xc0200000		# Used in ldscript.arm
-makeoptions	KERNVIRTADDR=0xc0200000
-
 options		SOC_OMAP4
diff --git a/sys/arm/xilinx/std.zynq7 b/sys/arm/xilinx/std.zynq7
index 6690fd5e9a0..7fbcd47a412 100644
--- a/sys/arm/xilinx/std.zynq7
+++ b/sys/arm/xilinx/std.zynq7
@@ -9,8 +9,5 @@ makeoptions	CONF_CFLAGS="-march=armv7a"
 
 files		"../xilinx/files.zynq7"
 
-options		KERNVIRTADDR=0xc0100000		# Used in ldscript.arm
-makeoptions	KERNVIRTADDR=0xc0100000
-
 options		IPI_IRQ_START=0
 options		IPI_IRQ_END=15
diff --git a/sys/arm/xscale/i8134x/i80321_timer.c b/sys/arm/xscale/i8134x/i80321_timer.c
index f67c3190675..5dc650568c0 100644
--- a/sys/arm/xscale/i8134x/i80321_timer.c
+++ b/sys/arm/xscale/i8134x/i80321_timer.c
@@ -428,6 +428,7 @@ DELAY(int n)
 {
 	uint32_t cur, last, delta, usecs;
 
+	TSENTER();
 	/*
 	 * This works by polling the timer and counting the
 	 * number of microseconds that go by.
@@ -451,6 +452,7 @@ DELAY(int n)
 			delta %= COUNTS_PER_USEC;
 		}
 	}
+	TSEXIT();
 }
 
 /*
diff --git a/sys/arm/xscale/ixp425/ixp425_timer.c b/sys/arm/xscale/ixp425/ixp425_timer.c
index b9122c1932a..c0d9109d91d 100644
--- a/sys/arm/xscale/ixp425/ixp425_timer.c
+++ b/sys/arm/xscale/ixp425/ixp425_timer.c
@@ -213,6 +213,7 @@ DELAY(int n)
 
 	if (n == 0)
 		return;
+	TSENTER();
 
 	/*
 	 * Clamp the timeout at a maximum value (about 32 seconds with
@@ -233,6 +234,7 @@ DELAY(int n)
 		usecs -= (int)(last - first);
 		first = last;
 	}
+	TSEXIT();
 }
 
 /*
diff --git a/sys/arm/xscale/pxa/pxa_timer.c b/sys/arm/xscale/pxa/pxa_timer.c
index 4c093897f23..b000f0271d9 100644
--- a/sys/arm/xscale/pxa/pxa_timer.c
+++ b/sys/arm/xscale/pxa/pxa_timer.c
@@ -214,10 +214,12 @@ DELAY(int usec)
 				;
 		return;
 	}
+	TSENTER();
 
 	val = pxa_timer_get_oscr();
 	val += (PXA_TIMER_FREQUENCY * usec) / 1000000;
 	while (pxa_timer_get_oscr() <= val);
+	TSEXIT();
 }
 
 uint32_t
diff --git a/sys/arm64/conf/GENERIC b/sys/arm64/conf/GENERIC
index 1a039add3c5..5187ca008c7 100644
--- a/sys/arm64/conf/GENERIC
+++ b/sys/arm64/conf/GENERIC
@@ -235,6 +235,7 @@ device		clk
 device		phy
 device		hwreset
 device		regulator
+device		syscon
 
 # The `bpf' device enables the Berkeley Packet Filter.
 # Be aware of the administrative consequences of enabling this!
diff --git a/sys/cam/ata/ata_da.c b/sys/cam/ata/ata_da.c
index 4e75bc5e2fd..ead4ba2f125 100644
--- a/sys/cam/ata/ata_da.c
+++ b/sys/cam/ata/ata_da.c
@@ -363,7 +363,12 @@ static struct ada_quirk_entry ada_quirk_table[] =
 	},
 	{
 		/* WDC Caviar Black Advanced Format (4k) drives */
-		{ T_DIRECT, SIP_MEDIA_FIXED, "*", "WDC WD??????EX*", "*" },
+		{ T_DIRECT, SIP_MEDIA_FIXED, "*", "WDC WD????AZEX*", "*" },
+		/*quirks*/ADA_Q_4K
+	},
+	{
+		/* WDC Caviar Black Advanced Format (4k) drives */
+		{ T_DIRECT, SIP_MEDIA_FIXED, "*", "WDC WD????FZEX*", "*" },
 		/*quirks*/ADA_Q_4K
 	},
 	{
diff --git a/sys/cddl/compat/opensolaris/sys/kmem.h b/sys/cddl/compat/opensolaris/sys/kmem.h
index 75837d29e20..7b5c4f9956b 100644
--- a/sys/cddl/compat/opensolaris/sys/kmem.h
+++ b/sys/cddl/compat/opensolaris/sys/kmem.h
@@ -80,7 +80,8 @@ void *calloc(size_t n, size_t s);
 
 #define	freemem				vm_cnt.v_free_count
 #define	minfree				vm_cnt.v_free_min
-#define	heap_arena			kmem_arena
+#define	heap_arena			kernel_arena
+#define	zio_arena			NULL
 #define	kmem_alloc(size, kmflags)	zfs_kmem_alloc((size), (kmflags))
 #define	kmem_zalloc(size, kmflags)	zfs_kmem_alloc((size), (kmflags) | M_ZERO)
 #define	kmem_free(buf, size)		zfs_kmem_free((buf), (size))
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
index 0cff5a70a55..facd1d227bc 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
@@ -4207,7 +4207,6 @@ typedef enum free_memory_reason_t {
 	FMR_PAGES_PP_MAXIMUM,
 	FMR_HEAP_ARENA,
 	FMR_ZIO_ARENA,
-	FMR_ZIO_FRAG,
 } free_memory_reason_t;
 
 int64_t last_free_memory;
@@ -4302,15 +4301,11 @@ arc_available_memory(void)
 	 * heap is allocated.  (Or, in the calculation, if less than 1/4th is
 	 * free)
 	 */
-	n = (int64_t)vmem_size(heap_arena, VMEM_FREE) -
-	    (vmem_size(heap_arena, VMEM_FREE | VMEM_ALLOC) >> 2);
+	n = uma_avail() - (long)(uma_limit() / 4);
 	if (n < lowest) {
 		lowest = n;
 		r = FMR_HEAP_ARENA;
 	}
-#define	zio_arena	NULL
-#else
-#define	zio_arena	heap_arena
 #endif
 
 	/*
@@ -4331,20 +4326,6 @@ arc_available_memory(void)
 		}
 	}
 
-	/*
-	 * Above limits know nothing about real level of KVA fragmentation.
-	 * Start aggressive reclamation if too little sequential KVA left.
-	 */
-	if (lowest > 0) {
-		n = (vmem_size(heap_arena, VMEM_MAXFREE) < SPA_MAXBLOCKSIZE) ?
-		    -((int64_t)vmem_size(heap_arena, VMEM_ALLOC) >> 4) :
-		    INT64_MAX;
-		if (n < lowest) {
-			lowest = n;
-			r = FMR_ZIO_FRAG;
-		}
-	}
-
 #else	/* _KERNEL */
 	/* Every 100 calls, free a small amount */
 	if (spa_get_random(100) == 0)
@@ -6110,8 +6091,7 @@ arc_memory_throttle(uint64_t reserve, uint64_t txg)
 	static uint64_t last_txg = 0;
 
 #if defined(__i386) || !defined(UMA_MD_SMALL_ALLOC)
-	available_memory =
-	    MIN(available_memory, ptob(vmem_size(heap_arena, VMEM_FREE)));
+	available_memory = MIN(available_memory, uma_avail());
 #endif
 
 	if (freemem > (uint64_t)physmem * arc_lotsfree_percent / 100)
@@ -6492,8 +6472,12 @@ arc_init(void)
 	 * Metadata is stored in the kernel's heap.  Don't let us
 	 * use more than half the heap for the ARC.
 	 */
+#ifdef __FreeBSD__
+	arc_meta_limit = MIN(arc_meta_limit, uma_limit() / 2);
+#else
 	arc_meta_limit = MIN(arc_meta_limit,
 	    vmem_size(heap_arena, VMEM_ALLOC | VMEM_FREE) / 2);
+#endif
 #endif
 
 	/* Allow the tunable to override if it is reasonable */
diff --git a/sys/compat/cloudabi/cloudabi_futex.c b/sys/compat/cloudabi/cloudabi_futex.c
index d12b331f187..153e8bce849 100644
--- a/sys/compat/cloudabi/cloudabi_futex.c
+++ b/sys/compat/cloudabi/cloudabi_futex.c
@@ -197,7 +197,7 @@ static void futex_queue_requeue(struct futex_queue *, struct futex_queue *,
     unsigned int);
 static int futex_queue_sleep(struct futex_queue *, struct futex_lock *,
     struct futex_waiter *, struct thread *, cloudabi_clockid_t,
-    cloudabi_timestamp_t, cloudabi_timestamp_t);
+    cloudabi_timestamp_t, cloudabi_timestamp_t, bool);
 static cloudabi_tid_t futex_queue_tid_best(const struct futex_queue *);
 static void futex_queue_wake_up_all(struct futex_queue *);
 static void futex_queue_wake_up_best(struct futex_queue *);
@@ -427,7 +427,7 @@ futex_lock_lookup_locked(struct futex_address *fa)
 static int
 futex_lock_rdlock(struct futex_lock *fl, struct thread *td,
     cloudabi_lock_t *lock, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision)
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime)
 {
 	struct futex_waiter fw;
 	int error;
@@ -438,7 +438,7 @@ futex_lock_rdlock(struct futex_lock *fl, struct thread *td,
 		KASSERT(fl->fl_owner != LOCK_UNMANAGED,
 		    ("Attempted to sleep on an unmanaged lock"));
 		error = futex_queue_sleep(&fl->fl_readers, fl, &fw, td,
-		    clock_id, timeout, precision);
+		    clock_id, timeout, precision, abstime);
 		KASSERT((error == 0) == fw.fw_locked,
 		    ("Should have locked write lock on success"));
 		KASSERT(futex_queue_count(&fw.fw_donated) == 0,
@@ -707,7 +707,7 @@ futex_lock_wake_up_next(struct futex_lock *fl, cloudabi_lock_t *lock)
 static int
 futex_lock_wrlock(struct futex_lock *fl, struct thread *td,
     cloudabi_lock_t *lock, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision,
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime,
     struct futex_queue *donated)
 {
 	struct futex_waiter fw;
@@ -735,7 +735,7 @@ futex_lock_wrlock(struct futex_lock *fl, struct thread *td,
 		KASSERT(fl->fl_owner != LOCK_UNMANAGED,
 		    ("Attempted to sleep on an unmanaged lock"));
 		error = futex_queue_sleep(&fl->fl_writers, fl, &fw, td,
-		    clock_id, timeout, precision);
+		    clock_id, timeout, precision, abstime);
 		KASSERT((error == 0) == fw.fw_locked,
 		    ("Should have locked write lock on success"));
 		KASSERT(futex_queue_count(&fw.fw_donated) == 0,
@@ -789,16 +789,18 @@ futex_queue_convert_timestamp_relative(cloudabi_timestamp_t ts)
 static int
 futex_queue_convert_timestamp(struct thread *td, cloudabi_clockid_t clock_id,
     cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision,
-    sbintime_t *sbttimeout, sbintime_t *sbtprecision)
+    sbintime_t *sbttimeout, sbintime_t *sbtprecision, bool abstime)
 {
 	cloudabi_timestamp_t now;
 	int error;
 
-	/* Make the time relative. */
-	error = cloudabi_clock_time_get(td, clock_id, &now);
-	if (error != 0)
-		return (error);
-	timeout = timeout < now ? 0 : timeout - now;
+	if (abstime) {
+		/* Make the time relative. */
+		error = cloudabi_clock_time_get(td, clock_id, &now);
+		if (error != 0)
+			return (error);
+		timeout = timeout < now ? 0 : timeout - now;
+	}
 
 	*sbttimeout = futex_queue_convert_timestamp_relative(timeout);
 	*sbtprecision = futex_queue_convert_timestamp_relative(precision);
@@ -808,7 +810,7 @@ futex_queue_convert_timestamp(struct thread *td, cloudabi_clockid_t clock_id,
 static int
 futex_queue_sleep(struct futex_queue *fq, struct futex_lock *fl,
     struct futex_waiter *fw, struct thread *td, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision)
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime)
 {
 	sbintime_t sbttimeout, sbtprecision;
 	int error;
@@ -821,7 +823,7 @@ futex_queue_sleep(struct futex_queue *fq, struct futex_lock *fl,
 	if (timeout != UINT64_MAX) {
 		/* Convert timeout duration. */
 		error = futex_queue_convert_timestamp(td, clock_id, timeout,
-		    precision, &sbttimeout, &sbtprecision);
+		    precision, &sbttimeout, &sbtprecision, abstime);
 		if (error != 0)
 			return (error);
 	}
@@ -976,7 +978,7 @@ int
 cloudabi_futex_condvar_wait(struct thread *td, cloudabi_condvar_t *condvar,
     cloudabi_scope_t condvar_scope, cloudabi_lock_t *lock,
     cloudabi_scope_t lock_scope, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision)
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime)
 {
 	struct futex_condvar *fc;
 	struct futex_lock *fl;
@@ -1012,7 +1014,7 @@ cloudabi_futex_condvar_wait(struct thread *td, cloudabi_condvar_t *condvar,
 	/* Go to sleep. */
 	++fc->fc_waitcount;
 	error = futex_queue_sleep(&fc->fc_waiters, fc->fc_lock, &fw, td,
-	    clock_id, timeout, precision);
+	    clock_id, timeout, precision, abstime);
 	if (fw.fw_locked) {
 		/* Waited and got the lock assigned to us. */
 		KASSERT(futex_queue_count(&fw.fw_donated) == 0,
@@ -1031,7 +1033,8 @@ cloudabi_futex_condvar_wait(struct thread *td, cloudabi_condvar_t *condvar,
 		 *    responsible for reacquiring the userspace lock.
 		 */
 		error2 = futex_lock_wrlock(fl, td, lock,
-		    CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0, &fw.fw_donated);
+		    CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0, abstime,
+		    &fw.fw_donated);
 		if (error2 != 0)
 			error = error2;
 	} else {
@@ -1048,7 +1051,7 @@ cloudabi_futex_condvar_wait(struct thread *td, cloudabi_condvar_t *condvar,
 int
 cloudabi_futex_lock_rdlock(struct thread *td, cloudabi_lock_t *lock,
     cloudabi_scope_t scope, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision)
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime)
 {
 	struct futex_lock *fl;
 	int error;
@@ -1059,7 +1062,7 @@ cloudabi_futex_lock_rdlock(struct thread *td, cloudabi_lock_t *lock,
 		return (error);
 
 	error = futex_lock_rdlock(fl, td, lock, clock_id, timeout,
-	    precision);
+	    precision, abstime);
 	futex_lock_release(fl);
 	return (error);
 }
@@ -1067,7 +1070,7 @@ cloudabi_futex_lock_rdlock(struct thread *td, cloudabi_lock_t *lock,
 int
 cloudabi_futex_lock_wrlock(struct thread *td, cloudabi_lock_t *lock,
     cloudabi_scope_t scope, cloudabi_clockid_t clock_id,
-    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision)
+    cloudabi_timestamp_t timeout, cloudabi_timestamp_t precision, bool abstime)
 {
 	struct futex_lock *fl;
 	struct futex_queue fq;
@@ -1080,7 +1083,7 @@ cloudabi_futex_lock_wrlock(struct thread *td, cloudabi_lock_t *lock,
 
 	futex_queue_init(&fq);
 	error = futex_lock_wrlock(fl, td, lock, clock_id, timeout,
-	    precision, &fq);
+	    precision, abstime, &fq);
 	futex_lock_release(fl);
 	return (error);
 }
diff --git a/sys/compat/cloudabi/cloudabi_util.h b/sys/compat/cloudabi/cloudabi_util.h
index d9a6096c73f..0f07dc53fa2 100644
--- a/sys/compat/cloudabi/cloudabi_util.h
+++ b/sys/compat/cloudabi/cloudabi_util.h
@@ -65,13 +65,13 @@ int cloudabi_convert_timespec(const struct timespec *, cloudabi_timestamp_t *);
  */
 int cloudabi_futex_condvar_wait(struct thread *, cloudabi_condvar_t *,
     cloudabi_scope_t, cloudabi_lock_t *, cloudabi_scope_t, cloudabi_clockid_t,
-    cloudabi_timestamp_t, cloudabi_timestamp_t);
+    cloudabi_timestamp_t, cloudabi_timestamp_t, bool);
 int cloudabi_futex_lock_rdlock(struct thread *, cloudabi_lock_t *,
     cloudabi_scope_t, cloudabi_clockid_t, cloudabi_timestamp_t,
-    cloudabi_timestamp_t);
+    cloudabi_timestamp_t, bool);
 int cloudabi_futex_lock_wrlock(struct thread *, cloudabi_lock_t *,
     cloudabi_scope_t, cloudabi_clockid_t, cloudabi_timestamp_t,
-    cloudabi_timestamp_t);
+    cloudabi_timestamp_t, bool);
 
 /* Socket operations. */
 int cloudabi_sock_recv(struct thread *, cloudabi_fd_t, struct iovec *, size_t,
diff --git a/sys/compat/cloudabi32/cloudabi32_poll.c b/sys/compat/cloudabi32/cloudabi32_poll.c
index 02e7e7f9ae4..2fda78f8adf 100644
--- a/sys/compat/cloudabi32/cloudabi32_poll.c
+++ b/sys/compat/cloudabi32/cloudabi32_poll.c
@@ -243,7 +243,7 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 			        sub.condvar.condvar_scope,
 			        TO_PTR(sub.condvar.lock),
 			        sub.condvar.lock_scope,
-			        CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0));
+			        CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK) {
@@ -252,7 +252,7 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 			    cloudabi_futex_lock_rdlock(
 			        td, TO_PTR(sub.lock.lock),
 			        sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
-			        UINT64_MAX, 0));
+			        UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK) {
@@ -261,7 +261,7 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 			    cloudabi_futex_lock_wrlock(
 			        td, TO_PTR(sub.lock.lock),
 			        sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
-			        UINT64_MAX, 0));
+			        UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		}
@@ -278,15 +278,16 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 		ev[1].userdata = sub[1].userdata;
 		ev[1].type = sub[1].type;
 		if (sub[0].type == CLOUDABI_EVENTTYPE_CONDVAR &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Wait for a condition variable with timeout. */
 			error = cloudabi_futex_condvar_wait(
 			    td, TO_PTR(sub[0].condvar.condvar),
 			    sub[0].condvar.condvar_scope,
 			    TO_PTR(sub[0].condvar.lock),
 			    sub[0].condvar.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
@@ -297,13 +298,14 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 			td->td_retval[0] = 1;
 			return (copyout(&ev[0], uap->out, sizeof(ev[0])));
 		} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Acquire a read lock with a timeout. */
 			error = cloudabi_futex_lock_rdlock(
 			    td, TO_PTR(sub[0].lock.lock),
 			    sub[0].lock.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
@@ -314,13 +316,14 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap)
 			td->td_retval[0] = 1;
 			return (copyout(&ev[0], uap->out, sizeof(ev[0])));
 		} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Acquire a write lock with a timeout. */
 			error = cloudabi_futex_lock_wrlock(
 			    td, TO_PTR(sub[0].lock.lock),
 			    sub[0].lock.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
diff --git a/sys/compat/cloudabi64/cloudabi64_poll.c b/sys/compat/cloudabi64/cloudabi64_poll.c
index 52950928b27..2d3d87f3ac7 100644
--- a/sys/compat/cloudabi64/cloudabi64_poll.c
+++ b/sys/compat/cloudabi64/cloudabi64_poll.c
@@ -243,7 +243,7 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 			        sub.condvar.condvar_scope,
 			        TO_PTR(sub.condvar.lock),
 			        sub.condvar.lock_scope,
-			        CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0));
+			        CLOUDABI_CLOCK_MONOTONIC, UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK) {
@@ -252,7 +252,7 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 			    cloudabi_futex_lock_rdlock(
 			        td, TO_PTR(sub.lock.lock),
 			        sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
-			        UINT64_MAX, 0));
+			        UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		} else if (sub.type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK) {
@@ -261,7 +261,7 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 			    cloudabi_futex_lock_wrlock(
 			        td, TO_PTR(sub.lock.lock),
 			        sub.lock.lock_scope, CLOUDABI_CLOCK_MONOTONIC,
-			        UINT64_MAX, 0));
+			        UINT64_MAX, 0, true));
 			td->td_retval[0] = 1;
 			return (copyout(&ev, uap->out, sizeof(ev)));
 		}
@@ -278,15 +278,16 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 		ev[1].userdata = sub[1].userdata;
 		ev[1].type = sub[1].type;
 		if (sub[0].type == CLOUDABI_EVENTTYPE_CONDVAR &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Wait for a condition variable with timeout. */
 			error = cloudabi_futex_condvar_wait(
 			    td, TO_PTR(sub[0].condvar.condvar),
 			    sub[0].condvar.condvar_scope,
 			    TO_PTR(sub[0].condvar.lock),
 			    sub[0].condvar.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
@@ -297,13 +298,14 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 			td->td_retval[0] = 1;
 			return (copyout(&ev[0], uap->out, sizeof(ev[0])));
 		} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_RDLOCK &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Acquire a read lock with a timeout. */
 			error = cloudabi_futex_lock_rdlock(
 			    td, TO_PTR(sub[0].lock.lock),
 			    sub[0].lock.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
@@ -314,13 +316,14 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap)
 			td->td_retval[0] = 1;
 			return (copyout(&ev[0], uap->out, sizeof(ev[0])));
 		} else if (sub[0].type == CLOUDABI_EVENTTYPE_LOCK_WRLOCK &&
-		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK &&
-		    sub[1].clock.flags == CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) {
+		    sub[1].type == CLOUDABI_EVENTTYPE_CLOCK) {
 			/* Acquire a write lock with a timeout. */
 			error = cloudabi_futex_lock_wrlock(
 			    td, TO_PTR(sub[0].lock.lock),
 			    sub[0].lock.lock_scope, sub[1].clock.clock_id,
-			    sub[1].clock.timeout, sub[1].clock.precision);
+			    sub[1].clock.timeout, sub[1].clock.precision,
+			    (sub[1].clock.flags &
+			    CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME) != 0);
 			if (error == ETIMEDOUT) {
 				td->td_retval[0] = 1;
 				return (copyout(&ev[1], uap->out,
diff --git a/sys/conf/Makefile.arm b/sys/conf/Makefile.arm
index 53ff25ab239..5bbcddc98fa 100644
--- a/sys/conf/Makefile.arm
+++ b/sys/conf/Makefile.arm
@@ -53,6 +53,11 @@ CFLAGS += -mllvm -arm-enable-ehabi
 .endif
 .endif
 
+# "makeoptions KERNVIRTADDR=" is now optional, supply the default value.
+.if empty(KERNVIRTADDR)
+KERNVIRTADDR= 0xc0000000
+.endif
+
 # hack because genassym.c includes sys/bus.h which includes these.
 genassym.o: bus_if.h device_if.h
 
diff --git a/sys/conf/NOTES b/sys/conf/NOTES
index 9d1ec64895b..f7253873828 100644
--- a/sys/conf/NOTES
+++ b/sys/conf/NOTES
@@ -590,6 +590,20 @@ options 	STACK
 #
 options 	NUM_CORE_FILES=5
 
+#
+# The TSLOG option enables timestamped logging of events, especially
+# function entries/exits, in order to track the time spent by the kernel.
+# In particular, this is useful when investigating the early boot process,
+# before it is possible to use more sophisticated tools like DTrace.
+# The TSLOGSIZE option controls the size of the (preallocated, fixed
+# length) buffer used for storing these events (default: 262144 records).
+#
+# For security reasons the TSLOG option should not be enabled on systems
+# used in production.
+#
+options 	TSLOG
+options 	TSLOGSIZE=262144
+
 
 #####################################################################
 # PERFORMANCE MONITORING OPTIONS
@@ -2595,7 +2609,9 @@ options 	BOOTP_WIRED_TO=fxp0 # Use interface fxp0 for BOOTP
 options 	BOOTP_BLOCKSIZE=8192 # Override NFS block size
 
 #
-# Add software watchdog routines.
+# Enable software watchdog routines, even if hardware watchdog is present.
+# By default, software watchdog timer is enabled only if no hardware watchdog
+# is present.
 #
 options 	SW_WATCHDOG
 
diff --git a/sys/conf/files b/sys/conf/files
index 0073ce28dd4..4d3b9676305 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -3802,6 +3802,7 @@ kern/kern_thr.c			standard
 kern/kern_thread.c		standard
 kern/kern_time.c		standard
 kern/kern_timeout.c		standard
+kern/kern_tslog.c		optional tslog
 kern/kern_umtx.c		standard
 kern/kern_uuid.c		standard
 kern/kern_xxx.c			standard
diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64
index 3e35a8ccb44..48c0c7499d5 100644
--- a/sys/conf/files.arm64
+++ b/sys/conf/files.arm64
@@ -59,7 +59,7 @@ arm/allwinner/clkng/ccu_a64.c	optional	aw_ccu fdt
 arm/allwinner/clkng/ccu_h3.c	optional	aw_ccu fdt
 arm/allwinner/clkng/ccu_sun8i_r.c	optional	aw_ccu fdt
 
-arm/allwinner/if_awg.c		optional	awg fdt
+arm/allwinner/if_awg.c		optional	awg ext_resources syscon fdt
 arm/annapurna/alpine/alpine_ccu.c		optional	al_ccu fdt
 arm/annapurna/alpine/alpine_nb_service.c	optional	al_nb_service fdt
 arm/annapurna/alpine/alpine_pci.c		optional	al_pci fdt
diff --git a/sys/conf/files.i386 b/sys/conf/files.i386
index eb44f439e2c..fc7696827d3 100644
--- a/sys/conf/files.i386
+++ b/sys/conf/files.i386
@@ -201,6 +201,7 @@ dev/ed/if_ed_isa.c		optional ed isa
 dev/ed/if_ed_wd80x3.c		optional ed isa
 dev/ed/if_ed_hpp.c		optional ed isa ed_hpp
 dev/ed/if_ed_sic.c		optional ed isa ed_sic
+dev/ep/elink.c			optional ep
 dev/fb/fb.c			optional fb | vga
 dev/fb/s3_pci.c			optional s3pci
 dev/fb/vesa.c			optional vga vesa
@@ -489,6 +490,7 @@ i386/i386/minidump_machdep.c	standard
 i386/i386/mp_clock.c		optional smp
 i386/i386/mp_machdep.c		optional smp
 i386/i386/mpboot.s		optional smp
+i386/i386/npx.c			standard
 i386/i386/perfmon.c		optional perfmon
 i386/i386/pmap.c		standard
 i386/i386/ptrace_machdep.c	standard
@@ -518,8 +520,6 @@ i386/ibcs2/ibcs2_util.c		optional ibcs2
 i386/ibcs2/ibcs2_xenix.c	optional ibcs2
 i386/ibcs2/ibcs2_xenix_sysent.c	optional ibcs2
 i386/ibcs2/imgact_coff.c	optional ibcs2
-i386/isa/elink.c		optional ep
-i386/isa/npx.c			standard
 i386/isa/pmtimer.c		optional pmtimer
 i386/isa/prof_machdep.c		optional profiling-routine
 i386/linux/imgact_linux.c	optional compat_linux
diff --git a/sys/conf/ldscript.powerpc64 b/sys/conf/ldscript.powerpc64
index 82836699456..025c6545197 100644
--- a/sys/conf/ldscript.powerpc64
+++ b/sys/conf/ldscript.powerpc64
@@ -8,8 +8,12 @@ SEARCH_DIR(/usr/lib);
 PROVIDE (__stack = 0);
 SECTIONS
 {
-  /* Read-only sections, merged into text segment: */
 
+  /* Low-address wrapper for bootloaders (kexec/kboot) that can't parse ELF */
+  . = kernbase - 0x100;
+  .kboot : { *(.text.kboot) }
+
+  /* Read-only sections, merged into text segment: */
   . = kernbase;
   PROVIDE (begin = .);
 
@@ -28,6 +32,9 @@ SECTIONS
   .interpX    : { *(.interp) 	} : NONE
   /DISCARD/   : { *(.interp)	} 
 
+  /* Also delete notes */
+  /DISCARD/   : { *(.note.*)	} 
+
   .hash          : { *(.hash)		}
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
diff --git a/sys/conf/options b/sys/conf/options
index b83926f18a9..9cb92548711 100644
--- a/sys/conf/options
+++ b/sys/conf/options
@@ -67,6 +67,8 @@ EARLY_PRINTF	opt_global.h
 TEXTDUMP_PREFERRED	opt_ddb.h
 TEXTDUMP_VERBOSE	opt_ddb.h
 NUM_CORE_FILES	opt_global.h
+TSLOG	opt_global.h
+TSLOGSIZE	opt_global.h
 
 # Miscellaneous options.
 ALQ
diff --git a/sys/contrib/dev/acpica/acpica_prep.sh b/sys/contrib/dev/acpica/acpica_prep.sh
index 91770e33f55..e3f6f30aea9 100755
--- a/sys/contrib/dev/acpica/acpica_prep.sh
+++ b/sys/contrib/dev/acpica/acpica_prep.sh
@@ -31,10 +31,10 @@ src_headers="acapps.h acbuffer.h acclib.h accommon.h acconfig.h		\
 	acexcep.h acglobal.h achware.h acinterp.h aclocal.h acmacros.h	\
 	acnames.h acnamesp.h acobject.h acopcode.h acoutput.h		\
 	acparser.h acpi.h acpiosxf.h acpixf.h acpredef.h acresrc.h	\
-	acrestyp.h acstruct.h actables.h actbl.h actbl1.h actbl2.h	\
-	actbl3.h actypes.h acutils.h acuuid.h amlcode.h amlresrc.h	\
-	platform/acenv.h platform/acenvex.h platform/acfreebsd.h	\
-	platform/acgcc.h"
+	acrestyp.h acstruct.h actables.h actbinfo.h actbl.h actbl1.h	\
+	actbl2.h actbl3.h actypes.h acutils.h acuuid.h amlcode.h	\
+	amlresrc.h platform/acenv.h platform/acenvex.h			\
+	platform/acfreebsd.h platform/acgcc.h"
 comp_headers="aslcompiler.h asldefine.h aslglobal.h aslmessages.h	\
 	aslsupport.l asltypes.h dtcompiler.h dttemplate.h preprocess.h"
 platform_headers="acfreebsd.h acgcc.h"
diff --git a/sys/contrib/dev/acpica/changes.txt b/sys/contrib/dev/acpica/changes.txt
index 2a72a514401..f2d6243e5ce 100644
--- a/sys/contrib/dev/acpica/changes.txt
+++ b/sys/contrib/dev/acpica/changes.txt
@@ -1,3 +1,36 @@
+----------------------------------------
+05 January 2018. Summary of changes for version 20180105:
+
+
+1) ACPICA kernel-resident subsystem:
+
+Updated all copyrights to 2018. This affects all source code modules.
+
+Fixed a possible build error caused by an unresolved reference to the 
+AcpiUtSafeStrncpy function.
+
+Removed NULL pointer arithmetic in the various pointer manipulation 
+macros. All "(void *) NULL" constructs are converted to "(void *) 0". 
+This eliminates warnings/errors in newer C compilers. Jung-uk Kim.
+
+Added support for A32 ABI compilation, which uses the ILP32 model. Anuj 
+Mittal.
+
+
+2) iASL Compiler/Disassembler and Tools:
+
+ASLTS: Updated all copyrights to 2018.
+
+Tools: Updated all signon copyrights to 2018.
+
+AcpiXtract: Fixed a regression related to ACPI table signatures where the 
+signature was truncated to 3 characters (instead of 4).
+
+AcpiExec: Restore the original terminal mode after the use of the -v and 
+-vd options.
+
+ASLTS: Deployed the iASL __METHOD__ macro across the test suite.
+
 ----------------------------------------
 14 December 2017. Summary of changes for version 20171214:
 
diff --git a/sys/contrib/dev/acpica/common/acfileio.c b/sys/contrib/dev/acpica/common/acfileio.c
index 83c1e8b5435..cfc8d3b61d4 100644
--- a/sys/contrib/dev/acpica/common/acfileio.c
+++ b/sys/contrib/dev/acpica/common/acfileio.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/acgetline.c b/sys/contrib/dev/acpica/common/acgetline.c
index a1b7a95fd1a..77e1551ce50 100644
--- a/sys/contrib/dev/acpica/common/acgetline.c
+++ b/sys/contrib/dev/acpica/common/acgetline.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/adfile.c b/sys/contrib/dev/acpica/common/adfile.c
index a3abdce55d6..44950b4590e 100644
--- a/sys/contrib/dev/acpica/common/adfile.c
+++ b/sys/contrib/dev/acpica/common/adfile.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/adisasm.c b/sys/contrib/dev/acpica/common/adisasm.c
index 3ea3d023db8..99f2575644b 100644
--- a/sys/contrib/dev/acpica/common/adisasm.c
+++ b/sys/contrib/dev/acpica/common/adisasm.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/adwalk.c b/sys/contrib/dev/acpica/common/adwalk.c
index 2cd328db797..6876e1225b2 100644
--- a/sys/contrib/dev/acpica/common/adwalk.c
+++ b/sys/contrib/dev/acpica/common/adwalk.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/ahids.c b/sys/contrib/dev/acpica/common/ahids.c
index 957a4fc66cb..57d9cb0eb8c 100644
--- a/sys/contrib/dev/acpica/common/ahids.c
+++ b/sys/contrib/dev/acpica/common/ahids.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/ahpredef.c b/sys/contrib/dev/acpica/common/ahpredef.c
index 7892eec07b6..06070665715 100644
--- a/sys/contrib/dev/acpica/common/ahpredef.c
+++ b/sys/contrib/dev/acpica/common/ahpredef.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/ahtable.c b/sys/contrib/dev/acpica/common/ahtable.c
index 247ff29335a..b28b6d110e5 100644
--- a/sys/contrib/dev/acpica/common/ahtable.c
+++ b/sys/contrib/dev/acpica/common/ahtable.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/ahuuids.c b/sys/contrib/dev/acpica/common/ahuuids.c
index a0b45081b17..cb69adfcd23 100644
--- a/sys/contrib/dev/acpica/common/ahuuids.c
+++ b/sys/contrib/dev/acpica/common/ahuuids.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/cmfsize.c b/sys/contrib/dev/acpica/common/cmfsize.c
index 1ed2f886cf8..63f19840589 100644
--- a/sys/contrib/dev/acpica/common/cmfsize.c
+++ b/sys/contrib/dev/acpica/common/cmfsize.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmextern.c b/sys/contrib/dev/acpica/common/dmextern.c
index e30367447f1..88398d6d85d 100644
--- a/sys/contrib/dev/acpica/common/dmextern.c
+++ b/sys/contrib/dev/acpica/common/dmextern.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmrestag.c b/sys/contrib/dev/acpica/common/dmrestag.c
index 85c2effba3b..70850b7dc96 100644
--- a/sys/contrib/dev/acpica/common/dmrestag.c
+++ b/sys/contrib/dev/acpica/common/dmrestag.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmswitch.c b/sys/contrib/dev/acpica/common/dmswitch.c
index 0cf913ab486..00c7be10fbb 100644
--- a/sys/contrib/dev/acpica/common/dmswitch.c
+++ b/sys/contrib/dev/acpica/common/dmswitch.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmtable.c b/sys/contrib/dev/acpica/common/dmtable.c
index cf5d6010740..67998a5332e 100644
--- a/sys/contrib/dev/acpica/common/dmtable.c
+++ b/sys/contrib/dev/acpica/common/dmtable.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmtables.c b/sys/contrib/dev/acpica/common/dmtables.c
index 2fe26b33032..cc7ccd6ae8f 100644
--- a/sys/contrib/dev/acpica/common/dmtables.c
+++ b/sys/contrib/dev/acpica/common/dmtables.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmtbdump.c b/sys/contrib/dev/acpica/common/dmtbdump.c
index 297455dd5f3..ad9cb7258f6 100644
--- a/sys/contrib/dev/acpica/common/dmtbdump.c
+++ b/sys/contrib/dev/acpica/common/dmtbdump.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/common/dmtbinfo.c b/sys/contrib/dev/acpica/common/dmtbinfo.c
index 2702e61905b..3364f546e1f 100644
--- a/sys/contrib/dev/acpica/common/dmtbinfo.c
+++ b/sys/contrib/dev/acpica/common/dmtbinfo.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -152,6 +152,7 @@
 #include <contrib/dev/acpica/include/acpi.h>
 #include <contrib/dev/acpica/include/accommon.h>
 #include <contrib/dev/acpica/include/acdisasm.h>
+#include <contrib/dev/acpica/include/actbinfo.h>
 
 /* This module used for application-level code only */
 
@@ -183,268 +184,6 @@
  * - Add type and length cases in dtutils.c (DT compiler)
  */
 
-/*
- * Macros used to generate offsets to specific table fields
- */
-#define ACPI_FACS_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f)
-#define ACPI_GAS_OFFSET(f)              (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
-#define ACPI_HDR_OFFSET(f)              (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
-#define ACPI_RSDP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
-#define ACPI_BERT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f)
-#define ACPI_BGRT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f)
-#define ACPI_BOOT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
-#define ACPI_CPEP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
-#define ACPI_DBG2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f)
-#define ACPI_DBGP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
-#define ACPI_DMAR_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
-#define ACPI_DRTM_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f)
-#define ACPI_ECDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
-#define ACPI_EINJ_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
-#define ACPI_ERST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f)
-#define ACPI_GTDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f)
-#define ACPI_HEST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f)
-#define ACPI_HPET_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f)
-#define ACPI_HMAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HMAT,f)
-#define ACPI_IORT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_IORT,f)
-#define ACPI_IVRS_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
-#define ACPI_MADT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f)
-#define ACPI_MCFG_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
-#define ACPI_MCHI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f)
-#define ACPI_MPST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f)
-#define ACPI_MSCT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
-#define ACPI_NFIT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_NFIT,f)
-#define ACPI_PCCT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f)
-#define ACPI_PDTT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PDTT,f)
-#define ACPI_PMTT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f)
-#define ACPI_RASF_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_RASF,f)
-#define ACPI_S3PT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f)
-#define ACPI_SBST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f)
-#define ACPI_SDEI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SDEI,f)
-#define ACPI_SDEV_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SDEV,f)
-#define ACPI_SLIT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
-#define ACPI_SPCR_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
-#define ACPI_SPMI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
-#define ACPI_SRAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
-#define ACPI_STAO_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_STAO,f)
-#define ACPI_TCPA_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_HDR,f)
-#define ACPI_TPM2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f)
-#define ACPI_UEFI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
-#define ACPI_WAET_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f)
-#define ACPI_WDAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
-#define ACPI_WDDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f)
-#define ACPI_WDRT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
-#define ACPI_WPBT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WPBT,f)
-#define ACPI_WSMT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WSMT,f)
-#define ACPI_XENV_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_XENV,f)
-
-/* Subtables */
-
-#define ACPI_ASF0_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f)
-#define ACPI_ASF1_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f)
-#define ACPI_ASF1a_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
-#define ACPI_ASF2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
-#define ACPI_ASF2a_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
-#define ACPI_ASF3_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f)
-#define ACPI_ASF4_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
-#define ACPI_CPEP0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
-#define ACPI_CSRT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f)
-#define ACPI_CSRT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f)
-#define ACPI_CSRT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f)
-#define ACPI_DBG20_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f)
-#define ACPI_DMARS_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
-#define ACPI_DMAR0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
-#define ACPI_DMAR1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
-#define ACPI_DMAR2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
-#define ACPI_DMAR3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
-#define ACPI_DMAR4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f)
-#define ACPI_DRTM0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST,f)
-#define ACPI_DRTM1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST,f)
-#define ACPI_DRTM1a_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE,f)
-#define ACPI_DRTM2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_DPS_ID,f)
-#define ACPI_EINJ0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
-#define ACPI_ERST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
-#define ACPI_FPDTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
-#define ACPI_FPDT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT_POINTER,f)
-#define ACPI_FPDT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_POINTER,f)
-#define ACPI_GTDT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_BLOCK,f)
-#define ACPI_GTDT0a_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_ENTRY,f)
-#define ACPI_GTDT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_WATCHDOG,f)
-#define ACPI_GTDTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_HEADER,f)
-#define ACPI_HEST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
-#define ACPI_HEST1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
-#define ACPI_HEST2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
-#define ACPI_HEST6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
-#define ACPI_HEST7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f)
-#define ACPI_HEST8_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
-#define ACPI_HEST9_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
-#define ACPI_HEST10_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC_V2,f)
-#define ACPI_HEST11_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f)
-#define ACPI_HESTN_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
-#define ACPI_HESTB_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f)
-#define ACPI_HMAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f)
-#define ACPI_HMAT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_LOCALITY,f)
-#define ACPI_HMAT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_CACHE,f)
-#define ACPI_HMATH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_STRUCTURE,f)
-#define ACPI_IORT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ITS_GROUP,f)
-#define ACPI_IORT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT,f)
-#define ACPI_IORT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ROOT_COMPLEX,f)
-#define ACPI_IORT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU,f)
-#define ACPI_IORT3A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_GSI,f)
-#define ACPI_IORT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_V3,f)
-#define ACPI_IORTA_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_MEMORY_ACCESS,f)
-#define ACPI_IORTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_NODE,f)
-#define ACPI_IORTM_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ID_MAPPING,f)
-#define ACPI_IVRSH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
-#define ACPI_IVRS0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
-#define ACPI_IVRS1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
-#define ACPI_IVRSD_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
-#define ACPI_IVRS8A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
-#define ACPI_IVRS8B_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
-#define ACPI_IVRS8C_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
-#define ACPI_LPITH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f)
-#define ACPI_LPIT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f)
-#define ACPI_MADT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
-#define ACPI_MADT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
-#define ACPI_MADT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
-#define ACPI_MADT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
-#define ACPI_MADT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
-#define ACPI_MADT5_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
-#define ACPI_MADT6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
-#define ACPI_MADT7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
-#define ACPI_MADT8_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
-#define ACPI_MADT9_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
-#define ACPI_MADT10_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
-#define ACPI_MADT11_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f)
-#define ACPI_MADT12_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f)
-#define ACPI_MADT13_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f)
-#define ACPI_MADT14_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f)
-#define ACPI_MADT15_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_TRANSLATOR,f)
-#define ACPI_MADTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
-#define ACPI_MCFG0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
-#define ACPI_MPST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f)
-#define ACPI_MPST0A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f)
-#define ACPI_MPST0B_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f)
-#define ACPI_MPST1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f)
-#define ACPI_MPST2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f)
-#define ACPI_MSCT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
-#define ACPI_MTMR0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f)
-#define ACPI_NFITH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_HEADER,f)
-#define ACPI_NFIT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f)
-#define ACPI_NFIT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_MEMORY_MAP,f)
-#define ACPI_NFIT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_INTERLEAVE,f)
-#define ACPI_NFIT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_SMBIOS,f)
-#define ACPI_NFIT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_CONTROL_REGION,f)
-#define ACPI_NFIT5_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_DATA_REGION,f)
-#define ACPI_NFIT6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_FLUSH_ADDRESS,f)
-#define ACPI_NFIT7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_CAPABILITIES,f)
-#define ACPI_PCCT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f)
-#define ACPI_PCCT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f)
-#define ACPI_PCCT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f)
-#define ACPI_PCCT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f)
-#define ACPI_PCCT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f)
-#define ACPI_PDTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PDTT_CHANNEL,f)
-#define ACPI_PMTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f)
-#define ACPI_PMTT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f)
-#define ACPI_PMTT1A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f)
-#define ACPI_PMTT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f)
-#define ACPI_PMTTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f)
-#define ACPI_PPTTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
-#define ACPI_PPTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_PROCESSOR,f)
-#define ACPI_PPTT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_CACHE,f)
-#define ACPI_PPTT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_ID,f)
-#define ACPI_S3PTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
-#define ACPI_S3PT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f)
-#define ACPI_S3PT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f)
-#define ACPI_SDEVH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_HEADER,f)
-#define ACPI_SDEV0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_NAMESPACE,f)
-#define ACPI_SDEV1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_PCIE,f)
-#define ACPI_SDEV1A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_SDEV_PCIE_PATH,f)
-#define ACPI_SLIC_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIC,f)
-#define ACPI_SRATH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
-#define ACPI_SRAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
-#define ACPI_SRAT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
-#define ACPI_SRAT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
-#define ACPI_SRAT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_GICC_AFFINITY,f)
-#define ACPI_SRAT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_GIC_ITS_AFFINITY,f)
-#define ACPI_TCPA_CLIENT_OFFSET(f)      (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_CLIENT,f)
-#define ACPI_TCPA_SERVER_OFFSET(f)      (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_SERVER,f)
-#define ACPI_TPM2A_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_TPM2_TRAILER,f)
-#define ACPI_TPM211_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_TPM2_ARM_SMC,f)
-#define ACPI_VRTC0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f)
-#define ACPI_WDAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
-
-/*
- * Simplify access to flag fields by breaking them up into bytes
- */
-#define ACPI_FLAG_OFFSET(d,f,o)         (UINT16) (ACPI_OFFSET (d,f) + o)
-
-/* Flags */
-
-#define ACPI_BGRT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_BGRT,f,o)
-#define ACPI_DRTM_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_DRTM,f,o)
-#define ACPI_DRTM1a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_DRTM_RESOURCE,f,o)
-#define ACPI_FADT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
-#define ACPI_FACS_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
-#define ACPI_HPET_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
-#define ACPI_PPTT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PPTT_PROCESSOR,f,o)
-#define ACPI_PPTT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PPTT_CACHE,f,o)
-#define ACPI_SRAT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
-#define ACPI_SRAT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
-#define ACPI_SRAT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
-#define ACPI_SRAT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_GICC_AFFINITY,f,o)
-#define ACPI_GTDT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o)
-#define ACPI_GTDT0a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o)
-#define ACPI_GTDT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o)
-#define ACPI_HMAT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f,o)
-#define ACPI_HMAT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_LOCALITY,f,o)
-#define ACPI_HMAT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_CACHE,f,o)
-#define ACPI_IORT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_SMMU,f,o)
-#define ACPI_IORT3a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_GSI,f,o)
-#define ACPI_IORT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_V3,f,o)
-#define ACPI_IORTA_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_MEMORY_ACCESS,f,o)
-#define ACPI_IORTM_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_ID_MAPPING,f,o)
-#define ACPI_LPITH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o)
-#define ACPI_MADT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
-#define ACPI_MADT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
-#define ACPI_MADT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
-#define ACPI_MADT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
-#define ACPI_MADT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
-#define ACPI_MADT7_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
-#define ACPI_MADT8_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
-#define ACPI_MADT9_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
-#define ACPI_MADT10_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
-#define ACPI_MADT11_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o)
-#define ACPI_MADT13_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o)
-#define ACPI_MPST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o)
-#define ACPI_MPST2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o)
-#define ACPI_NFIT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f,o)
-#define ACPI_NFIT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_MEMORY_MAP,f,o)
-#define ACPI_NFIT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_CONTROL_REGION,f,o)
-#define ACPI_NFIT7_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_CAPABILITIES,f,o)
-#define ACPI_PCCT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o)
-#define ACPI_PCCT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o)
-#define ACPI_PCCT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f,o)
-#define ACPI_PCCT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f,o)
-#define ACPI_PCCT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f,o)
-#define ACPI_PDTT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PDTT_CHANNEL,f,o)
-#define ACPI_PMTTH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o)
-#define ACPI_SDEVH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SDEV_HEADER,f,o)
-#define ACPI_WDDT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o)
-#define ACPI_WSMT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_WSMT,f,o)
-#define ACPI_EINJ0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
-#define ACPI_ERST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
-#define ACPI_HEST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o)
-#define ACPI_HEST1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o)
-#define ACPI_HEST6_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o)
-#define ACPI_HEST11_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f,o)
-
-/*
- * Required terminator for all tables below
- */
-#define ACPI_DMT_TERMINATOR             {ACPI_DMT_EXIT, 0, NULL, 0}
-#define ACPI_DMT_NEW_LINE               {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0}
-
-
 /*
  * ACPI Table Information, used to dump formatted ACPI tables
  *
diff --git a/sys/contrib/dev/acpica/common/getopt.c b/sys/contrib/dev/acpica/common/getopt.c
index 91c4e422ebe..d8ec4f08b95 100644
--- a/sys/contrib/dev/acpica/common/getopt.c
+++ b/sys/contrib/dev/acpica/common/getopt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslallocate.c b/sys/contrib/dev/acpica/compiler/aslallocate.c
index e83a01f422a..0ff5e845112 100644
--- a/sys/contrib/dev/acpica/compiler/aslallocate.c
+++ b/sys/contrib/dev/acpica/compiler/aslallocate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslanalyze.c b/sys/contrib/dev/acpica/compiler/aslanalyze.c
index 67856d459d5..60c1a92c894 100644
--- a/sys/contrib/dev/acpica/compiler/aslanalyze.c
+++ b/sys/contrib/dev/acpica/compiler/aslanalyze.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslascii.c b/sys/contrib/dev/acpica/compiler/aslascii.c
index 23e89204f13..e6b021f028e 100644
--- a/sys/contrib/dev/acpica/compiler/aslascii.c
+++ b/sys/contrib/dev/acpica/compiler/aslascii.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslbtypes.c b/sys/contrib/dev/acpica/compiler/aslbtypes.c
index 6e4ff5ca456..fc920f22296 100644
--- a/sys/contrib/dev/acpica/compiler/aslbtypes.c
+++ b/sys/contrib/dev/acpica/compiler/aslbtypes.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcache.c b/sys/contrib/dev/acpica/compiler/aslcache.c
index 1e54a2fa8d7..9d94f091527 100644
--- a/sys/contrib/dev/acpica/compiler/aslcache.c
+++ b/sys/contrib/dev/acpica/compiler/aslcache.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcodegen.c b/sys/contrib/dev/acpica/compiler/aslcodegen.c
index 13def091648..8f609699e43 100644
--- a/sys/contrib/dev/acpica/compiler/aslcodegen.c
+++ b/sys/contrib/dev/acpica/compiler/aslcodegen.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcompile.c b/sys/contrib/dev/acpica/compiler/aslcompile.c
index 2f2a1b2c438..649200be917 100644
--- a/sys/contrib/dev/acpica/compiler/aslcompile.c
+++ b/sys/contrib/dev/acpica/compiler/aslcompile.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcompiler.h b/sys/contrib/dev/acpica/compiler/aslcompiler.h
index 96bfc979c9f..5f2c4b45751 100644
--- a/sys/contrib/dev/acpica/compiler/aslcompiler.h
+++ b/sys/contrib/dev/acpica/compiler/aslcompiler.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcompiler.l b/sys/contrib/dev/acpica/compiler/aslcompiler.l
index 38fe15a2c92..2ce3e8bd4bd 100644
--- a/sys/contrib/dev/acpica/compiler/aslcompiler.l
+++ b/sys/contrib/dev/acpica/compiler/aslcompiler.l
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslcstyle.y b/sys/contrib/dev/acpica/compiler/aslcstyle.y
index 928e3a4e18a..ffcf41db63a 100644
--- a/sys/contrib/dev/acpica/compiler/aslcstyle.y
+++ b/sys/contrib/dev/acpica/compiler/aslcstyle.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asldebug.c b/sys/contrib/dev/acpica/compiler/asldebug.c
index 42a0736fa3b..458e32df742 100644
--- a/sys/contrib/dev/acpica/compiler/asldebug.c
+++ b/sys/contrib/dev/acpica/compiler/asldebug.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asldefine.h b/sys/contrib/dev/acpica/compiler/asldefine.h
index bcdc8c2407c..8d5f4bad695 100644
--- a/sys/contrib/dev/acpica/compiler/asldefine.h
+++ b/sys/contrib/dev/acpica/compiler/asldefine.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslerror.c b/sys/contrib/dev/acpica/compiler/aslerror.c
index f8c6c98d860..43d7a9c15a5 100644
--- a/sys/contrib/dev/acpica/compiler/aslerror.c
+++ b/sys/contrib/dev/acpica/compiler/aslerror.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslexternal.c b/sys/contrib/dev/acpica/compiler/aslexternal.c
index dd0b869978b..2e2c813a31e 100644
--- a/sys/contrib/dev/acpica/compiler/aslexternal.c
+++ b/sys/contrib/dev/acpica/compiler/aslexternal.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslfileio.c b/sys/contrib/dev/acpica/compiler/aslfileio.c
index cf99b9db74c..c21ef0dc497 100644
--- a/sys/contrib/dev/acpica/compiler/aslfileio.c
+++ b/sys/contrib/dev/acpica/compiler/aslfileio.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslfiles.c b/sys/contrib/dev/acpica/compiler/aslfiles.c
index 5cb42742965..bfdc48a6e20 100644
--- a/sys/contrib/dev/acpica/compiler/aslfiles.c
+++ b/sys/contrib/dev/acpica/compiler/aslfiles.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslfold.c b/sys/contrib/dev/acpica/compiler/aslfold.c
index fa828c3a5de..e9a1a5dd2e9 100644
--- a/sys/contrib/dev/acpica/compiler/aslfold.c
+++ b/sys/contrib/dev/acpica/compiler/aslfold.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslglobal.h b/sys/contrib/dev/acpica/compiler/aslglobal.h
index 169b25e745e..af65a453881 100644
--- a/sys/contrib/dev/acpica/compiler/aslglobal.h
+++ b/sys/contrib/dev/acpica/compiler/aslglobal.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslhelp.c b/sys/contrib/dev/acpica/compiler/aslhelp.c
index ed3a33298fa..02e263201ba 100644
--- a/sys/contrib/dev/acpica/compiler/aslhelp.c
+++ b/sys/contrib/dev/acpica/compiler/aslhelp.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslhelpers.y b/sys/contrib/dev/acpica/compiler/aslhelpers.y
index cd898b15513..bb9ff625313 100644
--- a/sys/contrib/dev/acpica/compiler/aslhelpers.y
+++ b/sys/contrib/dev/acpica/compiler/aslhelpers.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslhex.c b/sys/contrib/dev/acpica/compiler/aslhex.c
index 89ea53be738..85aa752d4d5 100644
--- a/sys/contrib/dev/acpica/compiler/aslhex.c
+++ b/sys/contrib/dev/acpica/compiler/aslhex.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslkeywords.y b/sys/contrib/dev/acpica/compiler/aslkeywords.y
index e259d849ee5..6da600834ba 100644
--- a/sys/contrib/dev/acpica/compiler/aslkeywords.y
+++ b/sys/contrib/dev/acpica/compiler/aslkeywords.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asllength.c b/sys/contrib/dev/acpica/compiler/asllength.c
index 2e180b031b5..0228fdcf424 100644
--- a/sys/contrib/dev/acpica/compiler/asllength.c
+++ b/sys/contrib/dev/acpica/compiler/asllength.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asllisting.c b/sys/contrib/dev/acpica/compiler/asllisting.c
index 300c767f3f0..bc78930fd92 100644
--- a/sys/contrib/dev/acpica/compiler/asllisting.c
+++ b/sys/contrib/dev/acpica/compiler/asllisting.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asllistsup.c b/sys/contrib/dev/acpica/compiler/asllistsup.c
index 40226b54adb..bf16909397c 100644
--- a/sys/contrib/dev/acpica/compiler/asllistsup.c
+++ b/sys/contrib/dev/acpica/compiler/asllistsup.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslload.c b/sys/contrib/dev/acpica/compiler/aslload.c
index 19864533267..c90d58a9fc0 100644
--- a/sys/contrib/dev/acpica/compiler/aslload.c
+++ b/sys/contrib/dev/acpica/compiler/aslload.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asllookup.c b/sys/contrib/dev/acpica/compiler/asllookup.c
index 8748fc86c88..cc57a83bff4 100644
--- a/sys/contrib/dev/acpica/compiler/asllookup.c
+++ b/sys/contrib/dev/acpica/compiler/asllookup.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmain.c b/sys/contrib/dev/acpica/compiler/aslmain.c
index 3b939f5fff1..ebc050beed1 100644
--- a/sys/contrib/dev/acpica/compiler/aslmain.c
+++ b/sys/contrib/dev/acpica/compiler/aslmain.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmap.c b/sys/contrib/dev/acpica/compiler/aslmap.c
index 5d41acb1698..30cb8219fdd 100644
--- a/sys/contrib/dev/acpica/compiler/aslmap.c
+++ b/sys/contrib/dev/acpica/compiler/aslmap.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmapenter.c b/sys/contrib/dev/acpica/compiler/aslmapenter.c
index 8476654e40a..babaddc0bcd 100644
--- a/sys/contrib/dev/acpica/compiler/aslmapenter.c
+++ b/sys/contrib/dev/acpica/compiler/aslmapenter.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmapoutput.c b/sys/contrib/dev/acpica/compiler/aslmapoutput.c
index 58a89f85291..227d950cba7 100644
--- a/sys/contrib/dev/acpica/compiler/aslmapoutput.c
+++ b/sys/contrib/dev/acpica/compiler/aslmapoutput.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmaputils.c b/sys/contrib/dev/acpica/compiler/aslmaputils.c
index 37333041203..70d0fe1be8f 100644
--- a/sys/contrib/dev/acpica/compiler/aslmaputils.c
+++ b/sys/contrib/dev/acpica/compiler/aslmaputils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmessages.c b/sys/contrib/dev/acpica/compiler/aslmessages.c
index 1ced6547951..1822228a1c6 100644
--- a/sys/contrib/dev/acpica/compiler/aslmessages.c
+++ b/sys/contrib/dev/acpica/compiler/aslmessages.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmessages.h b/sys/contrib/dev/acpica/compiler/aslmessages.h
index a80184016ce..77c6759ef0f 100644
--- a/sys/contrib/dev/acpica/compiler/aslmessages.h
+++ b/sys/contrib/dev/acpica/compiler/aslmessages.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslmethod.c b/sys/contrib/dev/acpica/compiler/aslmethod.c
index ca48bc82133..b2741fd2bf1 100644
--- a/sys/contrib/dev/acpica/compiler/aslmethod.c
+++ b/sys/contrib/dev/acpica/compiler/aslmethod.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslnamesp.c b/sys/contrib/dev/acpica/compiler/aslnamesp.c
index d59a11f678f..aa5aa1f5c2b 100644
--- a/sys/contrib/dev/acpica/compiler/aslnamesp.c
+++ b/sys/contrib/dev/acpica/compiler/aslnamesp.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asloffset.c b/sys/contrib/dev/acpica/compiler/asloffset.c
index 2288017ec36..a216a160ed4 100644
--- a/sys/contrib/dev/acpica/compiler/asloffset.c
+++ b/sys/contrib/dev/acpica/compiler/asloffset.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslopcodes.c b/sys/contrib/dev/acpica/compiler/aslopcodes.c
index 30b5e24f5cc..6c9878fa56b 100644
--- a/sys/contrib/dev/acpica/compiler/aslopcodes.c
+++ b/sys/contrib/dev/acpica/compiler/aslopcodes.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asloperands.c b/sys/contrib/dev/acpica/compiler/asloperands.c
index c6e001fe49b..f3ab5a7636f 100644
--- a/sys/contrib/dev/acpica/compiler/asloperands.c
+++ b/sys/contrib/dev/acpica/compiler/asloperands.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslopt.c b/sys/contrib/dev/acpica/compiler/aslopt.c
index 6aaa386a59d..ee2c820ddce 100644
--- a/sys/contrib/dev/acpica/compiler/aslopt.c
+++ b/sys/contrib/dev/acpica/compiler/aslopt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asloptions.c b/sys/contrib/dev/acpica/compiler/asloptions.c
index d792b735333..86a3e9c90a2 100644
--- a/sys/contrib/dev/acpica/compiler/asloptions.c
+++ b/sys/contrib/dev/acpica/compiler/asloptions.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslparseop.c b/sys/contrib/dev/acpica/compiler/aslparseop.c
index f121401a92a..1dee716499c 100644
--- a/sys/contrib/dev/acpica/compiler/aslparseop.c
+++ b/sys/contrib/dev/acpica/compiler/aslparseop.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslparser.y b/sys/contrib/dev/acpica/compiler/aslparser.y
index 3ad50ab4b86..1f72e9fd5a7 100644
--- a/sys/contrib/dev/acpica/compiler/aslparser.y
+++ b/sys/contrib/dev/acpica/compiler/aslparser.y
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslpld.c b/sys/contrib/dev/acpica/compiler/aslpld.c
index d0c8808bcb8..05543bd6672 100644
--- a/sys/contrib/dev/acpica/compiler/aslpld.c
+++ b/sys/contrib/dev/acpica/compiler/aslpld.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslpredef.c b/sys/contrib/dev/acpica/compiler/aslpredef.c
index ba436ff2b98..28f2bb3215d 100644
--- a/sys/contrib/dev/acpica/compiler/aslpredef.c
+++ b/sys/contrib/dev/acpica/compiler/aslpredef.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslprepkg.c b/sys/contrib/dev/acpica/compiler/aslprepkg.c
index 3c03750eeba..aaec127fcb9 100644
--- a/sys/contrib/dev/acpica/compiler/aslprepkg.c
+++ b/sys/contrib/dev/acpica/compiler/aslprepkg.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslprimaries.y b/sys/contrib/dev/acpica/compiler/aslprimaries.y
index 3c8ced1ef69..b131f2a97fe 100644
--- a/sys/contrib/dev/acpica/compiler/aslprimaries.y
+++ b/sys/contrib/dev/acpica/compiler/aslprimaries.y
@@ -11,7 +11,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslprintf.c b/sys/contrib/dev/acpica/compiler/aslprintf.c
index 00e218d05df..a45620e4856 100644
--- a/sys/contrib/dev/acpica/compiler/aslprintf.c
+++ b/sys/contrib/dev/acpica/compiler/aslprintf.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslprune.c b/sys/contrib/dev/acpica/compiler/aslprune.c
index 421969fc6fa..92d182a90bc 100644
--- a/sys/contrib/dev/acpica/compiler/aslprune.c
+++ b/sys/contrib/dev/acpica/compiler/aslprune.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslresource.c b/sys/contrib/dev/acpica/compiler/aslresource.c
index 32a7652fe05..718abcd9336 100644
--- a/sys/contrib/dev/acpica/compiler/aslresource.c
+++ b/sys/contrib/dev/acpica/compiler/aslresource.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslresources.y b/sys/contrib/dev/acpica/compiler/aslresources.y
index 5b73ed87221..b328482f6b7 100644
--- a/sys/contrib/dev/acpica/compiler/aslresources.y
+++ b/sys/contrib/dev/acpica/compiler/aslresources.y
@@ -11,7 +11,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype1.c b/sys/contrib/dev/acpica/compiler/aslrestype1.c
index 5b528f49db7..052b267c715 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype1.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype1.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype1i.c b/sys/contrib/dev/acpica/compiler/aslrestype1i.c
index bfbea2d5df0..6d36c43f381 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype1i.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype1i.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2.c b/sys/contrib/dev/acpica/compiler/aslrestype2.c
index bbbd6b1fb86..dd0df587168 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2d.c b/sys/contrib/dev/acpica/compiler/aslrestype2d.c
index b310a170927..bd62e99fc2d 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2d.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2d.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2e.c b/sys/contrib/dev/acpica/compiler/aslrestype2e.c
index ca8f38c6531..06c29e14365 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2e.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2e.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2q.c b/sys/contrib/dev/acpica/compiler/aslrestype2q.c
index e237e9ff780..a2858afb540 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2q.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2q.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2s.c b/sys/contrib/dev/acpica/compiler/aslrestype2s.c
index ec1a446c072..b7779d8f617 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2s.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2s.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrestype2w.c b/sys/contrib/dev/acpica/compiler/aslrestype2w.c
index 33b1792ee21..88a226a1966 100644
--- a/sys/contrib/dev/acpica/compiler/aslrestype2w.c
+++ b/sys/contrib/dev/acpica/compiler/aslrestype2w.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslrules.y b/sys/contrib/dev/acpica/compiler/aslrules.y
index 3b8e4839892..76c791510b7 100644
--- a/sys/contrib/dev/acpica/compiler/aslrules.y
+++ b/sys/contrib/dev/acpica/compiler/aslrules.y
@@ -11,7 +11,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslstartup.c b/sys/contrib/dev/acpica/compiler/aslstartup.c
index 6a283f00d15..ae3335be083 100644
--- a/sys/contrib/dev/acpica/compiler/aslstartup.c
+++ b/sys/contrib/dev/acpica/compiler/aslstartup.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslstubs.c b/sys/contrib/dev/acpica/compiler/aslstubs.c
index aef085dd634..d9090eabd6e 100644
--- a/sys/contrib/dev/acpica/compiler/aslstubs.c
+++ b/sys/contrib/dev/acpica/compiler/aslstubs.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslsupport.l b/sys/contrib/dev/acpica/compiler/aslsupport.l
index db243e4a87c..406f2d5471f 100644
--- a/sys/contrib/dev/acpica/compiler/aslsupport.l
+++ b/sys/contrib/dev/acpica/compiler/aslsupport.l
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslsupport.y b/sys/contrib/dev/acpica/compiler/aslsupport.y
index bcced923e9d..2e1a978f440 100644
--- a/sys/contrib/dev/acpica/compiler/aslsupport.y
+++ b/sys/contrib/dev/acpica/compiler/aslsupport.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asltokens.y b/sys/contrib/dev/acpica/compiler/asltokens.y
index 38c55c186bb..ee2e25c0e42 100644
--- a/sys/contrib/dev/acpica/compiler/asltokens.y
+++ b/sys/contrib/dev/acpica/compiler/asltokens.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asltransform.c b/sys/contrib/dev/acpica/compiler/asltransform.c
index 3b7a6916c18..ce616668d9e 100644
--- a/sys/contrib/dev/acpica/compiler/asltransform.c
+++ b/sys/contrib/dev/acpica/compiler/asltransform.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asltree.c b/sys/contrib/dev/acpica/compiler/asltree.c
index 6dc91fb7643..e38541065ea 100644
--- a/sys/contrib/dev/acpica/compiler/asltree.c
+++ b/sys/contrib/dev/acpica/compiler/asltree.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asltypes.h b/sys/contrib/dev/acpica/compiler/asltypes.h
index f72226d5e0c..645d00c1188 100644
--- a/sys/contrib/dev/acpica/compiler/asltypes.h
+++ b/sys/contrib/dev/acpica/compiler/asltypes.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asltypes.y b/sys/contrib/dev/acpica/compiler/asltypes.y
index 6886a0dc40d..361d476ffd7 100644
--- a/sys/contrib/dev/acpica/compiler/asltypes.y
+++ b/sys/contrib/dev/acpica/compiler/asltypes.y
@@ -9,7 +9,7 @@ NoEcho('
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslutils.c b/sys/contrib/dev/acpica/compiler/aslutils.c
index a439db7476a..5829e137c85 100644
--- a/sys/contrib/dev/acpica/compiler/aslutils.c
+++ b/sys/contrib/dev/acpica/compiler/aslutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/asluuid.c b/sys/contrib/dev/acpica/compiler/asluuid.c
index 1e75bc0b783..6a9f374db2b 100644
--- a/sys/contrib/dev/acpica/compiler/asluuid.c
+++ b/sys/contrib/dev/acpica/compiler/asluuid.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslwalks.c b/sys/contrib/dev/acpica/compiler/aslwalks.c
index 04a2656cfa1..127d29b115b 100644
--- a/sys/contrib/dev/acpica/compiler/aslwalks.c
+++ b/sys/contrib/dev/acpica/compiler/aslwalks.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslxref.c b/sys/contrib/dev/acpica/compiler/aslxref.c
index 4c4dcc258d7..21acaa63ae4 100644
--- a/sys/contrib/dev/acpica/compiler/aslxref.c
+++ b/sys/contrib/dev/acpica/compiler/aslxref.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/aslxrefout.c b/sys/contrib/dev/acpica/compiler/aslxrefout.c
index d06f58452ba..952ea25b8cd 100644
--- a/sys/contrib/dev/acpica/compiler/aslxrefout.c
+++ b/sys/contrib/dev/acpica/compiler/aslxrefout.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/cvcompiler.c b/sys/contrib/dev/acpica/compiler/cvcompiler.c
index 534560a2577..cadbaec97e2 100644
--- a/sys/contrib/dev/acpica/compiler/cvcompiler.c
+++ b/sys/contrib/dev/acpica/compiler/cvcompiler.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/cvdisasm.c b/sys/contrib/dev/acpica/compiler/cvdisasm.c
index 93ad510be37..66cc5e2e7c6 100644
--- a/sys/contrib/dev/acpica/compiler/cvdisasm.c
+++ b/sys/contrib/dev/acpica/compiler/cvdisasm.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/cvparser.c b/sys/contrib/dev/acpica/compiler/cvparser.c
index 0e4dca3eeef..8ddfe5febec 100644
--- a/sys/contrib/dev/acpica/compiler/cvparser.c
+++ b/sys/contrib/dev/acpica/compiler/cvparser.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtcompile.c b/sys/contrib/dev/acpica/compiler/dtcompile.c
index bd4afd04584..83f8f40d57b 100644
--- a/sys/contrib/dev/acpica/compiler/dtcompile.c
+++ b/sys/contrib/dev/acpica/compiler/dtcompile.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtcompiler.h b/sys/contrib/dev/acpica/compiler/dtcompiler.h
index 244784da83a..cdadefc4922 100644
--- a/sys/contrib/dev/acpica/compiler/dtcompiler.h
+++ b/sys/contrib/dev/acpica/compiler/dtcompiler.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtexpress.c b/sys/contrib/dev/acpica/compiler/dtexpress.c
index 68211c03def..b691b831051 100644
--- a/sys/contrib/dev/acpica/compiler/dtexpress.c
+++ b/sys/contrib/dev/acpica/compiler/dtexpress.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtfield.c b/sys/contrib/dev/acpica/compiler/dtfield.c
index 96c3ea9b5bf..ed0d59046fe 100644
--- a/sys/contrib/dev/acpica/compiler/dtfield.c
+++ b/sys/contrib/dev/acpica/compiler/dtfield.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtio.c b/sys/contrib/dev/acpica/compiler/dtio.c
index 3b081a02dd1..d28a97f70bf 100644
--- a/sys/contrib/dev/acpica/compiler/dtio.c
+++ b/sys/contrib/dev/acpica/compiler/dtio.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtparser.l b/sys/contrib/dev/acpica/compiler/dtparser.l
index e8c481504f9..ad1a345a844 100644
--- a/sys/contrib/dev/acpica/compiler/dtparser.l
+++ b/sys/contrib/dev/acpica/compiler/dtparser.l
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtparser.y b/sys/contrib/dev/acpica/compiler/dtparser.y
index 38bc9692252..d50e389c749 100644
--- a/sys/contrib/dev/acpica/compiler/dtparser.y
+++ b/sys/contrib/dev/acpica/compiler/dtparser.y
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtsubtable.c b/sys/contrib/dev/acpica/compiler/dtsubtable.c
index a258a61eb5c..ff10ed3f1f4 100644
--- a/sys/contrib/dev/acpica/compiler/dtsubtable.c
+++ b/sys/contrib/dev/acpica/compiler/dtsubtable.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dttable.c b/sys/contrib/dev/acpica/compiler/dttable.c
index 7c3e9db9e06..b5ec2fbb9b3 100644
--- a/sys/contrib/dev/acpica/compiler/dttable.c
+++ b/sys/contrib/dev/acpica/compiler/dttable.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dttable1.c b/sys/contrib/dev/acpica/compiler/dttable1.c
index 4f31e61239a..b1b4a3cea25 100644
--- a/sys/contrib/dev/acpica/compiler/dttable1.c
+++ b/sys/contrib/dev/acpica/compiler/dttable1.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dttable2.c b/sys/contrib/dev/acpica/compiler/dttable2.c
index 73f543ef4af..33c08f49466 100644
--- a/sys/contrib/dev/acpica/compiler/dttable2.c
+++ b/sys/contrib/dev/acpica/compiler/dttable2.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dttemplate.c b/sys/contrib/dev/acpica/compiler/dttemplate.c
index 309386c5493..83546968f8c 100644
--- a/sys/contrib/dev/acpica/compiler/dttemplate.c
+++ b/sys/contrib/dev/acpica/compiler/dttemplate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dttemplate.h b/sys/contrib/dev/acpica/compiler/dttemplate.h
index 4c77afc16fd..39e57ccf09b 100644
--- a/sys/contrib/dev/acpica/compiler/dttemplate.h
+++ b/sys/contrib/dev/acpica/compiler/dttemplate.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/dtutils.c b/sys/contrib/dev/acpica/compiler/dtutils.c
index 54832f7b24b..3a1580bb058 100644
--- a/sys/contrib/dev/acpica/compiler/dtutils.c
+++ b/sys/contrib/dev/acpica/compiler/dtutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/preprocess.h b/sys/contrib/dev/acpica/compiler/preprocess.h
index f64db0d06ca..446fdaf4e2f 100644
--- a/sys/contrib/dev/acpica/compiler/preprocess.h
+++ b/sys/contrib/dev/acpica/compiler/preprocess.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prexpress.c b/sys/contrib/dev/acpica/compiler/prexpress.c
index df2fc46cdea..e19ec773b94 100644
--- a/sys/contrib/dev/acpica/compiler/prexpress.c
+++ b/sys/contrib/dev/acpica/compiler/prexpress.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prmacros.c b/sys/contrib/dev/acpica/compiler/prmacros.c
index e1aaa3bceca..cbe794af2f8 100644
--- a/sys/contrib/dev/acpica/compiler/prmacros.c
+++ b/sys/contrib/dev/acpica/compiler/prmacros.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prparser.l b/sys/contrib/dev/acpica/compiler/prparser.l
index 12c66c70f68..4d399464a95 100644
--- a/sys/contrib/dev/acpica/compiler/prparser.l
+++ b/sys/contrib/dev/acpica/compiler/prparser.l
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prparser.y b/sys/contrib/dev/acpica/compiler/prparser.y
index ec9c0c58d80..efbeac6a699 100644
--- a/sys/contrib/dev/acpica/compiler/prparser.y
+++ b/sys/contrib/dev/acpica/compiler/prparser.y
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prscan.c b/sys/contrib/dev/acpica/compiler/prscan.c
index d4ee768a611..e4df4b750e8 100644
--- a/sys/contrib/dev/acpica/compiler/prscan.c
+++ b/sys/contrib/dev/acpica/compiler/prscan.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/compiler/prutils.c b/sys/contrib/dev/acpica/compiler/prutils.c
index 3d7e5fe7fc8..23f6a69cd4b 100644
--- a/sys/contrib/dev/acpica/compiler/prutils.c
+++ b/sys/contrib/dev/acpica/compiler/prutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbcmds.c b/sys/contrib/dev/acpica/components/debugger/dbcmds.c
index 641e547638f..37b71ac523f 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbcmds.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbcmds.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbconvert.c b/sys/contrib/dev/acpica/components/debugger/dbconvert.c
index 9551f4f4bdd..24fb5799326 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbconvert.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbconvert.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbdisply.c b/sys/contrib/dev/acpica/components/debugger/dbdisply.c
index ab55280d5b4..a7baeb2a3d7 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbdisply.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbdisply.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbexec.c b/sys/contrib/dev/acpica/components/debugger/dbexec.c
index d6abb9a0026..8369ea2f596 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbexec.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbexec.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbfileio.c b/sys/contrib/dev/acpica/components/debugger/dbfileio.c
index ac551158909..67787c72357 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbfileio.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbfileio.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbhistry.c b/sys/contrib/dev/acpica/components/debugger/dbhistry.c
index 17d9f39f59c..e3f6a0ac188 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbhistry.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbhistry.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbinput.c b/sys/contrib/dev/acpica/components/debugger/dbinput.c
index 222f7cebf0b..81303f0322e 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbinput.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbinput.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbmethod.c b/sys/contrib/dev/acpica/components/debugger/dbmethod.c
index 5d9ab21b7b0..a278031ab77 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbmethod.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbmethod.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbnames.c b/sys/contrib/dev/acpica/components/debugger/dbnames.c
index 705d6806dfa..3cdf0927b25 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbnames.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbnames.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbobject.c b/sys/contrib/dev/acpica/components/debugger/dbobject.c
index 20508fce840..537a6276de7 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbobject.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbobject.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbstats.c b/sys/contrib/dev/acpica/components/debugger/dbstats.c
index 295dde4f0c5..4107f6117cf 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbstats.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbstats.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbtest.c b/sys/contrib/dev/acpica/components/debugger/dbtest.c
index ae45fc5772a..6d17bb25d91 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbtest.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbtest.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbutils.c b/sys/contrib/dev/acpica/components/debugger/dbutils.c
index 1fb366a7d6a..b556aac16b3 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbutils.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/debugger/dbxface.c b/sys/contrib/dev/acpica/components/debugger/dbxface.c
index aa48803c223..907f7c33c5f 100644
--- a/sys/contrib/dev/acpica/components/debugger/dbxface.c
+++ b/sys/contrib/dev/acpica/components/debugger/dbxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmbuffer.c b/sys/contrib/dev/acpica/components/disassembler/dmbuffer.c
index 984087ac680..280ac1f894a 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmbuffer.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmbuffer.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmcstyle.c b/sys/contrib/dev/acpica/components/disassembler/dmcstyle.c
index 1043c04eda2..9e3fec8c925 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmcstyle.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmcstyle.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmdeferred.c b/sys/contrib/dev/acpica/components/disassembler/dmdeferred.c
index 8e22ddcdefd..04ba69ecfa1 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmdeferred.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmdeferred.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmnames.c b/sys/contrib/dev/acpica/components/disassembler/dmnames.c
index 44768e654de..a8cb5141fe8 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmnames.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmnames.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmopcode.c b/sys/contrib/dev/acpica/components/disassembler/dmopcode.c
index 3cec7e88ed0..31fd4958b37 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmopcode.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmopcode.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmresrc.c b/sys/contrib/dev/acpica/components/disassembler/dmresrc.c
index 461560957f4..5e75284f0e8 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmresrc.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmresrc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmresrcl.c b/sys/contrib/dev/acpica/components/disassembler/dmresrcl.c
index ad97f743de6..01d0576f792 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmresrcl.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmresrcl.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmresrcl2.c b/sys/contrib/dev/acpica/components/disassembler/dmresrcl2.c
index e2cbdaed879..cca0cc5fc10 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmresrcl2.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmresrcl2.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmresrcs.c b/sys/contrib/dev/acpica/components/disassembler/dmresrcs.c
index 5b8e97edc7a..ca599a2096d 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmresrcs.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmresrcs.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmutils.c b/sys/contrib/dev/acpica/components/disassembler/dmutils.c
index 35284d74d9f..8b235f7b421 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmutils.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/disassembler/dmwalk.c b/sys/contrib/dev/acpica/components/disassembler/dmwalk.c
index f60a8a4b845..ce6369467ac 100644
--- a/sys/contrib/dev/acpica/components/disassembler/dmwalk.c
+++ b/sys/contrib/dev/acpica/components/disassembler/dmwalk.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsargs.c b/sys/contrib/dev/acpica/components/dispatcher/dsargs.c
index c930337d63d..43850736b87 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsargs.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsargs.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dscontrol.c b/sys/contrib/dev/acpica/components/dispatcher/dscontrol.c
index b719a67dd95..7f8dbbc30d0 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dscontrol.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dscontrol.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsdebug.c b/sys/contrib/dev/acpica/components/dispatcher/dsdebug.c
index 1e99b661cce..d45305495c1 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsdebug.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsdebug.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsfield.c b/sys/contrib/dev/acpica/components/dispatcher/dsfield.c
index 566a39613a0..59455504b0f 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsfield.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsfield.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsinit.c b/sys/contrib/dev/acpica/components/dispatcher/dsinit.c
index 33f6cddc8cc..1926521df79 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsinit.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsinit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c b/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c
index 53ba644811b..3b422fb8951 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsmthdat.c b/sys/contrib/dev/acpica/components/dispatcher/dsmthdat.c
index ad4d1c4b560..8bae706f2f4 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsmthdat.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsmthdat.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsobject.c b/sys/contrib/dev/acpica/components/dispatcher/dsobject.c
index 0e8dc7262cf..b76ace849ed 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsobject.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsobject.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsopcode.c b/sys/contrib/dev/acpica/components/dispatcher/dsopcode.c
index 58007626d83..d91e54d8a98 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsopcode.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsopcode.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c b/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c
index 6b427324429..c11726c11ef 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsutils.c b/sys/contrib/dev/acpica/components/dispatcher/dsutils.c
index abd55de0c6c..10b44c4c854 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dsutils.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dsutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dswexec.c b/sys/contrib/dev/acpica/components/dispatcher/dswexec.c
index 5b165e0afd9..b9ca837d5d8 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dswexec.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dswexec.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dswload.c b/sys/contrib/dev/acpica/components/dispatcher/dswload.c
index 60a4e301822..4cb6e058c0e 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dswload.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dswload.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dswload2.c b/sys/contrib/dev/acpica/components/dispatcher/dswload2.c
index cd691da7488..455ea0b853c 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dswload2.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dswload2.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dswscope.c b/sys/contrib/dev/acpica/components/dispatcher/dswscope.c
index 678f76054d4..494e6867c01 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dswscope.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dswscope.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/dispatcher/dswstate.c b/sys/contrib/dev/acpica/components/dispatcher/dswstate.c
index 331f0314c85..1f71dc0dfb4 100644
--- a/sys/contrib/dev/acpica/components/dispatcher/dswstate.c
+++ b/sys/contrib/dev/acpica/components/dispatcher/dswstate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evevent.c b/sys/contrib/dev/acpica/components/events/evevent.c
index 350be6a70ad..da594716359 100644
--- a/sys/contrib/dev/acpica/components/events/evevent.c
+++ b/sys/contrib/dev/acpica/components/events/evevent.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evglock.c b/sys/contrib/dev/acpica/components/events/evglock.c
index 1c97e0d21cc..89628840408 100644
--- a/sys/contrib/dev/acpica/components/events/evglock.c
+++ b/sys/contrib/dev/acpica/components/events/evglock.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evgpe.c b/sys/contrib/dev/acpica/components/events/evgpe.c
index 4bbe9ad5e51..23d1f4a1cd5 100644
--- a/sys/contrib/dev/acpica/components/events/evgpe.c
+++ b/sys/contrib/dev/acpica/components/events/evgpe.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evgpeblk.c b/sys/contrib/dev/acpica/components/events/evgpeblk.c
index 35d749b6b07..179f03eaa0c 100644
--- a/sys/contrib/dev/acpica/components/events/evgpeblk.c
+++ b/sys/contrib/dev/acpica/components/events/evgpeblk.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evgpeinit.c b/sys/contrib/dev/acpica/components/events/evgpeinit.c
index f5e90ca457b..4f80a909cf6 100644
--- a/sys/contrib/dev/acpica/components/events/evgpeinit.c
+++ b/sys/contrib/dev/acpica/components/events/evgpeinit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evgpeutil.c b/sys/contrib/dev/acpica/components/events/evgpeutil.c
index a65b9a41f8c..70402361ece 100644
--- a/sys/contrib/dev/acpica/components/events/evgpeutil.c
+++ b/sys/contrib/dev/acpica/components/events/evgpeutil.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evhandler.c b/sys/contrib/dev/acpica/components/events/evhandler.c
index 91f690cc877..d35f93df574 100644
--- a/sys/contrib/dev/acpica/components/events/evhandler.c
+++ b/sys/contrib/dev/acpica/components/events/evhandler.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evmisc.c b/sys/contrib/dev/acpica/components/events/evmisc.c
index 9c7df79aad9..8df778498ec 100644
--- a/sys/contrib/dev/acpica/components/events/evmisc.c
+++ b/sys/contrib/dev/acpica/components/events/evmisc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evregion.c b/sys/contrib/dev/acpica/components/events/evregion.c
index 7cdd634217d..7f5616c46c8 100644
--- a/sys/contrib/dev/acpica/components/events/evregion.c
+++ b/sys/contrib/dev/acpica/components/events/evregion.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evrgnini.c b/sys/contrib/dev/acpica/components/events/evrgnini.c
index 18f7f9e214a..659093c8bc6 100644
--- a/sys/contrib/dev/acpica/components/events/evrgnini.c
+++ b/sys/contrib/dev/acpica/components/events/evrgnini.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evsci.c b/sys/contrib/dev/acpica/components/events/evsci.c
index 22ec1ae21fb..25fac09c3d6 100644
--- a/sys/contrib/dev/acpica/components/events/evsci.c
+++ b/sys/contrib/dev/acpica/components/events/evsci.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evxface.c b/sys/contrib/dev/acpica/components/events/evxface.c
index 5fb7e5c0cec..56d404035d3 100644
--- a/sys/contrib/dev/acpica/components/events/evxface.c
+++ b/sys/contrib/dev/acpica/components/events/evxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evxfevnt.c b/sys/contrib/dev/acpica/components/events/evxfevnt.c
index 0feb9e9dae0..16f1d7fdc4c 100644
--- a/sys/contrib/dev/acpica/components/events/evxfevnt.c
+++ b/sys/contrib/dev/acpica/components/events/evxfevnt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evxfgpe.c b/sys/contrib/dev/acpica/components/events/evxfgpe.c
index 6d559768545..6a667bbc161 100644
--- a/sys/contrib/dev/acpica/components/events/evxfgpe.c
+++ b/sys/contrib/dev/acpica/components/events/evxfgpe.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/events/evxfregn.c b/sys/contrib/dev/acpica/components/events/evxfregn.c
index cc57642cf8b..f6155741e2b 100644
--- a/sys/contrib/dev/acpica/components/events/evxfregn.c
+++ b/sys/contrib/dev/acpica/components/events/evxfregn.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exconcat.c b/sys/contrib/dev/acpica/components/executer/exconcat.c
index 829a9872197..c10cd781059 100644
--- a/sys/contrib/dev/acpica/components/executer/exconcat.c
+++ b/sys/contrib/dev/acpica/components/executer/exconcat.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exconfig.c b/sys/contrib/dev/acpica/components/executer/exconfig.c
index 0af04c582b8..dcfdb319b94 100644
--- a/sys/contrib/dev/acpica/components/executer/exconfig.c
+++ b/sys/contrib/dev/acpica/components/executer/exconfig.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exconvrt.c b/sys/contrib/dev/acpica/components/executer/exconvrt.c
index d084e117ef5..7955a1a6cb3 100644
--- a/sys/contrib/dev/acpica/components/executer/exconvrt.c
+++ b/sys/contrib/dev/acpica/components/executer/exconvrt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/excreate.c b/sys/contrib/dev/acpica/components/executer/excreate.c
index 7f2deb1ac5e..8bfb339af28 100644
--- a/sys/contrib/dev/acpica/components/executer/excreate.c
+++ b/sys/contrib/dev/acpica/components/executer/excreate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exdebug.c b/sys/contrib/dev/acpica/components/executer/exdebug.c
index d4187d1abff..9e1039f4752 100644
--- a/sys/contrib/dev/acpica/components/executer/exdebug.c
+++ b/sys/contrib/dev/acpica/components/executer/exdebug.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exdump.c b/sys/contrib/dev/acpica/components/executer/exdump.c
index 5d600e11a63..27af15c0a30 100644
--- a/sys/contrib/dev/acpica/components/executer/exdump.c
+++ b/sys/contrib/dev/acpica/components/executer/exdump.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exfield.c b/sys/contrib/dev/acpica/components/executer/exfield.c
index 0b43d74b7b1..e2eb9f7bc33 100644
--- a/sys/contrib/dev/acpica/components/executer/exfield.c
+++ b/sys/contrib/dev/acpica/components/executer/exfield.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exfldio.c b/sys/contrib/dev/acpica/components/executer/exfldio.c
index 466fa3181a1..847ab968f11 100644
--- a/sys/contrib/dev/acpica/components/executer/exfldio.c
+++ b/sys/contrib/dev/acpica/components/executer/exfldio.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exmisc.c b/sys/contrib/dev/acpica/components/executer/exmisc.c
index f4683ae3308..c9382071b80 100644
--- a/sys/contrib/dev/acpica/components/executer/exmisc.c
+++ b/sys/contrib/dev/acpica/components/executer/exmisc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exmutex.c b/sys/contrib/dev/acpica/components/executer/exmutex.c
index 9a945b6a958..5ad8829962a 100644
--- a/sys/contrib/dev/acpica/components/executer/exmutex.c
+++ b/sys/contrib/dev/acpica/components/executer/exmutex.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exnames.c b/sys/contrib/dev/acpica/components/executer/exnames.c
index 29415dba345..63e4bb18771 100644
--- a/sys/contrib/dev/acpica/components/executer/exnames.c
+++ b/sys/contrib/dev/acpica/components/executer/exnames.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exoparg1.c b/sys/contrib/dev/acpica/components/executer/exoparg1.c
index ccd80135402..605a08bde6f 100644
--- a/sys/contrib/dev/acpica/components/executer/exoparg1.c
+++ b/sys/contrib/dev/acpica/components/executer/exoparg1.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exoparg2.c b/sys/contrib/dev/acpica/components/executer/exoparg2.c
index 834becdf9c4..111d5d96cfb 100644
--- a/sys/contrib/dev/acpica/components/executer/exoparg2.c
+++ b/sys/contrib/dev/acpica/components/executer/exoparg2.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exoparg3.c b/sys/contrib/dev/acpica/components/executer/exoparg3.c
index 1172fdbd8aa..3157ffecb3b 100644
--- a/sys/contrib/dev/acpica/components/executer/exoparg3.c
+++ b/sys/contrib/dev/acpica/components/executer/exoparg3.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exoparg6.c b/sys/contrib/dev/acpica/components/executer/exoparg6.c
index d2b179993e8..4ffa7159678 100644
--- a/sys/contrib/dev/acpica/components/executer/exoparg6.c
+++ b/sys/contrib/dev/acpica/components/executer/exoparg6.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exprep.c b/sys/contrib/dev/acpica/components/executer/exprep.c
index 8e325facf02..287e2744e88 100644
--- a/sys/contrib/dev/acpica/components/executer/exprep.c
+++ b/sys/contrib/dev/acpica/components/executer/exprep.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exregion.c b/sys/contrib/dev/acpica/components/executer/exregion.c
index 601db3cf43d..c2cfa534a7e 100644
--- a/sys/contrib/dev/acpica/components/executer/exregion.c
+++ b/sys/contrib/dev/acpica/components/executer/exregion.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exresnte.c b/sys/contrib/dev/acpica/components/executer/exresnte.c
index 6c885680d71..c231f09373a 100644
--- a/sys/contrib/dev/acpica/components/executer/exresnte.c
+++ b/sys/contrib/dev/acpica/components/executer/exresnte.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exresolv.c b/sys/contrib/dev/acpica/components/executer/exresolv.c
index a04479639a7..c204b0e0c34 100644
--- a/sys/contrib/dev/acpica/components/executer/exresolv.c
+++ b/sys/contrib/dev/acpica/components/executer/exresolv.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exresop.c b/sys/contrib/dev/acpica/components/executer/exresop.c
index cb820c7638a..2706af6ec0f 100644
--- a/sys/contrib/dev/acpica/components/executer/exresop.c
+++ b/sys/contrib/dev/acpica/components/executer/exresop.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exstore.c b/sys/contrib/dev/acpica/components/executer/exstore.c
index 2149dcb65d3..d1f7ce2a2d0 100644
--- a/sys/contrib/dev/acpica/components/executer/exstore.c
+++ b/sys/contrib/dev/acpica/components/executer/exstore.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exstoren.c b/sys/contrib/dev/acpica/components/executer/exstoren.c
index 8c3be792d46..9ce8645d260 100644
--- a/sys/contrib/dev/acpica/components/executer/exstoren.c
+++ b/sys/contrib/dev/acpica/components/executer/exstoren.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exstorob.c b/sys/contrib/dev/acpica/components/executer/exstorob.c
index f030108b51e..81b62fc05c0 100644
--- a/sys/contrib/dev/acpica/components/executer/exstorob.c
+++ b/sys/contrib/dev/acpica/components/executer/exstorob.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exsystem.c b/sys/contrib/dev/acpica/components/executer/exsystem.c
index da694953a34..495e1ef0b5e 100644
--- a/sys/contrib/dev/acpica/components/executer/exsystem.c
+++ b/sys/contrib/dev/acpica/components/executer/exsystem.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/extrace.c b/sys/contrib/dev/acpica/components/executer/extrace.c
index b12d8b4b164..5ab7de2bd1f 100644
--- a/sys/contrib/dev/acpica/components/executer/extrace.c
+++ b/sys/contrib/dev/acpica/components/executer/extrace.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/executer/exutils.c b/sys/contrib/dev/acpica/components/executer/exutils.c
index 1ea86d71e11..4c8f163577c 100644
--- a/sys/contrib/dev/acpica/components/executer/exutils.c
+++ b/sys/contrib/dev/acpica/components/executer/exutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwacpi.c b/sys/contrib/dev/acpica/components/hardware/hwacpi.c
index b6e519f5e6f..31428144296 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwacpi.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwacpi.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwesleep.c b/sys/contrib/dev/acpica/components/hardware/hwesleep.c
index 500da7a8197..98391d79588 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwesleep.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwesleep.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwgpe.c b/sys/contrib/dev/acpica/components/hardware/hwgpe.c
index 680a4a9b8cc..93dc475fbf2 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwgpe.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwgpe.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwpci.c b/sys/contrib/dev/acpica/components/hardware/hwpci.c
index 3be3c1c2028..176f774828b 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwpci.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwpci.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwregs.c b/sys/contrib/dev/acpica/components/hardware/hwregs.c
index 854bb8f37be..6f8ebe60b4e 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwregs.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwregs.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwsleep.c b/sys/contrib/dev/acpica/components/hardware/hwsleep.c
index 1d826577e58..9a34484be4d 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwsleep.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwsleep.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwtimer.c b/sys/contrib/dev/acpica/components/hardware/hwtimer.c
index 22a4a974987..c8fc6fef074 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwtimer.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwtimer.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwvalid.c b/sys/contrib/dev/acpica/components/hardware/hwvalid.c
index 61cd0e3fa5c..cb81d1cb208 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwvalid.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwvalid.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwxface.c b/sys/contrib/dev/acpica/components/hardware/hwxface.c
index 78c2af5138e..f94e95e93bb 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwxface.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/hardware/hwxfsleep.c b/sys/contrib/dev/acpica/components/hardware/hwxfsleep.c
index f9e8c8bed57..0d057f38d44 100644
--- a/sys/contrib/dev/acpica/components/hardware/hwxfsleep.c
+++ b/sys/contrib/dev/acpica/components/hardware/hwxfsleep.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsaccess.c b/sys/contrib/dev/acpica/components/namespace/nsaccess.c
index 28c32489de2..8027b69beaf 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsaccess.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsaccess.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsalloc.c b/sys/contrib/dev/acpica/components/namespace/nsalloc.c
index 1ddc084edfc..91cf416a1ed 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsalloc.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsalloc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsarguments.c b/sys/contrib/dev/acpica/components/namespace/nsarguments.c
index b743e5d94ed..827436bd0ca 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsarguments.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsarguments.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsconvert.c b/sys/contrib/dev/acpica/components/namespace/nsconvert.c
index 1f8b8740104..b96e8809590 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsconvert.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsconvert.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsdump.c b/sys/contrib/dev/acpica/components/namespace/nsdump.c
index f7babe5ef78..6eb43e0a4f4 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsdump.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsdump.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsdumpdv.c b/sys/contrib/dev/acpica/components/namespace/nsdumpdv.c
index 13b2bc9945d..5430e2ac632 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsdumpdv.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsdumpdv.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nseval.c b/sys/contrib/dev/acpica/components/namespace/nseval.c
index de73980680c..ac1ca3b7fe0 100644
--- a/sys/contrib/dev/acpica/components/namespace/nseval.c
+++ b/sys/contrib/dev/acpica/components/namespace/nseval.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsinit.c b/sys/contrib/dev/acpica/components/namespace/nsinit.c
index 20916a0d8dc..54d161632e9 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsinit.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsinit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsload.c b/sys/contrib/dev/acpica/components/namespace/nsload.c
index 3fb94736358..010ff7bda91 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsload.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsload.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsnames.c b/sys/contrib/dev/acpica/components/namespace/nsnames.c
index 389c83d28e7..7d1b4004325 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsnames.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsnames.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsobject.c b/sys/contrib/dev/acpica/components/namespace/nsobject.c
index 6b25de4e945..d418189b878 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsobject.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsobject.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsparse.c b/sys/contrib/dev/acpica/components/namespace/nsparse.c
index c64bcbee7bc..4f880cb8bd1 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsparse.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsparse.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nspredef.c b/sys/contrib/dev/acpica/components/namespace/nspredef.c
index 1fe6e6f7125..b311f679a5a 100644
--- a/sys/contrib/dev/acpica/components/namespace/nspredef.c
+++ b/sys/contrib/dev/acpica/components/namespace/nspredef.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsprepkg.c b/sys/contrib/dev/acpica/components/namespace/nsprepkg.c
index bddbd1859e6..36e18bf5fbe 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsprepkg.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsprepkg.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsrepair.c b/sys/contrib/dev/acpica/components/namespace/nsrepair.c
index 3f07f94b203..fc1a994a99f 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsrepair.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsrepair.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsrepair2.c b/sys/contrib/dev/acpica/components/namespace/nsrepair2.c
index 56e088ef503..e2cad9dbd50 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsrepair2.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsrepair2.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nssearch.c b/sys/contrib/dev/acpica/components/namespace/nssearch.c
index 8d14d5259c0..741466b0c79 100644
--- a/sys/contrib/dev/acpica/components/namespace/nssearch.c
+++ b/sys/contrib/dev/acpica/components/namespace/nssearch.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsutils.c b/sys/contrib/dev/acpica/components/namespace/nsutils.c
index 313660348bd..e7177851bd4 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsutils.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsutils.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nswalk.c b/sys/contrib/dev/acpica/components/namespace/nswalk.c
index f6035ce81ab..c7f57e4209e 100644
--- a/sys/contrib/dev/acpica/components/namespace/nswalk.c
+++ b/sys/contrib/dev/acpica/components/namespace/nswalk.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsxfeval.c b/sys/contrib/dev/acpica/components/namespace/nsxfeval.c
index b3572456e24..cc4a8ed215e 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsxfeval.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsxfeval.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsxfname.c b/sys/contrib/dev/acpica/components/namespace/nsxfname.c
index b1ef877888a..7c40b472640 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsxfname.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsxfname.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/namespace/nsxfobj.c b/sys/contrib/dev/acpica/components/namespace/nsxfobj.c
index ff3d36eac9c..9e137909684 100644
--- a/sys/contrib/dev/acpica/components/namespace/nsxfobj.c
+++ b/sys/contrib/dev/acpica/components/namespace/nsxfobj.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psargs.c b/sys/contrib/dev/acpica/components/parser/psargs.c
index 7bf286c0206..35ae0e0a5ed 100644
--- a/sys/contrib/dev/acpica/components/parser/psargs.c
+++ b/sys/contrib/dev/acpica/components/parser/psargs.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psloop.c b/sys/contrib/dev/acpica/components/parser/psloop.c
index f000d503c36..5501530f992 100644
--- a/sys/contrib/dev/acpica/components/parser/psloop.c
+++ b/sys/contrib/dev/acpica/components/parser/psloop.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psobject.c b/sys/contrib/dev/acpica/components/parser/psobject.c
index 0260632a5ee..2bb03c8125b 100644
--- a/sys/contrib/dev/acpica/components/parser/psobject.c
+++ b/sys/contrib/dev/acpica/components/parser/psobject.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psopcode.c b/sys/contrib/dev/acpica/components/parser/psopcode.c
index 26b393d26bd..d15d7703b82 100644
--- a/sys/contrib/dev/acpica/components/parser/psopcode.c
+++ b/sys/contrib/dev/acpica/components/parser/psopcode.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psopinfo.c b/sys/contrib/dev/acpica/components/parser/psopinfo.c
index 689448a75e8..8d967fe9f7f 100644
--- a/sys/contrib/dev/acpica/components/parser/psopinfo.c
+++ b/sys/contrib/dev/acpica/components/parser/psopinfo.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psparse.c b/sys/contrib/dev/acpica/components/parser/psparse.c
index bb0a961ad53..1b8b61a35b7 100644
--- a/sys/contrib/dev/acpica/components/parser/psparse.c
+++ b/sys/contrib/dev/acpica/components/parser/psparse.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psscope.c b/sys/contrib/dev/acpica/components/parser/psscope.c
index 0b0e75b8a08..9733894f794 100644
--- a/sys/contrib/dev/acpica/components/parser/psscope.c
+++ b/sys/contrib/dev/acpica/components/parser/psscope.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/pstree.c b/sys/contrib/dev/acpica/components/parser/pstree.c
index 55ef9599734..40ffa4bc00b 100644
--- a/sys/contrib/dev/acpica/components/parser/pstree.c
+++ b/sys/contrib/dev/acpica/components/parser/pstree.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psutils.c b/sys/contrib/dev/acpica/components/parser/psutils.c
index 9f34531628d..04b2a2ecf46 100644
--- a/sys/contrib/dev/acpica/components/parser/psutils.c
+++ b/sys/contrib/dev/acpica/components/parser/psutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/pswalk.c b/sys/contrib/dev/acpica/components/parser/pswalk.c
index b7e10d94339..3d84511ecb7 100644
--- a/sys/contrib/dev/acpica/components/parser/pswalk.c
+++ b/sys/contrib/dev/acpica/components/parser/pswalk.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/parser/psxface.c b/sys/contrib/dev/acpica/components/parser/psxface.c
index 48b00114d21..a2b57594cfd 100644
--- a/sys/contrib/dev/acpica/components/parser/psxface.c
+++ b/sys/contrib/dev/acpica/components/parser/psxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsaddr.c b/sys/contrib/dev/acpica/components/resources/rsaddr.c
index 4fbb4e341ef..1cee9ea0326 100644
--- a/sys/contrib/dev/acpica/components/resources/rsaddr.c
+++ b/sys/contrib/dev/acpica/components/resources/rsaddr.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rscalc.c b/sys/contrib/dev/acpica/components/resources/rscalc.c
index 4432108830b..10cdee616f5 100644
--- a/sys/contrib/dev/acpica/components/resources/rscalc.c
+++ b/sys/contrib/dev/acpica/components/resources/rscalc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rscreate.c b/sys/contrib/dev/acpica/components/resources/rscreate.c
index 8662929c5a7..92d8d53eb81 100644
--- a/sys/contrib/dev/acpica/components/resources/rscreate.c
+++ b/sys/contrib/dev/acpica/components/resources/rscreate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsdump.c b/sys/contrib/dev/acpica/components/resources/rsdump.c
index c141d032787..c4cfbb4ae37 100644
--- a/sys/contrib/dev/acpica/components/resources/rsdump.c
+++ b/sys/contrib/dev/acpica/components/resources/rsdump.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsdumpinfo.c b/sys/contrib/dev/acpica/components/resources/rsdumpinfo.c
index 58c74e22855..e71308c8046 100644
--- a/sys/contrib/dev/acpica/components/resources/rsdumpinfo.c
+++ b/sys/contrib/dev/acpica/components/resources/rsdumpinfo.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsinfo.c b/sys/contrib/dev/acpica/components/resources/rsinfo.c
index d72e7b938fd..3ebe07d9ef9 100644
--- a/sys/contrib/dev/acpica/components/resources/rsinfo.c
+++ b/sys/contrib/dev/acpica/components/resources/rsinfo.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsio.c b/sys/contrib/dev/acpica/components/resources/rsio.c
index 082575fa695..65a5525a2be 100644
--- a/sys/contrib/dev/acpica/components/resources/rsio.c
+++ b/sys/contrib/dev/acpica/components/resources/rsio.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsirq.c b/sys/contrib/dev/acpica/components/resources/rsirq.c
index 04d99dac9b4..093306157d0 100644
--- a/sys/contrib/dev/acpica/components/resources/rsirq.c
+++ b/sys/contrib/dev/acpica/components/resources/rsirq.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rslist.c b/sys/contrib/dev/acpica/components/resources/rslist.c
index 301c8b55f89..44f1e0c7419 100644
--- a/sys/contrib/dev/acpica/components/resources/rslist.c
+++ b/sys/contrib/dev/acpica/components/resources/rslist.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsmemory.c b/sys/contrib/dev/acpica/components/resources/rsmemory.c
index bd7aec6ca20..4a9308464bd 100644
--- a/sys/contrib/dev/acpica/components/resources/rsmemory.c
+++ b/sys/contrib/dev/acpica/components/resources/rsmemory.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsmisc.c b/sys/contrib/dev/acpica/components/resources/rsmisc.c
index 9e0424ef49a..eaf7e96dbaf 100644
--- a/sys/contrib/dev/acpica/components/resources/rsmisc.c
+++ b/sys/contrib/dev/acpica/components/resources/rsmisc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsserial.c b/sys/contrib/dev/acpica/components/resources/rsserial.c
index a004e7fbd36..9b2dd6c98c3 100644
--- a/sys/contrib/dev/acpica/components/resources/rsserial.c
+++ b/sys/contrib/dev/acpica/components/resources/rsserial.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsutils.c b/sys/contrib/dev/acpica/components/resources/rsutils.c
index 5d202b5c43d..715fbf236c9 100644
--- a/sys/contrib/dev/acpica/components/resources/rsutils.c
+++ b/sys/contrib/dev/acpica/components/resources/rsutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/resources/rsxface.c b/sys/contrib/dev/acpica/components/resources/rsxface.c
index b31b5e6a9e4..b2759182d33 100644
--- a/sys/contrib/dev/acpica/components/resources/rsxface.c
+++ b/sys/contrib/dev/acpica/components/resources/rsxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbdata.c b/sys/contrib/dev/acpica/components/tables/tbdata.c
index 08ebf559bd9..d71dd6087a9 100644
--- a/sys/contrib/dev/acpica/components/tables/tbdata.c
+++ b/sys/contrib/dev/acpica/components/tables/tbdata.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbfadt.c b/sys/contrib/dev/acpica/components/tables/tbfadt.c
index 26cb133ee1f..90fdcc00c1c 100644
--- a/sys/contrib/dev/acpica/components/tables/tbfadt.c
+++ b/sys/contrib/dev/acpica/components/tables/tbfadt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbfind.c b/sys/contrib/dev/acpica/components/tables/tbfind.c
index 924db9969c1..a31f31ba6b5 100644
--- a/sys/contrib/dev/acpica/components/tables/tbfind.c
+++ b/sys/contrib/dev/acpica/components/tables/tbfind.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbinstal.c b/sys/contrib/dev/acpica/components/tables/tbinstal.c
index 03b90b34d54..b55ef504e9e 100644
--- a/sys/contrib/dev/acpica/components/tables/tbinstal.c
+++ b/sys/contrib/dev/acpica/components/tables/tbinstal.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbprint.c b/sys/contrib/dev/acpica/components/tables/tbprint.c
index fcfda77cc53..60e10bf4489 100644
--- a/sys/contrib/dev/acpica/components/tables/tbprint.c
+++ b/sys/contrib/dev/acpica/components/tables/tbprint.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbutils.c b/sys/contrib/dev/acpica/components/tables/tbutils.c
index d1b96b15760..3962d0281da 100644
--- a/sys/contrib/dev/acpica/components/tables/tbutils.c
+++ b/sys/contrib/dev/acpica/components/tables/tbutils.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbxface.c b/sys/contrib/dev/acpica/components/tables/tbxface.c
index da550e870fb..4197be40450 100644
--- a/sys/contrib/dev/acpica/components/tables/tbxface.c
+++ b/sys/contrib/dev/acpica/components/tables/tbxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbxfload.c b/sys/contrib/dev/acpica/components/tables/tbxfload.c
index f035de64809..6115e3b1c5b 100644
--- a/sys/contrib/dev/acpica/components/tables/tbxfload.c
+++ b/sys/contrib/dev/acpica/components/tables/tbxfload.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/tables/tbxfroot.c b/sys/contrib/dev/acpica/components/tables/tbxfroot.c
index fb904a52bb4..3eadc2fd415 100644
--- a/sys/contrib/dev/acpica/components/tables/tbxfroot.c
+++ b/sys/contrib/dev/acpica/components/tables/tbxfroot.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utaddress.c b/sys/contrib/dev/acpica/components/utilities/utaddress.c
index d4d95a3dc13..e3ed2eded30 100644
--- a/sys/contrib/dev/acpica/components/utilities/utaddress.c
+++ b/sys/contrib/dev/acpica/components/utilities/utaddress.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utalloc.c b/sys/contrib/dev/acpica/components/utilities/utalloc.c
index 68a7150f413..e2c4dcf7c2e 100644
--- a/sys/contrib/dev/acpica/components/utilities/utalloc.c
+++ b/sys/contrib/dev/acpica/components/utilities/utalloc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utascii.c b/sys/contrib/dev/acpica/components/utilities/utascii.c
index 58c0a43db3d..59e1aed4de3 100644
--- a/sys/contrib/dev/acpica/components/utilities/utascii.c
+++ b/sys/contrib/dev/acpica/components/utilities/utascii.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utbuffer.c b/sys/contrib/dev/acpica/components/utilities/utbuffer.c
index 8199e7f8a58..1d649e0c809 100644
--- a/sys/contrib/dev/acpica/components/utilities/utbuffer.c
+++ b/sys/contrib/dev/acpica/components/utilities/utbuffer.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utcache.c b/sys/contrib/dev/acpica/components/utilities/utcache.c
index 8fa7561f70f..3634e173207 100644
--- a/sys/contrib/dev/acpica/components/utilities/utcache.c
+++ b/sys/contrib/dev/acpica/components/utilities/utcache.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utcopy.c b/sys/contrib/dev/acpica/components/utilities/utcopy.c
index 456bf3b055f..bdbfd7c75a4 100644
--- a/sys/contrib/dev/acpica/components/utilities/utcopy.c
+++ b/sys/contrib/dev/acpica/components/utilities/utcopy.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utdebug.c b/sys/contrib/dev/acpica/components/utilities/utdebug.c
index aa15767aad4..1c26f8fbe0b 100644
--- a/sys/contrib/dev/acpica/components/utilities/utdebug.c
+++ b/sys/contrib/dev/acpica/components/utilities/utdebug.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utdecode.c b/sys/contrib/dev/acpica/components/utilities/utdecode.c
index d77c71f6f50..52a1ba0f4d5 100644
--- a/sys/contrib/dev/acpica/components/utilities/utdecode.c
+++ b/sys/contrib/dev/acpica/components/utilities/utdecode.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utdelete.c b/sys/contrib/dev/acpica/components/utilities/utdelete.c
index 1be98cce862..fb9c327ff34 100644
--- a/sys/contrib/dev/acpica/components/utilities/utdelete.c
+++ b/sys/contrib/dev/acpica/components/utilities/utdelete.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/uterror.c b/sys/contrib/dev/acpica/components/utilities/uterror.c
index 3b72808f67e..a0697a4bb6f 100644
--- a/sys/contrib/dev/acpica/components/utilities/uterror.c
+++ b/sys/contrib/dev/acpica/components/utilities/uterror.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/uteval.c b/sys/contrib/dev/acpica/components/utilities/uteval.c
index 883f662f629..7099dd3d98e 100644
--- a/sys/contrib/dev/acpica/components/utilities/uteval.c
+++ b/sys/contrib/dev/acpica/components/utilities/uteval.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utexcep.c b/sys/contrib/dev/acpica/components/utilities/utexcep.c
index a467348d15e..99fe02df65d 100644
--- a/sys/contrib/dev/acpica/components/utilities/utexcep.c
+++ b/sys/contrib/dev/acpica/components/utilities/utexcep.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utglobal.c b/sys/contrib/dev/acpica/components/utilities/utglobal.c
index 72ed0371285..f588c30e2c4 100644
--- a/sys/contrib/dev/acpica/components/utilities/utglobal.c
+++ b/sys/contrib/dev/acpica/components/utilities/utglobal.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/uthex.c b/sys/contrib/dev/acpica/components/utilities/uthex.c
index 6ca8f184e40..18821c6d843 100644
--- a/sys/contrib/dev/acpica/components/utilities/uthex.c
+++ b/sys/contrib/dev/acpica/components/utilities/uthex.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utids.c b/sys/contrib/dev/acpica/components/utilities/utids.c
index 57180817a80..8f6559905f7 100644
--- a/sys/contrib/dev/acpica/components/utilities/utids.c
+++ b/sys/contrib/dev/acpica/components/utilities/utids.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utinit.c b/sys/contrib/dev/acpica/components/utilities/utinit.c
index 357ccd212d1..023ca620d0e 100644
--- a/sys/contrib/dev/acpica/components/utilities/utinit.c
+++ b/sys/contrib/dev/acpica/components/utilities/utinit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utlock.c b/sys/contrib/dev/acpica/components/utilities/utlock.c
index 877a3cf39b9..1fc87a56802 100644
--- a/sys/contrib/dev/acpica/components/utilities/utlock.c
+++ b/sys/contrib/dev/acpica/components/utilities/utlock.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utmath.c b/sys/contrib/dev/acpica/components/utilities/utmath.c
index f9cd2b18e67..f3c37127acf 100644
--- a/sys/contrib/dev/acpica/components/utilities/utmath.c
+++ b/sys/contrib/dev/acpica/components/utilities/utmath.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utmisc.c b/sys/contrib/dev/acpica/components/utilities/utmisc.c
index 2e20603fb5e..b1fbedd237e 100644
--- a/sys/contrib/dev/acpica/components/utilities/utmisc.c
+++ b/sys/contrib/dev/acpica/components/utilities/utmisc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utmutex.c b/sys/contrib/dev/acpica/components/utilities/utmutex.c
index 40c0118e533..172b8623707 100644
--- a/sys/contrib/dev/acpica/components/utilities/utmutex.c
+++ b/sys/contrib/dev/acpica/components/utilities/utmutex.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utnonansi.c b/sys/contrib/dev/acpica/components/utilities/utnonansi.c
index dc7159f4cca..b2effa40b32 100644
--- a/sys/contrib/dev/acpica/components/utilities/utnonansi.c
+++ b/sys/contrib/dev/acpica/components/utilities/utnonansi.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -271,7 +271,7 @@ AcpiUtStricmp (
 }
 
 
-#if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION)
+#if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION) || defined (ACPI_DEBUG_OUTPUT)
 /*******************************************************************************
  *
  * FUNCTION:    AcpiUtSafeStrcpy, AcpiUtSafeStrcat, AcpiUtSafeStrncat
diff --git a/sys/contrib/dev/acpica/components/utilities/utobject.c b/sys/contrib/dev/acpica/components/utilities/utobject.c
index cd05ec3da99..f5b3698cdd6 100644
--- a/sys/contrib/dev/acpica/components/utilities/utobject.c
+++ b/sys/contrib/dev/acpica/components/utilities/utobject.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utosi.c b/sys/contrib/dev/acpica/components/utilities/utosi.c
index e19e211307a..2bc12656108 100644
--- a/sys/contrib/dev/acpica/components/utilities/utosi.c
+++ b/sys/contrib/dev/acpica/components/utilities/utosi.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utownerid.c b/sys/contrib/dev/acpica/components/utilities/utownerid.c
index b2b3f09ce02..0496b66b7f4 100644
--- a/sys/contrib/dev/acpica/components/utilities/utownerid.c
+++ b/sys/contrib/dev/acpica/components/utilities/utownerid.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utpredef.c b/sys/contrib/dev/acpica/components/utilities/utpredef.c
index b5cd9c9bcdf..849d5078ac0 100644
--- a/sys/contrib/dev/acpica/components/utilities/utpredef.c
+++ b/sys/contrib/dev/acpica/components/utilities/utpredef.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utresdecode.c b/sys/contrib/dev/acpica/components/utilities/utresdecode.c
index 0ef693e2e45..2bfcbd150d2 100644
--- a/sys/contrib/dev/acpica/components/utilities/utresdecode.c
+++ b/sys/contrib/dev/acpica/components/utilities/utresdecode.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utresrc.c b/sys/contrib/dev/acpica/components/utilities/utresrc.c
index 02b2175f96d..0fff0dbc655 100644
--- a/sys/contrib/dev/acpica/components/utilities/utresrc.c
+++ b/sys/contrib/dev/acpica/components/utilities/utresrc.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utstate.c b/sys/contrib/dev/acpica/components/utilities/utstate.c
index fa9ec202e73..9cf7a2ffc77 100644
--- a/sys/contrib/dev/acpica/components/utilities/utstate.c
+++ b/sys/contrib/dev/acpica/components/utilities/utstate.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utstring.c b/sys/contrib/dev/acpica/components/utilities/utstring.c
index 23187a72b00..168c68f8b4f 100644
--- a/sys/contrib/dev/acpica/components/utilities/utstring.c
+++ b/sys/contrib/dev/acpica/components/utilities/utstring.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utstrsuppt.c b/sys/contrib/dev/acpica/components/utilities/utstrsuppt.c
index 00d4cd69013..51fd0485421 100644
--- a/sys/contrib/dev/acpica/components/utilities/utstrsuppt.c
+++ b/sys/contrib/dev/acpica/components/utilities/utstrsuppt.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utstrtoul64.c b/sys/contrib/dev/acpica/components/utilities/utstrtoul64.c
index 1e7f43028a1..336c58ae207 100644
--- a/sys/contrib/dev/acpica/components/utilities/utstrtoul64.c
+++ b/sys/contrib/dev/acpica/components/utilities/utstrtoul64.c
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/uttrack.c b/sys/contrib/dev/acpica/components/utilities/uttrack.c
index ece731203dc..0ddee4f052b 100644
--- a/sys/contrib/dev/acpica/components/utilities/uttrack.c
+++ b/sys/contrib/dev/acpica/components/utilities/uttrack.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utuuid.c b/sys/contrib/dev/acpica/components/utilities/utuuid.c
index c87e6d858a9..9acfe03661b 100644
--- a/sys/contrib/dev/acpica/components/utilities/utuuid.c
+++ b/sys/contrib/dev/acpica/components/utilities/utuuid.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utxface.c b/sys/contrib/dev/acpica/components/utilities/utxface.c
index e3e2fdd10a1..ca8d29167d8 100644
--- a/sys/contrib/dev/acpica/components/utilities/utxface.c
+++ b/sys/contrib/dev/acpica/components/utilities/utxface.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utxferror.c b/sys/contrib/dev/acpica/components/utilities/utxferror.c
index 75eea317c7b..798be657b97 100644
--- a/sys/contrib/dev/acpica/components/utilities/utxferror.c
+++ b/sys/contrib/dev/acpica/components/utilities/utxferror.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utxfinit.c b/sys/contrib/dev/acpica/components/utilities/utxfinit.c
index 66f1f6a7305..aa25acbcac8 100644
--- a/sys/contrib/dev/acpica/components/utilities/utxfinit.c
+++ b/sys/contrib/dev/acpica/components/utilities/utxfinit.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/components/utilities/utxfmutex.c b/sys/contrib/dev/acpica/components/utilities/utxfmutex.c
index d4a7d210568..77e93e26c96 100644
--- a/sys/contrib/dev/acpica/components/utilities/utxfmutex.c
+++ b/sys/contrib/dev/acpica/components/utilities/utxfmutex.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acapps.h b/sys/contrib/dev/acpica/include/acapps.h
index faae2fb6917..94a40187cb2 100644
--- a/sys/contrib/dev/acpica/include/acapps.h
+++ b/sys/contrib/dev/acpica/include/acapps.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -159,7 +159,7 @@
 /* Common info for tool signons */
 
 #define ACPICA_NAME                 "Intel ACPI Component Architecture"
-#define ACPICA_COPYRIGHT            "Copyright (c) 2000 - 2017 Intel Corporation"
+#define ACPICA_COPYRIGHT            "Copyright (c) 2000 - 2018 Intel Corporation"
 
 #if ACPI_MACHINE_WIDTH == 64
 #define ACPI_WIDTH          " (64-bit version)"
diff --git a/sys/contrib/dev/acpica/include/acbuffer.h b/sys/contrib/dev/acpica/include/acbuffer.h
index 41356ee0078..857d8bc05a9 100644
--- a/sys/contrib/dev/acpica/include/acbuffer.h
+++ b/sys/contrib/dev/acpica/include/acbuffer.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acclib.h b/sys/contrib/dev/acpica/include/acclib.h
index 9c00bf54c79..7c4c9a2e889 100644
--- a/sys/contrib/dev/acpica/include/acclib.h
+++ b/sys/contrib/dev/acpica/include/acclib.h
@@ -9,7 +9,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/accommon.h b/sys/contrib/dev/acpica/include/accommon.h
index 5e2e4924339..b196c6eea3c 100644
--- a/sys/contrib/dev/acpica/include/accommon.h
+++ b/sys/contrib/dev/acpica/include/accommon.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acconfig.h b/sys/contrib/dev/acpica/include/acconfig.h
index 7cff0636516..c5a67ca0475 100644
--- a/sys/contrib/dev/acpica/include/acconfig.h
+++ b/sys/contrib/dev/acpica/include/acconfig.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acconvert.h b/sys/contrib/dev/acpica/include/acconvert.h
index 4b239586ff8..cdefc68d469 100644
--- a/sys/contrib/dev/acpica/include/acconvert.h
+++ b/sys/contrib/dev/acpica/include/acconvert.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acdebug.h b/sys/contrib/dev/acpica/include/acdebug.h
index 0a278415a5e..d9aab3e8b51 100644
--- a/sys/contrib/dev/acpica/include/acdebug.h
+++ b/sys/contrib/dev/acpica/include/acdebug.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acdisasm.h b/sys/contrib/dev/acpica/include/acdisasm.h
index 5f2030eb38c..b390c492ae0 100644
--- a/sys/contrib/dev/acpica/include/acdisasm.h
+++ b/sys/contrib/dev/acpica/include/acdisasm.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acdispat.h b/sys/contrib/dev/acpica/include/acdispat.h
index bae3d79472d..fd6a1e834e7 100644
--- a/sys/contrib/dev/acpica/include/acdispat.h
+++ b/sys/contrib/dev/acpica/include/acdispat.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acevents.h b/sys/contrib/dev/acpica/include/acevents.h
index f15d3772dd3..b6737da5489 100644
--- a/sys/contrib/dev/acpica/include/acevents.h
+++ b/sys/contrib/dev/acpica/include/acevents.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acexcep.h b/sys/contrib/dev/acpica/include/acexcep.h
index 16d3698b625..828f9fb9485 100644
--- a/sys/contrib/dev/acpica/include/acexcep.h
+++ b/sys/contrib/dev/acpica/include/acexcep.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acglobal.h b/sys/contrib/dev/acpica/include/acglobal.h
index d29586988a4..3c2a4ed4ce0 100644
--- a/sys/contrib/dev/acpica/include/acglobal.h
+++ b/sys/contrib/dev/acpica/include/acglobal.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/achware.h b/sys/contrib/dev/acpica/include/achware.h
index c3bf8f1523f..1c43926c460 100644
--- a/sys/contrib/dev/acpica/include/achware.h
+++ b/sys/contrib/dev/acpica/include/achware.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acinterp.h b/sys/contrib/dev/acpica/include/acinterp.h
index d68058cced5..fde066dcb8e 100644
--- a/sys/contrib/dev/acpica/include/acinterp.h
+++ b/sys/contrib/dev/acpica/include/acinterp.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/aclocal.h b/sys/contrib/dev/acpica/include/aclocal.h
index 5ad319024ad..f487a4ec9bf 100644
--- a/sys/contrib/dev/acpica/include/aclocal.h
+++ b/sys/contrib/dev/acpica/include/aclocal.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acmacros.h b/sys/contrib/dev/acpica/include/acmacros.h
index feb45937e14..f0f7992454c 100644
--- a/sys/contrib/dev/acpica/include/acmacros.h
+++ b/sys/contrib/dev/acpica/include/acmacros.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acnames.h b/sys/contrib/dev/acpica/include/acnames.h
index 69f88844062..1f8adff0075 100644
--- a/sys/contrib/dev/acpica/include/acnames.h
+++ b/sys/contrib/dev/acpica/include/acnames.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acnamesp.h b/sys/contrib/dev/acpica/include/acnamesp.h
index 43402719a7d..a2c80dfeea0 100644
--- a/sys/contrib/dev/acpica/include/acnamesp.h
+++ b/sys/contrib/dev/acpica/include/acnamesp.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acobject.h b/sys/contrib/dev/acpica/include/acobject.h
index 7dce4cee3e2..824d208478a 100644
--- a/sys/contrib/dev/acpica/include/acobject.h
+++ b/sys/contrib/dev/acpica/include/acobject.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acopcode.h b/sys/contrib/dev/acpica/include/acopcode.h
index 3ce2772b045..56f13663a25 100644
--- a/sys/contrib/dev/acpica/include/acopcode.h
+++ b/sys/contrib/dev/acpica/include/acopcode.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acoutput.h b/sys/contrib/dev/acpica/include/acoutput.h
index 2e40d9d9ec4..49b85059cd8 100644
--- a/sys/contrib/dev/acpica/include/acoutput.h
+++ b/sys/contrib/dev/acpica/include/acoutput.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acparser.h b/sys/contrib/dev/acpica/include/acparser.h
index 802f1617e8f..8acea23cabc 100644
--- a/sys/contrib/dev/acpica/include/acparser.h
+++ b/sys/contrib/dev/acpica/include/acparser.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acpi.h b/sys/contrib/dev/acpica/include/acpi.h
index 37bff7de52f..f01e48d3cda 100644
--- a/sys/contrib/dev/acpica/include/acpi.h
+++ b/sys/contrib/dev/acpica/include/acpi.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acpiosxf.h b/sys/contrib/dev/acpica/include/acpiosxf.h
index 0ef5576f2eb..eb7e50ce012 100644
--- a/sys/contrib/dev/acpica/include/acpiosxf.h
+++ b/sys/contrib/dev/acpica/include/acpiosxf.h
@@ -10,7 +10,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acpixf.h b/sys/contrib/dev/acpica/include/acpixf.h
index 482662f3362..00c3f583ec0 100644
--- a/sys/contrib/dev/acpica/include/acpixf.h
+++ b/sys/contrib/dev/acpica/include/acpixf.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -154,7 +154,7 @@
 
 /* Current ACPICA subsystem version in YYYYMMDD format */
 
-#define ACPI_CA_VERSION                 0x20171214
+#define ACPI_CA_VERSION                 0x20180105
 
 #include <contrib/dev/acpica/include/acconfig.h>
 #include <contrib/dev/acpica/include/actypes.h>
diff --git a/sys/contrib/dev/acpica/include/acpredef.h b/sys/contrib/dev/acpica/include/acpredef.h
index 95a18a47e79..cd674d2bbc8 100644
--- a/sys/contrib/dev/acpica/include/acpredef.h
+++ b/sys/contrib/dev/acpica/include/acpredef.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acresrc.h b/sys/contrib/dev/acpica/include/acresrc.h
index c5261072b72..5e07b01cde8 100644
--- a/sys/contrib/dev/acpica/include/acresrc.h
+++ b/sys/contrib/dev/acpica/include/acresrc.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acrestyp.h b/sys/contrib/dev/acpica/include/acrestyp.h
index 0057722c1e6..2d485f7e248 100644
--- a/sys/contrib/dev/acpica/include/acrestyp.h
+++ b/sys/contrib/dev/acpica/include/acrestyp.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/acstruct.h b/sys/contrib/dev/acpica/include/acstruct.h
index 5b7c34f1bda..9c55d357ec5 100644
--- a/sys/contrib/dev/acpica/include/acstruct.h
+++ b/sys/contrib/dev/acpica/include/acstruct.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actables.h b/sys/contrib/dev/acpica/include/actables.h
index 05a69ffebb3..59a9a3908a9 100644
--- a/sys/contrib/dev/acpica/include/actables.h
+++ b/sys/contrib/dev/acpica/include/actables.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actbinfo.h b/sys/contrib/dev/acpica/include/actbinfo.h
new file mode 100644
index 00000000000..5a84f35b5c9
--- /dev/null
+++ b/sys/contrib/dev/acpica/include/actbinfo.h
@@ -0,0 +1,411 @@
+/******************************************************************************
+ *
+ * Module Name: actbinfo - Table disassembly info for non-AML tables
+ *
+ *****************************************************************************/
+
+/******************************************************************************
+ *
+ * 1. Copyright Notice
+ *
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
+ * All rights reserved.
+ *
+ * 2. License
+ *
+ * 2.1. This is your license from Intel Corp. under its intellectual property
+ * rights. You may have additional license terms from the party that provided
+ * you this software, covering your right to use that party's intellectual
+ * property rights.
+ *
+ * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
+ * copy of the source code appearing in this file ("Covered Code") an
+ * irrevocable, perpetual, worldwide license under Intel's copyrights in the
+ * base code distributed originally by Intel ("Original Intel Code") to copy,
+ * make derivatives, distribute, use and display any portion of the Covered
+ * Code in any form, with the right to sublicense such rights; and
+ *
+ * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
+ * license (with the right to sublicense), under only those claims of Intel
+ * patents that are infringed by the Original Intel Code, to make, use, sell,
+ * offer to sell, and import the Covered Code and derivative works thereof
+ * solely to the minimum extent necessary to exercise the above copyright
+ * license, and in no event shall the patent license extend to any additions
+ * to or modifications of the Original Intel Code. No other license or right
+ * is granted directly or by implication, estoppel or otherwise;
+ *
+ * The above copyright and patent license is granted only if the following
+ * conditions are met:
+ *
+ * 3. Conditions
+ *
+ * 3.1. Redistribution of Source with Rights to Further Distribute Source.
+ * Redistribution of source code of any substantial portion of the Covered
+ * Code or modification with rights to further distribute source must include
+ * the above Copyright Notice, the above License, this list of Conditions,
+ * and the following Disclaimer and Export Compliance provision. In addition,
+ * Licensee must cause all Covered Code to which Licensee contributes to
+ * contain a file documenting the changes Licensee made to create that Covered
+ * Code and the date of any change. Licensee must include in that file the
+ * documentation of any changes made by any predecessor Licensee. Licensee
+ * must include a prominent statement that the modification is derived,
+ * directly or indirectly, from Original Intel Code.
+ *
+ * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
+ * Redistribution of source code of any substantial portion of the Covered
+ * Code or modification without rights to further distribute source must
+ * include the following Disclaimer and Export Compliance provision in the
+ * documentation and/or other materials provided with distribution. In
+ * addition, Licensee may not authorize further sublicense of source of any
+ * portion of the Covered Code, and must include terms to the effect that the
+ * license from Licensee to its licensee is limited to the intellectual
+ * property embodied in the software Licensee provides to its licensee, and
+ * not to intellectual property embodied in modifications its licensee may
+ * make.
+ *
+ * 3.3. Redistribution of Executable. Redistribution in executable form of any
+ * substantial portion of the Covered Code or modification must reproduce the
+ * above Copyright Notice, and the following Disclaimer and Export Compliance
+ * provision in the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * 3.4. Intel retains all right, title, and interest in and to the Original
+ * Intel Code.
+ *
+ * 3.5. Neither the name Intel nor any other trademark owned or controlled by
+ * Intel shall be used in advertising or otherwise to promote the sale, use or
+ * other dealings in products derived from or relating to the Covered Code
+ * without prior written authorization from Intel.
+ *
+ * 4. Disclaimer and Export Compliance
+ *
+ * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
+ * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
+ * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
+ * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
+ * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
+ * PARTICULAR PURPOSE.
+ *
+ * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
+ * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
+ * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
+ * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
+ * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
+ * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
+ * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
+ * LIMITED REMEDY.
+ *
+ * 4.3. Licensee shall not export, either directly or indirectly, any of this
+ * software or system incorporating such software without first obtaining any
+ * required license or other approval from the U. S. Department of Commerce or
+ * any other agency or department of the United States Government. In the
+ * event Licensee exports any such software from the United States or
+ * re-exports any such software from a foreign destination, Licensee shall
+ * ensure that the distribution and export/re-export of the software is in
+ * compliance with all laws, regulations, orders, or other restrictions of the
+ * U.S. Export Administration Regulations. Licensee agrees that neither it nor
+ * any of its subsidiaries will export/re-export any technical data, process,
+ * software, or service, directly or indirectly, to any country for which the
+ * United States government or any agency thereof requires an export license,
+ * other governmental approval, or letter of assurance, without first obtaining
+ * such license, approval or letter.
+ *
+ *****************************************************************************
+ *
+ * Alternatively, you may choose to be licensed under the terms of the
+ * following license:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ *    substantially similar to the "NO WARRANTY" disclaimer below
+ *    ("Disclaimer") and any redistribution must be conditioned upon
+ *    including a substantially similar Disclaimer requirement for further
+ *    binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ *    of any contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Alternatively, you may choose to be licensed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ *****************************************************************************/
+
+/*
+ * Macros used to generate offsets to specific table fields
+ */
+#define ACPI_FACS_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f)
+#define ACPI_GAS_OFFSET(f)              (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
+#define ACPI_HDR_OFFSET(f)              (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
+#define ACPI_RSDP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
+#define ACPI_BERT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f)
+#define ACPI_BGRT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f)
+#define ACPI_BOOT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
+#define ACPI_CPEP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
+#define ACPI_DBG2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f)
+#define ACPI_DBGP_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
+#define ACPI_DMAR_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
+#define ACPI_DRTM_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f)
+#define ACPI_ECDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
+#define ACPI_EINJ_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
+#define ACPI_ERST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f)
+#define ACPI_GTDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f)
+#define ACPI_HEST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f)
+#define ACPI_HPET_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f)
+#define ACPI_HMAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_HMAT,f)
+#define ACPI_IORT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_IORT,f)
+#define ACPI_IVRS_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
+#define ACPI_MADT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f)
+#define ACPI_MCFG_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
+#define ACPI_MCHI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f)
+#define ACPI_MPST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f)
+#define ACPI_MSCT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
+#define ACPI_NFIT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_NFIT,f)
+#define ACPI_PCCT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f)
+#define ACPI_PDTT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PDTT,f)
+#define ACPI_PMTT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f)
+#define ACPI_RASF_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_RASF,f)
+#define ACPI_S3PT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f)
+#define ACPI_SBST_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f)
+#define ACPI_SDEI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SDEI,f)
+#define ACPI_SDEV_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SDEV,f)
+#define ACPI_SLIT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
+#define ACPI_SPCR_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
+#define ACPI_SPMI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
+#define ACPI_SRAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
+#define ACPI_STAO_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_STAO,f)
+#define ACPI_TCPA_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_HDR,f)
+#define ACPI_TPM2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f)
+#define ACPI_UEFI_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
+#define ACPI_WAET_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f)
+#define ACPI_WDAT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
+#define ACPI_WDDT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f)
+#define ACPI_WDRT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
+#define ACPI_WPBT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WPBT,f)
+#define ACPI_WSMT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_WSMT,f)
+#define ACPI_XENV_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_XENV,f)
+
+/* Subtables */
+
+#define ACPI_ASF0_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f)
+#define ACPI_ASF1_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f)
+#define ACPI_ASF1a_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
+#define ACPI_ASF2_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
+#define ACPI_ASF2a_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
+#define ACPI_ASF3_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f)
+#define ACPI_ASF4_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
+#define ACPI_CPEP0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
+#define ACPI_CSRT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f)
+#define ACPI_CSRT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f)
+#define ACPI_CSRT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f)
+#define ACPI_DBG20_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f)
+#define ACPI_DMARS_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
+#define ACPI_DMAR0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
+#define ACPI_DMAR1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
+#define ACPI_DMAR2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
+#define ACPI_DMAR3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
+#define ACPI_DMAR4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f)
+#define ACPI_DRTM0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST,f)
+#define ACPI_DRTM1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST,f)
+#define ACPI_DRTM1a_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE,f)
+#define ACPI_DRTM2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_DRTM_DPS_ID,f)
+#define ACPI_EINJ0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
+#define ACPI_ERST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
+#define ACPI_FPDTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
+#define ACPI_FPDT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT_POINTER,f)
+#define ACPI_FPDT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_POINTER,f)
+#define ACPI_GTDT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_BLOCK,f)
+#define ACPI_GTDT0a_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_ENTRY,f)
+#define ACPI_GTDT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_WATCHDOG,f)
+#define ACPI_GTDTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_GTDT_HEADER,f)
+#define ACPI_HEST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
+#define ACPI_HEST1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
+#define ACPI_HEST2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
+#define ACPI_HEST6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
+#define ACPI_HEST7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f)
+#define ACPI_HEST8_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
+#define ACPI_HEST9_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
+#define ACPI_HEST10_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC_V2,f)
+#define ACPI_HEST11_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f)
+#define ACPI_HESTN_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
+#define ACPI_HESTB_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f)
+#define ACPI_HMAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f)
+#define ACPI_HMAT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_LOCALITY,f)
+#define ACPI_HMAT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_CACHE,f)
+#define ACPI_HMATH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_HMAT_STRUCTURE,f)
+#define ACPI_IORT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ITS_GROUP,f)
+#define ACPI_IORT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT,f)
+#define ACPI_IORT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ROOT_COMPLEX,f)
+#define ACPI_IORT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU,f)
+#define ACPI_IORT3A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_GSI,f)
+#define ACPI_IORT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_V3,f)
+#define ACPI_IORTA_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_MEMORY_ACCESS,f)
+#define ACPI_IORTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_NODE,f)
+#define ACPI_IORTM_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IORT_ID_MAPPING,f)
+#define ACPI_IVRSH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
+#define ACPI_IVRS0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
+#define ACPI_IVRS1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
+#define ACPI_IVRSD_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
+#define ACPI_IVRS8A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
+#define ACPI_IVRS8B_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
+#define ACPI_IVRS8C_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
+#define ACPI_LPITH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f)
+#define ACPI_LPIT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f)
+#define ACPI_MADT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
+#define ACPI_MADT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
+#define ACPI_MADT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
+#define ACPI_MADT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
+#define ACPI_MADT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
+#define ACPI_MADT5_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
+#define ACPI_MADT6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
+#define ACPI_MADT7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
+#define ACPI_MADT8_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
+#define ACPI_MADT9_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
+#define ACPI_MADT10_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
+#define ACPI_MADT11_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f)
+#define ACPI_MADT12_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f)
+#define ACPI_MADT13_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f)
+#define ACPI_MADT14_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f)
+#define ACPI_MADT15_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_TRANSLATOR,f)
+#define ACPI_MADTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
+#define ACPI_MCFG0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
+#define ACPI_MPST0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f)
+#define ACPI_MPST0A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f)
+#define ACPI_MPST0B_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f)
+#define ACPI_MPST1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f)
+#define ACPI_MPST2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f)
+#define ACPI_MSCT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
+#define ACPI_MTMR0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f)
+#define ACPI_NFITH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_HEADER,f)
+#define ACPI_NFIT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f)
+#define ACPI_NFIT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_MEMORY_MAP,f)
+#define ACPI_NFIT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_INTERLEAVE,f)
+#define ACPI_NFIT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_SMBIOS,f)
+#define ACPI_NFIT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_CONTROL_REGION,f)
+#define ACPI_NFIT5_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_DATA_REGION,f)
+#define ACPI_NFIT6_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_FLUSH_ADDRESS,f)
+#define ACPI_NFIT7_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_NFIT_CAPABILITIES,f)
+#define ACPI_PCCT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f)
+#define ACPI_PCCT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f)
+#define ACPI_PCCT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f)
+#define ACPI_PCCT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f)
+#define ACPI_PCCT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f)
+#define ACPI_PDTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PDTT_CHANNEL,f)
+#define ACPI_PMTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f)
+#define ACPI_PMTT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f)
+#define ACPI_PMTT1A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f)
+#define ACPI_PMTT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f)
+#define ACPI_PMTTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f)
+#define ACPI_PPTTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
+#define ACPI_PPTT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_PROCESSOR,f)
+#define ACPI_PPTT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_CACHE,f)
+#define ACPI_PPTT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_PPTT_ID,f)
+#define ACPI_S3PTH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
+#define ACPI_S3PT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f)
+#define ACPI_S3PT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f)
+#define ACPI_SDEVH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_HEADER,f)
+#define ACPI_SDEV0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_NAMESPACE,f)
+#define ACPI_SDEV1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SDEV_PCIE,f)
+#define ACPI_SDEV1A_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_SDEV_PCIE_PATH,f)
+#define ACPI_SLIC_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIC,f)
+#define ACPI_SRATH_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
+#define ACPI_SRAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
+#define ACPI_SRAT1_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
+#define ACPI_SRAT2_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
+#define ACPI_SRAT3_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_GICC_AFFINITY,f)
+#define ACPI_SRAT4_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_SRAT_GIC_ITS_AFFINITY,f)
+#define ACPI_TCPA_CLIENT_OFFSET(f)      (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_CLIENT,f)
+#define ACPI_TCPA_SERVER_OFFSET(f)      (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_SERVER,f)
+#define ACPI_TPM2A_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_TPM2_TRAILER,f)
+#define ACPI_TPM211_OFFSET(f)           (UINT16) ACPI_OFFSET (ACPI_TPM2_ARM_SMC,f)
+#define ACPI_VRTC0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f)
+#define ACPI_WDAT0_OFFSET(f)            (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
+
+/*
+ * Simplify access to flag fields by breaking them up into bytes
+ */
+#define ACPI_FLAG_OFFSET(d,f,o)         (UINT16) (ACPI_OFFSET (d,f) + o)
+
+/* Flags */
+
+#define ACPI_BGRT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_BGRT,f,o)
+#define ACPI_DRTM_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_DRTM,f,o)
+#define ACPI_DRTM1a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_DRTM_RESOURCE,f,o)
+#define ACPI_FADT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
+#define ACPI_FACS_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
+#define ACPI_HPET_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
+#define ACPI_PPTT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PPTT_PROCESSOR,f,o)
+#define ACPI_PPTT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PPTT_CACHE,f,o)
+#define ACPI_SRAT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
+#define ACPI_SRAT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
+#define ACPI_SRAT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
+#define ACPI_SRAT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SRAT_GICC_AFFINITY,f,o)
+#define ACPI_GTDT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o)
+#define ACPI_GTDT0a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o)
+#define ACPI_GTDT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o)
+#define ACPI_HMAT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f,o)
+#define ACPI_HMAT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_LOCALITY,f,o)
+#define ACPI_HMAT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HMAT_CACHE,f,o)
+#define ACPI_IORT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_SMMU,f,o)
+#define ACPI_IORT3a_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_GSI,f,o)
+#define ACPI_IORT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_V3,f,o)
+#define ACPI_IORTA_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_MEMORY_ACCESS,f,o)
+#define ACPI_IORTM_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_IORT_ID_MAPPING,f,o)
+#define ACPI_LPITH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o)
+#define ACPI_MADT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
+#define ACPI_MADT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
+#define ACPI_MADT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
+#define ACPI_MADT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
+#define ACPI_MADT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
+#define ACPI_MADT7_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
+#define ACPI_MADT8_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
+#define ACPI_MADT9_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
+#define ACPI_MADT10_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
+#define ACPI_MADT11_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o)
+#define ACPI_MADT13_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o)
+#define ACPI_MPST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o)
+#define ACPI_MPST2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o)
+#define ACPI_NFIT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f,o)
+#define ACPI_NFIT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_MEMORY_MAP,f,o)
+#define ACPI_NFIT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_CONTROL_REGION,f,o)
+#define ACPI_NFIT7_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_NFIT_CAPABILITIES,f,o)
+#define ACPI_PCCT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o)
+#define ACPI_PCCT1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o)
+#define ACPI_PCCT2_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f,o)
+#define ACPI_PCCT3_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f,o)
+#define ACPI_PCCT4_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f,o)
+#define ACPI_PDTT0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PDTT_CHANNEL,f,o)
+#define ACPI_PMTTH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o)
+#define ACPI_SDEVH_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_SDEV_HEADER,f,o)
+#define ACPI_WDDT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o)
+#define ACPI_WSMT_FLAG_OFFSET(f,o)      ACPI_FLAG_OFFSET (ACPI_TABLE_WSMT,f,o)
+#define ACPI_EINJ0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
+#define ACPI_ERST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
+#define ACPI_HEST0_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o)
+#define ACPI_HEST1_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o)
+#define ACPI_HEST6_FLAG_OFFSET(f,o)     ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o)
+#define ACPI_HEST11_FLAG_OFFSET(f,o)    ACPI_FLAG_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f,o)
+
+/*
+ * Required terminator for all tables below
+ */
+#define ACPI_DMT_TERMINATOR             {ACPI_DMT_EXIT, 0, NULL, 0}
+#define ACPI_DMT_NEW_LINE               {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0}
diff --git a/sys/contrib/dev/acpica/include/actbl.h b/sys/contrib/dev/acpica/include/actbl.h
index f6875e57844..f29f829ec85 100644
--- a/sys/contrib/dev/acpica/include/actbl.h
+++ b/sys/contrib/dev/acpica/include/actbl.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actbl1.h b/sys/contrib/dev/acpica/include/actbl1.h
index 6d0f5c85b7b..a9db6fc7370 100644
--- a/sys/contrib/dev/acpica/include/actbl1.h
+++ b/sys/contrib/dev/acpica/include/actbl1.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actbl2.h b/sys/contrib/dev/acpica/include/actbl2.h
index cdf7ac06d72..cad2fb24f77 100644
--- a/sys/contrib/dev/acpica/include/actbl2.h
+++ b/sys/contrib/dev/acpica/include/actbl2.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actbl3.h b/sys/contrib/dev/acpica/include/actbl3.h
index 80b6ae1c0aa..91a0026c70e 100644
--- a/sys/contrib/dev/acpica/include/actbl3.h
+++ b/sys/contrib/dev/acpica/include/actbl3.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/actypes.h b/sys/contrib/dev/acpica/include/actypes.h
index 2d71de51ede..926bba933bd 100644
--- a/sys/contrib/dev/acpica/include/actypes.h
+++ b/sys/contrib/dev/acpica/include/actypes.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -605,7 +605,7 @@ typedef UINT8                           ACPI_OWNER_ID;
 /*
  * Constants with special meanings
  */
-#define ACPI_ROOT_OBJECT                ACPI_ADD_PTR (ACPI_HANDLE, NULL, ACPI_MAX_PTR)
+#define ACPI_ROOT_OBJECT                ((ACPI_HANDLE) ACPI_TO_POINTER (ACPI_MAX_PTR))
 #define ACPI_WAIT_FOREVER               0xFFFF  /* UINT16, as per ACPI spec */
 #define ACPI_DO_NOT_WAIT                0
 
@@ -653,13 +653,13 @@ typedef UINT64                          ACPI_INTEGER;
 #define ACPI_CAST_INDIRECT_PTR(t, p)    ((t **) (ACPI_UINTPTR_T) (p))
 #define ACPI_ADD_PTR(t, a, b)           ACPI_CAST_PTR (t, (ACPI_CAST_PTR (UINT8, (a)) + (ACPI_SIZE)(b)))
 #define ACPI_SUB_PTR(t, a, b)           ACPI_CAST_PTR (t, (ACPI_CAST_PTR (UINT8, (a)) - (ACPI_SIZE)(b)))
-#define ACPI_PTR_DIFF(a, b)             (ACPI_SIZE) (ACPI_CAST_PTR (UINT8, (a)) - ACPI_CAST_PTR (UINT8, (b)))
+#define ACPI_PTR_DIFF(a, b)             ((ACPI_SIZE) (ACPI_CAST_PTR (UINT8, (a)) - ACPI_CAST_PTR (UINT8, (b))))
 
 /* Pointer/Integer type conversions */
 
-#define ACPI_TO_POINTER(i)              ACPI_ADD_PTR (void, (void *) NULL,(ACPI_SIZE) i)
-#define ACPI_TO_INTEGER(p)              ACPI_PTR_DIFF (p, (void *) NULL)
-#define ACPI_OFFSET(d, f)               ACPI_PTR_DIFF (&(((d *) 0)->f), (void *) NULL)
+#define ACPI_TO_POINTER(i)              ACPI_ADD_PTR (void, (void *) 0, (ACPI_SIZE) (i))
+#define ACPI_TO_INTEGER(p)              ACPI_PTR_DIFF (p, (void *) 0)
+#define ACPI_OFFSET(d, f)               ACPI_PTR_DIFF (&(((d *) 0)->f), (void *) 0)
 #define ACPI_PHYSADDR_TO_PTR(i)         ACPI_TO_POINTER(i)
 #define ACPI_PTR_TO_PHYSADDR(i)         ACPI_TO_INTEGER(i)
 
diff --git a/sys/contrib/dev/acpica/include/acutils.h b/sys/contrib/dev/acpica/include/acutils.h
index f28e039a727..10600b60375 100644
--- a/sys/contrib/dev/acpica/include/acutils.h
+++ b/sys/contrib/dev/acpica/include/acutils.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
@@ -1052,7 +1052,7 @@ void
 AcpiUtRepairName (
     char                    *Name);
 
-#if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION)
+#if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION) || defined (ACPI_DEBUG_OUTPUT)
 BOOLEAN
 AcpiUtSafeStrcpy (
     char                    *Dest,
diff --git a/sys/contrib/dev/acpica/include/acuuid.h b/sys/contrib/dev/acpica/include/acuuid.h
index ff0f0126310..9b8ba69a75a 100644
--- a/sys/contrib/dev/acpica/include/acuuid.h
+++ b/sys/contrib/dev/acpica/include/acuuid.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/amlcode.h b/sys/contrib/dev/acpica/include/amlcode.h
index 9236eedbb03..3b27c92ecbf 100644
--- a/sys/contrib/dev/acpica/include/amlcode.h
+++ b/sys/contrib/dev/acpica/include/amlcode.h
@@ -10,7 +10,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/amlresrc.h b/sys/contrib/dev/acpica/include/amlresrc.h
index 5f0bcc4bf5b..e9ee7945dc1 100644
--- a/sys/contrib/dev/acpica/include/amlresrc.h
+++ b/sys/contrib/dev/acpica/include/amlresrc.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/platform/acenv.h b/sys/contrib/dev/acpica/include/platform/acenv.h
index c37ba819a17..07abd49ad1a 100644
--- a/sys/contrib/dev/acpica/include/platform/acenv.h
+++ b/sys/contrib/dev/acpica/include/platform/acenv.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/platform/acenvex.h b/sys/contrib/dev/acpica/include/platform/acenvex.h
index 25b644d5fe8..65573d7a196 100644
--- a/sys/contrib/dev/acpica/include/platform/acenvex.h
+++ b/sys/contrib/dev/acpica/include/platform/acenvex.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/platform/acfreebsd.h b/sys/contrib/dev/acpica/include/platform/acfreebsd.h
index dc8aaa053ff..905dffb7a40 100644
--- a/sys/contrib/dev/acpica/include/platform/acfreebsd.h
+++ b/sys/contrib/dev/acpica/include/platform/acfreebsd.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/platform/acgcc.h b/sys/contrib/dev/acpica/include/platform/acgcc.h
index fcb1fa6c8b4..6e04acfbad7 100644
--- a/sys/contrib/dev/acpica/include/platform/acgcc.h
+++ b/sys/contrib/dev/acpica/include/platform/acgcc.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/include/platform/acgccex.h b/sys/contrib/dev/acpica/include/platform/acgccex.h
index 0a7b51cc165..f262c722311 100644
--- a/sys/contrib/dev/acpica/include/platform/acgccex.h
+++ b/sys/contrib/dev/acpica/include/platform/acgccex.h
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/dev/acpica/os_specific/service_layers/osunixxf.c b/sys/contrib/dev/acpica/os_specific/service_layers/osunixxf.c
index 1b96e8832bf..25aa5e3bbfb 100644
--- a/sys/contrib/dev/acpica/os_specific/service_layers/osunixxf.c
+++ b/sys/contrib/dev/acpica/os_specific/service_layers/osunixxf.c
@@ -8,7 +8,7 @@
  *
  * 1. Copyright Notice
  *
- * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
+ * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
  * All rights reserved.
  *
  * 2. License
diff --git a/sys/contrib/ipfilter/netinet/ip_state.c b/sys/contrib/ipfilter/netinet/ip_state.c
index 35ef8c0ac56..17eab661915 100644
--- a/sys/contrib/ipfilter/netinet/ip_state.c
+++ b/sys/contrib/ipfilter/netinet/ip_state.c
@@ -483,7 +483,7 @@ ipf_state_soft_fini(softc, arg)
 
 
 /* ------------------------------------------------------------------------ */
-/* Function:    ipf_state_set_lock                                          */
+/* Function:    ipf_state_setlock                                           */
 /* Returns:     Nil                                                         */
 /* Parameters:  arg(I) - pointer to local context to use                    */
 /*              tmp(I) - new value for lock                                 */
diff --git a/sys/dev/ahci/ahci_pci.c b/sys/dev/ahci/ahci_pci.c
index 00c3740bc5b..a9bb1750ba6 100644
--- a/sys/dev/ahci/ahci_pci.c
+++ b/sys/dev/ahci/ahci_pci.c
@@ -68,6 +68,7 @@ static const struct {
 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
 	/* Not sure SB8x0/SB9x0 needs this quirk. Be conservative though */
 	{0x43951002, 0x00, "AMD SB8x0/SB9x0",	AHCI_Q_ATI_PMP_BUG},
+	{0x43b61022, 0x00, "AMD X399",		0},
 	{0x43b71022, 0x00, "AMD 300 Series",	0},
 	{0x78001022, 0x00, "AMD Hudson-2",	0},
 	{0x78011022, 0x00, "AMD Hudson-2",	0},
diff --git a/sys/dev/ath/if_ath_beacon.c b/sys/dev/ath/if_ath_beacon.c
index ab88df548c5..509e24caf60 100644
--- a/sys/dev/ath/if_ath_beacon.c
+++ b/sys/dev/ath/if_ath_beacon.c
@@ -150,8 +150,12 @@ ath_beaconq_config(struct ath_softc *sc)
 		qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
 		qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
 	} else {
-		struct wmeParams *wmep =
-			&ic->ic_wme.wme_chanParams.cap_wmeParams[WME_AC_BE];
+		struct chanAccParams chp;
+		struct wmeParams *wmep;
+
+		ieee80211_wme_ic_getparams(ic, &chp);
+		wmep = &chp.cap_wmeParams[WME_AC_BE];
+
 		/*
 		 * Adhoc mode; important thing is to use 2x cwmin.
 		 */
diff --git a/sys/dev/ath/if_ath_btcoex.c b/sys/dev/ath/if_ath_btcoex.c
index da0603978e4..881a2c8acf9 100644
--- a/sys/dev/ath/if_ath_btcoex.c
+++ b/sys/dev/ath/if_ath_btcoex.c
@@ -459,7 +459,7 @@ ath_btcoex_ioctl(struct ath_softc *sc, struct ath_diag *ad)
 		 * pointer for us to use below in reclaiming the buffer;
 		 * may want to be more defensive.
 		 */
-		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
+		outdata = malloc(outsize, M_TEMP, M_NOWAIT | M_ZERO);
 		if (outdata == NULL) {
 			error = ENOMEM;
 			goto bad;
@@ -468,6 +468,7 @@ ath_btcoex_ioctl(struct ath_softc *sc, struct ath_diag *ad)
 	switch (id) {
 		default:
 			error = EINVAL;
+			goto bad;
 	}
 	if (outsize < ad->ad_out_size)
 		ad->ad_out_size = outsize;
diff --git a/sys/dev/ath/if_ath_ioctl.c b/sys/dev/ath/if_ath_ioctl.c
index a7ba0e42df3..37122c16fc0 100644
--- a/sys/dev/ath/if_ath_ioctl.c
+++ b/sys/dev/ath/if_ath_ioctl.c
@@ -197,7 +197,7 @@ ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
 		 * pointer for us to use below in reclaiming the buffer;
 		 * may want to be more defensive.
 		 */
-		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
+		outdata = malloc(outsize, M_TEMP, M_NOWAIT | M_ZERO);
 		if (outdata == NULL) {
 			error = ENOMEM;
 			goto bad;
diff --git a/sys/dev/ath/if_ath_lna_div.c b/sys/dev/ath/if_ath_lna_div.c
index aa4b9a2177c..7b970285b9b 100644
--- a/sys/dev/ath/if_ath_lna_div.c
+++ b/sys/dev/ath/if_ath_lna_div.c
@@ -189,7 +189,7 @@ ath_lna_div_ioctl(struct ath_softc *sc, struct ath_diag *ad)
 		 * pointer for us to use below in reclaiming the buffer;
 		 * may want to be more defensive.
 		 */
-		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
+		outdata = malloc(outsize, M_TEMP, M_NOWAIT | M_ZERO);
 		if (outdata == NULL) {
 			error = ENOMEM;
 			goto bad;
@@ -198,6 +198,7 @@ ath_lna_div_ioctl(struct ath_softc *sc, struct ath_diag *ad)
 	switch (id) {
 		default:
 			error = EINVAL;
+			goto bad;
 	}
 	if (outsize < ad->ad_out_size)
 		ad->ad_out_size = outsize;
diff --git a/sys/dev/ath/if_ath_spectral.c b/sys/dev/ath/if_ath_spectral.c
index ea82a7ae09e..eaf91b9b1ca 100644
--- a/sys/dev/ath/if_ath_spectral.c
+++ b/sys/dev/ath/if_ath_spectral.c
@@ -219,7 +219,7 @@ ath_ioctl_spectral(struct ath_softc *sc, struct ath_diag *ad)
 		 * pointer for us to use below in reclaiming the buffer;
 		 * may want to be more defensive.
 		 */
-		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
+		outdata = malloc(outsize, M_TEMP, M_NOWAIT | M_ZERO);
 		if (outdata == NULL) {
 			error = ENOMEM;
 			goto bad;
@@ -282,6 +282,7 @@ ath_ioctl_spectral(struct ath_softc *sc, struct ath_diag *ad)
 		break;
 		default:
 			error = EINVAL;
+			goto bad;
 	}
 	if (outsize < ad->ad_out_size)
 		ad->ad_out_size = outsize;
diff --git a/sys/dev/ath/if_ath_tx.c b/sys/dev/ath/if_ath_tx.c
index a0321a4ceb3..8d90a5d27fb 100644
--- a/sys/dev/ath/if_ath_tx.c
+++ b/sys/dev/ath/if_ath_tx.c
@@ -1554,7 +1554,6 @@ ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
 {
 	struct ieee80211vap *vap = ni->ni_vap;
 	struct ieee80211com *ic = &sc->sc_ic;
-	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
 	int error, iswep, ismcast, isfrag, ismrr;
 	int keyix, hdrlen, pktlen, try0 = 0;
 	u_int8_t rix = 0, txrate = 0;
@@ -1697,7 +1696,11 @@ ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
 			ismrr = 1;
 			bf->bf_state.bfs_doratelookup = 1;
 		}
-		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
+
+		/*
+		 * Check whether to set NOACK for this WME category or not.
+		 */
+		if (ieee80211_wme_vap_ac_is_noack(vap, pri))
 			flags |= HAL_TXDESC_NOACK;
 		break;
 	default:
diff --git a/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c b/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
index 85943306b80..7844c4e3613 100644
--- a/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
+++ b/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
@@ -2394,6 +2394,7 @@ bhnd_pmu_si_clock(struct bhnd_pmu_query *sc)
 		clock = bhnd_pmu1_cpuclk0(sc);
 		break;
 
+	case BHND_CHIPID_BCM4312:
 	case BHND_CHIPID_BCM4313:
 		/* 80MHz backplane clock */
 		clock = 80000 * 1000;
diff --git a/sys/dev/bwn/if_bwn.c b/sys/dev/bwn/if_bwn.c
index 91c63093afa..26e13e528f7 100644
--- a/sys/dev/bwn/if_bwn.c
+++ b/sys/dev/bwn/if_bwn.c
@@ -1755,15 +1755,18 @@ bwn_wme_update(struct ieee80211com *ic)
 {
 	struct bwn_softc *sc = ic->ic_softc;
 	struct bwn_mac *mac = sc->sc_curmac;
+	struct chanAccParams chp;
 	struct wmeParams *wmep;
 	int i;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	BWN_LOCK(sc);
 	mac = sc->sc_curmac;
 	if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
 		bwn_mac_suspend(mac);
 		for (i = 0; i < N(sc->sc_wmeParams); i++) {
-			wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[i];
+			wmep = &chp.cap_wmeParams[i];
 			bwn_wme_loadparams(mac, wmep, bwn_wme_shm_offsets[i]);
 		}
 		bwn_mac_enable(mac);
diff --git a/sys/dev/cpuctl/cpuctl.c b/sys/dev/cpuctl/cpuctl.c
index 3e1a76884f2..97847a40eb4 100644
--- a/sys/dev/cpuctl/cpuctl.c
+++ b/sys/dev/cpuctl/cpuctl.c
@@ -73,6 +73,7 @@ static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
     struct thread *td);
 static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
     struct thread *td);
+static int cpuctl_do_eval_cpu_features(int cpu, struct thread *td);
 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
     struct thread *td);
 static int update_intel(int cpu, cpuctl_update_args_t *args,
@@ -159,7 +160,8 @@ cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
 	}
 	/* Require write flag for "write" requests. */
 	if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT ||
-	    cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR) &&
+	    cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR ||
+	    cmd == CPUCTL_EVAL_CPU_FEATURES) &&
 	    (flags & FWRITE) == 0)
 		return (EPERM);
 	switch (cmd) {
@@ -187,6 +189,9 @@ cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
 		ret = cpuctl_do_cpuid_count(cpu,
 		    (cpuctl_cpuid_count_args_t *)data, td);
 		break;
+	case CPUCTL_EVAL_CPU_FEATURES:
+		ret = cpuctl_do_eval_cpu_features(cpu, td);
+		break;
 	default:
 		ret = EINVAL;
 		break;
@@ -504,6 +509,29 @@ update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
 	return (ret);
 }
 
+static int
+cpuctl_do_eval_cpu_features(int cpu, struct thread *td)
+{
+	int is_bound = 0;
+	int oldcpu;
+
+	KASSERT(cpu >= 0 && cpu <= mp_maxid,
+	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
+
+#ifdef __i386__
+	if (cpu_id == 0)
+		return (ENODEV);
+#endif
+	oldcpu = td->td_oncpu;
+	is_bound = cpu_sched_is_bound(td);
+	set_cpu(cpu, td);
+	identify_cpu1();
+	identify_cpu2();
+	restore_cpu(oldcpu, is_bound, td);
+	return (0);
+}
+
+
 int
 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
 {
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index cf9531c6d7c..74c3ded1c1a 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -63,6 +63,8 @@ __FBSDID("$FreeBSD$");
 #include <net/rss_config.h>
 #endif
 #if defined(__i386__) || defined(__amd64__)
+#include <machine/md_var.h>
+#include <machine/cputypes.h>
 #include <vm/vm.h>
 #include <vm/pmap.h>
 #endif
@@ -454,6 +456,16 @@ TUNABLE_INT("hw.cxl.write_combine", &t5_write_combine);
 
 static int t4_num_vis = 1;
 TUNABLE_INT("hw.cxgbe.num_vis", &t4_num_vis);
+/*
+ * PCIe Relaxed Ordering.
+ * -1: driver should figure out a good value.
+ * 0: disable RO.
+ * 1: enable RO.
+ * 2: leave RO alone.
+ */
+static int pcie_relaxed_ordering = -1;
+TUNABLE_INT("hw.cxgbe.pcie_relaxed_ordering", &pcie_relaxed_ordering);
+
 
 /* Functions used by VIs to obtain unique MAC addresses for each VI. */
 static int vi_mac_funcs[] = {
@@ -856,10 +868,16 @@ t4_attach(device_t dev)
 
 		pci_set_max_read_req(dev, 4096);
 		v = pci_read_config(dev, i + PCIER_DEVICE_CTL, 2);
-		v |= PCIEM_CTL_RELAXED_ORD_ENABLE;
-		pci_write_config(dev, i + PCIER_DEVICE_CTL, v, 2);
-
 		sc->params.pci.mps = 128 << ((v & PCIEM_CTL_MAX_PAYLOAD) >> 5);
+		if (pcie_relaxed_ordering == 0 &&
+		    (v | PCIEM_CTL_RELAXED_ORD_ENABLE) != 0) {
+			v &= ~PCIEM_CTL_RELAXED_ORD_ENABLE;
+			pci_write_config(dev, i + PCIER_DEVICE_CTL, v, 2);
+		} else if (pcie_relaxed_ordering == 1 &&
+		    (v & PCIEM_CTL_RELAXED_ORD_ENABLE) == 0) {
+			v |= PCIEM_CTL_RELAXED_ORD_ENABLE;
+			pci_write_config(dev, i + PCIER_DEVICE_CTL, v, 2);
+		}
 	}
 
 	sc->sge_gts_reg = MYPF_REG(A_SGE_PF_GTS);
@@ -9962,6 +9980,14 @@ tweak_tunables(void)
 		t4_num_vis = nitems(vi_mac_funcs);
 		printf("cxgbe: number of VIs limited to %d\n", t4_num_vis);
 	}
+
+	if (pcie_relaxed_ordering < 0 || pcie_relaxed_ordering > 2) {
+		pcie_relaxed_ordering = 1;
+#if defined(__i386__) || defined(__amd64__)
+		if (cpu_vendor_id == CPU_VENDOR_INTEL)
+			pcie_relaxed_ordering = 0;
+#endif
+	}
 }
 
 #ifdef DDB
diff --git a/sys/i386/isa/elink.c b/sys/dev/ep/elink.c
similarity index 96%
rename from sys/i386/isa/elink.c
rename to sys/dev/ep/elink.c
index 852134d6c46..1e1589a853d 100644
--- a/sys/i386/isa/elink.c
+++ b/sys/dev/ep/elink.c
@@ -1,5 +1,3 @@
-/*	$NetBSD: elink.c,v 1.6 1995/01/07 21:37:54 mycroft Exp $	*/
-
 /*-
  * SPDX-License-Identifier: BSD-4-Clause
  *
@@ -29,6 +27,8 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: elink.c,v 1.6 1995/01/07 21:37:54 mycroft Exp $
  */
 
 #include <sys/cdefs.h>
@@ -45,7 +45,7 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/cpufunc.h>
 
-#include <i386/isa/elink.h>
+#include <dev/ep/elink.h>
 
 /*
  * Issue a `global reset' to all cards, and reset the ID state machines.  We
diff --git a/sys/i386/isa/elink.h b/sys/dev/ep/elink.h
similarity index 96%
rename from sys/i386/isa/elink.h
rename to sys/dev/ep/elink.h
index 1a78bd41d34..070205d7f9d 100644
--- a/sys/i386/isa/elink.h
+++ b/sys/dev/ep/elink.h
@@ -1,5 +1,3 @@
-/*	$NetBSD: elink.h,v 1.3 1994/10/27 04:17:11 cgd Exp $	*/
-
 /*-
  * SPDX-License-Identifier: BSD-4-Clause
  *
@@ -30,6 +28,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
+ * $NetBSD: elink.h,v 1.3 1994/10/27 04:17:11 cgd Exp $
  * $FreeBSD$
  */
 
diff --git a/sys/dev/ep/if_ep_isa.c b/sys/dev/ep/if_ep_isa.c
index 6e858edf85f..32ed8e2db88 100644
--- a/sys/dev/ep/if_ep_isa.c
+++ b/sys/dev/ep/if_ep_isa.c
@@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ep/if_epvar.h>
 
 #ifdef __i386__
-#include <i386/isa/elink.h>
+#include <dev/ep/elink.h>
 #endif
 
 #ifdef __i386__
diff --git a/sys/dev/extres/syscon/syscon_generic.c b/sys/dev/extres/syscon/syscon_generic.c
index 04b0343f181..f0b6b27a04b 100644
--- a/sys/dev/extres/syscon/syscon_generic.c
+++ b/sys/dev/extres/syscon/syscon_generic.c
@@ -207,5 +207,5 @@ DEFINE_CLASS_0(syscon_generic, syscon_generic_driver, syscon_generic_dmethods,
     sizeof(struct syscon_generic_softc));
 static devclass_t syscon_generic_devclass;
 EARLY_DRIVER_MODULE(syscon_generic, simplebus, syscon_generic_driver,
-    syscon_generic_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_LATE);
+    syscon_generic_devclass, 0, 0, BUS_PASS_DEFAULT + BUS_PASS_ORDER_FIRST);
 MODULE_VERSION(syscon_generic, 1);
diff --git a/sys/dev/hpt27xx/hpt27xx_osm_bsd.c b/sys/dev/hpt27xx/hpt27xx_osm_bsd.c
index d8389d85252..aa7c14e68d8 100644
--- a/sys/dev/hpt27xx/hpt27xx_osm_bsd.c
+++ b/sys/dev/hpt27xx/hpt27xx_osm_bsd.c
@@ -1404,7 +1404,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 {
 	PHPT_IOCTL_PARAM piop=(PHPT_IOCTL_PARAM)data;
 	IOCTL_ARG ioctl_args;
-	HPT_U32 bytesReturned;
+	HPT_U32 bytesReturned = 0;
 
 	switch (cmd){
 	case HPT_DO_IOCONTROL:
@@ -1434,7 +1434,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 		}
 	
 		if (ioctl_args.nOutBufferSize) {
-			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK);
+			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK | M_ZERO);
 			if (!ioctl_args.lpOutBuffer)
 				goto invalid;
 		}
diff --git a/sys/dev/hptnr/hptnr_osm_bsd.c b/sys/dev/hptnr/hptnr_osm_bsd.c
index 0fd09ee93a6..8afd3e22d2e 100644
--- a/sys/dev/hptnr/hptnr_osm_bsd.c
+++ b/sys/dev/hptnr/hptnr_osm_bsd.c
@@ -1586,7 +1586,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 {
 	PHPT_IOCTL_PARAM piop=(PHPT_IOCTL_PARAM)data;
 	IOCTL_ARG ioctl_args;
-	HPT_U32 bytesReturned;
+	HPT_U32 bytesReturned = 0;
 
 	switch (cmd){
 	case HPT_DO_IOCONTROL:
@@ -1616,7 +1616,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 		}
 	
 		if (ioctl_args.nOutBufferSize) {
-			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK);
+			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK | M_ZERO);
 			if (!ioctl_args.lpOutBuffer)
 				goto invalid;
 		}
diff --git a/sys/dev/hptrr/hptrr_osm_bsd.c b/sys/dev/hptrr/hptrr_osm_bsd.c
index 0078574b649..3fc13f65a98 100644
--- a/sys/dev/hptrr/hptrr_osm_bsd.c
+++ b/sys/dev/hptrr/hptrr_osm_bsd.c
@@ -1233,7 +1233,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 {
 	PHPT_IOCTL_PARAM piop=(PHPT_IOCTL_PARAM)data;
 	IOCTL_ARG ioctl_args;
-	HPT_U32 bytesReturned;
+	HPT_U32 bytesReturned = 0;
 
 	switch (cmd){
 	case HPT_DO_IOCONTROL:
@@ -1263,7 +1263,7 @@ static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, stru
 		}
 	
 		if (ioctl_args.nOutBufferSize) {
-			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK);
+			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK | M_ZERO);
 			if (!ioctl_args.lpOutBuffer)
 				goto invalid;
 		}
diff --git a/sys/dev/iwi/if_iwi.c b/sys/dev/iwi/if_iwi.c
index 90e9dd1a04d..43950a8c608 100644
--- a/sys/dev/iwi/if_iwi.c
+++ b/sys/dev/iwi/if_iwi.c
@@ -1050,12 +1050,15 @@ static int
 iwi_wme_setparams(struct iwi_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
+	struct chanAccParams chp;
 	const struct wmeParams *wmep;
 	int ac;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	for (ac = 0; ac < WME_NUM_AC; ac++) {
 		/* set WME values for current operating mode */
-		wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
+		wmep = &chp.cap_wmeParams[ac];
 		sc->wme[0].aifsn[ac] = wmep->wmep_aifsn;
 		sc->wme[0].cwmin[ac] = IWI_EXP2(wmep->wmep_logcwmin);
 		sc->wme[0].cwmax[ac] = IWI_EXP2(wmep->wmep_logcwmax);
@@ -1771,11 +1774,9 @@ iwi_tx_start(struct iwi_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
     int ac)
 {
 	struct ieee80211vap *vap = ni->ni_vap;
-	struct ieee80211com *ic = ni->ni_ic;
 	struct iwi_node *in = (struct iwi_node *)ni;
 	const struct ieee80211_frame *wh;
 	struct ieee80211_key *k;
-	const struct chanAccParams *cap;
 	struct iwi_tx_ring *txq = &sc->txq[ac];
 	struct iwi_tx_data *data;
 	struct iwi_tx_desc *desc;
@@ -1797,8 +1798,7 @@ iwi_tx_start(struct iwi_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
 		flags |= IWI_DATA_FLAG_SHPREAMBLE;
 	if (IEEE80211_QOS_HAS_SEQ(wh)) {
 		xflags |= IWI_DATA_XFLAG_QOS;
-		cap = &ic->ic_wme.wme_chanParams;
-		if (!cap->cap_wmeParams[ac].wmep_noackPolicy)
+		if (ieee80211_wme_vap_ac_is_noack(vap, ac))
 			flags &= ~IWI_DATA_FLAG_NEED_ACK;
 	}
 
diff --git a/sys/dev/iwm/if_iwm.c b/sys/dev/iwm/if_iwm.c
index 27258afe0c3..87c49e5be2f 100644
--- a/sys/dev/iwm/if_iwm.c
+++ b/sys/dev/iwm/if_iwm.c
@@ -6041,6 +6041,7 @@ iwm_wme_update(struct ieee80211com *ic)
 {
 #define IWM_EXP2(x)	((1 << (x)) - 1)	/* CWmin = 2^ECWmin - 1 */
 	struct iwm_softc *sc = ic->ic_softc;
+	struct chanAccParams chp;
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct iwm_vap *ivp = IWM_VAP(vap);
 	struct iwm_node *in;
@@ -6050,9 +6051,11 @@ iwm_wme_update(struct ieee80211com *ic)
 	if (vap == NULL)
 		return (0);
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	IEEE80211_LOCK(ic);
 	for (aci = 0; aci < WME_NUM_AC; aci++)
-		tmp[aci] = ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
+		tmp[aci] = chp.cap_wmeParams[aci];
 	IEEE80211_UNLOCK(ic);
 
 	IWM_LOCK(sc);
diff --git a/sys/dev/iwn/if_iwn.c b/sys/dev/iwn/if_iwn.c
index 65f1fa449e5..738ebb31a60 100644
--- a/sys/dev/iwn/if_iwn.c
+++ b/sys/dev/iwn/if_iwn.c
@@ -5301,17 +5301,19 @@ iwn_updateedca(struct ieee80211com *ic)
 #define IWN_EXP2(x)	((1 << (x)) - 1)	/* CWmin = 2^ECWmin - 1 */
 	struct iwn_softc *sc = ic->ic_softc;
 	struct iwn_edca_params cmd;
+	struct chanAccParams chp;
 	int aci;
 
 	DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	memset(&cmd, 0, sizeof cmd);
 	cmd.flags = htole32(IWN_EDCA_UPDATE);
 
 	IEEE80211_LOCK(ic);
 	for (aci = 0; aci < WME_NUM_AC; aci++) {
-		const struct wmeParams *ac =
-		    &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
+		const struct wmeParams *ac = &chp.cap_wmeParams[aci];
 		cmd.ac[aci].aifsn = ac->wmep_aifsn;
 		cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
 		cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
diff --git a/sys/dev/mmc/host/dwmmc.c b/sys/dev/mmc/host/dwmmc.c
index 80e71968618..600680d99b5 100644
--- a/sys/dev/mmc/host/dwmmc.c
+++ b/sys/dev/mmc/host/dwmmc.c
@@ -131,13 +131,6 @@ static struct resource_spec dwmmc_spec[] = {
 #define	HWTYPE_MASK		(0x0000ffff)
 #define	HWFLAG_MASK		(0xffff << 16)
 
-static struct ofw_compat_data compat_data[] = {
-	{"altr,socfpga-dw-mshc",	HWTYPE_ALTERA},
-	{"samsung,exynos5420-dw-mshc",	HWTYPE_EXYNOS},
-	{"rockchip,rk2928-dw-mshc",	HWTYPE_ROCKCHIP},
-	{NULL,				HWTYPE_NONE},
-};
-
 static void
 dwmmc_get1paddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
 {
@@ -448,52 +441,9 @@ parse_fdt(struct dwmmc_softc *sc)
 		sc->bus_hz = dts_value[0];
 	}
 
-	/*
-	 * Platform-specific stuff
-	 * XXX: Move to separate file
-	 */
-
-	if ((sc->hwtype & HWTYPE_MASK) != HWTYPE_EXYNOS)
-		return (0);
-
-	if ((len = OF_getproplen(node, "samsung,dw-mshc-ciu-div")) <= 0)
-		return (ENXIO);
-	OF_getencprop(node, "samsung,dw-mshc-ciu-div", dts_value, len);
-	sc->sdr_timing = (dts_value[0] << SDMMC_CLKSEL_DIVIDER_SHIFT);
-	sc->ddr_timing = (dts_value[0] << SDMMC_CLKSEL_DIVIDER_SHIFT);
-
-	if ((len = OF_getproplen(node, "samsung,dw-mshc-sdr-timing")) <= 0)
-		return (ENXIO);
-	OF_getencprop(node, "samsung,dw-mshc-sdr-timing", dts_value, len);
-	sc->sdr_timing |= ((dts_value[0] << SDMMC_CLKSEL_SAMPLE_SHIFT) |
-			  (dts_value[1] << SDMMC_CLKSEL_DRIVE_SHIFT));
-
-	if ((len = OF_getproplen(node, "samsung,dw-mshc-ddr-timing")) <= 0)
-		return (ENXIO);
-	OF_getencprop(node, "samsung,dw-mshc-ddr-timing", dts_value, len);
-	sc->ddr_timing |= ((dts_value[0] << SDMMC_CLKSEL_SAMPLE_SHIFT) |
-			  (dts_value[1] << SDMMC_CLKSEL_DRIVE_SHIFT));
-
 	return (0);
 }
 
-static int
-dwmmc_probe(device_t dev)
-{
-	uintptr_t hwtype;
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	hwtype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
-	if (hwtype == HWTYPE_NONE)
-		return (ENXIO);
-
-	device_set_desc(dev, "Synopsys DesignWare Mobile "
-				"Storage Host Controller");
-	return (BUS_PROBE_DEFAULT);
-}
-
 int
 dwmmc_attach(device_t dev)
 {
@@ -504,10 +454,6 @@ dwmmc_attach(device_t dev)
 	sc = device_get_softc(dev);
 
 	sc->dev = dev;
-	if (sc->hwtype == HWTYPE_NONE) {
-		sc->hwtype =
-		    ofw_bus_search_compatible(dev, compat_data)->ocd_data;
-	}
 
 	/* Why not to use Auto Stop? It save a hundred of irq per second */
 	sc->use_auto_stop = 1;
@@ -539,19 +485,6 @@ dwmmc_attach(device_t dev)
 	if (sc->desc_count == 0)
 		sc->desc_count = DESC_MAX;
 
-	if ((sc->hwtype & HWTYPE_MASK) == HWTYPE_ROCKCHIP) {
-		sc->use_pio = 1;
-		sc->pwren_inverted = 1;
-	} else if ((sc->hwtype & HWTYPE_MASK) == HWTYPE_EXYNOS) {
-		WRITE4(sc, EMMCP_MPSBEGIN0, 0);
-		WRITE4(sc, EMMCP_SEND0, 0);
-		WRITE4(sc, EMMCP_CTRL0, (MPSCTRL_SECURE_READ_BIT |
-					 MPSCTRL_SECURE_WRITE_BIT |
-					 MPSCTRL_NON_SECURE_READ_BIT |
-					 MPSCTRL_NON_SECURE_WRITE_BIT |
-					 MPSCTRL_VALID));
-	}
-
 	/* XXX: we support operation for slot index 0 only */
 	slot = 0;
 	if (sc->pwren_inverted) {
@@ -1154,9 +1087,6 @@ dwmmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
 }
 
 static device_method_t dwmmc_methods[] = {
-	DEVMETHOD(device_probe,		dwmmc_probe),
-	DEVMETHOD(device_attach,	dwmmc_attach),
-
 	/* Bus interface */
 	DEVMETHOD(bus_read_ivar,	dwmmc_read_ivar),
 	DEVMETHOD(bus_write_ivar,	dwmmc_write_ivar),
@@ -1171,16 +1101,5 @@ static device_method_t dwmmc_methods[] = {
 	DEVMETHOD_END
 };
 
-driver_t dwmmc_driver = {
-	"dwmmc",
-	dwmmc_methods,
-	sizeof(struct dwmmc_softc),
-};
-
-static devclass_t dwmmc_devclass;
-
-DRIVER_MODULE(dwmmc, simplebus, dwmmc_driver, dwmmc_devclass, NULL, NULL);
-DRIVER_MODULE(dwmmc, ofwbus, dwmmc_driver, dwmmc_devclass, NULL, NULL);
-#ifndef MMCCAM
-MMC_DECLARE_BRIDGE(dwmmc);
-#endif
+DEFINE_CLASS_0(dwmmc, dwmmc_driver, dwmmc_methods,
+    sizeof(struct dwmmc_softc));
diff --git a/sys/dev/mmc/host/dwmmc_altera.c b/sys/dev/mmc/host/dwmmc_altera.c
new file mode 100644
index 00000000000..5d2baf6c412
--- /dev/null
+++ b/sys/dev/mmc/host/dwmmc_altera.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2017 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+
+#include <machine/bus.h>
+
+#include <dev/mmc/bridge.h>
+
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/mmc/host/dwmmc_var.h>
+
+static struct ofw_compat_data compat_data[] = {
+	{"altr,socfpga-dw-mshc",	1},
+	{NULL,				0},
+};
+
+static int
+altera_dwmmc_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "Synopsys DesignWare Mobile "
+	    "Storage Host Controller (Altera)");
+
+	return (BUS_PROBE_VENDOR);
+}
+
+static int
+altera_dwmmc_attach(device_t dev)
+{
+	struct dwmmc_softc *sc;
+
+	sc = device_get_softc(dev);
+	sc->hwtype = HWTYPE_ALTERA;
+
+	return (dwmmc_attach(dev));
+}
+
+static device_method_t altera_dwmmc_methods[] = {
+	/* bus interface */
+	DEVMETHOD(device_probe, altera_dwmmc_probe),
+	DEVMETHOD(device_attach, altera_dwmmc_attach),
+
+	DEVMETHOD_END
+};
+
+static devclass_t altera_dwmmc_devclass;
+
+DEFINE_CLASS_1(altera_dwmmc, altera_dwmmc_driver, altera_dwmmc_methods,
+    sizeof(struct dwmmc_softc), dwmmc_driver);
+
+DRIVER_MODULE(altera_dwmmc, simplebus, altera_dwmmc_driver,
+    altera_dwmmc_devclass, 0, 0);
+DRIVER_MODULE(altera_dwmmc, ofwbus, altera_dwmmc_driver, altera_dwmmc_devclass
+    , NULL, NULL);
+#ifndef MMCCAM
+MMC_DECLARE_BRIDGE(altera_dwmmc);
+#endif
diff --git a/sys/dev/mmc/host/dwmmc_hisi.c b/sys/dev/mmc/host/dwmmc_hisi.c
index e39fa8f3aa5..5a135cb4933 100644
--- a/sys/dev/mmc/host/dwmmc_hisi.c
+++ b/sys/dev/mmc/host/dwmmc_hisi.c
@@ -92,5 +92,11 @@ static devclass_t hisi_dwmmc_devclass;
 
 DEFINE_CLASS_1(hisi_dwmmc, hisi_dwmmc_driver, hisi_dwmmc_methods,
     sizeof(struct dwmmc_softc), dwmmc_driver);
+
 DRIVER_MODULE(hisi_dwmmc, simplebus, hisi_dwmmc_driver,
     hisi_dwmmc_devclass, 0, 0);
+DRIVER_MODULE(hisi_dwmmc, ofwbus, hisi_dwmmc_driver, hisi_dwmmc_devclass
+    , NULL, NULL);
+#ifndef MMCCAM
+MMC_DECLARE_BRIDGE(hisi_dwmmc);
+#endif
diff --git a/sys/dev/mmc/host/dwmmc_rockchip.c b/sys/dev/mmc/host/dwmmc_rockchip.c
new file mode 100644
index 00000000000..01c353efe55
--- /dev/null
+++ b/sys/dev/mmc/host/dwmmc_rockchip.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2017 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+
+#include <machine/bus.h>
+
+#include <dev/mmc/bridge.h>
+
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/mmc/host/dwmmc_var.h>
+
+static struct ofw_compat_data compat_data[] = {
+	{"rockchip,rk2928-dw-mshc",	1},
+	{NULL,				0},
+};
+
+static int
+rockchip_dwmmc_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "Synopsys DesignWare Mobile "
+	    "Storage Host Controller (RockChip)");
+
+	return (BUS_PROBE_VENDOR);
+}
+
+static int
+rockchip_dwmmc_attach(device_t dev)
+{
+	struct dwmmc_softc *sc;
+
+	sc = device_get_softc(dev);
+	sc->hwtype = HWTYPE_ROCKCHIP;
+
+	sc->use_pio = 1;
+	sc->pwren_inverted = 1;
+
+	return (dwmmc_attach(dev));
+}
+
+static device_method_t rockchip_dwmmc_methods[] = {
+	/* bus interface */
+	DEVMETHOD(device_probe, rockchip_dwmmc_probe),
+	DEVMETHOD(device_attach, rockchip_dwmmc_attach),
+
+	DEVMETHOD_END
+};
+
+static devclass_t rockchip_dwmmc_devclass;
+
+DEFINE_CLASS_1(rockchip_dwmmc, rockchip_dwmmc_driver, rockchip_dwmmc_methods,
+    sizeof(struct dwmmc_softc), dwmmc_driver);
+
+DRIVER_MODULE(rockchip_dwmmc, simplebus, rockchip_dwmmc_driver,
+    rockchip_dwmmc_devclass, 0, 0);
+DRIVER_MODULE(rockchip_dwmmc, ofwbus, rockchip_dwmmc_driver,
+    rockchip_dwmmc_devclass, NULL, NULL);
+#ifndef MMCCAM
+MMC_DECLARE_BRIDGE(rockchip_dwmmc);
+#endif
diff --git a/sys/dev/mmc/host/dwmmc_samsung.c b/sys/dev/mmc/host/dwmmc_samsung.c
new file mode 100644
index 00000000000..0a6efe7b2e0
--- /dev/null
+++ b/sys/dev/mmc/host/dwmmc_samsung.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright 2017 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+
+#include <machine/bus.h>
+
+#include <dev/mmc/bridge.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/mmc/host/dwmmc_var.h>
+#include <dev/mmc/host/dwmmc_reg.h>
+
+#define	WRITE4(_sc, _reg, _val)		\
+	bus_write_4((_sc)->res[0], _reg, _val)
+
+static struct ofw_compat_data compat_data[] = {
+	{"samsung,exynos5420-dw-mshc",	1},
+	{NULL,				0},
+};
+
+static int
+samsung_dwmmc_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "Synopsys DesignWare Mobile "
+	    "Storage Host Controller (Samsung)");
+
+	return (BUS_PROBE_VENDOR);
+}
+
+static int
+samsung_dwmmc_attach(device_t dev)
+{
+	struct dwmmc_softc *sc;
+	pcell_t dts_value[3];
+	phandle_t node;
+	int len;
+
+	sc = device_get_softc(dev);
+	sc->hwtype = HWTYPE_EXYNOS;
+
+	if ((node = ofw_bus_get_node(sc->dev)) == -1)
+		return (ENXIO);
+
+	if ((len = OF_getproplen(node, "samsung,dw-mshc-ciu-div")) <= 0)
+		return (ENXIO);
+	OF_getencprop(node, "samsung,dw-mshc-ciu-div", dts_value, len);
+	sc->sdr_timing = (dts_value[0] << SDMMC_CLKSEL_DIVIDER_SHIFT);
+	sc->ddr_timing = (dts_value[0] << SDMMC_CLKSEL_DIVIDER_SHIFT);
+
+	if ((len = OF_getproplen(node, "samsung,dw-mshc-sdr-timing")) <= 0)
+		return (ENXIO);
+	OF_getencprop(node, "samsung,dw-mshc-sdr-timing", dts_value, len);
+	sc->sdr_timing |= ((dts_value[0] << SDMMC_CLKSEL_SAMPLE_SHIFT) |
+			  (dts_value[1] << SDMMC_CLKSEL_DRIVE_SHIFT));
+
+	if ((len = OF_getproplen(node, "samsung,dw-mshc-ddr-timing")) <= 0)
+		return (ENXIO);
+	OF_getencprop(node, "samsung,dw-mshc-ddr-timing", dts_value, len);
+	sc->ddr_timing |= ((dts_value[0] << SDMMC_CLKSEL_SAMPLE_SHIFT) |
+			  (dts_value[1] << SDMMC_CLKSEL_DRIVE_SHIFT));
+
+	WRITE4(sc, EMMCP_MPSBEGIN0, 0);
+	WRITE4(sc, EMMCP_SEND0, 0);
+	WRITE4(sc, EMMCP_CTRL0, (MPSCTRL_SECURE_READ_BIT |
+	    MPSCTRL_SECURE_WRITE_BIT |
+	    MPSCTRL_NON_SECURE_READ_BIT |
+	    MPSCTRL_NON_SECURE_WRITE_BIT |
+	    MPSCTRL_VALID));
+
+	return (dwmmc_attach(dev));
+}
+
+static device_method_t samsung_dwmmc_methods[] = {
+	/* bus interface */
+	DEVMETHOD(device_probe, samsung_dwmmc_probe),
+	DEVMETHOD(device_attach, samsung_dwmmc_attach),
+
+	DEVMETHOD_END
+};
+
+static devclass_t samsung_dwmmc_devclass;
+
+DEFINE_CLASS_1(samsung_dwmmc, samsung_dwmmc_driver, samsung_dwmmc_methods,
+    sizeof(struct dwmmc_softc), dwmmc_driver);
+
+DRIVER_MODULE(samsung_dwmmc, simplebus, samsung_dwmmc_driver,
+    samsung_dwmmc_devclass, 0, 0);
+DRIVER_MODULE(samsung_dwmmc, ofwbus, samsung_dwmmc_driver, samsung_dwmmc_devclass
+    , NULL, NULL);
+#ifndef MMCCAM
+MMC_DECLARE_BRIDGE(samsung_dwmmc);
+#endif
diff --git a/sys/dev/mmc/host/dwmmc_var.h b/sys/dev/mmc/host/dwmmc_var.h
index 034a07ea083..bbf3955fabc 100644
--- a/sys/dev/mmc/host/dwmmc_var.h
+++ b/sys/dev/mmc/host/dwmmc_var.h
@@ -74,7 +74,7 @@ struct dwmmc_softc {
 	uint32_t		ddr_timing;
 };
 
-extern driver_t dwmmc_driver;
+DECLARE_CLASS(dwmmc_driver);
 
 int dwmmc_attach(device_t);
 
diff --git a/sys/dev/mmc/mmcsd.c b/sys/dev/mmc/mmcsd.c
index 530dd27a43b..61680e1ea94 100644
--- a/sys/dev/mmc/mmcsd.c
+++ b/sys/dev/mmc/mmcsd.c
@@ -914,6 +914,16 @@ mmcsd_ioctl_cmd(struct mmcsd_part *part, struct mmc_ioc_cmd *mic, int fflag)
 		default:
 			break;
 		}
+		/*
+		 * No partition switching in userland; it's almost impossible
+		 * to recover from that, especially if things go wrong.
+		 */
+		if (cmd.opcode == MMC_SWITCH_FUNC && dp != NULL &&
+		    (((uint8_t *)dp)[EXT_CSD_PART_CONFIG] &
+		    EXT_CSD_PART_CONFIG_ACC_MASK) != sc->part_curr) {
+			err = EINVAL;
+			goto out;
+		}
 	}
 	dev = sc->dev;
 	mmcbus = sc->mmcbus;
@@ -934,7 +944,7 @@ mmcsd_ioctl_cmd(struct mmcsd_part *part, struct mmc_ioc_cmd *mic, int fflag)
 	if (part->type == EXT_CSD_PART_CONFIG_ACC_RPMB) {
 		/*
 		 * If the request went to the RPMB partition, try to ensure
-		 * that the command actually has completed ...
+		 * that the command actually has completed.
 		 */
 		retries = MMCSD_CMD_RETRIES;
 		do {
@@ -946,13 +956,6 @@ mmcsd_ioctl_cmd(struct mmcsd_part *part, struct mmc_ioc_cmd *mic, int fflag)
 				break;
 			DELAY(1000);
 		} while (retries-- > 0);
-
-switch_back:
-		/* ... and always switch back to the default partition. */
-		err = mmcsd_switch_part(mmcbus, dev, rca,
-		    EXT_CSD_PART_CONFIG_ACC_DEFAULT);
-		if (err != MMC_ERR_NONE)
-			goto release;
 	}
 	/*
 	 * If EXT_CSD was changed, our copy is outdated now.  Specifically,
@@ -964,6 +967,17 @@ mmcsd_ioctl_cmd(struct mmcsd_part *part, struct mmc_ioc_cmd *mic, int fflag)
 		if (err != MMC_ERR_NONE)
 			goto release;
 	}
+switch_back:
+	if (part->type == EXT_CSD_PART_CONFIG_ACC_RPMB) {
+		/*
+		 * If the request went to the RPMB partition, always switch
+		 * back to the default partition (see mmcsd_switch_part()).
+		 */
+		err = mmcsd_switch_part(mmcbus, dev, rca,
+		    EXT_CSD_PART_CONFIG_ACC_DEFAULT);
+		if (err != MMC_ERR_NONE)
+			goto release;
+	}
 	MMCBUS_RELEASE_BUS(mmcbus, dev);
 	if (cmd.error != MMC_ERR_NONE) {
 		switch (cmd.error) {
diff --git a/sys/dev/mwl/if_mwl.c b/sys/dev/mwl/if_mwl.c
index f607195fa20..e1ec1829408 100644
--- a/sys/dev/mwl/if_mwl.c
+++ b/sys/dev/mwl/if_mwl.c
@@ -2893,11 +2893,15 @@ mwl_txq_update(struct mwl_softc *sc, int ac)
 {
 #define	MWL_EXPONENT_TO_VALUE(v)	((1<<v)-1)
 	struct ieee80211com *ic = &sc->sc_ic;
+	struct chanAccParams chp;
 	struct mwl_txq *txq = sc->sc_ac2q[ac];
-	struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
+	struct wmeParams *wmep;
 	struct mwl_hal *mh = sc->sc_mh;
 	int aifs, cwmin, cwmax, txoplim;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+	wmep = &chp.cap_wmeParams[ac];
+
 	aifs = wmep->wmep_aifsn;
 	/* XXX in sta mode need to pass log values for cwmin/max */
 	cwmin = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
diff --git a/sys/dev/nctgpio/nctgpio.c b/sys/dev/nctgpio/nctgpio.c
index 30c364f1ebb..e0edbd975f8 100644
--- a/sys/dev/nctgpio/nctgpio.c
+++ b/sys/dev/nctgpio/nctgpio.c
@@ -140,6 +140,10 @@ struct nuvoton_vendor_device_id {
 		.chip_id	= 0xc452,
 		.descr		= "Nuvoton NCT5104D (PC-Engines APU)",
 	},
+	{
+		.chip_id	= 0xc453,
+		.descr		= "Nuvoton NCT5104D (PC-Engines APU3)",
+	},
 };
 
 static void
diff --git a/sys/dev/ofw/ofw_fdt.c b/sys/dev/ofw/ofw_fdt.c
index 9b3507f4e92..f51581bf3ca 100644
--- a/sys/dev/ofw/ofw_fdt.c
+++ b/sys/dev/ofw/ofw_fdt.c
@@ -248,7 +248,7 @@ ofw_fdt_instance_to_package(ofw_t ofw, ihandle_t instance)
 static ssize_t
 ofw_fdt_getproplen(ofw_t ofw, phandle_t package, const char *propname)
 {
-	const struct fdt_property *prop;
+	const void *prop;
 	int offset, len;
 
 	offset = fdt_phandle_offset(package);
@@ -256,7 +256,7 @@ ofw_fdt_getproplen(ofw_t ofw, phandle_t package, const char *propname)
 		return (-1);
 
 	len = -1;
-	prop = fdt_get_property(fdtp, offset, propname, &len);
+	prop = fdt_getprop(fdtp, offset, propname, &len);
 
 	if (prop == NULL && strcmp(propname, "name") == 0) {
 		/* Emulate the 'name' property */
@@ -333,7 +333,7 @@ static int
 ofw_fdt_nextprop(ofw_t ofw, phandle_t package, const char *previous, char *buf,
     size_t size)
 {
-	const struct fdt_property *prop;
+	const void *prop;
 	const char *name;
 	int offset;
 
@@ -348,7 +348,7 @@ ofw_fdt_nextprop(ofw_t ofw, phandle_t package, const char *previous, char *buf,
 
 	if (previous != NULL) {
 		while (offset >= 0) {
-			prop = fdt_get_property_by_offset(fdtp, offset, NULL);
+			prop = fdt_getprop_by_offset(fdtp, offset, &name, NULL);
 			if (prop == NULL)
 				return (-1); /* Internal error */
 
@@ -357,17 +357,16 @@ ofw_fdt_nextprop(ofw_t ofw, phandle_t package, const char *previous, char *buf,
 				return (0); /* No more properties */
 
 			/* Check if the last one was the one we wanted */
-			name = fdt_string(fdtp, fdt32_to_cpu(prop->nameoff));
 			if (strcmp(name, previous) == 0)
 				break;
 		}
 	}
 
-	prop = fdt_get_property_by_offset(fdtp, offset, &offset);
+	prop = fdt_getprop_by_offset(fdtp, offset, &name, &offset);
 	if (prop == NULL)
 		return (-1); /* Internal error */
 
-	strncpy(buf, fdt_string(fdtp, fdt32_to_cpu(prop->nameoff)), size);
+	strncpy(buf, name, size);
 
 	return (1);
 }
diff --git a/sys/dev/otus/if_otus.c b/sys/dev/otus/if_otus.c
index ae7ccacfc55..0afedf76a26 100644
--- a/sys/dev/otus/if_otus.c
+++ b/sys/dev/otus/if_otus.c
@@ -2392,12 +2392,15 @@ otus_updateedca_locked(struct otus_softc *sc)
 {
 #define EXP2(val)	((1 << (val)) - 1)
 #define AIFS(val)	((val) * 9 + 10)
+	struct chanAccParams chp;
 	struct ieee80211com *ic = &sc->sc_ic;
 	const struct wmeParams *edca;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	OTUS_LOCK_ASSERT(sc);
 
-	edca = ic->ic_wme.wme_chanParams.cap_wmeParams;
+	edca = chp.cap_wmeParams;
 
 	/* Set CWmin/CWmax values. */
 	otus_write(sc, AR_MAC_REG_AC0_CW,
diff --git a/sys/dev/ral/rt2661.c b/sys/dev/ral/rt2661.c
index 85112923ccd..aab385a5855 100644
--- a/sys/dev/ral/rt2661.c
+++ b/sys/dev/ral/rt2661.c
@@ -1437,7 +1437,6 @@ rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
 	struct ieee80211_frame *wh;
 	const struct ieee80211_txparam *tp = ni->ni_txparms;
 	struct ieee80211_key *k;
-	const struct chanAccParams *cap;
 	struct mbuf *mnew;
 	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
 	uint16_t dur;
@@ -1458,10 +1457,8 @@ rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
 	}
 	rate &= IEEE80211_RATE_VAL;
 
-	if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
-		cap = &ic->ic_wme.wme_chanParams;
-		noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
-	}
+	if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS)
+		noack = !! ieee80211_wme_vap_ac_is_noack(vap, ac);
 
 	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
 		k = ieee80211_crypto_encap(ni, m0);
@@ -2045,9 +2042,12 @@ static int
 rt2661_wme_update(struct ieee80211com *ic)
 {
 	struct rt2661_softc *sc = ic->ic_softc;
+	struct chanAccParams chp;
 	const struct wmeParams *wmep;
 
-	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
+	ieee80211_wme_ic_getparams(ic, &chp);
+
+	wmep = chp.cap_wmeParams;
 
 	/* XXX: not sure about shifts. */
 	/* XXX: the reference driver plays with AC_VI settings too. */
diff --git a/sys/dev/ral/rt2860.c b/sys/dev/ral/rt2860.c
index 8eb2e3b4ee5..7130ecee1e9 100644
--- a/sys/dev/ral/rt2860.c
+++ b/sys/dev/ral/rt2860.c
@@ -3115,10 +3115,13 @@ static int
 rt2860_updateedca(struct ieee80211com *ic)
 {
 	struct rt2860_softc *sc = ic->ic_softc;
+	struct chanAccParams chp;
 	const struct wmeParams *wmep;
 	int aci;
 
-	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
+	ieee80211_wme_ic_getparams(ic, &chp);
+
+	wmep = chp.cap_wmeParams;
 
 	/* update MAC TX configuration registers */
 	for (aci = 0; aci < WME_NUM_AC; aci++) {
diff --git a/sys/dev/rtwn/if_rtwn.c b/sys/dev/rtwn/if_rtwn.c
index 424d8a94792..78d9996b289 100644
--- a/sys/dev/rtwn/if_rtwn.c
+++ b/sys/dev/rtwn/if_rtwn.c
@@ -1574,17 +1574,19 @@ rtwn_set_channel(struct ieee80211com *ic)
 static int
 rtwn_wme_update(struct ieee80211com *ic)
 {
+	struct chanAccParams chp;
 	struct ieee80211_channel *c = ic->ic_curchan;
 	struct rtwn_softc *sc = ic->ic_softc;
 	struct wmeParams *wmep = sc->cap_wmeParams;
 	uint8_t aifs, acm, slottime;
 	int ac;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	/* Prevent possible races. */
 	IEEE80211_LOCK(ic);	/* XXX */
 	RTWN_LOCK(sc);
-	memcpy(wmep, ic->ic_wme.wme_chanParams.cap_wmeParams,
-	    sizeof(sc->cap_wmeParams));
+	memcpy(wmep, chp.cap_wmeParams, sizeof(sc->cap_wmeParams));
 	RTWN_UNLOCK(sc);
 	IEEE80211_UNLOCK(ic);
 
diff --git a/sys/dev/usb/controller/xhci_pci.c b/sys/dev/usb/controller/xhci_pci.c
index 6c93c12c426..5a65e5602f3 100644
--- a/sys/dev/usb/controller/xhci_pci.c
+++ b/sys/dev/usb/controller/xhci_pci.c
@@ -99,6 +99,8 @@ xhci_pci_match(device_t self)
 	switch (device_id) {
 	case 0x145c1022:
 		return ("AMD KERNCZ USB 3.0 controller");
+	case 0x43ba1022:
+		return ("AMD X399 USB 3.0 controller");
 	case 0x43bb1022:
 		return ("AMD 300 Series USB 3.0 controller");
 	case 0x78141022:
diff --git a/sys/dev/usb/wlan/if_rum.c b/sys/dev/usb/wlan/if_rum.c
index 232f0dac5de..152d9d80c44 100644
--- a/sys/dev/usb/wlan/if_rum.c
+++ b/sys/dev/usb/wlan/if_rum.c
@@ -2301,11 +2301,14 @@ rum_update_slot(struct ieee80211com *ic)
 static int
 rum_wme_update(struct ieee80211com *ic)
 {
-	const struct wmeParams *chanp =
-	    ic->ic_wme.wme_chanParams.cap_wmeParams;
+	struct chanAccParams chp;
+	const struct wmeParams *chanp;
 	struct rum_softc *sc = ic->ic_softc;
 	int error = 0;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+	chanp = chp.cap_wmeParams;
+
 	RUM_LOCK(sc);
 	error = rum_write(sc, RT2573_AIFSN_CSR,
 	    chanp[WME_AC_VO].wmep_aifsn  << 12 |
diff --git a/sys/dev/usb/wlan/if_run.c b/sys/dev/usb/wlan/if_run.c
index 7c7489dca81..b40e4d2ff85 100644
--- a/sys/dev/usb/wlan/if_run.c
+++ b/sys/dev/usb/wlan/if_run.c
@@ -2217,11 +2217,14 @@ run_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 static int
 run_wme_update(struct ieee80211com *ic)
 {
+	struct chanAccParams chp;
 	struct run_softc *sc = ic->ic_softc;
-	const struct wmeParams *ac =
-	    ic->ic_wme.wme_chanParams.cap_wmeParams;
+	const struct wmeParams *ac;
 	int aci, error = 0;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+	ac = chp.cap_wmeParams;
+
 	/* update MAC TX configuration registers */
 	RUN_LOCK(sc);
 	for (aci = 0; aci < WME_NUM_AC; aci++) {
diff --git a/sys/dev/vt/colors/vt_termcolors.c b/sys/dev/vt/colors/vt_termcolors.c
index aa42efe89e7..fabec41387c 100644
--- a/sys/dev/vt/colors/vt_termcolors.c
+++ b/sys/dev/vt/colors/vt_termcolors.c
@@ -33,14 +33,18 @@
 __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/libkern.h>
 
 #include <dev/vt/colors/vt_termcolors.h>
 
-static const struct {
+#define NCOLORS	16
+
+static struct {
 	unsigned char r;	/* Red percentage value. */
 	unsigned char g;	/* Green percentage value. */
 	unsigned char b;	/* Blue percentage value. */
-} color_def[16] = {
+} color_def[NCOLORS] = {
 	{0,	0,	0},	/* black */
 	{50,	0,	0},	/* dark red */
 	{0,	50,	0},	/* dark green */
@@ -65,19 +69,112 @@ static const struct {
  *   - blue and red are swapped (1 <-> 4)
  *   - yellow ad cyan are swapped (3 <-> 6)
  */
-static const int cons_to_vga_colors[16] = {
+static const int cons_to_vga_colors[NCOLORS] = {
 	0, 4, 2, 6, 1, 5, 3, 7,
 	0, 4, 2, 6, 1, 5, 3, 7
 };
 
+static int
+vt_parse_rgb_triplet(const char *rgb, unsigned char *r,
+    unsigned char *g, unsigned char *b)
+{
+	unsigned long v;
+	const char *ptr;
+	char *endptr;
+
+	ptr = rgb;
+
+	/* Handle #rrggbb case */
+	if (*ptr == '#') {
+		if (strlen(ptr) != 7)
+			return (-1);
+		v = strtoul(ptr + 1, &endptr, 16);
+		if (*endptr != '\0')
+			return (-1);
+
+		*r = (v >> 16) & 0xff;
+		*g = (v >>  8) & 0xff;
+		*b = v & 0xff;
+
+		return (0);
+	}
+
+	/* "r, g, b" case */
+	v = strtoul(ptr, &endptr, 10);
+	if (ptr == endptr)
+		return (-1);
+	if (v > 255)
+		return (-1);
+	*r = v & 0xff;
+	ptr = endptr;
+
+	/* skip separator */
+	while (*ptr == ',' || *ptr == ' ')
+		ptr++;
+
+	v = strtoul(ptr, &endptr, 10);
+	if (ptr == endptr)
+		return (-1);
+	if (v > 255)
+		return (-1);
+	*g = v & 0xff;
+	ptr = endptr;
+
+	/* skip separator */
+	while (*ptr == ',' || *ptr == ' ')
+		ptr++;
+
+	v = strtoul(ptr, &endptr, 10);
+	if (ptr == endptr)
+		return (-1);
+	if (v > 255)
+		return (-1);
+	*b = v & 0xff;
+	ptr = endptr;
+
+	/* skip trailing spaces */
+	while (*ptr == ' ')
+		ptr++;
+
+	/* unexpected characters at the end of the string */
+	if (*ptr != 0)
+		return (-1);
+
+	return (0);
+}
+
+static void
+vt_palette_init(void)
+{
+	int i;
+	char rgb[32];
+	char tunable[32];
+	unsigned char r, g, b;
+
+	for (i = 0; i < NCOLORS; i++) {
+		snprintf(tunable, sizeof(tunable),
+		    "kern.vt.color.%d.rgb", i);
+		if (TUNABLE_STR_FETCH(tunable, rgb, sizeof(rgb))) {
+			if (vt_parse_rgb_triplet(rgb, &r, &g, &b) == 0) {
+				/* convert to percentages */
+				color_def[i].r = r*100/255;
+				color_def[i].g = g*100/255;
+				color_def[i].b = b*100/255;
+			}
+		}
+	}
+}
+
 int
 vt_generate_cons_palette(uint32_t *palette, int format, uint32_t rmax,
     int roffset, uint32_t gmax, int goffset, uint32_t bmax, int boffset)
 {
 	int i;
 
+	vt_palette_init();
+
 #define	CF(_f, _i) ((_f ## max * color_def[(_i)]._f / 100) << _f ## offset)
-	for (i = 0; i < 16; i++) {
+	for (i = 0; i < NCOLORS; i++) {
 		switch (format) {
 		case COLOR_FORMAT_VGA:
 			palette[i] = cons_to_vga_colors[i];
diff --git a/sys/dev/vt/hw/ofwfb/ofwfb.c b/sys/dev/vt/hw/ofwfb/ofwfb.c
index 5c9c0695ce9..b974803bffe 100644
--- a/sys/dev/vt/hw/ofwfb/ofwfb.c
+++ b/sys/dev/vt/hw/ofwfb/ofwfb.c
@@ -94,8 +94,13 @@ ofwfb_probe(struct vt_device *vd)
 	char type[64];
 
 	chosen = OF_finddevice("/chosen");
-	OF_getprop(chosen, "stdout", &stdout, sizeof(stdout));
-	node = OF_instance_to_package(stdout);
+	if (chosen == -1)
+		return (CN_DEAD);
+
+	node = -1;
+	if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) ==
+	    sizeof(stdout))
+		node = OF_instance_to_package(stdout);
 	if (node == -1) {
 		/*
 		 * The "/chosen/stdout" does not exist try
diff --git a/sys/dev/watchdog/watchdog.c b/sys/dev/watchdog/watchdog.c
index 549298b1b46..44e2aaad1a3 100644
--- a/sys/dev/watchdog/watchdog.c
+++ b/sys/dev/watchdog/watchdog.c
@@ -78,6 +78,9 @@ SYSCTL_UINT(_hw_watchdog, OID_AUTO, wd_last_u_secs, CTLFLAG_RD,
 static int wd_lastpat_valid = 0;
 static time_t wd_lastpat = 0;	/* when the watchdog was last patted */
 
+/* Hook for external software watchdog to register for use if needed */
+void (*wdog_software_attach)(void);
+
 static void
 pow2ns_to_ts(int pow2ns, struct timespec *ts)
 {
@@ -120,6 +123,7 @@ int
 wdog_kern_pat(u_int utim)
 {
 	int error;
+	static int first = 1;
 
 	if ((utim & WD_LASTVAL) != 0 && (utim & WD_INTERVAL) > 0)
 		return (EINVAL);
@@ -161,6 +165,17 @@ wdog_kern_pat(u_int utim)
 	} else {
 		EVENTHANDLER_INVOKE(watchdog_list, utim, &error);
 	}
+	/*
+	 * If we no hardware watchdog responded, we have not tried to
+	 * attach an external software watchdog, and one is available,
+	 * attach it now and retry.
+	 */
+	if (error == EOPNOTSUPP && first && *wdog_software_attach != NULL) {
+		(*wdog_software_attach)();
+		EVENTHANDLER_INVOKE(watchdog_list, utim, &error);
+	}
+	first = 0;
+
 	wd_set_pretimeout(wd_pretimeout, true);
 	/*
 	 * If we were able to arm/strobe the watchdog, then
diff --git a/sys/dev/wpi/if_wpi.c b/sys/dev/wpi/if_wpi.c
index b4378d6eff4..b1198c96bbc 100644
--- a/sys/dev/wpi/if_wpi.c
+++ b/sys/dev/wpi/if_wpi.c
@@ -3521,16 +3521,18 @@ wpi_updateedca(struct ieee80211com *ic)
 {
 #define WPI_EXP2(x)	((1 << (x)) - 1)	/* CWmin = 2^ECWmin - 1 */
 	struct wpi_softc *sc = ic->ic_softc;
+	struct chanAccParams chp;
 	struct wpi_edca_params cmd;
 	int aci, error;
 
+	ieee80211_wme_ic_getparams(ic, &chp);
+
 	DPRINTF(sc, WPI_DEBUG_TRACE, TRACE_STR_BEGIN, __func__);
 
 	memset(&cmd, 0, sizeof cmd);
 	cmd.flags = htole32(WPI_EDCA_UPDATE);
 	for (aci = 0; aci < WME_NUM_AC; aci++) {
-		const struct wmeParams *ac =
-		    &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
+		const struct wmeParams *ac = &chp.cap_wmeParams[aci];
 		cmd.ac[aci].aifsn = ac->wmep_aifsn;
 		cmd.ac[aci].cwmin = htole16(WPI_EXP2(ac->wmep_logcwmin));
 		cmd.ac[aci].cwmax = htole16(WPI_EXP2(ac->wmep_logcwmax));
diff --git a/sys/fs/ext2fs/ext2_alloc.c b/sys/fs/ext2fs/ext2_alloc.c
index 85f61c0e8a9..8da86e63bbb 100644
--- a/sys/fs/ext2fs/ext2_alloc.c
+++ b/sys/fs/ext2fs/ext2_alloc.c
@@ -103,12 +103,12 @@ ext2_alloc(struct inode *ip, daddr_t lbn, e4fs_daddr_t bpref, int size,
 	if (cred == NOCRED)
 		panic("ext2_alloc: missing credential");
 #endif		/* INVARIANTS */
-	if (size == fs->e2fs_bsize && fs->e2fs->e2fs_fbcount == 0)
+	if (size == fs->e2fs_bsize && fs->e2fs_fbcount == 0)
 		goto nospace;
 	if (cred->cr_uid != 0 &&
-	    fs->e2fs->e2fs_fbcount < fs->e2fs->e2fs_rbcount)
+	    fs->e2fs_fbcount < fs->e2fs_rbcount)
 		goto nospace;
-	if (bpref >= fs->e2fs->e2fs_bcount)
+	if (bpref >= fs->e2fs_bcount)
 		bpref = 0;
 	if (bpref == 0)
 		cg = ino_to_cg(fs, ip->i_number);
@@ -454,6 +454,96 @@ printf("ext2_valloc: allocated inode %d\n", ino);
 	return (ENOSPC);
 }
 
+/*
+ * 64-bit compatible getters and setters for struct ext2_gd from ext2fs.h
+ */
+static uint64_t
+e2fs_gd_get_b_bitmap(struct ext2_gd *gd)
+{
+
+	return (((uint64_t)(gd->ext4bgd_b_bitmap_hi) << 32) |
+	    gd->ext2bgd_b_bitmap);
+}
+
+static uint64_t
+e2fs_gd_get_i_bitmap(struct ext2_gd *gd)
+{
+
+	return (((uint64_t)(gd->ext4bgd_i_bitmap_hi) << 32) |
+	    gd->ext2bgd_i_bitmap);
+}
+
+uint64_t
+e2fs_gd_get_i_tables(struct ext2_gd *gd)
+{
+
+	return (((uint64_t)(gd->ext4bgd_i_tables_hi) << 32) |
+	    gd->ext2bgd_i_tables);
+}
+
+static uint32_t
+e2fs_gd_get_nbfree(struct ext2_gd *gd)
+{
+
+	return (((uint32_t)(gd->ext4bgd_nbfree_hi) << 16) |
+	    gd->ext2bgd_nbfree);
+}
+
+static void
+e2fs_gd_set_nbfree(struct ext2_gd *gd, uint32_t val)
+{
+
+	gd->ext2bgd_nbfree = val & 0xffff;
+	gd->ext4bgd_nbfree_hi = val >> 16;
+}
+
+static uint32_t
+e2fs_gd_get_nifree(struct ext2_gd *gd)
+{
+
+	return (((uint32_t)(gd->ext4bgd_nifree_hi) << 16) |
+	    gd->ext2bgd_nifree);
+}
+
+static void
+e2fs_gd_set_nifree(struct ext2_gd *gd, uint32_t val)
+{
+
+	gd->ext2bgd_nifree = val & 0xffff;
+	gd->ext4bgd_nifree_hi = val >> 16;
+}
+
+uint32_t
+e2fs_gd_get_ndirs(struct ext2_gd *gd)
+{
+
+	return (((uint32_t)(gd->ext4bgd_ndirs_hi) << 16) |
+	    gd->ext2bgd_ndirs);
+}
+
+static void
+e2fs_gd_set_ndirs(struct ext2_gd *gd, uint32_t val)
+{
+
+	gd->ext2bgd_ndirs = val & 0xffff;
+	gd->ext4bgd_ndirs_hi = val >> 16;
+}
+
+static uint32_t
+e2fs_gd_get_i_unused(struct ext2_gd *gd)
+{
+	return (((uint32_t)(gd->ext4bgd_i_unused_hi) << 16) |
+	    gd->ext4bgd_i_unused);
+}
+
+static void
+e2fs_gd_set_i_unused(struct ext2_gd *gd, uint32_t val)
+{
+
+	gd->ext4bgd_i_unused = val & 0xffff;
+	gd->ext4bgd_i_unused_hi = val >> 16;
+}
+
 /*
  * Find a cylinder to place a directory.
  *
@@ -473,8 +563,9 @@ ext2_dirpref(struct inode *pip)
 {
 	struct m_ext2fs *fs;
 	int cg, prefcg, cgsize;
-	u_int avgifree, avgbfree, avgndir, curdirsize;
-	u_int minifree, minbfree, maxndir;
+	uint64_t avgbfree, minbfree;
+	u_int avgifree, avgndir, curdirsize;
+	u_int minifree, maxndir;
 	u_int mincg, minndir;
 	u_int dirsize, maxcontigdirs;
 
@@ -482,7 +573,7 @@ ext2_dirpref(struct inode *pip)
 	fs = pip->i_e2fs;
 
 	avgifree = fs->e2fs->e2fs_ficount / fs->e2fs_gcount;
-	avgbfree = fs->e2fs->e2fs_fbcount / fs->e2fs_gcount;
+	avgbfree = fs->e2fs_fbcount / fs->e2fs_gcount;
 	avgndir = fs->e2fs_total_dir / fs->e2fs_gcount;
 
 	/*
@@ -494,18 +585,18 @@ ext2_dirpref(struct inode *pip)
 		mincg = prefcg;
 		minndir = fs->e2fs_ipg;
 		for (cg = prefcg; cg < fs->e2fs_gcount; cg++)
-			if (fs->e2fs_gd[cg].ext2bgd_ndirs < minndir &&
-			    fs->e2fs_gd[cg].ext2bgd_nifree >= avgifree &&
-			    fs->e2fs_gd[cg].ext2bgd_nbfree >= avgbfree) {
+			if (e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) < minndir &&
+			    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= avgifree &&
+			    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) >= avgbfree) {
 				mincg = cg;
-				minndir = fs->e2fs_gd[cg].ext2bgd_ndirs;
+				minndir = e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]);
 			}
 		for (cg = 0; cg < prefcg; cg++)
-			if (fs->e2fs_gd[cg].ext2bgd_ndirs < minndir &&
-			    fs->e2fs_gd[cg].ext2bgd_nifree >= avgifree &&
-			    fs->e2fs_gd[cg].ext2bgd_nbfree >= avgbfree) {
+			if (e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) < minndir &&
+			    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= avgifree &&
+			    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) >= avgbfree) {
 				mincg = cg;
-				minndir = fs->e2fs_gd[cg].ext2bgd_ndirs;
+				minndir = e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]);
 			}
 		return (mincg);
 	}
@@ -537,16 +628,16 @@ ext2_dirpref(struct inode *pip)
 	 */
 	prefcg = ino_to_cg(fs, pip->i_number);
 	for (cg = prefcg; cg < fs->e2fs_gcount; cg++)
-		if (fs->e2fs_gd[cg].ext2bgd_ndirs < maxndir &&
-		    fs->e2fs_gd[cg].ext2bgd_nifree >= minifree &&
-		    fs->e2fs_gd[cg].ext2bgd_nbfree >= minbfree) {
+		if (e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) < maxndir &&
+		    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= minifree &&
+		    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) >= minbfree) {
 			if (fs->e2fs_contigdirs[cg] < maxcontigdirs)
 				return (cg);
 		}
 	for (cg = 0; cg < prefcg; cg++)
-		if (fs->e2fs_gd[cg].ext2bgd_ndirs < maxndir &&
-		    fs->e2fs_gd[cg].ext2bgd_nifree >= minifree &&
-		    fs->e2fs_gd[cg].ext2bgd_nbfree >= minbfree) {
+		if (e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) < maxndir &&
+		    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= minifree &&
+		    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) >= minbfree) {
 			if (fs->e2fs_contigdirs[cg] < maxcontigdirs)
 				return (cg);
 		}
@@ -554,10 +645,10 @@ ext2_dirpref(struct inode *pip)
 	 * This is a backstop when we have deficit in space.
 	 */
 	for (cg = prefcg; cg < fs->e2fs_gcount; cg++)
-		if (fs->e2fs_gd[cg].ext2bgd_nifree >= avgifree)
+		if (e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= avgifree)
 			return (cg);
 	for (cg = 0; cg < prefcg; cg++)
-		if (fs->e2fs_gd[cg].ext2bgd_nifree >= avgifree)
+		if (e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) >= avgifree)
 			break;
 	return (cg);
 }
@@ -709,19 +800,6 @@ ext2_num_base_meta_blocks(struct m_ext2fs *fs, int cg)
 	return (num);
 }
 
-static int
-ext2_get_cg_number(struct m_ext2fs *fs, daddr_t blk)
-{
-	int cg;
-
-	if (fs->e2fs->e2fs_bpg == fs->e2fs_bsize * 8)
-		cg = (blk - fs->e2fs->e2fs_first_dblock) / (fs->e2fs_bsize * 8);
-	else
-		cg = blk - fs->e2fs->e2fs_first_dblock;
-
-	return (cg);
-}
-
 static void
 ext2_mark_bitmap_end(int start_bit, int end_bit, char *bitmap)
 {
@@ -740,10 +818,9 @@ static int
 ext2_cg_block_bitmap_init(struct m_ext2fs *fs, int cg, struct buf *bp)
 {
 	int bit, bit_max, inodes_per_block;
-	uint32_t start, tmp;
+	uint64_t start, tmp;
 
-	if (!EXT2_HAS_RO_COMPAT_FEATURE(fs, EXT2F_ROCOMPAT_GDT_CSUM) ||
-	    !(fs->e2fs_gd[cg].ext4bgd_flags & EXT2_BG_BLOCK_UNINIT))
+	if (!(fs->e2fs_gd[cg].ext4bgd_flags & EXT2_BG_BLOCK_UNINIT))
 		return (0);
 
 	memset(bp->b_data, 0, fs->e2fs_bsize);
@@ -755,25 +832,25 @@ ext2_cg_block_bitmap_init(struct m_ext2fs *fs, int cg, struct buf *bp)
 	for (bit = 0; bit < bit_max; bit++)
 		setbit(bp->b_data, bit);
 
-	start = cg * fs->e2fs->e2fs_bpg + fs->e2fs->e2fs_first_dblock;
+	start = (uint64_t)cg * fs->e2fs->e2fs_bpg + fs->e2fs->e2fs_first_dblock;
 
-	/* Set bits for block and inode bitmaps, and inode table */
-	tmp = fs->e2fs_gd[cg].ext2bgd_b_bitmap;
+	/* Set bits for block and inode bitmaps, and inode table. */
+	tmp = e2fs_gd_get_b_bitmap(&fs->e2fs_gd[cg]);
 	if (!EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_FLEX_BG) ||
-	    tmp == ext2_get_cg_number(fs, cg))
+	    cg == dtogd(fs, tmp))
 		setbit(bp->b_data, tmp - start);
 
-	tmp = fs->e2fs_gd[cg].ext2bgd_i_bitmap;
+	tmp = e2fs_gd_get_i_bitmap(&fs->e2fs_gd[cg]);
 	if (!EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_FLEX_BG) ||
-	    tmp == ext2_get_cg_number(fs, cg))
+	    cg == dtogd(fs, tmp))
 		setbit(bp->b_data, tmp - start);
 
-	tmp = fs->e2fs_gd[cg].ext2bgd_i_tables;
+	tmp = e2fs_gd_get_i_tables(&fs->e2fs_gd[cg]);
 	inodes_per_block = fs->e2fs_bsize/EXT2_INODE_SIZE(fs);
-	while( tmp < fs->e2fs_gd[cg].ext2bgd_i_tables +
+	while( tmp < e2fs_gd_get_i_tables(&fs->e2fs_gd[cg]) +
 	    fs->e2fs->e2fs_ipg / inodes_per_block ) {
 		if (!EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_FLEX_BG) ||
-		    tmp == ext2_get_cg_number(fs, cg))
+		    cg == dtogd(fs, tmp))
 			setbit(bp->b_data, tmp - start);
 		tmp++;
 	}
@@ -810,11 +887,11 @@ ext2_alloccg(struct inode *ip, int cg, daddr_t bpref, int size)
 	/* XXX ondisk32 */
 	fs = ip->i_e2fs;
 	ump = ip->i_ump;
-	if (fs->e2fs_gd[cg].ext2bgd_nbfree == 0)
+	if (e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) == 0)
 		return (0);
 	EXT2_UNLOCK(ump);
 	error = bread(ip->i_devvp, fsbtodb(fs,
-	    fs->e2fs_gd[cg].ext2bgd_b_bitmap),
+	    e2fs_gd_get_b_bitmap(&fs->e2fs_gd[cg])),
 	    (int)fs->e2fs_bsize, NOCRED, &bp);
 	if (error) {
 		brelse(bp);
@@ -829,7 +906,7 @@ ext2_alloccg(struct inode *ip, int cg, daddr_t bpref, int size)
 			return (0);
 		}
 	}
-	if (fs->e2fs_gd[cg].ext2bgd_nbfree == 0) {
+	if (e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) == 0) {
 		/*
 		 * Another thread allocated the last block in this
 		 * group while we were waiting for the buffer.
@@ -926,12 +1003,13 @@ ext2_alloccg(struct inode *ip, int cg, daddr_t bpref, int size)
 	setbit(bbp, bno);
 	EXT2_LOCK(ump);
 	ext2_clusteracct(fs, bbp, cg, bno, -1);
-	fs->e2fs->e2fs_fbcount--;
-	fs->e2fs_gd[cg].ext2bgd_nbfree--;
+	fs->e2fs_fbcount--;
+	e2fs_gd_set_nbfree(&fs->e2fs_gd[cg],
+	    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) - 1);
 	fs->e2fs_fmod = 1;
 	EXT2_UNLOCK(ump);
 	bdwrite(bp);
-	return (cg * fs->e2fs->e2fs_fpg + fs->e2fs->e2fs_first_dblock + bno);
+	return (((uint64_t)cg) * fs->e2fs->e2fs_fpg + fs->e2fs->e2fs_first_dblock + bno);
 }
 
 /*
@@ -956,7 +1034,7 @@ ext2_clusteralloc(struct inode *ip, int cg, daddr_t bpref, int len)
 
 	EXT2_UNLOCK(ump);
 	error = bread(ip->i_devvp,
-	    fsbtodb(fs, fs->e2fs_gd[cg].ext2bgd_b_bitmap),
+	    fsbtodb(fs, e2fs_gd_get_b_bitmap(&fs->e2fs_gd[cg])),
 	    (int)fs->e2fs_bsize, NOCRED, &bp);
 	if (error)
 		goto fail_lock;
@@ -1026,8 +1104,9 @@ ext2_clusteralloc(struct inode *ip, int cg, daddr_t bpref, int len)
 	for (i = 0; i < len; i += fs->e2fs_fpb) {
 		setbit(bbp, bno + i);
 		ext2_clusteracct(fs, bbp, cg, bno + i, -1);
-		fs->e2fs->e2fs_fbcount--;
-		fs->e2fs_gd[cg].ext2bgd_nbfree--;
+		fs->e2fs_fbcount--;
+		e2fs_gd_set_nbfree(&fs->e2fs_gd[cg],
+		    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) - 1);
 	}
 	fs->e2fs_fmod = 1;
 	EXT2_UNLOCK(ump);
@@ -1058,12 +1137,12 @@ ext2_zero_inode_table(struct inode *ip, int cg)
 	    fs->e2fs_bsize;
 
 	used_blks = howmany(fs->e2fs->e2fs_ipg -
-	    fs->e2fs_gd[cg].ext4bgd_i_unused,
+	    e2fs_gd_get_i_unused(&fs->e2fs_gd[cg]),
 	    fs->e2fs_bsize / EXT2_INODE_SIZE(fs));
 
 	for (i = 0; i < all_blks - used_blks; i++) {
 		bp = getblk(ip->i_devvp, fsbtodb(fs,
-		    fs->e2fs_gd[cg].ext2bgd_i_tables + used_blks + i),
+		    e2fs_gd_get_i_tables(&fs->e2fs_gd[cg]) + used_blks + i),
 		    fs->e2fs_bsize, 0, 0, 0);
 		if (!bp)
 			return (EIO);
@@ -1097,11 +1176,11 @@ ext2_nodealloccg(struct inode *ip, int cg, daddr_t ipref, int mode)
 		ipref = 0;
 	fs = ip->i_e2fs;
 	ump = ip->i_ump;
-	if (fs->e2fs_gd[cg].ext2bgd_nifree == 0)
+	if (e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) == 0)
 		return (0);
 	EXT2_UNLOCK(ump);
 	error = bread(ip->i_devvp, fsbtodb(fs,
-	    fs->e2fs_gd[cg].ext2bgd_i_bitmap),
+	    e2fs_gd_get_i_bitmap(&fs->e2fs_gd[cg])),
 	    (int)fs->e2fs_bsize, NOCRED, &bp);
 	if (error) {
 		brelse(bp);
@@ -1120,7 +1199,7 @@ ext2_nodealloccg(struct inode *ip, int cg, daddr_t ipref, int mode)
 			return (0);
 		}
 	}
-	if (fs->e2fs_gd[cg].ext2bgd_nifree == 0) {
+	if (e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) == 0) {
 		/*
 		 * Another thread allocated the last i-node in this
 		 * group while we were waiting for the buffer.
@@ -1153,18 +1232,21 @@ ext2_nodealloccg(struct inode *ip, int cg, daddr_t ipref, int mode)
 gotit:
 	setbit(ibp, ipref);
 	EXT2_LOCK(ump);
-	fs->e2fs_gd[cg].ext2bgd_nifree--;
+	e2fs_gd_set_nifree(&fs->e2fs_gd[cg],
+	    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) - 1);
 	if (EXT2_HAS_RO_COMPAT_FEATURE(fs, EXT2F_ROCOMPAT_GDT_CSUM))
-		fs->e2fs_gd[cg].ext4bgd_i_unused--;
+		e2fs_gd_set_i_unused(&fs->e2fs_gd[cg],
+		    e2fs_gd_get_i_unused(&fs->e2fs_gd[cg]) - 1);
 	fs->e2fs->e2fs_ficount--;
 	fs->e2fs_fmod = 1;
 	if ((mode & IFMT) == IFDIR) {
-		fs->e2fs_gd[cg].ext2bgd_ndirs++;
+		e2fs_gd_set_ndirs(&fs->e2fs_gd[cg],
+		    e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) + 1);
 		fs->e2fs_total_dir++;
 	}
 	EXT2_UNLOCK(ump);
 	bdwrite(bp);
-	return (cg * fs->e2fs->e2fs_ipg + ipref + 1);
+	return ((uint64_t)cg * fs->e2fs_ipg + ipref + 1);
 }
 
 /*
@@ -1183,14 +1265,14 @@ ext2_blkfree(struct inode *ip, e4fs_daddr_t bno, long size)
 	fs = ip->i_e2fs;
 	ump = ip->i_ump;
 	cg = dtog(fs, bno);
-	if (bno >= fs->e2fs->e2fs_bcount) {
+	if (bno >= fs->e2fs_bcount) {
 		printf("bad block %lld, ino %ju\n", (long long)bno,
 		    (uintmax_t)ip->i_number);
 		ext2_fserr(fs, ip->i_uid, "bad block");
 		return;
 	}
 	error = bread(ip->i_devvp,
-	    fsbtodb(fs, fs->e2fs_gd[cg].ext2bgd_b_bitmap),
+	    fsbtodb(fs, e2fs_gd_get_b_bitmap(&fs->e2fs_gd[cg])),
 	    (int)fs->e2fs_bsize, NOCRED, &bp);
 	if (error) {
 		brelse(bp);
@@ -1206,8 +1288,9 @@ ext2_blkfree(struct inode *ip, e4fs_daddr_t bno, long size)
 	clrbit(bbp, bno);
 	EXT2_LOCK(ump);
 	ext2_clusteracct(fs, bbp, cg, bno, 1);
-	fs->e2fs->e2fs_fbcount++;
-	fs->e2fs_gd[cg].ext2bgd_nbfree++;
+	fs->e2fs_fbcount++;
+	e2fs_gd_set_nbfree(&fs->e2fs_gd[cg],
+	    e2fs_gd_get_nbfree(&fs->e2fs_gd[cg]) + 1);
 	fs->e2fs_fmod = 1;
 	EXT2_UNLOCK(ump);
 	bdwrite(bp);
@@ -1236,7 +1319,7 @@ ext2_vfree(struct vnode *pvp, ino_t ino, int mode)
 
 	cg = ino_to_cg(fs, ino);
 	error = bread(pip->i_devvp,
-	    fsbtodb(fs, fs->e2fs_gd[cg].ext2bgd_i_bitmap),
+	    fsbtodb(fs, e2fs_gd_get_i_bitmap(&fs->e2fs_gd[cg])),
 	    (int)fs->e2fs_bsize, NOCRED, &bp);
 	if (error) {
 		brelse(bp);
@@ -1253,11 +1336,14 @@ ext2_vfree(struct vnode *pvp, ino_t ino, int mode)
 	clrbit(ibp, ino);
 	EXT2_LOCK(ump);
 	fs->e2fs->e2fs_ficount++;
-	fs->e2fs_gd[cg].ext2bgd_nifree++;
+	e2fs_gd_set_nifree(&fs->e2fs_gd[cg],
+	    e2fs_gd_get_nifree(&fs->e2fs_gd[cg]) + 1);
 	if (EXT2_HAS_RO_COMPAT_FEATURE(fs, EXT2F_ROCOMPAT_GDT_CSUM))
-		fs->e2fs_gd[cg].ext4bgd_i_unused++;
+		e2fs_gd_set_i_unused(&fs->e2fs_gd[cg],
+		    e2fs_gd_get_i_unused(&fs->e2fs_gd[cg]) + 1);
 	if ((mode & IFMT) == IFDIR) {
-		fs->e2fs_gd[cg].ext2bgd_ndirs--;
+		e2fs_gd_set_ndirs(&fs->e2fs_gd[cg],
+		    e2fs_gd_get_ndirs(&fs->e2fs_gd[cg]) - 1);
 		fs->e2fs_total_dir--;
 	}
 	fs->e2fs_fmod = 1;
diff --git a/sys/fs/ext2fs/ext2_balloc.c b/sys/fs/ext2fs/ext2_balloc.c
index a8552509122..7d5cff6667e 100644
--- a/sys/fs/ext2fs/ext2_balloc.c
+++ b/sys/fs/ext2fs/ext2_balloc.c
@@ -42,6 +42,7 @@
 #include <sys/systm.h>
 #include <sys/bio.h>
 #include <sys/buf.h>
+#include <sys/limits.h>
 #include <sys/lock.h>
 #include <sys/mount.h>
 #include <sys/vnode.h>
@@ -60,13 +61,13 @@ ext2_ext_balloc(struct inode *ip, uint32_t lbn, int size,
 	struct m_ext2fs *fs;
 	struct buf *bp = NULL;
 	struct vnode *vp = ITOV(ip);
-	uint32_t nb;
+	daddr_t newblk;
 	int osize, nsize, blks, error, allocated;
 
 	fs = ip->i_e2fs;
 	blks = howmany(size, fs->e2fs_bsize);
 
-	error = ext4_ext_get_blocks(ip, lbn, blks, cred, NULL, &allocated, &nb);
+	error = ext4_ext_get_blocks(ip, lbn, blks, cred, NULL, &allocated, &newblk);
 	if (error)
 		return (error);
 
@@ -80,7 +81,7 @@ ext2_ext_balloc(struct inode *ip, uint32_t lbn, int size,
 		if(!bp)
 			return (EIO);
 
-		bp->b_blkno = fsbtodb(fs, nb);
+		bp->b_blkno = fsbtodb(fs, newblk);
 		if (flags & BA_CLRBUF)
 			vfs_bio_clrbuf(bp);
 	} else {
@@ -91,7 +92,7 @@ ext2_ext_balloc(struct inode *ip, uint32_t lbn, int size,
 				brelse(bp);
 				return (error);
 			}
-			bp->b_blkno = fsbtodb(fs, nb);
+			bp->b_blkno = fsbtodb(fs, newblk);
 			*bpp = bp;
 			return (0);
 		}
@@ -101,21 +102,15 @@ ext2_ext_balloc(struct inode *ip, uint32_t lbn, int size,
 		 */
 		osize = fragroundup(fs, blkoff(fs, ip->i_size));
 		nsize = fragroundup(fs, size);
-		if (nsize <= osize) {
+		if (nsize <= osize)
 			error = bread(vp, lbn, osize, NOCRED, &bp);
-			if (error) {
-				brelse(bp);
-				return (error);
-			}
-			bp->b_blkno = fsbtodb(fs, nb);
-		} else {
+		else
 			error = bread(vp, lbn, fs->e2fs_bsize, NOCRED, &bp);
-			if (error) {
-				brelse(bp);
-				return (error);
-			}
-			bp->b_blkno = fsbtodb(fs, nb);
+		if (error) {
+			brelse(bp);
+			return (error);
 		}
+		bp->b_blkno = fsbtodb(fs, newblk);
 	}
 
 	*bpp = bp;
@@ -218,6 +213,12 @@ ext2_balloc(struct inode *ip, e2fs_lbn_t lbn, int size, struct ucred *cred,
 			    nsize, cred, &newb);
 			if (error)
 				return (error);
+			/*
+			 * If the newly allocated block exceeds 32-bit limit,
+			 * we can not use it in file block maps.
+			 */
+			if (newb > UINT_MAX)
+				return (EFBIG);
 			bp = getblk(vp, lbn, nsize, 0, 0, 0);
 			bp->b_blkno = fsbtodb(fs, newb);
 			if (flags & BA_CLRBUF)
@@ -250,6 +251,8 @@ ext2_balloc(struct inode *ip, e2fs_lbn_t lbn, int size, struct ucred *cred,
 		if ((error = ext2_alloc(ip, lbn, pref, fs->e2fs_bsize, cred,
 		    &newb)))
 			return (error);
+		if (newb > UINT_MAX)
+			return (EFBIG);
 		nb = newb;
 		bp = getblk(vp, indirs[1].in_lbn, fs->e2fs_bsize, 0, 0, 0);
 		bp->b_blkno = fsbtodb(fs, newb);
@@ -293,6 +296,8 @@ ext2_balloc(struct inode *ip, e2fs_lbn_t lbn, int size, struct ucred *cred,
 			brelse(bp);
 			return (error);
 		}
+		if (newb > UINT_MAX)
+			return (EFBIG);
 		nb = newb;
 		nbp = getblk(vp, indirs[i].in_lbn, fs->e2fs_bsize, 0, 0, 0);
 		nbp->b_blkno = fsbtodb(fs, nb);
@@ -332,6 +337,8 @@ ext2_balloc(struct inode *ip, e2fs_lbn_t lbn, int size, struct ucred *cred,
 			brelse(bp);
 			return (error);
 		}
+		if (newb > UINT_MAX)
+			return (EFBIG);
 		nb = newb;
 		nbp = getblk(vp, lbn, fs->e2fs_bsize, 0, 0, 0);
 		nbp->b_blkno = fsbtodb(fs, nb);
diff --git a/sys/fs/ext2fs/ext2_csum.c b/sys/fs/ext2fs/ext2_csum.c
index c30e6cbdbb9..69e2186e580 100644
--- a/sys/fs/ext2fs/ext2_csum.c
+++ b/sys/fs/ext2fs/ext2_csum.c
@@ -110,7 +110,7 @@ ext2_gd_csum(struct m_ext2fs *fs, uint32_t block_group, struct ext2_gd *gd)
 		if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT) &&
 		    offset < fs->e2fs->e3fs_desc_size)
 			crc = ext2_crc16(crc, (uint8_t *)gd + offset,
-					 fs->e2fs->e3fs_desc_size - offset);
+			    fs->e2fs->e3fs_desc_size - offset);
 		return (crc);
 	}
 
diff --git a/sys/fs/ext2fs/ext2_extents.c b/sys/fs/ext2fs/ext2_extents.c
index f0c6ee739d8..7e4ffe839c7 100644
--- a/sys/fs/ext2fs/ext2_extents.c
+++ b/sys/fs/ext2fs/ext2_extents.c
@@ -1188,7 +1188,7 @@ ext4_new_blocks(struct inode *ip, daddr_t lbn, e4fs_daddr_t pref,
 int
 ext4_ext_get_blocks(struct inode *ip, e4fs_daddr_t iblk,
     unsigned long max_blocks, struct ucred *cred, struct buf **bpp,
-    int *pallocated, uint32_t *nb)
+    int *pallocated, daddr_t *nb)
 {
 	struct m_ext2fs *fs;
 	struct buf *bp = NULL;
diff --git a/sys/fs/ext2fs/ext2_extents.h b/sys/fs/ext2fs/ext2_extents.h
index c2b4fc0337e..6aa7de151d2 100644
--- a/sys/fs/ext2fs/ext2_extents.h
+++ b/sys/fs/ext2fs/ext2_extents.h
@@ -120,7 +120,8 @@ void ext4_ext_path_free(struct ext4_extent_path *path);
 int ext4_ext_remove_space(struct inode *ip, off_t length, int flags,
     struct ucred *cred, struct thread *td);
 int ext4_ext_get_blocks(struct inode *ip, int64_t iblock,
-    unsigned long max_blocks, struct ucred *cred, struct buf **bpp, int *allocate, uint32_t *);
+    unsigned long max_blocks, struct ucred *cred, struct buf **bpp,
+    int *allocate, daddr_t *);
 #ifdef EXT2FS_DEBUG
 void ext4_ext_print_extent_tree_status(struct inode * ip);
 #endif
diff --git a/sys/fs/ext2fs/ext2_extern.h b/sys/fs/ext2fs/ext2_extern.h
index b8054148d21..aed99bd1be4 100644
--- a/sys/fs/ext2fs/ext2_extern.h
+++ b/sys/fs/ext2fs/ext2_extern.h
@@ -102,6 +102,8 @@ int	ext2_htree_lookup(struct inode *, const char *, int, struct buf **,
 	    int *, doff_t *, doff_t *, doff_t *, struct ext2fs_searchslot *);
 int	ext2_search_dirblock(struct inode *, void *, int *, const char *, int,
 	    int *, doff_t *, doff_t *, doff_t *, struct ext2fs_searchslot *);
+uint32_t	e2fs_gd_get_ndirs(struct ext2_gd *gd);
+uint64_t	e2fs_gd_get_i_tables(struct ext2_gd *gd);
 int	ext2_gd_csum_verify(struct m_ext2fs *fs, struct cdev *dev);
 void	ext2_gd_csum_set(struct m_ext2fs *fs);
 
diff --git a/sys/fs/ext2fs/ext2_hash.c b/sys/fs/ext2fs/ext2_hash.c
index 33e84a2292d..c337039ea89 100644
--- a/sys/fs/ext2fs/ext2_hash.c
+++ b/sys/fs/ext2fs/ext2_hash.c
@@ -60,6 +60,7 @@
 #include <sys/stat.h>
 #include <sys/mount.h>
 
+#include <fs/ext2fs/ext2fs.h>
 #include <fs/ext2fs/htree.h>
 #include <fs/ext2fs/inode.h>
 #include <fs/ext2fs/ext2_mount.h>
diff --git a/sys/fs/ext2fs/ext2_subr.c b/sys/fs/ext2fs/ext2_subr.c
index e6fc7a25b5f..f592f53ace8 100644
--- a/sys/fs/ext2fs/ext2_subr.c
+++ b/sys/fs/ext2fs/ext2_subr.c
@@ -49,8 +49,8 @@
 #include <sys/vnode.h>
 
 #include <fs/ext2fs/inode.h>
-#include <fs/ext2fs/ext2_extern.h>
 #include <fs/ext2fs/ext2fs.h>
+#include <fs/ext2fs/ext2_extern.h>
 #include <fs/ext2fs/fs.h>
 #include <fs/ext2fs/ext2_extents.h>
 #include <fs/ext2fs/ext2_mount.h>
diff --git a/sys/fs/ext2fs/ext2_vfsops.c b/sys/fs/ext2fs/ext2_vfsops.c
index 11dc295f59d..c1a93940cd2 100644
--- a/sys/fs/ext2fs/ext2_vfsops.c
+++ b/sys/fs/ext2fs/ext2_vfsops.c
@@ -326,12 +326,20 @@ static int
 compute_sb_data(struct vnode *devvp, struct ext2fs *es,
     struct m_ext2fs *fs)
 {
-	int db_count, error;
-	int i;
+	int g_count = 0, error;
+	int i, j;
 	int logic_sb_block = 1;	/* XXX for now */
 	struct buf *bp;
-	uint32_t e2fs_descpb;
+	uint32_t e2fs_descpb, e2fs_gdbcount_alloc;
 
+	fs->e2fs_bcount = es->e2fs_bcount;
+	fs->e2fs_rbcount = es->e2fs_rbcount;
+	fs->e2fs_fbcount = es->e2fs_fbcount;
+	if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT)) {
+		fs->e2fs_bcount |= (uint64_t)(es->e4fs_bcount_hi) << 32;
+		fs->e2fs_rbcount |= (uint64_t)(es->e4fs_rbcount_hi) << 32;
+		fs->e2fs_fbcount |= (uint64_t)(es->e4fs_fbcount_hi) << 32;
+	}
 	fs->e2fs_bshift = EXT2_MIN_BLOCK_LOG_SIZE + es->e2fs_log_bsize;
 	fs->e2fs_bsize = 1U << fs->e2fs_bshift;
 	fs->e2fs_fsbtodb = es->e2fs_log_bsize + 1;
@@ -375,13 +383,19 @@ compute_sb_data(struct vnode *devvp, struct ext2fs *es,
 	fs->e2fs_ipb = fs->e2fs_bsize / EXT2_INODE_SIZE(fs);
 	fs->e2fs_itpg = fs->e2fs_ipg / fs->e2fs_ipb;
 	/* s_resuid / s_resgid ? */
-	fs->e2fs_gcount = howmany(es->e2fs_bcount - es->e2fs_first_dblock,
+	fs->e2fs_gcount = howmany(fs->e2fs_bcount - es->e2fs_first_dblock,
 	    EXT2_BLOCKS_PER_GROUP(fs));
-	e2fs_descpb = fs->e2fs_bsize / sizeof(struct ext2_gd);
-	db_count = howmany(fs->e2fs_gcount, e2fs_descpb);
-	fs->e2fs_gdbcount = db_count;
-	fs->e2fs_gd = malloc(db_count * fs->e2fs_bsize,
-	    M_EXT2MNT, M_WAITOK);
+	if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT)) {
+		e2fs_descpb = fs->e2fs_bsize / sizeof(struct ext2_gd);
+		e2fs_gdbcount_alloc = howmany(fs->e2fs_gcount, e2fs_descpb);
+	} else {
+		e2fs_descpb = fs->e2fs_bsize / E2FS_REV0_GD_SIZE;
+		e2fs_gdbcount_alloc = howmany(fs->e2fs_gcount,
+		    fs->e2fs_bsize / sizeof(struct ext2_gd));
+	}
+	fs->e2fs_gdbcount = howmany(fs->e2fs_gcount, e2fs_descpb);
+	fs->e2fs_gd = malloc(e2fs_gdbcount_alloc * fs->e2fs_bsize,
+	    M_EXT2MNT, M_WAITOK | M_ZERO);
 	fs->e2fs_contigdirs = malloc(fs->e2fs_gcount *
 	    sizeof(*fs->e2fs_contigdirs), M_EXT2MNT, M_WAITOK | M_ZERO);
 
@@ -392,7 +406,7 @@ compute_sb_data(struct vnode *devvp, struct ext2fs *es,
 	 */
 	if (fs->e2fs_bsize > SBSIZE)
 		logic_sb_block = 0;
-	for (i = 0; i < db_count; i++) {
+	for (i = 0; i < fs->e2fs_gdbcount; i++) {
 		error = bread(devvp,
 		    fsbtodb(fs, logic_sb_block + i + 1),
 		    fs->e2fs_bsize, NOCRED, &bp);
@@ -402,10 +416,17 @@ compute_sb_data(struct vnode *devvp, struct ext2fs *es,
 			brelse(bp);
 			return (error);
 		}
-		e2fs_cgload((struct ext2_gd *)bp->b_data,
-		    &fs->e2fs_gd[
-		    i * fs->e2fs_bsize / sizeof(struct ext2_gd)],
-		    fs->e2fs_bsize);
+		if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT)) {
+			memcpy(&fs->e2fs_gd[
+			    i * fs->e2fs_bsize / sizeof(struct ext2_gd)],
+			    bp->b_data, fs->e2fs_bsize);
+		} else {
+			for (j = 0; j < e2fs_descpb &&
+			    g_count < fs->e2fs_gcount; j++, g_count++)
+				memcpy(&fs->e2fs_gd[g_count],
+				    bp->b_data + j * E2FS_REV0_GD_SIZE,
+				    E2FS_REV0_GD_SIZE);
+		}
 		brelse(bp);
 		bp = NULL;
 	}
@@ -823,9 +844,9 @@ ext2_statfs(struct mount *mp, struct statfs *sbp)
 
 	sbp->f_bsize = EXT2_FRAG_SIZE(fs);
 	sbp->f_iosize = EXT2_BLOCK_SIZE(fs);
-	sbp->f_blocks = fs->e2fs->e2fs_bcount - overhead;
-	sbp->f_bfree = fs->e2fs->e2fs_fbcount;
-	sbp->f_bavail = sbp->f_bfree - fs->e2fs->e2fs_rbcount;
+	sbp->f_blocks = fs->e2fs_bcount - overhead;
+	sbp->f_bfree = fs->e2fs_fbcount;
+	sbp->f_bavail = sbp->f_bfree - fs->e2fs_rbcount;
 	sbp->f_files = fs->e2fs->e2fs_icount;
 	sbp->f_ffree = fs->e2fs->e2fs_ficount;
 	return (0);
@@ -1069,6 +1090,15 @@ ext2_sbupdate(struct ext2mount *mp, int waitfor)
 	struct buf *bp;
 	int error = 0;
 
+	es->e2fs_bcount = fs->e2fs_bcount & 0xffffffff;
+	es->e2fs_rbcount = fs->e2fs_rbcount & 0xffffffff;
+	es->e2fs_fbcount = fs->e2fs_fbcount & 0xffffffff;
+	if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT)) {
+		es->e4fs_bcount_hi = fs->e2fs_bcount >> 32;
+		es->e4fs_rbcount_hi = fs->e2fs_rbcount >> 32;
+		es->e4fs_fbcount_hi = fs->e2fs_fbcount >> 32;
+	}
+
 	bp = getblk(mp->um_devvp, SBLOCK, SBSIZE, 0, 0, 0);
 	bcopy((caddr_t)es, bp->b_data, (u_int)sizeof(struct ext2fs));
 	if (waitfor == MNT_WAIT)
@@ -1088,7 +1118,7 @@ ext2_cgupdate(struct ext2mount *mp, int waitfor)
 {
 	struct m_ext2fs *fs = mp->um_e2fs;
 	struct buf *bp;
-	int i, error = 0, allerror = 0;
+	int i, j, g_count = 0, error = 0, allerror = 0;
 
 	allerror = ext2_sbupdate(mp, waitfor);
 
@@ -1100,9 +1130,16 @@ ext2_cgupdate(struct ext2mount *mp, int waitfor)
 		bp = getblk(mp->um_devvp, fsbtodb(fs,
 		    fs->e2fs->e2fs_first_dblock +
 		    1 /* superblock */ + i), fs->e2fs_bsize, 0, 0, 0);
-		e2fs_cgsave(&fs->e2fs_gd[
-		    i * fs->e2fs_bsize / sizeof(struct ext2_gd)],
-		    (struct ext2_gd *)bp->b_data, fs->e2fs_bsize);
+		if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_64BIT)) {
+			memcpy(bp->b_data, &fs->e2fs_gd[
+			    i * fs->e2fs_bsize / sizeof(struct ext2_gd)],
+			    fs->e2fs_bsize);
+		} else {
+			for (j = 0; j < fs->e2fs_bsize / E2FS_REV0_GD_SIZE &&
+			    g_count < fs->e2fs_gcount; j++, g_count++)
+				memcpy(bp->b_data + j * E2FS_REV0_GD_SIZE,
+				    &fs->e2fs_gd[g_count], E2FS_REV0_GD_SIZE);
+		}
 		if (waitfor == MNT_WAIT)
 			error = bwrite(bp);
 		else
diff --git a/sys/fs/ext2fs/ext2_vnops.c b/sys/fs/ext2fs/ext2_vnops.c
index 5a28c88ced8..00607d1df23 100644
--- a/sys/fs/ext2fs/ext2_vnops.c
+++ b/sys/fs/ext2fs/ext2_vnops.c
@@ -84,8 +84,8 @@
 #include <fs/ext2fs/fs.h>
 #include <fs/ext2fs/inode.h>
 #include <fs/ext2fs/ext2_acl.h>
-#include <fs/ext2fs/ext2_extern.h>
 #include <fs/ext2fs/ext2fs.h>
+#include <fs/ext2fs/ext2_extern.h>
 #include <fs/ext2fs/ext2_dinode.h>
 #include <fs/ext2fs/ext2_dir.h>
 #include <fs/ext2fs/ext2_mount.h>
diff --git a/sys/fs/ext2fs/ext2fs.h b/sys/fs/ext2fs/ext2fs.h
index e9c6fe71356..d9b7b7f72e6 100644
--- a/sys/fs/ext2fs/ext2fs.h
+++ b/sys/fs/ext2fs/ext2fs.h
@@ -156,6 +156,9 @@ struct m_ext2fs {
 	char     e2fs_fsmnt[MAXMNTLEN];/* name mounted on */
 	char     e2fs_ronly;	  /* mounted read-only flag */
 	char     e2fs_fmod;	  /* super block modified flag */
+	uint64_t e2fs_bcount;	  /* blocks count */
+	uint64_t e2fs_rbcount;	  /* reserved blocks count */
+	uint64_t e2fs_fbcount;	  /* free blocks count */
 	uint32_t e2fs_bsize;	  /* Block size */
 	uint32_t e2fs_bshift;	  /* calc of logical block no */
 	uint32_t e2fs_bpg;	  /* Number of blocks per group */
@@ -323,7 +326,8 @@ static const struct ext2_feature incompat[] = {
 					 EXT2F_ROCOMPAT_DIR_NLINK | \
 					 EXT2F_ROCOMPAT_HUGE_FILE | \
 					 EXT2F_ROCOMPAT_EXTRA_ISIZE)
-#define	EXT2F_INCOMPAT_SUPP		EXT2F_INCOMPAT_FTYPE
+#define	EXT2F_INCOMPAT_SUPP		(EXT2F_INCOMPAT_FTYPE | \
+					 EXT2F_INCOMPAT_64BIT)
 #define	EXT4F_RO_INCOMPAT_SUPP		(EXT2F_INCOMPAT_EXTENTS | \
 					 EXT2F_INCOMPAT_RECOVER | \
 					 EXT2F_INCOMPAT_FLEX_BG | \
@@ -375,14 +379,20 @@ struct ext2_gd {
 	uint16_t ext4bgd_i_bmap_csum;	/* inode bitmap checksum */
 	uint16_t ext4bgd_i_unused;	/* unused inode count */
 	uint16_t ext4bgd_csum;		/* group descriptor checksum */
+	uint32_t ext4bgd_b_bitmap_hi;	/* high bits of blocks bitmap block */
+	uint32_t ext4bgd_i_bitmap_hi;	/* high bits of inodes bitmap block */
+	uint32_t ext4bgd_i_tables_hi;	/* high bits of inodes table block */
+	uint16_t ext4bgd_nbfree_hi;	/* high bits of number of free blocks */
+	uint16_t ext4bgd_nifree_hi;	/* high bits of number of free inodes */
+	uint16_t ext4bgd_ndirs_hi;	/* high bits of number of directories */
+	uint16_t ext4bgd_i_unused_hi;	/* high bits of unused inode count */
+	uint32_t ext4bgd_x_bitmap_hi;   /* high bits of snapshot exclusion */
+	uint16_t ext4bgd_b_bmap_csum_hi;/* high bits of block bitmap checksum */
+	uint16_t ext4bgd_i_bmap_csum_hi;/* high bits of inode bitmap checksum */
+	uint32_t ext4bgd_reserved;
 };
 
-/* EXT2FS metadata is stored in little-endian byte order. These macros
- * help reading it.
- */
-
-#define	e2fs_cgload(old, new, size) memcpy((new), (old), (size));
-#define	e2fs_cgsave(old, new, size) memcpy((new), (old), (size));
+#define	E2FS_REV0_GD_SIZE (sizeof(struct ext2_gd) / 2)
 
 /*
  * Macro-instructions used to manage several block sizes
diff --git a/sys/fs/ext2fs/fs.h b/sys/fs/ext2fs/fs.h
index cca3a9664df..411908d6b29 100644
--- a/sys/fs/ext2fs/fs.h
+++ b/sys/fs/ext2fs/fs.h
@@ -108,7 +108,7 @@
 
 /* get block containing inode from its number x */
 #define	ino_to_fsba(fs, x)                                              \
-        ((fs)->e2fs_gd[ino_to_cg((fs), (x))].ext2bgd_i_tables +         \
+        (e2fs_gd_get_i_tables(&(fs)->e2fs_gd[ino_to_cg((fs), (x))]) +   \
         (((x) - 1) % (fs)->e2fs->e2fs_ipg) / (fs)->e2fs_ipb)
 
 /* get offset for inode in block */
diff --git a/sys/fs/procfs/procfs.c b/sys/fs/procfs/procfs.c
index f6d0b90512d..2ab1cda5181 100644
--- a/sys/fs/procfs/procfs.c
+++ b/sys/fs/procfs/procfs.c
@@ -64,7 +64,7 @@
 #include <fs/procfs/procfs.h>
 
 /*
- * Filler function for proc/pid/self
+ * Filler function for proc/pid/file
  */
 int
 procfs_doprocfile(PFS_FILL_ARGS)
diff --git a/sys/geom/geom_ccd.c b/sys/geom/geom_ccd.c
index 90d36aae7e3..ce9a435fa9d 100644
--- a/sys/geom/geom_ccd.c
+++ b/sys/geom/geom_ccd.c
@@ -1,12 +1,41 @@
 /*-
- * SPDX-License-Identifier: BSD-4-Clause
+ * SPDX-License-Identifier: (BSD-2-Clause-NetBSD AND BSD-3-Clause)
  *
  * Copyright (c) 2003 Poul-Henning Kamp.
- * Copyright (c) 1995 Jason R. Thorpe.
+ * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: ccd.c,v 1.22 1995/12/08 19:13:26 thorpej Exp $ 
+ */
+
+/*-
+ * Copyright (c) 1988 University of Utah.
  * Copyright (c) 1990, 1993
  *	The Regents of the University of California.  All rights reserved.
- * All rights reserved.
- * Copyright (c) 1988 University of Utah.
  *
  * This code is derived from software contributed to Berkeley by
  * the Systems Programming Group of the University of Utah Computer
@@ -20,35 +49,34 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project
- *	by Jason R. Thorpe.
- * 4. The names of the authors may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * from: Utah $Hdr: cd.c 1.6 90/11/28$
+ *
+ *	@(#)cd.c	8.2 (Berkeley) 11/16/93
+ */
+
+/*
  * Dynamic configuration and disklabel support by:
  *	Jason R. Thorpe <thorpej@nas.nasa.gov>
  *	Numerical Aerodynamic Simulation Facility
  *	Mail Stop 258-6
  *	NASA Ames Research Center
  *	Moffett Field, CA 94035
- *
- * from: Utah $Hdr: cd.c 1.6 90/11/28$
- *	@(#)cd.c	8.2 (Berkeley) 11/16/93
- *	$NetBSD: ccd.c,v 1.22 1995/12/08 19:13:26 thorpej Exp $ 
  */
 
 #include <sys/cdefs.h>
diff --git a/sys/geom/geom_event.c b/sys/geom/geom_event.c
index e9eed290fda..b4b902b3495 100644
--- a/sys/geom/geom_event.c
+++ b/sys/geom/geom_event.c
@@ -87,9 +87,11 @@ g_waitidle(void)
 	g_topology_assert_not();
 
 	mtx_lock(&g_eventlock);
+	TSWAIT("GEOM events");
 	while (!TAILQ_EMPTY(&g_events))
 		msleep(&g_pending_events, &g_eventlock, PPAUSE,
 		    "g_waitidle", hz/5);
+	TSUNWAIT("GEOM events");
 	mtx_unlock(&g_eventlock);
 	curthread->td_pflags &= ~TDP_GEOM;
 }
@@ -266,6 +268,7 @@ one_event(void)
 	ep->func(ep->arg, 0);
 	g_topology_assert();
 	mtx_lock(&g_eventlock);
+	TSRELEASE("GEOM events");
 	TAILQ_REMOVE(&g_events, ep, events);
 	ep->flag &= ~EV_INPROGRESS;
 	if (ep->flag & EV_WAKEUP) {
@@ -324,6 +327,7 @@ g_cancel_event(void *ref)
 				break;
 			if (ep->ref[n] != ref)
 				continue;
+			TSRELEASE("GEOM events");
 			TAILQ_REMOVE(&g_events, ep, events);
 			ep->func(ep->arg, EV_CANCEL);
 			mtx_assert(&g_eventlock, MA_OWNED);
@@ -367,6 +371,7 @@ g_post_event_x(g_event_t *func, void *arg, int flag, int wuflag, struct g_event
 	ep->func = func;
 	ep->arg = arg;
 	mtx_lock(&g_eventlock);
+	TSHOLD("GEOM events");
 	TAILQ_INSERT_TAIL(&g_events, ep, events);
 	mtx_unlock(&g_eventlock);
 	wakeup(&g_wait_event);
diff --git a/sys/geom/mirror/g_mirror.c b/sys/geom/mirror/g_mirror.c
index 94c8abe8c38..0c5e45be5ac 100644
--- a/sys/geom/mirror/g_mirror.c
+++ b/sys/geom/mirror/g_mirror.c
@@ -111,7 +111,8 @@ static void g_mirror_update_device(struct g_mirror_softc *sc, bool force);
 static void g_mirror_dumpconf(struct sbuf *sb, const char *indent,
     struct g_geom *gp, struct g_consumer *cp, struct g_provider *pp);
 static void g_mirror_sync_stop(struct g_mirror_disk *disk, int type);
-static void g_mirror_register_request(struct bio *bp);
+static void g_mirror_register_request(struct g_mirror_softc *sc,
+    struct bio *bp);
 static void g_mirror_sync_release(struct g_mirror_softc *sc);
 
 
@@ -891,27 +892,6 @@ g_mirror_unidle(struct g_mirror_softc *sc)
 	}
 }
 
-static void
-g_mirror_flush_done(struct bio *bp)
-{
-	struct g_mirror_softc *sc;
-	struct bio *pbp;
-
-	pbp = bp->bio_parent;
-	sc = pbp->bio_to->private;
-	mtx_lock(&sc->sc_done_mtx);
-	if (pbp->bio_error == 0)
-		pbp->bio_error = bp->bio_error;
-	pbp->bio_completed += bp->bio_completed;
-	pbp->bio_inbed++;
-	if (pbp->bio_children == pbp->bio_inbed) {
-		mtx_unlock(&sc->sc_done_mtx);
-		g_io_deliver(pbp, pbp->bio_error);
-	} else
-		mtx_unlock(&sc->sc_done_mtx);
-	g_destroy_bio(bp);
-}
-
 static void
 g_mirror_done(struct bio *bp)
 {
@@ -926,32 +906,76 @@ g_mirror_done(struct bio *bp)
 }
 
 static void
-g_mirror_regular_request(struct bio *bp)
+g_mirror_regular_request_error(struct g_mirror_softc *sc, struct bio *bp)
 {
-	struct g_mirror_softc *sc;
 	struct g_mirror_disk *disk;
+
+	disk = bp->bio_from->private;
+
+	if (bp->bio_cmd == BIO_FLUSH && bp->bio_error == EOPNOTSUPP)
+		return;
+	if (disk == NULL)
+		return;
+
+	if ((disk->d_flags & G_MIRROR_DISK_FLAG_BROKEN) == 0) {
+		disk->d_flags |= G_MIRROR_DISK_FLAG_BROKEN;
+		G_MIRROR_LOGREQ(0, bp, "Request failed (error=%d).",
+		    bp->bio_error);
+	} else {
+		G_MIRROR_LOGREQ(1, bp, "Request failed (error=%d).",
+		    bp->bio_error);
+	}
+	if (g_mirror_disconnect_on_failure &&
+	    g_mirror_ndisks(sc, G_MIRROR_DISK_STATE_ACTIVE) > 1) {
+		if (bp->bio_error == ENXIO &&
+		    bp->bio_cmd == BIO_READ)
+			sc->sc_bump_id |= G_MIRROR_BUMP_SYNCID;
+		else if (bp->bio_error == ENXIO)
+			sc->sc_bump_id |= G_MIRROR_BUMP_SYNCID_NOW;
+		else
+			sc->sc_bump_id |= G_MIRROR_BUMP_GENID;
+		g_mirror_event_send(disk, G_MIRROR_DISK_STATE_DISCONNECTED,
+		    G_MIRROR_EVENT_DONTWAIT);
+	}
+}
+
+static void
+g_mirror_regular_request(struct g_mirror_softc *sc, struct bio *bp)
+{
 	struct bio *pbp;
 
 	g_topology_assert_not();
+	KASSERT(sc->sc_provider == bp->bio_parent->bio_to,
+	    ("regular request %p with unexpected origin", bp));
 
 	pbp = bp->bio_parent;
-	sc = pbp->bio_to->private;
 	bp->bio_from->index--;
 	if (bp->bio_cmd == BIO_WRITE || bp->bio_cmd == BIO_DELETE)
 		sc->sc_writes--;
-	disk = bp->bio_from->private;
-	if (disk == NULL) {
+	if (bp->bio_from->private == NULL) {
 		g_topology_lock();
 		g_mirror_kill_consumer(sc, bp->bio_from);
 		g_topology_unlock();
 	}
 
-	if (bp->bio_cmd == BIO_READ)
+	switch (bp->bio_cmd) {
+	case BIO_READ:
 		KFAIL_POINT_ERROR(DEBUG_FP, g_mirror_regular_request_read,
 		    bp->bio_error);
-	else if (bp->bio_cmd == BIO_WRITE)
+		break;
+	case BIO_WRITE:
 		KFAIL_POINT_ERROR(DEBUG_FP, g_mirror_regular_request_write,
 		    bp->bio_error);
+		break;
+	case BIO_DELETE:
+		KFAIL_POINT_ERROR(DEBUG_FP, g_mirror_regular_request_delete,
+		    bp->bio_error);
+		break;
+	case BIO_FLUSH:
+		KFAIL_POINT_ERROR(DEBUG_FP, g_mirror_regular_request_flush,
+		    bp->bio_error);
+		break;
+	}
 
 	pbp->bio_inbed++;
 	KASSERT(pbp->bio_inbed <= pbp->bio_children,
@@ -975,35 +999,11 @@ g_mirror_regular_request(struct bio *bp)
 	} else if (bp->bio_error != 0) {
 		if (pbp->bio_error == 0)
 			pbp->bio_error = bp->bio_error;
-		if (disk != NULL) {
-			if ((disk->d_flags & G_MIRROR_DISK_FLAG_BROKEN) == 0) {
-				disk->d_flags |= G_MIRROR_DISK_FLAG_BROKEN;
-				G_MIRROR_LOGREQ(0, bp,
-				    "Request failed (error=%d).",
-				    bp->bio_error);
-			} else {
-				G_MIRROR_LOGREQ(1, bp,
-				    "Request failed (error=%d).",
-				    bp->bio_error);
-			}
-			if (g_mirror_disconnect_on_failure &&
-			    g_mirror_ndisks(sc, G_MIRROR_DISK_STATE_ACTIVE) > 1)
-			{
-				if (bp->bio_error == ENXIO &&
-				    bp->bio_cmd == BIO_READ)
-					sc->sc_bump_id |= G_MIRROR_BUMP_SYNCID;
-				else if (bp->bio_error == ENXIO)
-					sc->sc_bump_id |= G_MIRROR_BUMP_SYNCID_NOW;
-				else
-					sc->sc_bump_id |= G_MIRROR_BUMP_GENID;
-				g_mirror_event_send(disk,
-				    G_MIRROR_DISK_STATE_DISCONNECTED,
-				    G_MIRROR_EVENT_DONTWAIT);
-			}
-		}
+		g_mirror_regular_request_error(sc, bp);
 		switch (pbp->bio_cmd) {
 		case BIO_DELETE:
 		case BIO_WRITE:
+		case BIO_FLUSH:
 			pbp->bio_inbed--;
 			pbp->bio_children--;
 			break;
@@ -1028,6 +1028,7 @@ g_mirror_regular_request(struct bio *bp)
 		break;
 	case BIO_DELETE:
 	case BIO_WRITE:
+	case BIO_FLUSH:
 		if (pbp->bio_children == 0) {
 			/*
 			 * All requests failed.
@@ -1040,9 +1041,11 @@ g_mirror_regular_request(struct bio *bp)
 			pbp->bio_error = 0;
 			pbp->bio_completed = pbp->bio_length;
 		}
-		TAILQ_REMOVE(&sc->sc_inflight, pbp, bio_queue);
-		/* Release delayed sync requests if possible. */
-		g_mirror_sync_release(sc);
+		if (pbp->bio_cmd == BIO_WRITE || pbp->bio_cmd == BIO_DELETE) {
+			TAILQ_REMOVE(&sc->sc_inflight, pbp, bio_queue);
+			/* Release delayed sync requests if possible. */
+			g_mirror_sync_release(sc);
+		}
 		g_io_deliver(pbp, pbp->bio_error);
 		break;
 	default:
@@ -1114,47 +1117,6 @@ g_mirror_kernel_dump(struct bio *bp)
 	    g_mirror_get_diskname(disk));
 }
 
-static void
-g_mirror_flush(struct g_mirror_softc *sc, struct bio *bp)
-{
-	struct bio_queue queue;
-	struct g_mirror_disk *disk;
-	struct g_consumer *cp;
-	struct bio *cbp;
-
-	TAILQ_INIT(&queue);
-	LIST_FOREACH(disk, &sc->sc_disks, d_next) {
-		if (disk->d_state != G_MIRROR_DISK_STATE_ACTIVE)
-			continue;
-		cbp = g_clone_bio(bp);
-		if (cbp == NULL) {
-			while ((cbp = TAILQ_FIRST(&queue)) != NULL) {
-				TAILQ_REMOVE(&queue, cbp, bio_queue);
-				g_destroy_bio(cbp);
-			}
-			if (bp->bio_error == 0)
-				bp->bio_error = ENOMEM;
-			g_io_deliver(bp, bp->bio_error);
-			return;
-		}
-		TAILQ_INSERT_TAIL(&queue, cbp, bio_queue);
-		cbp->bio_done = g_mirror_flush_done;
-		cbp->bio_caller1 = disk;
-		cbp->bio_to = disk->d_consumer->provider;
-	}
-	while ((cbp = TAILQ_FIRST(&queue)) != NULL) {
-		TAILQ_REMOVE(&queue, cbp, bio_queue);
-		G_MIRROR_LOGREQ(3, cbp, "Sending request.");
-		disk = cbp->bio_caller1;
-		cbp->bio_caller1 = NULL;
-		cp = disk->d_consumer;
-		KASSERT(cp->acr >= 1 && cp->acw >= 1 && cp->ace >= 1,
-		    ("Consumer %s not opened (r%dw%de%d).", cp->provider->name,
-		    cp->acr, cp->acw, cp->ace));
-		g_io_request(cbp, disk->d_consumer);
-	}
-}
-
 static void
 g_mirror_start(struct bio *bp)
 {
@@ -1174,10 +1136,8 @@ g_mirror_start(struct bio *bp)
 	case BIO_READ:
 	case BIO_WRITE:
 	case BIO_DELETE:
-		break;
 	case BIO_FLUSH:
-		g_mirror_flush(sc, bp);
-		return;
+		break;
 	case BIO_GETATTR:
 		if (!strcmp(bp->bio_attribute, "GEOM::candelete")) {
 			g_mirror_candelete(bp);
@@ -1259,14 +1219,14 @@ g_mirror_regular_collision(struct g_mirror_softc *sc, struct bio *sbp)
 }
 
 /*
- * Puts request onto delayed queue.
+ * Puts regular request onto delayed queue.
  */
 static void
 g_mirror_regular_delay(struct g_mirror_softc *sc, struct bio *bp)
 {
 
 	G_MIRROR_LOGREQ(2, bp, "Delaying request.");
-	TAILQ_INSERT_HEAD(&sc->sc_regular_delayed, bp, bio_queue);
+	TAILQ_INSERT_TAIL(&sc->sc_regular_delayed, bp, bio_queue);
 }
 
 /*
@@ -1281,23 +1241,23 @@ g_mirror_sync_delay(struct g_mirror_softc *sc, struct bio *bp)
 }
 
 /*
- * Releases delayed regular requests which don't collide anymore with sync
- * requests.
+ * Requeue delayed regular requests.
  */
 static void
 g_mirror_regular_release(struct g_mirror_softc *sc)
 {
-	struct bio *bp, *bp2;
+	struct bio *bp;
 
-	TAILQ_FOREACH_SAFE(bp, &sc->sc_regular_delayed, bio_queue, bp2) {
-		if (g_mirror_sync_collision(sc, bp))
-			continue;
-		TAILQ_REMOVE(&sc->sc_regular_delayed, bp, bio_queue);
-		G_MIRROR_LOGREQ(2, bp, "Releasing delayed request (%p).", bp);
-		mtx_lock(&sc->sc_queue_mtx);
-		TAILQ_INSERT_HEAD(&sc->sc_queue, bp, bio_queue);
-		mtx_unlock(&sc->sc_queue_mtx);
-	}
+	if ((bp = TAILQ_FIRST(&sc->sc_regular_delayed)) == NULL)
+		return;
+	if (g_mirror_sync_collision(sc, bp))
+		return;
+
+	G_MIRROR_DEBUG(2, "Requeuing regular requests after collision.");
+	mtx_lock(&sc->sc_queue_mtx);
+	TAILQ_CONCAT(&sc->sc_regular_delayed, &sc->sc_queue, bio_queue);
+	TAILQ_SWAP(&sc->sc_regular_delayed, &sc->sc_queue, bio, bio_queue);
+	mtx_unlock(&sc->sc_queue_mtx);
 }
 
 /*
@@ -1345,14 +1305,17 @@ g_mirror_sync_request_free(struct g_mirror_disk *disk, struct bio *bp)
  * send.
  */
 static void
-g_mirror_sync_request(struct bio *bp)
+g_mirror_sync_request(struct g_mirror_softc *sc, struct bio *bp)
 {
-	struct g_mirror_softc *sc;
 	struct g_mirror_disk *disk;
 	struct g_mirror_disk_sync *sync;
 
+	KASSERT((bp->bio_cmd == BIO_READ &&
+	    bp->bio_from->geom == sc->sc_sync.ds_geom) ||
+	    (bp->bio_cmd == BIO_WRITE && bp->bio_from->geom == sc->sc_geom),
+	    ("Sync BIO %p with unexpected origin", bp));
+
 	bp->bio_from->index--;
-	sc = bp->bio_from->geom->softc;
 	disk = bp->bio_from->private;
 	if (disk == NULL) {
 		sx_xunlock(&sc->sc_lock); /* Avoid recursion on sc_lock. */
@@ -1457,7 +1420,7 @@ g_mirror_sync_request(struct bio *bp)
 		else
 			g_io_request(bp, sync->ds_consumer);
 
-		/* Release delayed requests if possible. */
+		/* Requeue delayed requests if possible. */
 		g_mirror_regular_release(sc);
 
 		/* Find the smallest offset */
@@ -1685,11 +1648,26 @@ g_mirror_request_split(struct g_mirror_softc *sc, struct bio *bp)
 }
 
 static void
-g_mirror_register_request(struct bio *bp)
+g_mirror_register_request(struct g_mirror_softc *sc, struct bio *bp)
 {
-	struct g_mirror_softc *sc;
+	struct bio_queue queue;
+	struct bio *cbp;
+	struct g_consumer *cp;
+	struct g_mirror_disk *disk;
+
+	sx_assert(&sc->sc_lock, SA_XLOCKED);
+
+	/*
+	 * To avoid ordering issues, if a write is deferred because of a
+	 * collision with a sync request, all I/O is deferred until that
+	 * write is initiated.
+	 */
+	if (bp->bio_from->geom != sc->sc_sync.ds_geom &&
+	    !TAILQ_EMPTY(&sc->sc_regular_delayed)) {
+		g_mirror_regular_delay(sc, bp);
+		return;
+	}
 
-	sc = bp->bio_to->private;
 	switch (bp->bio_cmd) {
 	case BIO_READ:
 		switch (sc->sc_balance) {
@@ -1709,13 +1687,6 @@ g_mirror_register_request(struct bio *bp)
 		return;
 	case BIO_WRITE:
 	case BIO_DELETE:
-	    {
-		struct bio_queue queue;
-		struct g_mirror_disk *disk;
-		struct g_mirror_disk_sync *sync;
-		struct g_consumer *cp;
-		struct bio *cbp;
-
 		/*
 		 * Delay the request if it is colliding with a synchronization
 		 * request.
@@ -1744,12 +1715,11 @@ g_mirror_register_request(struct bio *bp)
 		 */
 		TAILQ_INIT(&queue);
 		LIST_FOREACH(disk, &sc->sc_disks, d_next) {
-			sync = &disk->d_sync;
 			switch (disk->d_state) {
 			case G_MIRROR_DISK_STATE_ACTIVE:
 				break;
 			case G_MIRROR_DISK_STATE_SYNCHRONIZING:
-				if (bp->bio_offset >= sync->ds_offset)
+				if (bp->bio_offset >= disk->d_sync.ds_offset)
 					continue;
 				break;
 			default:
@@ -1779,6 +1749,8 @@ g_mirror_register_request(struct bio *bp)
 			    cp->provider->name, cp->acr, cp->acw, cp->ace));
 		}
 		if (TAILQ_EMPTY(&queue)) {
+			KASSERT(bp->bio_cmd == BIO_DELETE,
+			    ("No consumers for regular request %p", bp));
 			g_io_deliver(bp, EOPNOTSUPP);
 			return;
 		}
@@ -1797,7 +1769,42 @@ g_mirror_register_request(struct bio *bp)
 		 */
 		TAILQ_INSERT_TAIL(&sc->sc_inflight, bp, bio_queue);
 		return;
-	    }
+	case BIO_FLUSH:
+		TAILQ_INIT(&queue);
+		LIST_FOREACH(disk, &sc->sc_disks, d_next) {
+			if (disk->d_state != G_MIRROR_DISK_STATE_ACTIVE)
+				continue;
+			cbp = g_clone_bio(bp);
+			if (cbp == NULL) {
+				while ((cbp = TAILQ_FIRST(&queue)) != NULL) {
+					TAILQ_REMOVE(&queue, cbp, bio_queue);
+					g_destroy_bio(cbp);
+				}
+				if (bp->bio_error == 0)
+					bp->bio_error = ENOMEM;
+				g_io_deliver(bp, bp->bio_error);
+				return;
+			}
+			TAILQ_INSERT_TAIL(&queue, cbp, bio_queue);
+			cbp->bio_done = g_mirror_done;
+			cbp->bio_caller1 = disk;
+			cbp->bio_to = disk->d_consumer->provider;
+		}
+		KASSERT(!TAILQ_EMPTY(&queue),
+		    ("No consumers for regular request %p", bp));
+		while ((cbp = TAILQ_FIRST(&queue)) != NULL) {
+			G_MIRROR_LOGREQ(3, cbp, "Sending request.");
+			TAILQ_REMOVE(&queue, cbp, bio_queue);
+			disk = cbp->bio_caller1;
+			cbp->bio_caller1 = NULL;
+			cp = disk->d_consumer;
+			KASSERT(cp->acr >= 1 && cp->acw >= 1 && cp->ace >= 1,
+			    ("Consumer %s not opened (r%dw%de%d).", cp->provider->name,
+			    cp->acr, cp->acw, cp->ace));
+			cp->index++;
+			g_io_request(cbp, cp);
+		}
+		break;
 	default:
 		KASSERT(1 == 0, ("Invalid command here: %u (device=%s)",
 		    bp->bio_cmd, sc->sc_name));
@@ -1928,15 +1935,16 @@ g_mirror_worker(void *arg)
 			G_MIRROR_DEBUG(5, "%s: I'm here 1.", __func__);
 			continue;
 		}
+
 		/*
 		 * Check if we can mark array as CLEAN and if we can't take
 		 * how much seconds should we wait.
 		 */
 		timeout = g_mirror_idle(sc, -1);
+
 		/*
-		 * Now I/O requests.
+		 * Handle I/O requests.
 		 */
-		/* Get first request from the queue. */
 		mtx_lock(&sc->sc_queue_mtx);
 		bp = TAILQ_FIRST(&sc->sc_queue);
 		if (bp != NULL)
@@ -1969,19 +1977,33 @@ g_mirror_worker(void *arg)
 
 		if (bp->bio_from->geom == sc->sc_sync.ds_geom &&
 		    (bp->bio_cflags & G_MIRROR_BIO_FLAG_SYNC) != 0) {
-			g_mirror_sync_request(bp);	/* READ */
+			/*
+			 * Handle completion of the first half (the read) of a
+			 * block synchronization operation.
+			 */
+			g_mirror_sync_request(sc, bp);
 		} else if (bp->bio_to != sc->sc_provider) {
 			if ((bp->bio_cflags & G_MIRROR_BIO_FLAG_REGULAR) != 0)
-				g_mirror_regular_request(bp);
+				/*
+				 * Handle completion of a regular I/O request.
+				 */
+				g_mirror_regular_request(sc, bp);
 			else if ((bp->bio_cflags & G_MIRROR_BIO_FLAG_SYNC) != 0)
-				g_mirror_sync_request(bp);	/* WRITE */
+				/*
+				 * Handle completion of the second half (the
+				 * write) of a block synchronization operation.
+				 */
+				g_mirror_sync_request(sc, bp);
 			else {
 				KASSERT(0,
 				    ("Invalid request cflags=0x%hx to=%s.",
 				    bp->bio_cflags, bp->bio_to->name));
 			}
 		} else {
-			g_mirror_register_request(bp);
+			/*
+			 * Initiate an I/O request.
+			 */
+			g_mirror_register_request(sc, bp);
 		}
 		G_MIRROR_DEBUG(5, "%s: I'm here 9.", __func__);
 	}
diff --git a/sys/i386/conf/GENERIC b/sys/i386/conf/GENERIC
index 8f4991ab3b1..cb170005486 100644
--- a/sys/i386/conf/GENERIC
+++ b/sys/i386/conf/GENERIC
@@ -312,7 +312,6 @@ device		malo			# Marvell Libertas wireless NICs.
 device		mwl			# Marvell 88W8363 802.11n wireless NICs.
 device		ral			# Ralink Technology RT2500 wireless NICs.
 device		wi			# WaveLAN/Intersil/Symbol 802.11 wireless NICs.
-#device		wl			# Older non 802.11 Wavelan wireless NIC.
 device		wpi			# Intel 3945ABG wireless NICs.
 
 # Pseudo devices.
diff --git a/sys/i386/conf/NOTES b/sys/i386/conf/NOTES
index fca963d6ca6..fa72d18eca2 100644
--- a/sys/i386/conf/NOTES
+++ b/sys/i386/conf/NOTES
@@ -539,7 +539,6 @@ hint.mse.0.irq="5"
 # nfe:	nVidia nForce MCP on-board Ethernet Networking (BSD open source)
 # sbni: Granch SBNI12-xx ISA and PCI adapters
 # vmx:	VMware VMXNET3 Ethernet (BSD open source)
-# wl:   Lucent Wavelan (ISA card only).
 # wpi:	Intel 3945ABG Wireless LAN controller
 #	Requires the wpi firmware module
 
diff --git a/sys/i386/isa/npx.c b/sys/i386/i386/npx.c
similarity index 100%
rename from sys/i386/isa/npx.c
rename to sys/i386/i386/npx.c
diff --git a/sys/i386/i386/trap.c b/sys/i386/i386/trap.c
index 4a9c7075f33..996ebc495e0 100644
--- a/sys/i386/i386/trap.c
+++ b/sys/i386/i386/trap.c
@@ -744,7 +744,6 @@ trap_pfault(struct trapframe *frame, int usermode, vm_offset_t eva)
 
 	td = curthread;
 	p = td->td_proc;
-	rv = 0;
 
 	if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
 		/*
@@ -805,7 +804,7 @@ trap_pfault(struct trapframe *frame, int usermode, vm_offset_t eva)
 			return (-2);
 #endif
 		if (usermode)
-			goto nogo;
+			return (SIGSEGV);
 
 		map = kernel_map;
 	} else {
@@ -862,7 +861,6 @@ trap_pfault(struct trapframe *frame, int usermode, vm_offset_t eva)
 #endif
 		return (0);
 	}
-nogo:
 	if (!usermode) {
 		if (td->td_intr_nesting_level == 0 &&
 		    curpcb->pcb_onfault != NULL) {
diff --git a/sys/isa/isa_common.c b/sys/isa/isa_common.c
index c95fe46655c..56fa0f2ba98 100644
--- a/sys/isa/isa_common.c
+++ b/sys/isa/isa_common.c
@@ -573,9 +573,10 @@ isa_probe_children(device_t dev)
 
 		err = device_probe_and_attach(child);
 		if (err == 0 && idev->id_vendorid == 0 &&
-		    strcmp(kern_ident, "GENERIC") == 0)
+		    strcmp(kern_ident, "GENERIC") == 0 &&
+		    device_is_attached(child))
 			device_printf(child,
-			    "non-PNP ISA device will be removed from GENERIC in FreeBSD 12.");
+			    "non-PNP ISA device will be removed from GENERIC in FreeBSD 12.\n");
 	}
 
 	/*
diff --git a/sys/kern/device_if.m b/sys/kern/device_if.m
index 305110fc67f..e58d39d6817 100644
--- a/sys/kern/device_if.m
+++ b/sys/kern/device_if.m
@@ -39,6 +39,11 @@
  */
 INTERFACE device;
 
+# Needed for timestamping device probe/attach calls
+HEADER {
+	#include <sys/tslog.h>
+}
+
 #
 # Default implementations of some methods.
 #
@@ -142,6 +147,12 @@ CODE {
  *			be returned to indicate the type of error
  * @see DEVICE_ATTACH(), pci_get_vendor(), pci_get_device()
  */
+PROLOG {
+	TSENTER2(device_get_name(dev));
+}
+EPILOG {
+	TSEXIT2(device_get_name(dev));
+}
 METHOD int probe {
 	device_t dev;
 };
@@ -199,6 +210,12 @@ STATICMETHOD void identify {
  *			be returned to indicate the type of error
  * @see DEVICE_PROBE()
  */
+PROLOG {
+	TSENTER2(device_get_name(dev));
+}
+EPILOG {
+	TSEXIT2(device_get_name(dev));
+}
 METHOD int attach {
 	device_t dev;
 };
diff --git a/sys/kern/init_main.c b/sys/kern/init_main.c
index dbd7a4ac07c..26100619912 100644
--- a/sys/kern/init_main.c
+++ b/sys/kern/init_main.c
@@ -220,6 +220,8 @@ mi_startup(void)
 	int verbose;
 #endif
 
+	TSENTER();
+
 	if (boothowto & RB_VERBOSE)
 		bootverbose++;
 
@@ -313,6 +315,8 @@ mi_startup(void)
 		}
 	}
 
+	TSEXIT();	/* Here so we don't overlap with start_init. */
+
 	mtx_assert(&Giant, MA_OWNED | MA_NOTRECURSED);
 	mtx_unlock(&Giant);
 
@@ -706,6 +710,8 @@ start_init(void *dummy)
 
 	GIANT_REQUIRED;
 
+	TSENTER();	/* Here so we don't overlap with mi_startup. */
+
 	td = curthread;
 	p = td->td_proc;
 
@@ -799,6 +805,7 @@ start_init(void *dummy)
 		 */
 		if ((error = sys_execve(td, &args)) == EJUSTRETURN) {
 			mtx_unlock(&Giant);
+			TSEXIT();
 			return;
 		}
 		if (error != ENOENT)
diff --git a/sys/kern/kern_clock.c b/sys/kern/kern_clock.c
index 509885d2cd6..d9b090d960b 100644
--- a/sys/kern/kern_clock.c
+++ b/sys/kern/kern_clock.c
@@ -335,14 +335,18 @@ read_cpu_time(long *cp_time)
 	}
 }
 
-#ifdef SW_WATCHDOG
 #include <sys/watchdog.h>
 
 static int watchdog_ticks;
 static int watchdog_enabled;
 static void watchdog_fire(void);
 static void watchdog_config(void *, u_int, int *);
-#endif /* SW_WATCHDOG */
+
+static void
+watchdog_attach(void)
+{
+	EVENTHANDLER_REGISTER(watchdog_list, watchdog_config, NULL, 0);
+}
 
 /*
  * Clock handling routines.
@@ -410,8 +414,14 @@ initclocks(void *dummy)
 	if (profhz == 0)
 		profhz = i;
 	psratio = profhz / i;
+
 #ifdef SW_WATCHDOG
-	EVENTHANDLER_REGISTER(watchdog_list, watchdog_config, NULL, 0);
+	/* Enable hardclock watchdog now, even if a hardware watchdog exists. */
+	watchdog_attach();
+#else
+	/* Volunteer to run a software watchdog. */
+	if (wdog_software_attach == NULL)
+		wdog_software_attach = watchdog_attach;
 #endif
 }
 
@@ -482,10 +492,8 @@ hardclock(int usermode, uintfptr_t pc)
 #ifdef DEVICE_POLLING
 	hardclock_device_poll();	/* this is very short and quick */
 #endif /* DEVICE_POLLING */
-#ifdef SW_WATCHDOG
 	if (watchdog_enabled > 0 && --watchdog_ticks <= 0)
 		watchdog_fire();
-#endif /* SW_WATCHDOG */
 }
 
 void
@@ -496,9 +504,7 @@ hardclock_cnt(int cnt, int usermode)
 	struct proc *p = td->td_proc;
 	int *t = DPCPU_PTR(pcputicks);
 	int flags, global, newticks;
-#ifdef SW_WATCHDOG
 	int i;
-#endif /* SW_WATCHDOG */
 
 	/*
 	 * Update per-CPU and possibly global ticks values.
@@ -558,13 +564,11 @@ hardclock_cnt(int cnt, int usermode)
 			atomic_store_rel_int(&devpoll_run, 0);
 		}
 #endif /* DEVICE_POLLING */
-#ifdef SW_WATCHDOG
 		if (watchdog_enabled > 0) {
 			i = atomic_fetchadd_int(&watchdog_ticks, -newticks);
 			if (i > 0 && i <= newticks)
 				watchdog_fire();
 		}
-#endif /* SW_WATCHDOG */
 	}
 	if (curcpu == CPU_FIRST())
 		cpu_tick_calibration();
@@ -841,8 +845,6 @@ SYSCTL_PROC(_kern, KERN_CLOCKRATE, clockrate,
 	0, 0, sysctl_kern_clockrate, "S,clockinfo",
 	"Rate and period of various kernel clocks");
 
-#ifdef SW_WATCHDOG
-
 static void
 watchdog_config(void *unused __unused, u_int cmd, int *error)
 {
@@ -891,5 +893,3 @@ watchdog_fire(void)
 	panic("watchdog timeout");
 #endif
 }
-
-#endif /* SW_WATCHDOG */
diff --git a/sys/kern/kern_dump.c b/sys/kern/kern_dump.c
index d2914966957..8d2e8ab19a8 100644
--- a/sys/kern/kern_dump.c
+++ b/sys/kern/kern_dump.c
@@ -27,8 +27,6 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
-#include "opt_watchdog.h"
-
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/conf.h>
@@ -36,9 +34,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/kernel.h>
 #include <sys/proc.h>
 #include <sys/kerneldump.h>
-#ifdef SW_WATCHDOG
 #include <sys/watchdog.h>
-#endif
 #include <vm/vm.h>
 #include <vm/vm_param.h>
 #include <vm/pmap.h>
@@ -205,9 +201,7 @@ dumpsys_cb_dumpdata(struct dump_pa *mdp, int seqnr, void *arg)
 		}
 
 		dumpsys_map_chunk(pa, chunk, &va);
-#ifdef SW_WATCHDOG
 		wdog_kern_pat(WD_LASTVAL);
-#endif
 
 		error = dump_append(di, va, 0, sz);
 		dumpsys_unmap_chunk(pa, chunk, va);
diff --git a/sys/kern/kern_kthread.c b/sys/kern/kern_kthread.c
index 05762cdae7d..ae7eef5ff07 100644
--- a/sys/kern/kern_kthread.c
+++ b/sys/kern/kern_kthread.c
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/unistd.h>
 #include <sys/wait.h>
 #include <sys/sched.h>
+#include <sys/tslog.h>
 #include <vm/vm.h>
 #include <vm/vm_extern.h>
 
@@ -124,6 +125,7 @@ kproc_create(void (*func)(void *), void *arg,
 #ifdef KTR
 	sched_clear_tdname(td);
 #endif
+	TSTHREAD(td, td->td_name);
 
 	/* call the processes' main()... */
 	cpu_fork_kthread_handler(td, func, arg);
@@ -283,6 +285,8 @@ kthread_add(void (*func)(void *), void *arg, struct proc *p,
 	vsnprintf(newtd->td_name, sizeof(newtd->td_name), fmt, ap);
 	va_end(ap);
 
+	TSTHREAD(newtd, newtd->td_name);
+
 	newtd->td_proc = p;  /* needed for cpu_copy_thread */
 	/* might be further optimized for kthread */
 	cpu_copy_thread(newtd, oldtd);
diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c
index e7985b4a4c5..3b2b10cddbc 100644
--- a/sys/kern/kern_mutex.c
+++ b/sys/kern/kern_mutex.c
@@ -170,6 +170,8 @@ LOCK_DELAY_SYSINIT_DEFAULT(mtx_spin_delay);
 struct mtx blocked_lock;
 struct mtx __exclusive_cache_line Giant;
 
+static void _mtx_lock_indefinite_check(struct mtx *, struct lock_delay_arg *);
+
 void
 assert_mtx(const struct lock_object *lock, int what)
 {
@@ -674,25 +676,6 @@ __mtx_lock_sleep(volatile uintptr_t *c, uintptr_t v)
 #endif
 }
 
-static void
-_mtx_lock_spin_failed(struct mtx *m)
-{
-	struct thread *td;
-
-	td = mtx_owner(m);
-
-	/* If the mutex is unlocked, try again. */
-	if (td == NULL)
-		return;
-
-	printf( "spin lock %p (%s) held by %p (tid %d) too long\n",
-	    m, m->lock_object.lo_name, td, td->td_tid);
-#ifdef WITNESS
-	witness_display_spinlock(&m->lock_object, td, printf);
-#endif
-	panic("spin lock held too long");
-}
-
 #ifdef SMP
 /*
  * _mtx_lock_spin_cookie: the tougher part of acquiring an MTX_SPIN lock.
@@ -764,16 +747,10 @@ _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v)
 		/* Give interrupts a chance while we spin. */
 		spinlock_exit();
 		do {
-			if (lda.spin_cnt < 10000000) {
+			if (__predict_true(lda.spin_cnt < 10000000)) {
 				lock_delay(&lda);
 			} else {
-				lda.spin_cnt++;
-				if (lda.spin_cnt < 60000000 || kdb_active ||
-				    panicstr != NULL)
-					DELAY(1);
-				else
-					_mtx_lock_spin_failed(m);
-				cpu_spinwait();
+				_mtx_lock_indefinite_check(m, &lda);
 			}
 			v = MTX_READ_VALUE(m);
 		} while (v != MTX_UNOWNED);
@@ -899,6 +876,10 @@ thread_lock_flags_(struct thread *td, int opts, const char *file, int line)
 
 	lock_delay_arg_init(&lda, &mtx_spin_delay);
 
+#ifdef HWPMC_HOOKS
+	PMC_SOFT_CALL( , , lock, failed);
+#endif
+
 #ifdef LOCK_PROFILING
 	doing_lockprof = 1;
 #elif defined(KDTRACE_HOOKS)
@@ -908,37 +889,29 @@ thread_lock_flags_(struct thread *td, int opts, const char *file, int line)
 #endif
 	for (;;) {
 retry:
-		v = MTX_UNOWNED;
 		spinlock_enter();
 		m = td->td_lock;
 		thread_lock_validate(m, opts, file, line);
+		v = MTX_READ_VALUE(m);
 		for (;;) {
-			if (_mtx_obtain_lock_fetch(m, &v, tid))
-				break;
-			if (v == MTX_UNOWNED)
+			if (v == MTX_UNOWNED) {
+				if (_mtx_obtain_lock_fetch(m, &v, tid))
+					break;
 				continue;
+			}
 			if (v == tid) {
 				m->mtx_recurse++;
 				break;
 			}
-#ifdef HWPMC_HOOKS
-			PMC_SOFT_CALL( , , lock, failed);
-#endif
 			lock_profile_obtain_lock_failed(&m->lock_object,
 			    &contested, &waittime);
 			/* Give interrupts a chance while we spin. */
 			spinlock_exit();
 			do {
-				if (lda.spin_cnt < 10000000) {
+				if (__predict_true(lda.spin_cnt < 10000000)) {
 					lock_delay(&lda);
 				} else {
-					lda.spin_cnt++;
-					if (lda.spin_cnt < 60000000 ||
-					    kdb_active || panicstr != NULL)
-						DELAY(1);
-					else
-						_mtx_lock_spin_failed(m);
-					cpu_spinwait();
+					_mtx_lock_indefinite_check(m, &lda);
 				}
 				if (m != td->td_lock)
 					goto retry;
@@ -1229,6 +1202,31 @@ mutex_init(void)
 	mtx_lock(&Giant);
 }
 
+static void __noinline
+_mtx_lock_indefinite_check(struct mtx *m, struct lock_delay_arg *ldap)
+{
+	struct thread *td;
+
+	ldap->spin_cnt++;
+	if (ldap->spin_cnt < 60000000 || kdb_active || panicstr != NULL)
+		DELAY(1);
+	else {
+		td = mtx_owner(m);
+
+		/* If the mutex is unlocked, try again. */
+		if (td == NULL)
+			return;
+
+		printf( "spin lock %p (%s) held by %p (tid %d) too long\n",
+		    m, m->lock_object.lo_name, td, td->td_tid);
+#ifdef WITNESS
+		witness_display_spinlock(&m->lock_object, td, printf);
+#endif
+		panic("spin lock held too long");
+	}
+	cpu_spinwait();
+}
+
 #ifdef DDB
 void
 db_show_mtx(const struct lock_object *lock)
diff --git a/sys/kern/kern_proc.c b/sys/kern/kern_proc.c
index 7334218be18..11e09e3687e 100644
--- a/sys/kern/kern_proc.c
+++ b/sys/kern/kern_proc.c
@@ -1920,11 +1920,9 @@ sysctl_kern_proc_args(SYSCTL_HANDLER_ARGS)
 	 * is nobody to modify pargs, thus we can just read.
 	 */
 	p = curproc;
-	if (pid == p->p_pid && p->p_numthreads == 1 && req->newptr == NULL) {
-		if ((pa = p->p_args) != NULL)
-			error = SYSCTL_OUT(req, pa->ar_args, pa->ar_length);
-		return (error);
-	}
+	if (pid == p->p_pid && p->p_numthreads == 1 && req->newptr == NULL &&
+	    (pa = p->p_args) != NULL)
+		return (SYSCTL_OUT(req, pa->ar_args, pa->ar_length));
 
 	flags = PGET_CANSEE;
 	if (req->newptr != NULL)
@@ -2161,8 +2159,10 @@ sysctl_kern_proc_ovmmap(SYSCTL_HANDLER_ARGS)
 		}
 
 		for (lobj = tobj = obj; tobj; tobj = tobj->backing_object) {
-			if (tobj != obj)
+			if (tobj != obj) {
 				VM_OBJECT_RLOCK(tobj);
+				kve->kve_offset += tobj->backing_object_offset;
+			}
 			if (lobj != obj)
 				VM_OBJECT_RUNLOCK(lobj);
 			lobj = tobj;
@@ -2170,7 +2170,7 @@ sysctl_kern_proc_ovmmap(SYSCTL_HANDLER_ARGS)
 
 		kve->kve_start = (void*)entry->start;
 		kve->kve_end = (void*)entry->end;
-		kve->kve_offset = (off_t)entry->offset;
+		kve->kve_offset += (off_t)entry->offset;
 
 		if (entry->protection & VM_PROT_READ)
 			kve->kve_protection |= KVME_PROT_READ;
@@ -2391,6 +2391,7 @@ kern_proc_vmmap_out(struct proc *p, struct sbuf *sb, ssize_t maxlen, int flags)
 			for (tobj = obj; tobj != NULL;
 			    tobj = tobj->backing_object) {
 				VM_OBJECT_RLOCK(tobj);
+				kve->kve_offset += tobj->backing_object_offset;
 				lobj = tobj;
 			}
 			if (obj->backing_object == NULL)
@@ -2411,7 +2412,7 @@ kern_proc_vmmap_out(struct proc *p, struct sbuf *sb, ssize_t maxlen, int flags)
 
 		kve->kve_start = entry->start;
 		kve->kve_end = entry->end;
-		kve->kve_offset = entry->offset;
+		kve->kve_offset += entry->offset;
 
 		if (entry->protection & VM_PROT_READ)
 			kve->kve_protection |= KVME_PROT_READ;
diff --git a/sys/kern/kern_resource.c b/sys/kern/kern_resource.c
index 97ffc08bcec..7f2f3d87b4e 100644
--- a/sys/kern/kern_resource.c
+++ b/sys/kern/kern_resource.c
@@ -1384,18 +1384,17 @@ ui_racct_foreach(void (*callback)(struct racct *racct,
 static inline int
 chglimit(struct uidinfo *uip, long *limit, int diff, rlim_t max, const char *name)
 {
+	long new;
 
 	/* Don't allow them to exceed max, but allow subtraction. */
+	new = atomic_fetchadd_long(limit, (long)diff) + diff;
 	if (diff > 0 && max != 0) {
-		if (atomic_fetchadd_long(limit, (long)diff) + diff > max) {
+		if (new < 0 || new > max) {
 			atomic_subtract_long(limit, (long)diff);
 			return (0);
 		}
-	} else {
-		atomic_add_long(limit, (long)diff);
-		if (*limit < 0)
-			printf("negative %s for uid = %d\n", name, uip->ui_uid);
-	}
+	} else if (new < 0)
+		printf("negative %s for uid = %d\n", name, uip->ui_uid);
 	return (1);
 }
 
diff --git a/sys/kern/kern_rwlock.c b/sys/kern/kern_rwlock.c
index 70a8cdd3681..025ced411fd 100644
--- a/sys/kern/kern_rwlock.c
+++ b/sys/kern/kern_rwlock.c
@@ -516,7 +516,7 @@ __rw_rlock_hard(struct rwlock *rw, struct thread *td, uintptr_t v
 #endif
 			KTR_STATE0(KTR_SCHED, "thread", sched_tdname(curthread),
 			    "running");
-			if (i != rowner_loops)
+			if (i < rowner_loops)
 				continue;
 		}
 #endif
@@ -755,7 +755,7 @@ __rw_runlock_hard(struct rwlock *rw, struct thread *td, uintptr_t v
     LOCK_FILE_LINE_ARG_DEF)
 {
 	struct turnstile *ts;
-	uintptr_t x, queue;
+	uintptr_t setv, queue;
 
 	if (SCHEDULER_STOPPED())
 		return;
@@ -795,14 +795,14 @@ __rw_runlock_hard(struct rwlock *rw, struct thread *td, uintptr_t v
 		 * acquired a read lock, so drop the turnstile lock and
 		 * restart.
 		 */
-		x = RW_UNLOCKED;
+		setv = RW_UNLOCKED;
+		queue = TS_SHARED_QUEUE;
 		if (v & RW_LOCK_WRITE_WAITERS) {
 			queue = TS_EXCLUSIVE_QUEUE;
-			x |= (v & RW_LOCK_READ_WAITERS);
-		} else
-			queue = TS_SHARED_QUEUE;
+			setv |= (v & RW_LOCK_READ_WAITERS);
+		}
 		v |= RW_READERS_LOCK(1);
-		if (!atomic_fcmpset_rel_ptr(&rw->rw_lock, &v, x))
+		if (!atomic_fcmpset_rel_ptr(&rw->rw_lock, &v, setv))
 			goto retry_ts;
 		if (LOCK_LOG_TEST(&rw->lock_object, 0))
 			CTR2(KTR_LOCK, "%s: %p last succeeded with waiters",
@@ -872,6 +872,7 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v LOCK_FILE_LINE_ARG_DEF)
 #ifdef ADAPTIVE_RWLOCKS
 	int spintries = 0;
 	int i, n;
+	int sleep_reason = 0;
 #endif
 	uintptr_t x;
 #ifdef LOCK_PROFILING
@@ -952,6 +953,7 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v LOCK_FILE_LINE_ARG_DEF)
 		 * running on another CPU, spin until the owner stops
 		 * running or the state of the lock changes.
 		 */
+		sleep_reason = 1;
 		owner = lv_rw_wowner(v);
 		if (!(v & RW_LOCK_READ) && TD_IS_RUNNING(owner)) {
 			if (LOCK_LOG_TEST(&rw->lock_object, 0))
@@ -993,8 +995,9 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v LOCK_FILE_LINE_ARG_DEF)
 #ifdef KDTRACE_HOOKS
 			lda.spin_cnt += rowner_loops - i;
 #endif
-			if (i != rowner_loops)
+			if (i < rowner_loops)
 				continue;
+			sleep_reason = 2;
 		}
 #endif
 		ts = turnstile_trywait(&rw->lock_object);
@@ -1015,6 +1018,9 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v LOCK_FILE_LINE_ARG_DEF)
 				turnstile_cancel(ts);
 				continue;
 			}
+		} else if (RW_READERS(v) > 0 && sleep_reason == 1) {
+			turnstile_cancel(ts);
+			continue;
 		}
 #endif
 		/*
diff --git a/sys/kern/kern_sendfile.c b/sys/kern/kern_sendfile.c
index 039913508e7..3650ce15c66 100644
--- a/sys/kern/kern_sendfile.c
+++ b/sys/kern/kern_sendfile.c
@@ -273,6 +273,7 @@ sendfile_iodone(void *arg, vm_page_t *pg, int count, int error)
 	if (!refcount_release(&sfio->nios))
 		return;
 
+	CURVNET_SET(so->so_vnet);
 	if (sfio->error) {
 		struct mbuf *m;
 
@@ -293,15 +294,13 @@ sendfile_iodone(void *arg, vm_page_t *pg, int count, int error)
 		m = sfio->m;
 		for (int i = 0; i < sfio->npages; i++)
 			m = m_free(m);
-	} else {
-		CURVNET_SET(so->so_vnet);
+	} else
 		(void )(so->so_proto->pr_usrreqs->pru_ready)(so, sfio->m,
 		    sfio->npages);
-		CURVNET_RESTORE();
-	}
 
 	SOCK_LOCK(so);
 	sorele(so);
+	CURVNET_RESTORE();
 	free(sfio, M_TEMP);
 }
 
diff --git a/sys/kern/kern_sx.c b/sys/kern/kern_sx.c
index 84ffb609053..d1440f8c7f5 100644
--- a/sys/kern/kern_sx.c
+++ b/sys/kern/kern_sx.c
@@ -91,7 +91,7 @@ PMC_SOFT_DECLARE( , , lock, failed);
 	WITNESS_SAVE_DECL(Giant)					\
 
 #define	GIANT_SAVE(work) do {						\
-	if (mtx_owned(&Giant)) {					\
+	if (__predict_false(mtx_owned(&Giant))) {			\
 		work++;							\
 		WITNESS_SAVE(&Giant.lock_object, Giant);		\
 		while (mtx_owned(&Giant)) {				\
@@ -533,6 +533,8 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 #ifdef ADAPTIVE_SX
 	volatile struct thread *owner;
 	u_int i, n, spintries = 0;
+	bool adaptive;
+	int sleep_reason = 0;
 #endif
 #ifdef LOCK_PROFILING
 	uint64_t waittime = 0;
@@ -581,6 +583,10 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 		CTR5(KTR_LOCK, "%s: %s contested (lock=%p) at %s:%d", __func__,
 		    sx->lock_object.lo_name, (void *)sx->sx_lock, file, line);
 
+#ifdef ADAPTIVE_SX
+	adaptive = ((sx->lock_object.lo_flags & SX_NOADAPTIVE) != 0);
+#endif
+
 #ifdef HWPMC_HOOKS
 	PMC_SOFT_CALL( , , lock, failed);
 #endif
@@ -597,6 +603,9 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 		state = x;
 	}
 #endif
+#ifndef INVARIANTS
+	GIANT_SAVE(extra_work);
+#endif
 
 	for (;;) {
 		if (x == SX_LOCK_UNLOCKED) {
@@ -604,67 +613,70 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 				break;
 			continue;
 		}
+#ifdef INVARIANTS
+		GIANT_SAVE(extra_work);
+#endif
 #ifdef KDTRACE_HOOKS
 		lda.spin_cnt++;
 #endif
 #ifdef ADAPTIVE_SX
+		if (__predict_false(!adaptive))
+			goto sleepq;
 		/*
 		 * If the lock is write locked and the owner is
 		 * running on another CPU, spin until the owner stops
 		 * running or the state of the lock changes.
 		 */
-		if ((sx->lock_object.lo_flags & SX_NOADAPTIVE) == 0) {
-			if ((x & SX_LOCK_SHARED) == 0) {
-				owner = lv_sx_owner(x);
-				if (TD_IS_RUNNING(owner)) {
-					if (LOCK_LOG_TEST(&sx->lock_object, 0))
-						CTR3(KTR_LOCK,
-					    "%s: spinning on %p held by %p",
-						    __func__, sx, owner);
-					KTR_STATE1(KTR_SCHED, "thread",
-					    sched_tdname(curthread), "spinning",
-					    "lockname:\"%s\"",
-					    sx->lock_object.lo_name);
-					GIANT_SAVE(extra_work);
-					do {
-						lock_delay(&lda);
-						x = SX_READ_VALUE(sx);
-						owner = lv_sx_owner(x);
-					} while (owner != NULL &&
-						    TD_IS_RUNNING(owner));
-					KTR_STATE0(KTR_SCHED, "thread",
-					    sched_tdname(curthread), "running");
-					continue;
-				}
-			} else if (SX_SHARERS(x) && spintries < asx_retries) {
+		if ((x & SX_LOCK_SHARED) == 0) {
+			owner = lv_sx_owner(x);
+			if (TD_IS_RUNNING(owner)) {
+				if (LOCK_LOG_TEST(&sx->lock_object, 0))
+					CTR3(KTR_LOCK,
+				    "%s: spinning on %p held by %p",
+					    __func__, sx, owner);
 				KTR_STATE1(KTR_SCHED, "thread",
 				    sched_tdname(curthread), "spinning",
-				    "lockname:\"%s\"", sx->lock_object.lo_name);
-				GIANT_SAVE(extra_work);
-				spintries++;
-				for (i = 0; i < asx_loops; i += n) {
-					if (LOCK_LOG_TEST(&sx->lock_object, 0))
-						CTR4(KTR_LOCK,
-				    "%s: shared spinning on %p with %u and %u",
-						    __func__, sx, spintries, i);
-					n = SX_SHARERS(x);
-					lock_delay_spin(n);
+				    "lockname:\"%s\"",
+				    sx->lock_object.lo_name);
+				do {
+					lock_delay(&lda);
 					x = SX_READ_VALUE(sx);
-					if ((x & SX_LOCK_SHARED) == 0 ||
-					    SX_SHARERS(x) == 0)
-						break;
-				}
-#ifdef KDTRACE_HOOKS
-				lda.spin_cnt += i;
-#endif
+					owner = lv_sx_owner(x);
+				} while (owner != NULL &&
+					    TD_IS_RUNNING(owner));
 				KTR_STATE0(KTR_SCHED, "thread",
 				    sched_tdname(curthread), "running");
-				if (i != asx_loops)
-					continue;
+				continue;
 			}
-		}
+			sleep_reason = 1;
+		} else if (SX_SHARERS(x) && spintries < asx_retries) {
+			KTR_STATE1(KTR_SCHED, "thread",
+			    sched_tdname(curthread), "spinning",
+			    "lockname:\"%s\"", sx->lock_object.lo_name);
+			spintries++;
+			for (i = 0; i < asx_loops; i += n) {
+				if (LOCK_LOG_TEST(&sx->lock_object, 0))
+					CTR4(KTR_LOCK,
+			    "%s: shared spinning on %p with %u and %u",
+					    __func__, sx, spintries, i);
+				n = SX_SHARERS(x);
+				lock_delay_spin(n);
+				x = SX_READ_VALUE(sx);
+				if ((x & SX_LOCK_SHARED) == 0 ||
+				    SX_SHARERS(x) == 0)
+					break;
+			}
+#ifdef KDTRACE_HOOKS
+			lda.spin_cnt += i;
+#endif
+			KTR_STATE0(KTR_SCHED, "thread",
+			    sched_tdname(curthread), "running");
+			if (i < asx_loops)
+				continue;
+			sleep_reason = 2;
+		}
+sleepq:
 #endif
-
 		sleepq_lock(&sx->lock_object);
 		x = SX_READ_VALUE(sx);
 retry_sleepq:
@@ -686,10 +698,14 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 		 * chain lock.  If so, drop the sleep queue lock and try
 		 * again.
 		 */
-		if (!(x & SX_LOCK_SHARED) &&
-		    (sx->lock_object.lo_flags & SX_NOADAPTIVE) == 0) {
-			owner = (struct thread *)SX_OWNER(x);
-			if (TD_IS_RUNNING(owner)) {
+		if (adaptive) {
+			if (!(x & SX_LOCK_SHARED)) {
+				owner = (struct thread *)SX_OWNER(x);
+				if (TD_IS_RUNNING(owner)) {
+					sleepq_release(&sx->lock_object);
+					continue;
+				}
+			} else if (SX_SHARERS(x) > 0 && sleep_reason == 1) {
 				sleepq_release(&sx->lock_object);
 				continue;
 			}
@@ -742,7 +758,6 @@ _sx_xlock_hard(struct sx *sx, uintptr_t x, int opts LOCK_FILE_LINE_ARG_DEF)
 #ifdef KDTRACE_HOOKS
 		sleep_time -= lockstat_nsecs(&sx->lock_object);
 #endif
-		GIANT_SAVE(extra_work);
 		sleepq_add(&sx->lock_object, NULL, sx->lock_object.lo_name,
 		    SLEEPQ_SX | ((opts & SX_INTERRUPTIBLE) ?
 		    SLEEPQ_INTERRUPTIBLE : 0), SQ_EXCLUSIVE_QUEUE);
@@ -892,6 +907,7 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 	GIANT_DECLARE;
 #ifdef ADAPTIVE_SX
 	volatile struct thread *owner;
+	bool adaptive;
 #endif
 #ifdef LOCK_PROFILING
 	uint64_t waittime = 0;
@@ -920,6 +936,10 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 	lock_delay_arg_init(&lda, NULL);
 #endif
 
+#ifdef ADAPTIVE_SX
+	adaptive = ((sx->lock_object.lo_flags & SX_NOADAPTIVE) != 0);
+#endif
+
 #ifdef HWPMC_HOOKS
 	PMC_SOFT_CALL( , , lock, failed);
 #endif
@@ -936,6 +956,9 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 		state = x;
 	}
 #endif
+#ifndef INVARIANTS
+	GIANT_SAVE(extra_work);
+#endif
 
 	/*
 	 * As with rwlocks, we don't make any attempt to try to block
@@ -944,37 +967,40 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 	for (;;) {
 		if (__sx_slock_try(sx, &x LOCK_FILE_LINE_ARG))
 			break;
+#ifdef INVARIANTS
+		GIANT_SAVE(extra_work);
+#endif
 #ifdef KDTRACE_HOOKS
 		lda.spin_cnt++;
 #endif
 
 #ifdef ADAPTIVE_SX
+		if (__predict_false(!adaptive))
+			goto sleepq;
 		/*
 		 * If the owner is running on another CPU, spin until
 		 * the owner stops running or the state of the lock
 		 * changes.
 		 */
-		if ((sx->lock_object.lo_flags & SX_NOADAPTIVE) == 0) {
-			owner = lv_sx_owner(x);
-			if (TD_IS_RUNNING(owner)) {
-				if (LOCK_LOG_TEST(&sx->lock_object, 0))
-					CTR3(KTR_LOCK,
-					    "%s: spinning on %p held by %p",
-					    __func__, sx, owner);
-				KTR_STATE1(KTR_SCHED, "thread",
-				    sched_tdname(curthread), "spinning",
-				    "lockname:\"%s\"", sx->lock_object.lo_name);
-				GIANT_SAVE(extra_work);
-				do {
-					lock_delay(&lda);
-					x = SX_READ_VALUE(sx);
-					owner = lv_sx_owner(x);
-				} while (owner != NULL && TD_IS_RUNNING(owner));
-				KTR_STATE0(KTR_SCHED, "thread",
-				    sched_tdname(curthread), "running");
-				continue;
-			}
+		owner = lv_sx_owner(x);
+		if (TD_IS_RUNNING(owner)) {
+			if (LOCK_LOG_TEST(&sx->lock_object, 0))
+				CTR3(KTR_LOCK,
+				    "%s: spinning on %p held by %p",
+				    __func__, sx, owner);
+			KTR_STATE1(KTR_SCHED, "thread",
+			    sched_tdname(curthread), "spinning",
+			    "lockname:\"%s\"", sx->lock_object.lo_name);
+			do {
+				lock_delay(&lda);
+				x = SX_READ_VALUE(sx);
+				owner = lv_sx_owner(x);
+			} while (owner != NULL && TD_IS_RUNNING(owner));
+			KTR_STATE0(KTR_SCHED, "thread",
+			    sched_tdname(curthread), "running");
+			continue;
 		}
+sleepq:
 #endif
 
 		/*
@@ -999,8 +1025,7 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 		 * the owner stops running or the state of the lock
 		 * changes.
 		 */
-		if (!(x & SX_LOCK_SHARED) &&
-		    (sx->lock_object.lo_flags & SX_NOADAPTIVE) == 0) {
+		if (!(x & SX_LOCK_SHARED) && adaptive) {
 			owner = (struct thread *)SX_OWNER(x);
 			if (TD_IS_RUNNING(owner)) {
 				sleepq_release(&sx->lock_object);
@@ -1035,7 +1060,6 @@ _sx_slock_hard(struct sx *sx, int opts, uintptr_t x LOCK_FILE_LINE_ARG_DEF)
 #ifdef KDTRACE_HOOKS
 		sleep_time -= lockstat_nsecs(&sx->lock_object);
 #endif
-		GIANT_SAVE(extra_work);
 		sleepq_add(&sx->lock_object, NULL, sx->lock_object.lo_name,
 		    SLEEPQ_SX | ((opts & SX_INTERRUPTIBLE) ?
 		    SLEEPQ_INTERRUPTIBLE : 0), SQ_SHARED_QUEUE);
diff --git a/sys/kern/kern_tslog.c b/sys/kern/kern_tslog.c
new file mode 100644
index 00000000000..a0cb230f191
--- /dev/null
+++ b/sys/kern/kern_tslog.c
@@ -0,0 +1,118 @@
+/*-
+ * Copyright (c) 2017 Colin Percival
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/sbuf.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+#include <sys/tslog.h>
+
+#include <machine/atomic.h>
+#include <machine/cpu.h>
+
+#ifndef TSLOGSIZE
+#define TSLOGSIZE 262144
+#endif
+
+static volatile long nrecs = 0;
+static struct timestamp {
+	void * td;
+	int type;
+	const char * f;
+	const char * s;
+	uint64_t tsc;
+} timestamps[TSLOGSIZE];
+
+void
+tslog(void * td, int type, const char * f, const char * s)
+{
+	uint64_t tsc = get_cyclecount();
+	long pos;
+
+	/* Grab a slot. */
+	pos = atomic_fetchadd_long(&nrecs, 1);
+
+	/* Store record. */
+	if (pos < nitems(timestamps)) {
+		timestamps[pos].td = td;
+		timestamps[pos].type = type;
+		timestamps[pos].f = f;
+		timestamps[pos].s = s;
+		timestamps[pos].tsc = tsc;
+	}
+}
+
+static int
+sysctl_debug_tslog(SYSCTL_HANDLER_ARGS)
+{
+	int error;
+	struct sbuf *sb;
+	size_t i, limit;
+
+	/*
+	 * This code can race against the code in tslog() which stores
+	 * records: Theoretically we could end up reading a record after
+	 * its slots have been reserved but before it has been written.
+	 * Since this code takes orders of magnitude longer to run than
+	 * tslog() takes to write a record, it is highly unlikely that
+	 * anyone will ever experience this race.
+	 */
+	sb = sbuf_new_for_sysctl(NULL, NULL, 1024, req);
+	limit = MIN(nrecs, nitems(timestamps));
+	for (i = 0; i < limit; i++) {
+		sbuf_printf(sb, "%p", timestamps[i].td);
+		sbuf_printf(sb, " %llu",
+		    (unsigned long long)timestamps[i].tsc);
+		switch (timestamps[i].type) {
+		case TS_ENTER:
+			sbuf_printf(sb, " ENTER");
+			break;
+		case TS_EXIT:
+			sbuf_printf(sb, " EXIT");
+			break;
+		case TS_THREAD:
+			sbuf_printf(sb, " THREAD");
+			break;
+		case TS_EVENT:
+			sbuf_printf(sb, " EVENT");
+			break;
+		}
+		sbuf_printf(sb, " %s", timestamps[i].f ? timestamps[i].f : "(null)");
+		if (timestamps[i].s)
+			sbuf_printf(sb, " %s\n", timestamps[i].s);
+		else
+			sbuf_printf(sb, "\n");
+	}
+	error = sbuf_finish(sb);
+	sbuf_delete(sb);
+	return (error);
+}
+
+SYSCTL_PROC(_debug, OID_AUTO, tslog, CTLTYPE_STRING|CTLFLAG_RD|CTLFLAG_MPSAFE,
+    0, 0, sysctl_debug_tslog, "", "Dump recorded event timestamps");
diff --git a/sys/kern/subr_autoconf.c b/sys/kern/subr_autoconf.c
index 278393a4cb7..6a998a53380 100644
--- a/sys/kern/subr_autoconf.c
+++ b/sys/kern/subr_autoconf.c
@@ -155,6 +155,7 @@ boot_run_interrupt_driven_config_hooks(void *dummy)
 	run_interrupt_driven_config_hooks();
 
 	/* Block boot processing until all hooks are disestablished. */
+	TSWAIT("config hooks");
 	mtx_lock(&intr_config_hook_lock);
 	warned = 0;
 	while (!TAILQ_EMPTY(&intr_config_hook_list)) {
@@ -168,6 +169,7 @@ boot_run_interrupt_driven_config_hooks(void *dummy)
 		}
 	}
 	mtx_unlock(&intr_config_hook_lock);
+	TSUNWAIT("config hooks");
 }
 
 SYSINIT(intr_config_hooks, SI_SUB_INT_CONFIG_HOOKS, SI_ORDER_FIRST,
@@ -183,6 +185,7 @@ config_intrhook_establish(struct intr_config_hook *hook)
 {
 	struct intr_config_hook *hook_entry;
 
+	TSHOLD("config hooks");
 	mtx_lock(&intr_config_hook_lock);
 	TAILQ_FOREACH(hook_entry, &intr_config_hook_list, ich_links)
 		if (hook_entry == hook)
@@ -239,6 +242,7 @@ config_intrhook_disestablish(struct intr_config_hook *hook)
 	if (next_to_notify == hook)
 		next_to_notify = TAILQ_NEXT(hook, ich_links);
 	TAILQ_REMOVE(&intr_config_hook_list, hook, ich_links);
+	TSRELEASE("config hooks");
 
 	/* Wakeup anyone watching the list */
 	wakeup(&intr_config_hook_list);
diff --git a/sys/kern/subr_prf.c b/sys/kern/subr_prf.c
index 312485e870f..040125e3f73 100644
--- a/sys/kern/subr_prf.c
+++ b/sys/kern/subr_prf.c
@@ -276,6 +276,7 @@ _vprintf(int level, int flags, const char *fmt, va_list ap)
 	char bufr[PRINTF_BUFR_SIZE];
 #endif
 
+	TSENTER();
 	pca.tty = NULL;
 	pca.pri = level;
 	pca.flags = flags;
@@ -303,6 +304,7 @@ _vprintf(int level, int flags, const char *fmt, va_list ap)
 	}
 #endif
 
+	TSEXIT();
 	return (retval);
 }
 
diff --git a/sys/kern/sysv_ipc.c b/sys/kern/sysv_ipc.c
index 789218e8bd4..7e58608d616 100644
--- a/sys/kern/sysv_ipc.c
+++ b/sys/kern/sysv_ipc.c
@@ -1,4 +1,3 @@
-/*	$NetBSD: sysv_ipc.c,v 1.7 1994/06/29 06:33:11 cgd Exp $	*/
 /*-
  * SPDX-License-Identifier: BSD-4-Clause
  *
@@ -33,6 +32,8 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: sysv_ipc.c,v 1.9 1995/06/02 19:04:22 mycroft Exp $
  */
 
 #include <sys/cdefs.h>
diff --git a/sys/kern/sysv_shm.c b/sys/kern/sysv_shm.c
index 0541801ee09..b28de1c12d2 100644
--- a/sys/kern/sysv_shm.c
+++ b/sys/kern/sysv_shm.c
@@ -1,4 +1,3 @@
-/*	$NetBSD: sysv_shm.c,v 1.23 1994/07/04 23:25:12 glass Exp $	*/
 /*-
  * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause-FreeBSD
  *
@@ -29,6 +28,8 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: sysv_shm.c,v 1.39 1997/10/07 10:02:03 drochner Exp $
  */
 /*-
  * Copyright (c) 2003-2005 McAfee, Inc.
diff --git a/sys/kern/vfs_mountroot.c b/sys/kern/vfs_mountroot.c
index 1c67c6a83c2..4b1a56ccdde 100644
--- a/sys/kern/vfs_mountroot.c
+++ b/sys/kern/vfs_mountroot.c
@@ -176,6 +176,7 @@ root_mount_hold(const char *identifier)
 	h = malloc(sizeof *h, M_DEVBUF, M_ZERO | M_WAITOK);
 	h->who = identifier;
 	mtx_lock(&root_holds_mtx);
+	TSHOLD("root mount");
 	LIST_INSERT_HEAD(&root_holds, h, list);
 	mtx_unlock(&root_holds_mtx);
 	return (h);
@@ -190,6 +191,7 @@ root_mount_rel(struct root_hold_token *h)
 
 	mtx_lock(&root_holds_mtx);
 	LIST_REMOVE(h, list);
+	TSRELEASE("root mount");
 	wakeup(&root_holds);
 	mtx_unlock(&root_holds_mtx);
 	free(h, M_DEVBUF);
@@ -938,6 +940,8 @@ vfs_mountroot_wait(void)
 	struct timeval lastfail;
 	int curfail;
 
+	TSENTER();
+
 	curfail = 0;
 	while (1) {
 		DROP_GIANT();
@@ -954,9 +958,13 @@ vfs_mountroot_wait(void)
 				printf(" %s", h->who);
 			printf("\n");
 		}
+		TSWAIT("root mount");
 		msleep(&root_holds, &root_holds_mtx, PZERO | PDROP, "roothold",
 		    hz);
+		TSUNWAIT("root mount");
 	}
+
+	TSEXIT();
 }
 
 static int
@@ -1013,6 +1021,8 @@ vfs_mountroot(void)
 	struct thread *td;
 	time_t timebase;
 	int error;
+	
+	TSENTER();
 
 	td = curthread;
 
@@ -1062,6 +1072,8 @@ vfs_mountroot(void)
 	mtx_unlock(&root_holds_mtx);
 
 	EVENTHANDLER_INVOKE(mountroot);
+
+	TSEXIT();
 }
 
 static struct mntarg *
diff --git a/sys/mips/adm5120/adm5120_machdep.c b/sys/mips/adm5120/adm5120_machdep.c
deleted file mode 100644
index b1c1e3a273a..00000000000
--- a/sys/mips/adm5120/adm5120_machdep.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-extern int	*edata;
-extern int	*end;
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	int i;
-
-	printf("entry: mips_init()\n");
-
-	bootverbose = 1;
-	realmem = btoc(16 << 20);
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = phys_avail[0];
-	dump_avail[1] = phys_avail[1];
-
-	physmem = realmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
-
-	__asm __volatile("li	$25, 0xbfc00000");
-	__asm __volatile("j	$25");
-}
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	vm_offset_t kernend;
-	uint64_t platform_counter_freq = 175 * 1000 * 1000;
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	cninit();
-	mips_init();
-	mips_timer_init_params(platform_counter_freq, 0);
-}
diff --git a/sys/mips/adm5120/adm5120reg.h b/sys/mips/adm5120/adm5120reg.h
deleted file mode 100644
index ce8a4d5b7bd..00000000000
--- a/sys/mips/adm5120/adm5120reg.h
+++ /dev/null
@@ -1,296 +0,0 @@
-/*	$NetBSD: adm5120reg.h,v 1.1 2007/03/20 08:52:03 dyoung Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _ADM5120REG_H_
-#define _ADM5120REG_H_
-
-/* Helpers from NetBSD */
-/* __BIT(n): nth bit, where __BIT(0) == 0x1. */
-#define __BIT(__n)      \
-        (((__n) >= NBBY * sizeof(uintmax_t)) ? 0 : ((uintmax_t)1 << (__n)))
-
-/* __BITS(m, n): bits m through n, m < n. */
-#define __BITS(__m, __n)        \
-        ((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1))
-
-/* Last byte of physical address space. */
-#define	ADM5120_TOP			0x1fffffff
-#define	ADM5120_BOTTOM			0x0
-
-/* Flash addresses */
-#define	ADM5120_BASE_SRAM0		0x1fc00000
-
-/* UARTs */
-#define ADM5120_BASE_UART1		0x12800000
-#define ADM5120_BASE_UART0		0x12600000
-
-/* ICU */
-#define	ADM5120_BASE_ICU		0x12200000
-#define		ICU_STATUS_REG		0x00
-#define		ICU_RAW_STATUS_REG	0x04
-#define		ICU_ENABLE_REG		0x08
-#define		ICU_DISABLE_REG		0x0c
-#define		ICU_SOFT_REG		0x10
-#define		ICU_MODE_REG		0x14
-#define		ICU_FIQ_STATUS_REG	0x18
-#define		ICU_TESTSRC_REG		0x1c
-#define		ICU_SRCSEL_REG		0x20
-#define		ICU_LEVEL_REG		0x24
-#define		ICU_INT_MASK		0x3ff
-
-/* Switch */
-#define	ADM5120_BASE_SWITCH		0x12000000
-#define		SW_CODE_REG		0x00
-#define			CLKS_MASK		0x00300000
-#define			CLKS_175MHZ		0x00000000
-#define			CLKS_200MHZ		0x00100000
-#define		SW_SFTRES_REG		0x04
-#define		SW_MEMCONT_REG		0x1c
-#define			SDRAM_SIZE_4MBYTES	0x0001
-#define			SDRAM_SIZE_8MBYTES	0x0002
-#define			SDRAM_SIZE_16MBYTES	0x0003
-#define			SDRAM_SIZE_64MBYTES	0x0004
-#define			SDRAM_SIZE_128MBYTES	0x0005
-#define			SDRAM_SIZE_MASK		0x0007
-#define			SRAM0_SIZE_SHIFT	8
-#define			SRAM1_SIZE_SHIFT	16
-#define			SRAM_MASK		0x0007
-#define			SRAM_SSIZE		0x40000
-
-#define	ADM5120_BASE_PCI_CONFDATA	0x115ffff8
-#define	ADM5120_BASE_PCI_CONFADDR	0x115ffff0
-#define	ADM5120_BASE_PCI_IO		0x11500000
-#define	ADM5120_BASE_PCI_MEM		0x11400000
-#define	ADM5120_BASE_USB		0x11200000
-#define	ADM5120_BASE_MPMC		0x11000000
-#define	ADM5120_BASE_EXTIO1		0x10e00000
-#define	ADM5120_BASE_EXTIO0		0x10c00000
-#define	ADM5120_BASE_RSVD0		0x10800000
-#define	ADM5120_BASE_SRAM1		0x10000000
-
-#define	_REG_READ(b, o)	*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((b) + (o)))
-#define	SW_READ(o)	_REG_READ(ADM5120_BASE_SWITCH, o)
-
-#define	_REG_WRITE(b, o, v)	(_REG_READ(b, o)) = (v)
-#define	SW_WRITE(o, v)	_REG_WRITE(ADM5120_BASE_SWITCH,o, v)
-
-/* USB */
-
-/* Watchdog Timers: base address is switch controller */
-
-#define	ADM5120_WDOG0			0x00c0
-#define	ADM5120_WDOG1			0x00c4
-
-#define	ADM5120_WDOG0_WTTR	__BIT(31)	/* 0: do not reset,
-						 * 1: reset on wdog expiration
-						 */
-#define	ADM5120_WDOG1_WDE	__BIT(31)	/* 0: deactivate,
-						 * 1: drop all CPU-bound
-						 * packets, disable flow
-						 * control on all ports.
-						 */
-#define	ADM5120_WDOG_WTS_MASK	__BITS(30, 16)	/* Watchdog Timer Set:
-						 * timer expires when it
-						 * reaches WTS.  Units of
-						 * 10ms.
-						 */
-#define	ADM5120_WDOG_RSVD	__BIT(15)
-#define	ADM5120_WDOG_WT_MASK	__BITS(14, 0)	/* Watchdog Timer:
-						 * counts up, write to clear.
-						 */
-
-/* GPIO: base address is switch controller */
-#define	ADM5120_GPIO0			0x00b8
-
-#define	ADM5120_GPIO0_OV	__BITS(31, 24)	/* rw: output value */
-#define	ADM5120_GPIO0_OE	__BITS(23, 16)	/* rw: output enable,
-						 * bit[n] = 0 -> input
-						 * bit[n] = 1 -> output
-						 */
-#define	ADM5120_GPIO0_IV	__BITS(15, 8)	/* ro: input value */
-#define	ADM5120_GPIO0_RSVD	__BITS(7, 0)	/* rw: reserved */
-
-#define	ADM5120_GPIO2			0x00bc
-#define	ADM5120_GPIO2_EW	__BIT(6)	/* 1: enable wait state pin,
-						 * pin GPIO[0], for GPIO[1]
-						 * or GPIO[3] Chip Select:
-						 * memory controller waits for
-						 * WAIT# inactive (high).
-						 */
-#define	ADM5120_GPIO2_CSX1	__BIT(5)	/* 1: GPIO[3:4] act as
-						 * Chip Select for
-						 * External I/O 1 (CSX1)
-						 * and External Interrupt 1
-						 * (INTX1), respectively.
-						 * 0: CSX1/INTX1 disabled
-						 */
-#define	ADM5120_GPIO2_CSX0	__BIT(4)	/* 1: GPIO[1:2] act as
-						 * Chip Select for
-						 * External I/O 0 (CSX0)
-						 * and External Interrupt 0
-						 * (INTX0), respectively.
-						 * 0: CSX0/INTX0 disabled
-						 */
-
-/* MultiPort Memory Controller (MPMC) */
-
-#define	ADM5120_MPMC_CONTROL	0x000
-#define	ADM5120_MPMC_CONTROL_DWB	__BIT(3)	/* write 1 to
-							 * drain write
-							 * buffers.  write 0
-							 * for normal buffer
-							 * operation.
-							 */
-#define	ADM5120_MPMC_CONTROL_LPM	__BIT(2)	/* 1: activate low-power
-							 * mode.  SDRAM is
-							 * still refreshed.
-							 */
-#define	ADM5120_MPMC_CONTROL_AM		__BIT(1)	/* 1: address mirror:
-							 * static memory
-							 * chip select 0
-							 * is mapped to chip
-							 * select 1.
-							 */
-#define	ADM5120_MPMC_CONTROL_ME		__BIT(0)	/* 0: disable MPMC.
-							 * DRAM is not
-							 * refreshed.
-							 * 1: enable MPMC.
-							 */
-
-#define	ADM5120_MPMC_STATUS	0x004
-#define	ADM5120_MPMC_STATUS_SRA		__BIT(2)	/* read-only
-							 * MPMC operating mode
-							 * indication,
-							 * 1: self-refresh
-							 * acknowledge
-							 * 0: normal mode
-							 */
-#define	ADM5120_MPMC_STATUS_WBS		__BIT(1)	/* read-only
-							 * write-buffer status,
-							 * 0: buffers empty
-							 * 1: contain data
-							 */
-#define	ADM5120_MPMC_STATUS_BU		__BIT(0)	/* read-only MPMC
-							 * "busy" indication,
-							 * 0: MPMC idle
-							 * 1: MPMC is performing
-							 * memory transactions
-							 */
-
-#define	ADM5120_MPMC_SEW	0x080
-#define	ADM5120_MPMC_SEW_RSVD	__BITS(31, 10)
-#define	ADM5120_MPMC_SEW_EWTO	__BITS(9, 0)	/* timeout access after
-						 * 16 * (n + 1) clock cycles
-						 * (XXX which clock?)
-						 */
-
-#define	ADM5120_MPMC_SC(__i)	(0x200 + 0x020 * (__i))
-#define	ADM5120_MPMC_SC_RSVD0	__BITS(31, 21)
-#define	ADM5120_MPMC_SC_WP	__BIT(20)	/* 1: write protect */
-#define	ADM5120_MPMC_SC_BE	__BIT(20)	/* 1: enable write buffer */
-#define	ADM5120_MPMC_SC_RSVD1	__BITS(18, 9)
-#define	ADM5120_MPMC_SC_EW	__BIT(8)	/* 1: enable extended wait;
-						 */
-#define	ADM5120_MPMC_SC_BLS	__BIT(7)	/* 0: byte line state pins
-						 * are active high on read,
-						 * active low on write.
-						 *
-						 * 1: byte line state pins
-						 * are active low on read and
-						 * on write.
-						 */
-#define	ADM5120_MPMC_SC_CCP	__BIT(6)	/* 0: chip select is active low,
-						 * 1: active high
-						 */
-#define	ADM5120_MPMC_SC_RSVD2	__BITS(5, 4)
-#define	ADM5120_MPMC_SC_PM	__BIT(3)	/* 0: page mode disabled,
-						 * 1: enable asynchronous
-						 * page mode four
-						 */
-#define	ADM5120_MPMC_SC_RSVD3	__BIT(2)
-#define	ADM5120_MPMC_SC_MW_MASK	__BITS(1, 0)	/* memory width, bits */
-#define	ADM5120_MPMC_SC_MW_8B	__SHIFTIN(0, ADM5120_MPMC_SC_MW_MASK)
-#define	ADM5120_MPMC_SC_MW_16B	__SHIFTIN(1, ADM5120_MPMC_SC_MW_MASK)
-#define	ADM5120_MPMC_SC_MW_32B	__SHIFTIN(2, ADM5120_MPMC_SC_MW_MASK)
-#define	ADM5120_MPMC_SC_MW_RSVD	__SHIFTIN(3, ADM5120_MPMC_SC_MW_MASK)
-
-#define	ADM5120_MPMC_SWW(__i)	(0x204 + 0x020 * (__i))
-#define	ADM5120_MPMC_SWW_RSVD	__BITS(31, 4)
-#define	ADM5120_MPMC_SWW_WWE	__BITS(3, 0)	/* delay (n + 1) * HCLK cycles
-						 * after asserting chip select
-						 * (CS) before asserting write
-						 * enable (WE)
-						 */
-
-#define	ADM5120_MPMC_SWO(__i)	(0x208 + 0x020 * (__i))
-#define	ADM5120_MPMC_SWO_RSVD	__BITS(31, 4)
-#define	ADM5120_MPMC_SWO_WOE	__BITS(3, 0)	/* delay n * HCLK cycles
-						 * after asserting chip select
-						 * before asserting output
-						 * enable (OE)
-						 */
-
-#define	ADM5120_MPMC_SWR(__i)	(0x20c + 0x020 * (__i))
-#define	ADM5120_MPMC_SWR_RSVD	__BITS(31, 5)
-#define	ADM5120_MPMC_SWR_NMRW	__BITS(4, 0)	/* read wait states for
-						 * either first page-mode
-						 * access or for non-page mode
-						 * read, (n + 1) * HCLK cycles
-						 */
-
-#define	ADM5120_MPMC_SWP(__i)	(0x210 + 0x020 * (__i))
-#define	ADM5120_MPMC_SWP_RSVD	__BITS(31, 5)
-#define	ADM5120_MPMC_SWP_WPS	__BITS(4, 0)	/* read wait states for
-						 * second and subsequent
-						 * page-mode read,
-						 * (n + 1) * HCLK cycles
-						 */
-
-#define	ADM5120_MPMC_SWWR(__i)	(0x214 + 0x020 * (__i))
-#define	ADM5120_MPMC_SWWR_RSVD	__BITS(31, 5)
-#define	ADM5120_MPMC_SWWR_WWS	__BITS(4, 0)	/* write wait states after
-						 * the first read (??),
-						 * (n + 2) * HCLK cycles
-						 */
-
-#define	ADM5120_MPMC_SWT(__i)	(0x218 + 0x020 * (__i))
-#define	ADM5120_MPMC_SWT_RSVD		__BITS(31, 4)
-#define	ADM5120_MPMC_SWT_WAITTURN	__BITS(3, 0)	/* bus turnaround time,
-							 * (n + 1) * HCLK cycles
-							 */
-
-#endif /* _ADM5120REG_H_ */
diff --git a/sys/mips/adm5120/admpci.c b/sys/mips/adm5120/admpci.c
deleted file mode 100644
index 66bcbf5b779..00000000000
--- a/sys/mips/adm5120/admpci.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/* $NetBSD: admpci.c,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 David Young.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The name of the author may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 2006 Itronix Inc.
- * All rights reserved.
- *
- * Written by Garrett D'Amore for Itronix Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of Itronix Inc. may not be used to endorse
- *    or promote products derived from this software without specific
- *    prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */ 
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/adm5120/adm5120reg.h>
-
-#ifdef ADMPCI_DEBUG
-int admpci_debug = 1;
-#define	ADMPCI_DPRINTF(__fmt, ...)		\
-do {						\
-	if (admpci_debug)			\
-		printf((__fmt), __VA_ARGS__);	\
-} while (/*CONSTCOND*/0)
-#else /* !ADMPCI_DEBUG */
-#define	ADMPCI_DPRINTF(__fmt, ...)	do { } while (/*CONSTCOND*/0)
-#endif /* ADMPCI_DEBUG */
-
-#define	ADMPCI_TAG_BUS_MASK		__BITS(23, 16)
-/* Bit 11 is reserved.	It selects the AHB-PCI bridge.	Let device 0
- * be the bridge.  For all other device numbers, let bit[11] == 0.
- */
-#define	ADMPCI_TAG_DEVICE_MASK		__BITS(15, 11)
-#define	ADMPCI_TAG_DEVICE_SUBMASK	__BITS(15, 12)
-#define	ADMPCI_TAG_DEVICE_BRIDGE	__BIT(11)
-#define	ADMPCI_TAG_FUNCTION_MASK	__BITS(10, 8)
-#define	ADMPCI_TAG_REGISTER_MASK	__BITS(7, 0)
-
-#define	ADMPCI_MAX_DEVICE
-
-struct admpci_softc {
-	device_t		sc_dev;
-	bus_space_tag_t		sc_st;
-
-	/* Access to PCI config registers */
-	bus_space_handle_t	sc_addrh;
-	bus_space_handle_t	sc_datah;
-
-	int			sc_busno;
-	struct rman		sc_mem_rman;
-	struct rman		sc_io_rman;
-	struct rman		sc_irq_rman;
-	uint32_t		sc_mem;
-	uint32_t		sc_io;
-};
-
-static int
-admpci_probe(device_t dev)
-{
-
-	return (0);
-}
-
-static int
-admpci_attach(device_t dev)
-{
-	int busno = 0;
-	struct admpci_softc *sc = device_get_softc(dev);
-
-	sc->sc_dev = dev;
-	sc->sc_busno = busno;
-
-	/* Use KSEG1 to access IO ports for it is uncached */
-	sc->sc_io = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_IO);
-	sc->sc_io_rman.rm_type = RMAN_ARRAY;
-	sc->sc_io_rman.rm_descr = "ADMPCI I/O Ports";
-	if (rman_init(&sc->sc_io_rman) != 0 ||
-		rman_manage_region(&sc->sc_io_rman, 0, 0xffff) != 0) {
-		panic("admpci_attach: failed to set up I/O rman");
-	}
-
-	/* Use KSEG1 to access PCI memory for it is uncached */
-	sc->sc_mem = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_MEM);
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "ADMPCI PCI Memory";
-	if (rman_init(&sc->sc_mem_rman) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman, 
-	    sc->sc_mem, sc->sc_mem + 0x100000) != 0) {
-		panic("admpci_attach: failed to set up memory rman");
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "ADMPCI PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)
-		panic("admpci_attach: failed to set up IRQ rman");
-
-	if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFADDR, 4, 0, 
-	    &sc->sc_addrh) != 0) {
-		device_printf(sc->sc_dev, "unable to address space\n");
-		panic("bus_space_map failed");
-	}
-
-	if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFDATA, 4, 0, 
-	    &sc->sc_datah) != 0) {
-		device_printf(sc->sc_dev, "unable to address space\n");
-		panic("bus_space_map failed");
-	}
-
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-admpci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static uint32_t
-admpci_make_addr(int bus, int slot, int func, int reg)
-{
-
-	return (0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg);
-}
-
-static uint32_t
-admpci_read_config(device_t dev, int bus, int slot, int func, int reg,
-    int bytes)
-{
-	struct admpci_softc *sc = device_get_softc(dev);
-	uint32_t data;
-	uint32_t shift, mask;
-	bus_addr_t addr;
-
-	ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__, 
-			(void *)sc, bus, slot, func, reg);
-
-	addr = admpci_make_addr(bus, slot, func, reg);
-
-	ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__,
-	    (void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr);
-
-	bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr);
-	data = bus_space_read_4(sc->sc_io, sc->sc_datah, 0);
-
-	switch (reg % 4) {
-	case 3:
-		shift = 24;
-		break;
-	case 2:
-		shift = 16;
-		break;
-	case 1:
-		shift = 8;
-		break;
-	default:
-		shift = 0;
-		break;
-	}	
-
-	switch (bytes) {
-	case 1:
-		mask = 0xff;
-		data = (data >> shift) & mask;
-		break;
-	case 2:
-		mask = 0xffff;
-		if (reg % 4 == 0)
-			data = data & mask;
-		else
-			data = (data >> 16) & mask;
-		break;
-	case 4:
-		break;
-	default:
-		panic("%s: wrong bytes count", __func__);
-		break;
-	}
-
-	ADMPCI_DPRINTF("%s: read 0x%x\n", __func__, data);
-	return (data);
-}
-
-static void
-admpci_write_config(device_t dev, int bus, int slot, int func, int reg,
-    uint32_t data, int bytes)
-{
-	struct admpci_softc *sc = device_get_softc(dev);
-	bus_addr_t addr;
-	uint32_t reg_data;
-	uint32_t shift, mask;
-
-	ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__, 
-			(void *)sc, bus, slot, func, reg);
-
-	if (bytes != 4) {
-		reg_data = admpci_read_config(dev, bus, slot, func, reg, 4);
-
-		switch (reg % 4) {
-		case 3:
-			shift = 24;
-			break;
-		case 2:
-			shift = 16;
-			break;
-		case 1:
-			shift = 8;
-			break;
-		default:
-			shift = 0;
-			break;
-		}	
-
-		switch (bytes) {
-		case 1:
-			mask = 0xff;
-			data = (reg_data & ~ (mask << shift)) | (data << shift);
-			break;
-		case 2:
-			mask = 0xffff;
-			if (reg % 4 == 0)
-				data = (reg_data & ~mask) | data;
-			else
-				data = (reg_data & ~ (mask << shift)) | 
-				    (data << shift);
-			break;
-		case 4:
-			break;
-		default:
-			panic("%s: wrong bytes count", __func__);
-			break;
-		}
-	}
-
-	addr = admpci_make_addr(bus, slot, func, reg);
-
-	ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__,
-	    (void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr);
-
-	bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr);
-	bus_space_write_4(sc->sc_io, sc->sc_datah, 0, data);
-}
-
-static int
-admpci_route_interrupt(device_t pcib, device_t dev, int pin)
-{
-	/* TODO: implement */
-	return (0);
-}
-
-static int
-admpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct admpci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-admpci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	struct admpci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-	return (ENOENT);
-}
-
-static struct resource *
-admpci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-
-	return (NULL);
-#if 0
-	struct admpci_softc *sc = device_get_softc(bus);	
-	struct resource *rv = NULL;
-	struct rman *rm;
-	bus_space_handle_t bh = 0;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		bh = sc->sc_mem;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io_rman;
-		bh = sc->sc_io;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL)
-		return (NULL);
-	rman_set_rid(rv, *rid);
-	if (type != SYS_RES_IRQ) {
-		bh += (rman_get_start(rv));
-
-		rman_set_bustag(rv, sc->sc_st);
-		rman_set_bushandle(rv, bh);
-		if (flags & RF_ACTIVE) {
-			if (bus_activate_resource(child, type, *rid, rv)) {
-				rman_release_resource(rv);
-				return (NULL);
-			}
-		} 
-	}
-	return (rv);
-#endif
-}
-
-static int
-admpci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	bus_space_handle_t p;
-	int error;
-	
-	if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
-		error = bus_space_map(rman_get_bustag(r),
-		    rman_get_bushandle(r), rman_get_size(r), 0, &p);
-		if (error) 
-			return (error);
-		rman_set_bushandle(r, p);
-	}
-	return (rman_activate_resource(r));
-}
-
-static int
-admpci_setup_intr(device_t dev, device_t child, struct resource *ires, 
-		int flags, driver_filter_t *filt, driver_intr_t *handler, 
-		void *arg, void **cookiep)
-{
-
-#if 0
-	struct admpci_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-	if (irq >= ICU_LEN || irq == 2)
-		panic("%s: bad irq or type", __func__);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0,
-		    (void (*)(void *))NULL, "admpci intr%d:", irq);
-		if (error)
-			return 0;
-		sc->sc_eventstab[irq] = event;
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt, 
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	/* Enable it, set trigger mode. */
-	sc->sc_imask &= ~(1 << irq);
-	sc->sc_elcr &= ~(1 << irq);
-
-	admpci_set_icus(sc);
-#endif
-
-	return (0);
-}
-
-static int
-admpci_teardown_intr(device_t dev, device_t child, struct resource *res,
-    void *cookie)
-{
-
-	return (intr_event_remove_handler(cookie));
-}
-
-static device_method_t admpci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		admpci_probe),
-	DEVMETHOD(device_attach,	admpci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	admpci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	admpci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	admpci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, admpci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	admpci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	admpci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	admpci_maxslots),
-	DEVMETHOD(pcib_read_config,	admpci_read_config),
-	DEVMETHOD(pcib_write_config,	admpci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	admpci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t admpci_driver = {
-	"pcib",
-	admpci_methods,
-	sizeof(struct admpci_softc),
-};
-
-static devclass_t admpci_devclass;
-
-DRIVER_MODULE(admpci, obio, admpci_driver, admpci_devclass, 0, 0);
diff --git a/sys/mips/adm5120/console.c b/sys/mips/adm5120/console.c
deleted file mode 100644
index 89495c3954c..00000000000
--- a/sys/mips/adm5120/console.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/time.h>
-
-#include <sys/cons.h>
-#include <sys/consio.h>
-
-static cn_probe_t	uart_cnprobe;
-static cn_init_t	uart_cninit;
-static cn_term_t	uart_cnterm;
-static cn_getc_t	uart_cngetc;
-static cn_putc_t	uart_cnputc;
-static cn_grab_t	uart_cngrab;
-static cn_ungrab_t	uart_cnungrab;
-
-static void
-uart_cnprobe(struct consdev *cp)
-{
-
-        sprintf(cp->cn_name, "uart");
-        cp->cn_pri = CN_NORMAL;
-}
-
-static void
-uart_cninit(struct consdev *cp)
-{
-
-}
-
-
-void
-uart_cnputc(struct consdev *cp, int c)
-{
-	char chr;
-
-	chr = c;
-	while ((*((volatile unsigned long *)0xb2600018)) & 0x20) ;
-	(*((volatile unsigned long *)0xb2600000)) = c;
-	while ((*((volatile unsigned long *)0xb2600018)) & 0x20) ;
-}
-
-int
-uart_cngetc(struct consdev * cp)
-{
-
-	while ((*((volatile unsigned long *)0xb2600018)) & 0x10) ;
-	return (*((volatile unsigned long *)0xb2600000)) & 0xff;
-}
-
-static void
-uart_cnterm(struct consdev * cp)
-{
-
-}
-
-static void
-uart_cngrab(struct consdev *cp)
-{
-
-}
-
-static void
-uart_cnungrab(struct consdev *cp)
-{
-
-}
-
-CONSOLE_DRIVER(uart);
diff --git a/sys/mips/adm5120/files.adm5120 b/sys/mips/adm5120/files.adm5120
deleted file mode 100644
index c8b60ce88b5..00000000000
--- a/sys/mips/adm5120/files.adm5120
+++ /dev/null
@@ -1,13 +0,0 @@
-# $FreeBSD$
-
-# ADM5120 on-board devices
-# mips/adm5120/console.c		standard
-mips/adm5120/adm5120_machdep.c	standard
-mips/adm5120/admpci.c		optional admpci
-mips/adm5120/if_admsw.c		optional admsw
-mips/adm5120/obio.c		standard
-mips/adm5120/uart_bus_adm5120.c	optional uart
-mips/adm5120/uart_cpu_adm5120.c	optional uart
-mips/adm5120/uart_dev_adm5120.c	optional uart
-mips/mips/intr_machdep.c        standard
-mips/mips/tick.c		standard
diff --git a/sys/mips/adm5120/if_admsw.c b/sys/mips/adm5120/if_admsw.c
deleted file mode 100644
index 545b9e5d555..00000000000
--- a/sys/mips/adm5120/if_admsw.c
+++ /dev/null
@@ -1,1354 +0,0 @@
-/* $NetBSD: if_admsw.c,v 1.3 2007/04/22 19:26:25 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-/*
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Device driver for Alchemy Semiconductor Au1x00 Ethernet Media
- * Access Controller.
- *
- * TODO:
- *
- *	Better Rx buffer management; we want to get new Rx buffers
- *	to the chip more quickly than we currently do.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-#include <machine/bus.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_mib.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/in_var.h>
-#include <netinet/ip.h>
-#endif
-
-#include <net/bpf.h>
-#include <net/bpfdesc.h>
-
-#include <mips/adm5120/adm5120reg.h>
-#include <mips/adm5120/if_admswreg.h>
-#include <mips/adm5120/if_admswvar.h>
-
-/* TODO: add locking */
-#define ADMSW_LOCK(sc) do {} while(0);
-#define ADMSW_UNLOCK(sc) do {} while(0);
-
-static uint8_t vlan_matrix[SW_DEVS] = {
-	(1 << 6) | (1 << 0),		/* CPU + port0 */
-	(1 << 6) | (1 << 1),		/* CPU + port1 */
-	(1 << 6) | (1 << 2),		/* CPU + port2 */
-	(1 << 6) | (1 << 3),		/* CPU + port3 */
-	(1 << 6) | (1 << 4),		/* CPU + port4 */
-	(1 << 6) | (1 << 5),		/* CPU + port5 */
-};
-
-/* ifnet entry points */
-static void	admsw_start(struct ifnet *);
-static void	admsw_watchdog(void *);
-static int	admsw_ioctl(struct ifnet *, u_long, caddr_t);
-static void	admsw_init(void *);
-static void	admsw_stop(struct ifnet *, int);
-
-static void	admsw_reset(struct admsw_softc *);
-static void	admsw_set_filter(struct admsw_softc *);
-
-static void	admsw_txintr(struct admsw_softc *, int);
-static void	admsw_rxintr(struct admsw_softc *, int);
-static int	admsw_add_rxbuf(struct admsw_softc *, int, int);
-#define	admsw_add_rxhbuf(sc, idx)	admsw_add_rxbuf(sc, idx, 1)
-#define	admsw_add_rxlbuf(sc, idx)	admsw_add_rxbuf(sc, idx, 0)
-
-static int	admsw_mediachange(struct ifnet *);
-static void	admsw_mediastatus(struct ifnet *, struct ifmediareq *);
-
-static int	admsw_intr(void *);
-
-/* bus entry points */
-static int	admsw_probe(device_t dev);
-static int	admsw_attach(device_t dev);
-static int	admsw_detach(device_t dev);
-static int	admsw_shutdown(device_t dev);
-
-static void
-admsw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	uint32_t *addr;
-
-	if (error)
-		return;
-
-	KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
-	addr = arg;
-	*addr = segs->ds_addr;
-}
-
-static void
-admsw_rxbuf_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	struct admsw_descsoft *ds;
-
-	if (error)
-		return;
-
-	KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
-
-	ds = arg;
-	ds->ds_nsegs = nseg;
-	ds->ds_addr[0] = segs[0].ds_addr;
-	ds->ds_len[0] = segs[0].ds_len;
-
-}
-
-static void
-admsw_mbuf_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, 
-    bus_size_t mapsize, int error)
-{
-	struct admsw_descsoft *ds;
-
-	if (error)
-		return;
-
-	ds = arg;
-
-	if((nseg != 1) && (nseg != 2))
-		panic("%s: nseg == %d\n", __func__, nseg);
-
-	ds->ds_nsegs = nseg;
-	ds->ds_addr[0] = segs[0].ds_addr;
-	ds->ds_len[0] = segs[0].ds_len;
-
-	if(nseg > 1) {
-		ds->ds_addr[1] = segs[1].ds_addr;
-		ds->ds_len[1] = segs[1].ds_len;
-	}
-}
-
-
-
-static int
-admsw_probe(device_t dev)
-{
-
-	device_set_desc(dev, "ADM5120 Switch Engine");
-	return (0);
-}
-
-#define	REG_READ(o)	bus_read_4((sc)->mem_res, (o))
-#define	REG_WRITE(o,v)	bus_write_4((sc)->mem_res, (o),(v))
-
-static void
-admsw_init_bufs(struct admsw_softc *sc)
-{
-	int i;
-	struct admsw_desc *desc;
-
-	for (i = 0; i < ADMSW_NTXHDESC; i++) {
-		if (sc->sc_txhsoft[i].ds_mbuf != NULL) {
-			m_freem(sc->sc_txhsoft[i].ds_mbuf);
-			sc->sc_txhsoft[i].ds_mbuf = NULL;
-		}
-		desc = &sc->sc_txhdescs[i];
-		desc->data = 0;
-		desc->cntl = 0;
-		desc->len = MAC_BUFLEN;
-		desc->status = 0;
-		ADMSW_CDTXHSYNC(sc, i,
-		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-	}
-	sc->sc_txhdescs[ADMSW_NTXHDESC - 1].data |= ADM5120_DMA_RINGEND;
-	ADMSW_CDTXHSYNC(sc, ADMSW_NTXHDESC - 1,
-	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
-	for (i = 0; i < ADMSW_NRXHDESC; i++) {
-		if (sc->sc_rxhsoft[i].ds_mbuf == NULL) {
-			if (admsw_add_rxhbuf(sc, i) != 0)
-				panic("admsw_init_bufs\n");
-		} else
-			ADMSW_INIT_RXHDESC(sc, i);
-	}
-
-	for (i = 0; i < ADMSW_NTXLDESC; i++) {
-		if (sc->sc_txlsoft[i].ds_mbuf != NULL) {
-			m_freem(sc->sc_txlsoft[i].ds_mbuf);
-			sc->sc_txlsoft[i].ds_mbuf = NULL;
-		}
-		desc = &sc->sc_txldescs[i];
-		desc->data = 0;
-		desc->cntl = 0;
-		desc->len = MAC_BUFLEN;
-		desc->status = 0;
-		ADMSW_CDTXLSYNC(sc, i,
-		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-	}
-	sc->sc_txldescs[ADMSW_NTXLDESC - 1].data |= ADM5120_DMA_RINGEND;
-	ADMSW_CDTXLSYNC(sc, ADMSW_NTXLDESC - 1,
-	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
-	for (i = 0; i < ADMSW_NRXLDESC; i++) {
-		if (sc->sc_rxlsoft[i].ds_mbuf == NULL) {
-			if (admsw_add_rxlbuf(sc, i) != 0)
-				panic("admsw_init_bufs\n");
-		} else
-			ADMSW_INIT_RXLDESC(sc, i);
-	}
-
-	REG_WRITE(SEND_HBADDR_REG, ADMSW_CDTXHADDR(sc, 0));
-	REG_WRITE(SEND_LBADDR_REG, ADMSW_CDTXLADDR(sc, 0));
-	REG_WRITE(RECV_HBADDR_REG, ADMSW_CDRXHADDR(sc, 0));
-	REG_WRITE(RECV_LBADDR_REG, ADMSW_CDRXLADDR(sc, 0));
-
-	sc->sc_txfree = ADMSW_NTXLDESC;
-	sc->sc_txnext = 0;
-	sc->sc_txdirty = 0;
-	sc->sc_rxptr = 0;
-}
-
-static void
-admsw_setvlan(struct admsw_softc *sc, char matrix[6])
-{
-	uint32_t i;
-
-	i = matrix[0] + (matrix[1] << 8) + (matrix[2] << 16) + (matrix[3] << 24);
-	REG_WRITE(VLAN_G1_REG, i);
-	i = matrix[4] + (matrix[5] << 8);
-	REG_WRITE(VLAN_G2_REG, i);
-}
-
-static void
-admsw_reset(struct admsw_softc *sc)
-{
-	uint32_t wdog1;
-	int i;
-
-	REG_WRITE(PORT_CONF0_REG,
-	    REG_READ(PORT_CONF0_REG) | PORT_CONF0_DP_MASK);
-	REG_WRITE(CPUP_CONF_REG,
-	    REG_READ(CPUP_CONF_REG) | CPUP_CONF_DCPUP);
-
-	/* Wait for DMA to complete.  Overkill.  In 3ms, we can
-	 * send at least two entire 1500-byte packets at 10 Mb/s.
-	 */
-	DELAY(3000);
-
-	/* The datasheet recommends that we move all PHYs to reset
-	 * state prior to software reset.
-	 */
-	REG_WRITE(PHY_CNTL2_REG,
-	    REG_READ(PHY_CNTL2_REG) & ~PHY_CNTL2_PHYR_MASK);
-
-	/* Reset the switch. */
-	REG_WRITE(ADMSW_SW_RES, 0x1);
-
-	DELAY(100 * 1000);
-
-	REG_WRITE(ADMSW_BOOT_DONE, ADMSW_BOOT_DONE_BO);
-
-	/* begin old code */
-	REG_WRITE(CPUP_CONF_REG,
-	    CPUP_CONF_DCPUP | CPUP_CONF_CRCP | CPUP_CONF_DUNP_MASK |
-	    CPUP_CONF_DMCP_MASK);
-
-	REG_WRITE(PORT_CONF0_REG, PORT_CONF0_EMCP_MASK | PORT_CONF0_EMBP_MASK);
-
-	REG_WRITE(PHY_CNTL2_REG,
-	    REG_READ(PHY_CNTL2_REG) | PHY_CNTL2_ANE_MASK | PHY_CNTL2_PHYR_MASK |
-	    PHY_CNTL2_AMDIX_MASK);
-
-	REG_WRITE(PHY_CNTL3_REG, REG_READ(PHY_CNTL3_REG) | PHY_CNTL3_RNT);
-
-	REG_WRITE(ADMSW_INT_MASK, INT_MASK);
-	REG_WRITE(ADMSW_INT_ST, INT_MASK);
-
-	/*
-	 * While in DDB, we stop servicing interrupts, RX ring
-	 * fills up and when free block counter falls behind FC
-	 * threshold, the switch starts to emit 802.3x PAUSE
-	 * frames.  This can upset peer switches.
-	 *
-	 * Stop this from happening by disabling FC and D2
-	 * thresholds.
-	 */
-	REG_WRITE(FC_TH_REG,
-	    REG_READ(FC_TH_REG) & ~(FC_TH_FCS_MASK | FC_TH_D2S_MASK));
-
-	admsw_setvlan(sc, vlan_matrix);
-
-	for (i = 0; i < SW_DEVS; i++) {
-		REG_WRITE(MAC_WT1_REG,
-		    sc->sc_enaddr[2] |
-		    (sc->sc_enaddr[3]<<8) |
-		    (sc->sc_enaddr[4]<<16) |
-		    ((sc->sc_enaddr[5]+i)<<24));
-		REG_WRITE(MAC_WT0_REG, (i<<MAC_WT0_VLANID_SHIFT) |
-		    (sc->sc_enaddr[0]<<16) | (sc->sc_enaddr[1]<<24) |
-		    MAC_WT0_WRITE | MAC_WT0_VLANID_EN);
-
-		while (!(REG_READ(MAC_WT0_REG) & MAC_WT0_WRITE_DONE));
-	}
-
-	wdog1 = REG_READ(ADM5120_WDOG1);
-	REG_WRITE(ADM5120_WDOG1, wdog1 & ~ADM5120_WDOG1_WDE);
-}
-
-static int
-admsw_attach(device_t dev)
-{
-	uint8_t enaddr[ETHER_ADDR_LEN];
-	struct admsw_softc *sc = (struct admsw_softc *) device_get_softc(dev);
-	struct ifnet *ifp;
-	int error, i, rid;
-
-	sc->sc_dev = dev;
-	device_printf(dev, "ADM5120 Switch Engine, %d ports\n", SW_DEVS);
-	sc->ndevs = 0;
-
-	/* XXXMIPS: fix it */
-	enaddr[0] = 0x00;
-	enaddr[1] = 0x0C;
-	enaddr[2] = 0x42;
-	enaddr[3] = 0x07;
-	enaddr[4] = 0xB2;
-	enaddr[5] = 0x4E;
-
-	memcpy(sc->sc_enaddr, enaddr, sizeof(sc->sc_enaddr));
-
-	device_printf(sc->sc_dev, "base Ethernet address %s\n",
-	    ether_sprintf(enaddr));
-	callout_init(&sc->sc_watchdog, 1);
-
-	rid = 0;
-	if ((sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 
-	    RF_ACTIVE)) == NULL) {
-                device_printf(dev, "unable to allocate memory resource\n");
-                return (ENXIO);
-        }
-
-	/* Hook up the interrupt handler. */
-	rid = 0;
-	if ((sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-                device_printf(dev, "unable to allocate IRQ resource\n");
-                return (ENXIO);
-        }
-
-	if ((error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, 
-	    admsw_intr, NULL, sc, &sc->sc_ih)) != 0) {
-                device_printf(dev, 
-                    "WARNING: unable to register interrupt handler\n");
-                return (error);
-        }
-
-	/*
-	 * Allocate the control data structures, and create and load the
-	 * DMA map for it.
-	 */
-	if ((error = bus_dma_tag_create(NULL, 4, 0, 
-	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
-	    NULL, NULL, sizeof(struct admsw_control_data), 1,
-	    sizeof(struct admsw_control_data), 0, NULL, NULL, 
-	    &sc->sc_control_dmat)) != 0) {
-		device_printf(sc->sc_dev, 
-		    "unable to create control data DMA map, error = %d\n", 
-		    error);
-		return (error);
-	}
-
-	if ((error = bus_dmamem_alloc(sc->sc_control_dmat,
-	    (void **)&sc->sc_control_data, BUS_DMA_NOWAIT, 
-	    &sc->sc_cddmamap)) != 0) {
-		device_printf(sc->sc_dev, 
-		    "unable to allocate control data, error = %d\n", error);
-		return (error);
-	}
-
-	if ((error = bus_dmamap_load(sc->sc_control_dmat, sc->sc_cddmamap,
-	    sc->sc_control_data, sizeof(struct admsw_control_data), 
-	    admsw_dma_map_addr, &sc->sc_cddma, 0)) != 0) {
-		device_printf(sc->sc_dev, 
-		    "unable to load control data DMA map, error = %d\n", error);
-		return (error);
-	}
-
-	/*
-	 * Create the transmit buffer DMA maps.
-	 */
-	if ((error = bus_dma_tag_create(NULL, 1, 0, 
-	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
-	    NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL, NULL, 
-	    &sc->sc_bufs_dmat)) != 0) {
-		device_printf(sc->sc_dev, 
-		    "unable to create control data DMA map, error = %d\n", 
-		    error);
-		return (error);
-	}
-
-	for (i = 0; i < ADMSW_NTXHDESC; i++) {
-		if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0,
-		    &sc->sc_txhsoft[i].ds_dmamap)) != 0) {
-			device_printf(sc->sc_dev, 
-			    "unable to create txh DMA map %d, error = %d\n", 
-			    i, error);
-			return (error);
-		}
-		sc->sc_txhsoft[i].ds_mbuf = NULL;
-	}
-
-	for (i = 0; i < ADMSW_NTXLDESC; i++) {
-		if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0,
-		    &sc->sc_txlsoft[i].ds_dmamap)) != 0) {
-			device_printf(sc->sc_dev, 
-			    "unable to create txl DMA map %d, error = %d\n", 
-			    i, error);
-			return (error);
-		}
-		sc->sc_txlsoft[i].ds_mbuf = NULL;
-	}
-
-	/*
-	 * Create the receive buffer DMA maps.
-	 */
-	for (i = 0; i < ADMSW_NRXHDESC; i++) {
-		if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0, 
-		     &sc->sc_rxhsoft[i].ds_dmamap)) != 0) {
-			device_printf(sc->sc_dev, 
-			    "unable to create rxh DMA map %d, error = %d\n", 
-			    i, error);
-			return (error);
-		}
-		sc->sc_rxhsoft[i].ds_mbuf = NULL;
-	}
-
-	for (i = 0; i < ADMSW_NRXLDESC; i++) {
-		if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0,
-		    &sc->sc_rxlsoft[i].ds_dmamap)) != 0) {
-			device_printf(sc->sc_dev, 
-			    "unable to create rxl DMA map %d, error = %d\n",
-			    i, error);
-			return (error);
-		}
-		sc->sc_rxlsoft[i].ds_mbuf = NULL;
-	}
-
-	admsw_init_bufs(sc);
-	admsw_reset(sc);
-
-	for (i = 0; i < SW_DEVS; i++) {
-		ifmedia_init(&sc->sc_ifmedia[i], 0, admsw_mediachange, 
-		    admsw_mediastatus);
-		ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_10_T, 0, NULL);
-		ifmedia_add(&sc->sc_ifmedia[i], 
-		    IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
-		ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_100_TX, 0, NULL);
-		ifmedia_add(&sc->sc_ifmedia[i], 
-		    IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
-		ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_AUTO, 0, NULL);
-		ifmedia_set(&sc->sc_ifmedia[i], IFM_ETHER|IFM_AUTO);
-
-		ifp = sc->sc_ifnet[i] = if_alloc(IFT_ETHER);
-
-		/* Setup interface parameters */
-		ifp->if_softc = sc;
-		if_initname(ifp, device_get_name(dev), i);
-		ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-		ifp->if_ioctl = admsw_ioctl;
-		ifp->if_output = ether_output;
-		ifp->if_start = admsw_start;
-		ifp->if_init = admsw_init;
-		ifp->if_mtu = ETHERMTU;
-		ifp->if_baudrate = IF_Mbps(100);
-		IFQ_SET_MAXLEN(&ifp->if_snd, max(ADMSW_NTXLDESC, ifqmaxlen));
-		ifp->if_snd.ifq_drv_maxlen = max(ADMSW_NTXLDESC, ifqmaxlen);
-		IFQ_SET_READY(&ifp->if_snd);
-		ifp->if_capabilities |= IFCAP_VLAN_MTU;
-
-		/* Attach the interface. */
-		ether_ifattach(ifp, enaddr);
-		enaddr[5]++;
-	}
-
-	/* XXX: admwdog_attach(sc); */
-
-	/* leave interrupts and cpu port disabled */
-	return (0);
-}
-
-static int
-admsw_detach(device_t dev)
-{
-
-	printf("TODO: DETACH\n");
-	return (0);
-}
-
-/*
- * admsw_shutdown:
- *
- *	Make sure the interface is stopped at reboot time.
- */
-static int
-admsw_shutdown(device_t dev)
-{
-	struct admsw_softc *sc;
-	int i;
-
-	sc = device_get_softc(dev);
-	for (i = 0; i < SW_DEVS; i++)
-		admsw_stop(sc->sc_ifnet[i], 1);
-
-	return (0);
-}
-
-/*
- * admsw_start:		[ifnet interface function]
- *
- *	Start packet transmission on the interface.
- */
-static void
-admsw_start(struct ifnet *ifp)
-{
-	struct admsw_softc *sc = ifp->if_softc;
-	struct mbuf *m0, *m;
-	struct admsw_descsoft *ds;
-	struct admsw_desc *desc;
-	bus_dmamap_t dmamap;
-	struct ether_header *eh;
-	int error, nexttx, len, i;
-	static int vlan = 0;
-
-	/*
-	 * Loop through the send queues, setting up transmit descriptors
-	 * unitl we drain the queues, or use up all available transmit
-	 * descriptors.
-	 */
-	for (;;) {
-		vlan++;
-		if (vlan == SW_DEVS)
-			vlan = 0;
-		i = vlan;
-		for (;;) {
-			ifp = sc->sc_ifnet[i];
-			if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) 
-			    == IFF_DRV_RUNNING) {
-				/* Grab a packet off the queue. */
-				IF_DEQUEUE(&ifp->if_snd, m0);
-				if (m0 != NULL)
-					break;
-			}
-			i++;
-			if (i == SW_DEVS)
-				i = 0;
-			if (i == vlan)
-				return;
-		}
-		vlan = i;
-		m = NULL;
-
-		/* Get a spare descriptor. */
-		if (sc->sc_txfree == 0) {
-			/* No more slots left; notify upper layer. */
-			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-			break;
-		}
-		nexttx = sc->sc_txnext;
-		desc = &sc->sc_txldescs[nexttx];
-		ds = &sc->sc_txlsoft[nexttx];
-		dmamap = ds->ds_dmamap;
-
-		/*
-		 * Load the DMA map.  If this fails, the packet either
-		 * didn't fit in the alloted number of segments, or we
-		 * were short on resources.  In this case, we'll copy
-		 * and try again.
-		 */
-		if (m0->m_pkthdr.len < ETHER_MIN_LEN ||
-		    bus_dmamap_load_mbuf(sc->sc_bufs_dmat, dmamap, m0,
-		    admsw_mbuf_map_addr, ds, BUS_DMA_NOWAIT) != 0) {
-			MGETHDR(m, M_NOWAIT, MT_DATA);
-			if (m == NULL) {
-				device_printf(sc->sc_dev, 
-				    "unable to allocate Tx mbuf\n");
-				break;
-			}
-			if (m0->m_pkthdr.len > MHLEN) {
-				if (!(MCLGET(m, M_NOWAIT))) {
-					device_printf(sc->sc_dev, 
-					    "unable to allocate Tx cluster\n");
-					m_freem(m);
-					break;
-				}
-			}
-			m->m_pkthdr.csum_flags = m0->m_pkthdr.csum_flags;
-			m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *));
-			m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
-			if (m->m_pkthdr.len < ETHER_MIN_LEN) {
-				if (M_TRAILINGSPACE(m) < ETHER_MIN_LEN - m->m_pkthdr.len)
-					panic("admsw_start: M_TRAILINGSPACE\n");
-				memset(mtod(m, uint8_t *) + m->m_pkthdr.len, 0,
-				    ETHER_MIN_LEN - ETHER_CRC_LEN - m->m_pkthdr.len);
-				m->m_pkthdr.len = m->m_len = ETHER_MIN_LEN;
-			}
-			error = bus_dmamap_load_mbuf(sc->sc_bufs_dmat, 
-			    dmamap, m, admsw_mbuf_map_addr, ds, BUS_DMA_NOWAIT);
-			if (error) {
-				device_printf(sc->sc_dev, 
-				    "unable to load Tx buffer, error = %d\n", 
-				    error);
-				break;
-			}
-		}
-
-		if (m != NULL) {
-			m_freem(m0);
-			m0 = m;
-		}
-
-		/*
-		 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
-		 */
-
-		/* Sync the DMA map. */
-		bus_dmamap_sync(sc->sc_bufs_dmat, dmamap, BUS_DMASYNC_PREWRITE);
-
-		if (ds->ds_nsegs != 1 && ds->ds_nsegs != 2)
-			panic("admsw_start: nsegs == %d\n", ds->ds_nsegs);
-		desc->data = ds->ds_addr[0];
-		desc->len = len = ds->ds_len[0];
-		if (ds->ds_nsegs > 1) {
-			len += ds->ds_len[1];
-			desc->cntl = ds->ds_addr[1] | ADM5120_DMA_BUF2ENABLE;
-		} else
-			desc->cntl = 0;
-		desc->status = (len << ADM5120_DMA_LENSHIFT) | (1 << vlan);
-		eh = mtod(m0, struct ether_header *);
-		if (ntohs(eh->ether_type) == ETHERTYPE_IP &&
-		    m0->m_pkthdr.csum_flags & CSUM_IP)
-			desc->status |= ADM5120_DMA_CSUM;
-		if (nexttx == ADMSW_NTXLDESC - 1)
-			desc->data |= ADM5120_DMA_RINGEND;
-		desc->data |= ADM5120_DMA_OWN;
-
-		/* Sync the descriptor. */
-		ADMSW_CDTXLSYNC(sc, nexttx,
-		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
-		REG_WRITE(SEND_TRIG_REG, 1);
-		/* printf("send slot %d\n",nexttx); */
-
-		/*
-		 * Store a pointer to the packet so we can free it later.
-		 */
-		ds->ds_mbuf = m0;
-
-		/* Advance the Tx pointer. */
-		sc->sc_txfree--;
-		sc->sc_txnext = ADMSW_NEXTTXL(nexttx);
-
-		/* Pass the packet to any BPF listeners. */
-		BPF_MTAP(ifp, m0);
-
-		/* Set a watchdog timer in case the chip flakes out. */
-		sc->sc_timer = 5;
-	}
-}
-
-/*
- * admsw_watchdog:	[ifnet interface function]
- *
- *	Watchdog timer handler.
- */
-static void
-admsw_watchdog(void *arg)
-{
-	struct admsw_softc *sc = arg;
-	struct ifnet *ifp;
-	int vlan;
-
-	callout_reset(&sc->sc_watchdog, hz, admsw_watchdog, sc);
-	if (sc->sc_timer == 0 || --sc->sc_timer > 0)
-		return;
-
-	/* Check if an interrupt was lost. */
-	if (sc->sc_txfree == ADMSW_NTXLDESC) {
-		device_printf(sc->sc_dev, "watchdog false alarm\n");
-		return;
-	}
-	if (sc->sc_timer != 0)
-		device_printf(sc->sc_dev, "watchdog timer is %d!\n",  
-		    sc->sc_timer);
-	admsw_txintr(sc, 0);
-	if (sc->sc_txfree == ADMSW_NTXLDESC) {
-		device_printf(sc->sc_dev, "tx IRQ lost (queue empty)\n");
-		return;
-	}
-	if (sc->sc_timer != 0) {
-		device_printf(sc->sc_dev, "tx IRQ lost (timer recharged)\n");
-		return;
-	}
-
-	device_printf(sc->sc_dev, "device timeout, txfree = %d\n",  
-	    sc->sc_txfree);
-	for (vlan = 0; vlan < SW_DEVS; vlan++)
-		admsw_stop(sc->sc_ifnet[vlan], 0);
-	admsw_init(sc);
-
-	ifp = sc->sc_ifnet[0];
-
-	/* Try to get more packets going. */
-	admsw_start(ifp);
-}
-
-/*
- * admsw_ioctl:		[ifnet interface function]
- *
- *	Handle control requests from the operator.
- */
-static int
-admsw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
-	struct admsw_softc *sc = ifp->if_softc;
-	struct ifdrv *ifd;
-	int error, port;
-
-	ADMSW_LOCK(sc);
-
-	switch (cmd) {
-	case SIOCSIFMEDIA:
-	case SIOCGIFMEDIA:
-		port = 0;
-		while(port < SW_DEVS)
-			if(ifp == sc->sc_ifnet[port])
-				 break;
-			else 
-				port++;
-		if (port >= SW_DEVS)
-			error = EOPNOTSUPP;
-		else
-			error = ifmedia_ioctl(ifp, (struct ifreq *)data,
-			    &sc->sc_ifmedia[port], cmd);
-		break;
-
-	case SIOCGDRVSPEC:
-	case SIOCSDRVSPEC:
-		ifd = (struct ifdrv *) data;
-		if (ifd->ifd_cmd != 0 || ifd->ifd_len != sizeof(vlan_matrix)) {
-			error = EINVAL;
-			break;
-		}
-		if (cmd == SIOCGDRVSPEC) {
-			error = copyout(vlan_matrix, ifd->ifd_data,
-			    sizeof(vlan_matrix));
-		} else {
-			error = copyin(ifd->ifd_data, vlan_matrix,
-			    sizeof(vlan_matrix));
-			admsw_setvlan(sc, vlan_matrix);
-		}
-		break;
-
-	default:
-		error = ether_ioctl(ifp, cmd, data);
-		if (error == ENETRESET) {
-			/*
-			 * Multicast list has changed; set the hardware filter
-			 * accordingly.
-			 */
-			admsw_set_filter(sc);
-			error = 0;
-		}
-		break;
-	}
-
-	/* Try to get more packets going. */
-	admsw_start(ifp);
-
-	ADMSW_UNLOCK(sc);
-	return (error);
-}
-
-
-/*
- * admsw_intr:
- *
- *	Interrupt service routine.
- */
-static int
-admsw_intr(void *arg)
-{
-	struct admsw_softc *sc = arg;
-	uint32_t pending;
-
-	pending = REG_READ(ADMSW_INT_ST);
-	REG_WRITE(ADMSW_INT_ST, pending);
-
-	if (sc->ndevs == 0)
-		return (FILTER_STRAY);
-
-	if ((pending & ADMSW_INTR_RHD) != 0)
-		admsw_rxintr(sc, 1);
-
-	if ((pending & ADMSW_INTR_RLD) != 0)
-		admsw_rxintr(sc, 0);
-
-	if ((pending & ADMSW_INTR_SHD) != 0)
-		admsw_txintr(sc, 1);
-
-	if ((pending & ADMSW_INTR_SLD) != 0)
-		admsw_txintr(sc, 0);
-
-	return (FILTER_HANDLED);
-}
-
-/*
- * admsw_txintr:
- *
- *	Helper; handle transmit interrupts.
- */
-static void
-admsw_txintr(struct admsw_softc *sc, int prio)
-{
-	struct ifnet *ifp;
-	struct admsw_desc *desc;
-	struct admsw_descsoft *ds;
-	int i, vlan;
-	int gotone = 0;
-
-	/* printf("txintr: txdirty: %d, txfree: %d\n",sc->sc_txdirty, sc->sc_txfree); */
-	for (i = sc->sc_txdirty; sc->sc_txfree != ADMSW_NTXLDESC;
-	    i = ADMSW_NEXTTXL(i)) {
-
-		ADMSW_CDTXLSYNC(sc, i,
-		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-
-		desc = &sc->sc_txldescs[i];
-		ds = &sc->sc_txlsoft[i];
-		if (desc->data & ADM5120_DMA_OWN) {
-			ADMSW_CDTXLSYNC(sc, i,
-			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-			break;
-		}
-
-		bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, 
-		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->sc_bufs_dmat, ds->ds_dmamap);
-		m_freem(ds->ds_mbuf);
-		ds->ds_mbuf = NULL;
-
-		vlan = ffs(desc->status & 0x3f) - 1;
-		if (vlan < 0 || vlan >= SW_DEVS)
-			panic("admsw_txintr: bad vlan\n");
-		ifp = sc->sc_ifnet[vlan];
-		gotone = 1;
-		/* printf("clear tx slot %d\n",i); */
-
-		if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-
-		sc->sc_txfree++;
-	}
-
-	if (gotone) {
-		sc->sc_txdirty = i;
-		for (vlan = 0; vlan < SW_DEVS; vlan++)
-			sc->sc_ifnet[vlan]->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-		ifp = sc->sc_ifnet[0];
-
-		/* Try to queue more packets. */
-		admsw_start(ifp);
-
-		/*
-		 * If there are no more pending transmissions,
-		 * cancel the watchdog timer.
-		 */
-		if (sc->sc_txfree == ADMSW_NTXLDESC)
-			sc->sc_timer = 0;
-
-	}
-
-	/* printf("txintr end: txdirty: %d, txfree: %d\n",sc->sc_txdirty, sc->sc_txfree); */
-}
-
-/*
- * admsw_rxintr:
- *
- *	Helper; handle receive interrupts.
- */
-static void
-admsw_rxintr(struct admsw_softc *sc, int high)
-{
-	struct ifnet *ifp;
-	struct admsw_descsoft *ds;
-	struct mbuf *m;
-	uint32_t stat;
-	int i, len, port, vlan;
-
-	/* printf("rxintr\n"); */
-
-	if (high)
-		panic("admsw_rxintr: high priority packet\n");
-
-#if 1
-	ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, 
-	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-	if ((sc->sc_rxldescs[sc->sc_rxptr].data & ADM5120_DMA_OWN) == 0)
-		ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, 
-		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-	else {
-		i = sc->sc_rxptr;
-		do {
-			ADMSW_CDRXLSYNC(sc, i, 
-			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-			i = ADMSW_NEXTRXL(i);
-			/* the ring is empty, just return. */
-			if (i == sc->sc_rxptr)
-				return;
-			ADMSW_CDRXLSYNC(sc, i, 
-			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-		} while (sc->sc_rxldescs[i].data & ADM5120_DMA_OWN);
-
-		ADMSW_CDRXLSYNC(sc, i, 
-		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
-		ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, 
-		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-
-		if ((sc->sc_rxldescs[sc->sc_rxptr].data & ADM5120_DMA_OWN) == 0)
-			ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, 
-			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-		else {
-			ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, 
-			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-			/* We've fallen behind the chip: catch it. */
-#if 0
-			device_printf(sc->sc_dev, 
-			   "RX ring resync, base=%x, work=%x, %d -> %d\n",
-			    REG_READ(RECV_LBADDR_REG),
-			    REG_READ(RECV_LWADDR_REG), sc->sc_rxptr, i);
-#endif
-			sc->sc_rxptr = i;
-			/* ADMSW_EVCNT_INCR(&sc->sc_ev_rxsync); */
-		}
-	}
-#endif
-	for (i = sc->sc_rxptr;; i = ADMSW_NEXTRXL(i)) {
-		ds = &sc->sc_rxlsoft[i];
-
-		ADMSW_CDRXLSYNC(sc, i, 
-		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-
-		if (sc->sc_rxldescs[i].data & ADM5120_DMA_OWN) {
-			ADMSW_CDRXLSYNC(sc, i, 
-			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-			break;
-		}
-
-		/* printf("process slot %d\n",i); */
-
-		bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap,
-		    BUS_DMASYNC_POSTREAD);
-
-		stat = sc->sc_rxldescs[i].status;
-		len = (stat & ADM5120_DMA_LEN) >> ADM5120_DMA_LENSHIFT;
-		len -= ETHER_CRC_LEN;
-		port = (stat & ADM5120_DMA_PORTID) >> ADM5120_DMA_PORTSHIFT;
-
-		for (vlan = 0; vlan < SW_DEVS; vlan++)
-			if ((1 << port) & vlan_matrix[vlan])
-				break;
-
-		if (vlan == SW_DEVS)
-			vlan = 0;
-
-		ifp = sc->sc_ifnet[vlan];
-
-		m = ds->ds_mbuf;
-		if (admsw_add_rxlbuf(sc, i) != 0) {
-			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
-			ADMSW_INIT_RXLDESC(sc, i);
-			bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap,
-			    BUS_DMASYNC_PREREAD);
-			continue;
-		}
-
-		m->m_pkthdr.rcvif = ifp;
-		m->m_pkthdr.len = m->m_len = len;
-		if ((stat & ADM5120_DMA_TYPE) == ADM5120_DMA_TYPE_IP) {
-			m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
-			if (!(stat & ADM5120_DMA_CSUMFAIL))
-				m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
-		}
-
-		BPF_MTAP(ifp, m);
-
-		/* Pass it on. */
-		(*ifp->if_input)(ifp, m);
-		if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-	}
-
-	/* Update the receive pointer. */
-	sc->sc_rxptr = i;
-}
-
-/*
- * admsw_init:		[ifnet interface function]
- *
- *	Initialize the interface.
- */
-static void
-admsw_init(void *xsc)
-{
-	struct admsw_softc *sc = xsc;
-	struct ifnet *ifp;
-	int i;
-
-	for (i = 0; i < SW_DEVS; i++) {
-		ifp = sc->sc_ifnet[i];
-		if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
-			if (sc->ndevs == 0) {
-				admsw_init_bufs(sc);
-				admsw_reset(sc);
-				REG_WRITE(CPUP_CONF_REG,
-				    CPUP_CONF_CRCP | CPUP_CONF_DUNP_MASK |
-				    CPUP_CONF_DMCP_MASK);
-				/* clear all pending interrupts */
-				REG_WRITE(ADMSW_INT_ST, INT_MASK);
-
-				/* enable needed interrupts */
-				REG_WRITE(ADMSW_INT_MASK, 
-				    REG_READ(ADMSW_INT_MASK) & 
-				    ~(ADMSW_INTR_SHD | ADMSW_INTR_SLD | 
-					ADMSW_INTR_RHD | ADMSW_INTR_RLD | 
-					ADMSW_INTR_HDF | ADMSW_INTR_LDF));
-
-				callout_reset(&sc->sc_watchdog, hz,
-				    admsw_watchdog, sc);
-			}
-			sc->ndevs++;
-		}
-
-
-		/* mark iface as running */
-		ifp->if_drv_flags |= IFF_DRV_RUNNING;
-		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-	}
-
-	/* Set the receive filter. */
-	admsw_set_filter(sc);
-}
-
-/*
- * admsw_stop:		[ifnet interface function]
- *
- *	Stop transmission on the interface.
- */
-static void
-admsw_stop(struct ifnet *ifp, int disable)
-{
-	struct admsw_softc *sc = ifp->if_softc;
-
-	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
-		return;
-
-	if (--sc->ndevs == 0) {
-		/* printf("debug: de-initializing hardware\n"); */
-
-		/* disable cpu port */
-		REG_WRITE(CPUP_CONF_REG,
-				CPUP_CONF_DCPUP | CPUP_CONF_CRCP |
-				CPUP_CONF_DUNP_MASK | CPUP_CONF_DMCP_MASK);
-
-		/* XXX We should disable, then clear? --dyoung */
-		/* clear all pending interrupts */
-		REG_WRITE(ADMSW_INT_ST, INT_MASK);
-
-		/* disable interrupts */
-		REG_WRITE(ADMSW_INT_MASK, INT_MASK);
-
-		/* Cancel the watchdog timer. */
-		sc->sc_timer = 0;
-		callout_stop(&sc->sc_watchdog);
-	}
-
-	/* Mark the interface as down. */
-	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-
-	return;
-}
-
-/*
- * admsw_set_filter:
- *
- *	Set up the receive filter.
- */
-static void
-admsw_set_filter(struct admsw_softc *sc)
-{
-	int i;
-	uint32_t allmc, anymc, conf, promisc;
-	struct ifnet *ifp;
-	struct ifmultiaddr *ifma;
-
-	/* Find which ports should be operated in promisc mode. */
-	allmc = anymc = promisc = 0;
-	for (i = 0; i < SW_DEVS; i++) {
-		ifp = sc->sc_ifnet[i];
-		if (ifp->if_flags & IFF_PROMISC)
-			promisc |= vlan_matrix[i];
-
-		ifp->if_flags &= ~IFF_ALLMULTI;
-
-		if_maddr_rlock(ifp);
-		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
-		{
-			if (ifma->ifma_addr->sa_family != AF_LINK)
-				continue;
-
-			anymc |= vlan_matrix[i];
-		}
-		if_maddr_runlock(ifp);
-	}
-
-	conf = REG_READ(CPUP_CONF_REG);
-	/* 1 Disable forwarding of unknown & multicast packets to
-	 *   CPU on all ports.
-	 * 2 Enable forwarding of unknown & multicast packets to
-	 *   CPU on ports where IFF_PROMISC or IFF_ALLMULTI is set.
-	 */
-	conf |= CPUP_CONF_DUNP_MASK | CPUP_CONF_DMCP_MASK;
-	/* Enable forwarding of unknown packets to CPU on selected ports. */
-	conf ^= ((promisc << CPUP_CONF_DUNP_SHIFT) & CPUP_CONF_DUNP_MASK);
-	conf ^= ((allmc << CPUP_CONF_DMCP_SHIFT) & CPUP_CONF_DMCP_MASK);
-	conf ^= ((anymc << CPUP_CONF_DMCP_SHIFT) & CPUP_CONF_DMCP_MASK);
-	REG_WRITE(CPUP_CONF_REG, conf);
-}
-
-/*
- * admsw_add_rxbuf:
- *
- *	Add a receive buffer to the indicated descriptor.
- */
-int
-admsw_add_rxbuf(struct admsw_softc *sc, int idx, int high)
-{
-	struct admsw_descsoft *ds;
-	struct mbuf *m;
-	int error;
-
-	if (high)
-		ds = &sc->sc_rxhsoft[idx];
-	else
-		ds = &sc->sc_rxlsoft[idx];
-
-	MGETHDR(m, M_NOWAIT, MT_DATA);
-	if (m == NULL)
-		return (ENOBUFS);
-
-	if (!(MCLGET(m, M_NOWAIT))) {
-		m_freem(m);
-		return (ENOBUFS);
-	}
-
-	if (ds->ds_mbuf != NULL)
-		bus_dmamap_unload(sc->sc_bufs_dmat, ds->ds_dmamap);
-
-	ds->ds_mbuf = m;
-
-	error = bus_dmamap_load(sc->sc_bufs_dmat, ds->ds_dmamap,
-	    m->m_ext.ext_buf, m->m_ext.ext_size, admsw_rxbuf_map_addr, 
-	    ds, BUS_DMA_NOWAIT);
-	if (error) {
-		device_printf(sc->sc_dev, 
-		    "can't load rx DMA map %d, error = %d\n", idx, error);
-		panic("admsw_add_rxbuf");	/* XXX */
-	}
-
-	bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, BUS_DMASYNC_PREREAD);
-
-	if (high)
-		ADMSW_INIT_RXHDESC(sc, idx);
-	else
-		ADMSW_INIT_RXLDESC(sc, idx);
-
-	return (0);
-}
-
-int
-admsw_mediachange(struct ifnet *ifp)
-{
-	struct admsw_softc *sc = ifp->if_softc;
-	int port = 0;
-	struct ifmedia *ifm;
-	int old, new, val;
-
-	while(port < SW_DEVS) {
-		if(ifp == sc->sc_ifnet[port])
-			break;
-		else
-			port++;
-	}
-
-	ifm = &sc->sc_ifmedia[port];
-
-	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
-		return (EINVAL);
-
-	if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
-		val = PHY_CNTL2_AUTONEG|PHY_CNTL2_100M|PHY_CNTL2_FDX;
-	} else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
-		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
-			val = PHY_CNTL2_100M|PHY_CNTL2_FDX;
-		else
-			val = PHY_CNTL2_100M;
-	} else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
-		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
-			val = PHY_CNTL2_FDX;
-		else
-			val = 0;
-	} else
-		return (EINVAL);
-
-	old = REG_READ(PHY_CNTL2_REG);
-	new = old & ~((PHY_CNTL2_AUTONEG|PHY_CNTL2_100M|PHY_CNTL2_FDX) << port);
-	new |= (val << port);
-
-	if (new != old)
-		REG_WRITE(PHY_CNTL2_REG, new);
-
-	return (0);
-}
-
-void
-admsw_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct admsw_softc *sc = ifp->if_softc;
-	int port = 0;
-	int status;
-
-	while(port < SW_DEVS) {
-		if(ifp == sc->sc_ifnet[port])
-			break;
-		else
-			port++;
-	}
-
-	ifmr->ifm_status = IFM_AVALID;
-	ifmr->ifm_active = IFM_ETHER;
-
-	status = REG_READ(PHY_ST_REG) >> port;
-
-	if ((status & PHY_ST_LINKUP) == 0) {
-		ifmr->ifm_active |= IFM_NONE;
-		return;
-	}
-
-	ifmr->ifm_status |= IFM_ACTIVE;
-	ifmr->ifm_active |= (status & PHY_ST_100M) ? IFM_100_TX : IFM_10_T;
-	if (status & PHY_ST_FDX)
-		ifmr->ifm_active |= IFM_FDX;
-}
-
-static device_method_t admsw_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		admsw_probe),
-	DEVMETHOD(device_attach,	admsw_attach),
-	DEVMETHOD(device_detach,	admsw_detach),
-	DEVMETHOD(device_shutdown,	admsw_shutdown),
-
-	{ 0, 0 }
-};
-
-static devclass_t admsw_devclass;
-
-static driver_t admsw_driver = {
-	"admsw",
-	admsw_methods,
-	sizeof(struct admsw_softc),
-};
-
-DRIVER_MODULE(admsw, obio, admsw_driver, admsw_devclass, 0, 0);
-MODULE_DEPEND(admsw, ether, 1, 1, 1);
diff --git a/sys/mips/adm5120/if_admswreg.h b/sys/mips/adm5120/if_admswreg.h
deleted file mode 100644
index 28ec5156a2c..00000000000
--- a/sys/mips/adm5120/if_admswreg.h
+++ /dev/null
@@ -1,680 +0,0 @@
-/* $NetBSD: if_admswreg.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_IF_ADMSWREG_H_
-#define	_IF_ADMSWREG_H_
-
-#define	ADMSW_BOOT_DONE		0x0008
-#define	ADMSW_BOOT_DONE_BO	__BIT(0)
-#define	ADMSW_SW_RES		0x000c
-#define	ADMSW_SW_RES_SWR	__BITS(31, 0)
-#define	ADMSW_INT_ST		0x00b0
-#define	ADMSW_INT_MASK		0x00b4
-
-#define	ADMSW_INTR_RSVD	__BITS(31, 25)
-#define	ADMSW_INTR_CPUH	__BIT(24)
-#define	ADMSW_INTR_SDE	__BIT(23)
-#define	ADMSW_INTR_RDE	__BIT(22)
-#define	ADMSW_INTR_W1TE	__BIT(21)
-#define	ADMSW_INTR_W0TE	__BIT(20)
-#define	ADMSW_INTR_MI	__BIT(19)
-#define	ADMSW_INTR_PSC	__BIT(18)
-#define	ADMSW_INTR_BCS	__BIT(16)
-#define	ADMSW_INTR_MD	__BIT(15)
-#define	ADMSW_INTR_GQF	__BIT(14)
-#define	ADMSW_INTR_CPQ	__BIT(13)
-#define	ADMSW_INTR_P5QF	__BIT(11)
-#define	ADMSW_INTR_P4QF	__BIT(10)
-#define	ADMSW_INTR_P3QF	__BIT(9)
-#define	ADMSW_INTR_P2QF	__BIT(8)
-#define	ADMSW_INTR_P1QF	__BIT(7)
-#define	ADMSW_INTR_P0QF	__BIT(6)
-#define	ADMSW_INTR_LDF	__BIT(5)
-#define	ADMSW_INTR_HDF	__BIT(4)
-#define	ADMSW_INTR_RLD	__BIT(3)
-#define	ADMSW_INTR_RHD	__BIT(2)
-#define	ADMSW_INTR_SLD	__BIT(1)
-#define	ADMSW_INTR_SHD	__BIT(0)
-
-#define	ADMSW_INT_FMT	\
-	"\x10"\
-	"\x01SHD"\
-	"\x02SLD"\
-	"\x03RHD"\
-	"\x04RLD"\
-	"\x05HDF"\
-	"\x06LDF"\
-	"\x07P0QF"\
-	"\x08P1QF"\
-	"\x09P2QF"\
-	"\x0aP3QF"\
-	"\x0bP4QF"\
-	"\x0cP5QF"\
-	"\x0e"\
-	"CPQ"\
-	"\x0fGQF"\
-	"\x10MD"\
-	"\x11"\
-	"BCS"\
-	"\x13PSC"\
-	"\x14MI"\
-	"\x15W0TE"\
-	"\x16W1TE"\
-	"\x17RDE"\
-	"\x18SDE"\
-	"\x19"\
-	"CPUH"
-
-#define	CODE_REG		0x0000
-#define	SFTREST_REG		0x0004
-#define	BOOT_DONE_REG		0x0008
-#define	GLOBAL_ST_REG		0x0010
-#define	PHY_ST_REG		0x0014
-#define		PHY_ST_LINKUP		(1 << 0)
-#define		PHY_ST_100M		(1 << 8)
-#define		PHY_ST_FDX		(1 << 16)
-#define	PORT_ST_REG		0x0018
-#define	MEM_CONTROL_REG		0x001C	
-#define	SW_CONF_REG		0x0020
-
-#define	CPUP_CONF_REG		0x0024
-#define		CPUP_CONF_DCPUP		0x00000001
-#define		CPUP_CONF_CRCP		0x00000002
-#define		CPUP_CONF_BTM		0x00000004
-#define		CPUP_CONF_DUNP_SHIFT	9
-#define		CPUP_CONF_DUNP_MASK	(0x3F << CPUP_CONF_DUNP_SHIFT)
-#define		CPUP_CONF_DMCP_SHIFT	16
-#define		CPUP_CONF_DMCP_MASK	(0x3F << CPUP_CONF_DMCP_SHIFT)
-#define		CPUP_CONF_DBCP_SHIFT	24
-#define		CPUP_CONF_DBCP_MASK	(0x3F << CPUP_CONF_DBCP_SHIFT)
-
-#define	PORT_CONF0_REG		0x0028
-#define		PORT_CONF0_DP_MASK	0x0000003F
-#define		PORT_CONF0_EMCP_MASK	0x00003F00
-#define		PORT_CONF0_EMCP_SHIFT	8
-#define		PORT_CONF0_EMBP_MASK	0x003F0000
-#define		PORT_CONF0_EMBP_SHIFT	16
-#define	PORT_CONF1_REG		0x002C
-#define	PORT_CONF2_REG		0x0030
-
-#define	VLAN_G1_REG		0x0040
-#define	VLAN_G2_REG		0x0044
-#define	SEND_TRIG_REG		0x0048
-#define	SRCH_CMD_REG		0x004C
-#define	ADDR_ST0_REG		0x0050
-#define	ADDR_ST1_REG		0x0054
-#define	MAC_WT0_REG		0x0058
-#define		MAC_WT0_WRITE	0x00000001
-#define		MAC_WT0_WRITE_DONE	0x00000002
-#define		MAC_WT0_FILTER_EN	0x00000004
-#define		MAC_WT0_VLANID_SHIFT	3
-#define		MAC_WT0_VLANID_MASK	0x00000038
-#define		MAC_WT0_VLANID_EN	0x00000040
-#define		MAC_WT0_PORTMAP_MASK	0x00001F80
-#define		MAC_WT0_PORTMAP_SHIFT	7
-#define		MAC_WT0_AGE_MASK	(0x7	<<	13)
-#define		MAC_WT0_AGE_STATIC	(0x7	<<	13)
-#define		MAC_WT0_AGE_VALID	(0x1	<<	13)
-#define		MAC_WT0_AGE_EMPTY	0
-#define	MAC_WT1_REG		0x005C
-#define	BW_CNTL0_REG		0x0060
-#define	BW_CNTL1_REG		0x0064
-#define	PHY_CNTL0_REG		0x0068
-#define	PHY_CNTL1_REG		0x006C
-#define	FC_TH_REG		0x0070
-#define		FC_TH_FCS_MASK		0x01FF0000
-#define		FC_TH_D2R_MASK		0x0000FF00
-#define		FC_TH_D2S_MASK		0x000000FF
-#define	ADJ_PORT_TH_REG		0x0074
-#define	PORT_TH_REG		0x0078
-#define	PHY_CNTL2_REG		0x007C
-#define		PHY_CNTL2_AUTONEG	(1 << 0)
-#define		PHY_CNTL2_ANE_MASK	0x0000001F
-#define		PHY_CNTL2_SC_MASK	0x000003E0
-#define		PHY_CNTL2_SC_SHIFT	5
-#define		PHY_CNTL2_100M		(1 << PHY_CNTL2_SC_SHIFT)
-#define		PHY_CNTL2_DC_MASK	0x00007C00
-#define		PHY_CNTL2_DC_SHIFT	10
-#define		PHY_CNTL2_FDX		(1 << PHY_CNTL2_DC_SHIFT)
-#define		PHY_CNTL2_RFCV_MASK	0x000F8000
-#define		PHY_CNTL2_RFCV_SHIFT	15
-#define		PHY_CNTL2_PHYR_MASK	0x01F00000
-#define		PHY_CNTL2_PHYR_SHIFT	20
-#define		PHY_CNTL2_AMDIX_MASK	0x3E000000
-#define		PHY_CNTL2_AMDIX_SHIFT	25
-#define		PHY_CNTL2_RMAE		0x40000000
-#define	PHY_CNTL3_REG		0x0080
-#define 	PHY_CNTL3_RNT         0x00000400
-
-#define	PRI_CNTL_REG		0x0084
-#define	VLAN_PRI_REG		0x0088
-#define	TOS_EN_REG		0x008C
-#define	TOS_MAP0_REG		0x0090
-#define	TOS_MAP1_REG		0x0094
-#define	CUSTOM_PRI1_REG		0x0098
-#define	CUSTOM_PRI2_REG		0x009C
-
-#define	EMPTY_CNT_REG		0x00A4
-#define	PORT_CNT_SEL_REG	0x00A8
-#define	PORT_CNT_REG		0x00AC
-
-#define	INT_MASK	0x1FDEFFF
-
-#define	GPIO_CONF0_REG		0x00B8
-#define	GPIO_CONF2_REG		0x00BC
-
-#define	SWAP_IN_REG		0x00C8
-#define	SWAP_OUT_REG		0x00CC
-
-#define	SEND_HBADDR_REG		0x00D0
-#define	SEND_LBADDR_REG		0x00D4
-#define	RECV_HBADDR_REG		0x00D8
-#define	RECV_LBADDR_REG		0x00DC
-#define	SEND_HWADDR_REG		0x00E0
-#define	SEND_LWADDR_REG		0x00E4
-#define	RECV_HWADDR_REG		0x00E8
-#define	RECV_LWADDR_REG		0x00EC
-
-#define	TIMER_INT_REG		0x00F0
-#define	TIMER_REG		0x00F4
-
-#define	PORT0_LED_REG		0x0100
-#define	PORT1_LED_REG		0x0104
-#define	PORT2_LED_REG		0x0108
-#define	PORT3_LED_REG		0x010c
-#define	PORT4_LED_REG		0x0110
-
-/* Hardware descriptor format */
-struct admsw_desc {
-        volatile uint32_t data;
-        volatile uint32_t cntl;
-        volatile uint32_t len;
-        volatile uint32_t status;
-} __attribute__((__packed__, __aligned__(4)));
-
-#define ADM5120_DMA_MASK        0x01ffffff
-#define ADM5120_DMA_OWN         0x80000000      /* buffer owner */
-#define ADM5120_DMA_RINGEND     0x10000000      /* Last in DMA ring */
-#define ADM5120_DMA_BUF2ENABLE	0x80000000
-
-#define ADM5120_DMA_PORTID      0x00007000
-#define ADM5120_DMA_PORTSHIFT   12
-#define ADM5120_DMA_LEN         0x07ff0000
-#define ADM5120_DMA_LENSHIFT    16
-#define	ADM5120_DMA_TYPE	0x00000003
-#define	ADM5120_DMA_TYPE_IP	0x00000000
-#define	ADM5120_DMA_TYPE_PPPOE	0x00000001
-#define	ADM5120_DMA_CSUM	0x80000000
-#define	ADM5120_DMA_CSUMFAIL	0x00000008
-
-#define SW_DEVS 6
-
-#if 0
-/*	CODE_REG	*/
-#define	CODE_ID_MASK	0x00FFFF
-#define	CODE_ADM5120_ID	0x5120
-
-#define	CODE_REV_MASK	0x0F0000
-#define	CODE_REV_SHIFT	16
-#define	CODE_REV_ADM5120_0	0x8
-
-#define	CODE_CLK_MASK	0x300000
-#define	CODE_CLK_SHIFT	20
-
-#define	CPU_CLK_175MHZ	0x0
-#define	CPU_CLK_200MHZ	0x1
-#define	CPU_CLK_225MHZ	0x2
-#define	CPU_CLK_250MHZ	0x3
-
-#define	CPU_SPEED_175M	(175000000/2)
-#define	CPU_SPEED_200M	(200000000/2)
-#define	CPU_SPEED_225M	(225000000/2)
-#define	CPU_SPEED_250M	(250000000/2)
-
-#define	CPU_NAND_BOOT	0x01000000
-#define	CPU_DCACHE_2K_WAY	(0x1	<<	25)
-#define	CPU_DCACHE_2WAY	(0x1	<<	26)
-#define	CPU_ICACHE_2K_WAY	(0x1	<<	27)
-#define	CPU_ICACHE_2WAY	(0x1	<<	28)
-
-#define	CPU_GMII_SUPPORT	0x20000000
-
-#define	CPU_PQFP_MODE	(0x1	<<	29)
-
-#define	CPU_CACHE_LINE_SIZE	16
-
-/*	SftRest_REG	*/
-#define	SOFTWARE_RESET	0x1
-
-/*	Boot_done_REG	*/
-#define	BOOT_DONE	0x1
-
-/*	SWReset_REG	*/
-#define	SWITCH_RESET	0x1
-
-/*	Global_St_REG	*/
-#define	DATA_BUF_BIST_FAILED	(0x1	<<	0)
-#define	LINK_TAB_BIST_FAILED	(0x1	<<	1)
-#define	MC_TAB_BIST_FAILED	(0x1	<<	2)
-#define	ADDR_TAB_BIST_FAILED	(0x1	<<	3)
-#define	DCACHE_D_FAILED	(0x3	<<	4)
-#define	DCACHE_T_FAILED	(0x1	<<	6)
-#define	ICACHE_D_FAILED	(0x3	<<	7)
-#define	ICACHE_T_FAILED	(0x1	<<	9)
-#define	BIST_FAILED_MASK	0x03FF
-
-#define	ALLMEM_TEST_DONE	(0x1	<<	10)
-
-#define	SKIP_BLK_CNT_MASK	0x1FF000
-#define	SKIP_BLK_CNT_SHIFT	12
-
-
-/*	PHY_st_REG	*/
-#define	PORT_LINK_MASK	0x0000001F
-#define	PORT_MII_LINKFAIL	0x00000020
-#define	PORT_SPEED_MASK	0x00001F00
-
-#define	PORT_GMII_SPD_MASK	0x00006000
-#define	PORT_GMII_SPD_10M	0
-#define	PORT_GMII_SPD_100M	0x00002000
-#define	PORT_GMII_SPD_1000M	0x00004000
-
-#define	PORT_DUPLEX_MASK	0x003F0000
-#define	PORT_FLOWCTRL_MASK	0x1F000000
-
-#define	PORT_GMII_FLOWCTRL_MASK	0x60000000
-#define	PORT_GMII_FC_ON	0x20000000
-#define	PORT_GMII_RXFC_ON	0x20000000
-#define	PORT_GMII_TXFC_ON	0x40000000
-
-/*	Port_st_REG	*/
-#define	PORT_SECURE_ST_MASK	0x001F
-#define	MII_PORT_TXC_ERR	0x0080
-
-/*	Mem_control_REG	*/
-#define	SDRAM_SIZE_4MBYTES	0x0001
-#define	SDRAM_SIZE_8MBYTES	0x0002
-#define	SDRAM_SIZE_16MBYTES	0x0003
-#define	SDRAM_SIZE_64MBYTES	0x0004
-#define	SDRAM_SIZE_128MBYTES	0x0005
-#define	SDRAM_SIZE_MASK	0x0007
-
-#define	MEMCNTL_SDRAM1_EN	(0x1	<<	5)
-
-#define	ROM_SIZE_DISABLE	0x0000
-#define	ROM_SIZE_512KBYTES	0x0001
-#define	ROM_SIZE_1MBYTES	0x0002
-#define	ROM_SIZE_2MBYTES	0x0003
-#define	ROM_SIZE_4MBYTES	0x0004
-#define	ROM_SIZE_8MBYTES	0x0005
-#define	ROM_SIZE_MASK	0x0007
-
-#define	ROM0_SIZE_SHIFT	8
-#define	ROM1_SIZE_SHIFT	16
-
-
-/*	SW_conf_REG	*/
-#define	SW_AGE_TIMER_MASK	0x000000F0
-#define	SW_AGE_TIMER_DISABLE	0x0
-#define	SW_AGE_TIMER_FAST	0x00000080
-#define	SW_AGE_TIMER_300SEC	0x00000010
-#define	SW_AGE_TIMER_600SEC	0x00000020
-#define	SW_AGE_TIMER_1200SEC	0x00000030
-#define	SW_AGE_TIMER_2400SEC	0x00000040
-#define	SW_AGE_TIMER_4800SEC	0x00000050
-#define	SW_AGE_TIMER_9600SEC	0x00000060
-#define	SW_AGE_TIMER_19200SEC	0x00000070
-//#define	SW_AGE_TIMER_38400SEC	0x00000070
-
-#define	SW_BC_PREV_MASK	0x00000300
-#define	SW_BC_PREV_DISABLE	0
-#define	SW_BC_PREV_64BC	0x00000100
-#define	SW_BC_PREV_48BC	0x00000200
-#define	SW_BC_PREV_32BC	0x00000300
-
-#define	SW_MAX_LEN_MASK	0x00000C00
-#define	SW_MAX_LEN_1536	0
-#define	SW_MAX_LEN_1522	0x00000800
-#define	SW_MAX_LEN_1518	0x00000400
-
-#define	SW_DIS_COLABT	0x00001000
-
-#define	SW_HASH_ALG_MASK	0x00006000
-#define	SW_HASH_ALG_DIRECT	0
-#define	SW_HASH_ALG_XOR48	0x00002000
-#define	SW_HASH_ALG_XOR32	0x00004000
-
-#define	SW_DISABLE_BACKOFF_TIMER	0x00008000
-
-#define	SW_BP_NUM_MASK	0x000F0000
-#define	SW_BP_NUM_SHIFT	16
-#define	SW_BP_MODE_MASK	0x00300000
-#define	SW_BP_MODE_DISABLE	0
-#define	SW_BP_MODE_JAM	0x00100000
-#define	SW_BP_MODE_JAMALL	0x00200000
-#define	SW_BP_MODE_CARRIER	0x00300000
-#define	SW_RESRV_MC_FILTER	0x00400000
-#define	SW_BISR_DISABLE	0x00800000
-
-#define	SW_DIS_MII_WAS_TX	0x01000000
-#define	SW_BISS_EN	0x02000000
-#define	SW_BISS_TH_MASK	0x0C000000
-#define	SW_BISS_TH_SHIFT	26
-#define	SW_REQ_LATENCY_MASK	0xF0000000
-#define	SW_REQ_LATENCY_SHIFT	28
-
-
-/*	CPUp_conf_REG	*/
-#define	SW_CPU_PORT_DISABLE	0x00000001
-#define	SW_PADING_CRC	0x00000002
-#define	SW_BRIDGE_MODE	0x00000004
-
-#define	SW_DIS_UN_SHIFT	9
-#define	SW_DIS_UN_MASK	(0x3F	<<	SW_DIS_UN_SHIFT)
-#define	SW_DIS_MC_SHIFT	16
-#define	SW_DIS_MC_MASK	(0x3F	<<	SW_DIS_MC_SHIFT)
-#define	SW_DIS_BC_SHIFT	24
-#define	SW_DIS_BC_MASK	(0x3F	<<	SW_DIS_BC_SHIFT)
-
-
-/*	Port_conf0_REG	*/
-#define	SW_DISABLE_PORT_MASK	0x0000003F
-#define	SW_EN_MC_MASK	0x00003F00
-#define	SW_EN_MC_SHIFT	8
-#define	SW_EN_BP_MASK	0x003F0000
-#define	SW_EN_BP_SHIFT	16
-#define	SW_EN_FC_MASK	0x3F000000
-#define	SW_EN_FC_SHIFT	24
-
-
-/*	Port_conf1_REG	*/
-#define	SW_DIS_SA_LEARN_MASK	0x0000003F
-#define	SW_PORT_BLOCKING_MASK	0x00000FC0
-#define	SW_PORT_BLOCKING_SHIFT	6
-#define	SW_PORT_BLOCKING_ON	0x1
-
-#define	SW_PORT_BLOCKING_MODE_MASK	0x0003F000
-#define	SW_PORT_BLOCKING_MODE_SHIFT	12
-#define	SW_PORT_BLOCKING_CTRLONLY	0x1
-
-#define	SW_EN_PORT_AGE_MASK	0x03F00000
-#define	SW_EN_PORT_AGE_SHIFT	20
-#define	SW_EN_SA_SECURED_MASK	0xFC000000
-#define	SW_EN_SA_SECURED_SHIFT	26
-
-
-/*	Port_conf2_REG	*/
-#define	SW_GMII_AN_EN	0x00000001
-#define	SW_GMII_FORCE_SPD_MASK	0x00000006
-#define	SW_GMII_FORCE_SPD_10M	0
-#define	SW_GMII_FORCE_SPD_100M	0x2
-#define	SW_GMII_FORCE_SPD_1000M	0x4
-
-#define	SW_GMII_FORCE_FULL_DUPLEX	0x00000008
-
-#define	SW_GMII_FORCE_RXFC	0x00000010
-#define	SW_GMII_FORCE_TXFC	0x00000020
-
-#define	SW_GMII_EN	0x00000040
-#define	SW_GMII_REVERSE	0x00000080
-
-#define	SW_GMII_TXC_CHECK_EN	0x00000100
-
-#define	SW_LED_FLASH_TIME_MASK	0x00030000
-#define	SW_LED_FLASH_TIME_30MS	0
-#define	SW_LED_FLASH_TIME_60MS	0x00010000
-#define	SW_LED_FLASH_TIME_240MS	0x00020000
-#define	SW_LED_FLASH_TIME_480MS	0x00030000
-
-
-/*	Send_trig_REG	*/
-#define	SEND_TRIG_LOW	0x0001
-#define	SEND_TRIG_HIGH	0x0002
-
-
-/*	Srch_cmd_REG	*/
-#define	SW_MAC_SEARCH_START	0x000001
-#define	SW_MAX_SEARCH_AGAIN	0x000002
-
-
-/*	MAC_wt0_REG	*/
-#define	SW_MAC_WRITE	0x00000001
-#define	SW_MAC_WRITE_DONE	0x00000002
-#define	SW_MAC_FILTER_EN	0x00000004
-#define	SW_MAC_VLANID_SHIFT	3
-#define	SW_MAC_VLANID_MASK	0x00000038
-#define	SW_MAC_VLANID_EN	0x00000040
-#define	SW_MAC_PORTMAP_MASK	0x00001F80
-#define	SW_MAC_PORTMAP_SHIFT	7
-#define	SW_MAC_AGE_MASK	(0x7	<<	13)
-#define	SW_MAC_AGE_STATIC	(0x7	<<	13)
-#define	SW_MAC_AGE_VALID	(0x1	<<	13)
-#define	SW_MAC_AGE_EMPTY	0
-
-/*	BW_cntl0_REG	*/
-#define	SW_PORT_TX_NOLIMIT	0
-#define	SW_PORT_TX_64K	1
-#define	SW_PORT_TX_128K	2
-#define	SW_PORT_TX_256K	3
-#define	SW_PORT_TX_512K	4
-#define	SW_PORT_TX_1M	5
-#define	SW_PORT_TX_4M	6
-#define	SW_PORT_TX_10MK	7
-
-/*	BW_cntl1_REG	*/
-#define	SW_TRAFFIC_SHAPE_IPG	(0x1	<<	31)
-
-/*	PHY_cntl0_REG	*/
-#define	SW_PHY_ADDR_MASK	0x0000001F
-#define	PHY_ADDR_MAX	0x1f
-#define	SW_PHY_REG_ADDR_MASK	0x00001F00
-#define	SW_PHY_REG_ADDR_SHIFT	8
-#define	PHY_REG_ADDR_MAX	0x1f
-#define	SW_PHY_WRITE	0x00002000
-#define	SW_PHY_READ	0x00004000
-#define	SW_PHY_WDATA_MASK	0xFFFF0000
-#define	SW_PHY_WDATA_SHIFT	16
-
-
-/*	PHY_cntl1_REG	*/
-#define	SW_PHY_WRITE_DONE	0x00000001
-#define	SW_PHY_READ_DONE	0x00000002
-#define	SW_PHY_RDATA_MASK	0xFFFF0000
-#define	SW_PHY_RDATA_SHIFT	16
-
-/*	FC_th_REG	*/
-/*	Adj_port_th_REG	*/
-/*	Port_th_REG	*/
-
-/*	PHY_cntl2_REG	*/
-#define	SW_PHY_AN_MASK	0x0000001F
-#define	SW_PHY_SPD_MASK	0x000003E0
-#define	SW_PHY_SPD_SHIFT	5
-#define	SW_PHY_DPX_MASK	0x00007C00
-#define	SW_PHY_DPX_SHIFT	10
-#define	SW_FORCE_FC_MASK	0x000F8000
-#define	SW_FORCE_FC_SHIFT	15
-#define	SW_PHY_NORMAL_MASK	0x01F00000
-#define	SW_PHY_NORMAL_SHIFT	20
-#define	SW_PHY_AUTOMDIX_MASK	0x3E000000
-#define	SW_PHY_AUTOMDIX_SHIFT	25
-#define	SW_PHY_REC_MCCAVERAGE	0x40000000
-
-
-/*	PHY_cntl3_REG	*/
-/*	Pri_cntl_REG	*/
-/*	VLAN_pri_REG	*/
-/*	TOS_en_REG	*/
-/*	TOS_map0_REG	*/
-/*	TOS_map1_REG	*/
-/*	Custom_pri1_REG	*/
-/*	Custom_pri2_REG	*/
-/*	Empty_cnt_REG	*/
-/*	Port_cnt_sel_REG	*/
-/*	Port_cnt_REG	*/
-
-
-/*	SW_Int_st_REG	&	SW_Int_mask_REG	*/
-#define	SEND_H_DONE_INT	0x0000001
-#define	SEND_L_DONE_INT	0x0000002
-#define	RX_H_DONE_INT	0x0000004
-#define	RX_L_DONE_INT	0x0000008
-#define	RX_H_DESC_FULL_INT	0x0000010
-#define	RX_L_DESC_FULL_INT	0x0000020
-#define	PORT0_QUE_FULL_INT	0x0000040
-#define	PORT1_QUE_FULL_INT	0x0000080
-#define	PORT2_QUE_FULL_INT	0x0000100
-#define	PORT3_QUE_FULL_INT	0x0000200
-#define	PORT4_QUE_FULL_INT	0x0000400
-#define	PORT5_QUE_FULL_INT	0x0000800
-
-#define	CPU_QUE_FULL_INT	0x0002000
-#define	GLOBAL_QUE_FULL_INT	0x0004000
-#define	MUST_DROP_INT	0x0008000
-#define	BC_STORM_INT	0x0010000
-
-#define	PORT_STATUS_CHANGE_INT	0x0040000
-#define	INTRUDER_INT	0x0080000
-#define	WATCHDOG0_EXPR_INT	0x0100000
-#define	WATCHDOG1_EXPR_INT	0x0200000
-#define	RX_DESC_ERR_INT	0x0400000
-#define	SEND_DESC_ERR_INT	0x0800000
-#define	CPU_HOLD_INT	0x1000000
-#define	SWITCH_INT_MASK	0x1FDEFFF
-
-
-/*	GPIO_conf0_REG	*/
-#define	GPIO0_INPUT_MODE	0x00000001
-#define	GPIO1_INPUT_MODE	0x00000002
-#define	GPIO2_INPUT_MODE	0x00000004
-#define	GPIO3_INPUT_MODE	0x00000008
-#define	GPIO4_INPUT_MODE	0x00000010
-#define	GPIO5_INPUT_MODE	0x00000020
-#define	GPIO6_INPUT_MODE	0x00000040
-#define	GPIO7_INPUT_MODE	0x00000080
-
-#define	GPIO0_OUTPUT_MODE	0
-#define	GPIO1_OUTPUT_MODE	0
-#define	GPIO2_OUTPUT_MODE	0
-#define	GPIO3_OUTPUT_MODE	0
-#define	GPIO4_OUTPUT_MODE	0
-#define	GPIO5_OUTPUT_MODE	0
-#define	GPIO6_OUTPUT_MODE	0
-#define	GPIO7_OUTPUT_MODE	0
-
-#define	GPIO0_INPUT_MASK	0x00000100
-#define	GPIO1_INPUT_MASK	0x00000200
-#define	GPIO2_INPUT_MASK	0x00000400
-#define	GPIO3_INPUT_MASK	0x00000800
-#define	GPIO4_INPUT_MASK	0x00001000
-#define	GPIO5_INPUT_MASK	0x00002000
-#define	GPIO6_INPUT_MASK	0x00004000
-#define	GPIO7_INPUT_MASK	0x00008000
-
-#define	GPIO0_OUTPUT_EN	0x00010000
-#define	GPIO1_OUTPUT_EN	0x00020000
-#define	GPIO2_OUTPUT_EN	0x00040000
-#define	GPIO3_OUTPUT_EN	0x00080000
-#define	GPIO4_OUTPUT_EN	0x00100000
-#define	GPIO5_OUTPUT_EN	0x00200000
-#define	GPIO6_OUTPUT_EN	0x00400000
-#define	GPIO7_OUTPUT_EN	0x00800000
-
-#define	GPIO_CONF0_OUTEN_MASK	0x00ff0000
-
-#define	GPIO0_OUTPUT_HI	0x01000000
-#define	GPIO1_OUTPUT_HI	0x02000000
-#define	GPIO2_OUTPUT_HI	0x04000000
-#define	GPIO3_OUTPUT_HI	0x08000000
-#define	GPIO4_OUTPUT_HI	0x10000000
-#define	GPIO5_OUTPUT_HI	0x20000000
-#define	GPIO6_OUTPUT_HI	0x40000000
-#define	GPIO7_OUTPUT_HI	0x80000000
-
-#define	GPIO0_OUTPUT_LOW	0
-#define	GPIO1_OUTPUT_LOW	0
-#define	GPIO2_OUTPUT_LOW	0
-#define	GPIO3_OUTPUT_LOW	0
-#define	GPIO4_OUTPUT_LOW	0
-#define	GPIO5_OUTPUT_LOW	0
-#define	GPIO6_OUTPUT_LOW	0
-#define	GPIO7_OUTPUT_LOW	0
-
-
-/*	GPIO_conf2_REG	*/
-#define	EXTIO_WAIT_EN	(0x1	<<	6)
-#define	EXTIO_CS1_INT1_EN	(0x1	<<	5)
-#define	EXTIO_CS0_INT0_EN	(0x1	<<	4)
-
-/*	Timer_int_REG	*/
-#define	SW_TIMER_INT_DISABLE	0x10000
-#define	SW_TIMER_INT	0x1
-
-/*	Timer_REG	*/
-#define	SW_TIMER_EN	0x10000
-#define	SW_TIMER_MASK	0xffff
-#define	SW_TIMER_10MS_TICKS	0x3D09
-#define	SW_TIMER_1MS_TICKS	0x61A
-#define	SW_TIMER_100US_TICKS	0x9D
-
-
-/*	Port0_LED_REG,	Port1_LED_REG,	Port2_LED_REG,	Port3_LED_REG,	Port4_LED_REG*/
-#define	GPIOL_INPUT_MODE	0x00
-#define	GPIOL_OUTPUT_FLASH	0x01
-#define	GPIOL_OUTPUT_LOW	0x02
-#define	GPIOL_OUTPUT_HIGH	0x03
-#define	GPIOL_LINK_LED	0x04
-#define	GPIOL_SPEED_LED	0x05
-#define	GPIOL_DUPLEX_LED	0x06
-#define	GPIOL_ACT_LED	0x07
-#define	GPIOL_COL_LED	0x08
-#define	GPIOL_LINK_ACT_LED	0x09
-#define	GPIOL_DUPLEX_COL_LED	0x0A
-#define	GPIOL_10MLINK_ACT_LED	0x0B
-#define	GPIOL_100MLINK_ACT_LED	0x0C
-#define	GPIOL_CTRL_MASK	0x0F
-
-#define	GPIOL_INPUT_MASK	0x7000
-#define	GPIOL_INPUT_0_MASK	0x1000
-#define	GPIOL_INPUT_1_MASK	0x2000
-#define	GPIOL_INPUT_2_MASK	0x4000
-
-#define	PORT_LED0_SHIFT	0
-#define	PORT_LED1_SHIFT	4
-#define	PORT_LED2_SHIFT	8
-#endif
-
-#endif /* _IF_ADMSWREG_H_ */
diff --git a/sys/mips/adm5120/if_admswvar.h b/sys/mips/adm5120/if_admswvar.h
deleted file mode 100644
index d7d341ade4e..00000000000
--- a/sys/mips/adm5120/if_admswvar.h
+++ /dev/null
@@ -1,216 +0,0 @@
-/* $NetBSD: if_admswvar.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-#ifndef	_IF_ADMSWVAR_H_
-#define	_IF_ADMSWVAR_H_
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-#include <machine/bus.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_mib.h>
-#include <net/if_types.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/in_var.h>
-#include <netinet/ip.h>
-#endif
-
-#include <net/bpf.h>
-#include <net/bpfdesc.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include <mips/adm5120/adm5120reg.h>
-#include <mips/adm5120/if_admswreg.h>
-
-#define	MAC_BUFLEN	0x07ff
-
-#define	ADMSW_NTXHDESC	4
-#define	ADMSW_NRXHDESC	32
-#define	ADMSW_NTXLDESC	32
-#define	ADMSW_NRXLDESC	32
-
-#define	ADMSW_NTXHDESC_MASK	(ADMSW_NTXHDESC - 1)
-#define	ADMSW_NRXHDESC_MASK	(ADMSW_NRXHDESC - 1)
-#define	ADMSW_NTXLDESC_MASK	(ADMSW_NTXLDESC - 1)
-#define	ADMSW_NRXLDESC_MASK	(ADMSW_NRXLDESC - 1)
-
-#define	ADMSW_NEXTTXH(x)	(((x) + 1) & ADMSW_NTXHDESC_MASK)
-#define	ADMSW_NEXTRXH(x)	(((x) + 1) & ADMSW_NRXHDESC_MASK)
-#define	ADMSW_NEXTTXL(x)	(((x) + 1) & ADMSW_NTXLDESC_MASK)
-#define	ADMSW_NEXTRXL(x)	(((x) + 1) & ADMSW_NRXLDESC_MASK)
-
-#define	ADMSW_IRQ	9
-
-struct admsw_control_data {
-	/* The transmit descriptors. */
-	struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC];
-
-	/* The receive descriptors. */
-	struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC];
-
-	/* The transmit descriptors. */
-	struct admsw_desc acd_txldescs[ADMSW_NTXLDESC];
-
-	/* The receive descriptors. */
-	struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC];
-};
-
-#define	ADMSW_CDOFF(x)		offsetof(struct admsw_control_data, x)
-#define	ADMSW_CDTXHOFF(x)	ADMSW_CDOFF(acd_txhdescs[(x)])
-#define	ADMSW_CDTXLOFF(x)	ADMSW_CDOFF(acd_txldescs[(x)])
-#define	ADMSW_CDRXHOFF(x)	ADMSW_CDOFF(acd_rxhdescs[(x)])
-#define	ADMSW_CDRXLOFF(x)	ADMSW_CDOFF(acd_rxldescs[(x)])
-
-struct admsw_descsoft {
-	struct mbuf *ds_mbuf;
-	bus_dmamap_t ds_dmamap;
-	/* Up to 2 segments */
-	uint32_t ds_addr[2];
-	uint32_t ds_len[2];
-	uint32_t ds_nsegs;
-};
-
-/*
- * Software state per device.
- */
-struct admsw_softc {
-	device_t	 sc_dev;	/* generic device information */
-	uint8_t		 sc_enaddr[ETHER_ADDR_LEN];
-	bus_dma_tag_t	 sc_control_dmat;
-					/* bus DMA tag for control structs*/
-	bus_dma_tag_t	 sc_bufs_dmat;	/* bus DMA tag for buffers */
-	struct ifmedia	 sc_ifmedia[SW_DEVS];
-	int		 ndevs;		/* number of IFF_RUNNING interfaces */
-	struct ifnet	*sc_ifnet[SW_DEVS];
-	struct callout	 sc_watchdog;
-	int		 sc_timer;
-					/* Ethernet common data */
-	void		*sc_ih;		/* interrupt cookie */
-	struct resource	*irq_res;
-	struct resource	*mem_res;
-	bus_dmamap_t	 sc_cddmamap;	/* control data DMA map */
-	uint32_t	 sc_cddma;
-	struct admsw_control_data *sc_control_data;
-
-	struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC];
-	struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC];
-	struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC];
-	struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC];
-#define	sc_txhdescs	sc_control_data->acd_txhdescs
-#define	sc_rxhdescs	sc_control_data->acd_rxhdescs
-#define	sc_txldescs	sc_control_data->acd_txldescs
-#define	sc_rxldescs	sc_control_data->acd_rxldescs
-
-	int sc_txfree;			/* number of free Tx descriptors */
-	int sc_txnext;			/* next Tx descriptor to use */
-	int sc_txdirty;			/* first dirty Tx descriptor */
-	int sc_rxptr;			/* next ready Rx descriptor */
-};
-
-#define	ADMSW_CDTXHADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDTXHOFF((x)))
-#define	ADMSW_CDTXLADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDTXLOFF((x)))
-#define	ADMSW_CDRXHADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDRXHOFF((x)))
-#define	ADMSW_CDRXLADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDRXLOFF((x)))
-
-#define	ADMSW_CDTXHSYNC(sc, x, ops)					\
-	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
-
-#define	ADMSW_CDTXLSYNC(sc, x, ops)					\
-	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
-
-#define	ADMSW_CDRXHSYNC(sc, x, ops)					\
-	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
-
-#define	ADMSW_CDRXLSYNC(sc, x, ops)					\
-	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
-
-#define	ADMSW_INIT_RXHDESC(sc, x)				\
-do {								\
-	struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)];	\
-	struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)];	\
-	struct mbuf *__m = __ds->ds_mbuf;			\
-								\
-	__m->m_data = __m->m_ext.ext_buf + 2;			\
-	__desc->data = __ds->ds_addr[0] + 2;	\
-	__desc->cntl = 0;					\
-	__desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2);	\
-	__desc->status = 0;					\
-	if ((x) == ADMSW_NRXHDESC - 1)				\
-		__desc->data |= ADM5120_DMA_RINGEND;		\
-	__desc->data |= ADM5120_DMA_OWN;			\
-	ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
-} while (0)
-
-#define	ADMSW_INIT_RXLDESC(sc, x)				\
-do {								\
-	struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)];	\
-	struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)];	\
-	struct mbuf *__m = __ds->ds_mbuf;			\
-								\
-	__m->m_data = __m->m_ext.ext_buf + 2;			\
-	__desc->data = __ds->ds_addr[0] + 2;	\
-	__desc->cntl = 0;					\
-	__desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2);	\
-	__desc->status = 0;					\
-	if ((x) == ADMSW_NRXLDESC - 1)				\
-		__desc->data |= ADM5120_DMA_RINGEND;		\
-	__desc->data |= ADM5120_DMA_OWN;			\
-	ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
-} while (0)
-
-void admwdog_attach(struct admsw_softc *);
-
-#endif /* _IF_ADMSWVAR_H_ */
diff --git a/sys/mips/adm5120/obio.c b/sys/mips/adm5120/obio.c
deleted file mode 100644
index a52b405c7f1..00000000000
--- a/sys/mips/adm5120/obio.c
+++ /dev/null
@@ -1,542 +0,0 @@
-/*	$NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/adm5120/adm5120reg.h>
-#include <mips/adm5120/obiovar.h>
-
-/* MIPS HW interrupts of IRQ/FIQ respectively */
-#define ADM5120_INTR		0
-#define ADM5120_FAST_INTR	1
-
-/* Interrupt levels */
-#define INTR_IRQ 0
-#define INTR_FIQ 1
-
-int irq_priorities[NIRQS] = {
-	INTR_IRQ,	/* flash */
-	INTR_FIQ,	/* uart0 */
-	INTR_FIQ,	/* uart1 */
-	INTR_IRQ,	/* ahci  */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* admsw */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-};
-
-
-#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(ADM5120_BASE_ICU + (o)))
-#define REG_WRITE(o,v) (REG_READ(o)) = (v)
-
-static int	obio_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	obio_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		obio_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	obio_attach(device_t);
-static int	obio_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		obio_get_resource_list(device_t, device_t);
-static void	obio_hinted_child(device_t, const char *, int);
-static int	obio_intr(void *);
-static int	obio_probe(device_t);
-static int	obio_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	obio_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	obio_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-
-
-static void 
-obio_mask_irq(void *source)
-{
-	int irq;
-	uint32_t irqmask;
-	uint32_t reg;
-
-	irq = (int)source;
-	irqmask = 1 << irq;
-
-	/* disable IRQ */
-	reg = REG_READ(ICU_DISABLE_REG);
-	REG_WRITE(ICU_DISABLE_REG, (reg | irqmask));
-}
-
-static void 
-obio_unmask_irq(void *source)
-{
-	int irq;
-	uint32_t irqmask;
-	uint32_t reg;
-
-	irq = (int)source;
-	irqmask = 1 << irq;
-
-	/* disable IRQ */
-	reg = REG_READ(ICU_DISABLE_REG);
-	REG_WRITE(ICU_DISABLE_REG, (reg & ~irqmask));
-
-}
-
-
-static int
-obio_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->oba_mem_rman.rm_type = RMAN_ARRAY;
-	sc->oba_mem_rman.rm_descr = "OBIO memeory";
-	if (rman_init(&sc->oba_mem_rman) != 0 ||
-	    rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START,
-	        OBIO_MEM_START + OBIO_MEM_SIZE) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, 0, NIRQS-1) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    ADM5120_INTR, ADM5120_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, obio_intr, NULL,
-	    sc, &sc->sc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* Hook up our FAST interrupt handler. */
-	if ((sc->sc_fast_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    ADM5120_FAST_INTR, ADM5120_FAST_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_fast_irq, INTR_TYPE_MISC, obio_intr,
-	    NULL, sc, &sc->sc_fast_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* disable all interrupts */
-	REG_WRITE(ICU_ENABLE_REG, ICU_INT_MASK);
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct obio_softc		*sc = device_get_softc(bus);
-	struct obio_ivar		*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1);
-	needactivate = flags & RF_ACTIVE;
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL)
-			return (NULL);
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->oba_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/*
-	 * If this is a memory resource, track the direct mapping
-	 * in the uncached MIPS KSEG1 segment.
-	 */
-	if (type == SYS_RES_MEMORY) {
-		void *vaddr;
-
-		vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
-		rman_set_virtual(r, vaddr);
-		rman_set_bustag(r, mips_bus_space_generic);
-		rman_set_bushandle(r, (bus_space_handle_t)vaddr);
-	}
-
-	return (rman_activate_resource(r));
-}
-
-static int
-obio_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-obio_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = obio_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-obio_setup_intr(device_t dev, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, error, priority;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq,
-		    obio_mask_irq, obio_unmask_irq,
-		    NULL, NULL, "obio intr%d:", irq);
-
-		sc->sc_eventstab[irq] = event;
-	}
-	else
-		panic("obio: Can't share IRQs");
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	irqmask = 1 << irq;
-	priority = irq_priorities[irq];
-
-	if (priority == INTR_FIQ)
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask);
-	else
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask);
-
-	/* enable */
-	REG_WRITE(ICU_ENABLE_REG, irqmask);
-
-	obio_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-obio_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int irq, result, priority;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	irqmask = (1 << irq);
-	priority = irq_priorities[irq];
-
-	if (priority == INTR_FIQ)
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask);
-	else
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask);
-
-	/* disable */
-	irqmask = REG_READ(ICU_ENABLE_REG);
-	irqmask &= ~(1 << irq);
-	REG_WRITE(ICU_ENABLE_REG, irqmask);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result) {
-		sc->sc_eventstab[irq] = NULL;
-	}
-
-	return (result);
-}
-
-static int
-obio_intr(void *arg)
-{
-	struct obio_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t irqstat;
-	int irq;
-
-	irqstat = REG_READ(ICU_FIQ_STATUS_REG);
-	irqstat |= REG_READ(ICU_STATUS_REG);
-
-	irq = 0;
-	while (irqstat != 0) {
-		if ((irqstat & 1) == 1) {
-			event = sc->sc_eventstab[irq];
-			if (!event || TAILQ_EMPTY(&event->ie_handlers))
-				continue;
-
-			/* TODO: pass frame as an argument*/
-			/* TODO: log stray interrupt */
-			intr_event_handle(event, NULL);
-		}
-
-		irq++;
-		irqstat >>= 1;
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-obio_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t		child;
-	long			maddr;
-	int			msize;
-	int			irq;
-	int			result;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	resource_long_value(dname, dunit, "maddr", &maddr);
-	resource_int_value(dname, dunit, "msize", &msize);
-
-
-	result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-	    maddr, msize);
-	if (result != 0)
-		device_printf(bus, "warning: bus_set_resource() failed\n");
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static device_t
-obio_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct obio_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-obio_get_resource_list(device_t dev, device_t child)
-{
-	struct obio_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-static device_method_t obio_methods[] = {
-	DEVMETHOD(bus_activate_resource,	obio_activate_resource),
-	DEVMETHOD(bus_add_child,		obio_add_child),
-	DEVMETHOD(bus_alloc_resource,		obio_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	obio_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	obio_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		obio_hinted_child),
-	DEVMETHOD(bus_release_resource,		obio_release_resource),
-	DEVMETHOD(bus_setup_intr,		obio_setup_intr),
-	DEVMETHOD(bus_teardown_intr,		obio_teardown_intr),
-	DEVMETHOD(device_attach,		obio_attach),
-	DEVMETHOD(device_probe,			obio_probe),
-        DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-        DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/adm5120/obiovar.h b/sys/mips/adm5120/obiovar.h
deleted file mode 100644
index 8a688bfb220..00000000000
--- a/sys/mips/adm5120/obiovar.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _ADM5120_OBIOVAR_H_
-#define	_ADM5120_OBIOVAR_H_
-
-#include <sys/rman.h>
-
-/* Number of IRQs */
-#define	NIRQS	32
-
-#define	OBIO_MEM_START	0x10C00000L
-#define	OBIO_MEM_SIZE	0x1e00000
-
-struct obio_softc {
-	struct rman		oba_mem_rman;
-	struct rman		oba_irq_rman;
-	struct intr_event	*sc_eventstab[NIRQS]; /* IRQ events structs */
-	struct resource		*sc_irq;	/* IRQ resource */
-	void			*sc_ih;		/* interrupt cookie */
-	struct resource		*sc_fast_irq;	/* IRQ resource */
-	void			*sc_fast_ih;	/* interrupt cookie */
-};
-
-struct obio_ivar {
-	struct resource_list	resources;
-};
-
-#endif /* _ADM5120_OBIOVAR_H_ */
diff --git a/sys/mips/adm5120/std.adm5120 b/sys/mips/adm5120/std.adm5120
deleted file mode 100644
index bbd9f0b5a33..00000000000
--- a/sys/mips/adm5120/std.adm5120
+++ /dev/null
@@ -1,12 +0,0 @@
-# $FreeBSD$
-#
-# Standard include file for ADM5120
-
-files		"../adm5120/files.adm5120"
-
-machine		mips mipsel
-cpu		CPU_MIPS4KC
-
-# device 	admpci
-device		admsw
-device		pci
diff --git a/sys/mips/adm5120/uart_bus_adm5120.c b/sys/mips/adm5120/uart_bus_adm5120.c
deleted file mode 100644
index 0367ae2fff9..00000000000
--- a/sys/mips/adm5120/uart_bus_adm5120.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/adm5120/adm5120reg.h>
-
-#include "uart_if.h"
-
-static int uart_adm5120_probe(device_t dev);
-
-extern struct uart_class uart_adm5120_uart_class;
-
-static device_method_t uart_adm5120_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_adm5120_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_adm5120_driver = {
-	uart_driver_name,
-	uart_adm5120_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_adm5120_probe(device_t dev)
-{
-	struct uart_softc *sc;
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_adm5120_uart_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-
-	return (uart_bus_probe(dev, 0, 0, 0, 0, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_adm5120_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/adm5120/uart_cpu_adm5120.c b/sys/mips/adm5120/uart_cpu_adm5120.c
deleted file mode 100644
index a9d93500297..00000000000
--- a/sys/mips/adm5120/uart_cpu_adm5120.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/adm5120/adm5120reg.h>
-
-extern struct uart_class uart_adm5120_uart_class;
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-
-	di->ops = uart_getops(&uart_adm5120_uart_class);
-	di->bas.chan = 0;
-	di->bas.bst = mips_bus_space_generic;
-	di->bas.regshft = 0;
-	di->bas.rclk = 0;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = 0;
-	uart_bus_space_mem = mips_bus_space_generic;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_UART0);
-
-	return (0);
-}
diff --git a/sys/mips/adm5120/uart_dev_adm5120.c b/sys/mips/adm5120/uart_dev_adm5120.c
deleted file mode 100644
index d7c8186898d..00000000000
--- a/sys/mips/adm5120/uart_dev_adm5120.c
+++ /dev/null
@@ -1,482 +0,0 @@
-/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * Copyright (c) 2007 Oleksandr Tymoshenko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/adm5120/uart_dev_adm5120.h>
-
-#include "uart_if.h"
-
-/*
- * Low-level UART interface.
- */
-static int adm5120_uart_probe(struct uart_bas *bas);
-static void adm5120_uart_init(struct uart_bas *bas, int, int, int, int);
-static void adm5120_uart_term(struct uart_bas *bas);
-static void adm5120_uart_putc(struct uart_bas *bas, int);
-static int adm5120_uart_rxready(struct uart_bas *bas);
-static int adm5120_uart_getc(struct uart_bas *bas, struct mtx *);
-
-static struct uart_ops uart_adm5120_uart_ops = {
-	.probe = adm5120_uart_probe,
-	.init = adm5120_uart_init,
-	.term = adm5120_uart_term,
-	.putc = adm5120_uart_putc,
-	.rxready = adm5120_uart_rxready,
-	.getc = adm5120_uart_getc,
-};
-
-static int
-adm5120_uart_probe(struct uart_bas *bas)
-{
-
-	return (0);
-}
-
-static void
-adm5120_uart_init(struct uart_bas *bas, int baudrate, int databits, 
-    int stopbits, int parity)
-{
-
-	/* TODO: Set parameters for uart, meanwhile stick with 115200N1 */
-}
-
-static void
-adm5120_uart_term(struct uart_bas *bas)
-{
-
-}
-
-static void
-adm5120_uart_putc(struct uart_bas *bas, int c)
-{
-	char chr;
-	chr = c;
-	while (uart_getreg(bas, UART_FR_REG) & UART_FR_TX_FIFO_FULL)
-		;
-	uart_setreg(bas, UART_DR_REG, c);
-	while (uart_getreg(bas, UART_FR_REG) & UART_FR_BUSY)
-		;
-	uart_barrier(bas);
-}
-
-static int
-adm5120_uart_rxready(struct uart_bas *bas)
-{
-	if (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY)
-		return (0);
-
-	return (1);
-}
-
-static int
-adm5120_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
-{
-	int c;
-
-	uart_lock(hwmtx);
-
-	while (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) {
-		uart_unlock(hwmtx);
-		DELAY(10);
-		uart_lock(hwmtx);
-	}
-
-	c = uart_getreg(bas, UART_DR_REG);
-
-	uart_unlock(hwmtx);
-
-	return (c);
-}
-
-/*
- * High-level UART interface.
- */
-struct adm5120_uart_softc {
-	struct uart_softc base;
-};
-
-static int adm5120_uart_bus_attach(struct uart_softc *);
-static int adm5120_uart_bus_detach(struct uart_softc *);
-static int adm5120_uart_bus_flush(struct uart_softc *, int);
-static int adm5120_uart_bus_getsig(struct uart_softc *);
-static int adm5120_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int adm5120_uart_bus_ipend(struct uart_softc *);
-static int adm5120_uart_bus_param(struct uart_softc *, int, int, int, int);
-static int adm5120_uart_bus_probe(struct uart_softc *);
-static int adm5120_uart_bus_receive(struct uart_softc *);
-static int adm5120_uart_bus_setsig(struct uart_softc *, int);
-static int adm5120_uart_bus_transmit(struct uart_softc *);
-static void adm5120_uart_bus_grab(struct uart_softc *);
-static void adm5120_uart_bus_ungrab(struct uart_softc *);
-
-static kobj_method_t adm5120_uart_methods[] = {
-	KOBJMETHOD(uart_attach,		adm5120_uart_bus_attach),
-	KOBJMETHOD(uart_detach,		adm5120_uart_bus_detach),
-	KOBJMETHOD(uart_flush,		adm5120_uart_bus_flush),
-	KOBJMETHOD(uart_getsig,		adm5120_uart_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		adm5120_uart_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		adm5120_uart_bus_ipend),
-	KOBJMETHOD(uart_param,		adm5120_uart_bus_param),
-	KOBJMETHOD(uart_probe,		adm5120_uart_bus_probe),
-	KOBJMETHOD(uart_receive,	adm5120_uart_bus_receive),
-	KOBJMETHOD(uart_setsig,		adm5120_uart_bus_setsig),
-	KOBJMETHOD(uart_transmit,	adm5120_uart_bus_transmit),
-	KOBJMETHOD(uart_grab,		adm5120_uart_bus_grab),
-	KOBJMETHOD(uart_ungrab,		adm5120_uart_bus_ungrab),
-	{ 0, 0 }
-};
-
-struct uart_class uart_adm5120_uart_class = {
-	"adm5120",
-	adm5120_uart_methods,
-	sizeof(struct adm5120_uart_softc),
-	.uc_ops = &uart_adm5120_uart_ops,
-	.uc_range = 1, /* use hinted range */
-	.uc_rclk = 62500000,
-	.uc_rshift = 0
-};
-
-#define	SIGCHG(c, i, s, d)				\
-	if (c) {					\
-		i |= (i & s) ? s : s | d;		\
-	} else {					\
-		i = (i & s) ? (i & ~s) | d : i;		\
-	}
-
-/*
- * Disable TX interrupt. uart should be locked 
- */ 
-static __inline void
-adm5120_uart_disable_txintr(struct uart_softc *sc)
-{
-	uint8_t cr;
-
-	cr = uart_getreg(&sc->sc_bas, UART_CR_REG);
-	cr &= ~UART_CR_TX_INT_EN;
-	uart_setreg(&sc->sc_bas, UART_CR_REG, cr);
-}
-
-/*
- * Enable TX interrupt. uart should be locked 
- */ 
-static __inline void
-adm5120_uart_enable_txintr(struct uart_softc *sc)
-{
-	uint8_t cr;
-
-	cr = uart_getreg(&sc->sc_bas, UART_CR_REG);
-	cr |= UART_CR_TX_INT_EN;
-	uart_setreg(&sc->sc_bas, UART_CR_REG, cr);
-}
-
-static int
-adm5120_uart_bus_attach(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	struct uart_devinfo *di;
-
-	bas = &sc->sc_bas;
-	if (sc->sc_sysdev != NULL) {
-		di = sc->sc_sysdev;
-		/* TODO: set parameters from di */
-	} else {
-		/* TODO: set parameters 115200, 8N1 */
-	}
-
-	(void)adm5120_uart_bus_getsig(sc);
-
-#if 1
-	/* Enable FIFO */
-	uart_setreg(bas, UART_LCR_H_REG, 
-	    uart_getreg(bas, UART_LCR_H_REG) | UART_LCR_H_FEN);
-#endif
-	/* Enable interrupts */
-	uart_setreg(bas, UART_CR_REG,
-	    UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN|
-	    UART_CR_MODEM_STATUS_INT_EN);
-
-	return (0);
-}
-
-static int
-adm5120_uart_bus_detach(struct uart_softc *sc)
-{
-
-	return (0);
-}
-
-static int
-adm5120_uart_bus_flush(struct uart_softc *sc, int what)
-{
-
-	return (0);
-}
-
-static int
-adm5120_uart_bus_getsig(struct uart_softc *sc)
-{
-	uint32_t new, old, sig;
-	uint8_t bes;
-
-	do {
-		old = sc->sc_hwsig;
-		sig = old;
-		uart_lock(sc->sc_hwmtx);
-		bes = uart_getreg(&sc->sc_bas, UART_FR_REG);
-		uart_unlock(sc->sc_hwmtx);
-		SIGCHG(bes & UART_FR_CTS, sig, SER_CTS, SER_DCTS);
-		SIGCHG(bes & UART_FR_DCD, sig, SER_DCD, SER_DDCD);
-		SIGCHG(bes & UART_FR_DSR, sig, SER_DSR, SER_DDSR);
-		new = sig & ~SER_MASK_DELTA;
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-
-	return (sig);
-}
-
-static int
-adm5120_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
-{
-	struct uart_bas *bas;
-	int baudrate, divisor, error;
-
-	bas = &sc->sc_bas;
-	error = 0;
-	uart_lock(sc->sc_hwmtx);
-	switch (request) {
-	case UART_IOCTL_BREAK:
-		/* TODO: Send BREAK */
-		break;
-	case UART_IOCTL_BAUD:
-		divisor = uart_getreg(bas, UART_LCR_M_REG);
-		divisor = (divisor << 8) | 
-		    uart_getreg(bas, UART_LCR_L_REG);
-		baudrate = bas->rclk / 2 / (divisor + 2);
-		*(int*)data = baudrate;
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-adm5120_uart_bus_ipend(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int ipend;
-	uint8_t ir, fr, rsr;
-
-	bas = &sc->sc_bas;
-	ipend = 0;
-
-	uart_lock(sc->sc_hwmtx);
-	ir = uart_getreg(&sc->sc_bas, UART_IR_REG);
-	fr = uart_getreg(&sc->sc_bas, UART_FR_REG);
-	rsr = uart_getreg(&sc->sc_bas, UART_RSR_REG);
-
-	if (ir & UART_IR_RX_INT)
-		ipend |= SER_INT_RXREADY;
-
-	if (ir & UART_IR_RX_TIMEOUT_INT)
-		ipend |= SER_INT_RXREADY;
-
-	if (ir & UART_IR_MODEM_STATUS_INT)
-		ipend |= SER_INT_SIGCHG;
-
-	if (rsr & UART_RSR_BE)
-		ipend |= SER_INT_BREAK;
-
-	if (rsr & UART_RSR_OE)
-		ipend |= SER_INT_OVERRUN;
-
-	if (fr & UART_FR_TX_FIFO_EMPTY) {
-		if (ir & UART_IR_TX_INT) {
-			adm5120_uart_disable_txintr(sc);
-			ipend |= SER_INT_TXIDLE;
-		}
-	}
-
-	if (ipend)
-		uart_setreg(bas, UART_IR_REG, ir | UART_IR_UICR);
-
-	uart_unlock(sc->sc_hwmtx);
-
-	return (ipend);
-}
-
-static int
-adm5120_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
-    int stopbits, int parity)
-{
-
-	/* TODO: Set parameters for uart, meanwhile stick with 115200 8N1 */
-	return (0);
-}
-
-static int
-adm5120_uart_bus_probe(struct uart_softc *sc)
-{
-	char buf[80];
-	int error;
-	char ch;
-
-	error = adm5120_uart_probe(&sc->sc_bas);
-	if (error)
-		return (error);
-
-	sc->sc_rxfifosz = 16;
-	sc->sc_txfifosz = 16;
-
-	ch = sc->sc_bas.chan + 'A';
-
-	snprintf(buf, sizeof(buf), "adm5120_uart, channel %c", ch);
-	device_set_desc_copy(sc->sc_dev, buf);
-
-	return (0);
-}
-
-static int
-adm5120_uart_bus_receive(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int xc;
-	uint8_t fr, rsr;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	fr = uart_getreg(bas, UART_FR_REG);
-	while (!(fr & UART_FR_RX_FIFO_EMPTY)) {
-		if (uart_rx_full(sc)) {
-			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
-			break;
-		}
-		xc = 0;
-		rsr = uart_getreg(bas, UART_RSR_REG);
-		if (rsr & UART_RSR_FE)
-			xc |= UART_STAT_FRAMERR;
-		if (rsr & UART_RSR_PE)
-			xc |= UART_STAT_PARERR;
-		if (rsr & UART_RSR_OE)
-			xc |= UART_STAT_OVERRUN;
-		xc |= uart_getreg(bas, UART_DR_REG);
-		uart_barrier(bas);
-		uart_rx_put(sc, xc);
-		if (rsr & (UART_RSR_FE | UART_RSR_PE | UART_RSR_OE)) {
-			uart_setreg(bas, UART_ECR_REG, UART_ECR_RSR);
-			uart_barrier(bas);
-		}
-		fr = uart_getreg(bas, UART_FR_REG);
-	}
-
-	/* Discard everything left in the Rx FIFO. */
-	while (!(fr & UART_FR_RX_FIFO_EMPTY)) {
-		( void)uart_getreg(bas, UART_DR_REG);
-		uart_barrier(bas);
-		rsr = uart_getreg(bas, UART_RSR_REG);
-		if (rsr & (UART_RSR_FE | UART_RSR_PE | UART_RSR_OE)) {
-			uart_setreg(bas, UART_ECR_REG, UART_ECR_RSR);
-			uart_barrier(bas);
-		}
-		fr = uart_getreg(bas, UART_FR_REG);
-	}
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-adm5120_uart_bus_setsig(struct uart_softc *sc, int sig)
-{
-
-	/* TODO: implement (?) */
-	return (0);
-}
-
-static int
-adm5120_uart_bus_transmit(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	sc->sc_txbusy = 1;
-	for (int i = 0; i < sc->sc_txdatasz; i++) {
-		if (uart_getreg(bas, UART_FR_REG) & UART_FR_TX_FIFO_FULL) 
-			break;
-		uart_setreg(bas, UART_DR_REG, sc->sc_txbuf[i]);
-	}
-
-	/* Enable TX interrupt */
-	adm5120_uart_enable_txintr(sc);
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static void
-adm5120_uart_bus_grab(struct uart_softc *sc)
-{
-
-	/* Enable interrupts - no RX_INT or RX_TIMEOUT */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(&sc->sc_bas, UART_CR_REG,
-	    UART_CR_PORT_EN | UART_CR_MODEM_STATUS_INT_EN);
-	uart_unlock(sc->sc_hwmtx);
-}
-
-static void
-adm5120_uart_bus_ungrab(struct uart_softc *sc)
-{
-
-	/* Enable interrupts */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(&sc->sc_bas, UART_CR_REG,
-	    UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN|
-	    UART_CR_MODEM_STATUS_INT_EN);
-	uart_unlock(sc->sc_hwmtx);
-}
diff --git a/sys/mips/adm5120/uart_dev_adm5120.h b/sys/mips/adm5120/uart_dev_adm5120.h
deleted file mode 100644
index e63434be360..00000000000
--- a/sys/mips/adm5120/uart_dev_adm5120.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* $NetBSD: uart.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_ADMUART_H
-#define	_ADMUART_H
-/* UART registers */
-#define	UART_DR_REG	0x00
-#define	UART_RSR_REG	0x04
-#define		UART_RSR_FE			0x01
-#define		UART_RSR_PE			0x02
-#define		UART_RSR_BE			0x04
-#define		UART_RSR_OE			0x08
-#define	UART_ECR_REG	0x04
-#define		UART_ECR_RSR			0x80
-#define	UART_LCR_H_REG	0x08
-#define		UART_LCR_H_FEN			0x10
-#define	UART_LCR_M_REG	0x0c
-#define	UART_LCR_L_REG	0x10
-#define	UART_CR_REG	0x14
-#define 	UART_CR_PORT_EN			0x01
-#define 	UART_CR_SIREN			0x02
-#define 	UART_CR_SIRLP			0x04
-#define 	UART_CR_MODEM_STATUS_INT_EN	0x08
-#define 	UART_CR_RX_INT_EN		0x10
-#define 	UART_CR_TX_INT_EN		0x20
-#define 	UART_CR_RX_TIMEOUT_INT_EN	0x40
-#define 	UART_CR_LOOPBACK_EN		0x80
-#define	UART_FR_REG	0x18
-#define		UART_FR_CTS		0x01
-#define		UART_FR_DSR		0x02
-#define		UART_FR_DCD		0x04
-#define		UART_FR_BUSY		0x08
-#define		UART_FR_RX_FIFO_EMPTY	0x10
-#define		UART_FR_TX_FIFO_FULL	0x20
-#define		UART_FR_RX_FIFO_FULL	0x40
-#define		UART_FR_TX_FIFO_EMPTY	0x80
-#define	UART_IR_REG	0x1c
-#define		UART_IR_MODEM_STATUS_INT	0x01
-#define		UART_IR_RX_INT			0x02
-#define		UART_IR_TX_INT			0x04
-#define		UART_IR_RX_TIMEOUT_INT		0x08
-#define		UART_IR_INT_MASK		0x0f
-#define		UART_IR_UICR			0x80
-#define	UART_ILPR_REG	0x20
-
-/* UART interrupts */
-
-int	uart_cnattach(void);
-#endif	/* _ADMUART_H */
diff --git a/sys/mips/alchemy/alchemy_machdep.c b/sys/mips/alchemy/alchemy_machdep.c
deleted file mode 100644
index 14f0845b6ea..00000000000
--- a/sys/mips/alchemy/alchemy_machdep.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-extern int	*edata;
-extern int	*end;
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	int i;
-
-	printf("entry: mips_init()\n");
-
-	bootverbose = 1;
-	realmem = btoc(16 << 20);
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = phys_avail[0];
-	dump_avail[1] = phys_avail[1];
-
-	physmem = realmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
-
-	__asm __volatile("li	$25, 0xbfc00000");
-	__asm __volatile("j	$25");
-}
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	vm_offset_t kernend;
-	uint64_t platform_counter_freq = 175 * 1000 * 1000;
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	cninit();
-	mips_init();
-	/* Set counter_freq for tick_init_params() */
-	platform_counter_freq = 175 * 1000 * 1000;
-
-	mips_timer_init_params(platform_counter_freq, 0);
-}
diff --git a/sys/mips/alchemy/aureg.h b/sys/mips/alchemy/aureg.h
deleted file mode 100644
index f8e181695b0..00000000000
--- a/sys/mips/alchemy/aureg.h
+++ /dev/null
@@ -1,377 +0,0 @@
-/* $NetBSD: aureg.h,v 1.18 2006/10/02 06:44:00 gdamore Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_ALCHEMY_AUREG_H
-#define	_MIPS_ALCHEMY_AUREG_H
-
-/************************************************************************/
-/********************   AC97 Controller registers   *********************/
-/************************************************************************/
-#define	AC97_BASE		0x10000000
-
-/************************************************************************/
-/***********************   USB Host registers   *************************/
-/************************************************************************/
-#define	USBH_BASE		0x10100000
-#define	AU1550_USBH_BASE	0x14020000
-
-#define	USBH_ENABLE		0x7fffc
-#define	USBH_SIZE		0x100000
-
-#define	AU1550_USBH_ENABLE	0x7ffc
-#define AU1550_USBH_SIZE	0x60000
-
-/************************************************************************/
-/**********************   USB Device registers   ************************/
-/************************************************************************/
-#define	USBD_BASE		0x10200000
-
-/************************************************************************/
-/*************************   IRDA registers   ***************************/
-/************************************************************************/
-#define	IRDA_BASE		0x10300000
-
-/************************************************************************/
-/******************   Interrupt Controller registers   ******************/
-/************************************************************************/
-
-#define	IC0_BASE		0x10400000
-#define	IC1_BASE		0x11800000
-
-/*
- * The *_READ registers read the current value of the register
- * The *_SET registers set to 1 all bits that are written 1
- * The *_CLEAR registers clear to zero all bits that are written as 1
- */
-#define	IC_CONFIG0_READ			0x40	/* See table below */
-#define	IC_CONFIG0_SET			0x40
-#define	IC_CONFIG0_CLEAR		0x44
-
-#define	IC_CONFIG1_READ			0x48	/* See table below */
-#define	IC_CONFIG1_SET			0x48
-#define	IC_CONFIG1_CLEAR		0x4c
-
-#define	IC_CONFIG2_READ			0x50	/* See table below */
-#define	IC_CONFIG2_SET			0x50
-#define	IC_CONFIG2_CLEAR		0x54
-
-#define	IC_REQUEST0_INT			0x54	/* Show active interrupts on request 0 */
-
-#define	IC_SOURCE_READ			0x58	/* Interrupt source */
-#define	IC_SOURCE_SET			0x58	/*  0 - test bit used as source */
-#define	IC_SOURCE_CLEAR			0x5c	/*  1 - peripheral/GPIO used as source */
-
-#define	IC_REQUEST1_INT			0x5c	/* Show active interrupts on request 1 */
-
-#define	IC_ASSIGN_REQUEST_READ		0x60	/* Assigns the interrupt to one of the */
-#define	IC_ASSIGN_REQUEST_SET		0x60	/* CPU requests (0 - assign to request 1, */
-#define	IC_ASSIGN_REQUEST_CLEAR		0x64	/* 1 - assign to request 0) */
-
-#define	IC_WAKEUP_READ			0x68	/* Controls whether the interrupt can */
-#define	IC_WAKEUP_SET			0x68	/* cause a wakeup from IDLE */
-#define	IC_WAKEUP_CLEAR			0x6c
-
-#define	IC_MASK_READ			0x70	/* Enables/Disables the interrupt */
-#define	IC_MASK_SET			0x70
-#define	IC_MASK_CLEAR			0x74
-
-#define	IC_RISING_EDGE			0x78	/* Check/clear rising edge */
-
-#define	IC_FALLING_EDGE			0x7c	/* Check/clear falling edge */
-
-#define	IC_TEST_BIT			0x80	/* single bit source select */
-
-/*
- *	Interrupt Configuration Register Functions
- *
- *	Cfg2[n]	Cfg1[n]	Cfg0[n]		Function
- *	   0	   0	   0		Interrupts Disabled
- *	   0	   0	   1		Rising Edge Enabled
- *	   0	   1	   0		Falling Edge Enabled
- *	   0	   1	   1		Rising and Falling Edge Enabled
- *	   1	   0	   0		Interrupts Disabled
- *	   1	   0	   1		High Level Enabled
- *	   1	   1	   0		Low Level Enabled
- *	   1	   1	   1		Both Levels and Both Edges Enabled
- */
-
-/************************************************************************/
-/*************   Programable Serial Controller registers   **************/
-/************************************************************************/
-
-#define	PSC0_BASE		0x11A00000
-#define	PSC1_BASE		0x11B00000
-#define	PSC2_BASE		0x10A00000
-#define	PSC3_BASE		0x10B00000
-
-
-/************************************************************************/
-/**********************   Ethernet MAC registers   **********************/
-/************************************************************************/
-
-#define	MAC0_BASE		0x10500000
-#define	MAC1_BASE		0x10510000
-#define	MACx_SIZE		0x28
-
-#define	AU1500_MAC0_BASE	0x11500000	/* Grr, different on Au1500 */
-#define	AU1500_MAC1_BASE	0x11510000	/* Grr, different on Au1500 */
-
-#define	MAC0_ENABLE		0x10520000
-#define	MAC1_ENABLE		0x10520004
-#define	MACENx_SIZE		0x04
-
-#define	AU1500_MAC0_ENABLE	0x11520000	/* Grr, different on Au1500 */
-#define	AU1500_MAC1_ENABLE	0x11520004	/* Grr, different on Au1500 */
-
-#define	MAC0_DMA_BASE		0x14004000
-#define	MAC1_DMA_BASE		0x14004200
-#define	MACx_DMA_SIZE		0x140
-
-/************************************************************************/
-/**********************   Static Bus registers   ************************/
-/************************************************************************/
-#define	STATIC_BUS_BASE		0x14001000
-
-/************************************************************************/
-/********************   Secure Digital registers   **********************/
-/************************************************************************/
-#define	SD0_BASE		0x10600000
-#define	SD1_BASE		0x10680000
-
-/************************************************************************/
-/*************************   I^2S registers   ***************************/
-/************************************************************************/
-#define	I2S_BASE		0x11000000
-
-/************************************************************************/
-/**************************   UART registers   **************************/
-/************************************************************************/
-
-#define	UART0_BASE		0x11100000
-#define	UART1_BASE		0x11200000
-#define	UART2_BASE		0x11300000
-#define	UART3_BASE		0x11400000
-
-/************************************************************************/
-/*************************   SSI registers   ****************************/
-/************************************************************************/
-#define	SSI0_BASE		0x11600000
-#define	SSI1_BASE		0x11680000
-
-/************************************************************************/
-/************************   GPIO2 registers   ***************************/
-/************************************************************************/
-#define	GPIO_BASE		0x11900100
-
-/************************************************************************/
-/************************   GPIO2 registers   ***************************/
-/************************************************************************/
-#define	GPIO2_BASE		0x11700000
-
-/************************************************************************/
-/*************************   PCI registers   ****************************/
-/************************************************************************/
-#define	PCI_BASE		0x14005000
-#define	PCI_HEADER		0x14005100
-#define	PCI_MEM_BASE		0x400000000ULL
-#define	PCI_IO_BASE		0x500000000ULL
-#define	PCI_CONFIG_BASE		0x600000000ULL
-
-/************************************************************************/
-/***********************   PCMCIA registers   ***************************/
-/************************************************************************/
-#define	PCMCIA_BASE		0xF00000000ULL
-
-/************************************************************************/
-/******************   Programmable Counter registers   ******************/
-/************************************************************************/
-
-#define	SYS_BASE		0x11900000
-
-#define	PC_BASE			SYS_BASE
-
-#define	PC_TRIM0		0x00		/* PC0 Divide (16 bits) */
-#define	PC_COUNTER_WRITE0	0x04		/* set PC0 */
-#define	PC_MATCH0_0		0x08		/* match counter & interrupt */
-#define	PC_MATCH1_0		0x0c		/* match counter & interrupt */
-#define	PC_MATCH2_0		0x10		/* match counter & interrupt */
-#define	PC_COUNTER_CONTROL	0x14		/* Programmable Counter Control */
-#define	  CC_E1S		  0x00800000	/* Enable PC1 write status */
-#define	  CC_T1S		  0x00100000	/* Trim PC1 write status */
-#define	  CC_M21		  0x00080000	/* Match 2 of PC1 write status */
-#define	  CC_M11		  0x00040000	/* Match 1 of PC1 write status */
-#define	  CC_M01		  0x00020000	/* Match 0 of PC1 write status */
-#define	  CC_C1S		  0x00010000	/* PC1 write status */
-#define	  CC_BP			  0x00004000	/* Bypass OSC (use GPIO1) */
-#define	  CC_EN1		  0x00002000	/* Enable PC1 */
-#define	  CC_BT1		  0x00001000	/* Bypass Trim on PC1 */
-#define	  CC_EN0		  0x00000800	/* Enable PC0 */
-#define	  CC_BT0		  0x00000400	/* Bypass Trim on PC0 */
-#define	  CC_EO			  0x00000100	/* Enable Oscillator */
-#define	  CC_E0S		  0x00000080	/* Enable PC0 write status */
-#define	  CC_32S		  0x00000020	/* 32.768kHz OSC status */
-#define	  CC_T0S		  0x00000010	/* Trim PC0 write status */
-#define	  CC_M20		  0x00000008	/* Match 2 of PC0 write status */
-#define	  CC_M10		  0x00000004	/* Match 1 of PC0 write status */
-#define	  CC_M00		  0x00000002	/* Match 0 of PC0 write status */
-#define	  CC_C0S		  0x00000001	/* PC0 write status */
-#define	PC_COUNTER_READ_0	0x40		/* get PC0 */
-#define	PC_TRIM1		0x44		/* PC1 Divide (16 bits) */
-#define	PC_COUNTER_WRITE1	0x48		/* set PC1 */
-#define	PC_MATCH0_1		0x4c		/* match counter & interrupt */
-#define	PC_MATCH1_1		0x50		/* match counter & interrupt */
-#define	PC_MATCH2_1		0x54		/* match counter & interrupt */
-#define	PC_COUNTER_READ_1	0x58		/* get PC1 */
-
-#define	PC_SIZE			0x5c		/* size of register set */
-#define	PC_RATE			32768		/* counter rate is 32.768kHz */
-
-/************************************************************************/
-/*******************   Frequency Generator Registers   ******************/
-/************************************************************************/
-
-#define SYS_FREQCTRL0		(SYS_BASE + 0x20)
-#define SFC_FRDIV2(f)		(f<<22)		/* 29:22. Freq Divider 2 */
-#define SFC_FE2			(1<<21)		/* Freq generator output enable 2 */
-#define SFC_FS2			(1<<20)		/* Freq generator source 2 */
-#define SFC_FRDIV1(f)		(f<<12)		/* 19:12. Freq Divider 1 */
-#define SFC_FE1			(1<<11)		/* Freq generator output enable 1 */
-#define SFC_FS1			(1<<10)		/* Freq generator source 1 */
-#define SFC_FRDIV0(f)		(f<<2)		/* 9:2. Freq Divider 0 */
-#define SFC_FE0			2		/* Freq generator output enable 0 */
-#define SFC_FS0			1		/* Freq generator source 0 */
-
-#define SYS_FREQCTRL1		(SYS_BASE + 0x24)
-#define SFC_FRDIV5(f)		(f<<22)		/* 29:22. Freq Divider 5 */
-#define SFC_FE5			(1<<21)		/* Freq generator output enable 5 */
-#define SFC_FS5			(1<<20)		/* Freq generator source 5 */
-#define SFC_FRDIV4(f)		(f<<12)		/* 19:12. Freq Divider 4 */
-#define SFC_FE4			(1<<11)		/* Freq generator output enable 4 */
-#define SFC_FS4			(1<<10)		/* Freq generator source 4 */
-#define SFC_FRDIV3(f)		(f<<2)		/* 9:2. Freq Divider 3 */
-#define SFC_FE3			2		/* Freq generator output enable 3 */
-#define SFC_FS3			1		/* Freq generator source 3 */
-
-/************************************************************************/
-/******************   Clock Source Control Registers   ******************/
-/************************************************************************/
-
-#define SYS_CLKSRC		(SYS_BASE + 0x28)
-#define  SCS_ME1(n)		(n<<27)		/* EXTCLK1 Clock Mux input select */
-#define  SCS_ME0(n)		(n<<22)		/* EXTCLK0 Clock Mux input select */
-#define  SCS_MPC(n)		(n<<17)		/* PCI clock mux input select */
-#define  SCS_MUH(n)		(n<<12)		/* USB Host clock mux input select */
-#define  SCS_MUD(n)		(n<<7)		/* USB Device clock mux input select */
-#define   SCS_MEx_AUX		0x1		/* Aux clock */
-#define   SCS_MEx_FREQ0		0x2		/* FREQ0 */
-#define   SCS_MEx_FREQ1		0x3		/* FREQ1 */
-#define   SCS_MEx_FREQ2		0x4		/* FREQ2 */
-#define   SCS_MEx_FREQ3		0x5		/* FREQ3 */
-#define   SCS_MEx_FREQ4		0x6		/* FREQ4 */
-#define   SCS_MEx_FREQ5		0x7		/* FREQ5 */
-#define  SCS_DE1		(1<<26)		/* EXTCLK1 clock divider select */
-#define  SCS_CE1		(1<<25)		/* EXTCLK1 clock select */
-#define  SCS_DE0		(1<<21)		/* EXTCLK0 clock divider select */
-#define  SCS_CE0		(1<<20)		/* EXTCLK0 clock select */
-#define  SCS_DPC		(1<<16)		/* PCI clock divider select */
-#define  SCS_CPC		(1<<15)		/* PCI clock select */
-#define  SCS_DUH		(1<<11)		/* USB Host clock divider select */
-#define  SCS_CUH		(1<<10)		/* USB Host clock select */
-#define  SCS_DUD		(1<<6)		/* USB Device clock divider select */
-#define  SCS_CUD		(1<<5)		/* USB Device clock select */
-/*
- * Au1550 bits, needed for PSCs. Note that some bits collide with
- * earlier parts.  On Au1550, USB clocks (both device and host) are
- * shared with PSC2, and must be configured for 48MHz.  DBAU1550 YAMON
- * does this by default.  Also, EXTCLK0 is shared with PSC3.  DBAU1550
- * YAMON does not configure any clocks besides PSC2.
- */
-#define  SCS_MP3(n)		(n<<22)		/* psc3_intclock mux */
-#define	 SCS_DP3		(1<<21)		/* psc3_intclock divider */
-#define	 SCS_CP3		(1<<20)		/* psc3_intclock select */
-#define  SCS_MP1(n)		(n<<12)		/* psc1_intclock mux */
-#define	 SCS_DP1		(1<<11)		/* psc1_intclock divider */
-#define	 SCS_CP1		(1<<10)		/* psc1_intclock select */
-#define	 SCS_MP0(n)		(n<<7)		/* psc0_intclock mux */
-#define  SCS_DP0		(1<<6)		/* psc0_intclock divider */
-#define	 SCS_CP0		(1<<5)		/* psc0_intclock seelct */
-#define	 SCS_MP2(n)		(n<<2)		/* psc2_intclock mux */
-#define	 SCS_DP2		(1<<1)		/* psc2_intclock divider */
-#define	 SCS_CP2		(1<<0)		/* psc2_intclock select */
-
-/************************************************************************/
-/***************************  PIN Function  *****************************/
-/************************************************************************/
-
-#define	SYS_PINFUNC		(SYS_BASE + 0x2c)
-#define	 SPF_PSC3_MASK		(7<<20)
-#define	 SPF_PSC3_AC97		(0<<17)		/* select AC97/SPI */
-#define	 SPF_PSC3_I2S		(1<<17)		/* select I2S */
-#define	 SPF_PSC3_SMBUS		(3<<17)		/* select SMbus */
-#define	 SPF_PSC3_GPIO		(7<<17)		/* select gpio215:211 */
-#define  SPF_PSC2_MASK		(7<<17)
-#define	 SPF_PSC2_AC97		(0<<17)		/* select AC97/SPI */
-#define	 SPF_PSC2_I2S		(1<<17)		/* select I2S */
-#define	 SPF_PSC2_SMBUS		(3<<17)		/* select SMbus */
-#define	 SPF_PSC2_GPIO		(7<<17)		/* select gpio210:206*/
-#define	 SPF_CS			(1<<16)		/* extclk0 or 32kHz osc */
-#define	 SPF_USB		(1<<15)		/* host or device usb otg */
-#define	 SPF_U3T		(1<<14)		/* uart3 tx or gpio23 */
-#define	 SPF_U1R		(1<<13)		/* uart1 rx or gpio22 */
-#define	 SPF_U1T		(1<<12)		/* uart1 tx or gpio21 */
-#define	 SPF_EX1		(1<<10)		/* gpio3 or extclk1 */
-#define	 SPF_EX0		(1<<9)		/* gpio2 or extclk0/32kHz osc*/
-#define	 SPF_U3			(1<<7)		/* gpio14:9 or uart3 */
-#define	 SPF_MBSa		(1<<5)		/* must be set */
-#define	 SPF_NI2		(1<<4)		/* enet1 or gpio28:24 */
-#define	 SPF_U0			(1<<3)		/* uart0 or gpio20 */
-#define	 SPF_MBSb		(1<<2)		/* must be set */
-#define	 SPF_S1			(1<<1)		/* gpio17 or psc1_sync1 */
-#define	 SPF_S0			(1<<0)		/* gpio16 or psc0_sync1 */
-
-/************************************************************************/
-/***************************   PLL Control  *****************************/
-/************************************************************************/
-
-#define SYS_CPUPLL		(SYS_BASE + 0x60)
-#define SYS_AUXPLL              (SYS_BASE + 0x64)
-
-#endif	/* _MIPS_ALCHEMY_AUREG_H */
diff --git a/sys/mips/alchemy/files.alchemy b/sys/mips/alchemy/files.alchemy
deleted file mode 100644
index 240869cdcbb..00000000000
--- a/sys/mips/alchemy/files.alchemy
+++ /dev/null
@@ -1,9 +0,0 @@
-# $FreeBSD$
-# Alchmy on-board devices
-# mips/alchemy/console.c		standard
-mips/alchemy/alchemy_machdep.c	standard
-mips/alchemy/obio.c		standard
-mips/alchemy/uart_bus_alchemy.c	optional uart
-mips/alchemy/uart_cpu_alchemy.c	optional uart
-mips/mips/intr_machdep.c        standard
-mips/mips/tick.c		standard
diff --git a/sys/mips/alchemy/obio.c b/sys/mips/alchemy/obio.c
deleted file mode 100644
index 924cb08907d..00000000000
--- a/sys/mips/alchemy/obio.c
+++ /dev/null
@@ -1,534 +0,0 @@
-/*	$NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/adm5120/adm5120reg.h>
-#include <mips/adm5120/obiovar.h>
-
-/* MIPS HW interrupts of IRQ/FIQ respectively */
-#define ADM5120_INTR		0
-#define ADM5120_FAST_INTR	1
-
-/* Interrupt levels */
-#define INTR_IRQ 0
-#define INTR_FIQ 1
-
-int irq_priorities[NIRQS] = {
-	INTR_IRQ,	/* flash */
-	INTR_FIQ,	/* uart0 */
-	INTR_FIQ,	/* uart1 */
-	INTR_IRQ,	/* ahci  */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* admsw */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-};
-
-
-#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(ADM5120_BASE_ICU + (o)))
-#define REG_WRITE(o,v) (REG_READ(o)) = (v)
-
-static int	obio_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	obio_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		obio_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	obio_attach(device_t);
-static int	obio_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		obio_get_resource_list(device_t, device_t);
-static void	obio_hinted_child(device_t, const char *, int);
-static int	obio_intr(void *);
-static int	obio_probe(device_t);
-static int	obio_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	obio_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	obio_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-
-static void 
-obio_mask_irq(void *arg)
-{
-  /* XXX need to write */
-#if 0
-	unsigned int irq = (unsigned int)arg;
-	int ip_bit, mask, mask_register;
-
-	/* mask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask | ip_bit);
-#endif
-}
-
-static void 
-obio_unmask_irq(void *arg)
-{
-  /* XXX need to write */
-#if 0
-	unsigned int irq = (unsigned int)arg;
-	int ip_bit, mask, mask_register;
-
-	/* unmask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask & ~ip_bit);
-#endif
-}
-
-static int
-obio_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->oba_mem_rman.rm_type = RMAN_ARRAY;
-	sc->oba_mem_rman.rm_descr = "OBIO memeory";
-	if (rman_init(&sc->oba_mem_rman) != 0 ||
-	    rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START,
-	        OBIO_MEM_START + OBIO_MEM_SIZE) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, 0, NIRQS-1) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    ADM5120_INTR, ADM5120_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, obio_intr, NULL,
-	    sc, &sc->sc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* Hook up our FAST interrupt handler. */
-	if ((sc->sc_fast_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    ADM5120_FAST_INTR, ADM5120_FAST_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_fast_irq, INTR_TYPE_MISC, obio_intr,
-	    NULL, sc, &sc->sc_fast_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* disable all interrupts */
-	REG_WRITE(ICU_ENABLE_REG, ICU_INT_MASK);
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct obio_softc		*sc = device_get_softc(bus);
-	struct obio_ivar		*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1);
-	needactivate = flags & RF_ACTIVE;
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL)
-			return (NULL);
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->oba_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/*
-	 * If this is a memory resource, track the direct mapping
-	 * in the uncached MIPS KSEG1 segment.
-	 */
-	if (type == SYS_RES_MEMORY) {
-		void *vaddr;
-
-		vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
-		rman_set_virtual(r, vaddr);
-		rman_set_bustag(r, mips_bus_space_generic);
-		rman_set_bushandle(r, (bus_space_handle_t)vaddr);
-	}
-
-	return (rman_activate_resource(r));
-}
-
-static int
-obio_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-obio_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = obio_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-obio_setup_intr(device_t dev, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, error, priority;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    obio_mask_irq, obio_unmask_irq,
-		    NULL, NULL,
-		    "obio intr%d:", irq);
-
-		sc->sc_eventstab[irq] = event;
-	}
-	else
-		panic("obio: Can't share IRQs");
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	irqmask = 1 << irq;
-	priority = irq_priorities[irq];
-
-	if (priority == INTR_FIQ)
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask);
-	else
-		REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask);
-
-	/* enable */
-	REG_WRITE(ICU_ENABLE_REG, irqmask);
-
-	return (0);
-}
-
-static int
-obio_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int irq, result;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	irqmask = 1 << irq;     /* only used as a mask from here on */
-
-	/* disable this irq in HW */
-	REG_WRITE(ICU_DISABLE_REG, irqmask);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result) {
-		sc->sc_eventstab[irq] = NULL;
-	}
-
-	return (result);
-}
-
-static int
-obio_intr(void *arg)
-{
-	struct obio_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t irqstat;
-	int irq;
-
-	irqstat = REG_READ(ICU_FIQ_STATUS_REG);
-	irqstat |= REG_READ(ICU_STATUS_REG);
-
-	irq = 0;
-	while (irqstat != 0) {
-		if ((irqstat & 1) == 1) {
-			event = sc->sc_eventstab[irq];
-			if (!event || TAILQ_EMPTY(&event->ie_handlers))
-				continue;
-
-			/* TODO: pass frame as an argument*/
-			/* TODO: log stray interrupt */
-			intr_event_handle(event, NULL);
-		}
-
-		irq++;
-		irqstat >>= 1;
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-obio_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t		child;
-	long			maddr;
-	int			msize;
-	int			irq;
-	int			result;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	resource_long_value(dname, dunit, "maddr", &maddr);
-	resource_int_value(dname, dunit, "msize", &msize);
-
-
-	result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-	    maddr, msize);
-	if (result != 0)
-		device_printf(bus, "warning: bus_set_resource() failed\n");
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static device_t
-obio_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct obio_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-obio_get_resource_list(device_t dev, device_t child)
-{
-	struct obio_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-static device_method_t obio_methods[] = {
-	DEVMETHOD(bus_activate_resource,	obio_activate_resource),
-	DEVMETHOD(bus_add_child,		obio_add_child),
-	DEVMETHOD(bus_alloc_resource,		obio_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	obio_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	obio_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		obio_hinted_child),
-	DEVMETHOD(bus_release_resource,		obio_release_resource),
-	DEVMETHOD(bus_setup_intr,		obio_setup_intr),
-	DEVMETHOD(bus_teardown_intr,		obio_teardown_intr),
-	DEVMETHOD(device_attach,		obio_attach),
-	DEVMETHOD(device_probe,			obio_probe),
-        DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-        DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/alchemy/std.alchemy b/sys/mips/alchemy/std.alchemy
deleted file mode 100644
index 1b8b83b17f3..00000000000
--- a/sys/mips/alchemy/std.alchemy
+++ /dev/null
@@ -1,8 +0,0 @@
-# $FreeBSD$
-# Standard include file for Alchemy Au1xxx CPUs: 
-# Au1000, Au1200, Au1250, Au1500 and Au1550
-
-files	"../alchemy/files.alchemy"
-
-machine		mips mipsel
-cpu		CPU_MIPS4KC
diff --git a/sys/mips/alchemy/uart_bus_alchemy.c b/sys/mips/alchemy/uart_bus_alchemy.c
deleted file mode 100644
index c85aeb1649d..00000000000
--- a/sys/mips/alchemy/uart_bus_alchemy.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/alchemy/aureg.h>
-
-#include "uart_if.h"
-
-static int uart_alchemy_probe(device_t dev);
-
-static device_method_t uart_alchemy_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_alchemy_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_alchemy_driver = {
-	uart_driver_name,
-	uart_alchemy_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_alchemy_probe(device_t dev)
-{
-	struct uart_softc *sc;
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-
-	return (uart_bus_probe(dev, 0, 0, 0, 0, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_alchemy_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/alchemy/uart_cpu_alchemy.c b/sys/mips/alchemy/uart_cpu_alchemy.c
deleted file mode 100644
index 7ef3ec6f8fc..00000000000
--- a/sys/mips/alchemy/uart_cpu_alchemy.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/alchemy/aureg.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = mips_bus_space_generic;
-	di->bas.regshft = 0;
-	di->bas.rclk = 0;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = 0;
-	uart_bus_space_mem = mips_bus_space_generic;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART0_BASE);
-
-	return (0);
-}
diff --git a/sys/mips/conf/ADM5120 b/sys/mips/conf/ADM5120
deleted file mode 100644
index 7990e56f8cc..00000000000
--- a/sys/mips/conf/ADM5120
+++ /dev/null
@@ -1,65 +0,0 @@
-# ADM5120 -- Kernel configuration file for FreeBSD/mips for adm5120 systems
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		ADM5120
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-include		"../adm5120/std.adm5120"
-
-hints		"ADM5120.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-#options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options 	BOOTP
-options 	BOOTP_NFSROOT
-options 	BOOTP_NFSV3
-options 	BOOTP_WIRED_TO=admsw0
-options 	BOOTP_COMPAT
-
-#options 	FFS			#Berkeley Fast Filesystem
-#options 	SOFTUPDATES		#Enable FFS soft updates support
-#options 	UFS_ACL			#Support for access control lists
-#options 	UFS_DIRHASH		#Improve performance on big directories
-options 	ROOTDEVNAME=\"nfs:10.0.0.1:/mnt/bsd\"
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-device		loop
-device		ether
-device		uart
-nodevice	uart_ns8250		# ADM5120's UART not 16550-like
-# device		md
diff --git a/sys/mips/conf/ALCHEMY b/sys/mips/conf/ALCHEMY
deleted file mode 100644
index 6bfe23865b8..00000000000
--- a/sys/mips/conf/ALCHEMY
+++ /dev/null
@@ -1,65 +0,0 @@
-# ALCHEMY -- Generic kernel for Alchemy Au1xxx CPUs.
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		ALCHEMY
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-include		"../alchemy/std.alchemy"
-
-#hints		"ALCHEMY.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-# options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options BOOTP
-options BOOTP_NFSROOT
-options BOOTP_NFSV3
-options BOOTP_WIRED_TO=admsw0
-options BOOTP_COMPAT
-
-# options         FFS                     #Berkeley Fast Filesystem
-# options         SOFTUPDATES             #Enable FFS soft updates support
-# options         UFS_ACL                 #Support for access control lists
-# options         UFS_DIRHASH             #Improve performance on big directories
-options 	ROOTDEVNAME=\"nfs:10.0.0.1:/mnt/bsd\"
-
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-device		loop
-device		ether
-device		uart
-# device		md
diff --git a/sys/mips/conf/IDT b/sys/mips/conf/IDT
deleted file mode 100644
index a258cdba0cd..00000000000
--- a/sys/mips/conf/IDT
+++ /dev/null
@@ -1,55 +0,0 @@
-# $FreeBSD$
-
-cpu		CPU_MIPS4KC
-ident		RB532
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-include		"../idt/std.idt"
-hints		"IDT.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-
-options 	BOOTP
-options 	BOOTP_NFSROOT
-options 	BOOTP_NFSV3
-options 	BOOTP_WIRED_TO=kr0
-options 	BOOTP_COMPAT
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-
-device		loop
-device		pci
-device		ether
-device		miibus
-device		vr
-device		kr
-device		uart
-device		md
-
-# Wireless NIC cards
-device		wlan		# 802.11 support
-device		wlan_wep	# 802.11 WEP support
-device		wlan_tkip	# 802.11 TKIP support
-device		ath		# Atheros NIC's
-device		ath_pci		# Atheros pci/cardbus glue
-device		ath_hal		# pci/cardbus chip support
-options 	AH_SUPPORT_AR5416	# enable AR5416 tx/rx descriptors
-device		ath_rate_sample	# SampleRate tx rate control for ath
-options 	ATH_DEBUG
-
-device		bpf
diff --git a/sys/mips/conf/MT7620 b/sys/mips/conf/MT7620
deleted file mode 100644
index 6d34a55d55d..00000000000
--- a/sys/mips/conf/MT7620
+++ /dev/null
@@ -1,150 +0,0 @@
-# MT7620 -- Kernel configuration file for FreeBSD/mips for Ralink MT7620 systems
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		MT7620
-
-machine		mips mipsel
-makeoptions	MIPS_LITTLE_ENDIAN=defined
-makeoptions	KERNLOADADDR=0x80010000
-
-# Don't build any modules yet.
-#makeoptions	MODULES_OVERRIDE="wlan_xauth wlan_wep wlan_tkip wlan_acl wlan_amrr wlan_ccmp wlan_rssadapt if_bridge bridgestp msdosfs md ipfw dummynet libalias geom/geom_label ufs usb/uplcom usb/u3g usb/umodem usb/umass usb/ucom cam zlib"
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	MT7620
-
-include		"../rt305x/std.rt305x"
-
-hints		"MT7620.hints"		#Default places to look for devices.
-
-#makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options		MT7620
-options		RT305X_UBOOT
-
-# Debugging for use in -current
-options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-options 	WITNESS			#Enable checks to detect deadlocks and cycles
-options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options         DIAGNOSTIC
-#options     DEBUG_LOCKS
-#options     DEBUG_VFS_LOCKS
-#options 	GDB
-options 	DDB
-options 	KDB
-
-options 	SCHED_ULE
-#options 	SCHED_4BSD		#4BSD scheduler
-#options 	COMPAT_43
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-#options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-#options 	BOOTP
-#options 	BOOTP_NFSROOT
-#options 	BOOTP_NFSV3
-#options 	BOOTP_WIRED_TO=rt0
-#options 	BOOTP_COMPAT
-#options 	CD9660			# ISO 9660 Filesystem
-#options 	ROOTDEVNAME=\"cd9660:/dev/map/rootfs.uzip\"
-#options 	TMPFS			# TMP Memory Filesystem
-
-options 	FFS			#Berkeley Fast Filesystem
-#options 	SOFTUPDATES		#Enable FFS soft updates support
-#options 	UFS_ACL			#Support for access control lists
-#options 	UFS_DIRHASH		#Improve performance on big directories
-#options 	ROOTDEVNAME=\"nfs:10.0.0.1:/mnt/bsd\"
-
-# Options for making kernel less hangry
-#makeoptions	INLINE_LIMIT=1024
-#options 	MAXUSERS=3
-#options 	MAXFILES=512
-#options 	NSFBUFS=256
-#options 	SHMALL=128
-#options 	MSGBUF_SIZE=65536
-
-# Options for making kernel smallest 
-#options 	NO_SYSCTL_DESCR		# No description string of sysctl
-#options 	NO_FFS_SNAPSHOT		# Disable Snapshot supporting
-#options 	SCSI_NO_SENSE_STRINGS
-#options 	SCSI_NO_OP_STRINGS
-#options 	RWLOCK_NOINLINE
-#options 	SX_NOINLINE
-#options 	NO_SWAPPING
-options         MROUTING                # Multicast routing
-options 	IPFIREWALL_DEFAULT_TO_ACCEPT
-
-options		GEOM_UZIP
-options		MD_ROOT
-options		ROOTDEVNAME=\"ufs:da0s1\"
-
-device		md
-
-device		random
-device		loop
-# RT3050F, RT3052F have only pseudo PHYs, so mii not required
-device		rt
-
-device		spibus
-device		mx25l
-
-device		ether
-device		miibus
-device 		bpf			# Berkeley packet filter
-device		vlan
-device		lagg
-device          if_bridge
-device		uart
-nodevice	uart_ns8250
-#device 		tun			# Packet tunnel.
-
-#device		wlan
-
-
-#device		gpio
-#device		gpioled
-
-#device		cfi			# Detect Flash memmory
-#device		cfid
-
-#device		nvram2env
-
-device		usb
-device		ehci
-#device		ohci
-#device		dwcotg			# DWC like USB OTG Controller driver
-#device		u3g
-#device		umodem
-#device		uplcom
-device		cdce
-device		umass
-device		da
-device		pass
-device		scbus
-options 	SCSI_DELAY=1000		# Delay (in ms) before probing SCSI
-
-#options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-#options 	USB_DEBUG
-#options 	USB_REQ_DEBUG
-
-device		pci
diff --git a/sys/mips/conf/QEMU b/sys/mips/conf/QEMU
deleted file mode 100644
index ca46c22641b..00000000000
--- a/sys/mips/conf/QEMU
+++ /dev/null
@@ -1,56 +0,0 @@
-# QEMU -- Generic kernel configuration file for FreeBSD/mips
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-cpu		CPU_MIPS32
-ident		QEMU
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-include		"../adm5120/std.adm5120"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	VIMAGE			# Subsystem virtualization, e.g. VNET
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-#options 	INVARIANTS		#Enable calls of extra sanity checking
-#options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-# The `bpf' device enables the Berkeley Packet Filter.
-# Be aware of the administrative consequences of enabling this!
-# Note that 'bpf' is required for DHCP.
-device		bpf			# Berkeley packet filter
-
-device		loop
-device		ether
-device		md
diff --git a/sys/mips/conf/RT305X b/sys/mips/conf/RT305X
deleted file mode 100644
index b49857cc8ea..00000000000
--- a/sys/mips/conf/RT305X
+++ /dev/null
@@ -1,136 +0,0 @@
-# RT305X -- Kernel configuration file for FreeBSD/mips for Ralink RT305xF systems
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		RT305X
-
-machine		mips mipsel
-makeoptions	MIPS_LITTLE_ENDIAN=defined
-makeoptions	KERNLOADADDR=0x80001000
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE="wlan_xauth wlan_wep wlan_tkip wlan_acl wlan_amrr wlan_ccmp wlan_rssadapt if_bridge bridgestp msdosfs md ipfw dummynet libalias geom/geom_label ufs usb/uplcom usb/u3g usb/umodem usb/umass usb/ucom cam zlib"
-makeoptions	RT3052F
-
-include		"../rt305x/std.rt305x"
-
-hints		"RT305X.hints"		#Default places to look for devices.
-
-#makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options		RT3052F
-options		RT305X_UBOOT
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-#options 	INVARIANTS		#Enable calls of extra sanity checking
-#options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options         DIAGNOSTIC
-#options     DEBUG_LOCKS
-#options     DEBUG_VFS_LOCKS
-#options 	GDB
-options 	DDB
-options 	KDB
-
-options 	SCHED_ULE
-#options 	SCHED_4BSD		#4BSD scheduler
-#options 	COMPAT_43
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-#options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options 	BOOTP
-#options 	BOOTP_NFSROOT
-options 	BOOTP_NFSV3
-options 	BOOTP_WIRED_TO=rt0
-options 	BOOTP_COMPAT
-options 	CD9660			# ISO 9660 Filesystem
-options 	ROOTDEVNAME=\"cd9660:/dev/map/rootfs.uzip\"
-options 	TMPFS			# TMP Memory Filesystem
-
-#options 	FFS			#Berkeley Fast Filesystem
-#options 	SOFTUPDATES		#Enable FFS soft updates support
-#options 	UFS_ACL			#Support for access control lists
-#options 	UFS_DIRHASH		#Improve performance on big directories
-#options 	ROOTDEVNAME=\"nfs:10.0.0.1:/mnt/bsd\"
-
-# Options for making kernel less hangry
-makeoptions	INLINE_LIMIT=1024
-options 	MAXUSERS=3
-options 	MAXFILES=512
-options 	NSFBUFS=256
-options 	SHMALL=128
-options 	MSGBUF_SIZE=65536
-
-# Options for making kernel smallest 
-options 	NO_SYSCTL_DESCR		# No description string of sysctl
-#options 	NO_FFS_SNAPSHOT		# Disable Snapshot supporting
-options 	SCSI_NO_SENSE_STRINGS
-options 	SCSI_NO_OP_STRINGS
-options 	RWLOCK_NOINLINE
-options 	SX_NOINLINE
-options 	NO_SWAPPING
-options         MROUTING                # Multicast routing
-options 	IPFIREWALL_DEFAULT_TO_ACCEPT
-
-device		random
-device		loop
-# RT3050F, RT3052F have only pseudo PHYs, so mii not required
-device		rt
-
-device		ether
-device 		bpf			# Berkeley packet filter
-device		vlan
-#device		lagg
-#device          if_bridge
-device		uart
-nodevice	uart_ns8250
-device 		tun			# Packet tunnel.
-
-device		wlan
-
-
-device		gpio
-device		gpioled
-
-device		cfi			# Detect Flash memmory
-device		cfid
-
-device		nvram2env
-
-device		usb
-#device		dwcotg			# DWC like USB OTG Controller driver
-#device		u3g
-#device		umodem
-#device		uplcom
-#device		umass
-#device		da
-#device		pass
-#device		scbus
-options 	SCSI_DELAY=1000		# Delay (in ms) before probing SCSI
-
-#options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-#options 	USB_DEBUG
-#options 	USB_REQ_DEBUG
-
-
diff --git a/sys/mips/conf/RT5350 b/sys/mips/conf/RT5350
deleted file mode 100644
index 0775f6e0435..00000000000
--- a/sys/mips/conf/RT5350
+++ /dev/null
@@ -1,126 +0,0 @@
-# RT5350 -- Kernel configuration file for FreeBSD/mips for Ralink RT5350 systems
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		RT5350
-
-machine		mips mipsel
-makeoptions	MIPS_LITTLE_ENDIAN=defined
-makeoptions	KERNLOADADDR=0x80001000
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE="wlan_xauth wlan_wep wlan_tkip wlan_acl wlan_amrr wlan_ccmp wlan_rssadapt if_bridge bridgestp msdosfs md ipfw dummynet libalias geom/geom_label ufs usb/uplcom usb/u3g usb/umodem usb/umass usb/ucom cam zlib"
-makeoptions	RT5350
-
-include		"../rt305x/std.rt305x"
-
-hints		"RT5350.hints"		#Default places to look for devices.
-
-#makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options		RT5350
-options		RT305X_UBOOT
-
-# Debugging for use in -current
-options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-options 	WITNESS			#Enable checks to detect deadlocks and cycles
-options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options         DIAGNOSTIC
-#options     DEBUG_LOCKS
-#options     DEBUG_VFS_LOCKS
-#options 	GDB
-options 	DDB
-options 	KDB
-
-options 	SCHED_ULE
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-#options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-#options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-#options		BOOTP
-#options		BOOTP_NFSROOT
-#options		BOOTP_NFSV3
-#options		BOOTP_WIRED_TO=rt0
-#options		BOOTP_COMPAT
-
-options 	TMPFS			# TMP Memory Filesystem
-
-options 	FFS			#Berkeley Fast Filesystem
-#options		ROOTDEVNAME=\"nfs:193.178.153.200:/bsdmips\"
-
-#device		geom_uzip
-#options		GEOM_UZIP
-#options		MD_ROOT
-#options		ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Options for making kernel less hangry
-makeoptions	INLINE_LIMIT=1024
-options 	MAXUSERS=3
-options 	MAXFILES=512
-options 	NSFBUFS=256
-options 	SHMALL=128
-options 	MSGBUF_SIZE=65536
-
-# Options for making kernel smallest 
-options 	NO_SYSCTL_DESCR		# No description string of sysctl
-#options 	NO_FFS_SNAPSHOT		# Disable Snapshot supporting
-options 	SCSI_NO_SENSE_STRINGS
-options 	SCSI_NO_OP_STRINGS
-options 	RWLOCK_NOINLINE
-options 	SX_NOINLINE
-options 	NO_SWAPPING
-options         MROUTING                # Multicast routing
-options 	IPFIREWALL_DEFAULT_TO_ACCEPT
-
-#device		md
-device		random
-device		loop
-# RT3050F, RT3052F have only pseudo PHYs, so mii not required
-device		rt
-
-device		ether
-device 		bpf			# Berkeley packet filter
-device		vlan
-#device		lagg
-#device          if_bridge
-device		uart
-nodevice	uart_ns8250
-device 		tun			# Packet tunnel.
-
-device		wlan
-
-#device		gpio
-#device		gpioled
-
-#device		nvram2env
-
-device		spibus
-device		mx25l
-
-device		usb
-device		ehci
-options 	SCSI_DELAY=1000		# Delay (in ms) before probing SCSI
-
-#options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-#options 	USB_DEBUG
-#options 	USB_REQ_DEBUG
diff --git a/sys/mips/conf/XLR b/sys/mips/conf/XLR
deleted file mode 100644
index 0c2cd72053a..00000000000
--- a/sys/mips/conf/XLR
+++ /dev/null
@@ -1,147 +0,0 @@
-#################################RMI_BSD#####################################
-# Copyright (c) 2003-2009 RMI Corporation
-# All rights reserved.
-# 
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-# 3. Neither the name of RMI Corporation, nor the names of its contributors,
-#    may be used to endorse or promote products derived from this software
-#    without specific prior written permission.
-# 
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#################################RMI_BSD#####################################
-# XLR -- Generic kernel configuration file for FreeBSD/mips
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-machine 	mips mips
-ident 		XLR
-include		"../rmi/std.xlr"
-
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
-makeoptions	KERNLOADADDR=0x80100000
-#profile		2
-
-options 	SCHED_ULE		# ULE scheduler
-#options 	VERBOSE_SYSINIT
-#options 	SCHED_4BSD		# 4BSD scheduler
-options 	SMP
-options 	PREEMPTION		# Enable kernel thread preemption
-#options 	FULL_PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	FFS			# Berkeley Fast Filesystem
-#options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	NFSCL
-options 	NFS_ROOT
-#
-options 	BOOTP
-options 	BOOTP_NFSROOT
-options 	BOOTP_NFSV3
-options 	BOOTP_WIRED_TO=nlge0
-options 	BOOTP_COMPAT
-options 	ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\"
-#
-#options 	MD_ROOT			# MD is a potential root device
-#options 	MD_ROOT_SIZE=27000
-#options 	MD_ROOT_SIZE=5120
-#options 	ROOTDEVNAME=\"ufs:md0\"
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	HZ=1000	
-options 	NO_SWAPPING
-
-#Debugging options
-options 	KTRACE			# ktrace(1) support
-options 	DDB
-options 	KDB
-options 	GDB
-options 	ALT_BREAK_TO_DEBUGGER
-options  	BREAK_TO_DEBUGGER
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options 	KTR			# ktr(4) and ktrdump(8) support
-#options 	KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC)
-#options 	KTR_ENTRIES=131072
-
-#options 	LOCK_PROFILING
-#options 	SLEEPQUEUE_PROFILING
-#options 	TURNSTILE_PROFILING
-
-device		pci
-#device		ata
-device 		uart
-# Pseudo
-device 		loop
-device 		random
-device 		md
-device		bpf
-
-# Network
-device		miibus
-device		nlge
-device 		ether
-device		re
-device		msk
-
-device		da
-device		scbus
-device		ehci		# EHCI PCI->USB interface (USB 2.0)
-device		usb		# USB Bus (required)
-#options 	USB_DEBUG	# enable debug msgs
-#device		uhid		# "Human Interface Devices"
-device		umass		# Disks/Mass storage - Requires scbus and da
-
-#device		cfi
-
-#i2c
-device		ic
-device		iic
-device		iicbb
-device		iicbus
-device		ds13rtc	# RTC on XLR boards
-device		max6657	# Temparature sensor on XLR boards
-device		at24co2n	# EEPROM on XLR boards
-
-#crypto
-# Not yet
-#device		cryptodev
-#device		crypto
-#device		rmisec
diff --git a/sys/mips/conf/XLR64 b/sys/mips/conf/XLR64
deleted file mode 100644
index 7a0daab7354..00000000000
--- a/sys/mips/conf/XLR64
+++ /dev/null
@@ -1,121 +0,0 @@
-# XLR64 -- Kernel configuration file for N64 kernel on XLR/XLS
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-machine 	mips mips64
-ident 		XLR64
-include		"../rmi/std.xlr"
-
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
-makeoptions	ARCH_FLAGS="-march=mips64 -mabi=64"
-makeoptions	KERNLOADADDR=0xffffffff80100000
-
-#profile		2
-
-options 	SCHED_ULE		# ULE scheduler
-#options 	VERBOSE_SYSINIT
-#options 	SCHED_4BSD		# 4BSD scheduler
-options 	SMP
-#options 	PREEMPTION		# Enable kernel thread preemption
-#options 	FULL_PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	FFS			# Berkeley Fast Filesystem
-#options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	NFSCL
-options 	NFS_ROOT
-#
-options 	BOOTP
-options 	BOOTP_NFSROOT
-options 	BOOTP_NFSV3
-options 	BOOTP_WIRED_TO=nlge0
-options 	BOOTP_COMPAT
-options 	ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\"
-#
-#options 	MD_ROOT			# MD is a potential root device
-#options 	MD_ROOT_SIZE=27000
-#options 	MD_ROOT_SIZE=5120
-#options 	ROOTDEVNAME=\"ufs:md0\"
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	HZ=1000	
-options 	NO_SWAPPING
-
-#Debugging options
-options 	KTRACE			# ktrace(1) support
-options 	DDB
-options 	KDB
-options 	GDB
-options 	ALT_BREAK_TO_DEBUGGER
-options  	BREAK_TO_DEBUGGER
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options 	KTR			# ktr(4) and ktrdump(8) support
-#options 	KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC)
-#options 	KTR_ENTRIES=131072
-
-#options 	LOCK_PROFILING
-#options 	SLEEPQUEUE_PROFILING
-#options 	TURNSTILE_PROFILING
-
-device		pci
-#device		ata
-device 		uart
-# Pseudo
-device 		loop
-device 		random
-device 		md
-device		bpf
-
-# Network
-device		miibus
-device		nlge
-device 		ether
-device		re
-device		msk
-
-device		da
-device		scbus
-device		ehci		# EHCI PCI->USB interface (USB 2.0)
-device		usb		# USB Bus (required)
-options 	USB_DEBUG		# enable debug msgs
-#device		uhid		# "Human Interface Devices"
-device		umass		# Disks/Mass storage - Requires scbus and da
-
-#device		cfi
-
-#i2c
-device		ic
-device		iic
-device		iicbb
-device		iicbus
-device		ds13rtc		# RTC on XLR boards
-device		max6657		# Temparature sensor on XLR boards
-device		at24co2n	# EEPROM on XLR boards
-
-#crypto
-# Not yet
-#device		cryptodev
-#device		crypto
-#device		rmisec
diff --git a/sys/mips/conf/XLRN32 b/sys/mips/conf/XLRN32
deleted file mode 100644
index ff671948996..00000000000
--- a/sys/mips/conf/XLRN32
+++ /dev/null
@@ -1,125 +0,0 @@
-# XLRN32 -- Kernel configuration file for N32 kernel on XLR/XLS
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-machine 	mips mipsn32
-ident 		XLRN32
-include		"../rmi/std.xlr"
-
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
-makeoptions	ARCH_FLAGS="-march=mips64 -mabi=n32"
-makeoptions	KERNLOADADDR=0x80100000
-
-#profile		2
-
-options 	SCHED_ULE		# ULE scheduler
-#options 	VERBOSE_SYSINIT
-#options 	SCHED_4BSD		# 4BSD scheduler
-options         SMP
-options 	PREEMPTION		# Enable kernel thread preemption
-#options 	FULL_PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	FFS			# Berkeley Fast Filesystem
-#options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	NFSCL
-options 	NFS_ROOT
-#
-options         BOOTP
-options         BOOTP_NFSROOT
-options         BOOTP_NFSV3
-options         BOOTP_WIRED_TO=nlge0
-options         BOOTP_COMPAT
-options 	ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\"
-#
-#options 	MD_ROOT			# MD is a potential root device
-#options 	MD_ROOT_SIZE=27000
-#options 	MD_ROOT_SIZE=5120
-#options 	ROOTDEVNAME=\"ufs:md0\"
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	HZ=1000	
-options 	NO_SWAPPING
-
-#Debugging options
-options 	KTRACE			# ktrace(1) support
-#options 	DDB
-#options 	KDB
-#options 	GDB
-#options 	ALT_BREAK_TO_DEBUGGER
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-#options 	KTR			# ktr(4) and ktrdump(8) support
-#options 	KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC)
-#options 	KTR_ENTRIES=131072
-
-#options 	LOCK_PROFILING
-#options 	SLEEPQUEUE_PROFILING
-#options 	TURNSTILE_PROFILING
-
-device		pci
-#device		ata
-#options 	XLR_PERFMON		# Enable XLR processor activity monitoring
-options  	BREAK_TO_DEBUGGER
-device 		uart
-# Pseudo
-device 		loop
-device 		random
-device 		md
-device		bpf
-
-# Network
-device		miibus
-device		nlge
-device 		ether
-device		re
-device		msk
-
-device          da
-device          scbus
-#device          ohci            # OHCI PCI->USB interface
-device          ehci            # EHCI PCI->USB interface (USB 2.0)
-device          usb             # USB Bus (required)
-options 	USB_DEBUG	# enable debug msgs
-#device         udbp            # USB Double Bulk Pipe devices
-#device          ugen            # Generic
-#device          uhid            # "Human Interface Devices"
-device          umass           # Disks/Mass storage - Requires scbus and da
-
-#device		cfi
-
-#i2c
-device		ic
-device		iic
-device		iicbb
-device		iicbus
-device		ds13rtc		# RTC on XLR boards
-device		max6657		# Temparature sensor on XLR boards
-device		at24co2n	# EEPROM on XLR boards
-
-#crypto
-# Not yet
-#device cryptodev
-#device crypto
-#device rmisec
diff --git a/sys/mips/idt/files.idt b/sys/mips/idt/files.idt
deleted file mode 100644
index 09b9959c122..00000000000
--- a/sys/mips/idt/files.idt
+++ /dev/null
@@ -1,10 +0,0 @@
-# $FreeBSD$
-
-mips/idt/idt_machdep.c		standard
-mips/idt/idtpci.c		optional pci
-mips/idt/if_kr.c		optional kr
-mips/idt/obio.c			standard
-mips/idt/uart_cpu_rc32434.c	optional uart
-mips/idt/uart_bus_rc32434.c	optional uart
-mips/mips/intr_machdep.c        standard
-mips/mips/tick.c		standard
diff --git a/sys/mips/idt/idt_machdep.c b/sys/mips/idt/idt_machdep.c
deleted file mode 100644
index f8976b5a1df..00000000000
--- a/sys/mips/idt/idt_machdep.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $Id: $
- * 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-extern int	*edata;
-extern int	*end;
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-void
-platform_reset(void)
-{
-	volatile unsigned int * p = (void *)0xb8008000;
-	/* 
-	 * TODO: we should take care of TLB stuff here. Otherwise
-	 * board does not boots properly next time
-	 */
-
-	/* Write 0x8000_0001 to the Reset register */
-	*p = 0x80000001;
-
-	__asm __volatile("li	$25, 0xbfc00000");
-	__asm __volatile("j	$25");
-}
-
-void
-platform_start(__register_t a0, __register_t a1,
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	uint64_t platform_counter_freq;
-	vm_offset_t kernend;
-	int argc = a0;
-	char **argv = (char **)a1;
-	int i, mem;
-
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/*
-	 * Looking for mem=XXM argument
-	 */
-	mem = 0; /* Just something to start with */
-	for (i=0; i < argc; i++) {
-		if (strncmp(argv[i], "mem=", 4) == 0) {
-			mem = strtol(argv[i] + 4, NULL, 0);
-			break;
-		}
-	}
-
-	bootverbose = 1;
-	if (mem > 0)
-		realmem = btoc(mem << 20);
-	else
-		realmem = btoc(32 << 20);
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = phys_avail[0];
-	dump_avail[1] = phys_avail[1];
-
-	physmem = realmem;
-
-	/* 
-	 * ns8250 uart code uses DELAY so ticker should be inititalized 
-	 * before cninit. And tick_init_params refers to hz, so * init_param1 
-	 * should be called first.
-	 */
-	init_param1();
-	/* TODO: parse argc,argv */
-	platform_counter_freq = 330000000UL;
-	mips_timer_init_params(platform_counter_freq, 1);
-	cninit();
-	/* Panic here, after cninit */ 
-	if (mem == 0)
-		panic("No mem=XX parameter in arguments");
-
-	printf("cmd line: ");
-	for (i=0; i < argc; i++)
-		printf("%s ", argv[i]);
-	printf("\n");
-
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
diff --git a/sys/mips/idt/idtpci.c b/sys/mips/idt/idtpci.c
deleted file mode 100644
index 62163f633f9..00000000000
--- a/sys/mips/idt/idtpci.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/* $NetBSD: idtpci.c,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2007 David Young.
- * Copyright (c) 2007 Oleskandr Tymoshenko.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The name of the author may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 2006 Itronix Inc.
- * All rights reserved.
- *
- * Written by Garrett D'Amore for Itronix Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of Itronix Inc. may not be used to endorse
- *    or promote products derived from this software without specific
- *    prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */ 
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/idt/idtreg.h>
-
-#ifdef IDTPCI_DEBUG
-int idtpci_debug = 1;
-#define	IDTPCI_DPRINTF(__fmt, ...)		\
-do {						\
-	if (idtpci_debug)			\
-		printf((__fmt), __VA_ARGS__);	\
-} while (/*CONSTCOND*/0)
-#else /* !IDTPCI_DEBUG */
-#define	IDTPCI_DPRINTF(__fmt, ...)	do { } while (/*CONSTCOND*/0)
-#endif /* IDTPCI_DEBUG */
-
-#define	IDTPCI_TAG_BUS_MASK		0x007f0000
-#define	IDTPCI_TAG_DEVICE_MASK		0x00007800
-#define	IDTPCI_TAG_FUNCTION_MASK	0x00000300
-#define	IDTPCI_TAG_REGISTER_MASK	0x0000007c
-
-#define	IDTPCI_MAX_DEVICE
-
-#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_PCI + (o)))
-#define REG_WRITE(o,v) (REG_READ(o)) = (v)
-
-unsigned int korina_fixup[24] = { 
-	0x00000157, 0x00000000, 0x00003c04, 0x00000008, 0x18800001, 0x18000001,
-	0x48000008, 0x00000000, 0x00000000, 0x00000000, 0x011d0214, 0x00000000,
-	0x00000000, 0x00000000, 0x38080101, 0x00008080, 0x00000d6e, 0x00000000,
-	0x00000051, 0x00000000, 0x00000055, 0x18000000, 0x00000000, 0x00000000 
-};
-
-struct idtpci_softc {
-	device_t		sc_dev;
-
-	int			sc_busno;
-	struct rman		sc_mem_rman[2];
-	struct rman		sc_io_rman[2];
-	struct rman		sc_irq_rman;
-};
-
-static uint32_t
-idtpci_make_addr(int bus, int slot, int func, int reg)
-{
-
-	return 0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg;
-}
-
-static int
-idtpci_probe(device_t dev)
-{
-
-	return (0);
-}
-
-static int
-idtpci_attach(device_t dev)
-{
-	int busno = 0;
-	struct idtpci_softc *sc = device_get_softc(dev);
-	unsigned int pci_data, force_endianess = 0;
-	int		i;
-	bus_addr_t	addr;
-
-	sc->sc_dev = dev;
-	sc->sc_busno = busno;
-
-	/* TODO: Check for host mode */
-
-	/* Enabled PCI, IG mode, EAP mode */
-	REG_WRITE(IDT_PCI_CNTL, IDT_PCI_CNTL_IGM | IDT_PCI_CNTL_EAP |
-	    IDT_PCI_CNTL_EN);
-	/* Wait while "Reset in progress bit" set */
-	while(1) {
-		pci_data = REG_READ(IDT_PCI_STATUS);
-		if((pci_data & IDT_PCI_STATUS_RIP) == 0)
-			break;
-	}
-
-	/* Reset status register */
-	REG_WRITE(IDT_PCI_STATUS, 0);
-	/* Mask interrupts related to status register */
-	REG_WRITE(IDT_PCI_STATUS_MASK, 0xffffffff);
-
-	/* Disable PCI decoupled access */
-	REG_WRITE(IDT_PCI_DAC, 0);
-	/* Zero status and mask DA interrupts */
-	REG_WRITE(IDT_PCI_DAS, 0);
-	REG_WRITE(IDT_PCI_DASM, 0x7f);
-
-	/* Init PCI messaging unit */
-	/* Disable messaging interrupts */
-	REG_WRITE(IDT_PCI_IIC, 0);
-	REG_WRITE(IDT_PCI_IIM, 0xffffffff);
-	REG_WRITE(IDT_PCI_OIC, 0);
-	REG_WRITE(IDT_PCI_OIM, 0);
-
-#ifdef	__MIPSEB__
-	force_endianess = IDT_PCI_LBA_FE;
-#endif
-
-	/* LBA0 -- memory window */
-	REG_WRITE(IDT_PCI_LBA0, IDT_PCIMEM0_BASE);
-	REG_WRITE(IDT_PCI_LBA0_MAP, IDT_PCIMEM0_BASE);
-	REG_WRITE(IDT_PCI_LBA0_CNTL, IDT_PCI_LBA_SIZE_16MB | force_endianess);
-	pci_data = REG_READ(IDT_PCI_LBA0_CNTL); 
-
-	/* LBA1 -- memory window */
-	REG_WRITE(IDT_PCI_LBA1, IDT_PCIMEM1_BASE);
-	REG_WRITE(IDT_PCI_LBA1_MAP, IDT_PCIMEM1_BASE);
-	REG_WRITE(IDT_PCI_LBA1_CNTL, IDT_PCI_LBA_SIZE_256MB | force_endianess);
-	pci_data = REG_READ(IDT_PCI_LBA1_CNTL); 
-
-	/* LBA2 -- IO window */
-	REG_WRITE(IDT_PCI_LBA2, IDT_PCIMEM2_BASE);
-	REG_WRITE(IDT_PCI_LBA2_MAP, IDT_PCIMEM2_BASE);
-	REG_WRITE(IDT_PCI_LBA2_CNTL, IDT_PCI_LBA_SIZE_4MB | IDT_PCI_LBA_MSI |
-	    force_endianess);
-	pci_data = REG_READ(IDT_PCI_LBA2_CNTL); 
-
-	/* LBA3 -- IO window */
-	REG_WRITE(IDT_PCI_LBA3, IDT_PCIMEM3_BASE);
-	REG_WRITE(IDT_PCI_LBA3_MAP, IDT_PCIMEM3_BASE);
-	REG_WRITE(IDT_PCI_LBA3_CNTL, IDT_PCI_LBA_SIZE_1MB | IDT_PCI_LBA_MSI |
-	    force_endianess);
-	pci_data = REG_READ(IDT_PCI_LBA3_CNTL); 
-
-
-	pci_data = REG_READ(IDT_PCI_CNTL) & ~IDT_PCI_CNTL_TNR; 
-	REG_WRITE(IDT_PCI_CNTL, pci_data);
-	pci_data = REG_READ(IDT_PCI_CNTL);
-
-	/* Rewrite Target Control register with default values */
-	REG_WRITE(IDT_PCI_TC, (IDT_PCI_TC_DTIMER << 8) | IDT_PCI_TC_RTIMER);
-
-	/* Perform Korina fixup */
-	addr = idtpci_make_addr(0, 0, 0, 4);
-	for (i = 0; i < 24; i++) {
-
-		REG_WRITE(IDT_PCI_CFG_ADDR, addr);
-		REG_WRITE(IDT_PCI_CFG_DATA, korina_fixup[i]);
-		__asm__ volatile ("sync");
-
-		REG_WRITE(IDT_PCI_CFG_ADDR, 0);
-		REG_WRITE(IDT_PCI_CFG_DATA, 0);
-		addr += 4;
-	}
-
-	/* Use KSEG1 to access IO ports for it is uncached */
-	sc->sc_io_rman[0].rm_type = RMAN_ARRAY;
-	sc->sc_io_rman[0].rm_descr = "IDTPCI I/O Ports window 1";
-	if (rman_init(&sc->sc_io_rman[0]) != 0 ||
-	  rman_manage_region(&sc->sc_io_rman[0], 
-	      IDT_PCIMEM2_BASE, IDT_PCIMEM2_BASE + IDT_PCIMEM2_SIZE - 1) != 0) {
-		panic("idtpci_attach: failed to set up I/O rman");
-	}
-
-	sc->sc_io_rman[1].rm_type = RMAN_ARRAY;
-	sc->sc_io_rman[1].rm_descr = "IDTPCI I/O Ports window 2";
-	if (rman_init(&sc->sc_io_rman[1]) != 0 ||
-	  rman_manage_region(&sc->sc_io_rman[1], 
-	      IDT_PCIMEM3_BASE, IDT_PCIMEM3_BASE + IDT_PCIMEM3_SIZE - 1) != 0) {
-		panic("idtpci_attach: failed to set up I/O rman");
-	}
-
-	/* Use KSEG1 to access PCI memory for it is uncached */
-	sc->sc_mem_rman[0].rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman[0].rm_descr = "IDTPCI PCI Memory window 1";
-	if (rman_init(&sc->sc_mem_rman[0]) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman[0], 
-	    IDT_PCIMEM0_BASE, IDT_PCIMEM0_BASE + IDT_PCIMEM0_SIZE) != 0) {
-		panic("idtpci_attach: failed to set up memory rman");
-	}
-
-	sc->sc_mem_rman[1].rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman[1].rm_descr = "IDTPCI PCI Memory window 2";
-	if (rman_init(&sc->sc_mem_rman[1]) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman[1], 
-	    IDT_PCIMEM1_BASE, IDT_PCIMEM1_BASE + IDT_PCIMEM1_SIZE) != 0) {
-		panic("idtpci_attach: failed to set up memory rman");
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "IDTPCI PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, PCI_IRQ_BASE, 
-	        PCI_IRQ_END) != 0)
-		panic("idtpci_attach: failed to set up IRQ rman");
-
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-idtpci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static uint32_t
-idtpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
-    int bytes)
-{
-	uint32_t data;
-	uint32_t shift, mask;
-	bus_addr_t addr;
-
-	IDTPCI_DPRINTF("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, 
-			bus, slot, func, reg, bytes);
-
-	addr = idtpci_make_addr(bus, slot, func, reg);
-
-	REG_WRITE(IDT_PCI_CFG_ADDR, addr);
-	data = REG_READ(IDT_PCI_CFG_DATA);
-
-	switch (reg % 4) {
-	case 3:
-		shift = 24;
-		break;
-	case 2:
-		shift = 16;
-		break;
-	case 1:
-		shift = 8;
-		break;
-	default:
-		shift = 0;
-		break;
-	}	
-
-	switch (bytes) {
-	case 1:
-		mask = 0xff;
-		data = (data >> shift) & mask;
-		break;
-	case 2:
-		mask = 0xffff;
-		if (reg % 4 == 0)
-			data = data & mask;
-		else
-			data = (data >> 16) & mask;
-		break;
-	case 4:
-		break;
-	default:
-		panic("%s: wrong bytes count", __func__);
-		break;
-	}
-
-	__asm__ volatile ("sync");
- 	IDTPCI_DPRINTF("%s: read 0x%x\n", __func__, data);
-
-	return (data);
-}
-
-static void
-idtpci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
-    uint32_t data, int bytes)
-{
-	bus_addr_t addr;
-	uint32_t reg_data;
-	uint32_t shift, mask;
-
-	IDTPCI_DPRINTF("%s: tag (%x, %x, %x) reg %d(%d) data %08x\n", __func__, 
-			bus, slot, func, reg, bytes, data);
-
-	if (bytes != 4) {
-		reg_data = idtpci_read_config(dev, bus, slot, func, reg, 4);
-
-		switch (reg % 4) {
-		case 3:
-			shift = 24;
-			break;
-		case 2:
-			shift = 16;
-			break;
-		case 1:
-			shift = 8;
-			break;
-		default:
-			shift = 0;
-			break;
-		}	
-
-		switch (bytes) {
-		case 1:
-			mask = 0xff;
-			data = (reg_data & ~ (mask << shift)) | (data << shift);
-			break;
-		case 2:
-			mask = 0xffff;
-			if (reg % 4 == 0)
-				data = (reg_data & ~mask) | data;
-			else
-				data = (reg_data & ~ (mask << shift)) | 
-				    (data << shift);
-			break;
-		case 4:
-			break;
-		default:
-			panic("%s: wrong bytes count", __func__);
-			break;
-		}
-	}
-
-	addr = idtpci_make_addr(bus, slot, func, reg);
-
-
-	REG_WRITE(IDT_PCI_CFG_ADDR, addr);
-	REG_WRITE(IDT_PCI_CFG_DATA, data);
-	__asm__ volatile ("sync");
-
-	REG_WRITE(IDT_PCI_CFG_ADDR, 0);
-	REG_WRITE(IDT_PCI_CFG_DATA, 0);
-}
-
-static int
-idtpci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-	static int idt_pci_table[2][12] =
-	{
-		{ 0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1 },
-		{ 0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3 }
-	};
-	int dev, bus, irq;
-	
-	dev = pci_get_slot(device);
-	bus = pci_get_bus(device);
-	if (bootverbose)
-		device_printf(pcib, "routing pin %d for %s\n", pin,
-		    device_get_nameunit(device));
-	if (bus >= 0 && bus <= 1 &&
-	    dev >= 0 && dev <= 11) {
-		irq = IP_IRQ(6, idt_pci_table[bus][dev] + 4);
-		if (bootverbose)
-			printf("idtpci: %d/%d/%d -> IRQ%d\n",
-			    pci_get_bus(device), dev, pci_get_function(device),
-			    irq);
-		return (irq);
-	} else
-		printf("idtpci: no mapping for %d/%d/%d\n",
-			pci_get_bus(device), dev, pci_get_function(device));
-
-	return (-1);
-}
-
-static int
-idtpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct idtpci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-idtpci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	struct idtpci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-	return (ENOENT);
-}
-
-static struct resource *
-idtpci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-
-	struct idtpci_softc *sc = device_get_softc(bus);	
-	struct resource *rv = NULL;
-	struct rman *rm1, *rm2;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm1 = &sc->sc_irq_rman;
-		rm2 = NULL;
-		break;
-	case SYS_RES_MEMORY:
-		rm1 = &sc->sc_mem_rman[0];
-		rm2 = &sc->sc_mem_rman[1];
-		break;
-	case SYS_RES_IOPORT:
-		rm1 = &sc->sc_io_rman[0];
-		rm2 = &sc->sc_io_rman[1];
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm1, start, end, count, flags, child);
-
-	/* Try second window if it exists */
-	if ((rv == NULL) && (rm2 != NULL))
-		rv = rman_reserve_resource(rm2, start, end, count, flags, 
-		    child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if (flags & RF_ACTIVE) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	} 
-
-	return (rv);
-}
-
-static int
-idtpci_teardown_intr(device_t dev, device_t child, struct resource *res,
-    void *cookie)
-{
-
-	return (intr_event_remove_handler(cookie));
-}
-
-static device_method_t idtpci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		idtpci_probe),
-	DEVMETHOD(device_attach,	idtpci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	idtpci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	idtpci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	idtpci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	idtpci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	idtpci_maxslots),
-	DEVMETHOD(pcib_read_config,	idtpci_read_config),
-	DEVMETHOD(pcib_write_config,	idtpci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	idtpci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t idtpci_driver = {
-	"pcib",
-	idtpci_methods,
-	sizeof(struct idtpci_softc),
-};
-
-static devclass_t idtpci_devclass;
-
-DRIVER_MODULE(idtpci, obio, idtpci_driver, idtpci_devclass, 0, 0);
diff --git a/sys/mips/idt/idtreg.h b/sys/mips/idt/idtreg.h
deleted file mode 100644
index e04bb7f94d7..00000000000
--- a/sys/mips/idt/idtreg.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-#ifndef __IDTREG_H__
-#define __IDTREG_H__
-
-/* Interrupt controller */
-#define	IDT_BASE_ICU	0x18038000
-#define		ICU_IPEND2	0x00
-#define		ICU_ITEST2	0x04
-#define		ICU_IMASK2	0x08
-#define		ICU_IPEND3	0x0C	
-#define		ICU_ITEST3	0x10
-#define		ICU_IMASK3	0x14
-#define		ICU_IPEND4	0x18	
-#define		ICU_ITEST4	0x1c
-#define		ICU_IMASK4	0x20
-#define		ICU_IPEND5	0x24	
-#define		ICU_ITEST5	0x28
-#define		ICU_IMASK5	0x2c
-#define		ICU_IPEND6	0x30	
-#define		ICU_ITEST6	0x34
-#define		ICU_IMASK6	0x38
-#define		ICU_NMIPS	0x3c
-
-#define	IDT_BASE_GPIO	0x18050000
-#define		GPIO_FUNC	0x00
-#define		GPIO_CFG	0x04
-#define		GPIO_DATA	0x08
-#define		GPIO_ILEVEL	0x0C
-#define		GPIO_ISTAT	0x10
-#define		GPIO_NMIEN	0x14
-
-#define	IDT_BASE_UART0	0x18058000
-
-/* PCI controller */
-#define	IDT_BASE_PCI	0x18080000
-#define		IDT_PCI_CNTL		0x00
-#define			IDT_PCI_CNTL_EN		0x001
-#define			IDT_PCI_CNTL_TNR	0x002
-#define			IDT_PCI_CNTL_SCE	0x004
-#define			IDT_PCI_CNTL_IEN	0x008
-#define			IDT_PCI_CNTL_AAA	0x010
-#define			IDT_PCI_CNTL_EAP	0x020
-#define			IDT_PCI_CNTL_IGM	0x200
-#define		IDT_PCI_STATUS		0x04
-#define			IDT_PCI_STATUS_RIP	0x20000
-#define		IDT_PCI_STATUS_MASK	0x08
-#define		IDT_PCI_CFG_ADDR	0x0C
-#define		IDT_PCI_CFG_DATA	0x10
-/* LBA stuff */
-#define		IDT_PCI_LBA0		0x14
-#define		IDT_PCI_LBA0_CNTL	0x18
-#define			IDT_PCI_LBA_MSI		0x01
-#define			IDT_PCI_LBA_SIZE_1MB	(0x14 << 2)
-#define			IDT_PCI_LBA_SIZE_2MB	(0x15 << 2)
-#define			IDT_PCI_LBA_SIZE_4MB	(0x16 << 2)
-#define			IDT_PCI_LBA_SIZE_8MB	(0x17 << 2)
-#define			IDT_PCI_LBA_SIZE_16MB	(0x18 << 2)
-#define			IDT_PCI_LBA_SIZE_32MB	(0x19 << 2)
-#define			IDT_PCI_LBA_SIZE_64MB	(0x1A << 2)
-#define			IDT_PCI_LBA_SIZE_128MB	(0x1B << 2)
-#define			IDT_PCI_LBA_SIZE_256MB	(0x1C << 2)
-#define			IDT_PCI_LBA_FE		0x80
-#define			IDT_PCI_LBA_RT		0x100
-#define		IDT_PCI_LBA0_MAP	0x1C
-#define		IDT_PCI_LBA1		0x20
-#define		IDT_PCI_LBA1_CNTL	0x24
-#define		IDT_PCI_LBA1_MAP	0x28
-#define		IDT_PCI_LBA2		0x2C
-#define		IDT_PCI_LBA2_CNTL	0x30
-#define		IDT_PCI_LBA2_MAP	0x34
-#define		IDT_PCI_LBA3		0x38
-#define		IDT_PCI_LBA3_CNTL	0x3C
-#define		IDT_PCI_LBA3_MAP	0x40
-/* decoupled registers */
-#define		IDT_PCI_DAC		0x44
-#define		IDT_PCI_DAS		0x48
-#define		IDT_PCI_DASM		0x4C
-
-#define		IDT_PCI_TC		0x5C
-#define			IDT_PCI_TC_RTIMER	0x10
-#define			IDT_PCI_TC_DTIMER	0x08
-/* Messaging unit of PCI controller */
-#define		IDT_PCI_IIC		0x8024
-#define		IDT_PCI_IIM		0x8028
-#define		IDT_PCI_OIC		0x8030
-#define		IDT_PCI_OIM		0x8034
-
-/* PCI-related stuff */
-#define	IDT_PCIMEM0_BASE	0x50000000
-#define	IDT_PCIMEM0_SIZE	0x01000000
-
-#define	IDT_PCIMEM1_BASE	0x60000000
-#define	IDT_PCIMEM1_SIZE	0x10000000
-
-#define	IDT_PCIMEM2_BASE	0x18C00000
-#define	IDT_PCIMEM2_SIZE	0x00400000
-
-#define	IDT_PCIMEM3_BASE	0x18800000
-#define	IDT_PCIMEM3_SIZE	0x00100000
-
-/* Interrupts-related stuff */
-#define	IRQ_BASE	8
-/* Convert <IPbit, irq_offset> pair to IRQ number */
-#define	IP_IRQ(IPbit, offset) ((IPbit - 2) * 32 + (offset) + IRQ_BASE)
-/* The last one available IRQ */
-#define	IRQ_END		IP_IRQ(6, 31)
-#define	ICU_GROUP_REG_OFFSET	0x0C
-
-#define	ICU_IP(irq)	(((irq) - IRQ_BASE) & 0x1f)
-#define	ICU_IP_BIT(irq)	(1 << ICU_IP(irq))
-#define	ICU_GROUP(irq)	(((irq) - IRQ_BASE) >> 5)
-
-#define	ICU_GROUP_MASK_REG(group)	\
-    (ICU_IMASK2 + ((((group) - 2) * ICU_GROUP_REG_OFFSET)))
-#define	ICU_GROUP_IPEND_REG(group)	\
-    (ICU_IPEND2 + ((((group) - 2) * ICU_GROUP_REG_OFFSET)))
-
-#define	ICU_IRQ_MASK_REG(irq)	\
-    (ICU_IMASK2 + ((ICU_GROUP(irq) * ICU_GROUP_REG_OFFSET)))
-#define	ICU_IRQ_IPEND_REG(irq)	\
-    (ICU_IPEND2 + ((ICU_GROUP(irq) * ICU_GROUP_REG_OFFSET)))
-
-#define	PCI_IRQ_BASE		IP_IRQ(6, 4)
-#define	PCI_IRQ_END		IP_IRQ(6, 7)
-
-#endif /* __IDTREG_H__ */
-
diff --git a/sys/mips/idt/if_kr.c b/sys/mips/idt/if_kr.c
deleted file mode 100644
index 9d6d4993134..00000000000
--- a/sys/mips/idt/if_kr.c
+++ /dev/null
@@ -1,1613 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 
- *	Oleksandr Tymoshenko <gonzo@freebsd.org>. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $Id: $
- * 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * RC32434 Ethernet interface driver
- */
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/socket.h>
-#include <sys/taskqueue.h>
-
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-
-#include <net/bpf.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-
-MODULE_DEPEND(kr, ether, 1, 1, 1);
-MODULE_DEPEND(kr, miibus, 1, 1, 1);
-
-#include "miibus_if.h"
-
-#include <mips/idt/if_krreg.h>
-
-#define KR_DEBUG
-
-static int kr_attach(device_t);
-static int kr_detach(device_t);
-static int kr_ifmedia_upd(struct ifnet *);
-static void kr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
-static int kr_ioctl(struct ifnet *, u_long, caddr_t);
-static void kr_init(void *);
-static void kr_init_locked(struct kr_softc *);
-static void kr_link_task(void *, int);
-static int kr_miibus_readreg(device_t, int, int);
-static void kr_miibus_statchg(device_t);
-static int kr_miibus_writereg(device_t, int, int, int);
-static int kr_probe(device_t);
-static void kr_reset(struct kr_softc *);
-static int kr_resume(device_t);
-static int kr_rx_ring_init(struct kr_softc *);
-static int kr_tx_ring_init(struct kr_softc *);
-static int kr_shutdown(device_t);
-static void kr_start(struct ifnet *);
-static void kr_start_locked(struct ifnet *);
-static void kr_stop(struct kr_softc *);
-static int kr_suspend(device_t);
-
-static void kr_rx(struct kr_softc *);
-static void kr_tx(struct kr_softc *);
-static void kr_rx_intr(void *);
-static void kr_tx_intr(void *);
-static void kr_rx_und_intr(void *);
-static void kr_tx_ovr_intr(void *);
-static void kr_tick(void *);
-
-static void kr_dmamap_cb(void *, bus_dma_segment_t *, int, int);
-static int kr_dma_alloc(struct kr_softc *);
-static void kr_dma_free(struct kr_softc *);
-static int kr_newbuf(struct kr_softc *, int);
-static __inline void kr_fixup_rx(struct mbuf *);
-
-static device_method_t kr_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		kr_probe),
-	DEVMETHOD(device_attach,	kr_attach),
-	DEVMETHOD(device_detach,	kr_detach),
-	DEVMETHOD(device_suspend,	kr_suspend),
-	DEVMETHOD(device_resume,	kr_resume),
-	DEVMETHOD(device_shutdown,	kr_shutdown),
-
-	/* MII interface */
-	DEVMETHOD(miibus_readreg,	kr_miibus_readreg),
-	DEVMETHOD(miibus_writereg,	kr_miibus_writereg),
-	DEVMETHOD(miibus_statchg,	kr_miibus_statchg),
-
-	DEVMETHOD_END
-};
-
-static driver_t kr_driver = {
-	"kr",
-	kr_methods,
-	sizeof(struct kr_softc)
-};
-
-static devclass_t kr_devclass;
-
-DRIVER_MODULE(kr, obio, kr_driver, kr_devclass, 0, 0);
-DRIVER_MODULE(miibus, kr, miibus_driver, miibus_devclass, 0, 0);
-
-static int 
-kr_probe(device_t dev)
-{
-
-	device_set_desc(dev, "RC32434 Ethernet interface");
-	return (0);
-}
-
-static int
-kr_attach(device_t dev)
-{
-	uint8_t			eaddr[ETHER_ADDR_LEN];
-	struct ifnet		*ifp;
-	struct kr_softc		*sc;
-	int			error = 0, rid;
-	int			unit;
-
-	sc = device_get_softc(dev);
-	unit = device_get_unit(dev);
-	sc->kr_dev = dev;
-
-	mtx_init(&sc->kr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
-	    MTX_DEF);
-	callout_init_mtx(&sc->kr_stat_callout, &sc->kr_mtx, 0);
-	TASK_INIT(&sc->kr_link_task, 0, kr_link_task, sc);
-	pci_enable_busmaster(dev);
-
-	/* Map control/status registers. */
-	sc->kr_rid = 0;
-	sc->kr_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->kr_rid, 
-	    RF_ACTIVE);
-
-	if (sc->kr_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	sc->kr_btag = rman_get_bustag(sc->kr_res);
-	sc->kr_bhandle = rman_get_bushandle(sc->kr_res);
-
-	/* Allocate interrupts */
-	rid = 0;
-	sc->kr_rx_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, KR_RX_IRQ,
-	    KR_RX_IRQ, 1, RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->kr_rx_irq == NULL) {
-		device_printf(dev, "couldn't map rx interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	rid = 0;
-	sc->kr_tx_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, KR_TX_IRQ,
-	    KR_TX_IRQ, 1, RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->kr_tx_irq == NULL) {
-		device_printf(dev, "couldn't map tx interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	rid = 0;
-	sc->kr_rx_und_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 
-	    KR_RX_UND_IRQ, KR_RX_UND_IRQ, 1, RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->kr_rx_und_irq == NULL) {
-		device_printf(dev, "couldn't map rx underrun interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	rid = 0;
-	sc->kr_tx_ovr_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 
-	    KR_TX_OVR_IRQ, KR_TX_OVR_IRQ, 1, RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->kr_tx_ovr_irq == NULL) {
-		device_printf(dev, "couldn't map tx overrun interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	/* Allocate ifnet structure. */
-	ifp = sc->kr_ifp = if_alloc(IFT_ETHER);
-
-	if (ifp == NULL) {
-		device_printf(dev, "couldn't allocate ifnet structure\n");
-		error = ENOSPC;
-		goto fail;
-	}
-	ifp->if_softc = sc;
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	ifp->if_ioctl = kr_ioctl;
-	ifp->if_start = kr_start;
-	ifp->if_init = kr_init;
-
-	/* XXX: add real size */
-	IFQ_SET_MAXLEN(&ifp->if_snd, 9);
-	ifp->if_snd.ifq_maxlen = 9;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	ifp->if_capenable = ifp->if_capabilities;
-
-	eaddr[0] = 0x00;
-	eaddr[1] = 0x0C;
-	eaddr[2] = 0x42;
-	eaddr[3] = 0x09;
-	eaddr[4] = 0x5E;
-	eaddr[5] = 0x6B;
-
-	if (kr_dma_alloc(sc) != 0) {
-		error = ENXIO;
-		goto fail;
-	}
-
-	/* TODO: calculate prescale */
-	CSR_WRITE_4(sc, KR_ETHMCP, (165000000 / (1250000 + 1)) & ~1);
-
-	CSR_WRITE_4(sc, KR_MIIMCFG, KR_MIIMCFG_R);
-	DELAY(1000);
-	CSR_WRITE_4(sc, KR_MIIMCFG, 0);
-
-	/* Do MII setup. */
-	error = mii_attach(dev, &sc->kr_miibus, ifp, kr_ifmedia_upd,
-	    kr_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
-	if (error != 0) {
-		device_printf(dev, "attaching PHYs failed\n");
-		goto fail;
-	}
-
-	/* Call MI attach routine. */
-	ether_ifattach(ifp, eaddr);
-
-	/* Hook interrupt last to avoid having to lock softc */
-	error = bus_setup_intr(dev, sc->kr_rx_irq, INTR_TYPE_NET | INTR_MPSAFE,
-	    NULL, kr_rx_intr, sc, &sc->kr_rx_intrhand);
-
-	if (error) {
-		device_printf(dev, "couldn't set up rx irq\n");
-		ether_ifdetach(ifp);
-		goto fail;
-	}
-
-	error = bus_setup_intr(dev, sc->kr_tx_irq, INTR_TYPE_NET | INTR_MPSAFE,
-	    NULL, kr_tx_intr, sc, &sc->kr_tx_intrhand);
-
-	if (error) {
-		device_printf(dev, "couldn't set up tx irq\n");
-		ether_ifdetach(ifp);
-		goto fail;
-	}
-
-	error = bus_setup_intr(dev, sc->kr_rx_und_irq, 
-	    INTR_TYPE_NET | INTR_MPSAFE, NULL, kr_rx_und_intr, sc, 
-	    &sc->kr_rx_und_intrhand);
-
-	if (error) {
-		device_printf(dev, "couldn't set up rx underrun irq\n");
-		ether_ifdetach(ifp);
-		goto fail;
-	}
-
-	error = bus_setup_intr(dev, sc->kr_tx_ovr_irq, 
-	    INTR_TYPE_NET | INTR_MPSAFE, NULL, kr_tx_ovr_intr, sc, 
-	    &sc->kr_tx_ovr_intrhand);
-
-	if (error) {
-		device_printf(dev, "couldn't set up tx overrun irq\n");
-		ether_ifdetach(ifp);
-		goto fail;
-	}
-
-fail:
-	if (error) 
-		kr_detach(dev);
-
-	return (error);
-}
-
-static int
-kr_detach(device_t dev)
-{
-	struct kr_softc		*sc = device_get_softc(dev);
-	struct ifnet		*ifp = sc->kr_ifp;
-
-	KASSERT(mtx_initialized(&sc->kr_mtx), ("vr mutex not initialized"));
-
-	/* These should only be active if attach succeeded */
-	if (device_is_attached(dev)) {
-		KR_LOCK(sc);
-		sc->kr_detach = 1;
-		kr_stop(sc);
-		KR_UNLOCK(sc);
-		taskqueue_drain(taskqueue_swi, &sc->kr_link_task);
-		ether_ifdetach(ifp);
-	}
-	if (sc->kr_miibus)
-		device_delete_child(dev, sc->kr_miibus);
-	bus_generic_detach(dev);
-
-	if (sc->kr_rx_intrhand)
-		bus_teardown_intr(dev, sc->kr_rx_irq, sc->kr_rx_intrhand);
-	if (sc->kr_rx_irq)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->kr_rx_irq);
-	if (sc->kr_tx_intrhand)
-		bus_teardown_intr(dev, sc->kr_tx_irq, sc->kr_tx_intrhand);
-	if (sc->kr_tx_irq)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->kr_tx_irq);
-	if (sc->kr_rx_und_intrhand)
-		bus_teardown_intr(dev, sc->kr_rx_und_irq, 
-		    sc->kr_rx_und_intrhand);
-	if (sc->kr_rx_und_irq)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->kr_rx_und_irq);
-	if (sc->kr_tx_ovr_intrhand)
-		bus_teardown_intr(dev, sc->kr_tx_ovr_irq, 
-		    sc->kr_tx_ovr_intrhand);
-	if (sc->kr_tx_ovr_irq)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->kr_tx_ovr_irq);
-
-	if (sc->kr_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->kr_rid, 
-		    sc->kr_res);
-
-	if (ifp)
-		if_free(ifp);
-
-	kr_dma_free(sc);
-
-	mtx_destroy(&sc->kr_mtx);
-
-	return (0);
-
-}
-
-static int
-kr_suspend(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-kr_resume(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-kr_shutdown(device_t dev)
-{
-	struct kr_softc	*sc;
-
-	sc = device_get_softc(dev);
-
-	KR_LOCK(sc);
-	kr_stop(sc);
-	KR_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-kr_miibus_readreg(device_t dev, int phy, int reg)
-{
-	struct kr_softc * sc = device_get_softc(dev);
-	int i, result;
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii is busy %d:%d\n", phy, reg);
-
-	CSR_WRITE_4(sc, KR_MIIMADDR, (phy << 8) | reg);
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii is busy %d:%d\n", phy, reg);
-
-	CSR_WRITE_4(sc, KR_MIIMCMD, KR_MIIMCMD_RD);
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii read is timed out %d:%d\n", phy, 
-		    reg);
-
-	if (CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_NV)
-		printf("phy mii readreg failed %d:%d: data not valid\n",
-		    phy, reg);
-
-	result = CSR_READ_4(sc , KR_MIIMRDD);
-	CSR_WRITE_4(sc, KR_MIIMCMD, 0);
-
-	return (result);
-}
-
-static int
-kr_miibus_writereg(device_t dev, int phy, int reg, int data)
-{
-	struct kr_softc * sc = device_get_softc(dev);
-	int i;
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii is busy %d:%d\n", phy, reg);
-
-	CSR_WRITE_4(sc, KR_MIIMADDR, (phy << 8) | reg);
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii is busy %d:%d\n", phy, reg);
-
-	CSR_WRITE_4(sc, KR_MIIMWTD, data);
-
-	i = KR_MII_TIMEOUT;
-	while ((CSR_READ_4(sc, KR_MIIMIND) & KR_MIIMIND_BSY) && i)
-		i--;
-
-	if (i == 0)
-		device_printf(dev, "phy mii is busy %d:%d\n", phy, reg);
-
-	return (0);
-}
-
-static void
-kr_miibus_statchg(device_t dev)
-{
-	struct kr_softc		*sc;
-
-	sc = device_get_softc(dev);
-	taskqueue_enqueue(taskqueue_swi, &sc->kr_link_task);
-}
-
-static void
-kr_link_task(void *arg, int pending)
-{
-	struct kr_softc		*sc;
-	struct mii_data		*mii;
-	struct ifnet		*ifp;
-	/* int			lfdx, mfdx; */
-
-	sc = (struct kr_softc *)arg;
-
-	KR_LOCK(sc);
-	mii = device_get_softc(sc->kr_miibus);
-	ifp = sc->kr_ifp;
-	if (mii == NULL || ifp == NULL ||
-	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
-		KR_UNLOCK(sc);
-		return;
-	}
-
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
-			sc->kr_link_status = 1;
-	} else
-		sc->kr_link_status = 0;
-
-	KR_UNLOCK(sc);
-}
-
-static void
-kr_reset(struct kr_softc *sc)
-{
-	int		i;
-
-	CSR_WRITE_4(sc, KR_ETHINTFC, 0);
-
-	for (i = 0; i < KR_TIMEOUT; i++) {
-		DELAY(10);
-		if (!(CSR_READ_4(sc, KR_ETHINTFC) & ETH_INTFC_RIP))
-			break;
-	}
-
-	if (i == KR_TIMEOUT)
-		device_printf(sc->kr_dev, "reset time out\n");
-}
-
-static void
-kr_init(void *xsc)
-{
-	struct kr_softc	 *sc = xsc;
-
-	KR_LOCK(sc);
-	kr_init_locked(sc);
-	KR_UNLOCK(sc);
-}
-
-static void
-kr_init_locked(struct kr_softc *sc)
-{
-	struct ifnet		*ifp = sc->kr_ifp;
-	struct mii_data		*mii;
-
-	KR_LOCK_ASSERT(sc);
-
-	mii = device_get_softc(sc->kr_miibus);
-
-	kr_stop(sc);
-	kr_reset(sc);
-
-	CSR_WRITE_4(sc, KR_ETHINTFC, ETH_INTFC_EN);
-
-	/* Init circular RX list. */
-	if (kr_rx_ring_init(sc) != 0) {
-		device_printf(sc->kr_dev,
-		    "initialization failed: no memory for rx buffers\n");
-		kr_stop(sc);
-		return;
-	}
-
-	/* Init tx descriptors. */
-	kr_tx_ring_init(sc);
-
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_S, 0);
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_NDPTR, 0);
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_DPTR, 
-	    sc->kr_rdata.kr_rx_ring_paddr);
-
-
-	KR_DMA_CLEARBITS_REG(KR_DMA_RXCHAN, DMA_SM, 
-	    DMA_SM_H | DMA_SM_E | DMA_SM_D) ;
-
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_S, 0);
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_NDPTR, 0);
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_DPTR, 0);
-	KR_DMA_CLEARBITS_REG(KR_DMA_TXCHAN, DMA_SM, 
-	    DMA_SM_F | DMA_SM_E);
-
-
-	/* Accept only packets destined for THIS Ethernet device address */
-	CSR_WRITE_4(sc, KR_ETHARC, 1);
-
-	/* 
-	 * Set all Ethernet address registers to the same initial values
-	 * set all four addresses to 66-88-aa-cc-dd-ee 
-	 */
-	CSR_WRITE_4(sc, KR_ETHSAL0, 0x42095E6B);
-	CSR_WRITE_4(sc, KR_ETHSAH0, 0x0000000C);
-
-	CSR_WRITE_4(sc, KR_ETHSAL1, 0x42095E6B);
-	CSR_WRITE_4(sc, KR_ETHSAH1, 0x0000000C);
-
-	CSR_WRITE_4(sc, KR_ETHSAL2, 0x42095E6B);
-	CSR_WRITE_4(sc, KR_ETHSAH2, 0x0000000C);
-
-	CSR_WRITE_4(sc, KR_ETHSAL3, 0x42095E6B);
-	CSR_WRITE_4(sc, KR_ETHSAH3, 0x0000000C);
-
-	CSR_WRITE_4(sc, KR_ETHMAC2, 
-	    KR_ETH_MAC2_PEN | KR_ETH_MAC2_CEN | KR_ETH_MAC2_FD);
-
-	CSR_WRITE_4(sc, KR_ETHIPGT, KR_ETHIPGT_FULL_DUPLEX);
-	CSR_WRITE_4(sc, KR_ETHIPGR, 0x12); /* minimum value */
-
-	CSR_WRITE_4(sc, KR_MIIMCFG, KR_MIIMCFG_R);
-	DELAY(1000);
-	CSR_WRITE_4(sc, KR_MIIMCFG, 0);
-
-	/* TODO: calculate prescale */
-	CSR_WRITE_4(sc, KR_ETHMCP, (165000000 / (1250000 + 1)) & ~1);
-
-	/* FIFO Tx threshold level */
-	CSR_WRITE_4(sc, KR_ETHFIFOTT, 0x30);
-
-	CSR_WRITE_4(sc, KR_ETHMAC1, KR_ETH_MAC1_RE);
-
-	sc->kr_link_status = 0;
-	mii_mediachg(mii);
-
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-	callout_reset(&sc->kr_stat_callout, hz, kr_tick, sc);
-}
-
-static void
-kr_start(struct ifnet *ifp)
-{
-	struct kr_softc	 *sc;
-
-	sc = ifp->if_softc;
-
-	KR_LOCK(sc);
-	kr_start_locked(ifp);
-	KR_UNLOCK(sc);
-}
-
-/*
- * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
- * pointers to the fragment pointers.
- */
-static int
-kr_encap(struct kr_softc *sc, struct mbuf **m_head)
-{
-	struct kr_txdesc	*txd;
-	struct kr_desc		*desc, *prev_desc;
-	bus_dma_segment_t	txsegs[KR_MAXFRAGS];
-	uint32_t		link_addr;
-	int			error, i, nsegs, prod, si, prev_prod;
-
-	KR_LOCK_ASSERT(sc);
-
-	prod = sc->kr_cdata.kr_tx_prod;
-	txd = &sc->kr_cdata.kr_txdesc[prod];
-	error = bus_dmamap_load_mbuf_sg(sc->kr_cdata.kr_tx_tag, txd->tx_dmamap,
-	    *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
-	if (error == EFBIG) {
-		panic("EFBIG");
-	} else if (error != 0)
-		return (error);
-	if (nsegs == 0) {
-		m_freem(*m_head);
-		*m_head = NULL;
-		return (EIO);
-	}
-
-	/* Check number of available descriptors. */
-	if (sc->kr_cdata.kr_tx_cnt + nsegs >= (KR_TX_RING_CNT - 1)) {
-		bus_dmamap_unload(sc->kr_cdata.kr_tx_tag, txd->tx_dmamap);
-		return (ENOBUFS);
-	}
-
-	txd->tx_m = *m_head;
-	bus_dmamap_sync(sc->kr_cdata.kr_tx_tag, txd->tx_dmamap,
-	    BUS_DMASYNC_PREWRITE);
-
-	si = prod;
-
-	/* 
-	 * Make a list of descriptors for this packet. DMA controller will
-	 * walk through it while kr_link is not zero. The last one should
-	 * have COF flag set, to pickup next chain from NDPTR
-	 */
-	prev_prod = prod;
-	desc = prev_desc = NULL;
-	for (i = 0; i < nsegs; i++) {
-		desc = &sc->kr_rdata.kr_tx_ring[prod];
-		desc->kr_ctl = KR_DMASIZE(txsegs[i].ds_len) | KR_CTL_IOF;
-		if (i == 0)
-			desc->kr_devcs = KR_DMATX_DEVCS_FD;
-		desc->kr_ca = txsegs[i].ds_addr;
-		desc->kr_link = 0;
-		/* link with previous descriptor */
-		if (prev_desc)
-			prev_desc->kr_link = KR_TX_RING_ADDR(sc, prod);
-
-		sc->kr_cdata.kr_tx_cnt++;
-		prev_desc = desc;
-		KR_INC(prod, KR_TX_RING_CNT);
-	}
-
-	/* 
-	 * Set COF for last descriptor and mark last fragment with LD flag
-	 */
-	if (desc) {
-		desc->kr_ctl |=  KR_CTL_COF;
-		desc->kr_devcs |= KR_DMATX_DEVCS_LD;
-	}
-
-	/* Update producer index. */
-	sc->kr_cdata.kr_tx_prod = prod;
-
-	/* Sync descriptors. */
-	bus_dmamap_sync(sc->kr_cdata.kr_tx_ring_tag,
-	    sc->kr_cdata.kr_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	/* Start transmitting */
-	/* Check if new list is queued in NDPTR */
-	if (KR_DMA_READ_REG(KR_DMA_TXCHAN, DMA_NDPTR) == 0) {
-		/* NDPTR is not busy - start new list */
-		KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_NDPTR, 
-		    KR_TX_RING_ADDR(sc, si));
-	}
-	else {
-		link_addr = KR_TX_RING_ADDR(sc, si);
-		/* Get previous descriptor */
-		si = (si + KR_TX_RING_CNT - 1) % KR_TX_RING_CNT;
-		desc = &sc->kr_rdata.kr_tx_ring[si];
-		desc->kr_link = link_addr;
-	}
-
-	return (0);
-}
-
-static void
-kr_start_locked(struct ifnet *ifp)
-{
-	struct kr_softc		*sc;
-	struct mbuf		*m_head;
-	int			enq;
-
-	sc = ifp->if_softc;
-
-	KR_LOCK_ASSERT(sc);
-
-	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING || sc->kr_link_status == 0 )
-		return;
-
-	for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
-	    sc->kr_cdata.kr_tx_cnt < KR_TX_RING_CNT - 2; ) {
-		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
-		if (m_head == NULL)
-			break;
-		/*
-		 * Pack the data into the transmit ring. If we
-		 * don't have room, set the OACTIVE flag and wait
-		 * for the NIC to drain the ring.
-		 */
-		if (kr_encap(sc, &m_head)) {
-			if (m_head == NULL)
-				break;
-			IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
-			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-			break;
-		}
-
-		enq++;
-		/*
-		 * If there's a BPF listener, bounce a copy of this frame
-		 * to him.
-		 */
-		ETHER_BPF_MTAP(ifp, m_head);
-	}
-}
-
-static void
-kr_stop(struct kr_softc *sc)
-{
-	struct ifnet	    *ifp;
-
-	KR_LOCK_ASSERT(sc);
-
-
-	ifp = sc->kr_ifp;
-	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-	callout_stop(&sc->kr_stat_callout);
-
-	/* mask out RX interrupts */
-	KR_DMA_SETBITS_REG(KR_DMA_RXCHAN, DMA_SM, 
-	    DMA_SM_D | DMA_SM_H | DMA_SM_E);
-
-	/* mask out TX interrupts */
-	KR_DMA_SETBITS_REG(KR_DMA_TXCHAN, DMA_SM, 
-	    DMA_SM_F | DMA_SM_E);
-
-	/* Abort RX DMA transactions */
-	if (KR_DMA_READ_REG(KR_DMA_RXCHAN, DMA_C) & DMA_C_R) {
-		/* Set ABORT bit if trunsuction is in progress */
-		KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_C, DMA_C_ABORT);
-		/* XXX: Add timeout */
-		while ((KR_DMA_READ_REG(KR_DMA_RXCHAN, DMA_S) & DMA_S_H) == 0)
-			DELAY(10);
-		KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_S, 0);
-	}
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_DPTR, 0);
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_NDPTR, 0);
-
-	/* Abort TX DMA transactions */
-	if (KR_DMA_READ_REG(KR_DMA_TXCHAN, DMA_C) & DMA_C_R) {
-		/* Set ABORT bit if trunsuction is in progress */
-		KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_C, DMA_C_ABORT);
-		/* XXX: Add timeout */
-		while ((KR_DMA_READ_REG(KR_DMA_TXCHAN, DMA_S) & DMA_S_H) == 0)
-			DELAY(10);
-		KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_S, 0);
-	}
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_DPTR, 0);
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_NDPTR, 0);
-
-	CSR_WRITE_4(sc, KR_ETHINTFC, 0);
-}
-
-
-static int
-kr_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
-	struct kr_softc		*sc = ifp->if_softc;
-	struct ifreq		*ifr = (struct ifreq *) data;
-	struct mii_data		*mii;
-	int			error;
-
-	switch (command) {
-	case SIOCSIFFLAGS:
-#if 0
-		KR_LOCK(sc);
-		if (ifp->if_flags & IFF_UP) {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
-				if ((ifp->if_flags ^ sc->kr_if_flags) &
-				    (IFF_PROMISC | IFF_ALLMULTI))
-					kr_set_filter(sc);
-			} else {
-				if (sc->kr_detach == 0)
-					kr_init_locked(sc);
-			}
-		} else {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
-				kr_stop(sc);
-		}
-		sc->kr_if_flags = ifp->if_flags;
-		KR_UNLOCK(sc);
-#endif
-		error = 0;
-		break;
-	case SIOCADDMULTI:
-	case SIOCDELMULTI:
-#if 0
-		KR_LOCK(sc);
-		kr_set_filter(sc);
-		KR_UNLOCK(sc);
-#endif
-		error = 0;
-		break;
-	case SIOCGIFMEDIA:
-	case SIOCSIFMEDIA:
-		mii = device_get_softc(sc->kr_miibus);
-		error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
-		break;
-	case SIOCSIFCAP:
-		error = 0;
-#if 0
-		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
-		if ((mask & IFCAP_HWCSUM) != 0) {
-			ifp->if_capenable ^= IFCAP_HWCSUM;
-			if ((IFCAP_HWCSUM & ifp->if_capenable) &&
-			    (IFCAP_HWCSUM & ifp->if_capabilities))
-				ifp->if_hwassist = KR_CSUM_FEATURES;
-			else
-				ifp->if_hwassist = 0;
-		}
-		if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {
-			ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
-			if (IFCAP_VLAN_HWTAGGING & ifp->if_capenable &&
-			    IFCAP_VLAN_HWTAGGING & ifp->if_capabilities &&
-			    ifp->if_drv_flags & IFF_DRV_RUNNING) {
-				KR_LOCK(sc);
-				kr_vlan_setup(sc);
-				KR_UNLOCK(sc);
-			}
-		}
-		VLAN_CAPABILITIES(ifp);
-#endif
-		break;
-	default:
-		error = ether_ioctl(ifp, command, data);
-		break;
-	}
-
-	return (error);
-}
-
-/*
- * Set media options.
- */
-static int
-kr_ifmedia_upd(struct ifnet *ifp)
-{
-	struct kr_softc		*sc;
-	struct mii_data		*mii;
-	struct mii_softc	*miisc;
-	int			error;
-
-	sc = ifp->if_softc;
-	KR_LOCK(sc);
-	mii = device_get_softc(sc->kr_miibus);
-	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
-		PHY_RESET(miisc);
-	error = mii_mediachg(mii);
-	KR_UNLOCK(sc);
-
-	return (error);
-}
-
-/*
- * Report current media status.
- */
-static void
-kr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct kr_softc		*sc = ifp->if_softc;
-	struct mii_data		*mii;
-
-	mii = device_get_softc(sc->kr_miibus);
-	KR_LOCK(sc);
-	mii_pollstat(mii);
-	ifmr->ifm_active = mii->mii_media_active;
-	ifmr->ifm_status = mii->mii_media_status;
-	KR_UNLOCK(sc);
-}
-
-struct kr_dmamap_arg {
-	bus_addr_t	kr_busaddr;
-};
-
-static void
-kr_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	struct kr_dmamap_arg	*ctx;
-
-	if (error != 0)
-		return;
-	ctx = arg;
-	ctx->kr_busaddr = segs[0].ds_addr;
-}
-
-static int
-kr_dma_alloc(struct kr_softc *sc)
-{
-	struct kr_dmamap_arg	ctx;
-	struct kr_txdesc	*txd;
-	struct kr_rxdesc	*rxd;
-	int			error, i;
-
-	/* Create parent DMA tag. */
-	error = bus_dma_tag_create(
-	    bus_get_dma_tag(sc->kr_dev),	/* parent */
-	    1, 0,			/* alignment, boundary */
-	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsize */
-	    0,				/* nsegments */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->kr_cdata.kr_parent_tag);
-	if (error != 0) {
-		device_printf(sc->kr_dev, "failed to create parent DMA tag\n");
-		goto fail;
-	}
-	/* Create tag for Tx ring. */
-	error = bus_dma_tag_create(
-	    sc->kr_cdata.kr_parent_tag,	/* parent */
-	    KR_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    KR_TX_RING_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    KR_TX_RING_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->kr_cdata.kr_tx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->kr_dev, "failed to create Tx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx ring. */
-	error = bus_dma_tag_create(
-	    sc->kr_cdata.kr_parent_tag,	/* parent */
-	    KR_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    KR_RX_RING_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    KR_RX_RING_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->kr_cdata.kr_rx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->kr_dev, "failed to create Rx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Tx buffers. */
-	error = bus_dma_tag_create(
-	    sc->kr_cdata.kr_parent_tag,	/* parent */
-	    sizeof(uint32_t), 0,	/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES * KR_MAXFRAGS,	/* maxsize */
-	    KR_MAXFRAGS,		/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->kr_cdata.kr_tx_tag);
-	if (error != 0) {
-		device_printf(sc->kr_dev, "failed to create Tx DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx buffers. */
-	error = bus_dma_tag_create(
-	    sc->kr_cdata.kr_parent_tag,	/* parent */
-	    KR_RX_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES,			/* maxsize */
-	    1,				/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->kr_cdata.kr_rx_tag);
-	if (error != 0) {
-		device_printf(sc->kr_dev, "failed to create Rx DMA tag\n");
-		goto fail;
-	}
-
-	/* Allocate DMA'able memory and load the DMA map for Tx ring. */
-	error = bus_dmamem_alloc(sc->kr_cdata.kr_tx_ring_tag,
-	    (void **)&sc->kr_rdata.kr_tx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->kr_cdata.kr_tx_ring_map);
-	if (error != 0) {
-		device_printf(sc->kr_dev,
-		    "failed to allocate DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-
-	ctx.kr_busaddr = 0;
-	error = bus_dmamap_load(sc->kr_cdata.kr_tx_ring_tag,
-	    sc->kr_cdata.kr_tx_ring_map, sc->kr_rdata.kr_tx_ring,
-	    KR_TX_RING_SIZE, kr_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.kr_busaddr == 0) {
-		device_printf(sc->kr_dev,
-		    "failed to load DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-	sc->kr_rdata.kr_tx_ring_paddr = ctx.kr_busaddr;
-
-	/* Allocate DMA'able memory and load the DMA map for Rx ring. */
-	error = bus_dmamem_alloc(sc->kr_cdata.kr_rx_ring_tag,
-	    (void **)&sc->kr_rdata.kr_rx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->kr_cdata.kr_rx_ring_map);
-	if (error != 0) {
-		device_printf(sc->kr_dev,
-		    "failed to allocate DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-
-	ctx.kr_busaddr = 0;
-	error = bus_dmamap_load(sc->kr_cdata.kr_rx_ring_tag,
-	    sc->kr_cdata.kr_rx_ring_map, sc->kr_rdata.kr_rx_ring,
-	    KR_RX_RING_SIZE, kr_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.kr_busaddr == 0) {
-		device_printf(sc->kr_dev,
-		    "failed to load DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-	sc->kr_rdata.kr_rx_ring_paddr = ctx.kr_busaddr;
-
-	/* Create DMA maps for Tx buffers. */
-	for (i = 0; i < KR_TX_RING_CNT; i++) {
-		txd = &sc->kr_cdata.kr_txdesc[i];
-		txd->tx_m = NULL;
-		txd->tx_dmamap = NULL;
-		error = bus_dmamap_create(sc->kr_cdata.kr_tx_tag, 0,
-		    &txd->tx_dmamap);
-		if (error != 0) {
-			device_printf(sc->kr_dev,
-			    "failed to create Tx dmamap\n");
-			goto fail;
-		}
-	}
-	/* Create DMA maps for Rx buffers. */
-	if ((error = bus_dmamap_create(sc->kr_cdata.kr_rx_tag, 0,
-	    &sc->kr_cdata.kr_rx_sparemap)) != 0) {
-		device_printf(sc->kr_dev,
-		    "failed to create spare Rx dmamap\n");
-		goto fail;
-	}
-	for (i = 0; i < KR_RX_RING_CNT; i++) {
-		rxd = &sc->kr_cdata.kr_rxdesc[i];
-		rxd->rx_m = NULL;
-		rxd->rx_dmamap = NULL;
-		error = bus_dmamap_create(sc->kr_cdata.kr_rx_tag, 0,
-		    &rxd->rx_dmamap);
-		if (error != 0) {
-			device_printf(sc->kr_dev,
-			    "failed to create Rx dmamap\n");
-			goto fail;
-		}
-	}
-
-fail:
-	return (error);
-}
-
-static void
-kr_dma_free(struct kr_softc *sc)
-{
-	struct kr_txdesc	*txd;
-	struct kr_rxdesc	*rxd;
-	int			i;
-
-	/* Tx ring. */
-	if (sc->kr_cdata.kr_tx_ring_tag) {
-		if (sc->kr_rdata.kr_tx_ring_paddr)
-			bus_dmamap_unload(sc->kr_cdata.kr_tx_ring_tag,
-			    sc->kr_cdata.kr_tx_ring_map);
-		if (sc->kr_rdata.kr_tx_ring)
-			bus_dmamem_free(sc->kr_cdata.kr_tx_ring_tag,
-			    sc->kr_rdata.kr_tx_ring,
-			    sc->kr_cdata.kr_tx_ring_map);
-		sc->kr_rdata.kr_tx_ring = NULL;
-		sc->kr_rdata.kr_tx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->kr_cdata.kr_tx_ring_tag);
-		sc->kr_cdata.kr_tx_ring_tag = NULL;
-	}
-	/* Rx ring. */
-	if (sc->kr_cdata.kr_rx_ring_tag) {
-		if (sc->kr_rdata.kr_rx_ring_paddr)
-			bus_dmamap_unload(sc->kr_cdata.kr_rx_ring_tag,
-			    sc->kr_cdata.kr_rx_ring_map);
-		if (sc->kr_rdata.kr_rx_ring)
-			bus_dmamem_free(sc->kr_cdata.kr_rx_ring_tag,
-			    sc->kr_rdata.kr_rx_ring,
-			    sc->kr_cdata.kr_rx_ring_map);
-		sc->kr_rdata.kr_rx_ring = NULL;
-		sc->kr_rdata.kr_rx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->kr_cdata.kr_rx_ring_tag);
-		sc->kr_cdata.kr_rx_ring_tag = NULL;
-	}
-	/* Tx buffers. */
-	if (sc->kr_cdata.kr_tx_tag) {
-		for (i = 0; i < KR_TX_RING_CNT; i++) {
-			txd = &sc->kr_cdata.kr_txdesc[i];
-			if (txd->tx_dmamap) {
-				bus_dmamap_destroy(sc->kr_cdata.kr_tx_tag,
-				    txd->tx_dmamap);
-				txd->tx_dmamap = NULL;
-			}
-		}
-		bus_dma_tag_destroy(sc->kr_cdata.kr_tx_tag);
-		sc->kr_cdata.kr_tx_tag = NULL;
-	}
-	/* Rx buffers. */
-	if (sc->kr_cdata.kr_rx_tag) {
-		for (i = 0; i < KR_RX_RING_CNT; i++) {
-			rxd = &sc->kr_cdata.kr_rxdesc[i];
-			if (rxd->rx_dmamap) {
-				bus_dmamap_destroy(sc->kr_cdata.kr_rx_tag,
-				    rxd->rx_dmamap);
-				rxd->rx_dmamap = NULL;
-			}
-		}
-		if (sc->kr_cdata.kr_rx_sparemap) {
-			bus_dmamap_destroy(sc->kr_cdata.kr_rx_tag,
-			    sc->kr_cdata.kr_rx_sparemap);
-			sc->kr_cdata.kr_rx_sparemap = 0;
-		}
-		bus_dma_tag_destroy(sc->kr_cdata.kr_rx_tag);
-		sc->kr_cdata.kr_rx_tag = NULL;
-	}
-
-	if (sc->kr_cdata.kr_parent_tag) {
-		bus_dma_tag_destroy(sc->kr_cdata.kr_parent_tag);
-		sc->kr_cdata.kr_parent_tag = NULL;
-	}
-}
-
-/*
- * Initialize the transmit descriptors.
- */
-static int
-kr_tx_ring_init(struct kr_softc *sc)
-{
-	struct kr_ring_data	*rd;
-	struct kr_txdesc	*txd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->kr_cdata.kr_tx_prod = 0;
-	sc->kr_cdata.kr_tx_cons = 0;
-	sc->kr_cdata.kr_tx_cnt = 0;
-	sc->kr_cdata.kr_tx_pkts = 0;
-
-	rd = &sc->kr_rdata;
-	bzero(rd->kr_tx_ring, KR_TX_RING_SIZE);
-	for (i = 0; i < KR_TX_RING_CNT; i++) {
-		if (i == KR_TX_RING_CNT - 1)
-			addr = KR_TX_RING_ADDR(sc, 0);
-		else
-			addr = KR_TX_RING_ADDR(sc, i + 1);
-		rd->kr_tx_ring[i].kr_ctl = KR_CTL_IOF;
-		rd->kr_tx_ring[i].kr_ca = 0;
-		rd->kr_tx_ring[i].kr_devcs = 0;
-		rd->kr_tx_ring[i].kr_link = 0;
-		txd = &sc->kr_cdata.kr_txdesc[i];
-		txd->tx_m = NULL;
-	}
-
-	bus_dmamap_sync(sc->kr_cdata.kr_tx_ring_tag,
-	    sc->kr_cdata.kr_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Initialize the RX descriptors and allocate mbufs for them. Note that
- * we arrange the descriptors in a closed ring, so that the last descriptor
- * points back to the first.
- */
-static int
-kr_rx_ring_init(struct kr_softc *sc)
-{
-	struct kr_ring_data	*rd;
-	struct kr_rxdesc	*rxd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->kr_cdata.kr_rx_cons = 0;
-
-	rd = &sc->kr_rdata;
-	bzero(rd->kr_rx_ring, KR_RX_RING_SIZE);
-	for (i = 0; i < KR_RX_RING_CNT; i++) {
-		rxd = &sc->kr_cdata.kr_rxdesc[i];
-		rxd->rx_m = NULL;
-		rxd->desc = &rd->kr_rx_ring[i];
-		if (i == KR_RX_RING_CNT - 1)
-			addr = KR_RX_RING_ADDR(sc, 0);
-		else
-			addr = KR_RX_RING_ADDR(sc, i + 1);
-		rd->kr_rx_ring[i].kr_ctl = KR_CTL_IOD;
-		if (i == KR_RX_RING_CNT - 1)
-			rd->kr_rx_ring[i].kr_ctl |= KR_CTL_COD;
-		rd->kr_rx_ring[i].kr_devcs = 0;
-		rd->kr_rx_ring[i].kr_ca = 0;
-		rd->kr_rx_ring[i].kr_link = addr;
-		if (kr_newbuf(sc, i) != 0)
-			return (ENOBUFS);
-	}
-
-	bus_dmamap_sync(sc->kr_cdata.kr_rx_ring_tag,
-	    sc->kr_cdata.kr_rx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Initialize an RX descriptor and attach an MBUF cluster.
- */
-static int
-kr_newbuf(struct kr_softc *sc, int idx)
-{
-	struct kr_desc		*desc;
-	struct kr_rxdesc	*rxd;
-	struct mbuf		*m;
-	bus_dma_segment_t	segs[1];
-	bus_dmamap_t		map;
-	int			nsegs;
-
-	m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-	if (m == NULL)
-		return (ENOBUFS);
-	m->m_len = m->m_pkthdr.len = MCLBYTES;
-	m_adj(m, sizeof(uint64_t));
-
-	if (bus_dmamap_load_mbuf_sg(sc->kr_cdata.kr_rx_tag,
-	    sc->kr_cdata.kr_rx_sparemap, m, segs, &nsegs, 0) != 0) {
-		m_freem(m);
-		return (ENOBUFS);
-	}
-	KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
-
-	rxd = &sc->kr_cdata.kr_rxdesc[idx];
-	if (rxd->rx_m != NULL) {
-		bus_dmamap_sync(sc->kr_cdata.kr_rx_tag, rxd->rx_dmamap,
-		    BUS_DMASYNC_POSTREAD);
-		bus_dmamap_unload(sc->kr_cdata.kr_rx_tag, rxd->rx_dmamap);
-	}
-	map = rxd->rx_dmamap;
-	rxd->rx_dmamap = sc->kr_cdata.kr_rx_sparemap;
-	sc->kr_cdata.kr_rx_sparemap = map;
-	bus_dmamap_sync(sc->kr_cdata.kr_rx_tag, rxd->rx_dmamap,
-	    BUS_DMASYNC_PREREAD);
-	rxd->rx_m = m;
-	desc = rxd->desc;
-	desc->kr_ca = segs[0].ds_addr;
-	desc->kr_ctl |= KR_DMASIZE(segs[0].ds_len);
-	rxd->saved_ca = desc->kr_ca ;
-	rxd->saved_ctl = desc->kr_ctl ;
-
-	return (0);
-}
-
-static __inline void
-kr_fixup_rx(struct mbuf *m)
-{
-        int		i;
-        uint16_t	*src, *dst;
-
-	src = mtod(m, uint16_t *);
-	dst = src - 1;
-
-	for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++)
-		*dst++ = *src++;
-
-	m->m_data -= ETHER_ALIGN;
-}
-
-
-static void
-kr_tx(struct kr_softc *sc)
-{
-	struct kr_txdesc	*txd;
-	struct kr_desc		*cur_tx;
-	struct ifnet		*ifp;
-	uint32_t		ctl, devcs;
-	int			cons, prod;
-
-	KR_LOCK_ASSERT(sc);
-
-	cons = sc->kr_cdata.kr_tx_cons;
-	prod = sc->kr_cdata.kr_tx_prod;
-	if (cons == prod)
-		return;
-
-	bus_dmamap_sync(sc->kr_cdata.kr_tx_ring_tag,
-	    sc->kr_cdata.kr_tx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	ifp = sc->kr_ifp;
-	/*
-	 * Go through our tx list and free mbufs for those
-	 * frames that have been transmitted.
-	 */
-	for (; cons != prod; KR_INC(cons, KR_TX_RING_CNT)) {
-		cur_tx = &sc->kr_rdata.kr_tx_ring[cons];
-		ctl = cur_tx->kr_ctl;
-		devcs = cur_tx->kr_devcs;
-		/* Check if descriptor has "finished" flag */
-		if ((ctl & KR_CTL_F) == 0)
-			break;
-
-		sc->kr_cdata.kr_tx_cnt--;
-		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-		txd = &sc->kr_cdata.kr_txdesc[cons];
-
-		if (devcs & KR_DMATX_DEVCS_TOK)
-			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-		else {
-			if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-			/* collisions: medium busy, late collision */
-			if ((devcs & KR_DMATX_DEVCS_EC) || 
-			    (devcs & KR_DMATX_DEVCS_LC))
-				if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
-		}
-
-		bus_dmamap_sync(sc->kr_cdata.kr_tx_tag, txd->tx_dmamap,
-		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->kr_cdata.kr_tx_tag, txd->tx_dmamap);
-
-		/* Free only if it's first descriptor in list */
-		if (txd->tx_m)
-			m_freem(txd->tx_m);
-		txd->tx_m = NULL;
-
-		/* reset descriptor */
-		cur_tx->kr_ctl = KR_CTL_IOF;
-		cur_tx->kr_devcs = 0;
-		cur_tx->kr_ca = 0;
-		cur_tx->kr_link = 0; 
-	}
-
-	sc->kr_cdata.kr_tx_cons = cons;
-
-	bus_dmamap_sync(sc->kr_cdata.kr_tx_ring_tag,
-	    sc->kr_cdata.kr_tx_ring_map, BUS_DMASYNC_PREWRITE);
-}
-
-
-static void
-kr_rx(struct kr_softc *sc)
-{
-	struct kr_rxdesc	*rxd;
-	struct ifnet		*ifp = sc->kr_ifp;
-	int			cons, prog, packet_len, count, error;
-	struct kr_desc		*cur_rx;
-	struct mbuf		*m;
-
-	KR_LOCK_ASSERT(sc);
-
-	cons = sc->kr_cdata.kr_rx_cons;
-
-	bus_dmamap_sync(sc->kr_cdata.kr_rx_ring_tag,
-	    sc->kr_cdata.kr_rx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	for (prog = 0; prog < KR_RX_RING_CNT; KR_INC(cons, KR_RX_RING_CNT)) {
-		cur_rx = &sc->kr_rdata.kr_rx_ring[cons];
-		rxd = &sc->kr_cdata.kr_rxdesc[cons];
-		m = rxd->rx_m;
-
-		if ((cur_rx->kr_ctl & KR_CTL_D) == 0)
-		       break;	
-
-		prog++;
-
-		packet_len = KR_PKTSIZE(cur_rx->kr_devcs);
-		count = m->m_len - KR_DMASIZE(cur_rx->kr_ctl);
-		/* Assume it's error */
-		error = 1;
-
-		if (packet_len != count)
-			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
-		else if (count < 64)
-			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
-		else if ((cur_rx->kr_devcs & KR_DMARX_DEVCS_LD) == 0)
-			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
-		else if ((cur_rx->kr_devcs & KR_DMARX_DEVCS_ROK) != 0) {
-			error = 0;
-			bus_dmamap_sync(sc->kr_cdata.kr_rx_tag, rxd->rx_dmamap,
-			    BUS_DMASYNC_PREREAD);
-			m = rxd->rx_m;
-			kr_fixup_rx(m);
-			m->m_pkthdr.rcvif = ifp;
-			/* Skip 4 bytes of CRC */
-			m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN;
-			if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-
-			KR_UNLOCK(sc);
-			(*ifp->if_input)(ifp, m);
-			KR_LOCK(sc);
-		}
-
-		if (error) {
-			/* Restore CONTROL and CA values, reset DEVCS */
-			cur_rx->kr_ctl = rxd->saved_ctl;
-			cur_rx->kr_ca = rxd->saved_ca;
-			cur_rx->kr_devcs = 0;
-		}
-		else {
-			/* Reinit descriptor */
-			cur_rx->kr_ctl = KR_CTL_IOD;
-			if (cons == KR_RX_RING_CNT - 1)
-				cur_rx->kr_ctl |= KR_CTL_COD;
-			cur_rx->kr_devcs = 0;
-			cur_rx->kr_ca = 0;
-			if (kr_newbuf(sc, cons) != 0) {
-				device_printf(sc->kr_dev, 
-				    "Failed to allocate buffer\n");
-				break;
-			}
-		}
-
-		bus_dmamap_sync(sc->kr_cdata.kr_rx_ring_tag,
-		    sc->kr_cdata.kr_rx_ring_map,
-		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	}
-
-	if (prog > 0) {
-		sc->kr_cdata.kr_rx_cons = cons;
-
-		bus_dmamap_sync(sc->kr_cdata.kr_rx_ring_tag,
-		    sc->kr_cdata.kr_rx_ring_map,
-		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-	}
-}
-
-static void
-kr_rx_intr(void *arg)
-{
-	struct kr_softc		*sc = arg;
-	uint32_t		status;
-
-	KR_LOCK(sc);
-
-	/* mask out interrupts */
-	KR_DMA_SETBITS_REG(KR_DMA_RXCHAN, DMA_SM, 
-	    DMA_SM_D | DMA_SM_H | DMA_SM_E);
-
-	status = KR_DMA_READ_REG(KR_DMA_RXCHAN, DMA_S);
-	if (status & (DMA_S_D | DMA_S_E | DMA_S_H)) {
-		kr_rx(sc);
-
-		if (status & DMA_S_E)
-			device_printf(sc->kr_dev, "RX DMA error\n");
-	}
-
-	/* Reread status */
-	status = KR_DMA_READ_REG(KR_DMA_RXCHAN, DMA_S);
-
-	/* restart DMA RX  if it has been halted */
-	if (status & DMA_S_H) {
-		KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_DPTR, 
-		    KR_RX_RING_ADDR(sc, sc->kr_cdata.kr_rx_cons));
-	}
-
-	KR_DMA_WRITE_REG(KR_DMA_RXCHAN, DMA_S, ~status);
-
-	/* Enable F, H, E interrupts */
-	KR_DMA_CLEARBITS_REG(KR_DMA_RXCHAN, DMA_SM, 
-	    DMA_SM_D | DMA_SM_H | DMA_SM_E);
-
-	KR_UNLOCK(sc);
-}
-
-static void
-kr_tx_intr(void *arg)
-{
-	struct kr_softc		*sc = arg;
-	uint32_t		status;
-
-	KR_LOCK(sc);
-
-	/* mask out interrupts */
-	KR_DMA_SETBITS_REG(KR_DMA_TXCHAN, DMA_SM, 
-	    DMA_SM_F | DMA_SM_E);
-
-	status = KR_DMA_READ_REG(KR_DMA_TXCHAN, DMA_S);
-	if (status & (DMA_S_F | DMA_S_E)) {
-		kr_tx(sc);
-		if (status & DMA_S_E)
-			device_printf(sc->kr_dev, "DMA error\n");
-	}
-
-	KR_DMA_WRITE_REG(KR_DMA_TXCHAN, DMA_S, ~status);
-
-	/* Enable F, E interrupts */
-	KR_DMA_CLEARBITS_REG(KR_DMA_TXCHAN, DMA_SM, 
-	    DMA_SM_F | DMA_SM_E);
-
-	KR_UNLOCK(sc);
-
-}
-
-static void
-kr_rx_und_intr(void *arg)
-{
-
-	panic("interrupt: %s\n", __func__);
-}
-
-static void
-kr_tx_ovr_intr(void *arg)
-{
-
-	panic("interrupt: %s\n", __func__);
-}
-
-static void
-kr_tick(void *xsc)
-{
-	struct kr_softc		*sc = xsc;
-	struct mii_data		*mii;
-
-	KR_LOCK_ASSERT(sc);
-
-	mii = device_get_softc(sc->kr_miibus);
-	mii_tick(mii);
-	callout_reset(&sc->kr_stat_callout, hz, kr_tick, sc);
-}
diff --git a/sys/mips/idt/if_krreg.h b/sys/mips/idt/if_krreg.h
deleted file mode 100644
index 59a2913a3bc..00000000000
--- a/sys/mips/idt/if_krreg.h
+++ /dev/null
@@ -1,286 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2007 
- *	Oleksandr Tymoshenko <gonzo@freebsd.org>. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __IF_KRREG_H__
-#define __IF_KRREG_H__
-
-#define	KR_ETHINTFC 	0x0000	/* Ethernet interface control             */
-#define		ETH_INTFC_EN 	0x0001
-#define		ETH_INTFC_RIP 	0x0004
-#define		ETH_INTFC_EN 	0x0001
-#define	KR_ETHFIFOTT	0x0004	/* Ethernet FIFO transmit threshold       */
-#define	KR_ETHARC   	0x0008	/* Ethernet address recognition control   */
-#define	KR_ETHHASH0 	0x000C	/* Ethernet hash table 0                  */
-#define	KR_ETHHASH1 	0x0010	/* Ethernet hash table 1                  */
-#define	KR_ETHPFS   	0x0024	/* Ethernet pause frame status            */
-#define	KR_ETHMCP   	0x0028	/* Ethernet management clock prescalar    */
-#define	KR_ETHSAL0  	0x0100	/* Ethernet station address 0 low         */
-#define	KR_ETHSAH0  	0x0104	/* Ethernet station address 0 high        */
-#define	KR_ETHSAL1  	0x0108	/* Ethernet station address 1 low         */
-#define	KR_ETHSAH1  	0x010C	/* Ethernet station address 1 high        */
-#define	KR_ETHSAL2  	0x0110	/* Ethernet station address 2 low         */
-#define	KR_ETHSAH2  	0x0114	/* Ethernet station address 2 high        */
-#define	KR_ETHSAL3  	0x0118	/* Ethernet station address 3 low         */
-#define	KR_ETHSAH3  	0x011C	/* Ethernet station address 3 high        */
-#define	KR_ETHRBC   	0x0120	/* Ethernet receive byte count            */
-#define	KR_ETHRPC   	0x0124	/* Ethernet receive packet count          */
-#define	KR_ETHRUPC  	0x0128	/* Ethernet receive undersized packet cnt */
-#define	KR_ETHRFC   	0x012C	/* Ethernet receive fragment count        */
-#define	KR_ETHTBC   	0x0130	/* Ethernet transmit byte count           */
-#define	KR_ETHGPF   	0x0134	/* Ethernet generate pause frame          */
-#define	KR_ETHMAC1 	0x0200	/* Ethernet MAC configuration 1           */
-#define		KR_ETH_MAC1_RE	0x01
-#define		KR_ETH_MAC1_PAF	0x02
-#define		KR_ETH_MAC1_MR	0x80
-#define	KR_ETHMAC2 	0x0204	/* Ethernet MAC configuration 2           */
-#define		KR_ETH_MAC2_FD	0x01
-#define		KR_ETH_MAC2_FLC	0x02
-#define		KR_ETH_MAC2_HFE	0x04
-#define		KR_ETH_MAC2_DC	0x08
-#define		KR_ETH_MAC2_CEN	0x10
-#define		KR_ETH_MAC2_PEN	0x20
-#define		KR_ETH_MAC2_VPE	0x08
-#define	KR_ETHIPGT 	0x0208	/* Ethernet back-to-back inter-packet gap */
-#define	KR_ETHIPGR 	0x020C	/* Ethernet non back-to-back inter-packet gap */
-#define	KR_ETHCLRT 	0x0210	/* Ethernet collision window retry        */
-#define	KR_ETHMAXF 	0x0214	/* Ethernet maximum frame length          */
-#define	KR_ETHMTEST	0x021C	/* Ethernet MAC test                      */
-#define	KR_MIIMCFG 	0x0220	/* MII management configuration           */
-#define		KR_MIIMCFG_R	0x8000 	
-#define	KR_MIIMCMD 	0x0224	/* MII management command                 */
-#define		KR_MIIMCMD_RD 	0x01
-#define		KR_MIIMCMD_SCN 	0x02
-#define	KR_MIIMADDR	0x0228	/* MII management address                 */
-#define	KR_MIIMWTD 	0x022C	/* MII management write data              */
-#define	KR_MIIMRDD 	0x0230	/* MII management read data               */
-#define	KR_MIIMIND 	0x0234	/* MII management indicators              */
-#define		KR_MIIMIND_BSY 	0x1
-#define		KR_MIIMIND_SCN 	0x2
-#define		KR_MIIMIND_NV 	0x4
-#define	KR_ETHCFSA0	0x0240	/* Ethernet control frame station address 0   */
-#define	KR_ETHCFSA1	0x0244	/* Ethernet control frame station address 1   */
-#define	KR_ETHCFSA2	0x0248	/* Ethernet control frame station address 2   */
-
-#define	KR_ETHIPGT_HALF_DUPLEX	0x12
-#define	KR_ETHIPGT_FULL_DUPLEX	0x15
-
-#define KR_TIMEOUT	0xf000
-#define KR_MII_TIMEOUT	0xf000
-
-#define KR_RX_IRQ	40
-#define KR_TX_IRQ	41
-#define KR_RX_UND_IRQ	42
-#define KR_TX_OVR_IRQ	43
-#define RC32434_DMA_BASE_ADDR	MIPS_PHYS_TO_KSEG1(0x18040000)
-#define		DMA_C		0x00
-#define			DMA_C_R		0x01
-#define			DMA_C_ABORT	0x10
-#define		DMA_S		0x04
-#define			DMA_S_F		0x01
-#define			DMA_S_D		0x02
-#define			DMA_S_C		0x04
-#define			DMA_S_E		0x08
-#define			DMA_S_H		0x10
-#define		DMA_SM		0x08
-#define			DMA_SM_F	0x01
-#define			DMA_SM_D	0x02
-#define			DMA_SM_C	0x04
-#define			DMA_SM_E	0x08
-#define			DMA_SM_H	0x10
-#define		DMA_DPTR	0x0C
-#define		DMA_NDPTR	0x10
-
-#define	RC32434_DMA_CHAN_SIZE	0x14
-#define KR_DMA_RXCHAN		0
-#define KR_DMA_TXCHAN		1
-
-#define	KR_DMA_READ_REG(chan, reg) \
-	(*(volatile uint32_t *)	\
-	    (RC32434_DMA_BASE_ADDR + chan * RC32434_DMA_CHAN_SIZE + reg))
-
-#define	KR_DMA_WRITE_REG(chan, reg, val) \
-	((*(volatile uint32_t *)	\
-	    (RC32434_DMA_BASE_ADDR + chan * RC32434_DMA_CHAN_SIZE + reg)) = val)
-
-#define	KR_DMA_SETBITS_REG(chan, reg, bits) \
-	KR_DMA_WRITE_REG((chan), (reg), KR_DMA_READ_REG((chan), (reg)) | (bits))
-
-#define	KR_DMA_CLEARBITS_REG(chan, reg, bits)		\
-	KR_DMA_WRITE_REG((chan), (reg),			\
-	    KR_DMA_READ_REG((chan), (reg)) & ~(bits))
-
-struct kr_desc {
-	uint32_t	kr_ctl;
-	uint32_t	kr_ca;
-	uint32_t	kr_devcs;
-	uint32_t	kr_link;
-};
-
-
-#define KR_DMASIZE(len)		((len)  & ((1 << 18)-1))		
-#define KR_PKTSIZE(len)		((len & 0xffff0000) >> 16)
-
-#define	KR_CTL_COF	0x02000000
-#define	KR_CTL_COD	0x04000000
-#define	KR_CTL_IOF	0x08000000
-#define	KR_CTL_IOD	0x10000000
-#define	KR_CTL_T	0x20000000
-#define	KR_CTL_D	0x40000000
-#define	KR_CTL_F	0x80000000
-
-#define	KR_DMARX_DEVCS_RSV	0x00000001
-#define	KR_DMARX_DEVCS_LD	0x00000002
-#define	KR_DMARX_DEVCS_ROK	0x00000004
-#define	KR_DMARX_DEVCS_FM	0x00000008
-#define	KR_DMARX_DEVCS_MP	0x00000010
-#define	KR_DMARX_DEVCS_BP	0x00000020
-#define	KR_DMARX_DEVCS_VLT	0x00000040
-#define	KR_DMARX_DEVCS_CF	0x00000080
-#define	KR_DMARX_DEVCS_OVR	0x00000100
-#define	KR_DMARX_DEVCS_CRC	0x00000200
-#define	KR_DMARX_DEVCS_CV	0x00000400
-#define	KR_DMARX_DEVCS_DB	0x00000800
-#define	KR_DMARX_DEVCS_LE	0x00001000
-#define	KR_DMARX_DEVCS_LOR	0x00002000
-#define	KR_DMARX_DEVCS_CES	0x00004000
-
-#define	KR_DMATX_DEVCS_FD	0x00000001
-#define	KR_DMATX_DEVCS_LD	0x00000002
-#define	KR_DMATX_DEVCS_OEN	0x00000004
-#define	KR_DMATX_DEVCS_PEN	0x00000008
-#define	KR_DMATX_DEVCS_CEN	0x00000010
-#define	KR_DMATX_DEVCS_HEN	0x00000020
-#define	KR_DMATX_DEVCS_TOK	0x00000040
-#define	KR_DMATX_DEVCS_MP	0x00000080
-#define	KR_DMATX_DEVCS_BP	0x00000100
-#define	KR_DMATX_DEVCS_UND	0x00000200
-#define	KR_DMATX_DEVCS_OF	0x00000400
-#define	KR_DMATX_DEVCS_ED	0x00000800
-#define	KR_DMATX_DEVCS_EC	0x00001000
-#define	KR_DMATX_DEVCS_LC	0x00002000
-#define	KR_DMATX_DEVCS_TD	0x00004000
-#define	KR_DMATX_DEVCS_CRC	0x00008000
-#define	KR_DMATX_DEVCS_LE	0x00010000
-
-#define KR_RX_RING_CNT		128
-#define KR_TX_RING_CNT		128
-#define KR_TX_RING_SIZE		sizeof(struct kr_desc) * KR_TX_RING_CNT
-#define KR_RX_RING_SIZE		sizeof(struct kr_desc) * KR_RX_RING_CNT
-#define KR_RING_ALIGN		sizeof(struct kr_desc)
-#define KR_RX_ALIGN		sizeof(uint32_t)
-#define KR_MAXFRAGS		8
-#define KR_TX_INTR_THRESH	8
-
-#define	KR_TX_RING_ADDR(sc, i)	\
-    ((sc)->kr_rdata.kr_tx_ring_paddr + sizeof(struct kr_desc) * (i))
-#define	KR_RX_RING_ADDR(sc, i)	\
-    ((sc)->kr_rdata.kr_rx_ring_paddr + sizeof(struct kr_desc) * (i))
-#define	KR_INC(x,y)		(x) = (((x) + 1) % y)
-
-struct kr_txdesc {
-	struct mbuf	*tx_m;
-	bus_dmamap_t	tx_dmamap;
-};
-
-struct kr_rxdesc {
-	struct mbuf	*rx_m;
-	bus_dmamap_t	rx_dmamap;
-	struct kr_desc	*desc;
-	/* Use this values on error instead of allocating new mbuf */
-	uint32_t	saved_ctl, saved_ca; 
-};
-
-struct kr_chain_data {
-	bus_dma_tag_t		kr_parent_tag;
-	bus_dma_tag_t		kr_tx_tag;
-	struct kr_txdesc	kr_txdesc[KR_TX_RING_CNT];
-	bus_dma_tag_t		kr_rx_tag;
-	struct kr_rxdesc	kr_rxdesc[KR_RX_RING_CNT];
-	bus_dma_tag_t		kr_tx_ring_tag;
-	bus_dma_tag_t		kr_rx_ring_tag;
-	bus_dmamap_t		kr_tx_ring_map;
-	bus_dmamap_t		kr_rx_ring_map;
-	bus_dmamap_t		kr_rx_sparemap;
-	int			kr_tx_pkts;
-	int			kr_tx_prod;
-	int			kr_tx_cons;
-	int			kr_tx_cnt;
-	int			kr_rx_cons;
-};
-
-struct kr_ring_data {
-	struct kr_desc		*kr_rx_ring;
-	struct kr_desc		*kr_tx_ring;
-	bus_addr_t		kr_rx_ring_paddr;
-	bus_addr_t		kr_tx_ring_paddr;
-};
-
-struct kr_softc {
-	struct ifnet		*kr_ifp;	/* interface info */
-	bus_space_handle_t	kr_bhandle;	/* bus space handle */
-	bus_space_tag_t		kr_btag;	/* bus space tag */
-	device_t		kr_dev;
-	struct resource		*kr_res;
-	int			kr_rid;
-	struct resource		*kr_rx_irq;
-	void			*kr_rx_intrhand;
-	struct resource		*kr_tx_irq;
-	void			*kr_tx_intrhand;
-	struct resource		*kr_rx_und_irq;
-	void			*kr_rx_und_intrhand;
-	struct resource		*kr_tx_ovr_irq;
-	void			*kr_tx_ovr_intrhand;
-	device_t		kr_miibus;
-	bus_dma_tag_t		kr_parent_tag;
-	bus_dma_tag_t		kr_tag;
-	struct mtx		kr_mtx;
-	struct callout		kr_stat_callout;
-	struct task		kr_link_task;
-	struct kr_chain_data	kr_cdata;
-	struct kr_ring_data	kr_rdata;
-	int			kr_link_status;
-	int			kr_detach;
-};
-
-#define	KR_LOCK(_sc)		mtx_lock(&(_sc)->kr_mtx)
-#define	KR_UNLOCK(_sc)		mtx_unlock(&(_sc)->kr_mtx)
-#define	KR_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->kr_mtx, MA_OWNED)
-
-/*
- * register space access macros
- */
-#define CSR_WRITE_4(sc, reg, val)	\
-	bus_space_write_4(sc->kr_btag, sc->kr_bhandle, reg, val)
-
-#define CSR_READ_4(sc, reg)		\
-	bus_space_read_4(sc->kr_btag, sc->kr_bhandle, reg)
-
-#endif /* __IF_KRREG_H__ */
diff --git a/sys/mips/idt/obio.c b/sys/mips/idt/obio.c
deleted file mode 100644
index 3c3d2810583..00000000000
--- a/sys/mips/idt/obio.c
+++ /dev/null
@@ -1,484 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2007, Oleksandr Tymoshenko <gonzo@freebsd.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/idt/idtreg.h>
-#include <mips/idt/obiovar.h>
-
-#define ICU_REG_READ(o) \
-    *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_ICU + (o)))
-#define ICU_REG_WRITE(o,v) (ICU_REG_READ(o)) = (v)
-
-#define GPIO_REG_READ(o) \
-    *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_GPIO + (o)))
-#define GPIO_REG_WRITE(o,v) (GPIO_REG_READ(o)) = (v)
-
-static int	obio_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	obio_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		obio_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	obio_attach(device_t);
-static int	obio_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		obio_get_resource_list(device_t, device_t);
-static void	obio_hinted_child(device_t, const char *, int);
-static int	obio_intr(void *);
-static int	obio_probe(device_t);
-static int	obio_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	obio_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	obio_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-
-static void 
-obio_mask_irq(void *arg)
-{
-	unsigned int irq = (unsigned int)arg;
-	int ip_bit, mask, mask_register;
-
-	/* mask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask | ip_bit);
-}
-
-static void 
-obio_unmask_irq(void *arg)
-{
-	unsigned int irq = (unsigned int)arg;
-	int ip_bit, mask, mask_register;
-
-	/* unmask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask & ~ip_bit);
-}
-
-static int
-obio_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int rid, irq;
-
-	sc->oba_mem_rman.rm_type = RMAN_ARRAY;
-	sc->oba_mem_rman.rm_descr = "OBIO memeory";
-	if (rman_init(&sc->oba_mem_rman) != 0 ||
-	    rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START,
-	        OBIO_MEM_START + OBIO_MEM_SIZE) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, IRQ_BASE, IRQ_END) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	/* Hook up our interrupt handlers. We should handle IRQ0..IRQ4*/
-	for(irq = 0; irq < 5; irq++) {
-		if ((sc->sc_irq[irq] = bus_alloc_resource(dev, SYS_RES_IRQ, 
-		    &rid, irq, irq, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-			device_printf(dev, "unable to allocate IRQ resource\n");
-			return (ENXIO);
-		}
-
-		if ((bus_setup_intr(dev, sc->sc_irq[irq], INTR_TYPE_MISC, 
-		    obio_intr, NULL, sc, &sc->sc_ih[irq]))) {
-			device_printf(dev,
-			    "WARNING: unable to register interrupt handler\n");
-			return (ENXIO);
-		}
-	}
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct obio_softc		*sc = device_get_softc(bus);
-	struct obio_ivar		*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end));
-	needactivate = flags & RF_ACTIVE;
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL)
-			return (NULL);
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->oba_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-obio_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-obio_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = obio_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-obio_setup_intr(device_t dev, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, ip_bit, error, mask, mask_register;
-
-	irq = rman_get_start(ires);
-
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    obio_mask_irq, obio_unmask_irq,
-		    NULL, NULL,
-		    "obio intr%d:", irq);
-
-		sc->sc_eventstab[irq] = event;
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	/* unmask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask & ~ip_bit);
-
-	return (0);
-}
-
-static int
-obio_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int irq, result;
-	uint32_t mask_register, mask, ip_bit;
-
-	irq = rman_get_start(ires);
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	/* mask IRQ */
-	mask_register = ICU_IRQ_MASK_REG(irq);
-	ip_bit = ICU_IP_BIT(irq);
-
-	mask = ICU_REG_READ(mask_register);
-	ICU_REG_WRITE(mask_register, mask | ip_bit);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-}
-
-static int
-obio_intr(void *arg)
-{
-	struct obio_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t irqstat, ipend, imask, xpend;
-	int irq, thread, group, i;
-
-	irqstat = 0;
-	irq = 0;
-	for (group = 2; group <= 6; group++) {
-		ipend = ICU_REG_READ(ICU_GROUP_IPEND_REG(group));
-		imask = ICU_REG_READ(ICU_GROUP_MASK_REG(group));
-		xpend = ipend;
-		ipend &= ~imask;
-
-		while ((i = fls(xpend)) != 0) {
-			xpend &= ~(1 << (i - 1));
-			irq = IP_IRQ(group, i - 1);
-		}
-	
-		while ((i = fls(ipend)) != 0) {
-			ipend &= ~(1 << (i - 1));
-			irq = IP_IRQ(group, i - 1);
-			event = sc->sc_eventstab[irq];
-			thread = 0;
-			if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
-				/* TODO: Log stray IRQs */
-				continue;
-			}
-
-			/* TODO: frame instead of NULL? */
-			intr_event_handle(event, NULL);
-			/* XXX: Log stray IRQs */
-		}
-	}
-#if 0
-	ipend = ICU_REG_READ(ICU_IPEND2);
-	printf("ipend2 = %08x!\n", ipend);
-
-	ipend = ICU_REG_READ(ICU_IPEND3);
-	printf("ipend3 = %08x!\n", ipend);
-
-	ipend = ICU_REG_READ(ICU_IPEND4);
-	printf("ipend4 = %08x!\n", ipend);
-	ipend = ICU_REG_READ(ICU_IPEND5);
-	printf("ipend5 = %08x!\n", ipend);
-
-	ipend = ICU_REG_READ(ICU_IPEND6);
-	printf("ipend6 = %08x!\n", ipend);
-#endif
-	while (irqstat != 0) {
-		if ((irqstat & 1) == 1) {
-		}
-
-		irq++;
-		irqstat >>= 1;
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-obio_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t		child;
-	long			maddr;
-	int			msize;
-	int			irq;
-	int			result;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	resource_long_value(dname, dunit, "maddr", &maddr);
-	resource_int_value(dname, dunit, "msize", &msize);
-
-
-	result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-	    maddr, msize);
-	if (result != 0)
-		device_printf(bus, "warning: bus_set_resource() failed\n");
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static device_t
-obio_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct obio_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-obio_get_resource_list(device_t dev, device_t child)
-{
-	struct obio_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-static device_method_t obio_methods[] = {
-	DEVMETHOD(bus_activate_resource,	obio_activate_resource),
-	DEVMETHOD(bus_add_child,		obio_add_child),
-	DEVMETHOD(bus_alloc_resource,		obio_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	obio_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	obio_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		obio_hinted_child),
-	DEVMETHOD(bus_release_resource,		obio_release_resource),
-	DEVMETHOD(bus_setup_intr,		obio_setup_intr),
-	DEVMETHOD(bus_teardown_intr,		obio_teardown_intr),
-	DEVMETHOD(device_attach,		obio_attach),
-	DEVMETHOD(device_probe,			obio_probe),
-        DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-        DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/idt/obiovar.h b/sys/mips/idt/obiovar.h
deleted file mode 100644
index b5b6392d03c..00000000000
--- a/sys/mips/idt/obiovar.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _ADM5120_OBIOVAR_H_
-#define	_ADM5120_OBIOVAR_H_
-
-#include <sys/rman.h>
-
-/* Number of controller's IRQs */
-#define	NIRQS	32*5
-
-/* Number of CPU IRQ lines */
-#define	MIPS_IRQS	5
-
-#define	OBIO_MEM_START	0x18000000L
-#define	OBIO_MEM_SIZE	0x200000
-
-struct obio_softc {
-	struct rman		oba_mem_rman;
-	struct rman		oba_irq_rman;
-	struct intr_event	*sc_eventstab[NIRQS];	/* IRQ events structs */
-	struct resource		*sc_irq[MIPS_IRQS];	/* IRQ resource */
-	void			*sc_ih[MIPS_IRQS];	/* interrupt cookie */
-};
-
-struct obio_ivar {
-	struct resource_list	resources;
-};
-
-#endif /* _ADM5120_OBIOVAR_H_ */
diff --git a/sys/mips/idt/std.idt b/sys/mips/idt/std.idt
deleted file mode 100644
index 5457c276a43..00000000000
--- a/sys/mips/idt/std.idt
+++ /dev/null
@@ -1,6 +0,0 @@
-# $FreeBSD$
-# Standard include file for IDT
-
-files	"../idt/files.idt"
-
-machine		mips mipsel
diff --git a/sys/mips/idt/uart_bus_rc32434.c b/sys/mips/idt/uart_bus_rc32434.c
deleted file mode 100644
index 2a249ef6a06..00000000000
--- a/sys/mips/idt/uart_bus_rc32434.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#include <mips/idt/idtreg.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <dev/ic/ns16550.h>
-
-#include "uart_if.h"
-
-static int uart_rc32434_probe(device_t dev);
-
-extern struct uart_class uart_rc32434_uart_class;
-
-static device_method_t uart_rc32434_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_rc32434_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_rc32434_driver = {
-	uart_driver_name,
-	uart_rc32434_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_rc32434_probe(device_t dev)
-{
-	struct uart_softc *sc;
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.regshft = 2;
-	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
-	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
-	sc->sc_bas.regshft = 2;
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
-
-	return (uart_bus_probe(dev, 2, 0, 330000000UL/2, 0, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_rc32434_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/idt/uart_cpu_rc32434.c b/sys/mips/idt/uart_cpu_rc32434.c
deleted file mode 100644
index 52fa702a2f7..00000000000
--- a/sys/mips/idt/uart_cpu_rc32434.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-extern struct uart_class uart_rc32434_uart_class;
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	uint32_t maddr;
-
-	if (resource_int_value("uart", 0, "maddr", &maddr) != 0 ||
-	    maddr == 0)
-		return (ENXIO);
-
-	/* Got it. Fill in the instance and return it. */
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = mips_bus_space_generic;
-	di->bas.regshft = 2;
-	di->bas.rclk = 330000000UL/2; /* IPbus clock */
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-	uart_bus_space_io = 0;
-	uart_bus_space_mem = mips_bus_space_generic;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(maddr);
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_timer.c b/sys/mips/ingenic/jz4780_timer.c
index e3cd04f068b..36e5eca1f79 100644
--- a/sys/mips/ingenic/jz4780_timer.c
+++ b/sys/mips/ingenic/jz4780_timer.c
@@ -283,6 +283,7 @@ DELAY(int usec)
 			}
 		return;
 	}
+	TSENTER();
 
 	/*
 	 * Some of the other timers in the source tree do this calculation as:
@@ -327,6 +328,7 @@ DELAY(int usec)
 		previous = now;
 		remaining -= delta;
 	}
+	TSEXIT();
 }
 
 void
diff --git a/sys/mips/mips/tick.c b/sys/mips/mips/tick.c
index c415d7d1b2d..74296a0bd6d 100644
--- a/sys/mips/mips/tick.c
+++ b/sys/mips/mips/tick.c
@@ -197,6 +197,7 @@ DELAY(int n)
 {
 	uint32_t cur, last, delta, usecs;
 
+	TSENTER();
 	/*
 	 * This works by polling the timer and counting the number of
 	 * microseconds that go by.
@@ -220,6 +221,7 @@ DELAY(int n)
 			delta %= cycles_per_usec;
 		}
 	}
+	TSEXIT();
 }
 
 static int
diff --git a/sys/mips/nlm/tick.c b/sys/mips/nlm/tick.c
index 5993c892865..66d192445fb 100644
--- a/sys/mips/nlm/tick.c
+++ b/sys/mips/nlm/tick.c
@@ -198,6 +198,7 @@ DELAY(int n)
 {
 	uint32_t cur, last, delta, usecs;
 
+	TSENTER();
 	/*
 	 * This works by polling the timer and counting the number of
 	 * microseconds that go by.
@@ -221,6 +222,7 @@ DELAY(int n)
 			delta %= cycles_per_usec;
 		}
 	}
+	TSEXIT();
 }
 
 static int
diff --git a/sys/mips/rmi/Makefile.msgring b/sys/mips/rmi/Makefile.msgring
deleted file mode 100644
index d04978e5d1f..00000000000
--- a/sys/mips/rmi/Makefile.msgring
+++ /dev/null
@@ -1,14 +0,0 @@
-RM = rm
-MSGRNG_CFG = msgring.cfg
-
-MSGRNG_CFG_C = $(patsubst %.cfg,%.c,$(MSGRNG_CFG))
-
-#all: msgring.l msgring.y msgring.cfg
-all: $(MSGRNG_CFG)
-	flex -omsgring.lex.c msgring.l
-	bison -d -omsgring.yacc.c  msgring.y
-	gcc -g3 msgring.lex.c msgring.yacc.c -o msgring
-	./msgring -i $(MSGRNG_CFG) -o $(MSGRNG_CFG_C)
-
-clean:
-	$(RM) -f msgring.lex.c msgring.yacc.c msgring.yacc.h msgring msgring.o*
diff --git a/sys/mips/rmi/board.c b/sys/mips/rmi/board.c
deleted file mode 100644
index b035ba27171..00000000000
--- a/sys/mips/rmi/board.c
+++ /dev/null
@@ -1,595 +0,0 @@
-/*********************************************************************
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- *
- * Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * *****************************RMI_2**********************************/
-#include <sys/cdefs.h>		/* RCS ID & Copyright macro defns */
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/cpufunc.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/rmi_boot_info.h>
-#include <mips/rmi/board.h>
-#include <mips/rmi/pic.h>
-
-#define XLR_I2C_RTC_ADDR 		0xd0
-#define XLR_I2C_EEPROM_ADDR 		0xa0
-#define XLR_I2C_TEMPSENSOR_ADDR     	0x98 
-#define XLR_I2C_ATX8_TEMPSENSOR_ADDR	0x9a
-
-struct stn_cc *xlr_core_cc_configs[] = { &cc_table_cpu_0, &cc_table_cpu_1,
-    &cc_table_cpu_2, &cc_table_cpu_3, &cc_table_cpu_4, &cc_table_cpu_5,
-    &cc_table_cpu_6, &cc_table_cpu_7};
-
-struct stn_cc *xls_core_cc_configs[] = { &xls_cc_table_cpu_0, &xls_cc_table_cpu_1,
-   &xls_cc_table_cpu_2, &xls_cc_table_cpu_3 };
-
-struct xlr_board_info xlr_board_info;
-
-static int
-xlr_pcmcia_present(void)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
-	uint32_t resetconf;
-
-	resetconf = xlr_read_reg(mmio, 21);
-	return ((resetconf & 0x4000) != 0);
-}
-
-static void
-xlr_chip_specific_overrides(struct xlr_board_info* board)
-{
-	struct xlr_gmac_block_t *blk0, *blk1, *blk2;
-	uint32_t chipid;
-	uint32_t revision;
-
-	blk0 = &board->gmac_block[0];
-	blk1 = &board->gmac_block[1];
-	blk2 = &board->gmac_block[2];
-
-	chipid = xlr_processor_id();
-	revision = xlr_revision();
-	
-	if (revision == 0x04) { /* B2 */
-		switch (chipid) { 
-		case 0x07:  /* XLR 508 */
-		case 0x08:  /* XLR 516 */
-		case 0x09:  /* XLR 532 */
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-		case 0x06:  /* XLR 308 */
-			/* NA0 has 3 ports */
-			blk0->gmac_port[3].valid = 0;
-			blk0->num_ports--;
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-		default:
-			break;
-		}
-	} else if (revision == 0x91) { /* C4 */
-		switch (chipid) { 
-		case 0x0B:  /* XLR 508 */
-		case 0x0A:  /* XLR 516 */
-		case 0x08:  /* XLR 532 */
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-		case 0x0F:  /* XLR 308 */
-			/* NA0 has 3 ports */
-			blk0->gmac_port[3].valid = 0;
-			blk0->num_ports--;
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-		default:
-			break;
-		}
-	} else { /* other pre-production silicon */
-		switch (chipid) { 
-			/* XLR 5xx */
-		case 0x0B:
-		case 0x0A:
-		case 0x07:
-		case 0x08:
-		case 0x09:
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-			/* XLR 3xx */
-		case 0x0F:
-		case 0x06:
-			/* NA0 has 3 ports */
-			blk0->gmac_port[3].valid = 0;
-			blk0->num_ports--;
-			/* NA[12] not available */
-			memset(blk1, 0, sizeof(*blk1));
-			memset(blk2, 0, sizeof(*blk2));
-			break;
-		default:
-			break;
-		}
-	}
-}
-
-static void
-xlr_board_specific_overrides(struct xlr_board_info* board)
-{
-	struct xlr_gmac_block_t *blk1, *blk2;
-
-	blk1 = &board->gmac_block[1];
-	blk2 = &board->gmac_block[2];
-
-	switch (xlr_boot1_info.board_major_version) {
-	case RMI_XLR_BOARD_ARIZONA_I: 
-		/* ATX-I has SPI-4, not XGMAC */
-		blk1->type = XLR_SPI4;
-		blk1->enabled = 0;     /* nlge does not
-							 support SPI-4 */
-		blk2->type = XLR_SPI4;
-		blk2->enabled = 0;
-		break;
-
-	case RMI_XLR_BOARD_ARIZONA_II:
-		/* XGMII_A --> VSC7281, XGMII_B --> VSC7281 */
-		blk1->enabled = 1;
-		blk1->num_ports = 1;
-		blk1->gmac_port[0].valid = 1;
-
-		blk2->enabled = 1;
-		blk2->num_ports = 1;
-		blk2->gmac_port[0].valid = 1;
-	default:
-		break;
-	}
-}
-
-static int
-quad0_xaui(void)
-{
-	xlr_reg_t *gpio_mmio =
-	    (unsigned int *)(DEFAULT_XLR_IO_BASE + XLR_IO_GPIO_OFFSET);
-	uint32_t bit24;
-
-	bit24 = (xlr_read_reg(gpio_mmio, 0x15) >> 24) & 0x1;
-	return (bit24);
-}
-
-static int
-quad1_xaui(void)
-{
-	xlr_reg_t *gpio_mmio =
-	    (unsigned int *)(DEFAULT_XLR_IO_BASE + XLR_IO_GPIO_OFFSET);
-	uint32_t bit25;
-
-	bit25 = (xlr_read_reg(gpio_mmio, 0x15) >> 25) & 0x1;
-	return (bit25);
-}
-
-static void
-xls_chip_specific_overrides(struct xlr_board_info* board)
-{
-	struct xlr_gmac_block_t *blk0, *blk1;
-	uint32_t chipid;
-
-	blk0 = &board->gmac_block[0];
-	blk1 = &board->gmac_block[1];
-	chipid = xlr_processor_id();
-	
-	switch (chipid) { 
-	case 0x8E: 	/* XLS208 */
-	case 0x8F: 	/* XLS204 */
-		/* NA1 is not available */
-		memset(blk1, 0, sizeof(*blk1));
-		break;
-	case 0xCE:	/* XLS108 */
-	case 0xCF:	/* XLS104 */
-		/* NA0 has 3 ports */
-		blk0->gmac_port[3].valid = 0;
-		blk0->num_ports--;
-		/* NA1 is not available */
-		memset(blk1, 0, sizeof(*blk1));
-		break;
-	default:
-		break;
-	}
-}
-
-static void
-xls_board_specific_overrides(struct xlr_board_info* board)
-{
-	struct xlr_gmac_block_t *blk0, *blk1;
-	int i;
-	struct xlr_i2c_dev_t* iic_blk;
-
-	blk0 = &board->gmac_block[0];
-	blk1 = &board->gmac_block[1];
-
-	switch (xlr_boot1_info.board_major_version) {
-	case RMI_XLR_BOARD_ARIZONA_VI:
-		blk0->mode = XLR_PORT0_RGMII;
-		blk0->gmac_port[0].type = XLR_RGMII;
-		blk0->gmac_port[0].phy_addr = 0;
-		blk0->gmac_port[0].mii_addr = XLR_IO_GMAC_4_OFFSET;
-		/* Because of the Octal PHY, SGMII Quad1 is MII is also bound
-		 * to the PHY attached to SGMII0_MDC/MDIO/MDINT. */
-		for (i = 0; i < 4; i++) {
-			blk1->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET;
-			blk1->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-		}
-		blk1->gmac_port[1].mii_addr = XLR_IO_GMAC_0_OFFSET;
-		blk1->gmac_port[2].mii_addr = XLR_IO_GMAC_0_OFFSET;
-		blk1->gmac_port[3].mii_addr = XLR_IO_GMAC_0_OFFSET;
-
-		blk1->gmac_port[1].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-		blk1->gmac_port[2].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-		blk1->gmac_port[3].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-
-		/* RGMII MDIO interrupt is thru NA1 and SGMII MDIO 
-		 * interrupts for ports in blk1 are from NA0 */
-		blk0->gmac_port[0].mdint_id = 1;
-
-		blk1->gmac_port[0].mdint_id = 0;
-		blk1->gmac_port[1].mdint_id = 0;
-		blk1->gmac_port[2].mdint_id = 0;
-		blk1->gmac_port[3].mdint_id = 0;
-
-		/* If we have a 4xx lite chip, don't enable the 
-		 * GMACs which are disabled in hardware */
-		if (xlr_is_xls4xx_lite()) {
-			xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
-			uint32_t tmp;
-
-			/* Port 6 & 7 are not enabled on the condor 4xx, figure
-			 * this out from the GPIO fuse bank */
-			tmp = xlr_read_reg(mmio, 35);
-			if ((tmp & (3 << 28)) != 0) {
-				blk1->enabled = 0x3;
-				blk1->gmac_port[2].valid = 0;
-				blk1->gmac_port[3].valid = 0;
-				blk1->num_ports = 2;
-			}
-		}
-		break;
-
-	case RMI_XLR_BOARD_ARIZONA_VIII:
-		iic_blk = &xlr_board_info.xlr_i2c_device[I2C_THERMAL];
-		if (iic_blk->enabled) {
-			iic_blk->addr = XLR_I2C_ATX8_TEMPSENSOR_ADDR;
-		}	
-		if (blk1->enabled) { 
-			/* There is just one Octal PHY on the board and it is 
-			 * connected to the MII interface for NA Quad 0. */
-			for (i = 0; i < 4; i++) { 
-				blk1->gmac_port[i].mii_addr =
-				    XLR_IO_GMAC_0_OFFSET; 
-				blk1->gmac_port[i].mdint_id = 0; 
-			} 
-		}
-		break;
-
-	case RMI_XLR_BOARD_ARIZONA_XI:
-	case RMI_XLR_BOARD_ARIZONA_XII:
-		if (quad0_xaui()) { /* GMAC ports 0-3 are set to XAUI */
-			/* only GMAC0 is active i.e, the 0-th port on this quad.
-			 * Disable all the other 7 possible ports. */
-			for (i = 1; i < MAX_NA_PORTS; i++) {
-				memset(&blk0->gmac_port[i], 0,
-				    sizeof(blk0->gmac_port[i]));
-			}
-			/* Setup for XAUI on N/w Acc0: gmac0 */
-			blk0->type 		= XLR_XGMAC;
-			blk0->mode 		= XLR_XAUI;
-			blk0->num_ports 	= 1;
-			blk0->gmac_port[0].type = XLR_XAUI;
-			blk1->gmac_port[0].phy_addr = 16;
-			blk0->gmac_port[0].tx_bucket_id = blk0->station_txbase;
-			/* Other addresses etc need not be modified as XAUI_0
-			 * shares its addresses with SGMII GMAC_0, which was 
-			 * set in the caller. */
-		}
-		else {
-			blk0->num_ports 	= 1;  /* only 1 RGMII port */ 
-			blk0->mode = XLR_PORT0_RGMII;
-			blk0->gmac_port[0].type = XLR_RGMII;
-			blk0->gmac_port[0].phy_addr = 0;
-			blk0->gmac_port[0].mii_addr = XLR_IO_GMAC_0_OFFSET;
-		}
-
-		if (quad1_xaui()) { /* GMAC ports 4-7 are used for XAUI */
-			/* only GMAC4 is active i.e, the 0-th port on this quad.
-			 * Disable all the other 7 possible ports. */
-			for (i = 1; i < MAX_NA_PORTS; i++) {
-				memset(&blk1->gmac_port[i], 0,
-				    sizeof(blk1->gmac_port[i]));
-			}
-			/* Setup for XAUI on N/w Acc1: gmac4 */
-			blk1->type 		= XLR_XGMAC;
-			blk1->mode 		= XLR_XAUI;
-			blk1->num_ports 	= 1;
-			/* XAUI and SGMII ports share FMN buckets on N/w Acc 1;
-			   so, station_txbase, station_rfr need not be
-			   patched up. */
-			blk1->gmac_port[0].type = XLR_XAUI;
-			blk1->gmac_port[0].phy_addr = 16;
-			blk1->gmac_port[0].tx_bucket_id = blk1->station_txbase;
-			/* Other addresses etc need not be modified as XAUI_1
-			 * shares its addresses with SGMII GMAC_4, which was 
-			 * set in the caller. */
-		}
-		break;
-
-	default:
-		break;
-	}
-}
-
-/*
- * All our knowledge of chip and board that cannot be detected by probing
- * at run-time goes here
- */
-int 
-xlr_board_info_setup()
-{
-	struct xlr_gmac_block_t *blk0, *blk1, *blk2;
-	struct xlr_i2c_dev_t* iic_blk;
-	int i;
-
-	/* This setup code is long'ish because the same base driver
-	 * (if_nlge.c) is used for different: 
-	 *    - CPUs (XLR/XLS)
-	 *    - boards (for each CPU, multiple board configs are possible
-	 *	        and available).
-	 *
-	 * At the time of writing, there are atleast 12 boards, 4 with XLR 
-	 * and 8 with XLS. This means that the base driver needs to work with
-	 * 12 different configurations, with varying levels of differences. 
-	 * To accomodate the different configs, the xlr_board_info struct
-	 * has various attributes for paramters that could be different. 
-	 * These attributes are setup here and can be used directly in the 
-	 * base driver. 
-	 * It was seen that the setup code is not entirely trivial and
-	 * it is possible to organize it in different ways. In the following,
-	 * we choose an approach that sacrifices code-compactness/speed for
-	 * readability. This is because configuration code executes once
-	 * per reboot and hence has a minimal performance impact.
-	 * On the other hand, driver debugging/enhancements require 
-	 * that different engineers can quickly comprehend the setup 
-	 * sequence. Hence, readability is seen as the key requirement for
-	 * this code. It is for the reader to decide how much of this
-	 * requirement is met with the current code organization !!
-	 *
-	 * The initialization is organized thus: 
-	 *
-	 * if (CPU is XLS) {
-	 *    // initialize per XLS architecture
-	 *       // default inits (per chip spec)
-	 *       // chip-specific overrides
-	 *       // board-specific overrides
-	 * } else if (CPU is XLR) {
-	 *    // initialize per XLR architecture
-	 *       // default inits (per chip spec)
-	 *       // chip-specific overrides
-	 *       // board-specific overrides
-	 * }
-	 * 
-	 * For each CPU family, all the default initializations
-	 * are done for a fully-loaded device of that family. 
-	 * This configuration is then adjusted for the actual
-	 * chip id. This is followed up with board specific
-	 * overrides. 
-	 */
-
-	/* start with a clean slate */
-	memset(&xlr_board_info, 0, sizeof(xlr_board_info));
-	xlr_board_info.ata =  xlr_pcmcia_present();
-
-	blk0 = &xlr_board_info.gmac_block[0];
-	blk1 = &xlr_board_info.gmac_block[1];
-	blk2 = &xlr_board_info.gmac_block[2];
-	
-	iic_blk = xlr_board_info.xlr_i2c_device;
-	iic_blk[I2C_RTC].enabled = 1;
-	iic_blk[I2C_RTC].addr = XLR_I2C_RTC_ADDR;
-	iic_blk[I2C_THERMAL].enabled = 1;
-	iic_blk[I2C_THERMAL].addr = XLR_I2C_TEMPSENSOR_ADDR;
-	iic_blk[I2C_EEPROM].enabled = 1;
-	iic_blk[I2C_EEPROM].addr = XLR_I2C_EEPROM_ADDR;
-
-	if (xlr_is_xls()) {
-		xlr_board_info.is_xls = 1;
-		xlr_board_info.nr_cpus = 8;
-		xlr_board_info.usb = 1;
-		/* Board version 8 has NAND flash */
-		xlr_board_info.cfi =
-		    (xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII);
-		xlr_board_info.pci_irq = 0;
-		xlr_board_info.credit_configs = xls_core_cc_configs;
-		xlr_board_info.bucket_sizes   = &xls_bucket_sizes;
-		xlr_board_info.gmacports      = MAX_NA_PORTS;
-
-		/* ---------------- Network Acc 0 ---------------- */
-
-		blk0->type 		= XLR_GMAC;
-		blk0->enabled 		= 0xf;
-		blk0->credit_config 	= &xls_cc_table_gmac0;
-		blk0->station_id 	= MSGRNG_STNID_GMAC;
-		blk0->station_txbase 	= MSGRNG_STNID_GMACTX0;
-		blk0->station_rfr 	= MSGRNG_STNID_GMACRFR_0;
-		blk0->mode 		= XLR_SGMII;
-		blk0->baseaddr 		= XLR_IO_GMAC_0_OFFSET;
-		blk0->baseirq 		= PIC_GMAC_0_IRQ;
-		blk0->baseinst 		= 0;
-
-		/* By default, assume SGMII is setup. But this can change based 
-		   on board-specific or setting-specific info. */
-		for (i = 0; i < 4; i++) {
-			blk0->gmac_port[i].valid = 1;
-			blk0->gmac_port[i].instance = i + blk0->baseinst;
-			blk0->gmac_port[i].type = XLR_SGMII;
-			blk0->gmac_port[i].phy_addr = i + 16;
-			blk0->gmac_port[i].tx_bucket_id = 
-			    blk0->station_txbase + i;
-			blk0->gmac_port[i].mdint_id = 0;
-			blk0->num_ports++;
-			blk0->gmac_port[i].base_addr = XLR_IO_GMAC_0_OFFSET + i * 0x1000;
-			blk0->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET;
-			blk0->gmac_port[i].pcs_addr = XLR_IO_GMAC_0_OFFSET;
-			blk0->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-		}
-
-		/* ---------------- Network Acc 1 ---------------- */
-		blk1->type 		= XLR_GMAC;
-		blk1->enabled 		= 0xf;
-		blk1->credit_config 	= &xls_cc_table_gmac1;
-		blk1->station_id 	= MSGRNG_STNID_GMAC1;
-		blk1->station_txbase 	= MSGRNG_STNID_GMAC1_TX0;
-		blk1->station_rfr 	= MSGRNG_STNID_GMAC1_FR_0;
-		blk1->mode 		= XLR_SGMII;
-		blk1->baseaddr 		= XLR_IO_GMAC_4_OFFSET;
-		blk1->baseirq 		= PIC_XGS_0_IRQ;
-		blk1->baseinst 		= 4;
-
-		for (i = 0; i < 4; i++) {
-			blk1->gmac_port[i].valid = 1;
-			blk1->gmac_port[i].instance = i + blk1->baseinst;
-			blk1->gmac_port[i].type = XLR_SGMII;
-			blk1->gmac_port[i].phy_addr = i + 20;
-			blk1->gmac_port[i].tx_bucket_id = 
-			    blk1->station_txbase + i;
-			blk1->gmac_port[i].mdint_id = 1;
-			blk1->num_ports++;
-			blk1->gmac_port[i].base_addr = XLR_IO_GMAC_4_OFFSET +  i * 0x1000;
-			blk1->gmac_port[i].mii_addr = XLR_IO_GMAC_4_OFFSET;
-			blk1->gmac_port[i].pcs_addr = XLR_IO_GMAC_4_OFFSET;
-			blk1->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET;
-		}
-
-		/* ---------------- Network Acc 2 ---------------- */
-		xlr_board_info.gmac_block[2].enabled = 0;  /* disabled on XLS */
-
-		xls_chip_specific_overrides(&xlr_board_info);
-		xls_board_specific_overrides(&xlr_board_info);
-
-	} else {	/* XLR */
-		xlr_board_info.is_xls = 0;
-		xlr_board_info.nr_cpus = 32;
-		xlr_board_info.usb = 0;
-		xlr_board_info.cfi = 1;
-		xlr_board_info.pci_irq = 0;
-		xlr_board_info.credit_configs = xlr_core_cc_configs;
-		xlr_board_info.bucket_sizes   = &bucket_sizes;
-		xlr_board_info.gmacports         = 4;
-
-		/* ---------------- GMAC0 ---------------- */
-		blk0->type 		= XLR_GMAC;
-		blk0->enabled 		= 0xf;
-		blk0->credit_config 	= &cc_table_gmac;
-		blk0->station_id 	= MSGRNG_STNID_GMAC;
-		blk0->station_txbase 	= MSGRNG_STNID_GMACTX0;
-		blk0->station_rfr 	= MSGRNG_STNID_GMACRFR_0;
-		blk0->mode 		= XLR_RGMII;
-		blk0->baseaddr 		= XLR_IO_GMAC_0_OFFSET;
-		blk0->baseirq 		= PIC_GMAC_0_IRQ;
-		blk0->baseinst 		= 0;
-
-		/* first, do the common/easy stuff for all the ports */
-		for (i = 0; i < 4; i++) {
-			blk0->gmac_port[i].valid = 1;
-			blk0->gmac_port[i].instance = i + blk0->baseinst;
-			blk0->gmac_port[i].type = XLR_RGMII;
-			blk0->gmac_port[i].phy_addr = i;
-			blk0->gmac_port[i].tx_bucket_id = 
-			    blk0->station_txbase + i;
-			blk0->gmac_port[i].mdint_id = 0;
-			blk0->gmac_port[i].base_addr = XLR_IO_GMAC_0_OFFSET + i * 0x1000;
-			blk0->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET;
-			/* RGMII ports, no PCS/SERDES */
-			blk0->num_ports++;
-		}
-
-		/* ---------------- XGMAC0 ---------------- */
-		blk1->type 		= XLR_XGMAC;
-		blk1->mode 		= XLR_XGMII;
-		blk1->enabled 		= 0;
-		blk1->credit_config 	= &cc_table_xgs_0;
-		blk1->station_txbase 	= MSGRNG_STNID_XGS0_TX;
-		blk1->station_rfr 	= MSGRNG_STNID_XMAC0RFR;
-		blk1->station_id 	= MSGRNG_STNID_XGS0FR;
-		blk1->baseaddr 		= XLR_IO_XGMAC_0_OFFSET;
-		blk1->baseirq 		= PIC_XGS_0_IRQ;
-		blk1->baseinst 		= 4;
-
-		blk1->gmac_port[0].type 	= XLR_XGMII;
-		blk1->gmac_port[0].instance 	= 0;
-		blk1->gmac_port[0].phy_addr 	= 0;
-		blk1->gmac_port[0].base_addr 	= XLR_IO_XGMAC_0_OFFSET;
-		blk1->gmac_port[0].mii_addr 	= XLR_IO_XGMAC_0_OFFSET;
-		blk1->gmac_port[0].tx_bucket_id = blk1->station_txbase;
-		blk1->gmac_port[0].mdint_id 	= 1;
-
-		/* ---------------- XGMAC1 ---------------- */
-		blk2->type 		= XLR_XGMAC;
-		blk2->mode 		= XLR_XGMII;
-		blk2->enabled 		= 0;
-		blk2->credit_config 	= &cc_table_xgs_1;
-		blk2->station_txbase 	= MSGRNG_STNID_XGS1_TX;
-		blk2->station_rfr 	= MSGRNG_STNID_XMAC1RFR;
-		blk2->station_id 	= MSGRNG_STNID_XGS1FR;
-		blk2->baseaddr 		= XLR_IO_XGMAC_1_OFFSET;
-		blk2->baseirq 		= PIC_XGS_1_IRQ;
-		blk2->baseinst 		= 5;
-
-		blk2->gmac_port[0].type 	= XLR_XGMII;
-		blk2->gmac_port[0].instance 	= 0;
-		blk2->gmac_port[0].phy_addr 	= 0;
-		blk2->gmac_port[0].base_addr 	= XLR_IO_XGMAC_1_OFFSET;
-		blk2->gmac_port[0].mii_addr 	= XLR_IO_XGMAC_1_OFFSET;
-		blk2->gmac_port[0].tx_bucket_id = blk2->station_txbase;
-		blk2->gmac_port[0].mdint_id 	= 2;
-
-		/* Done with default setup. Now handle chip and board-specific
-		   variations. */
-		xlr_chip_specific_overrides(&xlr_board_info);
-		xlr_board_specific_overrides(&xlr_board_info);
-  	}
-  	return 0;
-}
diff --git a/sys/mips/rmi/board.h b/sys/mips/rmi/board.h
deleted file mode 100644
index 2544e5b81af..00000000000
--- a/sys/mips/rmi/board.h
+++ /dev/null
@@ -1,252 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_BOARD_H_
-#define	_RMI_BOARD_H_
-
-/*
- * Engineering boards have a major/minor number in their EEPROM to 
- * identify their configuration
- */
-#define	RMI_XLR_BOARD_ARIZONA_I		1
-#define	RMI_XLR_BOARD_ARIZONA_II	2
-#define	RMI_XLR_BOARD_ARIZONA_III	3
-#define	RMI_XLR_BOARD_ARIZONA_IV	4
-#define	RMI_XLR_BOARD_ARIZONA_V		5
-#define	RMI_XLR_BOARD_ARIZONA_VI	6
-#define	RMI_XLR_BOARD_ARIZONA_VII	7
-#define	RMI_XLR_BOARD_ARIZONA_VIII	8
-#define	RMI_XLR_BOARD_ARIZONA_XI	11
-#define	RMI_XLR_BOARD_ARIZONA_XII	12
-
-/*
- * RMI Chips - Values in Processor ID field
- */
-#define	RMI_CHIP_XLR732		0x00
-#define	RMI_CHIP_XLR716		0x02
-#define	RMI_CHIP_XLR308		0x06
-#define	RMI_CHIP_XLR532		0x09
-
-/*
- * XLR C revisions
- */
-#define	RMI_CHIP_XLR308_C	0x0F
-#define	RMI_CHIP_XLR508_C	0x0b
-#define	RMI_CHIP_XLR516_C	0x0a
-#define	RMI_CHIP_XLR532_C	0x08
-
-/*
- * XLS processors
- */
-#define	RMI_CHIP_XLS408		0x88  /* Lite "Condor" */
-#define	RMI_CHIP_XLS608		0x80  /* Internal */
-#define	RMI_CHIP_XLS404		0x8c  /* Lite "Condor" */
-#define	RMI_CHIP_XLS208		0x8e
-#define	RMI_CHIP_XLS204		0x8f
-#define	RMI_CHIP_XLS108		0xce
-#define	RMI_CHIP_XLS104		0xcf
-
-/*
- * XLS B revision chips
- */
-#define	RMI_CHIP_XLS616_B0	0x40
-#define	RMI_CHIP_XLS608_B0	0x4a
-#define	RMI_CHIP_XLS416_B0	0x44
-#define	RMI_CHIP_XLS412_B0	0x4c
-#define	RMI_CHIP_XLS408_B0	0x4e
-#define	RMI_CHIP_XLS404_B0	0x4f
-
-/* 
- * The XLS product line has chip versions 0x4x and 0x8x
- */
-static __inline unsigned int
-xlr_is_xls(void)
-{
-	uint32_t prid = mips_rd_prid();
-
-	return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 ||
-	    (prid & 0xf000) == 0xc000);
-}
-
-/*
- * The last byte of the processor id field is revision
- */
-static __inline unsigned int
-xlr_revision(void)
-{
-
-	return (mips_rd_prid() & 0xff);
-}
-
-/*
- * The 15:8 byte of the PR Id register is the Processor ID
- */
-static __inline unsigned int
-xlr_processor_id(void)
-{
-
-	return ((mips_rd_prid() & 0xff00) >> 8);
-}
-
-/*
- * The processor is XLR and C-Series
- */
-static __inline unsigned int
-xlr_is_c_revision(void)
-{
-	int processor_id = xlr_processor_id();
-	int revision_id  = xlr_revision();
-
-	switch (processor_id) {
-	/* 
-	 * These are the relevant PIDs for XLR
-	 * steppings (hawk and above). For these,
-	 * PIDs, Rev-Ids of [5-9] indicate 'C'.
-	 */
-	case RMI_CHIP_XLR308_C:
-	case RMI_CHIP_XLR508_C:
-	case RMI_CHIP_XLR516_C:
-	case RMI_CHIP_XLR532_C:
-	case RMI_CHIP_XLR716:
-	case RMI_CHIP_XLR732:
-		if (revision_id >= 5 && revision_id <= 9) 
-			return (1);
-	default:
-		return (0);
-	}
-	return (0);
-}
-
-/*
- * RMI Engineering boards which are PCI cards
- * These should come up in PCI device mode (not yet)
- */
-static __inline int
-xlr_board_pci(int board_major)
-{
-
-	return ((board_major == RMI_XLR_BOARD_ARIZONA_III) ||
-		(board_major == RMI_XLR_BOARD_ARIZONA_V));
-}
-
-static __inline int
-xlr_is_xls1xx(void)
-{
-	uint32_t chipid = xlr_processor_id();
-
-	return (chipid == 0xce || chipid == 0xcf);
-}
-
-static __inline int
-xlr_is_xls2xx(void)
-{
-	uint32_t chipid = xlr_processor_id();
-
-	return (chipid == 0x8e || chipid == 0x8f);
-}
-
-static __inline int
-xlr_is_xls4xx_lite(void)
-{
-	uint32_t chipid = xlr_processor_id();
-
-	return (chipid == 0x88 || chipid == 0x8c);
-}
-
-static __inline unsigned int
-xlr_is_xls_b0(void)
-{
-	uint32_t chipid = xlr_processor_id();
-
-	return (chipid >= 0x40 && chipid <= 0x4f);
-}
-
-/* SPI-4 --> 8 ports, 1G MAC --> 4 ports and 10G MAC --> 1 port */
-#define	MAX_NA_PORTS		8
-
-/* all our knowledge of chip and board that cannot be detected run-time goes here */
-enum gmac_block_types { XLR_GMAC, XLR_XGMAC, XLR_SPI4};
-enum gmac_port_types  { XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII, XLR_XGMII, XLR_XAUI };
-enum i2c_dev_types { I2C_RTC, I2C_THERMAL, I2C_EEPROM };
-
-struct xlr_board_info {
-	int is_xls;
-	int nr_cpus;
-	int usb;                               /* usb enabled ? */
-	int cfi;                               /* compact flash driver for NOR? */
-	int ata;                               /* ata driver */
-	int pci_irq;
-	struct stn_cc **credit_configs;        /* pointer to Core station credits */
-	struct bucket_size *bucket_sizes;      /* pointer to Core station bucket */
-	int *msgmap;                           /* mapping of message station to devices */
-	int gmacports;                         /* number of gmac ports on the board */
-	struct xlr_i2c_dev_t {
-		uint32_t addr;	
-		unsigned int enabled;          /* mask of devs enabled */   
-		int type;
-		int unit;
-		char *dev_name;
-	} xlr_i2c_device[3];
-	struct xlr_gmac_block_t {              /* refers to the set of GMACs controlled by a 
-                                                  network accelarator */
-		int  type;                     /* see  enum gmac_block_types */
-		unsigned int enabled;          /* mask of ports enabled */   
-		struct stn_cc *credit_config;  /* credit configuration */
-		int station_id;		       /* station id for sending msgs */
-		int station_txbase;            /* station id for tx */
-		int station_rfr;               /* free desc bucket */
-		int  mode;                     /* see gmac_block_modes */
-		uint32_t baseaddr;             /* IO base */
-		int baseirq;        /* first irq for this block, the rest are in sequence */
-		int baseinst;       /* the first rge unit for this block */
-		int num_ports;
-		struct xlr_gmac_port {
-			int valid;
-			int type;		/* see enum gmac_port_types */
-			uint32_t instance;	/* identifies the GMAC to which
-						   this port is bound to. */
-			uint32_t phy_addr;
-			uint32_t base_addr;
-			uint32_t mii_addr;
-			uint32_t pcs_addr;
-			uint32_t serdes_addr;
-			uint32_t tx_bucket_id;
-			uint32_t mdint_id;
-		} gmac_port[MAX_NA_PORTS];
-	} gmac_block [3];
-};
-
-extern struct xlr_board_info xlr_board_info;
-int xlr_board_info_setup(void);
-
-#endif
diff --git a/sys/mips/rmi/bus_space_rmi.c b/sys/mips/rmi/bus_space_rmi.c
deleted file mode 100644
index ccaae6284a3..00000000000
--- a/sys/mips/rmi/bus_space_rmi.c
+++ /dev/null
@@ -1,688 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/endian.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-static int 
-rmi_bus_space_map(void *t, bus_addr_t addr,
-    bus_size_t size, int flags,
-    bus_space_handle_t * bshp);
-
-static void 
-rmi_bus_space_unmap(void *t, bus_space_handle_t bsh,
-    bus_size_t size);
-
-static int 
-rmi_bus_space_subregion(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size,
-    bus_space_handle_t * nbshp);
-
-static u_int8_t 
-rmi_bus_space_read_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t 
-rmi_bus_space_read_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t 
-rmi_bus_space_read_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static void 
-rmi_bus_space_read_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_region_1(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value);
-
-static void 
-rmi_bus_space_write_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void 
-rmi_bus_space_write_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void 
-rmi_bus_space_write_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-
-static void 
-rmi_bus_space_set_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value,
-    size_t count);
-static void 
-rmi_bus_space_set_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value,
-    size_t count);
-
-static void 
-rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags);
-
-static void 
-rmi_bus_space_copy_region_2(void *t,
-    bus_space_handle_t bsh1,
-    bus_size_t off1,
-    bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count);
-
-u_int8_t 
-rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t 
-rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t 
-rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-static void 
-rmi_bus_space_read_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_read_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-void 
-rmi_bus_space_write_stream_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t value);
-static void 
-rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void 
-rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void 
-rmi_bus_space_write_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-static void 
-rmi_bus_space_write_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_bus_space_write_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-#define TODO() printf("XLR memory bus space function '%s' unimplemented\n", __func__)
- 
-static struct bus_space local_rmi_bus_space = {
-	/* cookie */
-	(void *)0,
-
-	/* mapping/unmapping */
-	rmi_bus_space_map,
-	rmi_bus_space_unmap,
-	rmi_bus_space_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	rmi_bus_space_barrier,
-
-	/* read (single) */
-	rmi_bus_space_read_1,
-	rmi_bus_space_read_2,
-	rmi_bus_space_read_4,
-	NULL,
-
-	/* read multiple */
-	rmi_bus_space_read_multi_1,
-	rmi_bus_space_read_multi_2,
-	rmi_bus_space_read_multi_4,
-	NULL,
-
-	/* read region */
-	rmi_bus_space_read_region_1,
-	rmi_bus_space_read_region_2,
-	rmi_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) */
-	rmi_bus_space_write_1,
-	rmi_bus_space_write_2,
-	rmi_bus_space_write_4,
-	NULL,
-
-	/* write multiple */
-	rmi_bus_space_write_multi_1,
-	rmi_bus_space_write_multi_2,
-	rmi_bus_space_write_multi_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	rmi_bus_space_write_region_2,
-	rmi_bus_space_write_region_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	rmi_bus_space_set_region_2,
-	rmi_bus_space_set_region_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	rmi_bus_space_copy_region_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	rmi_bus_space_read_stream_1,
-	rmi_bus_space_read_stream_2,
-	rmi_bus_space_read_stream_4,
-	NULL,
-
-	/* read multiple stream */
-	rmi_bus_space_read_multi_stream_1,
-	rmi_bus_space_read_multi_stream_2,
-	rmi_bus_space_read_multi_stream_4,
-	NULL,
-
-	/* read region stream */
-	rmi_bus_space_read_region_1,
-	rmi_bus_space_read_region_2,
-	rmi_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) stream */
-	rmi_bus_space_write_stream_1,
-	rmi_bus_space_write_stream_2,
-	rmi_bus_space_write_stream_4,
-	NULL,
-
-	/* write multiple stream */
-	rmi_bus_space_write_multi_stream_1,
-	rmi_bus_space_write_multi_stream_2,
-	rmi_bus_space_write_multi_stream_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	rmi_bus_space_write_region_2,
-	rmi_bus_space_write_region_4,
-	NULL,
-};
-
-/* generic bus_space tag */
-bus_space_tag_t rmi_bus_space = &local_rmi_bus_space;
-
-/*
- * Map a region of device bus space into CPU virtual address space.
- */
-static int
-rmi_bus_space_map(void *t __unused, bus_addr_t addr,
-    bus_size_t size __unused, int flags __unused,
-    bus_space_handle_t * bshp)
-{
-
-	*bshp = addr;
-	return (0);
-}
-
-/*
- * Unmap a region of device bus space.
- */
-static void
-rmi_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused,
-    bus_size_t size __unused)
-{
-}
-
-/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-
-static int
-rmi_bus_space_subregion(void *t __unused, bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size __unused,
-    bus_space_handle_t * nbshp)
-{
-	*nbshp = bsh + offset;
-	return (0);
-}
-
-/*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-
-static u_int8_t
-rmi_bus_space_read_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int8_t) (*(volatile u_int32_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_bus_space_read_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int16_t)(*(volatile u_int32_t *)(handle + offset));
-}
-
-static u_int32_t
-rmi_bus_space_read_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-static void
-rmi_bus_space_read_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	TODO();
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-static void
-rmi_bus_space_write_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	*(volatile u_int32_t *)(handle + offset) =  (u_int32_t)value;
-}
-
-static void
-rmi_bus_space_write_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	*(volatile u_int32_t *)(handle + offset) = (u_int32_t)value;
-}
-
-static void
-rmi_bus_space_write_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	*(volatile u_int32_t *)(handle + offset) = value;
-}
-
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-
-static void
-rmi_bus_space_write_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	TODO();
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-
-static void
-rmi_bus_space_set_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-static void
-rmi_bus_space_set_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-static void
-rmi_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	printf("bus_space_copy_region_2 - unimplemented\n");
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-
-u_int8_t
-rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return *((volatile u_int8_t *)(handle + offset));
-}
-
-
-static u_int16_t
-rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return *(volatile u_int16_t *)(handle + offset);
-}
-
-
-static u_int32_t
-rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-
-static void
-rmi_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	TODO();
-}
-
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-rmi_bus_space_read_region_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_read_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_read_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int32_t *)(baddr));
-		baddr += 4;
-	}
-}
-
-void
-rmi_bus_space_write_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	TODO();
-}
-
-
-static void
-rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	TODO();
-}
-
-
-static void
-rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	TODO();
-}
-
-
-static void
-rmi_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_write_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags)
-{
-}
diff --git a/sys/mips/rmi/bus_space_rmi_pci.c b/sys/mips/rmi/bus_space_rmi_pci.c
deleted file mode 100644
index ae485c35c7c..00000000000
--- a/sys/mips/rmi/bus_space_rmi_pci.c
+++ /dev/null
@@ -1,763 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/endian.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-static int 
-rmi_pci_bus_space_map(void *t, bus_addr_t addr,
-    bus_size_t size, int flags,
-    bus_space_handle_t * bshp);
-
-static void 
-rmi_pci_bus_space_unmap(void *t, bus_space_handle_t bsh,
-    bus_size_t size);
-
-static int 
-rmi_pci_bus_space_subregion(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size,
-    bus_space_handle_t * nbshp);
-
-static u_int8_t 
-rmi_pci_bus_space_read_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t 
-rmi_pci_bus_space_read_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t 
-rmi_pci_bus_space_read_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static void 
-rmi_pci_bus_space_read_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_region_1(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value);
-
-static void 
-rmi_pci_bus_space_write_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void 
-rmi_pci_bus_space_write_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void 
-rmi_pci_bus_space_write_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-
-static void 
-rmi_pci_bus_space_set_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value,
-    size_t count);
-static void 
-rmi_pci_bus_space_set_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags);
-
-static void 
-rmi_pci_bus_space_copy_region_2(void *t,
-    bus_space_handle_t bsh1,
-    bus_size_t off1,
-    bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count);
-
-u_int8_t 
-rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t 
-rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t 
-rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-static void 
-rmi_pci_bus_space_read_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_read_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-void 
-rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t value);
-static void 
-rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void 
-rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void 
-rmi_pci_bus_space_write_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-static void 
-rmi_pci_bus_space_write_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void 
-rmi_pci_bus_space_write_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-#define TODO() printf("XLR memory bus space function '%s' unimplemented\n", __func__)
-
-static struct bus_space local_rmi_pci_bus_space = {
-	/* cookie */
-	(void *)0,
-
-	/* mapping/unmapping */
-	rmi_pci_bus_space_map,
-	rmi_pci_bus_space_unmap,
-	rmi_pci_bus_space_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	rmi_pci_bus_space_barrier,
-
-	/* read (single) */
-	rmi_pci_bus_space_read_1,
-	rmi_pci_bus_space_read_2,
-	rmi_pci_bus_space_read_4,
-	NULL,
-
-	/* read multiple */
-	rmi_pci_bus_space_read_multi_1,
-	rmi_pci_bus_space_read_multi_2,
-	rmi_pci_bus_space_read_multi_4,
-	NULL,
-
-	/* read region */
-	rmi_pci_bus_space_read_region_1,
-	rmi_pci_bus_space_read_region_2,
-	rmi_pci_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) */
-	rmi_pci_bus_space_write_1,
-	rmi_pci_bus_space_write_2,
-	rmi_pci_bus_space_write_4,
-	NULL,
-
-	/* write multiple */
-	rmi_pci_bus_space_write_multi_1,
-	rmi_pci_bus_space_write_multi_2,
-	rmi_pci_bus_space_write_multi_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	rmi_pci_bus_space_write_region_2,
-	rmi_pci_bus_space_write_region_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	rmi_pci_bus_space_set_region_2,
-	rmi_pci_bus_space_set_region_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	rmi_pci_bus_space_copy_region_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	rmi_pci_bus_space_read_stream_1,
-	rmi_pci_bus_space_read_stream_2,
-	rmi_pci_bus_space_read_stream_4,
-	NULL,
-
-	/* read multiple stream */
-	rmi_pci_bus_space_read_multi_stream_1,
-	rmi_pci_bus_space_read_multi_stream_2,
-	rmi_pci_bus_space_read_multi_stream_4,
-	NULL,
-
-	/* read region stream */
-	rmi_pci_bus_space_read_region_1,
-	rmi_pci_bus_space_read_region_2,
-	rmi_pci_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) stream */
-	rmi_pci_bus_space_write_stream_1,
-	rmi_pci_bus_space_write_stream_2,
-	rmi_pci_bus_space_write_stream_4,
-	NULL,
-
-	/* write multiple stream */
-	rmi_pci_bus_space_write_multi_stream_1,
-	rmi_pci_bus_space_write_multi_stream_2,
-	rmi_pci_bus_space_write_multi_stream_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	rmi_pci_bus_space_write_region_2,
-	rmi_pci_bus_space_write_region_4,
-	NULL,
-};
-
-/* generic bus_space tag */
-bus_space_tag_t rmi_pci_bus_space = &local_rmi_pci_bus_space;
-
-/*
- * Map a region of device bus space into CPU virtual address space.
- */
-static int
-rmi_pci_bus_space_map(void *t __unused, bus_addr_t addr,
-    bus_size_t size __unused, int flags __unused,
-    bus_space_handle_t * bshp)
-{
-	*bshp = addr;
-	return (0);
-}
-
-/*
- * Unmap a region of device bus space.
- */
-static void
-rmi_pci_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused,
-    bus_size_t size __unused)
-{
-}
-
-/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-
-static int
-rmi_pci_bus_space_subregion(void *t __unused, bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size __unused,
-    bus_space_handle_t * nbshp)
-{
-	*nbshp = bsh + offset;
-	return (0);
-}
-
-/*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-
-static u_int8_t
-rmi_pci_bus_space_read_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int8_t) (*(volatile u_int8_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_pci_bus_space_read_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return bswap16((u_int16_t) (*(volatile u_int16_t *)(handle + offset)));
-}
-
-static u_int32_t
-rmi_pci_bus_space_read_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return bswap32((*(volatile u_int32_t *)(handle + offset)));
-}
-
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-static void
-rmi_pci_bus_space_read_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int8_t *)(handle + offset));
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-
-	while (count--) {
-		*addr = *(volatile u_int16_t *)(handle + offset);
-		*addr = bswap16(*addr);
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-
-	while (count--) {
-		*addr = *(volatile u_int32_t *)(handle + offset);
-		*addr = bswap32(*addr);
-		addr++;
-	}
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-static void
-rmi_pci_bus_space_write_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	mips_sync();
-	*(volatile u_int8_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	mips_sync();
-	*(volatile u_int16_t *)(handle + offset) = bswap16(value);
-}
-
-
-static void
-rmi_pci_bus_space_write_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	mips_sync();
-	*(volatile u_int32_t *)(handle + offset) = bswap32(value);
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-
-static void
-rmi_pci_bus_space_write_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int8_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int16_t *)(handle + offset)) = bswap16(*addr);
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int32_t *)(handle + offset)) = bswap32(*addr);
-		addr++;
-	}
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-
-static void
-rmi_pci_bus_space_set_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		(*(volatile u_int16_t *)(addr)) = value;
-}
-
-static void
-rmi_pci_bus_space_set_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-static void
-rmi_pci_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	TODO();
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-
-u_int8_t
-rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return *((volatile u_int8_t *)(handle + offset));
-}
-
-
-static u_int16_t
-rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return *(volatile u_int16_t *)(handle + offset);
-}
-
-
-static u_int32_t
-rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-
-static void
-rmi_pci_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int8_t *)(handle + offset));
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int16_t *)(handle + offset));
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int32_t *)(handle + offset));
-		addr++;
-	}
-}
-
-
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-rmi_pci_bus_space_read_region_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int8_t *)(baddr));
-		baddr += 1;
-	}
-}
-
-void
-rmi_pci_bus_space_read_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int16_t *)(baddr));
-		baddr += 2;
-	}
-}
-
-void
-rmi_pci_bus_space_read_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int32_t *)(baddr));
-		baddr += 4;
-	}
-}
-
-
-void
-rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	mips_sync();
-	*(volatile u_int8_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	mips_sync();
-	*(volatile u_int16_t *)(handle + offset) = value;
-}
-
-
-static void
-rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	mips_sync();
-	*(volatile u_int32_t *)(handle + offset) = value;
-}
-
-
-static void
-rmi_pci_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int8_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int16_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int32_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-void
-rmi_pci_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count)
-{
-	bus_addr_t baddr = (bus_addr_t) bsh + offset;
-
-	while (count--) {
-		(*(volatile u_int16_t *)(baddr)) = *addr;
-		addr++;
-		baddr += 2;
-	}
-}
-
-void
-rmi_pci_bus_space_write_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		(*(volatile u_int32_t *)(baddr)) = *addr;
-		addr++;
-		baddr += 4;
-	}
-}
-
-static void
-rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags)
-{
-
-}
diff --git a/sys/mips/rmi/dev/iic/at24co2n.c b/sys/mips/rmi/dev/iic/at24co2n.c
deleted file mode 100644
index a313fc311bb..00000000000
--- a/sys/mips/rmi/dev/iic/at24co2n.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-/*
- * reading eeprom for the mac address .
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-#include <machine/resource.h>
-
-#include <dev/iicbus/iiconf.h>
-#include <dev/iicbus/iicbus.h>
-
-#include "iicbus_if.h"
-
-#define	AT24CO_EEPROM_ETH_MACADDR	0x20	
-
-struct at24co2n_softc {
-	uint32_t	sc_addr;
-	device_t	sc_dev;
-	uint8_t		sc_mac_addr[6];
-};
-
-static void at24co2n_read_mac(struct at24co2n_softc *);
-
-static int
-at24co2n_probe(device_t dev)
-{
-	device_set_desc(dev, "AT24Co2N-10SE-2.7 EEPROM for mac address");
-	return (0);
-}
-
-static int
-at24co2n_mac_sysctl(SYSCTL_HANDLER_ARGS)
-{
-	struct at24co2n_softc *sc = arg1;
-	char buf[24];
-	int len;
-	uint8_t *p;
-
-	at24co2n_read_mac(sc);
-	p = sc->sc_mac_addr;
-	len = snprintf(buf, sizeof(buf), "%02x:%02x:%02x:%02x:%02x:%02x",
-	    p[0], p[1], p[2], p[3], p[4], p[5]);
-	return SYSCTL_OUT_STR(req, buf);
-}
-
-
-static int
-at24co2n_attach(device_t dev)
-{
-	struct at24co2n_softc *sc = device_get_softc(dev);
-	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
-	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-
-	if(sc == NULL) {
-		printf("at24co2n_attach device_get_softc failed\n");
-		return (0);
-	}
-	sc->sc_dev = dev;
-	sc->sc_addr = iicbus_get_addr(dev);
-
-	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"eeprom-mac", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
-		at24co2n_mac_sysctl, "A", "mac address");
-
-	return (0);
-}
-
-static void
-at24co2n_read_mac(struct at24co2n_softc *sc)
-{
-	uint8_t addr = AT24CO_EEPROM_ETH_MACADDR;
-	struct iic_msg msgs[2] = {
-	     { sc->sc_addr, IIC_M_WR, 1, &addr },
-	     { sc->sc_addr, IIC_M_RD, 6, sc->sc_mac_addr},
-	};
-
-	iicbus_transfer(sc->sc_dev, msgs, 2);
-}
-
-static device_method_t at24co2n_methods[] = {
-	DEVMETHOD(device_probe,		at24co2n_probe),
-	DEVMETHOD(device_attach,	at24co2n_attach),
-
-	{0, 0},
-};
-
-static driver_t at24co2n_driver = {
-	"at24co2n",
-	at24co2n_methods,
-	sizeof(struct at24co2n_softc),
-};
-static devclass_t at24co2n_devclass;
-
-DRIVER_MODULE(at24co2n, iicbus, at24co2n_driver, at24co2n_devclass, 0, 0);
-MODULE_VERSION(at24co2n, 1);
-MODULE_DEPEND(at24co2n, iicbus, 1, 1, 1);
diff --git a/sys/mips/rmi/dev/iic/max6657.c b/sys/mips/rmi/dev/iic/max6657.c
deleted file mode 100644
index 0d69dc45432..00000000000
--- a/sys/mips/rmi/dev/iic/max6657.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-/*
- * temperature sensor chip sitting on the I2C bus.
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-#include <machine/resource.h>
-
-#include <dev/iicbus/iiconf.h>
-#include <dev/iicbus/iicbus.h>
-
-#include <mips/rmi/board.h>
-#include <mips/rmi/rmi_boot_info.h>
-#include "iicbus_if.h"
-
-#define	MAX6657_EXT_TEMP	1	
-
-struct max6657_softc {
-	uint32_t	sc_addr;
-	device_t	sc_dev;
-	int		sc_curtemp;
-	int		sc_lastupdate;	/* in ticks */
-};
-
-static void max6657_update(struct max6657_softc *);
-static int max6657_read(device_t dev, uint32_t addr, int reg) ;
-
-static int
-max6657_probe(device_t dev)
-{
-	device_set_desc(dev, "MAX6657MSA Temperature Sensor");
-	return (0);
-}
-
-static int
-max6657_sysctl_temp(SYSCTL_HANDLER_ARGS)
-{
-	struct max6657_softc *sc = arg1;
-	int temp;
-
-	max6657_update(sc);
-	temp = sc->sc_curtemp ;
-	return sysctl_handle_int(oidp, &temp, 0, req);
-}
-
-static int
-max6657_attach(device_t dev)
-{
-	struct max6657_softc *sc = device_get_softc(dev);
-	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
-	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-
-	if(sc==NULL) {
-		printf("max6657_attach device_get_softc failed\n");
-		return (0);
-	}
-	sc->sc_dev = dev;
-	sc->sc_addr = iicbus_get_addr(dev);
-
-	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"temp", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
-		max6657_sysctl_temp, "I", "operating temperature");
-
-	device_printf(dev, "Chip temperature {%d} Degree Celsius\n",
-		max6657_read(sc->sc_dev, sc->sc_addr, MAX6657_EXT_TEMP));
-
-	return (0);
-}
-
-static int
-max6657_read(device_t dev, uint32_t slave_addr, int reg) 
-{
-	uint8_t addr = reg;
-	uint8_t data[1];
-	struct iic_msg msgs[2] = {
-	     { slave_addr, IIC_M_WR, 1, &addr },
-	     { slave_addr, IIC_M_RD, 1, data },
-	};
-
-	return iicbus_transfer(dev, msgs, 2) != 0 ? -1 : data[0];
-}
-
-
-static void
-max6657_update(struct max6657_softc *sc)
-{
-	int v;
-
-	/* NB: no point in updating any faster than the chip */
-	if (ticks - sc->sc_lastupdate > hz) {
-		v = max6657_read(sc->sc_dev, sc->sc_addr, MAX6657_EXT_TEMP);
-		if (v >= 0)
-			sc->sc_curtemp = v;
-		sc->sc_lastupdate = ticks;
-	}
-}
-
-static device_method_t max6657_methods[] = {
-	DEVMETHOD(device_probe,		max6657_probe),
-	DEVMETHOD(device_attach,	max6657_attach),
-
-	{0, 0},
-};
-
-static driver_t max6657_driver = {
-	"max6657",
-	max6657_methods,
-	sizeof(struct max6657_softc),
-};
-static devclass_t max6657_devclass;
-
-DRIVER_MODULE(max6657, iicbus, max6657_driver, max6657_devclass, 0, 0);
-MODULE_VERSION(max6657, 1);
-MODULE_DEPEND(max6657, iicbus, 1, 1, 1);
diff --git a/sys/mips/rmi/dev/nlge/if_nlge.c b/sys/mips/rmi/dev/nlge/if_nlge.c
deleted file mode 100644
index 30072582544..00000000000
--- a/sys/mips/rmi/dev/nlge/if_nlge.c
+++ /dev/null
@@ -1,2565 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-/*
- * The XLR device supports upto four 10/100/1000 Ethernet MACs and upto
- * two 10G Ethernet MACs (of XGMII). Alternatively, each 10G port can used
- * as a SPI-4 interface, with 8 ports per such interface. The MACs are
- * encapsulated in another hardware block referred to as network accelerator,
- * such that there are three instances of these in a XLR. One of them controls
- * the four 1G RGMII ports while one each of the others controls an XGMII port.
- * Enabling MACs requires configuring the corresponding network accelerator
- * and the individual port.
- * The XLS device supports upto 8 10/100/1000 Ethernet MACs or max 2 10G
- * Ethernet MACs. The 1G MACs are of SGMII and 10G MACs are of XAUI
- * interface. These ports are part of two network accelerators.
- * The nlge driver configures and initializes non-SPI4 Ethernet ports in the
- * XLR/XLS devices and enables data transfer on them.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#ifdef HAVE_KERNEL_OPTION_HEADERS
-#include "opt_device_polling.h"
-#endif
-
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/socket.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-#include <sys/taskqueue.h>
-#include <sys/smp.h>
-#include <sys/sysctl.h>
-
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/bpf.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-#include <net/if_vlan_var.h>
-
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/uma.h>
-
-#include <machine/reg.h>
-#include <machine/cpu.h>
-#include <machine/mips_opcode.h>
-#include <machine/asm.h>
-#include <machine/cpuregs.h>
-#include <machine/intr_machdep.h>
-#include <machine/clock.h>	/* for DELAY */
-#include <machine/bus.h>
-#include <machine/resource.h>
-
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/board.h>
-#include <mips/rmi/rmi_mips_exts.h>
-#include <mips/rmi/rmi_boot_info.h>
-#include <mips/rmi/dev/xlr/atx_cpld.h>
-#include <mips/rmi/dev/xlr/xgmac_mdio.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-#include "miidevs.h"
-#include <dev/mii/brgphyreg.h>
-#include "miibus_if.h"
-
-#include <mips/rmi/dev/nlge/if_nlge.h>
-
-MODULE_DEPEND(nlna, nlge, 1, 1, 1);
-MODULE_DEPEND(nlge, ether, 1, 1, 1);
-MODULE_DEPEND(nlge, miibus, 1, 1, 1);
-
-/* Network accelarator entry points */
-static int      nlna_probe(device_t);
-static int      nlna_attach(device_t);
-static int      nlna_detach(device_t);
-static int      nlna_suspend(device_t);
-static int      nlna_resume(device_t);
-static int 	nlna_shutdown(device_t);
-
-/* GMAC port entry points */
-static int	nlge_probe(device_t);
-static int	nlge_attach(device_t);
-static int	nlge_detach(device_t);
-static int	nlge_suspend(device_t);
-static int	nlge_resume(device_t);
-static void	nlge_init(void *);
-static int	nlge_ioctl(struct ifnet *, u_long, caddr_t);
-static int	nlge_tx(struct ifnet *ifp, struct mbuf *m);
-static void 	nlge_rx(struct nlge_softc *sc, vm_paddr_t paddr, int len);
-
-static int	nlge_mii_write(device_t, int, int, int);
-static int	nlge_mii_read(device_t, int, int);
-static void	nlge_mac_mii_statchg(device_t);
-static int	nlge_mediachange(struct ifnet *ifp);
-static void	nlge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr);
-
-/* Other internal/helper functions */
-static void 	*get_buf(void);
-
-static void	nlna_add_to_port_set(struct nlge_port_set *pset,
-    struct nlge_softc *sc);
-static void	nlna_config_pde(struct nlna_softc *);
-static void	nlna_config_parser(struct nlna_softc *);
-static void	nlna_config_classifier(struct nlna_softc *);
-static void	nlna_config_fifo_spill_area(struct nlna_softc *sc);
-static void	nlna_config_translate_table(struct nlna_softc *sc);
-static void	nlna_config_common(struct nlna_softc *);
-static void	nlna_disable_ports(struct nlna_softc *sc);
-static void	nlna_enable_intr(struct nlna_softc *sc);
-static void	nlna_disable_intr(struct nlna_softc *sc);
-static void	nlna_enable_ports(struct nlna_softc *sc);
-static void	nlna_get_all_softc(device_t iodi_dev,
-    struct nlna_softc **sc_vec, uint32_t vec_sz);
-static void 	nlna_hw_init(struct nlna_softc *sc);
-static int 	nlna_is_last_active_na(struct nlna_softc *sc);
-static void	nlna_media_specific_config(struct nlna_softc *sc);
-static void 	nlna_reset_ports(struct nlna_softc *sc,
-    struct xlr_gmac_block_t *blk);
-static struct nlna_softc *nlna_sc_init(device_t dev,
-    struct xlr_gmac_block_t *blk);
-static void	nlna_setup_intr(struct nlna_softc *sc);
-static void	nlna_smp_update_pde(void *dummy __unused);
-static void	nlna_submit_rx_free_desc(struct nlna_softc *sc,
-    uint32_t n_desc);
-
-static int	nlge_gmac_config_speed(struct nlge_softc *, int quick);
-static void	nlge_hw_init(struct nlge_softc *sc);
-static int	nlge_if_init(struct nlge_softc *sc);
-static void	nlge_intr(void *arg);
-static int	nlge_irq_init(struct nlge_softc *sc);
-static void	nlge_irq_fini(struct nlge_softc *sc);
-static void	nlge_media_specific_init(struct nlge_softc *sc);
-static void	nlge_mii_init(device_t dev, struct nlge_softc *sc);
-static int	nlge_mii_read_internal(xlr_reg_t *mii_base, int phyaddr,
-    int regidx);
-static void 	nlge_mii_write_internal(xlr_reg_t *mii_base, int phyaddr,
-    int regidx, int regval);
-void 		nlge_msgring_handler(int bucket, int size, int code,
-    int stid, struct msgrng_msg *msg, void *data);
-static void 	nlge_port_disable(struct nlge_softc *sc);
-static void 	nlge_port_enable(struct nlge_softc *sc);
-static void 	nlge_read_mac_addr(struct nlge_softc *sc);
-static void	nlge_sc_init(struct nlge_softc *sc, device_t dev,
-    struct xlr_gmac_port *port_info);
-static void 	nlge_set_mac_addr(struct nlge_softc *sc);
-static void	nlge_set_port_attribs(struct nlge_softc *,
-    struct xlr_gmac_port *);
-static void	nlge_mac_set_rx_mode(struct nlge_softc *sc);
-static void 	nlge_sgmii_init(struct nlge_softc *sc);
-static int 	nlge_start_locked(struct ifnet *ifp, struct nlge_softc *sc,
-    struct mbuf *m);
-
-static int	prepare_fmn_message(struct nlge_softc *sc,
-    struct msgrng_msg *msg, uint32_t *n_entries, struct mbuf *m_head,
-    uint64_t fr_stid, struct nlge_tx_desc **tx_desc);
-
-static void 	release_tx_desc(vm_paddr_t phy_addr);
-static int	send_fmn_msg_tx(struct nlge_softc *, struct msgrng_msg *,
-    uint32_t n_entries);
-
-//#define DEBUG
-#ifdef DEBUG
-static int	mac_debug = 1;
-#undef PDEBUG
-#define PDEBUG(fmt, args...) \
-        do {\
-            if (mac_debug) {\
-                printf("[%s@%d|%s]: cpu_%d: " fmt, \
-                __FILE__, __LINE__, __FUNCTION__,  PCPU_GET(cpuid), ##args);\
-            }\
-        } while(0);
-
-/* Debug/dump functions */
-static void 	dump_reg(xlr_reg_t *addr, uint32_t offset, char *name);
-static void	dump_gmac_registers(struct nlge_softc *);
-static void	dump_na_registers(xlr_reg_t *base, int port_id);
-static void	dump_mac_stats(struct nlge_softc *sc);
-static void 	dump_mii_regs(struct nlge_softc *sc) __attribute__((used));
-static void 	dump_mii_data(struct mii_data *mii) __attribute__((used));
-static void	dump_board_info(struct xlr_board_info *);
-static void	dump_pcs_regs(struct nlge_softc *sc, int phy);
-
-#else
-#undef PDEBUG
-#define PDEBUG(fmt, args...)
-#define dump_reg(a, o, n)		/* nop */
-#define dump_gmac_registers(a)		/* nop */
-#define dump_na_registers(a, p)	/* nop */
-#define dump_board_info(b)		/* nop */
-#define dump_mac_stats(sc)		/* nop */
-#define dump_mii_regs(sc)		/* nop */
-#define dump_mii_data(mii)		/* nop */
-#define dump_pcs_regs(sc, phy)		/* nop */
-#endif
-
-/* Wrappers etc. to export the driver entry points. */
-static device_method_t nlna_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,         nlna_probe),
-	DEVMETHOD(device_attach,        nlna_attach),
-	DEVMETHOD(device_detach,        nlna_detach),
-	DEVMETHOD(device_shutdown,      nlna_shutdown),
-	DEVMETHOD(device_suspend,       nlna_suspend),
-	DEVMETHOD(device_resume,        nlna_resume),
-
-	/* bus interface : TBD : what are these for ? */
-	DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
-
-	DEVMETHOD_END
-};
-
-static driver_t	nlna_driver = {
-	"nlna",
-	nlna_methods,
-	sizeof(struct nlna_softc)
-};
-
-static devclass_t nlna_devclass;
-
-static device_method_t nlge_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,         nlge_probe),
-	DEVMETHOD(device_attach,        nlge_attach),
-	DEVMETHOD(device_detach,        nlge_detach),
-	DEVMETHOD(device_shutdown,      bus_generic_shutdown),
-	DEVMETHOD(device_suspend,       nlge_suspend),
-	DEVMETHOD(device_resume,        nlge_resume),
-
-	/* MII interface */
-	DEVMETHOD(miibus_readreg, nlge_mii_read),
-	DEVMETHOD(miibus_writereg, nlge_mii_write),
-	DEVMETHOD(miibus_statchg, nlge_mac_mii_statchg),
-
-	{0, 0}
-};
-
-static driver_t	nlge_driver = {
-	"nlge",
-	nlge_methods,
-	sizeof(struct nlge_softc)
-};
-
-static devclass_t nlge_devclass;
-
-DRIVER_MODULE(nlna, iodi, nlna_driver, nlna_devclass, 0, 0);
-DRIVER_MODULE(nlge, nlna,  nlge_driver, nlge_devclass, 0, 0);
-DRIVER_MODULE(miibus, nlge, miibus_driver, miibus_devclass, 0, 0);
-
-static uma_zone_t nl_tx_desc_zone;
-
-/* Tunables. */
-static int flow_classification = 0;
-TUNABLE_INT("hw.nlge.flow_classification", &flow_classification);
-
-#define	NLGE_HW_CHKSUM		1
-
-static __inline void
-atomic_incr_long(unsigned long *addr)
-{
-	/* XXX: fix for 64 bit */
-	unsigned int *iaddr = (unsigned int *)addr;
-
-	xlr_ldaddwu(1, iaddr);
-}
-
-static int
-nlna_probe(device_t dev)
-{
-	return (BUS_PROBE_DEFAULT);
-}
-
-/*
- * Add all attached GMAC/XGMAC ports to the device tree. Port
- * configuration is spread in two regions - common configuration
- * for all ports in the NA and per-port configuration in MAC-specific
- * region. This function does the following:
- *  - adds the ports to the device tree
- *  - reset the ports
- *  - do all the common initialization
- *  - invoke bus_generic_attach for per-port configuration
- *  - supply initial free rx descriptors to ports
- *  - initialize s/w data structures
- *  - finally, enable interrupts (only in the last NA).
- *
- * For reference, sample address space for common and per-port
- * registers is given below.
- *
- * The address map for RNA0 is:                           (typical value)
- *
- * XLR_IO_BASE +--------------------------------------+   0xbef0_0000
- *             |                                      |
- *             |                                      |
- *             |                                      |
- *             |                                      |
- *             |                                      |
- *             |                                      |
- * GMAC0  ---> +--------------------------------------+   0xbef0_c000
- *             |                                      |
- *             |                                      |
- * (common) -> |......................................|   0xbef0_c400
- *             |                                      |
- *             |   (RGMII/SGMII: common registers)    |
- *             |                                      |
- * GMAC1  ---> |--------------------------------------|   0xbef0_d000
- *             |                                      |
- *             |                                      |
- * (common) -> |......................................|   0xbef0_d400
- *             |                                      |
- *             |   (RGMII/SGMII: common registers)    |
- *             |                                      |
- *             |......................................|
- *       and so on ....
- *
- * Ref: Figure 14-3 and Table 14-1 of XLR PRM
- */
-static int
-nlna_attach(device_t dev)
-{
-	struct xlr_gmac_block_t *block_info;
-	device_t		 gmac_dev;
-	struct nlna_softc	*sc;
-	int			 error;
-	int			 i;
-	int			 id;
-
-	id = device_get_unit(dev);
-	block_info = device_get_ivars(dev);
-	if (!block_info->enabled) {
-		return 0;
-	}
-
-#ifdef DEBUG
-	dump_board_info(&xlr_board_info);
-#endif
-	/* Initialize nlna state in softc structure */
-	sc = nlna_sc_init(dev, block_info);
-
-	/* Add device's for the ports controlled by this NA. */
-	if (block_info->type == XLR_GMAC) {
-		KASSERT(id < 2, ("No GMACs supported with this network"
-		    "accelerator: %d", id));
-		for (i = 0; i < sc->num_ports; i++) {
-			gmac_dev = device_add_child(dev, "nlge", -1);
-			device_set_ivars(gmac_dev, &block_info->gmac_port[i]);
-		}
-	} else if (block_info->type == XLR_XGMAC) {
-		KASSERT(id > 0 && id <= 2, ("No XGMACs supported with this"
-		    "network accelerator: %d", id));
-		gmac_dev = device_add_child(dev, "nlge", -1);
-		device_set_ivars(gmac_dev, &block_info->gmac_port[0]);
-	} else if (block_info->type == XLR_SPI4) {
-		/* SPI4 is not supported here */
-		device_printf(dev, "Unsupported: NA with SPI4 type");
-		return (ENOTSUP);
-	}
-
-	nlna_reset_ports(sc, block_info);
-
-	/* Initialize Network Accelarator registers. */
-	nlna_hw_init(sc);
-
-	error = bus_generic_attach(dev);
-	if (error) {
-		device_printf(dev, "failed to attach port(s)\n");
-		goto fail;
-	}
-
-	/* Send out the initial pool of free-descriptors for the rx path */
-	nlna_submit_rx_free_desc(sc, MAX_FRIN_SPILL);
-
-	/* S/w data structure initializations shared by all NA's. */
-	if (nl_tx_desc_zone == NULL) {
-		/* Create a zone for allocating tx descriptors */
-		nl_tx_desc_zone = uma_zcreate("NL Tx Desc",
-		    sizeof(struct nlge_tx_desc), NULL, NULL, NULL, NULL,
-		    XLR_CACHELINE_SIZE, 0);
-	}
-
-	/* Enable NA interrupts */
-	nlna_setup_intr(sc);
-
-	return (0);
-
-fail:
-	return (error);
-}
-
-static int
-nlna_detach(device_t dev)
-{
-	struct nlna_softc *sc;
-
-	sc = device_get_softc(dev);
-	if (device_is_alive(dev)) {
-		nlna_disable_intr(sc);
-		/* This will make sure that per-port detach is complete
-		 * and all traffic on the ports has been stopped. */
-		bus_generic_detach(dev);
-		uma_zdestroy(nl_tx_desc_zone);
-	}
-
-	return (0);
-}
-
-static int
-nlna_suspend(device_t dev)
-{
-
-	return (0);
-}
-
-static int
-nlna_resume(device_t dev)
-{
-
-	return (0);
-}
-
-static int
-nlna_shutdown(device_t dev)
-{
-	return (0);
-}
-
-
-/* GMAC port entry points */
-static int
-nlge_probe(device_t dev)
-{
-	struct nlge_softc	*sc;
-	struct xlr_gmac_port	*port_info;
-	int index;
-	char *desc[] = { "RGMII", "SGMII", "RGMII/SGMII", "XGMAC", "XAUI",
-	    "Unknown"};
-
-	port_info = device_get_ivars(dev);
-	index = (port_info->type < XLR_RGMII || port_info->type > XLR_XAUI) ?
-	    5 : port_info->type;
-	device_set_desc_copy(dev, desc[index]);
-
-	sc = device_get_softc(dev);
-	nlge_sc_init(sc, dev, port_info);
-
-	nlge_port_disable(sc);
-
-	return (0);
-}
-
-static int
-nlge_attach(device_t dev)
-{
-	struct nlge_softc *sc;
-	struct nlna_softc *nsc;
-	int error;
-
-	sc = device_get_softc(dev);
-
-	nlge_if_init(sc);
-	nlge_mii_init(dev, sc);
-	error = nlge_irq_init(sc);
-	if (error)
-		return error;
-	nlge_hw_init(sc);
-
-	nsc = (struct nlna_softc *)device_get_softc(device_get_parent(dev));
-	nsc->child_sc[sc->instance] = sc;
-
-	return (0);
-}
-
-static int
-nlge_detach(device_t dev)
-{
-	struct nlge_softc *sc;
-	struct ifnet   *ifp;
-	
-	sc = device_get_softc(dev);
-	ifp = sc->nlge_if;
-
-	if (device_is_attached(dev)) {
-		nlge_port_disable(sc);
-		nlge_irq_fini(sc);
-		ether_ifdetach(ifp);
-		bus_generic_detach(dev);
-	}
-	if (ifp)
-		if_free(ifp);
-
-	return (0);
-}
-
-static int
-nlge_suspend(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlge_resume(device_t dev)
-{
-	return (0);
-}
-
-static void
-nlge_init(void *addr)
-{
-	struct nlge_softc *sc;
-	struct ifnet   *ifp;
-
-	sc = (struct nlge_softc *)addr;
-	ifp = sc->nlge_if;
-
-	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
-		return;
-
-	nlge_gmac_config_speed(sc, 1);
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-	nlge_port_enable(sc);
-
-	if (sc->port_type == XLR_SGMII) {
-		dump_pcs_regs(sc, 27);
-	}
-	dump_gmac_registers(sc);
-	dump_mac_stats(sc);
-}
-
-static int
-nlge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
-	struct mii_data 	*mii;
-	struct nlge_softc 	*sc;
-	struct ifreq 		*ifr;
-	int 			error;
-
-	sc = ifp->if_softc;
-	error = 0;
-	ifr = (struct ifreq *)data;
-
-	switch(command) {
-	case SIOCSIFFLAGS:
-		NLGE_LOCK(sc);
-		if (ifp->if_flags & IFF_UP) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
-				nlge_init(sc);
-			}
-			if (ifp->if_flags & IFF_PROMISC &&
-			    !(sc->if_flags & IFF_PROMISC)) {
-				sc->if_flags |= IFF_PROMISC;
-				nlge_mac_set_rx_mode(sc);
-			} else if (!(ifp->if_flags & IFF_PROMISC) &&
-			    sc->if_flags & IFF_PROMISC) {
-				sc->if_flags &= IFF_PROMISC;
-				nlge_mac_set_rx_mode(sc);
-			}
-		} else {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
-				nlge_port_disable(sc);
-			}
-		}
-		sc->if_flags = ifp->if_flags;
-		NLGE_UNLOCK(sc);
-		error = 0;
-		break;
-		
-	case SIOCSIFMEDIA:
-	case SIOCGIFMEDIA:
-		if (sc->mii_bus != NULL) {
-			mii = (struct mii_data *)device_get_softc(sc->mii_bus);
-			error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
-			    command);
-		}
-		break;
-	
-	default:
-		error = ether_ioctl(ifp, command, data);
-		break;
-	}
-
-	return (error);
-}
-
-/* This function is called from an interrupt handler */
-void
-nlge_msgring_handler(int bucket, int size, int code, int stid,
-		    struct msgrng_msg *msg, void *data)
-{
-	struct nlna_softc *na_sc;
-	struct nlge_softc *sc;
-	struct ifnet	*ifp;
-	struct mbuf	*m;
-	vm_paddr_t	phys_addr;
-	uint32_t	length;
-	int		ctrl;
-	int		tx_error;
-	int		port;
-	int		is_p2p;
-
-	is_p2p = 0;
-	tx_error = 0;
-	length = (msg->msg0 >> 40) & 0x3fff;
-	na_sc = (struct nlna_softc *)data;
-	if (length == 0) {
-		ctrl = CTRL_REG_FREE;
-		phys_addr = msg->msg0 & 0xffffffffffULL;
-		port = (msg->msg0 >> 54) & 0x0f;
-		is_p2p = (msg->msg0 >> 62) & 0x1;
-		tx_error = (msg->msg0 >> 58) & 0xf;
-	} else {
-		ctrl = CTRL_SNGL;
-		phys_addr = msg->msg0 & 0xffffffffe0ULL;
-		length = length - BYTE_OFFSET - MAC_CRC_LEN;
-		port = msg->msg0 & 0x0f;
-	}
-
-	sc = na_sc->child_sc[port];
-	if (sc == NULL) {
-		printf("Message (of %d len) with softc=NULL on %d port (type=%s)\n",
-		    length, port, (ctrl == CTRL_SNGL ? "Pkt rx" :
-		    "Freeback for tx packet"));
-		return;
-	}
-
-	if (ctrl == CTRL_REG_FREE || ctrl == CTRL_JUMBO_FREE) {
-		ifp = sc->nlge_if;
-		if (!tx_error) {
-			if (is_p2p) {
-				release_tx_desc(phys_addr);
-			} else {
-#ifdef __mips_n64
-				m = (struct mbuf *)(uintptr_t)xlr_paddr_ld(phys_addr);
-				m->m_nextpkt = NULL;
-#else
-				m = (struct mbuf *)(uintptr_t)phys_addr;
-#endif
-				m_freem(m);
-			}
-			NLGE_LOCK(sc);
-			if (ifp->if_drv_flags & IFF_DRV_OACTIVE){
-				ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-			}
-			NLGE_UNLOCK(sc);
-		} else {
-			printf("ERROR: Tx fb error (%d) on port %d\n", tx_error,
-			    port);
-		}
-		tx_error ?
-		    if_inc_counter(ifp, IFCOUNTER_OERRORS, 1) :
-		    if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-	} else if (ctrl == CTRL_SNGL || ctrl == CTRL_START) {
-		/* Rx Packet */
-
-		nlge_rx(sc, phys_addr, length);
-		nlna_submit_rx_free_desc(na_sc, 1);	/* return free descr to NA */
-	} else {
-		printf("[%s]: unrecognized ctrl=%d!\n", __func__, ctrl);
-	}
-
-}
-
-static int
-nlge_tx(struct ifnet *ifp, struct mbuf *m)
-{
-	return (nlge_start_locked(ifp, ifp->if_softc, m));
-}
-
-static int
-nlge_start_locked(struct ifnet *ifp, struct nlge_softc *sc, struct mbuf *m)
-{
-	struct msgrng_msg 	msg;
-	struct nlge_tx_desc 	*tx_desc;
-	uint64_t		fr_stid;
-	uint32_t		cpu;	
-	uint32_t		n_entries;
-	uint32_t		tid;
-	int 			error, ret;
-
-	if (m == NULL)
-		return (0);
-
-	tx_desc = NULL;
-	error = 0;
-	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) ||
-	    ifp->if_drv_flags & IFF_DRV_OACTIVE) {
-	    	error = ENXIO;
-		goto fail;	// note: mbuf will get free'd
-	}
-
-	cpu = xlr_core_id();	
-	tid = xlr_thr_id();
-	/* H/w threads [0, 2] --> bucket 6 and [1, 3] --> bucket 7 */
-	fr_stid = cpu * 8 + 6 + (tid % 2); 
-
-	/*
-	 * First, remove some freeback messages before transmitting
-	 * any new packets. However, cap the number of messages
-	 * drained to permit this thread to continue with its
-	 * transmission.
-	 *
-	 * Mask for buckets {6, 7} is 0xc0
-	 */
-	xlr_msgring_handler(0xc0, 4);
-
-	ret = prepare_fmn_message(sc, &msg, &n_entries, m, fr_stid, &tx_desc);
-	if (ret) {
-		error = (ret == 2) ? ENOBUFS : ENOTSUP;
-		goto fail;
-	}
-	ret = send_fmn_msg_tx(sc, &msg, n_entries);
-	if (ret != 0) {
-		error = EBUSY;
-		goto fail;
-	}
-
-	return (0);
-
-fail:
-	if (tx_desc != NULL) {
-		uma_zfree(nl_tx_desc_zone, tx_desc);
-	}
-	if (m != NULL) {
-		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
-			NLGE_LOCK(sc);
-			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-			NLGE_UNLOCK(sc);
-		}
-		m_freem(m);
-		if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
-	}
-	return (error);
-}
-
-static void
-nlge_rx(struct nlge_softc *sc, vm_paddr_t paddr, int len)
-{
-	struct ifnet	*ifp;
-	struct mbuf	*m;
-	uint64_t	tm, mag;
-	uint32_t	sr;
-
-	sr = xlr_enable_kx();
-	tm = xlr_paddr_ld(paddr - XLR_CACHELINE_SIZE);
-	mag = xlr_paddr_ld(paddr - XLR_CACHELINE_SIZE + sizeof(uint64_t));
-	xlr_restore_kx(sr);
-
-	m = (struct mbuf *)(intptr_t)tm;
-	if (mag != 0xf00bad) {
-		/* somebody else's packet. Error - FIXME in intialization */
-		printf("cpu %d: *ERROR* Not my packet paddr %jx\n",
-		    xlr_core_id(), (uintmax_t)paddr);
-		return;
-	}
-
-	ifp = sc->nlge_if;
-
-#ifdef NLGE_HW_CHKSUM
-	m->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
-	if (m->m_data[10] & 0x2) {
-		m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
-		if (m->m_data[10] & 0x1) {
-			m->m_pkthdr.csum_flags |= (CSUM_DATA_VALID |
-			    CSUM_PSEUDO_HDR);
-			m->m_pkthdr.csum_data = htons(0xffff);
-		}
-	}
-	m->m_data += NLGE_PREPAD_LEN;
-	len -= NLGE_PREPAD_LEN;
-#else
-	m->m_pkthdr.csum_flags = 0;
-#endif
-
-	/* align the data */
-	m->m_data += BYTE_OFFSET ;
-	m->m_pkthdr.len = m->m_len = len;
-	m->m_pkthdr.rcvif = ifp;
-
-	if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-	(*ifp->if_input)(ifp, m);
-}
-
-static int
-nlge_mii_write(device_t dev, int phyaddr, int regidx, int regval)
-{
-	struct nlge_softc *sc;
-
-	sc = device_get_softc(dev);
-	if (sc->port_type != XLR_XGMII)
-		nlge_mii_write_internal(sc->mii_base, phyaddr, regidx, regval);
-
-	return (0);
-}
-
-static int
-nlge_mii_read(device_t dev, int phyaddr, int regidx)
-{
-	struct nlge_softc *sc;
-	int val;
-
-	sc = device_get_softc(dev);
-	val = (sc->port_type == XLR_XGMII) ? (0xffff) :
-	    nlge_mii_read_internal(sc->mii_base, phyaddr, regidx);
-
-	return (val);
-}
-
-static void
-nlge_mac_mii_statchg(device_t dev)
-{
-}
-
-static int
-nlge_mediachange(struct ifnet *ifp)
-{
-	return 0;
-}
-
-static void
-nlge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct nlge_softc *sc;
-	struct mii_data *md;
-	
-	md = NULL;
-	sc = ifp->if_softc;
-	if (sc->mii_bus)
-		md = device_get_softc(sc->mii_bus);
-
-	ifmr->ifm_status = IFM_AVALID;
-	ifmr->ifm_active = IFM_ETHER;
-
-	if (sc->link == xlr_mac_link_down)
-		return;
-
-	if (md != NULL)
-		ifmr->ifm_active = md->mii_media.ifm_cur->ifm_media;
-	ifmr->ifm_status |= IFM_ACTIVE;
-}
-
-static struct nlna_softc *
-nlna_sc_init(device_t dev, struct xlr_gmac_block_t *blk)
-{
-	struct nlna_softc	*sc;
-
-	sc = device_get_softc(dev);
-	memset(sc, 0, sizeof(*sc));
-	sc->nlna_dev = dev;
-	sc->base = xlr_io_mmio(blk->baseaddr);
-	sc->rfrbucket = blk->station_rfr;
-	sc->station_id = blk->station_id;
-	sc->na_type = blk->type;
-	sc->mac_type = blk->mode;
-	sc->num_ports = blk->num_ports;
-
-	sc->mdio_set.port_vec 	= sc->mdio_sc;
-	sc->mdio_set.vec_sz   	= XLR_MAX_MACS;
-
-	return (sc);
-}
-
-/*
- * Do:
- *     - Initialize common GMAC registers (index range 0x100-0x3ff).
- */
-static void
-nlna_hw_init(struct nlna_softc *sc)
-{
-
-	/*
-	 * Register message ring handler for the NA block, messages from
-	 * the GMAC will have source station id to the first bucket of the 
-	 * NA FMN station, so register just that station id.
-	 */
-	if (register_msgring_handler(sc->station_id, sc->station_id + 1,
-	    nlge_msgring_handler, sc)) {
-		panic("Couldn't register msgring handler\n");
-	}
-	nlna_config_fifo_spill_area(sc);
-	nlna_config_pde(sc);
-	nlna_config_common(sc);
-	nlna_config_parser(sc);
-	nlna_config_classifier(sc);
-}
-
-/*
- * Enable interrupts on all the ports controlled by this NA. For now, we
- * only care about the MII interrupt and this has to be enabled only
- * on the port id0.
- *
- * This function is not in-sync with the regular way of doing things - it
- * executes only in the context of the last active network accelerator (and
- * thereby has some ugly accesses in the device tree). Though inelegant, it
- * is necessary to do it this way as the per-port interrupts can be
- * setup/enabled only after all the network accelerators have been
- * initialized.
- */
-static void
-nlna_setup_intr(struct nlna_softc *sc)
-{
-	struct nlna_softc *na_sc[XLR_MAX_NLNA];
-	struct nlge_port_set *pset;
-	struct xlr_gmac_port *port_info;
-	device_t	iodi_dev;
-	int 		i, j;
-
-	if (!nlna_is_last_active_na(sc))
-		return ;
-
-	/* Collect all nlna softc pointers */
-	memset(na_sc, 0, sizeof(*na_sc) * XLR_MAX_NLNA);
-	iodi_dev = device_get_parent(sc->nlna_dev);
-	nlna_get_all_softc(iodi_dev, na_sc, XLR_MAX_NLNA);
-
-	/* Setup the MDIO interrupt lists. */
-	/*
-	 * MDIO interrupts are coarse - a single interrupt line provides
-	 * information about one of many possible ports. To figure out the
-	 * exact port on which action is to be taken, all of the ports
-	 * linked to an MDIO interrupt should be read. To enable this,
-	 * ports need to add themselves to port sets.
-	 */
-	for (i = 0; i < XLR_MAX_NLNA; i++) {
-		if (na_sc[i] == NULL)
-			continue;
-		for (j = 0; j < na_sc[i]->num_ports; j++) {
-			/* processing j-th port on i-th NA */
-			port_info = device_get_ivars(
-			    na_sc[i]->child_sc[j]->nlge_dev);	
-			pset = &na_sc[port_info->mdint_id]->mdio_set;
-			nlna_add_to_port_set(pset, na_sc[i]->child_sc[j]);
-		}
-	}
-
-	/* Enable interrupts */
-	for (i = 0; i < XLR_MAX_NLNA; i++) {
-		if (na_sc[i] != NULL && na_sc[i]->na_type != XLR_XGMAC) {
-			nlna_enable_intr(na_sc[i]);
-		}
-	}
-}
-
-static void
-nlna_add_to_port_set(struct nlge_port_set *pset, struct nlge_softc *sc)
-{
-	int i;
-
-	/* step past the non-NULL elements */
-	for (i = 0; i < pset->vec_sz && pset->port_vec[i] != NULL; i++) ;
-	if (i < pset->vec_sz)
-		pset->port_vec[i] = sc;
-	else
-		printf("warning: internal error: out-of-bounds for MDIO array");
-}
-
-static void
-nlna_enable_intr(struct nlna_softc *sc)
-{
-	int i;
-
-	for (i = 0; i < sc->num_ports; i++) {
-		if (sc->child_sc[i]->instance == 0)
-			NLGE_WRITE(sc->child_sc[i]->base, R_INTMASK,
-			    (1 << O_INTMASK__MDInt));
-	}
-}
-
-static void
-nlna_disable_intr(struct nlna_softc *sc)
-{
-	int i;
-
-	for (i = 0; i < sc->num_ports; i++) {
-		if (sc->child_sc[i]->instance == 0)
-			NLGE_WRITE(sc->child_sc[i]->base, R_INTMASK, 0);
-	}
-}
-
-static int
-nlna_is_last_active_na(struct nlna_softc *sc)
-{
-	int id;
-
-	id = device_get_unit(sc->nlna_dev);
-	return (id == 2 || xlr_board_info.gmac_block[id + 1].enabled == 0);
-}
-
-static void
-nlna_submit_rx_free_desc(struct nlna_softc *sc, uint32_t n_desc)
-{
-	struct msgrng_msg msg;
-	void           *ptr;
-	uint32_t	msgrng_flags;
-	int		i, n, stid, ret, code;
-
-	if (n_desc > 1) {
-		PDEBUG("Sending %d free-in descriptors to station=%d\n", n_desc,
-		    sc->rfrbucket);
-	}
-
-	stid = sc->rfrbucket;
-	code = (sc->na_type == XLR_XGMAC) ? MSGRNG_CODE_XGMAC : MSGRNG_CODE_MAC;
-	memset(&msg, 0, sizeof(msg));
-
-	for (i = 0; i < n_desc; i++) {
-		ptr = get_buf();
-		if (!ptr) {
-			ret = -ENOMEM;
-			device_printf(sc->nlna_dev, "Cannot allocate mbuf\n");
-			break;
-		}
-
-		/* Send the free Rx desc to the MAC */
-		msg.msg0 = vtophys(ptr) & 0xffffffffe0ULL;
-		n = 0;
-		do {
-			msgrng_flags = msgrng_access_enable();
-			ret = message_send(1, code, stid, &msg);
-			msgrng_restore(msgrng_flags);
-			KASSERT(n++ < 100000, ("Too many credit fails in rx path\n"));
-		} while (ret != 0);
-	}
-}
-
-static __inline__ void *
-nlna_config_spill(xlr_reg_t *base, int reg_start_0, int reg_start_1,
-    int reg_size, int size)
-{
-	void	*spill;
-	uint64_t phys_addr;
-	uint32_t spill_size;
-
-	spill_size = size;
-	spill = contigmalloc((spill_size + XLR_CACHELINE_SIZE), M_DEVBUF,
-	    M_NOWAIT | M_ZERO, 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-	if (spill == NULL || ((vm_offset_t) spill & (XLR_CACHELINE_SIZE - 1))) {
-		panic("Unable to allocate memory for spill area!\n");
-	}
-	phys_addr = vtophys(spill);
-	PDEBUG("Allocated spill %d bytes at %llx\n", size, phys_addr);
-	NLGE_WRITE(base, reg_start_0, (phys_addr >> 5) & 0xffffffff);
-	NLGE_WRITE(base, reg_start_1, (phys_addr >> 37) & 0x07);
-	NLGE_WRITE(base, reg_size, spill_size);
-
-	return (spill);
-}
-
-/*
- * Configure the 6 FIFO's that are used by the network accelarator to
- * communicate with the rest of the XLx device. 4 of the FIFO's are for
- * packets from NA --> cpu (called Class FIFO's) and 2 are for feeding
- * the NA with free descriptors.
- */
-static void
-nlna_config_fifo_spill_area(struct nlna_softc *sc)
-{
-	sc->frin_spill = nlna_config_spill(sc->base,
-				     	R_REG_FRIN_SPILL_MEM_START_0,
-				     	R_REG_FRIN_SPILL_MEM_START_1,
-				     	R_REG_FRIN_SPILL_MEM_SIZE,
-				     	MAX_FRIN_SPILL *
-				     	sizeof(struct fr_desc));
-	sc->frout_spill = nlna_config_spill(sc->base,
-				     	R_FROUT_SPILL_MEM_START_0,
-				     	R_FROUT_SPILL_MEM_START_1,
-				     	R_FROUT_SPILL_MEM_SIZE,
-				     	MAX_FROUT_SPILL *
-				     	sizeof(struct fr_desc));
-	sc->class_0_spill = nlna_config_spill(sc->base,
-				     	R_CLASS0_SPILL_MEM_START_0,
-				     	R_CLASS0_SPILL_MEM_START_1,
-				     	R_CLASS0_SPILL_MEM_SIZE,
-				     	MAX_CLASS_0_SPILL *
-				     	sizeof(union rx_tx_desc));
-	sc->class_1_spill = nlna_config_spill(sc->base,
-				     	R_CLASS1_SPILL_MEM_START_0,
-				     	R_CLASS1_SPILL_MEM_START_1,
-				     	R_CLASS1_SPILL_MEM_SIZE,
-				     	MAX_CLASS_1_SPILL *
-				     	sizeof(union rx_tx_desc));
-	sc->class_2_spill = nlna_config_spill(sc->base,
-				     	R_CLASS2_SPILL_MEM_START_0,
-				     	R_CLASS2_SPILL_MEM_START_1,
-				     	R_CLASS2_SPILL_MEM_SIZE,
-				     	MAX_CLASS_2_SPILL *
-				     	sizeof(union rx_tx_desc));
-	sc->class_3_spill = nlna_config_spill(sc->base,
-				     	R_CLASS3_SPILL_MEM_START_0,
-				     	R_CLASS3_SPILL_MEM_START_1,
-				     	R_CLASS3_SPILL_MEM_SIZE,
-				     	MAX_CLASS_3_SPILL *
-				     	sizeof(union rx_tx_desc));
-}
-
-/* Set the CPU buckets that receive packets from the NA class FIFOs. */
-static void
-nlna_config_pde(struct nlna_softc *sc)
-{
-	uint64_t	bucket_map;
-	uint32_t	cpumask;
-	int		i, cpu, bucket;
-
-	cpumask = 0x1;
-#ifdef SMP
-	/*
-         * nlna may be called before SMP start in a BOOTP/NFSROOT
-         * setup. we will distribute packets to other cpus only when
-         * the SMP is started.
-	 */
-	if (smp_started)
-		cpumask = xlr_hw_thread_mask;
-#endif
-	bucket_map = 0;
-	for (i = 0; i < 32; i++) {
-		if (cpumask & (1 << i)) {
-			cpu = i;
-			/* use bucket 0 and 1 on every core for NA msgs */
-			bucket = cpu/4 * 8;
-			bucket_map |= (3ULL << bucket);
-		}
-	}
-
-	NLGE_WRITE(sc->base, R_PDE_CLASS_0, (bucket_map & 0xffffffff));
-	NLGE_WRITE(sc->base, R_PDE_CLASS_0 + 1, ((bucket_map >> 32) & 0xffffffff));
-
-	NLGE_WRITE(sc->base, R_PDE_CLASS_1, (bucket_map & 0xffffffff));
-	NLGE_WRITE(sc->base, R_PDE_CLASS_1 + 1, ((bucket_map >> 32) & 0xffffffff));
-
-	NLGE_WRITE(sc->base, R_PDE_CLASS_2, (bucket_map & 0xffffffff));
-	NLGE_WRITE(sc->base, R_PDE_CLASS_2 + 1, ((bucket_map >> 32) & 0xffffffff));
-
-	NLGE_WRITE(sc->base, R_PDE_CLASS_3, (bucket_map & 0xffffffff));
-	NLGE_WRITE(sc->base, R_PDE_CLASS_3 + 1, ((bucket_map >> 32) & 0xffffffff));
-}
-
-/*
- * Update the network accelerator packet distribution engine for SMP.
- * On bootup, we have just the boot hw thread handling all packets, on SMP
- * start, we can start distributing packets across all the cores which are up.
- */
-static void
-nlna_smp_update_pde(void *dummy __unused)
-{
-	device_t	   iodi_dev;
-	struct nlna_softc *na_sc[XLR_MAX_NLNA];
-	int i;
-
-	printf("Updating packet distribution for SMP\n");
-
-	iodi_dev = devclass_get_device(devclass_find("iodi"), 0);
-	nlna_get_all_softc(iodi_dev, na_sc, XLR_MAX_NLNA);
-
-	for (i = 0; i < XLR_MAX_NLNA; i++) {
-		if (na_sc[i] == NULL)
-			continue;
-		nlna_disable_ports(na_sc[i]);
-		nlna_config_pde(na_sc[i]);
-		nlna_config_translate_table(na_sc[i]);
-		nlna_enable_ports(na_sc[i]);
-	}
-}
-
-SYSINIT(nlna_smp_update_pde, SI_SUB_SMP, SI_ORDER_ANY, nlna_smp_update_pde,
-    NULL);
-
-static void
-nlna_config_translate_table(struct nlna_softc *sc)
-{
-	uint32_t cpu_mask;
-	uint32_t val;
-	int bkts[32]; /* one bucket is assumed for each cpu */
-	int b1, b2, c1, c2, i, j, k;
-	int use_bkt;
-
-	if (!flow_classification)
-		return;
-
-	use_bkt = 1;
-	if (smp_started)
-		cpu_mask = xlr_hw_thread_mask;
-	else
-		return;
-
-	printf("Using %s-based distribution\n", (use_bkt) ? "bucket" : "class");
-
-	j = 0;
-	for(i = 0; i < 32; i++) {
-		if ((1 << i) & cpu_mask){
-		/* for each cpu, mark the 4+threadid bucket */
-			bkts[j] = ((i / 4) * 8) + (i % 4);
-			j++;
-		}
-	}
-
-	/*configure the 128 * 9 Translation table to send to available buckets*/
-	k = 0;
-	c1 = 3;
-	c2 = 0;
-	for(i = 0; i < 64; i++) {
-		/* Get the next 2 pairs of (class, bucket):
-		   (c1, b1), (c2, b2). 
-
-		   c1, c2 limited to {0, 1, 2, 3} 
-		       i.e, the 4 classes defined by h/w
-		   b1, b2 limited to { bkts[i], where 0 <= i < j}
-		       i.e, the set of buckets computed in the
-		       above loop.
-		*/
-
-		c1 = (c1 + 1) & 3;
-		c2 = (c1 + 1) & 3;
-		b1 = bkts[k];
-		k = (k + 1) % j;
-		b2 = bkts[k];
-		k = (k + 1) % j;
-		PDEBUG("Translation table[%d] b1=%d b2=%d c1=%d c2=%d\n",
-		    i, b1, b2, c1, c2);
-		val = ((c1 << 23) | (b1 << 17) | (use_bkt << 16) |
-		    (c2 << 7) | (b2 << 1) | (use_bkt << 0));
-		NLGE_WRITE(sc->base, R_TRANSLATETABLE + i, val);
-		c1 = c2;
-	}
-}
-
-static void
-nlna_config_parser(struct nlna_softc *sc)
-{
-	uint32_t val;
-
-	/*
-	 * Mark it as ETHERNET type.
-	 */
-	NLGE_WRITE(sc->base, R_L2TYPE_0, 0x01);
-
-#ifndef NLGE_HW_CHKSUM
-	if (!flow_classification)
-		return;
-#endif
-
-	/* Use 7bit CRChash for flow classification with 127 as CRC polynomial*/
-	NLGE_WRITE(sc->base, R_PARSERCONFIGREG, ((0x7f << 8) | (1 << 1)));
-
-	/* configure the parser : L2 Type is configured in the bootloader */
-	/* extract IP: src, dest protocol */
-	NLGE_WRITE(sc->base, R_L3CTABLE,
-	    (9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) |
-	    (0x0800 << 0));
-	NLGE_WRITE(sc->base, R_L3CTABLE + 1,
-	    (9 << 25) | (1 << 21) | (12 << 14) | (4 << 10) | (16 << 4) | 4);
-#ifdef NLGE_HW_CHKSUM
-	device_printf(sc->nlna_dev, "Enabled h/w support to compute TCP/IP"
-	    " checksum\n");
-#endif
-
-	/* Configure to extract SRC port and Dest port for TCP and UDP pkts */
-	NLGE_WRITE(sc->base, R_L4CTABLE, 6);
-	NLGE_WRITE(sc->base, R_L4CTABLE + 2, 17);
-	val = ((0 << 21) | (2 << 17) | (2 << 11) | (2 << 7));
-	NLGE_WRITE(sc->base, R_L4CTABLE + 1, val);
-	NLGE_WRITE(sc->base, R_L4CTABLE + 3, val);
-}
-
-static void
-nlna_config_classifier(struct nlna_softc *sc)
-{
-	int i;
-
-	if (sc->mac_type == XLR_XGMII) {	/* TBD: XGMII init sequence */
-		/* xgmac translation table doesn't have sane values on reset */
-		for (i = 0; i < 64; i++)
-			NLGE_WRITE(sc->base, R_TRANSLATETABLE + i, 0x0);
-
-		/*
-		 * use upper 7 bits of the parser extract to index the
-		 * translate table
-		 */
-		NLGE_WRITE(sc->base, R_PARSERCONFIGREG, 0x0);
-	}
-}
-
-/*
- * Complete a bunch of h/w register initializations that are common for all the
- * ports controlled by a NA.
- */
-static void
-nlna_config_common(struct nlna_softc *sc)
-{
-	struct xlr_gmac_block_t *block_info;
-	struct stn_cc 		*gmac_cc_config;
-	int			i;
-
-	block_info = device_get_ivars(sc->nlna_dev);
-	gmac_cc_config = block_info->credit_config;
-	for (i = 0; i < MAX_NUM_MSGRNG_STN_CC; i++) {
-		NLGE_WRITE(sc->base, R_CC_CPU0_0 + i,
-		    gmac_cc_config->counters[i >> 3][i & 0x07]);
-	}
-
-	NLGE_WRITE(sc->base, R_MSG_TX_THRESHOLD, 3);
-
-	NLGE_WRITE(sc->base, R_DMACR0, 0xffffffff);
-	NLGE_WRITE(sc->base, R_DMACR1, 0xffffffff);
-	NLGE_WRITE(sc->base, R_DMACR2, 0xffffffff);
-	NLGE_WRITE(sc->base, R_DMACR3, 0xffffffff);
-	NLGE_WRITE(sc->base, R_FREEQCARVE, 0);
-
-	nlna_media_specific_config(sc);
-}
-
-static void
-nlna_media_specific_config(struct nlna_softc *sc)
-{
-	struct bucket_size *bucket_sizes;
-
-	bucket_sizes = xlr_board_info.bucket_sizes;
-	switch (sc->mac_type) {
-	case XLR_RGMII:
-	case XLR_SGMII:
-	case XLR_XAUI:
-		NLGE_WRITE(sc->base, R_GMAC_JFR0_BUCKET_SIZE,
-		    bucket_sizes->bucket[MSGRNG_STNID_GMACJFR_0]);
-		NLGE_WRITE(sc->base, R_GMAC_RFR0_BUCKET_SIZE,
-		    bucket_sizes->bucket[MSGRNG_STNID_GMACRFR_0]);
-		NLGE_WRITE(sc->base, R_GMAC_JFR1_BUCKET_SIZE,
-		    bucket_sizes->bucket[MSGRNG_STNID_GMACJFR_1]);
-		NLGE_WRITE(sc->base, R_GMAC_RFR1_BUCKET_SIZE,
-		    bucket_sizes->bucket[MSGRNG_STNID_GMACRFR_1]);
-
-		if (sc->mac_type == XLR_XAUI) {
-			NLGE_WRITE(sc->base, R_TXDATAFIFO0, (224 << 16));
-		}
-		break;
-	
-	case XLR_XGMII:
-		NLGE_WRITE(sc->base, R_XGS_RFR_BUCKET_SIZE,
-		    bucket_sizes->bucket[sc->rfrbucket]);
-
-	default:
-		break;
-	}
-}
-
-static void
-nlna_reset_ports(struct nlna_softc *sc, struct xlr_gmac_block_t *blk)
-{
-	xlr_reg_t *addr;
-	int i;
-	uint32_t   rx_ctrl;
-
-	/* Refer Section 13.9.3 in the PRM for the reset sequence */
-
-	for (i = 0; i < sc->num_ports; i++) {
-		addr = xlr_io_mmio(blk->gmac_port[i].base_addr);
-
-		/* 1. Reset RxEnable in MAC_CONFIG */
-		switch (sc->mac_type) {
-		case XLR_RGMII:
-		case XLR_SGMII:
-			NLGE_UPDATE(addr, R_MAC_CONFIG_1, 0,
-			    (1 << O_MAC_CONFIG_1__rxen));
-			break;
-		case XLR_XAUI:
-		case XLR_XGMII:
-			NLGE_UPDATE(addr, R_RX_CONTROL, 0,
-			   (1 << O_RX_CONTROL__RxEnable));
-			break;
-		default:
-			printf("Error: Unsupported port_type=%d\n",
-			    sc->mac_type);
-		}
-
-		/* 1.1 Wait for RxControl.RxHalt to be set */
-		do {
-			rx_ctrl = NLGE_READ(addr, R_RX_CONTROL);
-		} while (!(rx_ctrl & 0x2));
-
-		/* 2. Set the soft reset bit in RxControl */
-		NLGE_UPDATE(addr, R_RX_CONTROL, (1 << O_RX_CONTROL__SoftReset),
-		    (1 << O_RX_CONTROL__SoftReset));
-
-		/* 2.1 Wait for RxControl.SoftResetDone to be set */
-		do {
-			rx_ctrl = NLGE_READ(addr, R_RX_CONTROL);
-		} while (!(rx_ctrl & 0x8));
-
-		/* 3. Clear the soft reset bit in RxControl */
-		NLGE_UPDATE(addr, R_RX_CONTROL, 0,
-		    (1 << O_RX_CONTROL__SoftReset));
-
-		/* Turn off tx/rx on the port. */
-		NLGE_UPDATE(addr, R_RX_CONTROL, 0,
-		    (1 << O_RX_CONTROL__RxEnable));
-		NLGE_UPDATE(addr, R_TX_CONTROL, 0,
-		    (1 << O_TX_CONTROL__TxEnable));
-	}
-}
-
-static void
-nlna_disable_ports(struct nlna_softc *sc)
-{
-	int i;
-
-	for (i = 0; i < sc->num_ports; i++) {
-		if (sc->child_sc[i] != NULL)
-			nlge_port_disable(sc->child_sc[i]);
-	}
-}
-
-static void
-nlna_enable_ports(struct nlna_softc *sc)
-{
-	device_t		nlge_dev, *devlist;
-	struct nlge_softc 	*port_sc;
-	int 			i, numdevs;
-
-	device_get_children(sc->nlna_dev, &devlist, &numdevs);
-	for (i = 0; i < numdevs; i++) {
-		nlge_dev = devlist[i];
-		if (nlge_dev == NULL)
-			continue;
-		port_sc = device_get_softc(nlge_dev);
-		if (port_sc->nlge_if->if_drv_flags & IFF_DRV_RUNNING)
-			nlge_port_enable(port_sc);
-	}
-	free(devlist, M_TEMP);
-}
-
-static void
-nlna_get_all_softc(device_t iodi_dev, struct nlna_softc **sc_vec,
-		   uint32_t vec_sz)
-{
-	device_t  na_dev;
-	int       i;
-
-	for (i = 0; i < vec_sz; i++) {
-		sc_vec[i] = NULL;
-		na_dev = device_find_child(iodi_dev, "nlna", i);
-		if (na_dev != NULL)
-			sc_vec[i] = device_get_softc(na_dev);
-	}
-}
-
-static void
-nlge_port_disable(struct nlge_softc *sc)
-{
-	struct ifnet *ifp;
-	xlr_reg_t *base;
-	uint32_t rd;
-	int id, port_type;
-
-	id = sc->id;
-	port_type = sc->port_type;
-	base = sc->base;
-	ifp = sc->nlge_if;
-
-	NLGE_UPDATE(base, R_RX_CONTROL, 0x0, 1 << O_RX_CONTROL__RxEnable);
-	do {
-		rd = NLGE_READ(base, R_RX_CONTROL);
-	} while (!(rd & (1 << O_RX_CONTROL__RxHalt)));
-
-	NLGE_UPDATE(base, R_TX_CONTROL, 0, 1 << O_TX_CONTROL__TxEnable);
-	do {
-		rd = NLGE_READ(base, R_TX_CONTROL);
-	} while (!(rd & (1 << O_TX_CONTROL__TxIdle)));
-
-	switch (port_type) {
-	case XLR_RGMII:
-	case XLR_SGMII:
-		NLGE_UPDATE(base, R_MAC_CONFIG_1, 0,
-		   ((1 << O_MAC_CONFIG_1__rxen) |
-		   (1 << O_MAC_CONFIG_1__txen)));
-		break;
-	case XLR_XGMII:
-	case XLR_XAUI:
-		NLGE_UPDATE(base, R_XGMAC_CONFIG_1, 0,
-		   ((1 << O_XGMAC_CONFIG_1__hsttfen) |
-		   (1 << O_XGMAC_CONFIG_1__hstrfen)));
-		break;
-	default:
-		panic("Unknown MAC type on port %d\n", id);
-	}
-
-	if (ifp) {
-		ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-	}
-}
-
-static void
-nlge_port_enable(struct nlge_softc *sc)
-{
-	struct xlr_gmac_port  *self;
-	xlr_reg_t *base;
-
-	base = sc->base;
-	self = device_get_ivars(sc->nlge_dev);
-	if (xlr_board_info.is_xls && sc->port_type == XLR_RGMII)
-		NLGE_UPDATE(base, R_RX_CONTROL, (1 << O_RX_CONTROL__RGMII),
-	    	    (1 << O_RX_CONTROL__RGMII));
-
-	NLGE_UPDATE(base, R_RX_CONTROL, (1 << O_RX_CONTROL__RxEnable),
-	    (1 << O_RX_CONTROL__RxEnable));
-	NLGE_UPDATE(base, R_TX_CONTROL,
-	    (1 << O_TX_CONTROL__TxEnable | RGE_TX_THRESHOLD_BYTES),
-	    (1 << O_TX_CONTROL__TxEnable | 0x3fff));
-	switch (sc->port_type) {
-	case XLR_RGMII:
-	case XLR_SGMII:
-		NLGE_UPDATE(base, R_MAC_CONFIG_1,
-		    ((1 << O_MAC_CONFIG_1__rxen) | (1 << O_MAC_CONFIG_1__txen)),
-		    ((1 << O_MAC_CONFIG_1__rxen) | (1 << O_MAC_CONFIG_1__txen)));
-		break;
-	case XLR_XGMII:
-	case XLR_XAUI:
-		NLGE_UPDATE(base, R_XGMAC_CONFIG_1,
-		    ((1 << O_XGMAC_CONFIG_1__hsttfen) | (1 << O_XGMAC_CONFIG_1__hstrfen)),
-		    ((1 << O_XGMAC_CONFIG_1__hsttfen) | (1 << O_XGMAC_CONFIG_1__hstrfen)));
-		break;
-	default:
-		panic("Unknown MAC type on port %d\n", sc->id);
-	}
-}
-
-static void
-nlge_mac_set_rx_mode(struct nlge_softc *sc)
-{
-	uint32_t regval;
-
-	regval = NLGE_READ(sc->base, R_MAC_FILTER_CONFIG);
-
-	if (sc->if_flags & IFF_PROMISC) {
-		regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
-		    (1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) |
-		    (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
-		    (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN);
-	} else {
-		regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) |
-		    (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN));
-	}
-
-	NLGE_WRITE(sc->base, R_MAC_FILTER_CONFIG, regval);
-}
-
-static void
-nlge_sgmii_init(struct nlge_softc *sc)
-{
-	xlr_reg_t *mmio_gpio;
-	int phy;
-
-	if (sc->port_type != XLR_SGMII)
-		return;
-
-	nlge_mii_write_internal(sc->serdes_addr, 26, 0, 0x6DB0);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 1, 0xFFFF);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 2, 0xB6D0);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 3, 0x00FF);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 4, 0x0000);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 5, 0x0000);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 6, 0x0005);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 7, 0x0001);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 8, 0x0000);
-	nlge_mii_write_internal(sc->serdes_addr, 26, 9, 0x0000);
-	nlge_mii_write_internal(sc->serdes_addr, 26,10, 0x0000);
-
-	/* program  GPIO values for serdes init parameters */
-	DELAY(100);
-	mmio_gpio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
-	xlr_write_reg(mmio_gpio, 0x20, 0x7e6802);
-	xlr_write_reg(mmio_gpio, 0x10, 0x7104);
-	DELAY(100);
-
-	/* 
-	 * This kludge is needed to setup serdes (?) clock correctly on some
-	 * XLS boards
-	 */
-	if ((xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XI ||
-	    xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XII) &&
-	    xlr_boot1_info.board_minor_version == 4) {
-		/* use 125 Mhz instead of 156.25Mhz ref clock */
-		DELAY(100);
-		xlr_write_reg(mmio_gpio, 0x10, 0x7103);
-		xlr_write_reg(mmio_gpio, 0x21, 0x7103);
-		DELAY(100);
-	}
-
-	/* enable autoneg - more magic */
-	phy = sc->phy_addr % 4 + 27;
-	nlge_mii_write_internal(sc->pcs_addr, phy, 0, 0x1000);
-	DELAY(100000);
-	nlge_mii_write_internal(sc->pcs_addr, phy, 0, 0x0200);
-	DELAY(100000);
-}
-
-static void
-nlge_intr(void *arg)
-{
-	struct nlge_port_set    *pset;
-	struct nlge_softc 	*sc;
-	struct nlge_softc 	*port_sc;
-	xlr_reg_t 		*base;
-	uint32_t		intreg;
-	uint32_t		intr_status;
-	int 			i;
-
-	sc = arg;
-	if (sc == NULL) {
-		printf("warning: No port registered for interrupt\n");
-		return;
-	}
-	base = sc->base;
-
-	intreg = NLGE_READ(base, R_INTREG);
-	if (intreg & (1 << O_INTREG__MDInt)) {
-		pset = sc->mdio_pset;
-		if (pset == NULL) {
-			printf("warning: No ports for MDIO interrupt\n");
-			return;
-		}
-		for (i = 0; i < pset->vec_sz; i++) {
-			port_sc = pset->port_vec[i];
-
-			if (port_sc == NULL)
-				continue;
-
-			/* Ack phy interrupt - clear on read*/
-			intr_status = nlge_mii_read_internal(port_sc->mii_base,
-			    port_sc->phy_addr, 26);
-			PDEBUG("Phy_%d: int_status=0x%08x\n", port_sc->phy_addr,
-			    intr_status);
-
-			if (!(intr_status & 0x8000)) {
-				/* no interrupt for this port */
-				continue;
-			}
-
-			if (intr_status & 0x2410) {
-				/* update link status for port */
-				nlge_gmac_config_speed(port_sc, 1);
-			} else {
-				printf("%s: Unsupported phy interrupt"
-				    " (0x%08x)\n",
-				    device_get_nameunit(port_sc->nlge_dev),
-				    intr_status);
-			}
-		}
-	}
-
-	/* Clear the NA interrupt */
-	xlr_write_reg(base, R_INTREG, 0xffffffff);
-
-	return;
-}
-
-static int
-nlge_irq_init(struct nlge_softc *sc)
-{
-	struct resource		irq_res;
-	struct nlna_softc  	*na_sc;
-	struct xlr_gmac_block_t *block_info;
-	device_t		na_dev;
-	int			ret;
-	int			irq_num;
-
-	na_dev = device_get_parent(sc->nlge_dev);
-	block_info = device_get_ivars(na_dev);
-
-	irq_num = block_info->baseirq + sc->instance;
-	irq_res.__r_i = (struct resource_i *)(intptr_t) (irq_num);
-	ret = bus_setup_intr(sc->nlge_dev, &irq_res,
-	    INTR_TYPE_NET | INTR_MPSAFE, NULL, nlge_intr, sc, NULL);
-	if (ret) {
-		nlge_detach(sc->nlge_dev);
-		device_printf(sc->nlge_dev, "couldn't set up irq: error=%d\n",
-		    ret);
-		return (ENXIO);
-	}
-	PDEBUG("Setup intr for dev=%s, irq=%d\n",
-	    device_get_nameunit(sc->nlge_dev), irq_num);
-	
-	if (sc->instance == 0) {
-		na_sc = device_get_softc(na_dev);
-		sc->mdio_pset = &na_sc->mdio_set;
-	}
-	return (0);
-}
-
-static void
-nlge_irq_fini(struct nlge_softc *sc)
-{
-}
-
-static void
-nlge_hw_init(struct nlge_softc *sc)
-{
-	struct xlr_gmac_port  *port_info;
-	xlr_reg_t *base;
-
-	base = sc->base;
-	port_info = device_get_ivars(sc->nlge_dev);
-	sc->tx_bucket_id = port_info->tx_bucket_id;
-
-	/* each packet buffer is 1536 bytes */
-	NLGE_WRITE(base, R_DESC_PACK_CTRL,
-	    (1 << O_DESC_PACK_CTRL__MaxEntry) |
-#ifdef NLGE_HW_CHKSUM
-	    (1 << O_DESC_PACK_CTRL__PrePadEnable) |
-#endif
-	    (MAX_FRAME_SIZE << O_DESC_PACK_CTRL__RegularSize));
-	NLGE_WRITE(base, R_STATCTRL, ((1 << O_STATCTRL__Sten) |
-	    (1 << O_STATCTRL__ClrCnt)));
-	NLGE_WRITE(base, R_L2ALLOCCTRL, 0xffffffff);
-	NLGE_WRITE(base, R_INTMASK, 0);
-	nlge_set_mac_addr(sc);
-	nlge_media_specific_init(sc);
-}
-
-static void
-nlge_sc_init(struct nlge_softc *sc, device_t dev,
-    struct xlr_gmac_port *port_info)
-{
-	memset(sc, 0, sizeof(*sc));
-	sc->nlge_dev = dev;
-	sc->id = device_get_unit(dev);
-	nlge_set_port_attribs(sc, port_info);
-}
-
-static void
-nlge_media_specific_init(struct nlge_softc *sc)
-{
-	struct mii_data *media;
-	struct bucket_size *bucket_sizes;
-
-	bucket_sizes = xlr_board_info.bucket_sizes;
-	switch (sc->port_type) {
-	case XLR_RGMII:
-	case XLR_SGMII:
-	case XLR_XAUI:
-		NLGE_UPDATE(sc->base, R_DESC_PACK_CTRL,
-		    (BYTE_OFFSET << O_DESC_PACK_CTRL__ByteOffset),
-		    (W_DESC_PACK_CTRL__ByteOffset <<
-		        O_DESC_PACK_CTRL__ByteOffset));
-		NLGE_WRITE(sc->base, R_GMAC_TX0_BUCKET_SIZE + sc->instance,
-		    bucket_sizes->bucket[sc->tx_bucket_id]);
-		if (sc->port_type != XLR_XAUI) {
-			nlge_gmac_config_speed(sc, 1);
-			if (sc->mii_bus) {
-				media = (struct mii_data *)device_get_softc(
-				    sc->mii_bus);
-			}
-		}
-		break;
-
-	case XLR_XGMII:
-		NLGE_WRITE(sc->base, R_BYTEOFFSET0, 0x2);
-		NLGE_WRITE(sc->base, R_XGMACPADCALIBRATION, 0x30);
-		NLGE_WRITE(sc->base, R_XGS_TX0_BUCKET_SIZE,
-		    bucket_sizes->bucket[sc->tx_bucket_id]);
-		break;
-	default:
-		break;
-	}
-}
-
-/*
- * Read the MAC address from the XLR boot registers. All port addresses
- * are identical except for the lowest octet.
- */
-static void
-nlge_read_mac_addr(struct nlge_softc *sc)
-{
-	int i, j;
-
-	for (i = 0, j = 40; i < ETHER_ADDR_LEN && j >= 0; i++, j-= 8)
-		sc->dev_addr[i] = (xlr_boot1_info.mac_addr >> j) & 0xff;
-
-	sc->dev_addr[i - 1] +=  sc->id;	/* last octet is port-specific */
-}
-
-/*
- * Write the MAC address to the XLR MAC port. Also, set the address
- * masks and MAC filter configuration.
- */
-static void
-nlge_set_mac_addr(struct nlge_softc *sc)
-{
-	NLGE_WRITE(sc->base, R_MAC_ADDR0,
-		  ((sc->dev_addr[5] << 24) | (sc->dev_addr[4] << 16) |
-		   (sc->dev_addr[3] << 8) | (sc->dev_addr[2])));
-	NLGE_WRITE(sc->base, R_MAC_ADDR0 + 1,
-		  ((sc->dev_addr[1] << 24) | (sc-> dev_addr[0] << 16)));
-
-	NLGE_WRITE(sc->base, R_MAC_ADDR_MASK2, 0xffffffff);
-	NLGE_WRITE(sc->base, R_MAC_ADDR_MASK2 + 1, 0xffffffff);
-	NLGE_WRITE(sc->base, R_MAC_ADDR_MASK3, 0xffffffff);
-	NLGE_WRITE(sc->base, R_MAC_ADDR_MASK3 + 1, 0xffffffff);
-
-	NLGE_WRITE(sc->base, R_MAC_FILTER_CONFIG,
-		  (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
-		  (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
-		  (1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID));
-
-	if (sc->port_type == XLR_RGMII || sc->port_type == XLR_SGMII) {
-		NLGE_UPDATE(sc->base, R_IPG_IFG, MAC_B2B_IPG, 0x7f);
-	}
-}
-
-static int
-nlge_if_init(struct nlge_softc *sc)
-{
-	struct ifnet 	*ifp;
-	device_t	dev;
-	int error;
-
-	error = 0;
-	dev = sc->nlge_dev;
-	NLGE_LOCK_INIT(sc, device_get_nameunit(dev));
-
-	ifp = sc->nlge_if = if_alloc(IFT_ETHER);
-	if (ifp == NULL) {
-		device_printf(dev, "can not if_alloc()\n");
-		error = ENOSPC;
-		goto fail;
-	}
-	ifp->if_softc = sc;
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	ifp->if_capabilities = 0;
-	ifp->if_capenable = ifp->if_capabilities;
-	ifp->if_ioctl = nlge_ioctl;
-	ifp->if_init = nlge_init;
-	ifp->if_hwassist = 0;
-	ifp->if_snd.ifq_drv_maxlen = RGE_TX_Q_SIZE;
-	IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
-	IFQ_SET_READY(&ifp->if_snd);
-
-	ifmedia_init(&sc->nlge_mii.mii_media, 0, nlge_mediachange,
-	    nlge_mediastatus);
-	ifmedia_add(&sc->nlge_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, NULL);
-	ifmedia_set(&sc->nlge_mii.mii_media, IFM_ETHER | IFM_AUTO);
-	sc->nlge_mii.mii_media.ifm_media = sc->nlge_mii.mii_media.ifm_cur->ifm_media;
-	nlge_read_mac_addr(sc);
-
-	ether_ifattach(ifp, sc->dev_addr);
-
-	/* override if_transmit : per ifnet(9), do it after if_attach */
-	ifp->if_transmit = nlge_tx;
-
-fail:
-	return (error);
-}
-
-static void
-nlge_mii_init(device_t dev, struct nlge_softc *sc)
-{
-	int error;
-
-	if (sc->port_type != XLR_XAUI && sc->port_type != XLR_XGMII) {
-		NLGE_WRITE(sc->mii_base, R_MII_MGMT_CONFIG, 0x07);
-	}
-	error = mii_attach(dev, &sc->mii_bus, sc->nlge_if, nlge_mediachange,
-	    nlge_mediastatus, BMSR_DEFCAPMASK, sc->phy_addr, MII_OFFSET_ANY,
-	    0);
-	if (error) {
-		device_printf(dev, "attaching PHYs failed\n");
-		sc->mii_bus = NULL;
-	}
-	if (sc->mii_bus != NULL) {
-		/*
-		 * Enable all MDIO interrupts in the phy. RX_ER bit seems to get
-		 * set about every 1 sec in GigE mode, ignore it for now...
-		 */
-		nlge_mii_write_internal(sc->mii_base, sc->phy_addr, 25,
-		    0xfffffffe);
-	}
-}
-
-/*
- *  Read a PHY register.
- *
- *  Input parameters:
- *  	   mii_base - Base address of MII
- *  	   phyaddr - PHY's address
- *  	   regidx = index of register to read
- *
- *  Return value:
- *  	   value read, or 0 if an error occurred.
- */
-
-static int
-nlge_mii_read_internal(xlr_reg_t *mii_base, int phyaddr, int regidx)
-{
-	int i, val;
-
-	/* setup the phy reg to be used */
-	NLGE_WRITE(mii_base, R_MII_MGMT_ADDRESS,
-	    (phyaddr << 8) | (regidx << 0));
-	/* Issue the read command */
-	NLGE_WRITE(mii_base, R_MII_MGMT_COMMAND,
-	    (1 << O_MII_MGMT_COMMAND__rstat));
-
-	/* poll for the read cycle to complete */
-	for (i = 0; i < PHY_STATUS_RETRIES; i++) {
-		if (NLGE_READ(mii_base, R_MII_MGMT_INDICATORS) == 0)
-			break;
-	}
-
-	/* clear the read cycle */
-	NLGE_WRITE(mii_base, R_MII_MGMT_COMMAND, 0);
-
-	if (i == PHY_STATUS_RETRIES) {
-		return (0xffffffff);
-	}
-
-	val = NLGE_READ(mii_base, R_MII_MGMT_STATUS);
-
-	return (val);
-}
-
-/*
- *  Write a value to a PHY register.
- *
- *  Input parameters:
- *  	   mii_base - Base address of MII
- *  	   phyaddr - PHY to use
- *  	   regidx - register within the PHY
- *  	   regval - data to write to register
- *
- *  Return value:
- *  	   nothing
- */
-static void
-nlge_mii_write_internal(xlr_reg_t *mii_base, int phyaddr, int regidx,
-    int regval)
-{
-	int i;
-
-	NLGE_WRITE(mii_base, R_MII_MGMT_ADDRESS,
-	   (phyaddr << 8) | (regidx << 0));
-
-	/* Write the data which starts the write cycle */
-	NLGE_WRITE(mii_base, R_MII_MGMT_WRITE_DATA, regval);
-
-	/* poll for the write cycle to complete */
-	for (i = 0; i < PHY_STATUS_RETRIES; i++) {
-		if (NLGE_READ(mii_base, R_MII_MGMT_INDICATORS) == 0)
-			break;
-	}
-}
-
-/*
- * Function to optimize the use of p2d descriptors for the given PDU.
- * As it is on the fast-path (called during packet transmission), it
- * described in more detail than the initialization functions.
- *
- * Input: mbuf chain (MC), pointer to fmn message
- * Input constraints: None
- * Output: FMN message to transmit the data in MC
- * Return values: 0 - success
- *                1 - MC cannot be handled (see Limitations below)
- *                2 - MC cannot be handled presently (maybe worth re-trying)
- * Other output: Number of entries filled in the FMN message
- *
- * Output structure/constraints:
- *     1. Max 3 p2d's + 1 zero-len (ZL) p2d with virtual address of MC.
- *     2. 3 p2d's + 1 p2p with max 14 p2d's (ZL p2d not required in this case).
- *     3. Each p2d points to physically contiguous chunk of data (subject to
- *        entire MC requiring max 17 p2d's).
- * Limitations:
- *     1. MC's that require more than 17 p2d's are not handled.
- * Benefits: MC's that require <= 3 p2d's avoid the overhead of allocating
- *           the p2p structure. Small packets (which typically give low
- *           performance) are expected to have a small MC that takes
- *           advantage of this.
- */
-static int
-prepare_fmn_message(struct nlge_softc *sc, struct msgrng_msg *fmn_msg,
-    uint32_t *n_entries, struct mbuf *mbuf_chain, uint64_t fb_stn_id, 
-    struct nlge_tx_desc **tx_desc)
-{
-	struct mbuf     *m;
-	struct nlge_tx_desc *p2p;
-	uint64_t        *cur_p2d;
-	uint64_t        fbpaddr;
-	vm_offset_t	buf;
-	vm_paddr_t      paddr;
-	int             msg_sz, p2p_sz, len, frag_sz;
-	/* Num entries per FMN msg is 4 for XLR/XLS */
-	const int       FMN_SZ = sizeof(*fmn_msg) / sizeof(uint64_t);
-
-	msg_sz = p2p_sz = 0;
-	p2p = NULL;
-	cur_p2d = &fmn_msg->msg0;
-
-	for (m = mbuf_chain; m != NULL; m = m->m_next) {
-		buf = (vm_offset_t) m->m_data;
-		len = m->m_len;
-
-		while (len) {
-			if (msg_sz == (FMN_SZ - 1)) {
-				p2p = uma_zalloc(nl_tx_desc_zone, M_NOWAIT);
-				if (p2p == NULL) {
-					return (2);
-				}
-				/*
-				 * Save the virtual address in the descriptor,
-				 * it makes freeing easy.
-				 */
-				p2p->frag[XLR_MAX_TX_FRAGS] =
-				    (uint64_t)(vm_offset_t)p2p;
-				cur_p2d = &p2p->frag[0];
-			} else if (msg_sz == (FMN_SZ - 2 + XLR_MAX_TX_FRAGS)) {
-				uma_zfree(nl_tx_desc_zone, p2p);
-				return (1);
-			}
-			paddr = vtophys(buf);
-			frag_sz = PAGE_SIZE - (buf & PAGE_MASK);
-			if (len < frag_sz)
-				frag_sz = len;
-			*cur_p2d++ = (127ULL << 54) | ((uint64_t)frag_sz << 40)
-			    | paddr;
-			msg_sz++;
-			if (p2p != NULL)
-				p2p_sz++;
-			len -= frag_sz;
-			buf += frag_sz;
-		}
-	}
-
-	if (msg_sz ==  0) {
-		printf("Zero-length mbuf chain ??\n");
-		*n_entries = msg_sz ;
-		return (0);
-	}
-
-	/* set eop in most-recent p2d */
-	cur_p2d[-1] |= (1ULL << 63);
-
-#ifdef __mips_n64
-	/* 
-	 * On n64, we cannot store our mbuf pointer(64 bit) in the freeback
-	 * message (40bit available), so we put the mbuf in m_nextpkt and 
-	 * use the physical addr of that in freeback message.
-	 */ 
-	mbuf_chain->m_nextpkt = mbuf_chain;
-	fbpaddr = vtophys(&mbuf_chain->m_nextpkt);
-#else
-	/* Careful, don't sign extend when going to 64bit */
-	fbpaddr = (uint64_t)(uintptr_t)mbuf_chain; 
-#endif
-	*cur_p2d = (1ULL << 63) | ((uint64_t)fb_stn_id << 54) | fbpaddr;
-	*tx_desc = p2p;
-
-	if (p2p != NULL) {
-		paddr = vtophys(p2p);
-		p2p_sz++;
-		fmn_msg->msg3 = (1ULL << 62) | ((uint64_t)fb_stn_id << 54) |
-		    ((uint64_t)(p2p_sz * 8) << 40) | paddr;
-		*n_entries = FMN_SZ;
-	} else {
-		*n_entries = msg_sz + 1;
-	}
-
-	return (0);
-}
-
-static int
-send_fmn_msg_tx(struct nlge_softc *sc, struct msgrng_msg *msg,
-    uint32_t n_entries)
-{
-	uint32_t msgrng_flags;
-	int ret;
-	int i = 0;
-
-	do {
-		msgrng_flags = msgrng_access_enable();
-		ret = message_send(n_entries, MSGRNG_CODE_MAC,
-		    sc->tx_bucket_id, msg);
-		msgrng_restore(msgrng_flags);
-		if (ret == 0)
-			return (0);
-		i++;
-	} while (i < 100000);
-
-	device_printf(sc->nlge_dev, "Too many credit fails in tx path\n");
-
-	return (1);
-}
-
-static void
-release_tx_desc(vm_paddr_t paddr)
-{
-	struct nlge_tx_desc *tx_desc;
-	uint32_t 	sr;
-	uint64_t	vaddr;
-
-	paddr += (XLR_MAX_TX_FRAGS * sizeof(uint64_t));
-	sr = xlr_enable_kx();
-	vaddr = xlr_paddr_ld(paddr);
-	xlr_restore_kx(sr);
-
-	tx_desc = (struct nlge_tx_desc*)(intptr_t)vaddr;
-	uma_zfree(nl_tx_desc_zone, tx_desc);
-}
-
-static void *
-get_buf(void)
-{
-	struct mbuf	*m_new;
-	uint64_t 	*md;
-#ifdef INVARIANTS
-	vm_paddr_t	temp1, temp2;
-#endif
-
-	if ((m_new = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR)) == NULL)
-		return (NULL);
-	m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
-	m_adj(m_new, XLR_CACHELINE_SIZE - ((uintptr_t)m_new->m_data & 0x1f));
-	md = (uint64_t *)m_new->m_data;
-	md[0] = (intptr_t)m_new;	/* Back Ptr */
-	md[1] = 0xf00bad;
-	m_adj(m_new, XLR_CACHELINE_SIZE);
-
-#ifdef INVARIANTS
-	temp1 = vtophys((vm_offset_t) m_new->m_data);
-	temp2 = vtophys((vm_offset_t) m_new->m_data + 1536);
-	if ((temp1 + 1536) != temp2)
-		panic("ALLOCED BUFFER IS NOT CONTIGUOUS\n");
-#endif
-
-	return ((void *)m_new->m_data);
-}
-
-static int
-nlge_gmac_config_speed(struct nlge_softc *sc, int quick)
-{
-	struct mii_data *md;
-	xlr_reg_t  *mmio;
-	int bmsr, n_tries, max_tries;
-	int core_ctl[]    = { 0x2, 0x1, 0x0, 0x1 };
-	int sgmii_speed[] = { SGMII_SPEED_10,
-			      SGMII_SPEED_100,
-			      SGMII_SPEED_1000,
-			      SGMII_SPEED_100 };    /* default to 100Mbps */
-	char *speed_str[] = { "10",
-			      "100",
-			      "1000",
-			      "unknown, defaulting to 100" };
-	int link_state = LINK_STATE_DOWN;
-
-	if (sc->port_type == XLR_XAUI || sc->port_type == XLR_XGMII)
-		return 0;
-
-	md = NULL;
-	mmio = sc->base;
-	if (sc->mii_base != NULL) {
-		max_tries = (quick == 1) ? 100 : 4000;
-		bmsr = 0;
-		for (n_tries = 0; n_tries < max_tries; n_tries++) {
-			bmsr = nlge_mii_read_internal(sc->mii_base,
-			    sc->phy_addr, MII_BMSR);
-			if ((bmsr & BMSR_ACOMP) && (bmsr & BMSR_LINK))
-				break; /* Auto-negotiation is complete
-					  and link is up */
-			DELAY(1000);
-		}
-		bmsr &= BMSR_LINK;
-		sc->link = (bmsr == 0) ? xlr_mac_link_down : xlr_mac_link_up;
-		sc->speed = nlge_mii_read_internal(sc->mii_base, sc->phy_addr, 28);
-		sc->speed = (sc->speed >> 3) & 0x03;
-		if (sc->link == xlr_mac_link_up) {
-			link_state = LINK_STATE_UP;
-			nlge_sgmii_init(sc);
-		}
-		if (sc->mii_bus)
-			md = (struct mii_data *)device_get_softc(sc->mii_bus);
-	}
-
-	if (sc->port_type != XLR_RGMII)
-		NLGE_WRITE(mmio, R_INTERFACE_CONTROL, sgmii_speed[sc->speed]);
-	if (sc->speed == xlr_mac_speed_10 || sc->speed == xlr_mac_speed_100 ||
-	    sc->speed == xlr_mac_speed_rsvd) {
-		NLGE_WRITE(mmio, R_MAC_CONFIG_2, 0x7117);
-	} else if (sc->speed == xlr_mac_speed_1000) {
-		NLGE_WRITE(mmio, R_MAC_CONFIG_2, 0x7217);
-		if (md != NULL) {
-			ifmedia_set(&md->mii_media, IFM_MAKEWORD(IFM_ETHER,
-			    IFM_1000_T, IFM_FDX, md->mii_instance));
-		}
-	}
-	NLGE_WRITE(mmio, R_CORECONTROL, core_ctl[sc->speed]);
-	if_link_state_change(sc->nlge_if, link_state);
-	printf("%s: [%sMbps]\n", device_get_nameunit(sc->nlge_dev),
-	    speed_str[sc->speed]);
-
-	return (0);
-}
-
-/*
- * This function is called for each port that was added to the device tree
- * and it initializes the following port attributes:
- * 	- type
- *      - base (base address to access port-specific registers)
- *      - mii_base
- * 	- phy_addr
- */
-static void
-nlge_set_port_attribs(struct nlge_softc *sc,
-    struct xlr_gmac_port *port_info)
-{
-	sc->instance = port_info->instance % 4;	/* TBD: will not work for SPI-4 */
-	sc->port_type = port_info->type;
-	sc->base = xlr_io_mmio(port_info->base_addr);
-	sc->mii_base = xlr_io_mmio(port_info->mii_addr);
-	if (port_info->pcs_addr != 0)
-		sc->pcs_addr = xlr_io_mmio(port_info->pcs_addr);
-	if (port_info->serdes_addr != 0)
-		sc->serdes_addr = xlr_io_mmio(port_info->serdes_addr);
-	sc->phy_addr = port_info->phy_addr;
-
-	PDEBUG("Port%d: base=%p, mii_base=%p, phy_addr=%d\n", sc->id, sc->base,
-	    sc->mii_base, sc->phy_addr);
-}
-
-/* ------------------------------------------------------------------------ */
-
-/* Debug dump functions */
-
-#ifdef DEBUG
-
-static void
-dump_reg(xlr_reg_t *base, uint32_t offset, char *name)
-{
-	int val;
-
-	val = NLGE_READ(base, offset);
-	printf("%-30s: 0x%8x 0x%8x\n", name, offset, val);
-}
-
-#define STRINGIFY(x) 		#x
-
-static void
-dump_na_registers(xlr_reg_t *base_addr, int port_id)
-{
-	PDEBUG("Register dump for NA (of port=%d)\n", port_id);
-	dump_reg(base_addr, R_PARSERCONFIGREG, STRINGIFY(R_PARSERCONFIGREG));
-	PDEBUG("Tx bucket sizes\n");
-	dump_reg(base_addr, R_GMAC_JFR0_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_JFR0_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_RFR0_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_RFR0_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_TX0_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_TX0_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_TX1_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_TX1_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_TX2_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_TX2_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_TX3_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_TX3_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_JFR1_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_JFR1_BUCKET_SIZE));
-	dump_reg(base_addr, R_GMAC_RFR1_BUCKET_SIZE,
-	    STRINGIFY(R_GMAC_RFR1_BUCKET_SIZE));
-	dump_reg(base_addr, R_TXDATAFIFO0, STRINGIFY(R_TXDATAFIFO0));
-	dump_reg(base_addr, R_TXDATAFIFO1, STRINGIFY(R_TXDATAFIFO1));
-}
-
-static void
-dump_gmac_registers(struct nlge_softc *sc)
-{
-	xlr_reg_t *base_addr = sc->base;
-	int port_id = sc->instance;
-
-	PDEBUG("Register dump for port=%d\n", port_id);
-	if (sc->port_type == XLR_RGMII || sc->port_type == XLR_SGMII) {
-		dump_reg(base_addr, R_MAC_CONFIG_1, STRINGIFY(R_MAC_CONFIG_1));
-		dump_reg(base_addr, R_MAC_CONFIG_2, STRINGIFY(R_MAC_CONFIG_2));
-		dump_reg(base_addr, R_IPG_IFG, STRINGIFY(R_IPG_IFG));
-		dump_reg(base_addr, R_HALF_DUPLEX, STRINGIFY(R_HALF_DUPLEX));
-		dump_reg(base_addr, R_MAXIMUM_FRAME_LENGTH,
-		    STRINGIFY(R_MAXIMUM_FRAME_LENGTH));
-		dump_reg(base_addr, R_TEST, STRINGIFY(R_TEST));
-		dump_reg(base_addr, R_MII_MGMT_CONFIG,
-		    STRINGIFY(R_MII_MGMT_CONFIG));
-		dump_reg(base_addr, R_MII_MGMT_COMMAND,
-		    STRINGIFY(R_MII_MGMT_COMMAND));
-		dump_reg(base_addr, R_MII_MGMT_ADDRESS,
-		    STRINGIFY(R_MII_MGMT_ADDRESS));
-		dump_reg(base_addr, R_MII_MGMT_WRITE_DATA,
-		    STRINGIFY(R_MII_MGMT_WRITE_DATA));
-		dump_reg(base_addr, R_MII_MGMT_STATUS,
-		    STRINGIFY(R_MII_MGMT_STATUS));
-		dump_reg(base_addr, R_MII_MGMT_INDICATORS,
-		    STRINGIFY(R_MII_MGMT_INDICATORS));
-		dump_reg(base_addr, R_INTERFACE_CONTROL,
-		    STRINGIFY(R_INTERFACE_CONTROL));
-		dump_reg(base_addr, R_INTERFACE_STATUS,
-		    STRINGIFY(R_INTERFACE_STATUS));
-	} else if (sc->port_type == XLR_XAUI || sc->port_type == XLR_XGMII) {
-		dump_reg(base_addr, R_XGMAC_CONFIG_0,
-		    STRINGIFY(R_XGMAC_CONFIG_0));
-		dump_reg(base_addr, R_XGMAC_CONFIG_1,
-		    STRINGIFY(R_XGMAC_CONFIG_1));
-		dump_reg(base_addr, R_XGMAC_CONFIG_2,
-		    STRINGIFY(R_XGMAC_CONFIG_2));
-		dump_reg(base_addr, R_XGMAC_CONFIG_3,
-		    STRINGIFY(R_XGMAC_CONFIG_3));
-		dump_reg(base_addr, R_XGMAC_STATION_ADDRESS_LS,
-		    STRINGIFY(R_XGMAC_STATION_ADDRESS_LS));
-		dump_reg(base_addr, R_XGMAC_STATION_ADDRESS_MS,
-		    STRINGIFY(R_XGMAC_STATION_ADDRESS_MS));
-		dump_reg(base_addr, R_XGMAC_MAX_FRAME_LEN,
-		    STRINGIFY(R_XGMAC_MAX_FRAME_LEN));
-		dump_reg(base_addr, R_XGMAC_REV_LEVEL,
-		    STRINGIFY(R_XGMAC_REV_LEVEL));
-		dump_reg(base_addr, R_XGMAC_MIIM_COMMAND,
-		    STRINGIFY(R_XGMAC_MIIM_COMMAND));
-		dump_reg(base_addr, R_XGMAC_MIIM_FILED,
-		    STRINGIFY(R_XGMAC_MIIM_FILED));
-		dump_reg(base_addr, R_XGMAC_MIIM_CONFIG,
-		    STRINGIFY(R_XGMAC_MIIM_CONFIG));
-		dump_reg(base_addr, R_XGMAC_MIIM_LINK_FAIL_VECTOR,
-		    STRINGIFY(R_XGMAC_MIIM_LINK_FAIL_VECTOR));
-		dump_reg(base_addr, R_XGMAC_MIIM_INDICATOR,
-		    STRINGIFY(R_XGMAC_MIIM_INDICATOR));
-	}
-
-	dump_reg(base_addr, R_MAC_ADDR0, STRINGIFY(R_MAC_ADDR0));
-	dump_reg(base_addr, R_MAC_ADDR0 + 1, STRINGIFY(R_MAC_ADDR0+1));
-	dump_reg(base_addr, R_MAC_ADDR1, STRINGIFY(R_MAC_ADDR1));
-	dump_reg(base_addr, R_MAC_ADDR2, STRINGIFY(R_MAC_ADDR2));
-	dump_reg(base_addr, R_MAC_ADDR3, STRINGIFY(R_MAC_ADDR3));
-	dump_reg(base_addr, R_MAC_ADDR_MASK2, STRINGIFY(R_MAC_ADDR_MASK2));
-	dump_reg(base_addr, R_MAC_ADDR_MASK3, STRINGIFY(R_MAC_ADDR_MASK3));
-	dump_reg(base_addr, R_MAC_FILTER_CONFIG, STRINGIFY(R_MAC_FILTER_CONFIG));
-	dump_reg(base_addr, R_TX_CONTROL, STRINGIFY(R_TX_CONTROL));
-	dump_reg(base_addr, R_RX_CONTROL, STRINGIFY(R_RX_CONTROL));
-	dump_reg(base_addr, R_DESC_PACK_CTRL, STRINGIFY(R_DESC_PACK_CTRL));
-	dump_reg(base_addr, R_STATCTRL, STRINGIFY(R_STATCTRL));
-	dump_reg(base_addr, R_L2ALLOCCTRL, STRINGIFY(R_L2ALLOCCTRL));
-	dump_reg(base_addr, R_INTMASK, STRINGIFY(R_INTMASK));
-	dump_reg(base_addr, R_INTREG, STRINGIFY(R_INTREG));
-	dump_reg(base_addr, R_TXRETRY, STRINGIFY(R_TXRETRY));
-	dump_reg(base_addr, R_CORECONTROL, STRINGIFY(R_CORECONTROL));
-	dump_reg(base_addr, R_BYTEOFFSET0, STRINGIFY(R_BYTEOFFSET0));
-	dump_reg(base_addr, R_BYTEOFFSET1, STRINGIFY(R_BYTEOFFSET1));
-	dump_reg(base_addr, R_L2TYPE_0, STRINGIFY(R_L2TYPE_0));
-	dump_na_registers(base_addr, port_id);
-}
-
-static void
-dump_fmn_cpu_credits_for_gmac(struct xlr_board_info *board, int gmac_id)
-{
-	struct stn_cc *cc;
-	int gmac_bucket_ids[] = { 97, 98, 99, 100, 101, 103 };
-	int j, k, r, c;
-	int n_gmac_buckets;
-
-	n_gmac_buckets = nitems(gmac_bucket_ids);
-	for (j = 0; j < 8; j++) { 		// for each cpu
-		cc = board->credit_configs[j];
-		printf("Credits for Station CPU_%d ---> GMAC buckets (tx path)\n", j);
-		for (k = 0; k < n_gmac_buckets; k++) {
-			r = gmac_bucket_ids[k] / 8;
-			c = gmac_bucket_ids[k] % 8;
-			printf ("    --> gmac%d_bucket_%-3d: credits=%d\n", gmac_id,
-				gmac_bucket_ids[k], cc->counters[r][c]);
-		}
-	}
-}
-
-static void
-dump_fmn_gmac_credits(struct xlr_board_info *board, int gmac_id)
-{
-	struct stn_cc *cc;
-	int j, k;
-
-	cc = board->gmac_block[gmac_id].credit_config;
-	printf("Credits for Station: GMAC_%d ---> CPU buckets (rx path)\n", gmac_id);
-	for (j = 0; j < 8; j++) { 		// for each cpu
-		printf("    ---> cpu_%d\n", j);
-		for (k = 0; k < 8; k++) {	// for each bucket in cpu
-			printf("        ---> bucket_%d: credits=%d\n", j * 8 + k,
-			       cc->counters[j][k]);
-		}
-	}
-}
-
-static void
-dump_board_info(struct xlr_board_info *board)
-{
-	struct xlr_gmac_block_t *gm;
-	int i, k;
-
-	printf("cpu=%x ", xlr_revision());
-	printf("board_version: major=%llx, minor=%llx\n",
-	    xlr_boot1_info.board_major_version,
-	    xlr_boot1_info.board_minor_version);
-	printf("is_xls=%d, nr_cpus=%d, usb=%s, cfi=%s, ata=%s\npci_irq=%d,"
-	    "gmac_ports=%d\n", board->is_xls, board->nr_cpus,
-	    board->usb ? "Yes" : "No", board->cfi ? "Yes": "No",
-	    board->ata ? "Yes" : "No", board->pci_irq, board->gmacports);
-	printf("FMN: Core-station bucket sizes\n");
-	for (i = 0; i < 128; i++) {
-		if (i && ((i % 16) == 0))
-			printf("\n");
-		printf ("b[%d] = %d ", i, board->bucket_sizes->bucket[i]);
-	}
-	printf("\n");
-	for (i = 0; i < 3; i++) {
-		gm = &board->gmac_block[i];
-		printf("RNA_%d: type=%d, enabled=%s, mode=%d, station_id=%d,"
-		    "station_txbase=%d, station_rfr=%d ", i, gm->type,
-		    gm->enabled ? "Yes" : "No", gm->mode, gm->station_id,
-		    gm->station_txbase, gm->station_rfr);
-		printf("n_ports=%d, baseaddr=%p, baseirq=%d, baseinst=%d\n",
-		     gm->num_ports, (xlr_reg_t *)gm->baseaddr, gm->baseirq,
-		     gm->baseinst);
-	}
-	for (k = 0; k < 3; k++) { 	// for each NA
-		dump_fmn_cpu_credits_for_gmac(board, k);
-		dump_fmn_gmac_credits(board, k);
-	}
-}
-
-static void
-dump_mac_stats(struct nlge_softc *sc)
-{
-	xlr_reg_t *addr;
-	uint32_t pkts_tx, pkts_rx;
-
-	addr = sc->base;
-	pkts_rx = NLGE_READ(sc->base, R_RPKT);
-	pkts_tx = NLGE_READ(sc->base, R_TPKT);
-
-	printf("[nlge_%d mac stats]: pkts_tx=%u, pkts_rx=%u\n", sc->id, pkts_tx,
-	    pkts_rx);
-	if (pkts_rx > 0) {
-		uint32_t r;
-
-		/* dump all rx counters. we need this because pkts_rx includes
-		   bad packets. */
-		for (r = R_RFCS; r <= R_ROVR; r++)
-			printf("[nlge_%d mac stats]: [0x%x]=%u\n", sc->id, r,
-			    NLGE_READ(sc->base, r));
-	}
-	if (pkts_tx > 0) {
-		uint32_t r;
-
-		/* dump all tx counters. might be useful for debugging. */
-		for (r = R_TMCA; r <= R_TFRG; r++) {
-			if ((r == (R_TNCL + 1)) || (r == (R_TNCL + 2)))
-				continue;
-			printf("[nlge_%d mac stats]: [0x%x]=%u\n", sc->id, r,
-			    NLGE_READ(sc->base, r));
-		}
-	}
-		
-}
-
-static void
-dump_mii_regs(struct nlge_softc *sc)
-{
-	uint32_t mii_regs[] = {  0x0,  0x1,  0x2,  0x3,  0x4,  0x5,  0x6,  0x7,
-	                         0x8,  0x9,  0xa,  0xf, 0x10, 0x11, 0x12, 0x13,
-				0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b,
-				0x1c, 0x1d, 0x1e};
-	int i, n_regs;
-
-	if (sc->mii_base == NULL || sc->mii_bus == NULL)
-		return;
-
-	n_regs = nitems(mii_regs);
-	for (i = 0; i < n_regs; i++) {
-		printf("[mii_0x%x] = %x\n", mii_regs[i],
-		    nlge_mii_read_internal(sc->mii_base, sc->phy_addr,
-		        mii_regs[i]));
-	}
-}
-
-static void
-dump_ifmedia(struct ifmedia *ifm)
-{
-	printf("ifm_mask=%08x, ifm_media=%08x, cur=%p\n", ifm->ifm_mask,
-	    ifm->ifm_media, ifm->ifm_cur);
-	if (ifm->ifm_cur != NULL) {
-		printf("Cur attribs: ifmedia_entry.ifm_media=%08x,"
-		    " ifmedia_entry.ifm_data=%08x\n", ifm->ifm_cur->ifm_media,
-		    ifm->ifm_cur->ifm_data);
-	}
-}
-
-static void
-dump_mii_data(struct mii_data *mii)
-{
-	dump_ifmedia(&mii->mii_media);
-	printf("ifp=%p, mii_instance=%d, mii_media_status=%08x,"
-	    " mii_media_active=%08x\n", mii->mii_ifp, mii->mii_instance,
-	    mii->mii_media_status, mii->mii_media_active);
-}
-
-static void
-dump_pcs_regs(struct nlge_softc *sc, int phy)
-{
-	int i, val;
-
-	printf("PCS regs from %p for phy=%d\n", sc->pcs_addr, phy);
-	for (i = 0; i < 18; i++) {
-		if (i == 2 || i == 3 || (i >= 9 && i <= 14))
-			continue;
-		val = nlge_mii_read_internal(sc->pcs_addr, phy, i);
-		printf("PHY:%d pcs[0x%x] is 0x%x\n", phy, i, val);
-	}
-}
-#endif
diff --git a/sys/mips/rmi/dev/nlge/if_nlge.h b/sys/mips/rmi/dev/nlge/if_nlge.h
deleted file mode 100644
index a713f960c42..00000000000
--- a/sys/mips/rmi/dev/nlge/if_nlge.h
+++ /dev/null
@@ -1,1184 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- * $FreeBSD$
- *
- * RMI_BSD 
- */
-
-/* #define MAC_SPLIT_MODE */
-
-#define MAC_SPACING                 0x400
-#define XGMAC_SPACING               0x400
-
-/* PE-MCXMAC register and bit field definitions */
-#define R_MAC_CONFIG_1                                              0x00
-#define   O_MAC_CONFIG_1__srst                                      31
-#define   O_MAC_CONFIG_1__simr                                      30
-#define   O_MAC_CONFIG_1__hrrmc                                     18
-#define   W_MAC_CONFIG_1__hrtmc                                      2
-#define   O_MAC_CONFIG_1__hrrfn                                     16
-#define   W_MAC_CONFIG_1__hrtfn                                      2
-#define   O_MAC_CONFIG_1__intlb                                      8
-#define   O_MAC_CONFIG_1__rxfc                                       5
-#define   O_MAC_CONFIG_1__txfc                                       4
-#define   O_MAC_CONFIG_1__srxen                                      3
-#define   O_MAC_CONFIG_1__rxen                                       2
-#define   O_MAC_CONFIG_1__stxen                                      1
-#define   O_MAC_CONFIG_1__txen                                       0
-#define R_MAC_CONFIG_2                                              0x01
-#define   O_MAC_CONFIG_2__prlen                                     12
-#define   W_MAC_CONFIG_2__prlen                                      4
-#define   O_MAC_CONFIG_2__speed                                      8
-#define   W_MAC_CONFIG_2__speed                                      2
-#define   O_MAC_CONFIG_2__hugen                                      5
-#define   O_MAC_CONFIG_2__flchk                                      4
-#define   O_MAC_CONFIG_2__crce                                       1
-#define   O_MAC_CONFIG_2__fulld                                      0
-#define R_IPG_IFG                                                   0x02
-#define   O_IPG_IFG__ipgr1                                          24
-#define   W_IPG_IFG__ipgr1                                           7
-#define   O_IPG_IFG__ipgr2                                          16
-#define   W_IPG_IFG__ipgr2                                           7
-#define   O_IPG_IFG__mifg                                            8
-#define   W_IPG_IFG__mifg                                            8
-#define   O_IPG_IFG__ipgt                                            0
-#define   W_IPG_IFG__ipgt                                            7
-#define R_HALF_DUPLEX                                               0x03
-#define   O_HALF_DUPLEX__abebt                                      24
-#define   W_HALF_DUPLEX__abebt                                       4
-#define   O_HALF_DUPLEX__abebe                                      19
-#define   O_HALF_DUPLEX__bpnb                                       18
-#define   O_HALF_DUPLEX__nobo                                       17
-#define   O_HALF_DUPLEX__edxsdfr                                    16
-#define   O_HALF_DUPLEX__retry                                      12
-#define   W_HALF_DUPLEX__retry                                       4
-#define   O_HALF_DUPLEX__lcol                                        0
-#define   W_HALF_DUPLEX__lcol                                       10
-#define R_MAXIMUM_FRAME_LENGTH                                      0x04
-#define   O_MAXIMUM_FRAME_LENGTH__maxf                               0
-#define   W_MAXIMUM_FRAME_LENGTH__maxf                              16
-#define R_TEST                                                      0x07
-#define   O_TEST__mbof                                               3
-#define   O_TEST__rthdf                                              2
-#define   O_TEST__tpause                                             1
-#define   O_TEST__sstct                                              0
-#define R_MII_MGMT_CONFIG                                           0x08
-#define   O_MII_MGMT_CONFIG__scinc                                   5
-#define   O_MII_MGMT_CONFIG__spre                                    4
-#define   O_MII_MGMT_CONFIG__clks                                    3
-#define   W_MII_MGMT_CONFIG__clks                                    3
-#define R_MII_MGMT_COMMAND                                          0x09
-#define   O_MII_MGMT_COMMAND__scan                                   1
-#define   O_MII_MGMT_COMMAND__rstat                                  0
-#define R_MII_MGMT_ADDRESS                                          0x0A
-#define   O_MII_MGMT_ADDRESS__fiad                                   8
-#define   W_MII_MGMT_ADDRESS__fiad                                   5
-#define   O_MII_MGMT_ADDRESS__fgad                                   5
-#define   W_MII_MGMT_ADDRESS__fgad                                   0
-#define R_MII_MGMT_WRITE_DATA                                       0x0B
-#define   O_MII_MGMT_WRITE_DATA__ctld                                0
-#define   W_MII_MGMT_WRITE_DATA__ctld                               16
-#define R_MII_MGMT_STATUS                                           0x0C
-#define R_MII_MGMT_INDICATORS                                       0x0D
-#define   O_MII_MGMT_INDICATORS__nvalid                              2
-#define   O_MII_MGMT_INDICATORS__scan                                1
-#define   O_MII_MGMT_INDICATORS__busy                                0
-#define R_INTERFACE_CONTROL                                         0x0E
-#define   O_INTERFACE_CONTROL__hrstint                              31
-#define   O_INTERFACE_CONTROL__tbimode                              27
-#define   O_INTERFACE_CONTROL__ghdmode                              26
-#define   O_INTERFACE_CONTROL__lhdmode                              25
-#define   O_INTERFACE_CONTROL__phymod                               24
-#define   O_INTERFACE_CONTROL__hrrmi                                23
-#define   O_INTERFACE_CONTROL__rspd                                 16
-#define   O_INTERFACE_CONTROL__hr100                                15
-#define   O_INTERFACE_CONTROL__frcq                                 10
-#define   O_INTERFACE_CONTROL__nocfr                                 9
-#define   O_INTERFACE_CONTROL__dlfct                                 8
-#define   O_INTERFACE_CONTROL__enjab                                 0
-#define R_INTERFACE_STATUS                                         0x0F
-#define   O_INTERFACE_STATUS__xsdfr                                  9
-#define   O_INTERFACE_STATUS__ssrr                                   8
-#define   W_INTERFACE_STATUS__ssrr                                   5
-#define   O_INTERFACE_STATUS__miilf                                  3
-#define   O_INTERFACE_STATUS__locar                                  2
-#define   O_INTERFACE_STATUS__sqerr                                  1
-#define   O_INTERFACE_STATUS__jabber                                 0
-#define R_STATION_ADDRESS_LS                                       0x10
-#define R_STATION_ADDRESS_MS                                       0x11
-
-/* A-XGMAC register and bit field definitions */
-#define R_XGMAC_CONFIG_0    0x00
-#define   O_XGMAC_CONFIG_0__hstmacrst               31
-#define   O_XGMAC_CONFIG_0__hstrstrctl              23
-#define   O_XGMAC_CONFIG_0__hstrstrfn               22
-#define   O_XGMAC_CONFIG_0__hstrsttctl              18
-#define   O_XGMAC_CONFIG_0__hstrsttfn               17
-#define   O_XGMAC_CONFIG_0__hstrstmiim              16
-#define   O_XGMAC_CONFIG_0__hstloopback             8
-#define R_XGMAC_CONFIG_1    0x01
-#define   O_XGMAC_CONFIG_1__hsttctlen               31
-#define   O_XGMAC_CONFIG_1__hsttfen                 30
-#define   O_XGMAC_CONFIG_1__hstrctlen               29
-#define   O_XGMAC_CONFIG_1__hstrfen                 28
-#define   O_XGMAC_CONFIG_1__tfen                    26
-#define   O_XGMAC_CONFIG_1__rfen                    24
-#define   O_XGMAC_CONFIG_1__hstrctlshrtp            12
-#define   O_XGMAC_CONFIG_1__hstdlyfcstx             10
-#define   W_XGMAC_CONFIG_1__hstdlyfcstx              2
-#define   O_XGMAC_CONFIG_1__hstdlyfcsrx              8
-#define   W_XGMAC_CONFIG_1__hstdlyfcsrx              2
-#define   O_XGMAC_CONFIG_1__hstppen                  7
-#define   O_XGMAC_CONFIG_1__hstbytswp                6
-#define   O_XGMAC_CONFIG_1__hstdrplt64               5
-#define   O_XGMAC_CONFIG_1__hstprmscrx               4
-#define   O_XGMAC_CONFIG_1__hstlenchk                3
-#define   O_XGMAC_CONFIG_1__hstgenfcs                2
-#define   O_XGMAC_CONFIG_1__hstpadmode               0
-#define   W_XGMAC_CONFIG_1__hstpadmode               2
-#define R_XGMAC_CONFIG_2    0x02
-#define   O_XGMAC_CONFIG_2__hsttctlfrcp             31
-#define   O_XGMAC_CONFIG_2__hstmlnkflth             27
-#define   O_XGMAC_CONFIG_2__hstalnkflth             26
-#define   O_XGMAC_CONFIG_2__rflnkflt                24
-#define   W_XGMAC_CONFIG_2__rflnkflt                 2
-#define   O_XGMAC_CONFIG_2__hstipgextmod            16
-#define   W_XGMAC_CONFIG_2__hstipgextmod             5
-#define   O_XGMAC_CONFIG_2__hstrctlfrcp             15
-#define   O_XGMAC_CONFIG_2__hstipgexten              5
-#define   O_XGMAC_CONFIG_2__hstmipgext               0
-#define   W_XGMAC_CONFIG_2__hstmipgext               5
-#define R_XGMAC_CONFIG_3    0x03
-#define   O_XGMAC_CONFIG_3__hstfltrfrm              31
-#define   W_XGMAC_CONFIG_3__hstfltrfrm              16
-#define   O_XGMAC_CONFIG_3__hstfltrfrmdc            15
-#define   W_XGMAC_CONFIG_3__hstfltrfrmdc            16
-#define R_XGMAC_STATION_ADDRESS_LS      0x04
-#define   O_XGMAC_STATION_ADDRESS_LS__hstmacadr0    0
-#define   W_XGMAC_STATION_ADDRESS_LS__hstmacadr0    32
-#define R_XGMAC_STATION_ADDRESS_MS      0x05
-#define R_XGMAC_MAX_FRAME_LEN           0x08
-#define   O_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx       16
-#define   W_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx       14
-#define   O_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx        0
-#define   W_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx       16
-#define R_XGMAC_REV_LEVEL               0x0B
-#define   O_XGMAC_REV_LEVEL__revlvl                  0
-#define   W_XGMAC_REV_LEVEL__revlvl                 15
-#define R_XGMAC_MIIM_COMMAND            0x10
-#define   O_XGMAC_MIIM_COMMAND__hstldcmd             3
-#define   O_XGMAC_MIIM_COMMAND__hstmiimcmd           0
-#define   W_XGMAC_MIIM_COMMAND__hstmiimcmd           3
-#define R_XGMAC_MIIM_FILED              0x11
-#define   O_XGMAC_MIIM_FILED__hststfield            30
-#define   W_XGMAC_MIIM_FILED__hststfield             2
-#define   O_XGMAC_MIIM_FILED__hstopfield            28
-#define   W_XGMAC_MIIM_FILED__hstopfield             2
-#define   O_XGMAC_MIIM_FILED__hstphyadx             23
-#define   W_XGMAC_MIIM_FILED__hstphyadx              5
-#define   O_XGMAC_MIIM_FILED__hstregadx             18
-#define   W_XGMAC_MIIM_FILED__hstregadx              5
-#define   O_XGMAC_MIIM_FILED__hsttafield            16
-#define   W_XGMAC_MIIM_FILED__hsttafield             2
-#define   O_XGMAC_MIIM_FILED__miimrddat              0
-#define   W_XGMAC_MIIM_FILED__miimrddat             16
-#define R_XGMAC_MIIM_CONFIG             0x12
-#define   O_XGMAC_MIIM_CONFIG__hstnopram             7
-#define   O_XGMAC_MIIM_CONFIG__hstclkdiv             0
-#define   W_XGMAC_MIIM_CONFIG__hstclkdiv             7
-#define R_XGMAC_MIIM_LINK_FAIL_VECTOR   0x13
-#define   O_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec   0
-#define   W_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec  32
-#define R_XGMAC_MIIM_INDICATOR          0x14
-#define   O_XGMAC_MIIM_INDICATOR__miimphylf          4
-#define   O_XGMAC_MIIM_INDICATOR__miimmoncplt        3
-#define   O_XGMAC_MIIM_INDICATOR__miimmonvld         2
-#define   O_XGMAC_MIIM_INDICATOR__miimmon            1
-#define   O_XGMAC_MIIM_INDICATOR__miimbusy           0
-
-/* GMAC stats registers */
-#define R_RBYT							    0x27
-#define R_RPKT							    0x28
-#define R_RFCS							    0x29
-#define R_RMCA							    0x2A
-#define R_RBCA							    0x2B
-#define R_RXCF							    0x2C
-#define R_RXPF							    0x2D
-#define R_RXUO							    0x2E
-#define R_RALN							    0x2F
-#define R_RFLR							    0x30
-#define R_RCDE							    0x31
-#define R_RCSE							    0x32
-#define R_RUND							    0x33
-#define R_ROVR							    0x34
-#define R_TBYT							    0x38
-#define R_TPKT							    0x39
-#define R_TMCA							    0x3A
-#define R_TBCA							    0x3B
-#define R_TXPF							    0x3C
-#define R_TDFR							    0x3D
-#define R_TEDF							    0x3E
-#define R_TSCL							    0x3F
-#define R_TMCL							    0x40
-#define R_TLCL							    0x41
-#define R_TXCL							    0x42
-#define R_TNCL							    0x43
-#define R_TJBR							    0x46
-#define R_TFCS							    0x47
-#define R_TXCF							    0x48
-#define R_TOVR							    0x49
-#define R_TUND							    0x4A
-#define R_TFRG							    0x4B
-
-/* Glue logic register and bit field definitions */
-#define R_MAC_ADDR0                                                 0x50
-#define R_MAC_ADDR1                                                 0x52
-#define R_MAC_ADDR2                                                 0x54
-#define R_MAC_ADDR3                                                 0x56
-#define R_MAC_ADDR_MASK2                                            0x58
-#define R_MAC_ADDR_MASK3                                            0x5A
-#define R_MAC_FILTER_CONFIG                                         0x5C
-#define   O_MAC_FILTER_CONFIG__BROADCAST_EN                         10
-#define   O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN                       9
-#define   O_MAC_FILTER_CONFIG__ALL_MCAST_EN                         8
-#define   O_MAC_FILTER_CONFIG__ALL_UCAST_EN                         7
-#define   O_MAC_FILTER_CONFIG__HASH_MCAST_EN                        6
-#define   O_MAC_FILTER_CONFIG__HASH_UCAST_EN                        5
-#define   O_MAC_FILTER_CONFIG__ADDR_MATCH_DISC                      4
-#define   O_MAC_FILTER_CONFIG__MAC_ADDR3_VALID                      3
-#define   O_MAC_FILTER_CONFIG__MAC_ADDR2_VALID                      2
-#define   O_MAC_FILTER_CONFIG__MAC_ADDR1_VALID                      1
-#define   O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID                      0
-#define R_HASH_TABLE_VECTOR                                         0x30
-#define R_TX_CONTROL                                                 0x0A0
-#define   O_TX_CONTROL__Tx15Halt                                     31
-#define   O_TX_CONTROL__Tx14Halt                                     30
-#define   O_TX_CONTROL__Tx13Halt                                     29
-#define   O_TX_CONTROL__Tx12Halt                                     28
-#define   O_TX_CONTROL__Tx11Halt                                     27
-#define   O_TX_CONTROL__Tx10Halt                                     26
-#define   O_TX_CONTROL__Tx9Halt                                      25
-#define   O_TX_CONTROL__Tx8Halt                                      24
-#define   O_TX_CONTROL__Tx7Halt                                      23
-#define   O_TX_CONTROL__Tx6Halt                                      22
-#define   O_TX_CONTROL__Tx5Halt                                      21
-#define   O_TX_CONTROL__Tx4Halt                                      20
-#define   O_TX_CONTROL__Tx3Halt                                      19
-#define   O_TX_CONTROL__Tx2Halt                                      18
-#define   O_TX_CONTROL__Tx1Halt                                      17
-#define   O_TX_CONTROL__Tx0Halt                                      16
-#define   O_TX_CONTROL__TxIdle                                       15
-#define   O_TX_CONTROL__TxEnable                                     14
-#define   O_TX_CONTROL__TxThreshold                                  0
-#define   W_TX_CONTROL__TxThreshold                                  14
-#define R_RX_CONTROL                                                 0x0A1
-#define   O_RX_CONTROL__RGMII                                        10
-#define   O_RX_CONTROL__SoftReset			             2
-#define   O_RX_CONTROL__RxHalt                                       1
-#define   O_RX_CONTROL__RxEnable                                     0
-#define R_DESC_PACK_CTRL                                            0x0A2
-#define   O_DESC_PACK_CTRL__ByteOffset                              17
-#define   W_DESC_PACK_CTRL__ByteOffset                              3
-#define   O_DESC_PACK_CTRL__PrePadEnable                            16
-#define   O_DESC_PACK_CTRL__MaxEntry                                14
-#define   W_DESC_PACK_CTRL__MaxEntry                                2
-#define   O_DESC_PACK_CTRL__RegularSize                             0
-#define   W_DESC_PACK_CTRL__RegularSize                             14
-#define R_STATCTRL                                                  0x0A3
-#define   O_STATCTRL__OverFlowEn                                    4
-#define   O_STATCTRL__GIG                                           3
-#define   O_STATCTRL__Sten                                          2
-#define   O_STATCTRL__ClrCnt                                        1
-#define   O_STATCTRL__AutoZ                                         0
-#define R_L2ALLOCCTRL                                               0x0A4
-#define   O_L2ALLOCCTRL__TxL2Allocate                               9
-#define   W_L2ALLOCCTRL__TxL2Allocate                               9
-#define   O_L2ALLOCCTRL__RxL2Allocate                               0
-#define   W_L2ALLOCCTRL__RxL2Allocate                               9
-#define R_INTMASK                                                   0x0A5
-#define   O_INTMASK__Spi4TxError                                     28
-#define   O_INTMASK__Spi4RxError                                     27
-#define   O_INTMASK__RGMIIHalfDupCollision                           27
-#define   O_INTMASK__Abort                                           26
-#define   O_INTMASK__Underrun                                        25
-#define   O_INTMASK__DiscardPacket                                   24
-#define   O_INTMASK__AsyncFifoFull                                   23
-#define   O_INTMASK__TagFull                                         22
-#define   O_INTMASK__Class3Full                                      21
-#define   O_INTMASK__C3EarlyFull                                     20
-#define   O_INTMASK__Class2Full                                      19
-#define   O_INTMASK__C2EarlyFull                                     18
-#define   O_INTMASK__Class1Full                                      17
-#define   O_INTMASK__C1EarlyFull                                     16
-#define   O_INTMASK__Class0Full                                      15
-#define   O_INTMASK__C0EarlyFull                                     14
-#define   O_INTMASK__RxDataFull                                      13
-#define   O_INTMASK__RxEarlyFull                                     12
-#define   O_INTMASK__RFreeEmpty                                      9
-#define   O_INTMASK__RFEarlyEmpty                                    8
-#define   O_INTMASK__P2PSpillEcc                                     7
-#define   O_INTMASK__FreeDescFull                                    5
-#define   O_INTMASK__FreeEarlyFull                                   4
-#define   O_INTMASK__TxFetchError                                    3
-#define   O_INTMASK__StatCarry                                       2
-#define   O_INTMASK__MDInt                                           1
-#define   O_INTMASK__TxIllegal                                       0
-#define R_INTREG                                                    0x0A6
-#define   O_INTREG__Spi4TxError                                     28
-#define   O_INTREG__Spi4RxError                                     27
-#define   O_INTREG__RGMIIHalfDupCollision                           27
-#define   O_INTREG__Abort                                           26
-#define   O_INTREG__Underrun                                        25
-#define   O_INTREG__DiscardPacket                                   24
-#define   O_INTREG__AsyncFifoFull                                   23
-#define   O_INTREG__TagFull                                         22
-#define   O_INTREG__Class3Full                                      21
-#define   O_INTREG__C3EarlyFull                                     20
-#define   O_INTREG__Class2Full                                      19
-#define   O_INTREG__C2EarlyFull                                     18
-#define   O_INTREG__Class1Full                                      17
-#define   O_INTREG__C1EarlyFull                                     16
-#define   O_INTREG__Class0Full                                      15
-#define   O_INTREG__C0EarlyFull                                     14
-#define   O_INTREG__RxDataFull                                      13
-#define   O_INTREG__RxEarlyFull                                     12
-#define   O_INTREG__RFreeEmpty                                      9
-#define   O_INTREG__RFEarlyEmpty                                    8
-#define   O_INTREG__P2PSpillEcc                                     7
-#define   O_INTREG__FreeDescFull                                    5
-#define   O_INTREG__FreeEarlyFull                                   4
-#define   O_INTREG__TxFetchError                                    3
-#define   O_INTREG__StatCarry                                       2
-#define   O_INTREG__MDInt                                           1
-#define   O_INTREG__TxIllegal                                       0
-#define R_TXRETRY                                                   0x0A7
-#define   O_TXRETRY__CollisionRetry                                 6
-#define   O_TXRETRY__BusErrorRetry                                  5
-#define   O_TXRETRY__UnderRunRetry                                  4
-#define   O_TXRETRY__Retries                                        0
-#define   W_TXRETRY__Retries                                        4
-#define R_CORECONTROL                                               0x0A8
-#define   O_CORECONTROL__ErrorThread                                4
-#define   W_CORECONTROL__ErrorThread                                7
-#define   O_CORECONTROL__Shutdown                                   2
-#define   O_CORECONTROL__Speed                                      0
-#define   W_CORECONTROL__Speed                                      2
-#define R_BYTEOFFSET0                                               0x0A9
-#define R_BYTEOFFSET1                                               0x0AA
-#define R_L2TYPE_0                                                  0x0F0
-#define   O_L2TYPE__ExtraHdrProtoSize                               26
-#define   W_L2TYPE__ExtraHdrProtoSize                               5
-#define   O_L2TYPE__ExtraHdrProtoOffset                             20
-#define   W_L2TYPE__ExtraHdrProtoOffset                             6
-#define   O_L2TYPE__ExtraHeaderSize                                 14
-#define   W_L2TYPE__ExtraHeaderSize                                 6
-#define   O_L2TYPE__ProtoOffset                                     8
-#define   W_L2TYPE__ProtoOffset                                     6
-#define   O_L2TYPE__L2HdrOffset                                     2
-#define   W_L2TYPE__L2HdrOffset                                     6
-#define   O_L2TYPE__L2Proto                                         0
-#define   W_L2TYPE__L2Proto                                         2
-#define R_L2TYPE_1                                                  0xF0
-#define R_L2TYPE_2                                                  0xF0
-#define R_L2TYPE_3                                                  0xF0
-#define R_PARSERCONFIGREG                                           0x100
-#define   O_PARSERCONFIGREG__CRCHashPoly                            8
-#define   W_PARSERCONFIGREG__CRCHashPoly                            7
-#define   O_PARSERCONFIGREG__PrePadOffset                           4
-#define   W_PARSERCONFIGREG__PrePadOffset                           4
-#define   O_PARSERCONFIGREG__UseCAM                                 2
-#define   O_PARSERCONFIGREG__UseHASH                                1
-#define   O_PARSERCONFIGREG__UseProto                               0
-#define R_L3CTABLE                                                  0x140
-#define   O_L3CTABLE__Offset0                                       25
-#define   W_L3CTABLE__Offset0                                       7
-#define   O_L3CTABLE__Len0                                          21
-#define   W_L3CTABLE__Len0                                          4
-#define   O_L3CTABLE__Offset1                                       14
-#define   W_L3CTABLE__Offset1                                       7
-#define   O_L3CTABLE__Len1                                          10
-#define   W_L3CTABLE__Len1                                          4
-#define   O_L3CTABLE__Offset2                                       4
-#define   W_L3CTABLE__Offset2                                       6
-#define   O_L3CTABLE__Len2                                          0
-#define   W_L3CTABLE__Len2                                          4
-#define   O_L3CTABLE__L3HdrOffset                                   26
-#define   W_L3CTABLE__L3HdrOffset                                   6
-#define   O_L3CTABLE__L4ProtoOffset                                 20
-#define   W_L3CTABLE__L4ProtoOffset                                 6
-#define   O_L3CTABLE__IPChksumCompute                               19
-#define   O_L3CTABLE__L4Classify                                    18
-#define   O_L3CTABLE__L2Proto                                       16
-#define   W_L3CTABLE__L2Proto                                       2
-#define   O_L3CTABLE__L3ProtoKey                                    0
-#define   W_L3CTABLE__L3ProtoKey                                    16
-#define R_L4CTABLE                                                  0x160
-#define   O_L4CTABLE__Offset0                                       21
-#define   W_L4CTABLE__Offset0                                       6
-#define   O_L4CTABLE__Len0                                          17
-#define   W_L4CTABLE__Len0                                          4
-#define   O_L4CTABLE__Offset1                                       11
-#define   W_L4CTABLE__Offset1                                       6
-#define   O_L4CTABLE__Len1                                          7
-#define   W_L4CTABLE__Len1                                          4
-#define   O_L4CTABLE__TCPChksumEnable                               0
-#define R_CAM4X128TABLE                                             0x172
-#define   O_CAM4X128TABLE__ClassId                                  7
-#define   W_CAM4X128TABLE__ClassId                                  2
-#define   O_CAM4X128TABLE__BucketId                                 1
-#define   W_CAM4X128TABLE__BucketId                                 6
-#define   O_CAM4X128TABLE__UseBucket                                0
-#define R_CAM4X128KEY                                               0x180
-#define R_TRANSLATETABLE                                            0x1A0
-#define R_DMACR0                                                    0x200
-#define   O_DMACR0__Data0WrMaxCr                                    27
-#define   W_DMACR0__Data0WrMaxCr                                    3
-#define   O_DMACR0__Data0RdMaxCr                                    24
-#define   W_DMACR0__Data0RdMaxCr                                    3
-#define   O_DMACR0__Data1WrMaxCr                                    21
-#define   W_DMACR0__Data1WrMaxCr                                    3
-#define   O_DMACR0__Data1RdMaxCr                                    18
-#define   W_DMACR0__Data1RdMaxCr                                    3
-#define   O_DMACR0__Data2WrMaxCr                                    15
-#define   W_DMACR0__Data2WrMaxCr                                    3
-#define   O_DMACR0__Data2RdMaxCr                                    12
-#define   W_DMACR0__Data2RdMaxCr                                    3
-#define   O_DMACR0__Data3WrMaxCr                                    9
-#define   W_DMACR0__Data3WrMaxCr                                    3
-#define   O_DMACR0__Data3RdMaxCr                                    6
-#define   W_DMACR0__Data3RdMaxCr                                    3
-#define   O_DMACR0__Data4WrMaxCr                                    3
-#define   W_DMACR0__Data4WrMaxCr                                    3
-#define   O_DMACR0__Data4RdMaxCr                                    0
-#define   W_DMACR0__Data4RdMaxCr                                    3
-#define R_DMACR1                                                    0x201
-#define   O_DMACR1__Data5WrMaxCr                                    27
-#define   W_DMACR1__Data5WrMaxCr                                    3
-#define   O_DMACR1__Data5RdMaxCr                                    24
-#define   W_DMACR1__Data5RdMaxCr                                    3
-#define   O_DMACR1__Data6WrMaxCr                                    21
-#define   W_DMACR1__Data6WrMaxCr                                    3
-#define   O_DMACR1__Data6RdMaxCr                                    18
-#define   W_DMACR1__Data6RdMaxCr                                    3
-#define   O_DMACR1__Data7WrMaxCr                                    15
-#define   W_DMACR1__Data7WrMaxCr                                    3
-#define   O_DMACR1__Data7RdMaxCr                                    12
-#define   W_DMACR1__Data7RdMaxCr                                    3
-#define   O_DMACR1__Data8WrMaxCr                                    9
-#define   W_DMACR1__Data8WrMaxCr                                    3
-#define   O_DMACR1__Data8RdMaxCr                                    6
-#define   W_DMACR1__Data8RdMaxCr                                    3
-#define   O_DMACR1__Data9WrMaxCr                                    3
-#define   W_DMACR1__Data9WrMaxCr                                    3
-#define   O_DMACR1__Data9RdMaxCr                                    0
-#define   W_DMACR1__Data9RdMaxCr                                    3
-#define R_DMACR2                                                    0x202
-#define   O_DMACR2__Data10WrMaxCr                                   27
-#define   W_DMACR2__Data10WrMaxCr                                   3
-#define   O_DMACR2__Data10RdMaxCr                                   24
-#define   W_DMACR2__Data10RdMaxCr                                   3
-#define   O_DMACR2__Data11WrMaxCr                                   21
-#define   W_DMACR2__Data11WrMaxCr                                   3
-#define   O_DMACR2__Data11RdMaxCr                                   18
-#define   W_DMACR2__Data11RdMaxCr                                   3
-#define   O_DMACR2__Data12WrMaxCr                                   15
-#define   W_DMACR2__Data12WrMaxCr                                   3
-#define   O_DMACR2__Data12RdMaxCr                                   12
-#define   W_DMACR2__Data12RdMaxCr                                   3
-#define   O_DMACR2__Data13WrMaxCr                                   9
-#define   W_DMACR2__Data13WrMaxCr                                   3
-#define   O_DMACR2__Data13RdMaxCr                                   6
-#define   W_DMACR2__Data13RdMaxCr                                   3
-#define   O_DMACR2__Data14WrMaxCr                                   3
-#define   W_DMACR2__Data14WrMaxCr                                   3
-#define   O_DMACR2__Data14RdMaxCr                                   0
-#define   W_DMACR2__Data14RdMaxCr                                   3
-#define R_DMACR3                                                    0x203
-#define   O_DMACR3__Data15WrMaxCr                                   27
-#define   W_DMACR3__Data15WrMaxCr                                   3
-#define   O_DMACR3__Data15RdMaxCr                                   24
-#define   W_DMACR3__Data15RdMaxCr                                   3
-#define   O_DMACR3__SpClassWrMaxCr                                  21
-#define   W_DMACR3__SpClassWrMaxCr                                  3
-#define   O_DMACR3__SpClassRdMaxCr                                  18
-#define   W_DMACR3__SpClassRdMaxCr                                  3
-#define   O_DMACR3__JumFrInWrMaxCr                                  15
-#define   W_DMACR3__JumFrInWrMaxCr                                  3
-#define   O_DMACR3__JumFrInRdMaxCr                                  12
-#define   W_DMACR3__JumFrInRdMaxCr                                  3
-#define   O_DMACR3__RegFrInWrMaxCr                                  9
-#define   W_DMACR3__RegFrInWrMaxCr                                  3
-#define   O_DMACR3__RegFrInRdMaxCr                                  6
-#define   W_DMACR3__RegFrInRdMaxCr                                  3
-#define   O_DMACR3__FrOutWrMaxCr                                    3
-#define   W_DMACR3__FrOutWrMaxCr                                    3
-#define   O_DMACR3__FrOutRdMaxCr                                    0
-#define   W_DMACR3__FrOutRdMaxCr                                    3
-#define R_REG_FRIN_SPILL_MEM_START_0                                0x204
-#define   O_REG_FRIN_SPILL_MEM_START_0__RegFrInSpillMemStart0        0
-#define   W_REG_FRIN_SPILL_MEM_START_0__RegFrInSpillMemStart0       32
-#define R_REG_FRIN_SPILL_MEM_START_1                                0x205
-#define   O_REG_FRIN_SPILL_MEM_START_1__RegFrInSpillMemStart1        0
-#define   W_REG_FRIN_SPILL_MEM_START_1__RegFrInSpillMemStart1        3
-#define R_REG_FRIN_SPILL_MEM_SIZE                                   0x206
-#define   O_REG_FRIN_SPILL_MEM_SIZE__RegFrInSpillMemSize             0
-#define   W_REG_FRIN_SPILL_MEM_SIZE__RegFrInSpillMemSize            32
-#define R_FROUT_SPILL_MEM_START_0                                   0x207
-#define   O_FROUT_SPILL_MEM_START_0__FrOutSpillMemStart0             0
-#define   W_FROUT_SPILL_MEM_START_0__FrOutSpillMemStart0            32
-#define R_FROUT_SPILL_MEM_START_1                                   0x208
-#define   O_FROUT_SPILL_MEM_START_1__FrOutSpillMemStart1             0
-#define   W_FROUT_SPILL_MEM_START_1__FrOutSpillMemStart1             3
-#define R_FROUT_SPILL_MEM_SIZE                                      0x209
-#define   O_FROUT_SPILL_MEM_SIZE__FrOutSpillMemSize                  0
-#define   W_FROUT_SPILL_MEM_SIZE__FrOutSpillMemSize                 32
-#define R_CLASS0_SPILL_MEM_START_0                                  0x20A
-#define   O_CLASS0_SPILL_MEM_START_0__Class0SpillMemStart0           0
-#define   W_CLASS0_SPILL_MEM_START_0__Class0SpillMemStart0          32
-#define R_CLASS0_SPILL_MEM_START_1                                  0x20B
-#define   O_CLASS0_SPILL_MEM_START_1__Class0SpillMemStart1           0
-#define   W_CLASS0_SPILL_MEM_START_1__Class0SpillMemStart1           3
-#define R_CLASS0_SPILL_MEM_SIZE                                     0x20C
-#define   O_CLASS0_SPILL_MEM_SIZE__Class0SpillMemSize                0
-#define   W_CLASS0_SPILL_MEM_SIZE__Class0SpillMemSize               32
-#define R_JUMFRIN_SPILL_MEM_START_0                                 0x20D
-#define   O_JUMFRIN_SPILL_MEM_START_0__JumFrInSpillMemStar0          0
-#define   W_JUMFRIN_SPILL_MEM_START_0__JumFrInSpillMemStar0         32
-#define R_JUMFRIN_SPILL_MEM_START_1                                 0x20E
-#define   O_JUMFRIN_SPILL_MEM_START_1__JumFrInSpillMemStart1         0
-#define   W_JUMFRIN_SPILL_MEM_START_1__JumFrInSpillMemStart1         3
-#define R_JUMFRIN_SPILL_MEM_SIZE                                    0x20F
-#define   O_JUMFRIN_SPILL_MEM_SIZE__JumFrInSpillMemSize              0
-#define   W_JUMFRIN_SPILL_MEM_SIZE__JumFrInSpillMemSize             32
-#define R_CLASS1_SPILL_MEM_START_0                                  0x210
-#define   O_CLASS1_SPILL_MEM_START_0__Class1SpillMemStart0           0
-#define   W_CLASS1_SPILL_MEM_START_0__Class1SpillMemStart0          32
-#define R_CLASS1_SPILL_MEM_START_1                                  0x211
-#define   O_CLASS1_SPILL_MEM_START_1__Class1SpillMemStart1           0
-#define   W_CLASS1_SPILL_MEM_START_1__Class1SpillMemStart1           3
-#define R_CLASS1_SPILL_MEM_SIZE                                     0x212
-#define   O_CLASS1_SPILL_MEM_SIZE__Class1SpillMemSize                0
-#define   W_CLASS1_SPILL_MEM_SIZE__Class1SpillMemSize               32
-#define R_CLASS2_SPILL_MEM_START_0                                  0x213
-#define   O_CLASS2_SPILL_MEM_START_0__Class2SpillMemStart0           0
-#define   W_CLASS2_SPILL_MEM_START_0__Class2SpillMemStart0          32
-#define R_CLASS2_SPILL_MEM_START_1                                  0x214
-#define   O_CLASS2_SPILL_MEM_START_1__Class2SpillMemStart1           0
-#define   W_CLASS2_SPILL_MEM_START_1__Class2SpillMemStart1           3
-#define R_CLASS2_SPILL_MEM_SIZE                                     0x215
-#define   O_CLASS2_SPILL_MEM_SIZE__Class2SpillMemSize                0
-#define   W_CLASS2_SPILL_MEM_SIZE__Class2SpillMemSize               32
-#define R_CLASS3_SPILL_MEM_START_0                                  0x216
-#define   O_CLASS3_SPILL_MEM_START_0__Class3SpillMemStart0           0
-#define   W_CLASS3_SPILL_MEM_START_0__Class3SpillMemStart0          32
-#define R_CLASS3_SPILL_MEM_START_1                                  0x217
-#define   O_CLASS3_SPILL_MEM_START_1__Class3SpillMemStart1           0
-#define   W_CLASS3_SPILL_MEM_START_1__Class3SpillMemStart1           3
-#define R_CLASS3_SPILL_MEM_SIZE                                     0x218
-#define   O_CLASS3_SPILL_MEM_SIZE__Class3SpillMemSize                0
-#define   W_CLASS3_SPILL_MEM_SIZE__Class3SpillMemSize               32
-#define R_REG_FRIN1_SPILL_MEM_START_0                               0x219
-#define R_REG_FRIN1_SPILL_MEM_START_1                               0x21a
-#define R_REG_FRIN1_SPILL_MEM_SIZE                                  0x21b
-#define R_SPIHNGY0                                                  0x219
-#define   O_SPIHNGY0__EG_HNGY_THRESH_0                              24
-#define   W_SPIHNGY0__EG_HNGY_THRESH_0                              7
-#define   O_SPIHNGY0__EG_HNGY_THRESH_1                              16
-#define   W_SPIHNGY0__EG_HNGY_THRESH_1                              7
-#define   O_SPIHNGY0__EG_HNGY_THRESH_2                              8
-#define   W_SPIHNGY0__EG_HNGY_THRESH_2                              7
-#define   O_SPIHNGY0__EG_HNGY_THRESH_3                              0
-#define   W_SPIHNGY0__EG_HNGY_THRESH_3                              7
-#define R_SPIHNGY1                                                  0x21A
-#define   O_SPIHNGY1__EG_HNGY_THRESH_4                              24
-#define   W_SPIHNGY1__EG_HNGY_THRESH_4                              7
-#define   O_SPIHNGY1__EG_HNGY_THRESH_5                              16
-#define   W_SPIHNGY1__EG_HNGY_THRESH_5                              7
-#define   O_SPIHNGY1__EG_HNGY_THRESH_6                              8
-#define   W_SPIHNGY1__EG_HNGY_THRESH_6                              7
-#define   O_SPIHNGY1__EG_HNGY_THRESH_7                              0
-#define   W_SPIHNGY1__EG_HNGY_THRESH_7                              7
-#define R_SPIHNGY2                                                  0x21B
-#define   O_SPIHNGY2__EG_HNGY_THRESH_8                              24
-#define   W_SPIHNGY2__EG_HNGY_THRESH_8                              7
-#define   O_SPIHNGY2__EG_HNGY_THRESH_9                              16
-#define   W_SPIHNGY2__EG_HNGY_THRESH_9                              7
-#define   O_SPIHNGY2__EG_HNGY_THRESH_10                             8
-#define   W_SPIHNGY2__EG_HNGY_THRESH_10                             7
-#define   O_SPIHNGY2__EG_HNGY_THRESH_11                             0
-#define   W_SPIHNGY2__EG_HNGY_THRESH_11                             7
-#define R_SPIHNGY3                                                  0x21C
-#define   O_SPIHNGY3__EG_HNGY_THRESH_12                             24
-#define   W_SPIHNGY3__EG_HNGY_THRESH_12                             7
-#define   O_SPIHNGY3__EG_HNGY_THRESH_13                             16
-#define   W_SPIHNGY3__EG_HNGY_THRESH_13                             7
-#define   O_SPIHNGY3__EG_HNGY_THRESH_14                             8
-#define   W_SPIHNGY3__EG_HNGY_THRESH_14                             7
-#define   O_SPIHNGY3__EG_HNGY_THRESH_15                             0
-#define   W_SPIHNGY3__EG_HNGY_THRESH_15                             7
-#define R_SPISTRV0                                                  0x21D
-#define   O_SPISTRV0__EG_STRV_THRESH_0                              24
-#define   W_SPISTRV0__EG_STRV_THRESH_0                              7
-#define   O_SPISTRV0__EG_STRV_THRESH_1                              16
-#define   W_SPISTRV0__EG_STRV_THRESH_1                              7
-#define   O_SPISTRV0__EG_STRV_THRESH_2                              8
-#define   W_SPISTRV0__EG_STRV_THRESH_2                              7
-#define   O_SPISTRV0__EG_STRV_THRESH_3                              0
-#define   W_SPISTRV0__EG_STRV_THRESH_3                              7
-#define R_SPISTRV1                                                  0x21E
-#define   O_SPISTRV1__EG_STRV_THRESH_4                              24
-#define   W_SPISTRV1__EG_STRV_THRESH_4                              7
-#define   O_SPISTRV1__EG_STRV_THRESH_5                              16
-#define   W_SPISTRV1__EG_STRV_THRESH_5                              7
-#define   O_SPISTRV1__EG_STRV_THRESH_6                              8
-#define   W_SPISTRV1__EG_STRV_THRESH_6                              7
-#define   O_SPISTRV1__EG_STRV_THRESH_7                              0
-#define   W_SPISTRV1__EG_STRV_THRESH_7                              7
-#define R_SPISTRV2                                                  0x21F
-#define   O_SPISTRV2__EG_STRV_THRESH_8                              24
-#define   W_SPISTRV2__EG_STRV_THRESH_8                              7
-#define   O_SPISTRV2__EG_STRV_THRESH_9                              16
-#define   W_SPISTRV2__EG_STRV_THRESH_9                              7
-#define   O_SPISTRV2__EG_STRV_THRESH_10                             8
-#define   W_SPISTRV2__EG_STRV_THRESH_10                             7
-#define   O_SPISTRV2__EG_STRV_THRESH_11                             0
-#define   W_SPISTRV2__EG_STRV_THRESH_11                             7
-#define R_SPISTRV3                                                  0x220
-#define   O_SPISTRV3__EG_STRV_THRESH_12                             24
-#define   W_SPISTRV3__EG_STRV_THRESH_12                             7
-#define   O_SPISTRV3__EG_STRV_THRESH_13                             16
-#define   W_SPISTRV3__EG_STRV_THRESH_13                             7
-#define   O_SPISTRV3__EG_STRV_THRESH_14                             8
-#define   W_SPISTRV3__EG_STRV_THRESH_14                             7
-#define   O_SPISTRV3__EG_STRV_THRESH_15                             0
-#define   W_SPISTRV3__EG_STRV_THRESH_15                             7
-#define R_TXDATAFIFO0                                               0x221
-#define   O_TXDATAFIFO0__Tx0DataFifoStart                           24
-#define   W_TXDATAFIFO0__Tx0DataFifoStart                           7
-#define   O_TXDATAFIFO0__Tx0DataFifoSize                            16
-#define   W_TXDATAFIFO0__Tx0DataFifoSize                            7
-#define   O_TXDATAFIFO0__Tx1DataFifoStart                           8
-#define   W_TXDATAFIFO0__Tx1DataFifoStart                           7
-#define   O_TXDATAFIFO0__Tx1DataFifoSize                            0
-#define   W_TXDATAFIFO0__Tx1DataFifoSize                            7
-#define R_TXDATAFIFO1                                               0x222
-#define   O_TXDATAFIFO1__Tx2DataFifoStart                           24
-#define   W_TXDATAFIFO1__Tx2DataFifoStart                           7
-#define   O_TXDATAFIFO1__Tx2DataFifoSize                            16
-#define   W_TXDATAFIFO1__Tx2DataFifoSize                            7
-#define   O_TXDATAFIFO1__Tx3DataFifoStart                           8
-#define   W_TXDATAFIFO1__Tx3DataFifoStart                           7
-#define   O_TXDATAFIFO1__Tx3DataFifoSize                            0
-#define   W_TXDATAFIFO1__Tx3DataFifoSize                            7
-#define R_TXDATAFIFO2                                               0x223
-#define   O_TXDATAFIFO2__Tx4DataFifoStart                           24
-#define   W_TXDATAFIFO2__Tx4DataFifoStart                           7
-#define   O_TXDATAFIFO2__Tx4DataFifoSize                            16
-#define   W_TXDATAFIFO2__Tx4DataFifoSize                            7
-#define   O_TXDATAFIFO2__Tx5DataFifoStart                           8
-#define   W_TXDATAFIFO2__Tx5DataFifoStart                           7
-#define   O_TXDATAFIFO2__Tx5DataFifoSize                            0
-#define   W_TXDATAFIFO2__Tx5DataFifoSize                            7
-#define R_TXDATAFIFO3                                               0x224
-#define   O_TXDATAFIFO3__Tx6DataFifoStart                           24
-#define   W_TXDATAFIFO3__Tx6DataFifoStart                           7
-#define   O_TXDATAFIFO3__Tx6DataFifoSize                            16
-#define   W_TXDATAFIFO3__Tx6DataFifoSize                            7
-#define   O_TXDATAFIFO3__Tx7DataFifoStart                           8
-#define   W_TXDATAFIFO3__Tx7DataFifoStart                           7
-#define   O_TXDATAFIFO3__Tx7DataFifoSize                            0
-#define   W_TXDATAFIFO3__Tx7DataFifoSize                            7
-#define R_TXDATAFIFO4                                               0x225
-#define   O_TXDATAFIFO4__Tx8DataFifoStart                           24
-#define   W_TXDATAFIFO4__Tx8DataFifoStart                           7
-#define   O_TXDATAFIFO4__Tx8DataFifoSize                            16
-#define   W_TXDATAFIFO4__Tx8DataFifoSize                            7
-#define   O_TXDATAFIFO4__Tx9DataFifoStart                           8
-#define   W_TXDATAFIFO4__Tx9DataFifoStart                           7
-#define   O_TXDATAFIFO4__Tx9DataFifoSize                            0
-#define   W_TXDATAFIFO4__Tx9DataFifoSize                            7
-#define R_TXDATAFIFO5                                               0x226
-#define   O_TXDATAFIFO5__Tx10DataFifoStart                          24
-#define   W_TXDATAFIFO5__Tx10DataFifoStart                          7
-#define   O_TXDATAFIFO5__Tx10DataFifoSize                           16
-#define   W_TXDATAFIFO5__Tx10DataFifoSize                           7
-#define   O_TXDATAFIFO5__Tx11DataFifoStart                          8
-#define   W_TXDATAFIFO5__Tx11DataFifoStart                          7
-#define   O_TXDATAFIFO5__Tx11DataFifoSize                           0
-#define   W_TXDATAFIFO5__Tx11DataFifoSize                           7
-#define R_TXDATAFIFO6                                               0x227
-#define   O_TXDATAFIFO6__Tx12DataFifoStart                          24
-#define   W_TXDATAFIFO6__Tx12DataFifoStart                          7
-#define   O_TXDATAFIFO6__Tx12DataFifoSize                           16
-#define   W_TXDATAFIFO6__Tx12DataFifoSize                           7
-#define   O_TXDATAFIFO6__Tx13DataFifoStart                          8
-#define   W_TXDATAFIFO6__Tx13DataFifoStart                          7
-#define   O_TXDATAFIFO6__Tx13DataFifoSize                           0
-#define   W_TXDATAFIFO6__Tx13DataFifoSize                           7
-#define R_TXDATAFIFO7                                               0x228
-#define   O_TXDATAFIFO7__Tx14DataFifoStart                          24
-#define   W_TXDATAFIFO7__Tx14DataFifoStart                          7
-#define   O_TXDATAFIFO7__Tx14DataFifoSize                           16
-#define   W_TXDATAFIFO7__Tx14DataFifoSize                           7
-#define   O_TXDATAFIFO7__Tx15DataFifoStart                          8
-#define   W_TXDATAFIFO7__Tx15DataFifoStart                          7
-#define   O_TXDATAFIFO7__Tx15DataFifoSize                           0
-#define   W_TXDATAFIFO7__Tx15DataFifoSize                           7
-#define R_RXDATAFIFO0                                               0x229
-#define   O_RXDATAFIFO0__Rx0DataFifoStart                           24
-#define   W_RXDATAFIFO0__Rx0DataFifoStart                           7
-#define   O_RXDATAFIFO0__Rx0DataFifoSize                            16
-#define   W_RXDATAFIFO0__Rx0DataFifoSize                            7
-#define   O_RXDATAFIFO0__Rx1DataFifoStart                           8
-#define   W_RXDATAFIFO0__Rx1DataFifoStart                           7
-#define   O_RXDATAFIFO0__Rx1DataFifoSize                            0
-#define   W_RXDATAFIFO0__Rx1DataFifoSize                            7
-#define R_RXDATAFIFO1                                               0x22A
-#define   O_RXDATAFIFO1__Rx2DataFifoStart                           24
-#define   W_RXDATAFIFO1__Rx2DataFifoStart                           7
-#define   O_RXDATAFIFO1__Rx2DataFifoSize                            16
-#define   W_RXDATAFIFO1__Rx2DataFifoSize                            7
-#define   O_RXDATAFIFO1__Rx3DataFifoStart                           8
-#define   W_RXDATAFIFO1__Rx3DataFifoStart                           7
-#define   O_RXDATAFIFO1__Rx3DataFifoSize                            0
-#define   W_RXDATAFIFO1__Rx3DataFifoSize                            7
-#define R_RXDATAFIFO2                                               0x22B
-#define   O_RXDATAFIFO2__Rx4DataFifoStart                           24
-#define   W_RXDATAFIFO2__Rx4DataFifoStart                           7
-#define   O_RXDATAFIFO2__Rx4DataFifoSize                            16
-#define   W_RXDATAFIFO2__Rx4DataFifoSize                            7
-#define   O_RXDATAFIFO2__Rx5DataFifoStart                           8
-#define   W_RXDATAFIFO2__Rx5DataFifoStart                           7
-#define   O_RXDATAFIFO2__Rx5DataFifoSize                            0
-#define   W_RXDATAFIFO2__Rx5DataFifoSize                            7
-#define R_RXDATAFIFO3                                               0x22C
-#define   O_RXDATAFIFO3__Rx6DataFifoStart                           24
-#define   W_RXDATAFIFO3__Rx6DataFifoStart                           7
-#define   O_RXDATAFIFO3__Rx6DataFifoSize                            16
-#define   W_RXDATAFIFO3__Rx6DataFifoSize                            7
-#define   O_RXDATAFIFO3__Rx7DataFifoStart                           8
-#define   W_RXDATAFIFO3__Rx7DataFifoStart                           7
-#define   O_RXDATAFIFO3__Rx7DataFifoSize                            0
-#define   W_RXDATAFIFO3__Rx7DataFifoSize                            7
-#define R_RXDATAFIFO4                                               0x22D
-#define   O_RXDATAFIFO4__Rx8DataFifoStart                           24
-#define   W_RXDATAFIFO4__Rx8DataFifoStart                           7
-#define   O_RXDATAFIFO4__Rx8DataFifoSize                            16
-#define   W_RXDATAFIFO4__Rx8DataFifoSize                            7
-#define   O_RXDATAFIFO4__Rx9DataFifoStart                           8
-#define   W_RXDATAFIFO4__Rx9DataFifoStart                           7
-#define   O_RXDATAFIFO4__Rx9DataFifoSize                            0
-#define   W_RXDATAFIFO4__Rx9DataFifoSize                            7
-#define R_RXDATAFIFO5                                               0x22E
-#define   O_RXDATAFIFO5__Rx10DataFifoStart                          24
-#define   W_RXDATAFIFO5__Rx10DataFifoStart                          7
-#define   O_RXDATAFIFO5__Rx10DataFifoSize                           16
-#define   W_RXDATAFIFO5__Rx10DataFifoSize                           7
-#define   O_RXDATAFIFO5__Rx11DataFifoStart                          8
-#define   W_RXDATAFIFO5__Rx11DataFifoStart                          7
-#define   O_RXDATAFIFO5__Rx11DataFifoSize                           0
-#define   W_RXDATAFIFO5__Rx11DataFifoSize                           7
-#define R_RXDATAFIFO6                                               0x22F
-#define   O_RXDATAFIFO6__Rx12DataFifoStart                          24
-#define   W_RXDATAFIFO6__Rx12DataFifoStart                          7
-#define   O_RXDATAFIFO6__Rx12DataFifoSize                           16
-#define   W_RXDATAFIFO6__Rx12DataFifoSize                           7
-#define   O_RXDATAFIFO6__Rx13DataFifoStart                          8
-#define   W_RXDATAFIFO6__Rx13DataFifoStart                          7
-#define   O_RXDATAFIFO6__Rx13DataFifoSize                           0
-#define   W_RXDATAFIFO6__Rx13DataFifoSize                           7
-#define R_RXDATAFIFO7                                               0x230
-#define   O_RXDATAFIFO7__Rx14DataFifoStart                          24
-#define   W_RXDATAFIFO7__Rx14DataFifoStart                          7
-#define   O_RXDATAFIFO7__Rx14DataFifoSize                           16
-#define   W_RXDATAFIFO7__Rx14DataFifoSize                           7
-#define   O_RXDATAFIFO7__Rx15DataFifoStart                          8
-#define   W_RXDATAFIFO7__Rx15DataFifoStart                          7
-#define   O_RXDATAFIFO7__Rx15DataFifoSize                           0
-#define   W_RXDATAFIFO7__Rx15DataFifoSize                           7
-#define R_XGMACPADCALIBRATION                                       0x231
-#define R_FREEQCARVE                                                0x233
-#define R_SPI4STATICDELAY0                                          0x240
-#define   O_SPI4STATICDELAY0__DataLine7                             28
-#define   W_SPI4STATICDELAY0__DataLine7                             4
-#define   O_SPI4STATICDELAY0__DataLine6                             24
-#define   W_SPI4STATICDELAY0__DataLine6                             4
-#define   O_SPI4STATICDELAY0__DataLine5                             20
-#define   W_SPI4STATICDELAY0__DataLine5                             4
-#define   O_SPI4STATICDELAY0__DataLine4                             16
-#define   W_SPI4STATICDELAY0__DataLine4                             4
-#define   O_SPI4STATICDELAY0__DataLine3                             12
-#define   W_SPI4STATICDELAY0__DataLine3                             4
-#define   O_SPI4STATICDELAY0__DataLine2                             8
-#define   W_SPI4STATICDELAY0__DataLine2                             4
-#define   O_SPI4STATICDELAY0__DataLine1                             4
-#define   W_SPI4STATICDELAY0__DataLine1                             4
-#define   O_SPI4STATICDELAY0__DataLine0                             0
-#define   W_SPI4STATICDELAY0__DataLine0                             4
-#define R_SPI4STATICDELAY1                                          0x241
-#define   O_SPI4STATICDELAY1__DataLine15                            28
-#define   W_SPI4STATICDELAY1__DataLine15                            4
-#define   O_SPI4STATICDELAY1__DataLine14                            24
-#define   W_SPI4STATICDELAY1__DataLine14                            4
-#define   O_SPI4STATICDELAY1__DataLine13                            20
-#define   W_SPI4STATICDELAY1__DataLine13                            4
-#define   O_SPI4STATICDELAY1__DataLine12                            16
-#define   W_SPI4STATICDELAY1__DataLine12                            4
-#define   O_SPI4STATICDELAY1__DataLine11                            12
-#define   W_SPI4STATICDELAY1__DataLine11                            4
-#define   O_SPI4STATICDELAY1__DataLine10                            8
-#define   W_SPI4STATICDELAY1__DataLine10                            4
-#define   O_SPI4STATICDELAY1__DataLine9                             4
-#define   W_SPI4STATICDELAY1__DataLine9                             4
-#define   O_SPI4STATICDELAY1__DataLine8                             0
-#define   W_SPI4STATICDELAY1__DataLine8                             4
-#define R_SPI4STATICDELAY2                                          0x242
-#define   O_SPI4STATICDELAY0__TxStat1                               8
-#define   W_SPI4STATICDELAY0__TxStat1                               4
-#define   O_SPI4STATICDELAY0__TxStat0                               4
-#define   W_SPI4STATICDELAY0__TxStat0                               4
-#define   O_SPI4STATICDELAY0__RxControl                             0
-#define   W_SPI4STATICDELAY0__RxControl                             4
-#define R_SPI4CONTROL                                               0x243
-#define   O_SPI4CONTROL__StaticDelay                                2
-#define   O_SPI4CONTROL__LVDS_LVTTL                                 1
-#define   O_SPI4CONTROL__SPI4Enable                                 0
-#define R_CLASSWATERMARKS                                           0x244
-#define   O_CLASSWATERMARKS__Class0Watermark                        24
-#define   W_CLASSWATERMARKS__Class0Watermark                        5
-#define   O_CLASSWATERMARKS__Class1Watermark                        16
-#define   W_CLASSWATERMARKS__Class1Watermark                        5
-#define   O_CLASSWATERMARKS__Class3Watermark                        0
-#define   W_CLASSWATERMARKS__Class3Watermark                        5
-#define R_RXWATERMARKS1                                              0x245
-#define   O_RXWATERMARKS__Rx0DataWatermark                          24
-#define   W_RXWATERMARKS__Rx0DataWatermark                          7
-#define   O_RXWATERMARKS__Rx1DataWatermark                          16
-#define   W_RXWATERMARKS__Rx1DataWatermark                          7
-#define   O_RXWATERMARKS__Rx3DataWatermark                          0
-#define   W_RXWATERMARKS__Rx3DataWatermark                          7
-#define R_RXWATERMARKS2                                              0x246
-#define   O_RXWATERMARKS__Rx4DataWatermark                          24
-#define   W_RXWATERMARKS__Rx4DataWatermark                          7
-#define   O_RXWATERMARKS__Rx5DataWatermark                          16
-#define   W_RXWATERMARKS__Rx5DataWatermark                          7
-#define   O_RXWATERMARKS__Rx6DataWatermark                          8
-#define   W_RXWATERMARKS__Rx6DataWatermark                          7
-#define   O_RXWATERMARKS__Rx7DataWatermark                          0
-#define   W_RXWATERMARKS__Rx7DataWatermark                          7
-#define R_RXWATERMARKS3                                              0x247
-#define   O_RXWATERMARKS__Rx8DataWatermark                          24
-#define   W_RXWATERMARKS__Rx8DataWatermark                          7
-#define   O_RXWATERMARKS__Rx9DataWatermark                          16
-#define   W_RXWATERMARKS__Rx9DataWatermark                          7
-#define   O_RXWATERMARKS__Rx10DataWatermark                         8
-#define   W_RXWATERMARKS__Rx10DataWatermark                         7
-#define   O_RXWATERMARKS__Rx11DataWatermark                         0
-#define   W_RXWATERMARKS__Rx11DataWatermark                         7
-#define R_RXWATERMARKS4                                              0x248
-#define   O_RXWATERMARKS__Rx12DataWatermark                         24
-#define   W_RXWATERMARKS__Rx12DataWatermark                         7
-#define   O_RXWATERMARKS__Rx13DataWatermark                         16
-#define   W_RXWATERMARKS__Rx13DataWatermark                         7
-#define   O_RXWATERMARKS__Rx14DataWatermark                         8
-#define   W_RXWATERMARKS__Rx14DataWatermark                         7
-#define   O_RXWATERMARKS__Rx15DataWatermark                         0
-#define   W_RXWATERMARKS__Rx15DataWatermark                         7
-#define R_FREEWATERMARKS                                            0x249
-#define   O_FREEWATERMARKS__FreeOutWatermark                        16
-#define   W_FREEWATERMARKS__FreeOutWatermark                        16
-#define   O_FREEWATERMARKS__JumFrWatermark                          8
-#define   W_FREEWATERMARKS__JumFrWatermark                          7
-#define   O_FREEWATERMARKS__RegFrWatermark                          0
-#define   W_FREEWATERMARKS__RegFrWatermark                          7
-#define R_EGRESSFIFOCARVINGSLOTS                                    0x24a
-
-#define CTRL_RES0           0
-#define CTRL_RES1           1
-#define CTRL_REG_FREE       2
-#define CTRL_JUMBO_FREE     3
-#define CTRL_CONT           4
-#define CTRL_EOP            5
-#define CTRL_START          6
-#define CTRL_SNGL           7
-
-#define CTRL_B0_NOT_EOP     0
-#define CTRL_B0_EOP         1
-
-#define R_ROUND_ROBIN_TABLE                 0
-#define R_PDE_CLASS_0                       0x300
-#define R_PDE_CLASS_1                       0x302
-#define R_PDE_CLASS_2                       0x304
-#define R_PDE_CLASS_3                       0x306
-
-#define R_MSG_TX_THRESHOLD                  0x308
-
-#define R_GMAC_JFR0_BUCKET_SIZE              0x320
-#define R_GMAC_RFR0_BUCKET_SIZE              0x321
-#define R_GMAC_TX0_BUCKET_SIZE              0x322
-#define R_GMAC_TX1_BUCKET_SIZE              0x323
-#define R_GMAC_TX2_BUCKET_SIZE              0x324
-#define R_GMAC_TX3_BUCKET_SIZE              0x325
-#define R_GMAC_JFR1_BUCKET_SIZE              0x326
-#define R_GMAC_RFR1_BUCKET_SIZE              0x327
-
-#define R_XGS_TX0_BUCKET_SIZE               0x320
-#define R_XGS_TX1_BUCKET_SIZE               0x321
-#define R_XGS_TX2_BUCKET_SIZE               0x322
-#define R_XGS_TX3_BUCKET_SIZE               0x323
-#define R_XGS_TX4_BUCKET_SIZE               0x324
-#define R_XGS_TX5_BUCKET_SIZE               0x325
-#define R_XGS_TX6_BUCKET_SIZE               0x326
-#define R_XGS_TX7_BUCKET_SIZE               0x327
-#define R_XGS_TX8_BUCKET_SIZE               0x328
-#define R_XGS_TX9_BUCKET_SIZE               0x329
-#define R_XGS_TX10_BUCKET_SIZE              0x32A
-#define R_XGS_TX11_BUCKET_SIZE              0x32B
-#define R_XGS_TX12_BUCKET_SIZE              0x32C
-#define R_XGS_TX13_BUCKET_SIZE              0x32D
-#define R_XGS_TX14_BUCKET_SIZE              0x32E
-#define R_XGS_TX15_BUCKET_SIZE              0x32F
-#define R_XGS_JFR_BUCKET_SIZE               0x330
-#define R_XGS_RFR_BUCKET_SIZE               0x331
-
-#define R_CC_CPU0_0                         0x380
-#define R_CC_CPU1_0                         0x388
-#define R_CC_CPU2_0                         0x390
-#define R_CC_CPU3_0                         0x398
-#define R_CC_CPU4_0                         0x3a0
-#define R_CC_CPU5_0                         0x3a8
-#define R_CC_CPU6_0                         0x3b0
-#define R_CC_CPU7_0                         0x3b8
-
-#define XLR_GMAC_BLK_SZ		            (XLR_IO_GMAC_1_OFFSET - \
-    XLR_IO_GMAC_0_OFFSET)
-
-/* Constants used for configuring the devices */
-
-#define RGE_TX_THRESHOLD                1024
-#define RGE_TX_Q_SIZE                   1024
-
-#define MAC_B2B_IPG                     88
-
-#define	NLGE_PREPAD_LEN			32
-
-/* frame sizes need to be cacheline aligned */
-#define MAX_FRAME_SIZE                  (1536 + NLGE_PREPAD_LEN)
-#define MAX_FRAME_SIZE_JUMBO            9216
-#define RGE_TX_THRESHOLD_BYTES		ETHER_MAX_LEN
-
-#define MAC_SKB_BACK_PTR_SIZE           SMP_CACHE_BYTES
-#define MAC_PREPAD                      0
-#define BYTE_OFFSET                     2
-#define XLR_RX_BUF_SIZE                 (MAX_FRAME_SIZE + BYTE_OFFSET + \
-    MAC_PREPAD + MAC_SKB_BACK_PTR_SIZE + SMP_CACHE_BYTES)
-#define MAC_CRC_LEN                     4
-#define MAX_NUM_MSGRNG_STN_CC           128
-#define MAX_MSG_SND_ATTEMPTS		100	/* 13 stns x 4 entry msg/stn +
-						   headroom */
-
-#define MAC_FRIN_TO_BE_SENT_THRESHOLD   16
-
-#define MAX_NUM_DESC_SPILL		1024
-#define MAX_FRIN_SPILL                  (MAX_NUM_DESC_SPILL << 2)
-#define MAX_FROUT_SPILL                 (MAX_NUM_DESC_SPILL << 2)
-#define MAX_CLASS_0_SPILL               (MAX_NUM_DESC_SPILL << 2)
-#define MAX_CLASS_1_SPILL               (MAX_NUM_DESC_SPILL << 2)
-#define MAX_CLASS_2_SPILL               (MAX_NUM_DESC_SPILL << 2)
-#define MAX_CLASS_3_SPILL               (MAX_NUM_DESC_SPILL << 2)
-
-#define XLR_MAX_CORE                    8
-
-#define XLR_MAX_NLNA			3
-#define XLR_MAX_MACS                    8
-#define XLR_MAX_TX_FRAGS                14
-#define MAX_P2D_DESC_PER_PORT           512 
-
-#define PHY_STATUS_RETRIES 		25000
-
-/* Structs representing hardware data structures */
-struct size_1_desc {
-	uint64_t	entry0;
-};
-
-struct size_2_desc {
-	uint64_t	entry0;
-	uint64_t	entry1;
-};
-
-struct size_3_desc {
-	uint64_t	entry0;
-	uint64_t	entry1;
-	uint64_t	entry2;
-};
-
-struct size_4_desc {
-	uint64_t	entry0;
-	uint64_t	entry1;
-	uint64_t	entry2;
-	uint64_t	entry3;
-};
-
-struct fr_desc {
-	struct size_1_desc d1;
-};
-
-union rx_tx_desc {
-	struct size_2_desc d2;
-	/* struct size_3_desc d3; */
-	/* struct size_4_desc d4; */
-};
-
-
-extern unsigned char xlr_base_mac_addr[];
-
-/* Driver data structures and enums */
-
-typedef enum {
-	xlr_mac_speed_10, xlr_mac_speed_100,
-	xlr_mac_speed_1000, xlr_mac_speed_rsvd
-}		xlr_mac_speed_t;
-
-typedef enum {
-	xlr_mac_duplex_auto, xlr_mac_duplex_half,
-	xlr_mac_duplex_full
-}		xlr_mac_duplex_t;
-
-typedef enum {
-	xlr_mac_link_down,
-	xlr_mac_link_up,
-}		xlr_mac_link_t;
-
-typedef enum {
-	xlr_mac_fc_auto, xlr_mac_fc_disabled, xlr_mac_fc_frame,
-	xlr_mac_fc_collision, xlr_mac_fc_carrier
-}		xlr_mac_fc_t;
-
-enum {
-        SGMII_SPEED_10   = 0x00000000,
-        SGMII_SPEED_100  = 0x02000000,
-        SGMII_SPEED_1000 = 0x04000000,
-};
-
-struct nlge_softc;
-
-/*
- * A data-structure to hold a set of related ports. The "sense" in which they
- * are related is defined by the user of this data-structure. 
- *
- * One example: a set of ports that are controlled thru a single MDIO line. 
- */
-struct nlge_port_set {
-	struct nlge_softc **port_vec;
-	uint32_t	   vec_sz;
-};
-
-/*
- * nlna_softc has Network Accelerator (NA) attributes that are necessary to 
- * configure the h/w registers of this block. All the commmon configuration
- * for a set of GMAC ports controlled by an NA is done from here.
- */
-struct nlna_softc {
-	device_t	nlna_dev;
-
-	uint32_t	num_ports;
-	int		na_type;
-	int		mac_type;
-	xlr_reg_t	*base;
-
-	struct fr_desc *frin_spill;
-	struct fr_desc *frout_spill;
-	union rx_tx_desc *class_0_spill;
-	union rx_tx_desc *class_1_spill;
-	union rx_tx_desc *class_2_spill;
-	union rx_tx_desc *class_3_spill;
-	uint32_t	rfrbucket;
-	uint32_t	station_id;
-	
-	struct nlge_softc *child_sc[XLR_MAX_MACS];
-
-	/*
-	 * Set of ports controlled/configured by the MII line 
-	 * of this network accelerator.
-	 */
-	struct nlge_port_set mdio_set;
-	struct nlge_softc *mdio_sc[XLR_MAX_MACS];
-};
-
-struct nlge_softc {
-	struct ifnet 	*nlge_if;	/* should be first member - cf.
-					   mii.c:miibus_attach() */
-	struct mii_data nlge_mii;
-	struct nlge_port_set *mdio_pset;
-	device_t	nlge_dev;
-	device_t	mii_bus;
-	xlr_reg_t	*base;
-	xlr_reg_t	*mii_base;
-	xlr_reg_t	*pcs_addr;
-	xlr_reg_t	*serdes_addr;
-	int		port_type;
-	int		if_flags;
-	xlr_mac_speed_t	speed;
-	xlr_mac_duplex_t duplex;
-	xlr_mac_link_t	link;
-	xlr_mac_fc_t	flow_ctrl;
-	uint32_t	id;
-	uint32_t	instance;
-	uint32_t	phy_addr;
-	uint32_t	tx_bucket_id;
-	uint8_t		dev_addr[ETHER_ADDR_LEN];
-	struct mtx 	sc_lock;
-};
-
-
-struct nlge_tx_desc {
-	uint64_t	frag[XLR_MAX_TX_FRAGS + 2];
-};
-
-#define MAX_TX_RING_SIZE        (XLR_MAX_MACS * MAX_P2D_DESC_PER_PORT *\
-    sizeof(struct p2d_tx_desc))
-
-#define NLGE_WRITE(base, off, val)		xlr_write_reg(base, off, val)
-#define NLGE_READ(base, off)			xlr_read_reg(base, off)
-#define NLGE_UPDATE(base, off, val, mask)	\
-			do {						\
-				uint32_t	rd_val, wrt_val;	\
-				rd_val = NLGE_READ(base, off);		\
-				wrt_val = (rd_val & ~mask) | (val & mask);	\
-				NLGE_WRITE(base, off, wrt_val);		\
-			} while (0)
-
-#define NLGE_LOCK_INIT(_sc, _name) \
-	mtx_init(&(_sc)->sc_lock, _name, MTX_NETWORK_LOCK, MTX_DEF)
-#define NLGE_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_lock)
-#define NLGE_LOCK(_sc)		mtx_lock(&(_sc)->sc_lock)
-#define NLGE_UNLOCK(_sc)	mtx_unlock(&(_sc)->sc_lock)
-#define NLGE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->sc_lock, MA_OWNED)
-
diff --git a/sys/mips/rmi/dev/sec/desc.h b/sys/mips/rmi/dev/sec/desc.h
deleted file mode 100644
index fe17b8e239b..00000000000
--- a/sys/mips/rmi/dev/sec/desc.h
+++ /dev/null
@@ -1,3070 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-#ifndef _DESC_H_
-#define _DESC_H_
-
-
-#define ONE_BIT              0x0000000000000001ULL
-#define TWO_BITS             0x0000000000000003ULL
-#define THREE_BITS           0x0000000000000007ULL
-#define FOUR_BITS            0x000000000000000fULL
-#define FIVE_BITS            0x000000000000001fULL
-#define SIX_BITS             0x000000000000003fULL
-#define SEVEN_BITS           0x000000000000007fULL
-#define EIGHT_BITS           0x00000000000000ffULL
-#define NINE_BITS            0x00000000000001ffULL
-#define ELEVEN_BITS          0x00000000000007ffULL
-#define TWELVE_BITS          0x0000000000000fffULL
-#define FOURTEEN_BITS        0x0000000000003fffULL
-#define TWENTYFOUR_BITS      0x0000000000ffffffULL
-#define THIRTY_TWO_BITS      0x00000000ffffffffULL
-#define THIRTY_FIVE_BITS     0x00000007ffffffffULL
-#define FOURTY_BITS          0x000000ffffffffffULL
-
-#define MSG_IN_CTL_LEN_BASE  40
-#define MSG_IN_CTL_ADDR_BASE 0
-
-#define GET_FIELD(word,field) \
- ((word) & (field ## _MASK)) >> (field ## _LSB)
-
-#define FIELD_VALUE(field,value) (((value) & (field ## _BITS)) << (field ## _LSB))
-
-/*
- * NOTE: this macro expects 'word' to be uninitialized (i.e. zeroed)
- */
-#define SET_FIELD(word,field,value) \
- { (word) |=  (((value) & (field ## _BITS)) << (field ## _LSB)); }
-
-/*
- * This macro clears 'word', then sets the value
- */
-#define CLEAR_SET_FIELD(word,field,value) \
- { (word) &= ~((field ## _BITS) << (field ## _LSB)); \
-   (word) |=  (((value) & (field ## _BITS)) << (field ## _LSB)); }
-
-/*
- * NOTE: May be used to build value specific mask
- *        (e.g.  GEN_MASK(CTL_DSC_CPHR_3DES,CTL_DSC_CPHR_LSB)
- */
-#define GEN_MASK(bits,lsb) ((bits) << (lsb))
-
-
-
-
-/*
- * Security block data and control exchange
- *
- * A 2-word message ring descriptor is used to pass a pointer to the control descriptor data structure
- * and a pointer to the packet descriptor data structure:
- *
- *  63  61 60                 54      53      52    49 48            45 44    40
- *  39                                                     5 4                 0
- *  ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Resp Dest Id Entry0 | IF_L2ALLOC | UNUSED | Control Length | UNUSED
- * | 35 MSB of address of control descriptor data structure | Software Scratch0
- * |
- *  ---------------------------------------------------------------------------------------------------------------------------------------------------------
- *    3              7                1          4             4           5
- *    35                                       5
- *
- *  63  61 60    54     53          52             51        50    46      45       44    40 39                                                    5 4      0
- *  ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | UNUSED | WRB_COH | WRB_L2ALLOC | DF_PTR_L2ALLOC | UNUSED | Data Length | UNUSED | 35 MSB of address of packet descriptor data structure | UNUSED |
- *  ---------------------------------------------------------------------------------------------------------------------------------------------------------
- *    3       7         1          1               1            5           1          5                                35                              5
- *
- * Addresses assumed to be cache-line aligned, i.e., Address[4:0] ignored (using 5'h00 instead)
- *
- * Control length is the number of control cachelines to be read so user needs
- * to round up
- * the control length to closest integer multiple of 32 bytes. Note that at
- * present (08/12/04)
- * the longest (sensical) ctrl structure is <= 416 bytes, i.e., 13 cachelines.
- *
- * The packet descriptor data structure size is fixed at 1 cacheline (32 bytes).
- * This effectively makes "Data Length" a Load/NoLoad bit. NoLoad causes an abort.
- *
- *
- * Upon completion of operation, the security block returns a 2-word free descriptor
- * in the following format:
- *
- *  63  61 60            54 53   52 51       49   48   47               40 39                                                  0
- *  ----------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | 1'b0 | Instruction Error |    Address of control descriptor data structure     |
- *  ----------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | 1'b0 |     Data Error    |    Address of packet descriptor data structure      |
- *  ----------------------------------------------------------------------------------------------------------------------------
- *
- * The Instruction and Data Error codes are enumerated in the
- * ControlDescriptor and PacketDescriptor sections below
- *
- */
-
-
-/*
- * Operating assumptions
- * =====================
- *
- *
- *	        -> For all IpSec ops, I assume that all the IP/IPSec/TCP headers
- *		   and the data are present at the specified source addresses.
- *		   I also assume that all necessary header data already exists
- *		   at the destination. Additionally, in AH I assume that all
- *		   mutable fields (IP.{TOS, Flags, Offset, TTL, Header_Checksum})
- *		   and the AH.Authentication_Data have been zeroed by the client.
- *
- *
- *		-> In principle, the HW can calculate TCP checksums on both
- *		   incoming and outgoing data; however, since the TCP header
- *		   contains the TCP checksum of the plain payload and the header
- *		   is encrypted, two passes would be necessary to do checksum + encryption
- *                 for outgoing messages;
- *		   therefore the checksum engine will likely only be used during decryption
- *                 (incoming).
- *
- *
- *		-> For all operations involving TCP checksum, I assume the client has filled
- *		   the TCP checksum field with the appropriate value:
- *
- *			    - 0 for generation phase
- *			    - actual value for verification phase (expecting 0 result)
- *
- *
- *		-> For ESP tunnel, the original IP header exists between the end of the
- *		   ESP header and the beginning of the TCP header; it is assumed that the
- *		   maximum length of this header is 16 k(32bit)words (used in CkSum_Offset).
- *
- *
- *		-> The authentication data is merely written to the destination address;
- *		   the client is left with the task of comparing to the data in packet
- *		   in decrypt.
- *
- *              -> PacketDescriptor_t.dstLLWMask relevant to AES CTR mode only but it will
- *                 affect all AES-related operations. It will not affect DES/3DES/bypass ops.
- *                 The mask is applied to data as it emerges from the AES engine for the sole
- *                 purpose of providing the authenticator and cksum engines with correct data.
- *                 CAVEAT: the HW does not mask the incoming data. It is the user's responsibility
- *                 to set to 0 the corresponding data in memory. If the surplus data is not masked
- *                 in memory, cksum/auth results will be incorrect if those engines receive data
- *                 straight from memory (i.e., not from cipher, as it happens while decoding)
- */
-
-/*
- * Fragmentation and offset related notes
- * ======================================
- *
- *
- *      A) Rebuilding packets from fragments on dword boundaries. The discussion
- *         below is exemplified by tests memcpy_all_off_frags and memcpy_same_off_frags
- *
- *	        1) The Offset before data/iv on first fragment is ALWAYS written back
- *                 Non-zero dst dword or global offsets may cause more data to be
- *                 written than the user-specified length.
- *
- *
- *                 Example:
- *                 --------
- *
- *                 Below is a source (first fragment) packet (@ ADD0 cache-aligned address).
- *                 Assume we just copy it and relevant data starts on
- *                 dword 3 so Cipher_Offset = IV_Offset = 3 (dwords).
- *                 D0X denotes relevant data and G denotes dont care data.
- *                 Offset data is also copied so Packet_Legth = 9 (dwords) * 8 = 72 (bytes)
- *                 Segment_src_address = ADD0
- *
- *                 If we want to, e.g., copy so that the relevant (i.e., D0X) data
- *                 starts at (cache-aligned address) ADD1, we need to specify
- *                 Dst_dword_offset = 1 so D00 is moved from dword position 3 to 0 on next cache-line
- *                 Cipher_dst_address = ADD1 - 0x20 so D00 is written to ADD1
- *
- *                 Note that the security engine always writes full cachelines
- *                 therefore, data written to dword0 0 of ADD1 (denoted w/ ?) is what the sec pipe
- *                 write back buffer contained from previous op.
- *
- *
- *                      SOURCE:                                                 DESTINATION:
- *                      -------                                                 ------------
- *
- *                      Segment_src_address = ADD0                              Cipher_dst_address = ADD1 - 0x20
- *                      Packet_Legth        = 72                                Dst_dword_offset   = 1
- *                      Cipher_Offset       = 3
- *                      IV_Offset           = 3
- *                      Use_IV              = ANY
- *
- *
- *
- *                         3     2     1     0                                  3     2     1     0
- *                       -----------------------                              -----------------------
- *                      | D00 | G   | G   | G   | <- ADD0                    | G   | G   | G   | ?   | <- ADD1 - 0x20
- *                       -----------------------                              -----------------------
- *                      | D04 | D03 | D02 | D01 |                            | D03 | D02 | D01 | D00 | <- ADD1
- *                       -----------------------                              -----------------------
- *                      |     |     |     | D05 |                            |     |     | D05 | D04 |
- *                       -----------------------                              -----------------------
- *
- *	        2) On fragments following the first, IV_Offset is overloaded to mean data offset
- *                 (number of dwords to skip from beginning of cacheline before starting processing)
- *                 and Use_IV is overloaded to mean do writeback the offset (in the clear).
- *                 These fields in combination with Dst_dword_offset allow packet fragments with
- *                 arbitrary boundaries/lengthd to be reasembled.
- *
- *
- *                 Example:
- *                 --------
- *
- *                 Assume data above was first fragment of a packet we'd like to merge to
- *                 (second) fragment below located at ADD2. The written data should follow
- *                 the previous data without gaps or overwrites. To achieve this, one should
- *                 assert the "Next" field on the previous fragment and use self-explanatory
- *                 set of parameters below
- *
- *
- *                      SOURCE:                                                 DESTINATION:
- *                      -------                                                 ------------
- *
- *                      Segment_src_address = ADD2                              Cipher_dst_address = ADD1 + 0x20
- *                      Packet_Legth        = 104                               Dst_dword_offset   = 1
- *                      IV_Offset           = 1
- *                      Use_IV              = 0
- *
- *
- *
- *                         3     2     1     0                                  3     2     1     0
- *                       -----------------------                              -----------------------
- *                      | D12 | D11 | D10 | G   | <- ADD2                    | G   | G   | G   | ?   | <- ADD1 - 0x20
- *                       -----------------------                              -----------------------
- *                      | D16 | D15 | D14 | D13 |                            | D03 | D02 | D01 | D00 | <- ADD1
- *                       -----------------------                              -----------------------
- *                      | D1a | D19 | D18 | D17 |                            | D11 | D10 | D05 | D04 | <- ADD1 + 0x20
- *                       -----------------------                              -----------------------
- *                      |     |     |     | D1b |                            | D15 | D14 | D13 | D12 |
- *                       -----------------------                              -----------------------
- *                                                                           | D19 | D18 | D17 | D16 |
- *                                                                            -----------------------
- *                                                                           |     |     | D1b | D1a |
- *                                                                            -----------------------
- *
- *                 It is note-worthy that the merging can only be achieved if Use_IV is 0. Indeed, the security
- *                 engine always writes full lines, therefore ADD1 + 0x20 will be re-written. Setting Use_IV to 0
- *                 will allow the sec pipe write back buffer to preserve D04, D05 from previous frag and only
- *                 receive D10, D11 thereby preserving the integrity of the previous data.
- *
- *	        3) On fragments following the first, !UseIV in combination w/ Dst_dword_offset >= (4 - IV_Offset)
- *                 will cause a wraparound of the write thus achieving all 16 possible (Initial_Location, Final_Location)
- *                 combinations for the data.
- *
- *
- *                 Example:
- *                 --------
- *
- *                 Contiguously merging 2 data sets above with a third located at ADD3. If this is the last fragment,
- *                 reset its Next bit.
- *
- *
- *                      SOURCE:                                                 DESTINATION:
- *                      -------                                                 ------------
- *
- *                      Segment_src_address = ADD3                              Cipher_dst_address = ADD1 + 0x80
- *                      Packet_Legth        = 152                               Dst_dword_offset   = 3
- *                      IV_Offset           = 3
- *                      Use_IV              = 0
- *
- *
- *
- *                         3     2     1     0                                  3     2     1     0
- *                       -----------------------                              -----------------------
- *                      | D20 | G   | G   | G   | <- ADD2                    | G   | G   | G   | ?   | <- ADD1 - 0x20
- *                       -----------------------                              -----------------------
- *                      | D24 | D23 | D22 | D21 |                            | D03 | D02 | D01 | D00 | <- ADD1
- *                       -----------------------                              -----------------------
- *                      | D28 | D27 | D26 | D25 |                            | D11 | D10 | D05 | D04 | <- ADD1 + 0x20
- *                       -----------------------                              -----------------------
- *                      | D2c | D2b | D2a | D29 |                            | D15 | D14 | D13 | D12 |
- *                       -----------------------                              -----------------------
- *                      |     | D2f | D2e | D2d |                            | D19 | D18 | D17 | D16 |
- *                       -----------------------                              -----------------------
- *                                                                           | D21 | D20 | D1b | D1a | <- ADD1 + 0x80
- *                                                                            -----------------------
- *                                                                           | D25 | D24 | D23 | D22 |
- *                                                                            -----------------------
- *                                                                           | D29 | D28 | D27 | D26 |
- *                                                                            -----------------------
- *                                                                           | D2d | D2c | D2b | D2a |
- *                                                                            -----------------------
- *                                                                           |(D2d)|(D2c)| D2f | D2e |
- *                                                                            -----------------------
- *
- *                 It is worth noticing that always writing full-lines causes the last 2 dwords in the reconstituted
- *                 packet to be unnecessarily written: (D2d) and (D2c)
- *
- *
- *
- *      B) Implications of fragmentation on AES
- *
- *	        1) AES is a 128 bit block cipher; therefore it requires an even dword total data length
- *                 Data fragments (provided there are more than 1) are allowed to have odd dword
- *                 data lengths provided the total length (cumulated over fragments) is an even dword
- *                 count; an error will be generated otherwise, upon receiving the last fragment descriptor
- *                 (see error conditions below).
- *
- *              2) While using fragments with AES, a fragment (other than first) starting with a != 0 (IV) offset
- *                 while the subsequent total dword count given to AES is odd may not be required to write
- *                 its offset (UseIV). Doing so will cause an error (see error conditions below).
- *
- *
- *                 Example:
- *                 --------
- *
- *                 Suppose the first fragment has an odd DATA dword count and USES AES (as seen below)
- *
- *                      SOURCE:                                                 DESTINATION:
- *                      -------                                                 ------------
- *
- *                      Segment_src_address = ADD0                              Cipher_dst_address = ADD1
- *                      Packet_Legth        = 64                                Dst_dword_offset   = 1
- *                      Cipher_Offset       = 3
- *                      IV_Offset           = 1
- *                      Use_IV              = 1
- *                      Cipher              = Any AES
- *                      Next                = 1
- *
- *
- *
- *
- *                         3     2     1     0                                  3     2     1     0
- *                       -----------------------                              -----------------------
- *                      | D00 | IV1 | IV0 | G   | <- ADD0                    | E00 | IV1 | IV0 | G   | <- ADD1
- *                       -----------------------                              -----------------------
- *                      | D04 | D03 | D02 | D01 |                            | X   | E03 | E02 | E01 |
- *                       -----------------------                              -----------------------
- *
- *                 At the end of processing of the previous fragment, the AES engine input buffer has D04
- *                 and waits for next dword, therefore the writeback buffer cannot finish writing the fragment
- *                 to destination (X instead of E04).
- *
- *                 If a second fragment now arrives with a non-0 offset and requires the offset data to be
- *                 written to destination, the previous write (still needing the arrival of the last dword
- *                 required by the AES to complete the previous operation) cannot complete before the present
- *                 should start causing a deadlock.
- */
-
-/*
- *  Command Control Word for Message Ring Descriptor
- */
-
-/* #define MSG_CMD_CTL_CTL       */
-#define MSG_CMD_CTL_CTL_LSB   61
-#define MSG_CMD_CTL_CTL_BITS  THREE_BITS
-#define MSG_CMD_CTL_CTL_MASK  (MSG_CMD_CTL_CTL_BITS << MSG_CMD_CTL_CTL_LSB)
-
-/* #define MSG_CMD_CTL_ID */
-#define MSG_CMD_CTL_ID_LSB    54
-#define MSG_CMD_CTL_ID_BITS   SEVEN_BITS
-#define MSG_CMD_CTL_ID_MASK   (MSG_CMD_CTL_ID_BITS << MSG_CMD_CTL_ID_LSB)
-
-/* #define MSG_CMD_CTL_LEN */
-#define MSG_CMD_CTL_LEN_LSB   45
-#define MSG_CMD_CTL_LEN_BITS  FOUR_BITS
-#define MSG_CMD_CTL_LEN_MASK  (MSG_CMD_CTL_LEN_BITS << MSG_CMD_CTL_LEN_LSB)
-
-
-/* #define MSG_CMD_CTL_ADDR */
-#define MSG_CMD_CTL_ADDR_LSB  0
-#define MSG_CMD_CTL_ADDR_BITS FOURTY_BITS
-#define MSG_CMD_CTL_ADDR_MASK (MSG_CMD_CTL_ADDR_BITS << MSG_CMD_CTL_ADDR_LSB)
-
-#define MSG_CMD_CTL_MASK      (MSG_CMD_CTL_CTL_MASK | \
-                               MSG_CMD_CTL_LEN_MASK | MSG_CMD_CTL_ADDR_MASK)
-
-/*
- *  Command Data Word for Message Ring Descriptor
- */
-
-/* #define MSG_IN_DATA_CTL */
-#define MSG_CMD_DATA_CTL_LSB   61
-#define MSG_CMD_DATA_CTL_BITS  THREE_BITS
-#define MSG_CMD_DATA_CTL_MASK  (MSG_CMD_DATA_CTL_BITS  << MSG_CMD_DATA_CTL_LSB)
-
-/* #define MSG_CMD_DATA_LEN */
-#define MSG_CMD_DATA_LEN_LOAD  1
-#define MSG_CMD_DATA_LEN_LSB   45
-#define MSG_CMD_DATA_LEN_BITS  ONE_BIT
-#define MSG_CMD_DATA_LEN_MASK  (MSG_CMD_DATA_LEN_BITS << MSG_CMD_DATA_LEN_LSB)
-
-/* #define MSG_CMD_DATA_ADDR */
-#define MSG_CMD_DATA_ADDR_LSB  0
-#define MSG_CMD_DATA_ADDR_BITS FOURTY_BITS
-#define MSG_CMD_DATA_ADDR_MASK (MSG_CMD_DATA_ADDR_BITS << MSG_CMD_DATA_ADDR_LSB)
-
-#define MSG_CMD_DATA_MASK      (MSG_CMD_DATA_CTL_MASK | \
-                               MSG_CMD_DATA_LEN_MASK | MSG_CMD_DATA_ADDR_MASK)
-
-
-/*
- * Upon completion of operation, the Sec block returns a 2-word free descriptor
- * in the following format:
- *
- *  63  61 60            54 53   52 51       49  48          40 39             0
- *  ----------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Control Error | Source Address |
- *  ----------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl |   Data Error  | Dest Address   |
- *  ----------------------------------------------------------------------------
- *
- * The Control and Data Error codes are enumerated below
- *
- *                                Error conditions
- *                                ================
- *
- *             Control Error Code                  Control Error Condition
- *             ------------------                  ---------------------------
- *             9'h000                              No Error
- *             9'h001                              Unknown Cipher Op                      ( Cipher == 3'h{6,7})
- *             9'h002                              Unknown or Illegal Mode                ((Mode   == 3'h{2,3,4} & !AES) | (Mode   == 3'h{5,6,7}))
- *             9'h004                              Unsupported CkSum Src                  (CkSum_Src   == 2'h{2,3} & CKSUM)
- *             9'h008                              Forbidden CFB Mask                     (AES & CFBMode & UseNewKeysCFBMask & CFBMask[7] & (| CFBMask[6:0]))
- *             9'h010                              Unknown Ctrl Op                        ((| Ctrl[63:37]) | (| Ctrl[15:14]))
- *             9'h020                              UNUSED
- *             9'h040                              UNUSED
- *             9'h080                              Data Read Error
- *             9'h100                              Descriptor Ctrl Field Error            (D0.Ctrl != SOP || D1.Ctrl != EOP)
- *
- *             Data Error Code                     Data Error Condition
- *             ---------------                     --------------------
- *             9'h000                              No Error
- *             9'h001                              Insufficient Data To Cipher            (Packet_Length <= (Cipher_Offset or IV_Offset))
- *             9'h002                              Illegal IV Location                    ((Cipher_Offset <  IV_Offset) | (Cipher_Offset <= IV_Offset & AES & ~CTR))
- *             9'h004                              Illegal Wordcount To AES               (Packet_Length[3] != Cipher_Offset[0] & AES)
- *             9'h008                              Illegal Pad And ByteCount Spec         (Hash_Byte_Count != 0 & !Pad_Hash)
- *             9'h010                              Insufficient Data To CkSum             ({Packet_Length, 1'b0} <= CkSum_Offset)
- *             9'h020                              Unknown Data Op                        ((| dstLLWMask[63:60]) | (| dstLLWMask[57:40]) | (| authDst[63:40]) | (| ckSumDst[63:40]))
- *             9'h040                              Insufficient Data To Auth              ({Packet_Length} <= Auth_Offset)
- *             9'h080                              Data Read Error
- *             9'h100                              UNUSED
- */
-
-/*
- * Result Control Word for Message Ring Descriptor
- */
-
-/* #define MSG_RSLT_CTL_CTL */
-#define MSG_RSLT_CTL_CTL_LSB      61
-#define MSG_RSLT_CTL_CTL_BITS     THREE_BITS
-#define MSG_RSLT_CTL_CTL_MASK \
- (MSG_RSLT_CTL_CTL_BITS << MSG_RSLT_CTL_CTL_LSB)
-
-/* #define MSG_RSLT_CTL_DST_ID */
-#define MSG_RSLT_CTL_DST_ID_LSB   54
-#define MSG_RSLT_CTL_DST_ID_BITS  SEVEN_BITS
-#define MSG_RSLT_CTL_DST_ID_MASK \
- (MSG_RSLT_CTL_DST_ID_BITS << MSG_RSLT_CTL_DST_ID_LSB)
-
-/* #define MSG_RSLT_CTL_DSC_CTL */
-#define MSG_RSLT_CTL_DSC_CTL_LSB  49
-#define MSG_RSLT_CTL_DSC_CTL_BITS THREE_BITS
-#define MSG_RSLT_CTL_DSC_CTL_MASK \
- (MSG_RSLT_CTL_DSC_CTL_BITS << MSG_RSLT_CTL_DSC_CTL_LSB)
-
-/* #define MSG_RSLT_CTL_INST_ERR */
-#define MSG_RSLT_CTL_INST_ERR_LSB      40
-#define MSG_RSLT_CTL_INST_ERR_BITS     NINE_BITS
-#define MSG_RSLT_CTL_INST_ERR_MASK \
- (MSG_RSLT_CTL_INST_ERR_BITS << MSG_RSLT_CTL_INST_ERR_LSB)
-
-/* #define MSG_RSLT_CTL_DSC_ADDR */
-#define MSG_RSLT_CTL_DSC_ADDR_LSB      0
-#define MSG_RSLT_CTL_DSC_ADDR_BITS     FOURTY_BITS
-#define MSG_RSLT_CTL_DSC_ADDR_MASK \
- (MSG_RSLT_CTL_DSC_ADDR_BITS << MSG_RSLT_CTL_DSC_ADDR_LSB)
-
-/* #define MSG_RSLT_CTL_MASK */
-#define MSG_RSLT_CTL_MASK \
- (MSG_RSLT_CTL_CTRL_MASK | MSG_RSLT_CTL_DST_ID_MASK | \
-  MSG_RSLT_CTL_DSC_CTL_MASK | MSG_RSLT_CTL_INST_ERR_MASK | \
-  MSG_RSLT_CTL_DSC_ADDR_MASK)
-
-/*
- * Result Data Word for Message Ring Descriptor
- */
-/* #define MSG_RSLT_DATA_CTL */
-#define MSG_RSLT_DATA_CTL_LSB     61
-#define MSG_RSLT_DATA_CTL_BITS    THREE_BITS
-#define MSG_RSLT_DATA_CTL_MASK \
- (MSG_RSLT_DATA_CTL_BITS << MSG_RSLT_DATA_CTL_LSB)
-
-/* #define MSG_RSLT_DATA_DST_ID */
-#define MSG_RSLT_DATA_DST_ID_LSB  54
-#define MSG_RSLT_DATA_DST_ID_BITS SEVEN_BITS
-#define MSG_RSLT_DATA_DST_ID_MASK \
- (MSG_RSLT_DATA_DST_ID_BITS << MSG_RSLT_DATA_DST_ID_LSB)
-
-/* #define MSG_RSLT_DATA_DSC_CTL */
-#define MSG_RSLT_DATA_DSC_CTL_LSB       49
-#define MSG_RSLT_DATA_DSC_CTL_BITS      THREE_BITS
-#define MSG_RSLT_DATA_DSC_CTL_MASK \
- (MSG_RSLT_DATA_DSC_CTL_BITS << MSG_RSLT_DATA_DSC_CTL_LSB)
-
-/* #define MSG_RSLT_DATA_INST_ERR */
-#define MSG_RSLT_DATA_INST_ERR_LSB      40
-#define MSG_RSLT_DATA_INST_ERR_BITS     NINE_BITS
-#define MSG_RSLT_DATA_INST_ERR_MASK \
- (MSG_RSLT_DATA_INST_ERR_BITS << MSG_RSLT_DATA_INST_ERR_LSB)
-
-/* #define MSG_RSLT_DATA_DSC_ADDR */
-#define MSG_RSLT_DATA_DSC_ADDR_LSB      0
-#define MSG_RSLT_DATA_DSC_ADDR_BITS     FOURTY_BITS
-#define MSG_RSLT_DATA_DSC_ADDR_MASK     \
- (MSG_RSLT_DATA_DSC_ADDR_BITS << MSG_RSLT_DATA_DSC_ADDR_LSB)
-
-#define MSG_RSLT_DATA_MASK   \
- (MSG_RSLT_DATA_CTRL_MASK | MSG_RSLT_DATA_DST_ID_MASK | \
-  MSG_RSLT_DATA_DSC_CTL_MASK | MSG_RSLT_DATA_INST_ERR_MASK | \
-  MSG_RSLT_DATA_DSC_ADDR_MASK)
-
-
-/*
- * Common Message Definitions
- *
- */
-
-/* #define MSG_CTL_OP_ADDR */
-#define MSG_CTL_OP_ADDR_LSB      0
-#define MSG_CTL_OP_ADDR_BITS     FOURTY_BITS
-#define MSG_CTL_OP_ADDR_MASK     (MSG_CTL_OP_ADDR_BITS << MSG_CTL_OP_ADDR_LSB)
-
-#define MSG_CTL_OP_TYPE
-#define MSG_CTL_OP_TYPE_LSB             3
-#define MSG_CTL_OP_TYPE_BITS            TWO_BITS
-#define MSG_CTL_OP_TYPE_MASK            \
- (MSG_CTL_OP_TYPE_BITS << MSG_CTL_OP_TYPE_LSB)
-
-#define MSG0_CTL_OP_ENGINE_SYMKEY       0x01
-#define MSG0_CTL_OP_ENGINE_PUBKEY       0x02
-
-#define MSG1_CTL_OP_SYMKEY_PIPE0        0x00
-#define MSG1_CTL_OP_SYMKEY_PIPE1        0x01
-#define MSG1_CTL_OP_SYMKEY_PIPE2        0x02
-#define MSG1_CTL_OP_SYMKEY_PIPE3        0x03
-
-#define MSG1_CTL_OP_PUBKEY_PIPE0        0x00
-#define MSG1_CTL_OP_PUBKEY_PIPE1        0x01
-#define MSG1_CTL_OP_PUBKEY_PIPE2        0x02
-#define MSG1_CTL_OP_PUBKEY_PIPE3        0x03
-
-
-/*       /----------------------------------------\
- *       |                                        |
- *       |   ControlDescriptor_s datastructure    |
- *       |                                        |
- *       \----------------------------------------/
- *
- *
- *       ControlDescriptor_t.Instruction
- *       -------------------------------
- *
- *   63    44         43               42            41              40           39        35 34    32 31  29     28
- *  --------------------------------------------------------------------------------------------------------------------
- * || UNUSED || OverrideCipher | Arc4Wait4Save | SaveArc4State | LoadArc4State | Arc4KeyLen | Cipher | Mode | InCp_Key || ... CONT ...
- *  --------------------------------------------------------------------------------------------------------------------
- *      20            1                1              1               1               5          3       3        1
- *            <-----------------------------------------------CIPHER--------------------------------------------------->
- *
- *   27    25     24      23   22     21     20      19    17    16     15     0
- *  -----------------------------------------------------------------------------
- * || UNUSED | Hash_Hi | HMAC | Hash_Lo | InHs_Key || UNUSED || CkSum || UNUSED ||
- *  -----------------------------------------------------------------------------
- *      3         1       1        2         1          3        1        16
- *  <---------------------HASH---------------------><-----------CKSUM----------->
- *
- *  X0  CIPHER.Arc4Wait4Save   =                   If op is Arc4 and it requires state saving, then
- *                                                 setting this bit will cause the current op to
- *                                                 delay subsequent op loading until saved state data
- *                                                 becomes visible.
- *      CIPHER.OverrideCipher  =                   Override encryption if PacketDescriptor_t.dstDataSettings.CipherPrefix
- *                                                 is set; data will be copied out (and optionally auth/cksum)
- *                                                 in the clear. This is used in GCM mode if auth only as we
- *                                                 still need E(K, 0) calculated by cipher. Engine behavior is
- *                                                 undefined if this bit is set and CipherPrefix is not.
- *  X0         SaveArc4State   =                   Save Arc4 state at the end of Arc4 operation
- *  X0         LoadArc4State   =                   Load Arc4 state at the beginning of an Arc4 operation
- *                                                 This overriden by the InCp_Key setting for Arc4
- *             Arc4KeyLen      =                   Length in bytes of Arc4 key (0 is interpreted as 32)
- *                                                 Ignored for other ciphers
- *                                                 For ARC4, IFetch/IDecode will always read exactly 4
- *                                                 consecutive dwords into its CipherKey{0,3} regardless
- *                                                 of this quantity; it will however only use the specified
- *                                                 number of bytes.
- *             Cipher          =        3'b000     Bypass
- *                                      3'b001     DES
- *                                      3'b010     3DES
- *                                      3'b011     AES 128-bit key
- *                                      3'b100     AES 192-bit key
- *                                      3'b101     AES 256-bit key
- *                                      3'b110     ARC4
- *                                      3'b111     Kasumi f8
- *                                      Remainder  UNDEFINED
- *             Mode            =        3'b000     ECB
- *                                      3'b001     CBC
- *                                      3'b010     CFB (AES only, otherwise undefined)
- *                                      3'b011     OFB (AES only, otherwise undefined)
- *                                      3'b100     CTR (AES only, otherwise undefined)
- *                                      3'b101     F8  (AES only, otherwise undefined)
- *                                      Remainder  UNDEFINED
- *             InCp_Key        =        1'b0       Preserve old Cipher Keys
- *                                      1'b1       Load new Cipher Keys from memory to local registers
- *                                                 and recalculate the Arc4 Sbox if Arc4 Cipher chosen;
- *                                                 This overrides LoadArc4State setting.
- *        HASH.HMAC            =        1'b0       Hash without HMAC
- *                                      1'b1       Hash with HMAC
- *                                                 Needs to be set to 0 for GCM and Kasumi F9 authenticators
- *                                                 otherwise unpredictable results will be generated
- *             Hash            =        2'b00      Hash NOP
- *                                      2'b01      MD5
- *                                      2'b10      SHA-1
- *                                      2'b11      SHA-256
- *                                      3'b100     SHA-384
- *                                      3'b101     SHA-512
- *                                      3'b110     GCM
- *                                      3'b111     Kasumi f9
- *             InHs_Key        =        1'b0       Preserve old HMAC Keys
- *                                                 If GCM is selected as authenticator, leaving this bit
- *                                                 at 0 will cause the engine to use the old H value.
- *                                                 It will use the old SCI inside the decoder if
- *                                                 CFBMask[1:0] == 2'b11.
- *                                                 If Kasumi F9 authenticator, using 0 preserves
- *                                                 old keys (IK) in decoder.
- *                                      1'b1       Load new HMAC Keys from memory to local registers
- *                                                 Setting this bit while Cipher=Arc4 and LoadArc4State=1
- *                                                 causes the decoder to load the Arc4 state from the
- *                                                 cacheline following the HMAC keys (Whether HASH.HMAC
- *                                                 is set or not).
- *                                                 If GCM is selected as authenticator, setting this bit
- *                                                 causes both H (16 bytes) and SCI (8 bytes) to be loaded
- *                                                 from memory to the decoder. H will be loaded to the engine
- *                                                 but SCI is only loaded to the engine if CFBMask[1:0] == 2'b11.
- *                                                 If Kasumi F9 authenticator, using 1 loads new keys (IK)
- *                                                 from memory to decoder.
- *    CHECKSUM.CkSum           =        1'b0       CkSum NOP
- *                                      1'b1       INTERNET_CHECKSUM
- *
- *
- *
- */
-
- /* #define CTRL_DSC_OVERRIDECIPHER */
-#define CTL_DSC_OVERRIDECIPHER_OFF       0
-#define CTL_DSC_OVERRIDECIPHER_ON        1
-#define CTL_DSC_OVERRIDECIPHER_LSB       43
-#define CTL_DSC_OVERRIDECIPHER_BITS      ONE_BIT
-#define CTL_DSC_OVERRIDECIPHER_MASK      (CTL_DSC_OVERRIDECIPHER_BITS << CTL_DSC_OVERRIDECIPHER_LSB)
-
-/* #define CTRL_DSC_ARC4_WAIT4SAVE */
-#define CTL_DSC_ARC4_WAIT4SAVE_OFF       0
-#define CTL_DSC_ARC4_WAIT4SAVE_ON        1
-#define CTL_DSC_ARC4_WAIT4SAVE_LSB       42
-#define CTL_DSC_ARC4_WAIT4SAVE_BITS      ONE_BIT
-#define CTL_DSC_ARC4_WAIT4SAVE_MASK      (CTL_DSC_ARC4_WAIT4SAVE_BITS << CTL_DSC_ARC4_WAIT4SAVE_LSB)
-
-/* #define CTRL_DSC_ARC4_SAVESTATE */
-#define CTL_DSC_ARC4_SAVESTATE_OFF       0
-#define CTL_DSC_ARC4_SAVESTATE_ON        1
-#define CTL_DSC_ARC4_SAVESTATE_LSB       41
-#define CTL_DSC_ARC4_SAVESTATE_BITS      ONE_BIT
-#define CTL_DSC_ARC4_SAVESTATE_MASK      (CTL_DSC_ARC4_SAVESTATE_BITS << CTL_DSC_ARC4_SAVESTATE_LSB)
-
-/* #define CTRL_DSC_ARC4_LOADSTATE */
-#define CTL_DSC_ARC4_LOADSTATE_OFF       0
-#define CTL_DSC_ARC4_LOADSTATE_ON        1
-#define CTL_DSC_ARC4_LOADSTATE_LSB       40
-#define CTL_DSC_ARC4_LOADSTATE_BITS      ONE_BIT
-#define CTL_DSC_ARC4_LOADSTATE_MASK      (CTL_DSC_ARC4_LOADSTATE_BITS << CTL_DSC_ARC4_LOADSTATE_LSB)
-
-/* #define CTRL_DSC_ARC4_KEYLEN */
-#define CTL_DSC_ARC4_KEYLEN_LSB          35
-#define CTL_DSC_ARC4_KEYLEN_BITS         FIVE_BITS
-#define CTL_DSC_ARC4_KEYLEN_MASK         (CTL_DSC_ARC4_KEYLEN_BITS << CTL_DSC_ARC4_KEYLEN_LSB)
-
-/* #define CTL_DSC_CPHR  (cipher) */
-#define CTL_DSC_CPHR_BYPASS       0	/* undefined */
-#define CTL_DSC_CPHR_DES          1
-#define CTL_DSC_CPHR_3DES         2
-#define CTL_DSC_CPHR_AES128       3
-#define CTL_DSC_CPHR_AES192       4
-#define CTL_DSC_CPHR_AES256       5
-#define CTL_DSC_CPHR_ARC4         6
-#define CTL_DSC_CPHR_KASUMI_F8    7
-#define CTL_DSC_CPHR_LSB          32
-#define CTL_DSC_CPHR_BITS         THREE_BITS
-#define CTL_DSC_CPHR_MASK         (CTL_DSC_CPHR_BITS << CTL_DSC_CPHR_LSB)
-
-/* #define CTL_DSC_MODE  */
-#define CTL_DSC_MODE_ECB          0
-#define CTL_DSC_MODE_CBC          1
-#define CTL_DSC_MODE_CFB          2
-#define CTL_DSC_MODE_OFB          3
-#define CTL_DSC_MODE_CTR          4
-#define CTL_DSC_MODE_F8           5
-#define CTL_DSC_MODE_LSB          29
-#define CTL_DSC_MODE_BITS         THREE_BITS
-#define CTL_DSC_MODE_MASK         (CTL_DSC_MODE_BITS << CTL_DSC_MODE_LSB)
-
-/* #define CTL_DSC_ICPHR */
-#define CTL_DSC_ICPHR_OKY          0	/* Old Keys */
-#define CTL_DSC_ICPHR_NKY          1	/* New Keys */
-#define CTL_DSC_ICPHR_LSB          28
-#define CTL_DSC_ICPHR_BITS         ONE_BIT
-#define CTL_DSC_ICPHR_MASK         (CTL_DSC_ICPHR_BITS << CTL_DSC_ICPHR_LSB)
-
-/* #define CTL_DSC_HASHHI */
-#define CTL_DSC_HASHHI_LSB          24
-#define CTL_DSC_HASHHI_BITS         ONE_BIT
-#define CTL_DSC_HASHHI_MASK         (CTL_DSC_HASHHI_BITS << CTL_DSC_HASHHI_LSB)
-
-/* #define CTL_DSC_HMAC */
-#define CTL_DSC_HMAC_OFF          0
-#define CTL_DSC_HMAC_ON           1
-#define CTL_DSC_HMAC_LSB          23
-#define CTL_DSC_HMAC_BITS         ONE_BIT
-#define CTL_DSC_HMAC_MASK         (CTL_DSC_HMAC_BITS << CTL_DSC_HMAC_LSB)
-
-/* #define CTL_DSC_HASH */
-#define CTL_DSC_HASH_NOP          0
-#define CTL_DSC_HASH_MD5          1
-#define CTL_DSC_HASH_SHA1         2
-#define CTL_DSC_HASH_SHA256       3
-#define CTL_DSC_HASH_SHA384       4
-#define CTL_DSC_HASH_SHA512       5
-#define CTL_DSC_HASH_GCM          6
-#define CTL_DSC_HASH_KASUMI_F9    7
-#define CTL_DSC_HASH_LSB          21
-#define CTL_DSC_HASH_BITS         TWO_BITS
-#define CTL_DSC_HASH_MASK         (CTL_DSC_HASH_BITS << CTL_DSC_HASH_LSB)
-
-/* #define CTL_DSC_IHASH */
-#define CTL_DSC_IHASH_OLD         0
-#define CTL_DSC_IHASH_NEW         1
-#define CTL_DSC_IHASH_LSB         20
-#define CTL_DSC_IHASH_BITS        ONE_BIT
-#define CTL_DSC_IHASH_MASK        (CTL_DSC_IHASH_BITS << CTL_DSC_IHASH_LSB)
-
-/* #define CTL_DSC_CKSUM */
-#define CTL_DSC_CKSUM_NOP         0
-#define CTL_DSC_CKSUM_IP          1
-#define CTL_DSC_CKSUM_LSB         16
-#define CTL_DSC_CKSUM_BITS        ONE_BIT
-#define CTL_DSC_CKSUM_MASK        (CTL_DSC_CKSUM_BITS << CTL_DSC_CKSUM_LSB)
-
-
-/*
- * Component strcts and unions defining CipherHashInfo_u
- */
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-256)      - 96  bytes */
-typedef struct AES256HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}            AES256HMAC_t, *AES256HMAC_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-512)      - 160  bytes */
-typedef struct AES256HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}             AES256HMAC2_t, *AES256HMAC2_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), GCM      - 56  bytes */
-typedef struct AES256GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}           AES256GCM_t, *AES256GCM_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), F9      - 56  bytes */
-typedef struct AES256F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}          AES256F9_t, *AES256F9_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-256)  - 32  bytes */
-typedef struct AES256_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-}        AES256_t, *AES256_pt;
-
-
-/* All AES192 possibilities */
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-192)      - 88  bytes */
-typedef struct AES192HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}            AES192HMAC_t, *AES192HMAC_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-512)      - 152  bytes */
-typedef struct AES192HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}             AES192HMAC2_t, *AES192HMAC2_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), GCM      - 48  bytes */
-typedef struct AES192GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}           AES192GCM_t, *AES192GCM_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), F9      - 48  bytes */
-typedef struct AES192F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}          AES192F9_t, *AES192F9_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-192)  - 24  bytes */
-typedef struct AES192_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-}        AES192_t, *AES192_pt;
-
-
-/* All AES128 possibilities */
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-128)      - 80  bytes */
-typedef struct AES128HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}            AES128HMAC_t, *AES128HMAC_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-612)      - 144  bytes */
-typedef struct AES128HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}             AES128HMAC2_t, *AES128HMAC2_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), GCM      - 40  bytes */
-typedef struct AES128GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}           AES128GCM_t, *AES128GCM_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), F9      - 48  bytes */
-typedef struct AES128F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}          AES128F9_t, *AES128F9_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-128)  - 16  bytes */
-typedef struct AES128_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-}        AES128_t, *AES128_pt;
-
-/* AES128, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256)  - 32  bytes */
-typedef struct AES128F8_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-}          AES128F8_t, *AES128F8_pt;
-
-/* AES128, (OFB F8), HMAC (MD5, SHA-1, SHA-256)  - 96  bytes */
-typedef struct AES128F8HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}              AES128F8HMAC_t, *AES128F8HMAC_pt;
-
-/* AES128, (OFB F8), HMAC (SHA-384, SHA-512)  - 160  bytes */
-typedef struct AES128F8HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}               AES128F8HMAC2_t, *AES128F8HMAC2_pt;
-
-/* AES192, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256)  - 48  bytes */
-typedef struct AES192F8_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-}          AES192F8_t, *AES192F8_pt;
-
-/* AES192, (OFB F8), HMAC (MD5, SHA-1, SHA-256)  - 112 bytes */
-typedef struct AES192F8HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}              AES192F8HMAC_t, *AES192F8HMAC_pt;
-
-/* AES192, (OFB F8), HMAC (SHA-384, SHA-512)  - 176 bytes */
-typedef struct AES192F8HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}               AES192F8HMAC2_t, *AES192F8HMAC2_pt;
-
-/* AES256, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256)  - 64  bytes */
-typedef struct AES256F8_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-	uint64_t cipherKeyMask3;
-}          AES256F8_t, *AES256F8_pt;
-
-/* AES256, (OFB F8), HMAC (MD5, SHA-1, SHA-256)  - 128  bytes */
-typedef struct AES256F8HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-	uint64_t cipherKeyMask3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}              AES256F8HMAC_t, *AES256F8HMAC_pt;
-
-/* AES256, (OFB F8), HMAC (SHA-384, SHA-512)  - 192  bytes */
-typedef struct AES256F8HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t cipherKeyMask0;
-	uint64_t cipherKeyMask1;
-	uint64_t cipherKeyMask2;
-	uint64_t cipherKeyMask3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}               AES256F8HMAC2_t, *AES256F8HMAC2_pt;
-
-/* AES256, (F8), GCM      - 40  bytes */
-typedef struct AES128F8GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey2;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}             AES128F8GCM_t, *AES128F8GCM_pt;
-
-/* AES256, (F8), GCM      - 48  bytes */
-typedef struct AES192F8GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}             AES192F8GCM_t, *AES192F8GCM_pt;
-
-/* AES256, (F8), GCM      - 56  bytes */
-typedef struct AES256F8GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}             AES256F8GCM_t, *AES256F8GCM_pt;
-
-/* AES256, (F8), F9      - 40  bytes */
-typedef struct AES128F8F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey2;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}            AES128F8F9_t, *AES128F8F9_pt;
-
-/* AES256, (F8), F9      - 48  bytes */
-typedef struct AES192F8F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}            AES192F8F9_t, *AES192F8F9_pt;
-
-/* AES256F8, (F8), F9      - 56  bytes */
-typedef struct AES256F8F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}            AES256F8F9_t, *AES256F8F9_pt;
-
-/* All DES possibilities */
-
-/* DES, (ECB, CBC), HMAC (MD5, SHA-1, SHA-128)              - 72  bytes */
-typedef struct DESHMAC_s {
-	uint64_t cipherKey0;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}         DESHMAC_t, *DESHMAC_pt;
-
-/* DES, (ECB, CBC), HMAC (SHA-384, SHA-512)              - 136  bytes */
-typedef struct DESHMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}          DESHMAC2_t, *DESHMAC2_pt;
-
-/* DES, (ECB, CBC), GCM              - 32  bytes */
-typedef struct DESGCM_s {
-	uint64_t cipherKey0;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}        DESGCM_t, *DESGCM_pt;
-
-/* DES, (ECB, CBC), F9              - 32  bytes */
-typedef struct DESF9_s {
-	uint64_t cipherKey0;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}       DESF9_t, *DESF9_pt;
-
-/* DES, (ECB, CBC), Non-HMAC (MD5, SHA-1, SHA-128)          - 9   bytes */
-typedef struct DES_s {
-	uint64_t cipherKey0;
-}     DES_t, *DES_pt;
-
-
-/* All 3DES possibilities */
-
-/* 3DES, (ECB, CBC), HMAC (MD5, SHA-1, SHA-128)             - 88  bytes */
-typedef struct DES3HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}          DES3HMAC_t, *DES3HMAC_pt;
-
-/* 3DES, (ECB, CBC), HMAC (SHA-384, SHA-512)             - 152  bytes */
-typedef struct DES3HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}           DES3HMAC2_t, *DES3HMAC2_pt;
-
-/* 3DES, (ECB, CBC), GCM             - 48  bytes */
-typedef struct DES3GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}         DES3GCM_t, *DES3GCM_pt;
-
-/* 3DES, (ECB, CBC), GCM             - 48  bytes */
-typedef struct DES3F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}        DES3F9_t, *DES3F9_pt;
-
-/* 3DES, (ECB, CBC), Non-HMAC (MD5, SHA-1, SHA-128)         - 24  bytes */
-typedef struct DES3_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-}      DES3_t, *DES3_pt;
-
-
-/* HMAC only - no cipher */
-
-/* HMAC (MD5, SHA-1, SHA-128)                               - 64  bytes */
-typedef struct HMAC_s {
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}      HMAC_t, *HMAC_pt;
-
-/* HMAC (SHA-384, SHA-512)                               - 128  bytes */
-typedef struct HMAC2_s {
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}       HMAC2_t, *HMAC2_pt;
-
-/* GCM                               - 24  bytes */
-typedef struct GCM_s {
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}     GCM_t, *GCM_pt;
-
-/* F9                               - 24  bytes */
-typedef struct F9_s {
-	uint64_t authKey0;
-	uint64_t authKey1;
-}    F9_t, *F9_pt;
-
-/* All ARC4 possibilities */
-/* ARC4, HMAC (MD5, SHA-1, SHA-256)      - 96 bytes */
-typedef struct ARC4HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}          ARC4HMAC_t, *ARC4HMAC_pt;
-
-/* ARC4, HMAC (SHA-384, SHA-512)      - 160 bytes */
-typedef struct ARC4HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}           ARC4HMAC2_t, *ARC4HMAC2_pt;
-
-/* ARC4, GCM      - 56 bytes */
-typedef struct ARC4GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}         ARC4GCM_t, *ARC4GCM_pt;
-
-/* ARC4, F9      - 56 bytes */
-typedef struct ARC4F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}        ARC4F9_t, *ARC4F9_pt;
-
-/* ARC4, HMAC (MD5, SHA-1, SHA-256)      - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateHMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t PAD0;
-	uint64_t PAD1;
-	uint64_t PAD2;
-	uint64_t Arc4SboxData0;
-	uint64_t Arc4SboxData1;
-	uint64_t Arc4SboxData2;
-	uint64_t Arc4SboxData3;
-	uint64_t Arc4SboxData4;
-	uint64_t Arc4SboxData5;
-	uint64_t Arc4SboxData6;
-	uint64_t Arc4SboxData7;
-	uint64_t Arc4SboxData8;
-	uint64_t Arc4SboxData9;
-	uint64_t Arc4SboxData10;
-	uint64_t Arc4SboxData11;
-	uint64_t Arc4SboxData12;
-	uint64_t Arc4SboxData13;
-	uint64_t Arc4SboxData14;
-	uint64_t Arc4SboxData15;
-	uint64_t Arc4SboxData16;
-	uint64_t Arc4SboxData17;
-	uint64_t Arc4SboxData18;
-	uint64_t Arc4SboxData19;
-	uint64_t Arc4SboxData20;
-	uint64_t Arc4SboxData21;
-	uint64_t Arc4SboxData22;
-	uint64_t Arc4SboxData23;
-	uint64_t Arc4SboxData24;
-	uint64_t Arc4SboxData25;
-	uint64_t Arc4SboxData26;
-	uint64_t Arc4SboxData27;
-	uint64_t Arc4SboxData28;
-	uint64_t Arc4SboxData29;
-	uint64_t Arc4SboxData30;
-	uint64_t Arc4SboxData31;
-	uint64_t Arc4IJData;
-	uint64_t PAD3;
-	uint64_t PAD4;
-	uint64_t PAD5;
-}               ARC4StateHMAC_t, *ARC4StateHMAC_pt;
-
-/* ARC4, HMAC (SHA-384, SHA-512)      - 480 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateHMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-	uint64_t PAD0;
-	uint64_t PAD1;
-	uint64_t PAD2;
-	uint64_t Arc4SboxData0;
-	uint64_t Arc4SboxData1;
-	uint64_t Arc4SboxData2;
-	uint64_t Arc4SboxData3;
-	uint64_t Arc4SboxData4;
-	uint64_t Arc4SboxData5;
-	uint64_t Arc4SboxData6;
-	uint64_t Arc4SboxData7;
-	uint64_t Arc4SboxData8;
-	uint64_t Arc4SboxData9;
-	uint64_t Arc4SboxData10;
-	uint64_t Arc4SboxData11;
-	uint64_t Arc4SboxData12;
-	uint64_t Arc4SboxData13;
-	uint64_t Arc4SboxData14;
-	uint64_t Arc4SboxData15;
-	uint64_t Arc4SboxData16;
-	uint64_t Arc4SboxData17;
-	uint64_t Arc4SboxData18;
-	uint64_t Arc4SboxData19;
-	uint64_t Arc4SboxData20;
-	uint64_t Arc4SboxData21;
-	uint64_t Arc4SboxData22;
-	uint64_t Arc4SboxData23;
-	uint64_t Arc4SboxData24;
-	uint64_t Arc4SboxData25;
-	uint64_t Arc4SboxData26;
-	uint64_t Arc4SboxData27;
-	uint64_t Arc4SboxData28;
-	uint64_t Arc4SboxData29;
-	uint64_t Arc4SboxData30;
-	uint64_t Arc4SboxData31;
-	uint64_t Arc4IJData;
-	uint64_t PAD3;
-	uint64_t PAD4;
-	uint64_t PAD5;
-}                ARC4StateHMAC2_t, *ARC4StateHMAC2_pt;
-
-/* ARC4, GCM      - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateGCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-	uint64_t PAD0;
-	uint64_t PAD1;
-	uint64_t PAD2;
-	uint64_t PAD3;
-	uint64_t PAD4;
-	uint64_t PAD5;
-	uint64_t PAD6;
-	uint64_t PAD7;
-	uint64_t Arc4SboxData0;
-	uint64_t Arc4SboxData1;
-	uint64_t Arc4SboxData2;
-	uint64_t Arc4SboxData3;
-	uint64_t Arc4SboxData4;
-	uint64_t Arc4SboxData5;
-	uint64_t Arc4SboxData6;
-	uint64_t Arc4SboxData7;
-	uint64_t Arc4SboxData8;
-	uint64_t Arc4SboxData9;
-	uint64_t Arc4SboxData10;
-	uint64_t Arc4SboxData11;
-	uint64_t Arc4SboxData12;
-	uint64_t Arc4SboxData13;
-	uint64_t Arc4SboxData14;
-	uint64_t Arc4SboxData15;
-	uint64_t Arc4SboxData16;
-	uint64_t Arc4SboxData17;
-	uint64_t Arc4SboxData18;
-	uint64_t Arc4SboxData19;
-	uint64_t Arc4SboxData20;
-	uint64_t Arc4SboxData21;
-	uint64_t Arc4SboxData22;
-	uint64_t Arc4SboxData23;
-	uint64_t Arc4SboxData24;
-	uint64_t Arc4SboxData25;
-	uint64_t Arc4SboxData26;
-	uint64_t Arc4SboxData27;
-	uint64_t Arc4SboxData28;
-	uint64_t Arc4SboxData29;
-	uint64_t Arc4SboxData30;
-	uint64_t Arc4SboxData31;
-	uint64_t Arc4IJData;
-	uint64_t PAD8;
-	uint64_t PAD9;
-	uint64_t PAD10;
-}              ARC4StateGCM_t, *ARC4StateGCM_pt;
-
-/* ARC4, F9      - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateF9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t authKey0;
-	uint64_t authKey1;
-	uint64_t PAD0;
-	uint64_t PAD1;
-	uint64_t PAD2;
-	uint64_t PAD3;
-	uint64_t PAD4;
-	uint64_t PAD5;
-	uint64_t PAD6;
-	uint64_t PAD7;
-	uint64_t PAD8;
-	uint64_t Arc4SboxData0;
-	uint64_t Arc4SboxData1;
-	uint64_t Arc4SboxData2;
-	uint64_t Arc4SboxData3;
-	uint64_t Arc4SboxData4;
-	uint64_t Arc4SboxData5;
-	uint64_t Arc4SboxData6;
-	uint64_t Arc4SboxData7;
-	uint64_t Arc4SboxData8;
-	uint64_t Arc4SboxData9;
-	uint64_t Arc4SboxData10;
-	uint64_t Arc4SboxData11;
-	uint64_t Arc4SboxData12;
-	uint64_t Arc4SboxData13;
-	uint64_t Arc4SboxData14;
-	uint64_t Arc4SboxData15;
-	uint64_t Arc4SboxData16;
-	uint64_t Arc4SboxData17;
-	uint64_t Arc4SboxData18;
-	uint64_t Arc4SboxData19;
-	uint64_t Arc4SboxData20;
-	uint64_t Arc4SboxData21;
-	uint64_t Arc4SboxData22;
-	uint64_t Arc4SboxData23;
-	uint64_t Arc4SboxData24;
-	uint64_t Arc4SboxData25;
-	uint64_t Arc4SboxData26;
-	uint64_t Arc4SboxData27;
-	uint64_t Arc4SboxData28;
-	uint64_t Arc4SboxData29;
-	uint64_t Arc4SboxData30;
-	uint64_t Arc4SboxData31;
-	uint64_t Arc4IJData;
-	uint64_t PAD9;
-	uint64_t PAD10;
-	uint64_t PAD11;
-}             ARC4StateF9_t, *ARC4StateF9_pt;
-
-/* ARC4, Non-HMAC (MD5, SHA-1, SHA-256)  - 32  bytes */
-typedef struct ARC4_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-}      ARC4_t, *ARC4_pt;
-
-/* ARC4, Non-HMAC (MD5, SHA-1, SHA-256)  - 344  bytes (not including 8 bytes from instruction) */
-typedef struct ARC4State_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t cipherKey2;
-	uint64_t cipherKey3;
-	uint64_t PAD0;
-	uint64_t PAD1;
-	uint64_t PAD2;
-	uint64_t Arc4SboxData0;
-	uint64_t Arc4SboxData1;
-	uint64_t Arc4SboxData2;
-	uint64_t Arc4SboxData3;
-	uint64_t Arc4SboxData4;
-	uint64_t Arc4SboxData5;
-	uint64_t Arc4SboxData6;
-	uint64_t Arc4SboxData7;
-	uint64_t Arc4SboxData8;
-	uint64_t Arc4SboxData9;
-	uint64_t Arc4SboxData10;
-	uint64_t Arc4SboxData11;
-	uint64_t Arc4SboxData12;
-	uint64_t Arc4SboxData13;
-	uint64_t Arc4SboxData14;
-	uint64_t Arc4SboxData15;
-	uint64_t Arc4SboxData16;
-	uint64_t Arc4SboxData17;
-	uint64_t Arc4SboxData18;
-	uint64_t Arc4SboxData19;
-	uint64_t Arc4SboxData20;
-	uint64_t Arc4SboxData21;
-	uint64_t Arc4SboxData22;
-	uint64_t Arc4SboxData23;
-	uint64_t Arc4SboxData24;
-	uint64_t Arc4SboxData25;
-	uint64_t Arc4SboxData26;
-	uint64_t Arc4SboxData27;
-	uint64_t Arc4SboxData28;
-	uint64_t Arc4SboxData29;
-	uint64_t Arc4SboxData30;
-	uint64_t Arc4SboxData31;
-	uint64_t Arc4IJData;
-	uint64_t PAD3;
-	uint64_t PAD4;
-	uint64_t PAD5;
-}           ARC4State_t, *ARC4State_pt;
-
-/* Kasumi f8  - 32  bytes */
-typedef struct KASUMIF8_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-}          KASUMIF8_t, *KASUMIF8_pt;
-
-/* Kasumi f8 + HMAC (MD5, SHA-1, SHA-256)  - 80  bytes */
-typedef struct KASUMIF8HMAC_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-}              KASUMIF8HMAC_t, *KASUMIF8HMAC_pt;
-
-/* Kasumi f8 + HMAC (SHA-384, SHA-512)  - 144 bytes */
-typedef struct KASUMIF8HMAC2_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t hmacKey0;
-	uint64_t hmacKey1;
-	uint64_t hmacKey2;
-	uint64_t hmacKey3;
-	uint64_t hmacKey4;
-	uint64_t hmacKey5;
-	uint64_t hmacKey6;
-	uint64_t hmacKey7;
-	uint64_t hmacKey8;
-	uint64_t hmacKey9;
-	uint64_t hmacKey10;
-	uint64_t hmacKey11;
-	uint64_t hmacKey12;
-	uint64_t hmacKey13;
-	uint64_t hmacKey14;
-	uint64_t hmacKey15;
-}               KASUMIF8HMAC2_t, *KASUMIF8HMAC2_pt;
-
-/* Kasumi f8 + GCM  - 144 bytes */
-typedef struct KASUMIF8GCM_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t GCMH0;
-	uint64_t GCMH1;
-	uint64_t GCMSCI;
-}             KASUMIF8GCM_t, *KASUMIF8GCM_pt;
-
-/* Kasumi f8 + f9  - 32  bytes */
-typedef struct KASUMIF8F9_s {
-	uint64_t cipherKey0;
-	uint64_t cipherKey1;
-	uint64_t authKey0;
-	uint64_t authKey1;
-}            KASUMIF8F9_t, *KASUMIF8F9_pt;
-
-typedef union CipherHashInfo_u {
-	AES256HMAC_t infoAES256HMAC;
-	AES256_t infoAES256;
-	AES192HMAC_t infoAES192HMAC;
-	AES192_t infoAES192;
-	AES128HMAC_t infoAES128HMAC;
-	AES128_t infoAES128;
-	DESHMAC_t infoDESHMAC;
-	DES_t infoDES;
-	DES3HMAC_t info3DESHMAC;
-	DES3_t info3DES;
-	HMAC_t infoHMAC;
-	/* ARC4 */
-	ARC4HMAC_t infoARC4HMAC;
-	ARC4StateHMAC_t infoARC4StateHMAC;
-	ARC4_t infoARC4;
-	ARC4State_t infoARC4State;
-	/* AES mode F8 */
-	AES256F8HMAC_t infoAES256F8HMAC;
-	AES256F8_t infoAES256F8;
-	AES192F8HMAC_t infoAES192F8HMAC;
-	AES192F8_t infoAES192F8;
-	AES128F8HMAC_t infoAES128F8HMAC;
-	AES128F8_t infoAES128F8;
-	/* KASUMI F8 */
-	KASUMIF8HMAC_t infoKASUMIF8HMAC;
-	KASUMIF8_t infoKASUMIF8;
-	/* GCM */
-	GCM_t infoGCM;
-	AES256F8GCM_t infoAES256F8GCM;
-	AES192F8GCM_t infoAES192F8GCM;
-	AES128F8GCM_t infoAES128F8GCM;
-	AES256GCM_t infoAES256GCM;
-	AES192GCM_t infoAES192GCM;
-	AES128GCM_t infoAES128GCM;
-	DESGCM_t infoDESGCM;
-	DES3GCM_t info3DESGCM;
-	ARC4GCM_t infoARC4GCM;
-	ARC4StateGCM_t infoARC4StateGCM;
-	KASUMIF8GCM_t infoKASUMIF8GCM;
-	/* HMAC2 */
-	HMAC2_t infoHMAC2;
-	AES256F8HMAC2_t infoAES256F8HMAC2;
-	AES192F8HMAC2_t infoAES192F8HMAC2;
-	AES128F8HMAC2_t infoAES128F8HMAC2;
-	AES256HMAC2_t infoAES256HMAC2;
-	AES192HMAC2_t infoAES192HMAC2;
-	AES128HMAC2_t infoAES128HMAC2;
-	DESHMAC2_t infoDESHMAC2;
-	DES3HMAC2_t info3DESHMAC2;
-	ARC4HMAC2_t infoARC4HMAC2;
-	ARC4StateHMAC2_t infoARC4StateHMAC2;
-	KASUMIF8HMAC2_t infoKASUMIF8HMAC2;
-	/* F9 */
-	F9_t infoF9;
-	AES256F8F9_t infoAES256F8F9;
-	AES192F8F9_t infoAES192F8F9;
-	AES128F8F9_t infoAES128F8F9;
-	AES256F9_t infoAES256F9;
-	AES192F9_t infoAES192F9;
-	AES128F9_t infoAES128F9;
-	DESF9_t infoDESF9;
-	DES3F9_t info3DESF9;
-	ARC4F9_t infoARC4F9;
-	ARC4StateF9_t infoARC4StateF9;
-	KASUMIF8F9_t infoKASUMIF8F9;
-}                CipherHashInfo_t, *CipherHashInfo_pt;
-
-
-/*
- *
- *    ControlDescriptor_s datastructure
- *
- */
-
-typedef struct ControlDescriptor_s {
-	uint64_t instruction;
-	CipherHashInfo_t cipherHashInfo;
-}                   ControlDescriptor_t, *ControlDescriptor_pt;
-
-
-
-
-/* **********************************************************************
- *       PacketDescriptor_t
- * **********************************************************************
- */
-
-/*       /--------------------------------------------\
- *       |                                            |
- *       |    New PacketDescriptor_s datastructure    |
- *       |                                            |
- *       \--------------------------------------------/
- *
- *
- *
- *       PacketDescriptor_t.srcLengthIVOffUseIVNext
- *       ------------------------------------------
- *
- *           63           62      61             59    58        57    56       54  53           43
- *  ------------------------------------------------------------------------------------------------
- * || Load HMAC key || Pad Hash || Hash Byte Count || Next || Use IV || IV Offset || Packet length ||   ... CONT ...
- *  ------------------------------------------------------------------------------------------------
- *           1            1           3                1        1          3              11
- *
- *
- *      42          41      40    39                  5     4          3       2
- *      0
- *  ----------------------------------------------------------------------------------------------------
- * ||  NLHMAC || Break || Wait || Segment src address || SRTCP  || Reserved || Global src data offset ||
- *  ----------------------------------------------------------------------------------------------------
- *      1           1       1             35                1           1                  3
- *
- *
- *
- *             Load HMAC key           =        1'b0       Preserve old HMAC key stored in Auth engine (moot if HASH.HMAC == 0)
- *                                              1'b1       Load HMAC key from ID registers at beginning of op
- *                                                         If GCM is selected as authenticator, setting this bit
- *                                                         will cause the H value from ID to be loaded to the engine
- *                                                         If Kasumi F9 is selected as authenticator, setting this bit
- *                                                         will cause the IK value from ID to be loaded to the engine.
- *             Pad Hash                =        1'b0       HASH will assume the data was padded to be a multiple
- *                                                         of 512 bits in length and that the last 64 bit word
- *                                                         expresses the total datalength in bits seen by HASH engine
- *                                              1'b1       The data was not padded to be a multiple of 512 bits in length;
- *                                                         The Hash engine will do its own padding to generate the correct digest.
- *                                                        Ignored by GCM (always does its own padding)
- *             Hash Byte Count                             Number of BYTES on last 64-bit data word to use in digest calculation RELEVANT ONLY IF Pad Hash IS SET
- *                                              3'b000     Use all 8
- *                                              3'b001     Use first (MS) byte only (0-out rest), i.e., 0xddXXXXXXXXXXXXXX
- *                                              3'b010     Use first 2 bytes only (0-out rest), i.e., 0xddddXXXXXXXXXXXX     ... etc
- *             Next                    =        1'b0       Finish (return msg descriptor) at end of operation
- *                                              1'b1       Grab the next PacketDescriptor (i.e. next cache-line) when the current is complete.
- *                                                         This allows for fragmentation/defragmentation and processing of large (>16kB) packets.
- *                                                         The sequence of adjacent PacketDescriptor acts as a contiguous linked list of
- *                                                         pointers to the actual packets with Next==0 on the last PacketDescriptor to end processing.
- *             Use IV                  =        1'b0       On first frag:           Use old IV
- *                                                         On subsequent frags:     Do not write out to DST the (dword) offset data
- *                                              1'b1       On first frag:           Use data @ Segment_address + IV_Offset as IV
- *                                                         On subsequent frags:     Do write out to DST the (dword) offset data
- *             IV Offset               =                   On first frag:           Offset IN NB OF 8 BYTE WORDS (dwords) from beginning of packet
- *                                                                                  (i.e. (Potentially byte-shifted) Segment address) to cipher IV
- *                                                         On subsequent frags:     Offset to beginning of data to process; data to offset won't
- *                                                                                  be given to engines and will be written out to dst in the clear.
- *                                                                                  ON SUBSEQUENT FRAGS, IV_Offset MAY NOT EXCEED 3; LARGER VALUES WILL CAUSE AN ERROR
- *                                                                                  SEE ERROR CONDITIONS BELOW
- *             Packet length           =                   Nb double words to stream in (Including Segment address->CP/IV/Auth/CkSum offsets)
- *                                                         This is the total amount of data (x8 in bytes) read    (+1 dword if "Global src data offset" != 0)
- *                                                         This is the total amount of data (x8 in bytes) written (+1 dword if "Global dst data offset" != 0, if Dst dword offset == 0)
- *                                                         If Packet length == 11'h7ff and (Global src data offset != 0 or Global dst data offset != 0)
- *                                                         the operation is aborted (no mem writes occur)
- *                                                         and the "Insufficient Data To Cipher" error flag is raised
- *             NLHMAC                  =                   No last to hmac. Setting this to 1 will prevent the transmission of the last DWORD
- *                                                         to the authenticator, i.e., the DWORD before last will be designated as last for the purposes of authentication.
- *             Break                   =                   Break a wait (see below) state - causes the operation to be flushed and free descriptor to be returned.
- *                                                         Activated if DFetch blocked by Wait and Wait still active.
- *                                                         AS OF 02/10/2005 THIS FEATURE IS EXPERIMENTAL
- *             Wait                    =                   Setting that bit causes the operation to block in DFetch stage.
- *                                                         DFetch will keep polling the memory location until the bit is reset at which time
- *                                                         the pipe resumes normal operation. This feature is convenient for software dealing with fragmented packets.
- *                                                         AS OF 02/10/2005 THIS FEATURE IS EXPERIMENTAL
- *             Segment src address     =                   35 MSB of pointer to src data (i.e., cache-line aligned)
- *             SRTCP                   =                   Bypass the cipher for the last 4 bytes of data, i.e. the last 4 bytes will be sent to memory
- *                                                         and the authenticator in the clear. Applicable to last packet descriptor andlast frag only.
- *                                                         This accommodates a requirement of SRTCP.
- *             Global src data offset  =                   Nb BYTES to right-shift data by before presenting it to engines
- *                                                         (0-7); allows realignment of byte-aligned, non-double-word aligned data
- *
- *       PacketDescriptor_t.dstDataSettings
- *       ----------------------------------
- *
- *
- *         63       62           60  59   58           56  55         54     53      52          41     40
- *  ------------------------------------------------------------------------------------------------------------
- * || CipherPrefix | Arc4ByteCount | E/D | Cipher_Offset || Hash_Offset | Hash_Src || CkSum_Offset | CkSum_Src ||   ... CONT ...
- *  ------------------------------------------------------------------------------------------------------------
- *         1                3         1          3               2           1             12            1
- *  <-----------------------CIPHER-----------------------><---------HASH-----------><-------CHECKSUM----------->
- *
- *
- *             CipherPrefix            =                   128'b0 will be sent to the selected cipher
- *             KEEP VALUE ON ALL FRAGS                     after the IV is loaded, before the actual data goes in.
- *                                                         The result of that encryption (aka E(K, 0))will be stored
- *                                                         locally and XOR-ed with the auth digest to create the final
- *                                                         digest at the end of the auth OP:
- *                                                         This is covered by the GCM spec
- *                                                                   AesPrefix =  1'b1    -> Force   E=Cipher(K,0) before start of data encr.
- *                                                                                        -> Digest ^= E
- *                                                                   AesPrefix =  1'b0    -> Regular digest
- *                                                         This flag is ignored if no cipher is chosen (Bypass condition)
- *  X0         Arc4ByteCount           =                   Number of BYTES on last 64-bit data word to encrypt
- *                                              3'b000     Encrypt all 8
- *                                              3'b001     Encrypt first (MS) byte only i.e., 0xddXXXXXXXXXXXXXX
- *                                              3'b010     Encrypt first 2 bytes only i.e., 0xddddXXXXXXXXXXXX     ... etc
- *                                                         In reality, all are encrypted, however, the SBOX
- *                                                         is not written past the last byte to encrypt
- *             E/D                     =        1'b0       Decrypt
- *                                              1'b1       Encrypt
- *                                                         Overloaded to also mean IV byte offset for first frag
- *             Cipher_Offset           =                   Nb of words between the first data segment
- *                                                         and word on which to start cipher operation
- *                                                         (64 BIT WORDS !!!)
- *             Hash_Offset             =                   Nb of words between the first data segment
- *                                                         and word on which to start hashing
- *                                                         (64 bit words)
- *             Hash_Src                =        1'b0       DMA channel
- *                                              1'b1       Cipher if word count exceeded Cipher_Offset;
- *                                                         DMA channel otherwise
- *             CkSum_Offset            =                   Nb of words between the first data segment
- *                                                         and word on which to start
- *                                                         checksum calculation (32 BIT WORDS !!!)
- *             CkSum_Src               =        1'b0       DMA channel
- *                                              1'b1       Cipher if word count exceeded Cipher_Offset
- *                                                         DMA channel otherwise
- *             Cipher dst address      =                   35 MSB of pointer to dst location (i.e., cache-line aligned)
- *             Dst dword offset        =                   Nb of double-words to left-shift data from spec'ed Cipher dst address before writing it to memory
- *             Global dst data offset  =                   Nb BYTES to left-shift (double-word boundary aligned) data by before writing it to memory
- *
- *
- *       PacketDescriptor_t.authDstNonceLow
- *       ----------------------------------
- *
- *   63       40  39               5  4                0
- *  -----------------------------------------------------
- * || Nonce_Low || Auth_dst_address || Cipher_Offset_Hi ||
- *  -----------------------------------------------------
- *        24             35                    5
- *
- *
- *
- *             Nonce_Low         =                 Nonce[23:0] 24 least significant bits of 32-bit long nonce
- *                                                 Used by AES in counter mode
- *             Auth_dst_address  =                 35 MSB of pointer to authentication dst location (i.e., cache-line aligned)
- * X0          Cipher_Offset_Hi  =                 On first frag:           5 MSB of 8-bit Cipher_offset; will be concatenated to
- *                                                                          the top of PacketDescriptor_t.dstDataSettings.Cipher_Offset
- *                                                 On subsequent frags:     Ignored
- *
- *
- *       PacketDescriptor_t.ckSumDstNonceHiCFBMaskLLWMask
- *       ------------------------------------------------
- *
- *
- *   63              61  60                 58  57     56  55      48  47      40  39                5  4            0
- *  -------------------------------------------------------------------------------------------------------------------
- * || Hash_Byte_Offset || Packet length bytes || LLWMask || CFB_Mask || Nonce_Hi || CkSum_dst_address || IV_Offset_Hi ||
- *  -------------------------------------------------------------------------------------------------------------------
- *           3                    3                 2          8           8               35                 5
- *
- *
- *                 Hash_Byte_Offset    =              On first frag:            Additional offset in bytes to be added to Hash_Offset
- *                                                                              to obtain the full offset applied to the data before
- *                                                                              submitting it to authenticator
- *                                                    On subsequent frags:      Same
- *                 Packet length bytes =              On one fragment payloads: Ignored (i.e. assumed to be 0, last dword used in its entirety)
- *                                                    On fragments before last: Number of bytes on last fragment dword
- *                                                    On last fragment:         Ignored (i.e. assumed to be 0, last dword used in its entirety)
- *   LLWMask, aka, Last_long_word_mask =   2'b00      Give last 128 bit word from AES engine to auth/cksum/wrbbufer as is - applicable in AES CTR only
- *                                         2'b11      Mask (zero-out) 32 least significant bits
- *                                         2'b10      Mask 64 LSBs
- *                                         2'b01      Mask 96 LSBs
- *                                                    If the GCM authenticator is used, setting LLWMask to 2'b10 or 2'b01
- *                                                    will also prevent the transmission of the last DWORD
- *                                                    to the authenticator, i.e., the DWORD before last will
- *                                                    be designated as last for the purposes of authentication.
- *                 CFB_Mask            =              8 bit mask used by AES in CFB mode
- *                                                    In CTR mode:
- *                                                         CFB_Mask[1:0] =  2'b00   -> Counter[127:0] = {Nonce[31:0],       IV0[63:0], 4'h00000001} (only 1 IV exp
-ected) regular CTR
- *                                                                          2'b01   -> Counter[127:0] = {Nonce[31:0],       IV0[63:0], IV1[31:0]}   (2 IV expected
-) CCMP
- *                                                                          2'b10   -> Counter[127:0] = {IV1[63:0],         IV0[31:0], Nonce[31:0]} (2 IV expected
-) GCM with SCI
- *                                                                          2'b11   -> Counter[127:0] = {IDecode.SCI[63:0], IV0[31:0], Nonce[31:0]} (1 IV expected
-) GCM w/o SCI
- *                 Nonce_Hi            =              Nonce[31:24] 8 most significant bits of 32-bit long nonce
- *                                                    Used by AES in counter mode
- *                 CkSum_dst_address   =              35 MSB of pointer to cksum dst location (i.e., cache-line aligned)
- *  X0             IV_Offset_Hi        =              On first frag:           5 MSB of 8-bit IV offset; will be concatenated to
- *                                                                             the top of PacketDescriptor_t.srcLengthIVOffUseIVNext.IV_Offset
- *                                                    On subsequent frags:     Ignored
- */
-
-/* #define PKT_DSC_LOADHMACKEY */
-#define PKT_DSC_LOADHMACKEY_OLD   0
-#define PKT_DSC_LOADHMACKEY_LOAD  1
-#define PKT_DSC_LOADHMACKEY_LSB   63
-#define PKT_DSC_LOADHMACKEY_BITS  ONE_BIT
-#define PKT_DSC_LOADHMACKEY_MASK  \
- (PKT_DSC_LOADHMACKEY_BITS << PKT_DSC_LOADHMACKEY_LSB)
-
-/* #define PKT_DSC_PADHASH */
-#define PKT_DSC_PADHASH_PADDED    0
-#define PKT_DSC_PADHASH_PAD       1	/* requires padding */
-#define PKT_DSC_PADHASH_LSB       62
-#define PKT_DSC_PADHASH_BITS      ONE_BIT
-#define PKT_DSC_PADHASH_MASK      (PKT_DSC_PADHASH_BITS << PKT_DSC_PADHASH_LSB)
-
-/* #define PKT_DSC_HASHBYTES */
-#define PKT_DSC_HASHBYTES_ALL8    0
-#define PKT_DSC_HASHBYTES_MSB     1
-#define PKT_DSC_HASHBYTES_MSW     2
-#define PKT_DSC_HASHBYTES_LSB     59
-#define PKT_DSC_HASHBYTES_BITS    THREE_BITS
-#define PKT_DSC_HASHBYTES_MASK    \
- (PKT_DSC_HASHBYTES_BITS << PKT_DSC_HASHBYTES_LSB)
-
-/* #define PKT_DSC_NEXT */
-#define PKT_DSC_NEXT_FINISH       0
-#define PKT_DSC_NEXT_DO           1
-#define PKT_DSC_NEXT_LSB          58
-#define PKT_DSC_NEXT_BITS         ONE_BIT
-#define PKT_DSC_NEXT_MASK         (PKT_DSC_NEXT_BITS << PKT_DSC_NEXT_LSB)
-
-/* #define PKT_DSC_IV */
-#define PKT_DSC_IV_OLD            0
-#define PKT_DSC_IV_NEW            1
-#define PKT_DSC_IV_LSB            57
-#define PKT_DSC_IV_BITS           ONE_BIT
-#define PKT_DSC_IV_MASK           (PKT_DSC_IV_BITS << PKT_DSC_IV_LSB)
-
-/* #define PKT_DSC_IVOFF */
-#define PKT_DSC_IVOFF_LSB         54
-#define PKT_DSC_IVOFF_BITS        THREE_BITS
-#define PKT_DSC_IVOFF_MASK        (PKT_DSC_IVOFF_BITS << PKT_DSC_IVOFF_LSB)
-
-/* #define PKT_DSC_PKTLEN */
-#define PKT_DSC_PKTLEN_LSB         43
-#define PKT_DSC_PKTLEN_BITS        ELEVEN_BITS
-#define PKT_DSC_PKTLEN_MASK        (PKT_DSC_PKTLEN_BITS << PKT_DSC_PKTLEN_LSB)
-
-/* #define PKT_DSC_NLHMAC */
-#define PKT_DSC_NLHMAC_LSB         42
-#define PKT_DSC_NLHMAC_BITS        ONE_BIT
-#define PKT_DSC_NLHMAC_MASK        (PKT_DSC_NLHMAC_BITS << PKT_DSC_NLHMAC_LSB)
-
-/* #define PKT_DSC_BREAK */
-#define PKT_DSC_BREAK_OLD          0
-#define PKT_DSC_BREAK_NEW          1
-#define PKT_DSC_BREAK_LSB          41
-#define PKT_DSC_BREAK_BITS         ONE_BIT
-#define PKT_DSC_BREAK_MASK         (PKT_DSC_BREAK_BITS << PKT_DSC_BREAK_LSB)
-
-/* #define PKT_DSC_WAIT */
-#define PKT_DSC_WAIT_OLD           0
-#define PKT_DSC_WAIT_NEW           1
-#define PKT_DSC_WAIT_LSB           40
-#define PKT_DSC_WAIT_BITS          ONE_BIT
-#define PKT_DSC_WAIT_MASK          (PKT_DSC_WAIT_BITS << PKT_DSC_WAIT_LSB)
-
-/* #define PKT_DSC_SEGADDR */
-#define PKT_DSC_SEGADDR_LSB        5
-#define PKT_DSC_SEGADDR_BITS       FOURTY_BITS
-#define PKT_DSC_SEGADDR_MASK       \
- (PKT_DSC_SEGADDR_BITS << PKT_DSC_SEGADDR_LSB)
-
-/* #define PKT_DSC_SRTCP */
-#define PKT_DSC_SRTCP_OFF       0
-#define PKT_DSC_SRTCP_ON        1
-#define PKT_DSC_SRTCP_LSB       4
-#define PKT_DSC_SRTCP_BITS      ONE_BIT
-#define PKT_DSC_SRTCP_MASK      (PKT_DSC_SRTCP_BITS << PKT_DSC_SRTCP_LSB)
-
-#define PKT_DSC_SEGOFFSET_LSB        0
-#define PKT_DSC_SEGOFFSET_BITS       THREE_BITS
-#define PKT_DSC_SEGOFFSET_MASK       \
- (PKT_DSC_SEGOFFSET_BITS << PKT_DSC_SEGOFFSET_LSB)
-
-/* **********************************************************************
- *       PacketDescriptor_t.dstDataSettings
- * **********************************************************************
- */
-/* #define PKT_DSC_ARC4BYTECOUNT */
-#define PKT_DSC_ARC4BYTECOUNT_ALL8    0
-#define PKT_DSC_ARC4BYTECOUNT_MSB     1
-#define PKT_DSC_ARC4BYTECOUNT_MSW     2
-#define PKT_DSC_ARC4BYTECOUNT_LSB     60
-#define PKT_DSC_ARC4BYTECOUNT_BITS    THREE_BITS
-#define PKT_DSC_ARC4BYTECOUNT_MASK    (PKT_DSC_ARC4BYTECOUNT_BITS << PKT_DSC_ARC4BYTECOUNT_LSB)
-
-/* #define PKT_DSC_SYM_OP (symmetric key operation) */
-#define PKT_DSC_SYM_OP_DECRYPT    0
-#define PKT_DSC_SYM_OP_ENCRYPT    1
-#define PKT_DSC_SYM_OP_LSB        59
-#define PKT_DSC_SYM_OP_BITS       ONE_BIT
-#define PKT_DSC_SYM_OP_MASK       (PKT_DSC_SYM_OP_BITS << PKT_DSC_SYM_OP_LSB)
-
-/* #define PKT_DSC_CPHROFF */
-#define PKT_DSC_CPHROFF_LSB        56
-#define PKT_DSC_CPHROFF_BITS       THREE_BITS
-#define PKT_DSC_CPHROFF_MASK       (PKT_DSC_CPHROFF_BITS << PKT_DSC_CPHROFF_LSB)
-
-/* #define PKT_DSC_HASHOFF */
-#define PKT_DSC_HASHOFF_LSB       54
-#define PKT_DSC_HASHOFF_BITS      TWO_BITS
-#define PKT_DSC_HASHOFF_MASK      (PKT_DSC_HASHOFF_BITS << PKT_DSC_HASHOFF_LSB)
-
-/* #define PKT_DSC_HASHSRC */
-#define PKT_DSC_HASHSRC_DMA       0
-#define PKT_DSC_HASHSRC_CIPHER    1
-#define PKT_DSC_HASHSRC_LSB       53
-#define PKT_DSC_HASHSRC_BITS      ONE_BIT
-#define PKT_DSC_HASHSRC_MASK      (PKT_DSC_HASHSRC_BITS << PKT_DSC_HASHSRC_LSB)
-
-/* #define PKT_DSC_CKSUMOFF */
-#define PKT_DSC_CKSUMOFF_LSB      41
-#define PKT_DSC_CKSUMOFF_BITS     TWELVE_BITS
-#define PKT_DSC_CKSUMOFF_MASK   (PKT_DSC_CKSUMOFF_BITS << PKT_DSC_CKSUMOFF_LSB)
-
-/* #define PKT_DSC_CKSUMSRC */
-#define PKT_DSC_CKSUMSRC_DMA      0
-#define PKT_DSC_CKSUMSRC_CIPHER   1
-#define PKT_DSC_CKSUMSRC_LSB      40
-#define PKT_DSC_CKSUMSRC_BITS     ONE_BIT
-#define PKT_DSC_CKSUMSRC_MASK   (PKT_DSC_CKSUMSRC_BITS << PKT_DSC_CKSUMSRC_LSB)
-
-/* #define PKT_DSC_CPHR_DST_ADDR */
-#define PKT_DSC_CPHR_DST_ADDR_LSB  0
-#define PKT_DSC_CPHR_DST_ADDR_BITS FOURTY_BITS
-#define PKT_DSC_CPHR_DST_ADDR_MASK \
-     (PKT_DSC_CPHR_DST_ADDR_BITS << PKT_DSC_CPHR_DST_ADDR_LSB)
-
-/* #define PKT_DSC_CPHR_DST_DWOFFSET */
-#define PKT_DSC_CPHR_DST_DWOFFSET_LSB   3
-#define PKT_DSC_CPHR_DST_DWOFFSET_BITS  TWO_BITS
-#define PKT_DSC_CPHR_DST_DWOFFSET_MASK \
-          (PKT_DSC_CPHR_DST_DWOFFSET_BITS << PKT_DSC_CPHR_DST_DWOFFSET_LSB)
-
- /* #define PKT_DSC_CPHR_DST_OFFSET */
-#define PKT_DSC_CPHR_DST_OFFSET_LSB   0
-#define PKT_DSC_CPHR_DST_OFFSET_BITS  THREE_BITS
-#define PKT_DSC_CPHR_DST_OFFSET_MASK \
-     (PKT_DSC_CPHR_DST_OFFSET_BITS << PKT_DSC_CPHR_DST_OFFSET_LSB)
-
-/* **********************************************************************
- *       PacketDescriptor_t.authDstNonceLow
- * **********************************************************************
- */
-/* #define PKT_DSC_NONCE_LOW */
-#define PKT_DSC_NONCE_LOW_LSB  40
-#define PKT_DSC_NONCE_LOW_BITS TWENTYFOUR_BITS
-#define PKT_DSC_NONCE_LOW_MASK \
-         (PKT_DSC_NONCE_LOW_BITS << PKT_DSC_NONCE_LOW_LSB)
-
-/* #define PKT_DSC_AUTH_DST_ADDR */
-#define PKT_DSC_AUTH_DST_ADDR_LSB  0
-#define PKT_DSC_AUTH_DST_ADDR_BITS FOURTY_BITS
-#define PKT_DSC_AUTH_DST_ADDR_MASK \
-         (PKT_DSC_AUTH_DST_ADDR_BITS << PKT_DSC_AUTH_DST_ADDR_LSB)
-
-/* #define PKT_DSC_CIPH_OFF_HI */
-#define PKT_DSC_CIPH_OFF_HI_LSB      0
-#define PKT_DSC_CIPH_OFF_HI_BITS     FIVE_BITS
-#define PKT_DSC_CIPH_OFF_HI_MASK   (PKT_DSC_CIPH_OFF_HI_BITS << PKT_DSC_CIPH_OFF_HI_LSB)
-
-/* **********************************************************************
- *       PacketDescriptor_t.ckSumDstNonceHiCFBMaskLLWMask
- * **********************************************************************
- */
-/* #define PKT_DSC_HASH_BYTE_OFF */
-#define PKT_DSC_HASH_BYTE_OFF_LSB  61
-#define PKT_DSC_HASH_BYTE_OFF_BITS THREE_BITS
-#define PKT_DSC_HASH_BYTE_OFF_MASK (PKT_DSC_HASH_BYTE_OFF_BITS << PKT_DSC_HASH_BYTE_OFF_LSB)
-
-/* #define PKT_DSC_PKTLEN_BYTES */
-#define PKT_DSC_PKTLEN_BYTES_LSB   58
-#define PKT_DSC_PKTLEN_BYTES_BITS  THREE_BITS
-#define PKT_DSC_PKTLEN_BYTES_MASK  (PKT_DSC_PKTLEN_BYTES_BITS << PKT_DSC_PKTLEN_BYTES_LSB)
-
-/* #define PKT_DSC_LASTWORD */
-#define PKT_DSC_LASTWORD_128       0
-#define PKT_DSC_LASTWORD_96MASK    1
-#define PKT_DSC_LASTWORD_64MASK    2
-#define PKT_DSC_LASTWORD_32MASK    3
-#define PKT_DSC_LASTWORD_LSB       56
-#define PKT_DSC_LASTWORD_BITS      TWO_BITS
-#define PKT_DSC_LASTWORD_MASK      (PKT_DSC_LASTWORD_BITS << PKT_DSC_LASTWORD_LSB)
-
-/* #define PKT_DSC_CFB_MASK */
-#define PKT_DSC_CFB_MASK_LSB      48
-#define PKT_DSC_CFB_MASK_BITS     EIGHT_BITS
-#define PKT_DSC_CFB_MASK_MASK     (PKT_DSC_CFB_MASK_BITS << PKT_DSC_CFB_MASK_LSB)
-
-/* #define PKT_DSC_NONCE_HI */
-#define PKT_DSC_NONCE_HI_LSB      40
-#define PKT_DSC_NONCE_HI_BITS     EIGHT_BITS
-#define PKT_DSC_NONCE_HI_MASK (PKT_DSC_NONCE_HI_BITS << PKT_DSC_NONCE_HI_LSB)
-
-/* #define PKT_DSC_CKSUM_DST_ADDR */
-#define PKT_DSC_CKSUM_DST_ADDR_LSB  5
-#define PKT_DSC_CKSUM_DST_ADDR_BITS THIRTY_FIVE_BITS
-#define PKT_DSC_CKSUM_DST_ADDR_MASK (PKT_DSC_CKSUM_DST_ADDR_BITS << PKT_DSC_CKSUM_DST_ADDR_LSB)
-
-/* #define PKT_DSC_IV_OFF_HI */
-#define PKT_DSC_IV_OFF_HI_LSB      0
-#define PKT_DSC_IV_OFF_HI_BITS     FIVE_BITS
-#define PKT_DSC_IV_OFF_HI_MASK   (PKT_DSC_IV_OFF_HI_BITS << PKT_DSC_IV_OFF_HI_LSB)
-
-
-/* ******************************************************************
- *             Control Error Code and Conditions
- * ******************************************************************
- */
-#define CTL_ERR_NONE         0x0000	/* No Error */
-#define CTL_ERR_CIPHER_OP    0x0001	/* Unknown Cipher Op */
-#define CTL_ERR_MODE         0x0002	/* Unknown or Not Allowed Mode */
-#define CTL_ERR_CHKSUM_SRC   0x0004	/* Unknown CkSum Src - UNUSED */
-#define CTL_ERR_CFB_MASK     0x0008	/* Forbidden CFB Mask - UNUSED */
-#define CTL_ERR_OP           0x0010	/* Unknown Ctrl Op - UNUSED */
-#define CTL_ERR_UNDEF1       0x0020	/* UNUSED */
-#define CTL_ERR_UNDEF2       0x0040	/* UNUSED */
-#define CTL_ERR_DATA_READ    0x0080	/* Data Read Error */
-#define CTL_ERR_DESC_CTRL    0x0100	/* Descriptor Ctrl Field Error */
-
-#define CTL_ERR_TIMEOUT      0x1000	/* Message Response Timeout */
-
-/* ******************************************************************
- *             Data Error Code and Conditions
- * ******************************************************************
- */
-#define DATA_ERR_NONE        0x0000	/* No Error */
-#define DATA_ERR_LEN_CIPHER  0x0001	/* Not Enough Data To Cipher */
-#define DATA_ERR_IV_ADDR     0x0002	/* Illegal IV Loacation */
-#define DATA_ERR_WD_LEN_AES  0x0004	/* Illegal Nb Words To AES */
-#define DATA_ERR_BYTE_COUNT  0x0008	/* Illegal Pad And ByteCount Spec */
-#define DATA_ERR_LEN_CKSUM   0x0010	/* Not Enough Data To CkSum */
-#define DATA_ERR_OP          0x0020	/* Unknown Data Op */
-#define DATA_ERR_UNDEF1      0x0040	/* UNUSED */
-#define DATA_ERR_READ        0x0080	/* Data Read Error */
-#define DATA_ERR_WRITE       0x0100	/* Data Write Error */
-
-
-/*
- * Common Descriptor
- * NOTE:  Size of struct is size of cacheline.
- */
-
-typedef struct OperationDescriptor_s {
-	uint64_t phys_self;
-	uint32_t stn_id;
-	uint32_t flags;
-	uint32_t cpu;
-	uint32_t seq_num;
-	uint64_t vaddr;
-}                     OperationDescriptor_t, *OperationDescriptor_pt;
-
-
-/*
- * This defines the security data descriptor format
- */
-typedef struct PacketDescriptor_s {
-	uint64_t srcLengthIVOffUseIVNext;
-	uint64_t dstDataSettings;
-	uint64_t authDstNonceLow;
-	uint64_t ckSumDstNonceHiCFBMaskLLWMask;
-}                  PacketDescriptor_t, *PacketDescriptor_pt;
-
-typedef struct {
-	uint8_t *user_auth;
-	uint8_t *user_src;
-	uint8_t *user_dest;
-	uint8_t *user_state;
-	uint8_t *kern_auth;
-	uint8_t *kern_src;
-	uint8_t *kern_dest;
-	uint8_t *kern_state;
-	uint8_t *aligned_auth;
-	uint8_t *aligned_src;
-	uint8_t *aligned_dest;
-	uint8_t *aligned_state;
-}      xlr_sec_drv_user_t, *xlr_sec_drv_user_pt;
-
-typedef struct symkey_desc {
-	OperationDescriptor_t op_ctl;	/* size is cacheline */
-	PacketDescriptor_t pkt_desc[2];	/* size is cacheline  */
-	ControlDescriptor_t ctl_desc;	/* makes this aligned */
-	uint64_t control;	/* message word0 */
-	uint64_t data;		/* message word1 */
-	uint64_t ctl_result;
-	uint64_t data_result;
-	struct symkey_desc *alloc;	/* real allocated addr */
-	xlr_sec_drv_user_t user;
-	                 //volatile atomic_t flag_complete;
-	       //struct semaphore sem_complete;
-	        //wait_queue_t submit_wait;
-
-	uint8_t *next_src_buf;
-	uint32_t next_src_len;
-
-	uint8_t *next_dest_buf;
-	uint32_t next_dest_len;
-
-	uint8_t *next_auth_dest;
-	uint8_t *next_cksum_dest;
-
-	void *ses;
-}           symkey_desc_t, *symkey_desc_pt;
-
-
-/*
- * **************************************************************************
- *                                 RSA Block
- * **************************************************************************
- */
-
-/*
- *                                 RSA and ECC Block
- *                                 =================
- *
- * A 2-word message ring descriptor is used to pass all information
- * pertaining to the RSA or ECC operation:
- *
- *  63  61 60         54     53     52      40 39          5 4                 3 2                      0
- *  -----------------------------------------------------------------------------------------------------
- * | Ctrl |  Op Class   | Valid Op | Op Ctrl0 | Source Addr | Software Scratch0 | Global src data offset |
- *  -----------------------------------------------------------------------------------------------------
- *    3         7           1           13         35                 2                     3
- *
- *
- *  63  61 60            54     53         52             51     50      40 39        5 4                 3 2                      0
- *  --------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | WRB_COH | WRB_L2ALLOC | DF_L2ALLOC | Op Ctrl1 | Dest Addr | Software Scratch1 | Global dst data offset |
- *  --------------------------------------------------------------------------------------------------------------------------------
- *    3            7            1          1              1          11         35                2                     3
- *
- *
- *             Op Class                =        7'h0_0     Modular exponentiation
- *                                              7'h0_1     ECC (including prime modular ops and binary GF ops)
- *                                              REMAINDER  UNDEF
- *
- *             Valid Op                =        1'b1       Will cause operation to start; descriptors sent back at end of operation
- *                                              1'b0       No operation performed; descriptors sent back right away
- *
- *                                                                   RSA                 ECC
- *                                                                   ===                 ===
- *             Op Ctrl0                =                             BlockWidth[1]	 {TYPE[6:0], FUNCTION[5:0]}
- *                                                                   LoadConstant[1]
- *                                                                   ExponentWidth[10:0]
- *                                               RSA Only
- *                                               ========
- *                                               Block Width             =        1'b1       1024 bit op
- *                                                                       =        1'b0       512  bit op
- *                                               Load Constant           =        1'b1       Load constant from data structure
- *                                                                                1'b0       Preserve old constant (this assumes
- *                                                                                           Source Addr points to RSAData_pt->Exponent
- *                                                                                           or that the length of Constant is 0)
- *                                               Exponent Width          =                   11-bit expression of exponent width EXPRESSED IN NUMBER OF BITS
- *
- *                                               ECC Only
- *                                               ========
- *
- *                                               TYPE      = 7'h0_0 ECC prime 160
- *                                                           7'h0_1 ECC prime 192
- *                                                           7'h0_2 ECC prime 224
- *                                                           7'h0_3 ECC prime 256
- *                                                           7'h0_4 ECC prime 384
- *                                                           7'h0_5 ECC prime 512
- *
- *                                                           7'h0_6 through 7'h1_f  UNDEF
- *
- *                                                           7'h2_0 ECC bin   163
- *                                                           7'h2_1 ECC bin   191
- *                                                           7'h2_2 ECC bin   233
- *
- *                                                           7'h2_3 through 7'h6_f  UNDEF
- *
- *                                                           7'h7_0 ECC UC load
- *
- *                                                           7'b7_1 through 7'b7_f  UNDEF
- *
- *                                                                   Prime field                                    Binary field
- *                                                                   ===========                                    ============
- *                                               FUNCTION  = 6'h0_0  Point multiplication     R = k.P               Point multiplication       R = k.P
- *                                                           6'h0_1  Point addition           R = P + Q             Binary GF inversion        C(x) = 1 / A(x) mod F(x)
- *                                                           6'h0_2  Point double             R = 2 x P             Binary GF multiplication   C(x) = B(x) * A(x) mod F(x)
- *                                                           6'h0_3  Point verification       R ?                   Binary GF addition         C(x) = B(x) + A(x) mod F(x)
- *                                                           6'h0_4  Modular addition         c = x + y mod m	    UNDEF
- *                                                           6'h0_5  Modular substraction     c = x - y mod m	    UNDEF
- *                                                           6'h0_6  Modular multiplication   c = x * y mod m       UNDEF
- *                                                           6'h0_7  Modular division         c = x / y mod m       UNDEF
- *                                                           6'h0_8  Modular inversion        c = 1 / y mod m       UNDEF
- *                                                           6'h0_9  Modular reduction        c = x mod m           UNDEF
- *
- *                                                           6'h0_a
- *                                                           through UNDEF                                          UNDEF
- *                                                           6'h3_f
- *
- *             Source Addr             =                   35 MSB of pointer to source address (i.e., cache-line aligned)
- *
- *             Software Scratch0       =                   Two bit field ignored by engine and returned as is in free descriptor
- *
- *             Global src data offset  =                   Nb BYTES to right-shift data by before presenting it to engines
- *                                                         (0-7); allows realignment of byte-aligned, non-double-word aligned data
- *
- *                                                                   RSA                 ECC
- *                                                                   ===                 ===
- *             OpCtrl1                 =                             ModulusWidth[10:0]  Not used
- *                                               RSA Only
- *                                               ========
- *                                               Modulus Width           =                   11-bit expression of modulus width EXPRESSED IN NUMBER OF BITS
- *
- *             Dest Addr               =                   35 MSB of pointer to destination address (i.e., cache-line aligned)
- *
- *             Software Scratch1       =                   Two bit field ignored by engine and returned as is in free descriptor
- *
- *             Global dst data offset  =                   Nb BYTES to left-shift (double-word boundary aligned) data by before writing it to memory
- *
- *
- */
-
-/*
- * ECC data formats
- */
-
-/**********************************************************
- *                                                        *
- *     ECC prime data formats                             *
- *                                                        *
- **********************************************************
- *
- *
- *  The size of all quantities below is that of the precision
- *  of the chosen op (160, 192, ...) ROUNDED UP to a multiple
- *  of 8 bytes, i.e., 3 dwords (160, 192), 4 dwords (224, 256)
- *  6 dwords (384) and 8 dwords (512) and padded with zeroes
- *  when necessary.
- *
- *  The only exception to this is the key quantity (k) which
- *  needs to be rounded up to 32 bytes in all cases and padded
- *  with zeroes; therefore the key needs to be 4 dwords (160, 192,
- *  224, 256) or 8 dwords (384, 512)
- *
- *  The total lengths in dwords that are read and in
- *  bytes that are written, for each operation and
- *  length group, are specified at the bottom of each
- *  datastructure.
- *
- *  In all that follows, m is the modulus and cst is the constant,
- *  cst = 2 ^ (2*length + 4) mod m . a and b are the curve
- *  parameters.
- *
- *  0) UC load
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   Dword_0                 N/A
- *                 .
- *                 .
- *                 .
- *                 Dword_331
- *                 332 dw
- *
- *  1) Point multiplication       R(x_r, y_r) = k . P(x_p, y_p)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x_p      dst+glb_off->  x_r
- *                 x_p                     y_r
- *                 y_p			   2x(3/4/6/8)=
- *                 y_p			   6/8/12/16 dw
- *                 a
- *                 k
- *                 m
- *                 cst
- *                 7x(3/4/6/8)+(4/4/8/8)=
- *                 25/32/50/64 dw
- *
- *  2) Point addition             R(x_r, y_r) = P(x_p, y_p) + Q(x_q, y_q)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x_p      dst+glb_off->  x_r
- *                 y_p                     y_r
- *                 x_q			   2x(3/4/6/8)=
- *                 y_q			   6/8/12/16 dw
- *                 a
- *                 m
- *                 cst
- *                 7x(3/4/6/8)=
- *                 21/28/42/56 dw
- *
- *  3) Point double               R(x_r, y_r) = 2 . P(x_p, y_p)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x_p      dst+glb_off->  x_r
- *                 y_p                     y_r
- *                 a			   2x(3/4/6/8)=
- *                 m			   6/8/12/16 dw
- *                 cst
- *                 5x(3/4/6/8)=
- *                 15/20/30/40 dw
- *
- *  4) Point verification         Is_On_Curve = P(x_p, y_p) on curve ? 1 : 0
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x_p      dst+glb_off->  Is_On_Curve
- *                 y_p			   1 dw
- *                 a
- *                 b
- *                 m
- *                 cst
- *                 6x(3/4/6/8)=
- *                 18/24/36/48 dw
- *
- *  5) Modular addition           c = x + y mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x        dst+glb_off->  c
- *                 y			   3/4/6/8 dw
- *                 m
- *                 3x(3/4/6/8)=
- *                 9/12/18/24 dw
- *
- *  6) Modular substraction       c = x - y mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x        dst+glb_off->  c
- *                 y			   3/4/6/8 dw
- *                 m
- *                 3x(3/4/6/8)=
- *                 9/12/18/24 dw
- *
- *  7) Modular multiplication     c = x * y mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x        dst+glb_off->  c
- *                 y			   3/4/6/8 dw
- *                 m
- *                 cst
- *                 4x(3/4/6/8)=
- *                 12/16/24/32 dw
- *
- *  8) Modular division           c = x / y mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   y        dst+glb_off->  c
- *                 x			   3/4/6/8 dw
- *                 m
- *                 3x(3/4/6/8)=
- *                 9/12/18/24 dw
- *
- *  9) Modular inversion          c = 1 / y mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   y        dst+glb_off->  c
- *                 m			   3/4/6/8 dw
- *                 2x(3/4/6/8)=
- *                 6/8/12/16 dw
- *
- *  10) Modular reduction         c = x mod m
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   x        dst+glb_off->  c
- *                 m			   3/4/6/8 dw
- *                 2x(3/4/6/8)=
- *                 6/8/12/16 dw
- *
- */
-
-/**********************************************************
- *                                                        *
- *     ECC binary data formats                            *
- *                                                        *
- **********************************************************
- *
- *
- *  The size of all quantities below is that of the precision
- *  of the chosen op (163, 191, 233) ROUNDED UP to a multiple
- *  of 8 bytes, i.e. 3 dwords for (163, 191) and 4 dwords for
- *  (233), padded with zeroes as necessary.
- *
- *  The total lengths in dwords that are read and written,
- *  for each operation and length group, are specified
- *  at the bottom of each datastructure.
- *  In all that follows, b is the curve parameter.
- *
- *  1) Point multiplication       R(x_r, y_r) = k . P(x_p, y_p)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   b        dst+glb_off->  x_r
- *                 k                       y_r
- *                 x_p    		   2x(3/4)
- *                 y_p			   6/8 dw
- *                 4x(3/4)=
- *                 12/16 dw
- *
- *  2) Binary GF inversion        C(x) = 1 / A(x) mod F(x)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   A        dst+glb_off->  C
- *		   1x(3/4)=                1x(3/4)
- *                 3/4 dw		   3/4 dw
- *
- *  3) Binary GF multiplication   C(x) = B(x) * A(x) mod F(x)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   A        dst+glb_off->  C
- *                 B                       1x(3/4)
- *		   2x(3/4)=		   3/4 dw
- *                 6/8 dw
- *
- *  4) Binary GF addition         C(x) = B(x) + A(x) mod F(x)
- *
- *                 DATA IN                 DATA OUT
- *                 =======                 ========
- * src+glb_off->   A        dst+glb_off->  C
- *                 B                       1x(3/4)
- *		   2x(3/4)=		   3/4 dw
- *                 6/8dw
- *
- */
-
-/*
- * RSA data format
- */
-
-/*
- * IMPORTANT NOTE:
- *
- * As specified in the datastructures below,
- * the engine assumes all data (including
- * exponent and modulus) to be adjacent on
- * dword boundaries, e.g.,
- *
- * Operation length = 512 bits
- * Exponent  length = 16  bits
- * Modulus   length = 512 bits
- *
- * The engine expects to read:
- *
- *   63                    0
- *   -----------------------
- *  |                       | Constant0
- *   -----------------------
- *  |                       | Constant1
- *   -----------------------
- *  |                       | Constant2
- *   -----------------------
- *  |                       | Constant3
- *   -----------------------
- *  |                       | Constant4
- *   -----------------------
- *  |                       | Constant5
- *   -----------------------
- *  |                       | Constant6
- *   -----------------------
- *  |                       | Constant7
- *   -----------------------
- *  |      IGNORED    |B1|B0| Exponent0    (Exponent length = 16 bits = 2 bytes, so only 2 least significant bytes of exponent used)
- *   -----------------------
- *  |                       | Modulus0
- *   -----------------------
- *  |                       | Modulus1
- *   -----------------------
- *  |                       | Modulus2
- *   -----------------------
- *  |                       | Modulus3
- *   -----------------------
- *  |                       | Modulus4
- *   -----------------------
- *  |                       | Modulus5
- *   -----------------------
- *  |                       | Modulus6
- *   -----------------------
- *  |                       | Modulus7
- *   -----------------------
- *  |                       | Message0
- *   -----------------------
- *  |                       | Message1
- *   -----------------------
- *  |                       | Message2
- *   -----------------------
- *  |                       | Message3
- *   -----------------------
- *  |                       | Message4
- *   -----------------------
- *  |                       | Message5
- *   -----------------------
- *  |                       | Message6
- *   -----------------------
- *  |                       | Message7
- *   -----------------------
- *
- */
-
-/* #define PUBKEY_CTL_CTL */
-#define PUBKEY_CTL_CTL_LSB         61
-#define PUBKEY_CTL_CTL_BITS        THREE_BITS
-#define PUBKEY_CTL_CTL_MASK        (PUBKEY_CTL_CTL_BITS << PUBKEY_CTL_CTL_LSB)
-
-/* #define PUBKEY_CTL_OP_CLASS */
-#define PUBKEY_CTL_OP_CLASS_RSA    0
-#define PUBKEY_CTL_OP_CLASS_ECC    1
-#define PUBKEY_CTL_OP_CLASS_LSB    54
-#define PUBKEY_CTL_OP_CLASS_BITS   SEVEN_BITS
-#define PUBKEY_CTL_OP_CLASS_MASK   (PUBKEY_CTL_OP_CLASS_BITS << PUBKEY_CTL_OP_CLASS_LSB)
-
-/* #define PUBKEY_CTL_VALID */
-#define PUBKEY_CTL_VALID_FALSE     0
-#define PUBKEY_CTL_VALID_TRUE      1
-#define PUBKEY_CTL_VALID_LSB       53
-#define PUBKEY_CTL_VALID_BITS      ONE_BIT
-#define PUBKEY_CTL_VALID_MASK      \
- (PUBKEY_CTL_VALID_BITS << PUBKEY_CTL_VALID_LSB)
-
-/* #define PUBKEY_CTL_ECC_TYPE */
-#define PUBKEY_CTL_ECC_TYPE_PRIME_160    0
-#define PUBKEY_CTL_ECC_TYPE_PRIME_192    1
-#define PUBKEY_CTL_ECC_TYPE_PRIME_224    2
-#define PUBKEY_CTL_ECC_TYPE_PRIME_256    3
-#define PUBKEY_CTL_ECC_TYPE_PRIME_384    4
-#define PUBKEY_CTL_ECC_TYPE_PRIME_512    5
-#define PUBKEY_CTL_ECC_TYPE_BIN_163      0x20
-#define PUBKEY_CTL_ECC_TYPE_BIN_191      0x21
-#define PUBKEY_CTL_ECC_TYPE_BIN_233      0x22
-#define PUBKEY_CTL_ECC_TYPE_UC_LOAD      0x70
-#define PUBKEY_CTL_ECC_TYPE_LSB    46
-#define PUBKEY_CTL_ECC_TYPE_BITS   SEVEN_BITS
-#define PUBKEY_CTL_ECC_TYPE_MASK   (PUBKEY_CTL_ECC_TYPE_BITS << PUBKEY_CTL_ECC_TYPE_LSB)
-
-/* #define PUBKEY_CTL_ECC_FUNCTION */
-#define PUBKEY_CTL_ECC_FUNCTION_NOP          0
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_MUL    0
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_ADD    1
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_DBL    2
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_VFY    3
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_ADD  4
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_SUB  5
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_MUL  6
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_DIV  7
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_INV  8
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_RED  9
-#define PUBKEY_CTL_ECC_FUNCTION_LSB    40
-#define PUBKEY_CTL_ECC_FUNCTION_BITS   SIX_BITS
-#define PUBKEY_CTL_ECC_FUNCTION_MASK   (PUBKEY_CTL_ECC_FUNCTION_BITS << PUBKEY_CTL_ECC_FUNCTION_LSB)
-
-/* #define PUBKEY_CTL_BLKWIDTH */
-#define PUBKEY_CTL_BLKWIDTH_512    0
-#define PUBKEY_CTL_BLKWIDTH_1024   1
-#define PUBKEY_CTL_BLKWIDTH_LSB    52
-#define PUBKEY_CTL_BLKWIDTH_BITS   ONE_BIT
-#define PUBKEY_CTL_BLKWIDTH_MASK   \
- (PUBKEY_CTL_BLKWIDTH_BITS << PUBKEY_CTL_BLKWIDTH_LSB)
-
-/* #define PUBKEY_CTL_LD_CONST */
-#define PUBKEY_CTL_LD_CONST_OLD    0
-#define PUBKEY_CTL_LD_CONST_NEW    1
-#define PUBKEY_CTL_LD_CONST_LSB    51
-#define PUBKEY_CTL_LD_CONST_BITS   ONE_BIT
-#define PUBKEY_CTL_LD_CONST_MASK   \
- (PUBKEY_CTL_LD_CONST_BITS << PUBKEY_CTL_LD_CONST_LSB)
-
-/* #define PUBKEY_CTL_EXPWIDTH */
-#define PUBKEY_CTL_EXPWIDTH_LSB    40
-#define PUBKEY_CTL_EXPWIDTH_BITS   ELEVEN_BITS
-#define PUBKEY_CTL_EXPWIDTH_MASK   \
- (PUBKEY_CTL_EXPWIDTH_BITS << PUBKEY_CTL_EXPWIDTH_LSB)
-
-/* #define PUBKEY_CTL_SRCADDR */
-#define PUBKEY_CTL_SRCADDR_LSB     0
-#define PUBKEY_CTL_SRCADDR_BITS    FOURTY_BITS
-#define PUBKEY_CTL_SRCADDR_MASK    \
- (PUBKEY_CTL_SRCADDR_BITS << PUBKEY_CTL_SRCADDR_LSB)
-
-/* #define PUBKEY_CTL_SRC_OFFSET */
-#define PUBKEY_CTL_SRC_OFFSET_LSB  0
-#define PUBKEY_CTL_SRC_OFFSET_BITS THREE_BITS
-#define PUBKEY_CTL_SRC_OFFSET_MASK \
- (PUBKEY_CTL_SRC_OFFSET_BITS << PUBKEY_CTL_SRC_OFFSET_LSB)
-
-
-/* #define PUBKEY_CTL1_CTL */
-#define PUBKEY_CTL1_CTL_LSB        61
-#define PUBKEY_CTL1_CTL_BITS       THREE_BITS
-#define PUBKEY_CTL1_CTL_MASK       (PUBKEY_CTL_CTL_BITS << PUBKEY_CTL_CTL_LSB)
-
-/* #define PUBKEY_CTL1_MODWIDTH */
-#define PUBKEY_CTL1_MODWIDTH_LSB   40
-#define PUBKEY_CTL1_MODWIDTH_BITS  ELEVEN_BITS
-#define PUBKEY_CTL1_MODWIDTH_MASK  \
- (PUBKEY_CTL1_MODWIDTH_BITS << PUBKEY_CTL1_MODWIDTH_LSB)
-
-/* #define PUBKEY_CTL1_DSTADDR */
-#define PUBKEY_CTL1_DSTADDR_LSB    0
-#define PUBKEY_CTL1_DSTADDR_BITS   FOURTY_BITS
-#define PUBKEY_CTL1_DSTADDR_MASK   \
- (PUBKEY_CTL1_DSTADDR_BITS << PUBKEY_CTL1_DSTADDR_LSB)
-
-/* #define PUBKEY_CTL1_DST_OFFSET */
-#define PUBKEY_CTL1_DST_OFFSET_LSB    0
-#define PUBKEY_CTL1_DST_OFFSET_BITS   THREE_BITS
-#define PUBKEY_CTL1_DST_OFFSET_MASK   \
- (PUBKEY_CTL1_DST_OFFSET_BITS << PUBKEY_CTL1_DST_OFFSET_LSB)
-
-/*
- * Upon completion of operation, the RSA block returns a 2-word free descriptor
- * in the following format:
- *
- *  63  61 60            54 53   52 51       49  48          40 39             5 4                 3 2                      0
- *  -------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Control Error | Source Address | Software Scratch0 | Global src data offset |
- *  -------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl |   Data Error  | Dest Address   | Software Scratch1 | Global dst data offset |
- *  -------------------------------------------------------------------------------------------------------------------------
- *
- * The Control and Data Error codes are enumerated below
- *
- *                                Error conditions
- *                                ================
- *
- *             Control Error Code                  Control Error Condition
- *             ------------------                  -----------------------
- *             9'h000                              No Error
- *             9'h001                              Undefined Op Class
- *             9'h002                              Undefined ECC TYPE       (ECC only)
- *             9'h004                              Undefined ECC FUNCTION   (ECC only)
- *             9'h008                              ECC timeout              (ECC only)
- *             9'h010                              UNUSED
- *             9'h020                              UNUSED
- *             9'h040                              UNUSED
- *             9'h080                              Data Read Error
- *             9'h100                              Descriptor Ctrl Field Error        (D0.Ctrl != SOP || D1.Ctrl != EOP)
- *
- *             Data Error Code                     Data Error Condition
- *             ---------------                     --------------------
- *             9'h000                              No Error
- *             9'h001                              Exponent Width > Block Width (RSA Only)
- *             9'h002                              Modulus Width  > Block Width (RSA Only)
- *             9'h004                              UNUSED
- *             9'h008                              UNUSED
- *             9'h010                              UNUSED
- *             9'h020                              UNUSED
- *             9'h040                              UNUSED
- *             9'h080                              Data Read Error
- *             9'h100                              UNUSED
- */
-
-/*
- * Result Data Word for Message Ring Descriptor
- */
-
-/* #define PUBKEY_RSLT_CTL_CTL */
-#define PUBKEY_RSLT_CTL_CTL_LSB        61
-#define PUBKEY_RSLT_CTL_CTL_BITS       THREE_BITS
-#define PUBKEY_RSLT_CTL_CTL_MASK       \
- (PUBKEY_RSLT_CTL_CTL_BITS << PUBKEY_RSLT_CTL_CTL_LSB)
-
-/* #define PUBKEY_RSLT_CTL_DST_ID */
-#define PUBKEY_RSLT_CTL_DST_ID_LSB     54
-#define PUBKEY_RSLT_CTL_DST_ID_BITS    SEVEN_BITS
-#define PUBKEY_RSLT_CTL_DST_ID_MASK    \
- (PUBKEY_RSLT_CTL_DST_ID_BITS << PUBKEY_RSLT_CTL_DST_ID_LSB)
-
-/* #define PUBKEY_RSLT_CTL_DESC_CTL */
-#define PUBKEY_RSLT_CTL_DESC_CTL_LSB   49
-#define PUBKEY_RSLT_CTL_DESC_CTL_BITS  THREE_BITS
-#define PUBKEY_RSLT_CTL_DESC_CTL_MASK  \
- (PUBKEY_RSLT_CTL_DESC_CTL_BITS << PUBKEY_RSLT_CTL_DESC_CTL_LSB)
-
-
-/* #define PUBKEY_RSLT_CTL_ERROR */
-#define PUBKEY_RSLT_CTL_ERROR_LSB      40
-#define PUBKEY_RSLT_CTL_ERROR_BITS     NINE_BITS
-#define PUBKEY_RSLT_CTL_ERROR_MASK     \
- (PUBKEY_RSLT_CTL_ERROR_BITS << PUBKEY_RSLT_CTL_ERROR_LSB)
-
-/* #define PUBKEY_RSLT_CTL_SRCADDR */
-#define PUBKEY_RSLT_CTL_SRCADDR_LSB    0
-#define PUBKEY_RSLT_CTL_SRCADDR_BITS   FOURTY_BITS
-#define PUBKEY_RSLT_CTL_SRCADDR_MASK   \
- (PUBKEY_RSLT_CTL_SRCADDR_BITS << PUBKEY_RSLT_CTL_SRCADDR_LSB)
-
-
-/* #define PUBKEY_RSLT_DATA_CTL */
-#define PUBKEY_RSLT_DATA_CTL_LSB       61
-#define PUBKEY_RSLT_DATA_CTL_BITS      THREE_BITS
-#define PUBKEY_RSLT_DATA_CTL_MASK      \
- (PUBKEY_RSLT_DATA_CTL_BITS << PUBKEY_RSLT_DATA_CTL_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DST_ID */
-#define PUBKEY_RSLT_DATA_DST_ID_LSB    54
-#define PUBKEY_RSLT_DATA_DST_ID_BITS   SEVEN_BITS
-#define PUBKEY_RSLT_DATA_DST_ID_MASK   \
- (PUBKEY_RSLT_DATA_DST_ID_BITS << PUBKEY_RSLT_DATA_DST_ID_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DESC_CTL */
-#define PUBKEY_RSLT_DATA_DESC_CTL_LSB  49
-#define PUBKEY_RSLT_DATA_DESC_CTL_BITS THREE_BITS
-#define PUBKEY_RSLT_DATA_DESC_CTL_MASK \
- (PUBKEY_RSLT_DATA_DESC_CTL_BITS << PUBKEY_RSLT_DATA_DESC_CTL_LSB)
-
-/* #define PUBKEY_RSLT_DATA_ERROR */
-#define PUBKEY_RSLT_DATA_ERROR_LSB     40
-#define PUBKEY_RSLT_DATA_ERROR_BITS    NINE_BITS
-#define PUBKEY_RSLT_DATA_ERROR_MASK    \
- (PUBKEY_RSLT_DATA_ERROR_BITS << PUBKEY_RSLT_DATA_ERROR_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DSTADDR */
-#define PUBKEY_RSLT_DATA_DSTADDR_LSB   40
-#define PUBKEY_RSLT_DATA_DSTADDR_BITS  FOURTY_BITS
-#define PUBKEY_RSLT_DATA_DSTADDR_MASK  \
- (PUBKEY_RSLT_DATA_DSTADDR_BITS << PUBKEY_RSLT_DATA_DSTADDR_LSB)
-
-/*
- * ******************************************************************
- *             RSA Block - Data Error Code and Conditions
- * ******************************************************************
- */
-
-#define PK_CTL_ERR_NONE        0x0000	/* No Error */
-#define PK_CTL_ERR_OP_CLASS    0x0001	/* Undefined Op Class */
-#define PK_CTL_ERR_ECC_TYPE    0x0002	/* Undefined ECC TYPE (ECC only) */
-#define PK_CTL_ERR_ECC_FUNCT   0x0004	/* Undefined ECC FUNCTION   (ECC only) */
-#define PK_CTL_ERR_ECC_TIMEOUT 0x0008	/* ECC timeout              (ECC only) */
-#define PK_CTL_ERR_READ        0x0080	/* Data Read Error */
-#define PK_CTL_ERR_DESC        0x0100	/* Descriptor Ctrl Field Error
-					 * (D0.Ctrl != SOP || D1.Ctrl != EOP) */
-#define PK_CTL_ERR_TIMEOUT     0x1000	/* Message Responce Timeout */
-
-#define PK_DATA_ERR_NONE       0x0000	/* No Error */
-#define PK_DATA_ERR_EXP_WIDTH  0x0001	/* Exponent Width > Block Width */
-#define PK_DATA_ERR_MOD_WIDTH  0x0002	/* Modulus Width  > Block Width */
-#define PK_DATA_ERR_READ       0x0080	/* Data Read Error */
-
-
-/*
- * This defines the RSA data format
- */
-/*
- * typedef struct RSAData_s {
- *  uint64_t            Constant;
- *  uint64_t            Exponent;
- *  uint64_t            Modulus;
- * uint64_t            Message;
- *} RSAData_t, *RSAData_pt;
- *
- * typedef RSAData_t DHData_t;
- * typedef RSAData_pt DHData_pt;
- */
-
-typedef struct UserPubData_s {
-	uint8_t *source;
-	uint8_t *user_result;
-	uint32_t result_length;
-}             UserPubData_t, *UserPubData_pt;
-
-typedef struct pubkey_desc {
-	OperationDescriptor_t op_ctl;	/* size is cacheline */
-	uint8_t source[1024];
-	uint8_t dest[256];	/* 1024 makes cacheline-aligned */
-	uint64_t control0;
-	uint64_t control1;
-	uint64_t ctl_result;
-	uint64_t data_result;
-	struct pubkey_desc *alloc;
-	UserPubData_t kern;	/* ptrs for temp buffers */
-	            //volatile atomic_t flag_complete;
-	       //struct semaphore sem_complete;
-	        //wait_queue_t submit_wait;
-}           pubkey_desc_t, *pubkey_desc_pt;
-
-/*
- * KASUMI F8 and F9 use the IV0/IV1 fields :
- *
- *  63 41      40      39   37 36        32 31                                 0
- *  ----------------------------------------------------------------------------
- * |     |FX/DIRECTION|       | F8/BEARER  |              F8/COUNT              | IV0
- *  ----------------------------------------------------------------------------
- *              1                   5                         32
- *
- *  63                                   32 31                                 0
- *  ----------------------------------------------------------------------------
- * |                F9/FRESH               |              F9/COUNT              | IV1
- *  ----------------------------------------------------------------------------
- *                     32                                     32
- */
-#endif				/* _XLR_SEC_DESC_H_ */
diff --git a/sys/mips/rmi/dev/sec/rmilib.c b/sys/mips/rmi/dev/sec/rmilib.c
deleted file mode 100644
index 9451c1808f6..00000000000
--- a/sys/mips/rmi/dev/sec/rmilib.c
+++ /dev/null
@@ -1,3076 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <machine/md_var.h>
-#include <machine/cpuregs.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <opencrypto/cryptodev.h>
-
-#include <mips/rmi/rmi_mips_exts.h>
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/rmi_boot_info.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/board.h>
-#include <mips/rmi/dev/sec/rmilib.h>
-#include <mips/rmi/dev/sec/desc.h>
-
-
-/* static int msgrng_stnid_pk0 = MSGRNG_STNID_PK0; */
-
-/* #define RMI_SEC_DEBUG */
-
-#define SMP_CACHE_BYTES XLR_CACHELINE_SIZE
-#define NUM_CHUNKS(size, bits) ( ((size)>>(bits)) + (((size)&((1<<(bits))-1))?1:0) )
-
-static const char nib2hex[] = "0123456789ABCDEF";
-symkey_desc_pt g_desc;
-struct xlr_sec_command *g_cmd;
-
-#ifdef XLR_SEC_CMD_DEBUG
-static void decode_symkey_desc(symkey_desc_pt desc, uint32_t cfg_vector);
-#endif
-
-static int xlr_sec_cipher_hash_command(xlr_sec_io_pt op, symkey_desc_pt desc,
-    uint8_t);
-static xlr_sec_error_t xlr_sec_setup_descriptor(xlr_sec_io_pt op,
-    unsigned int flags, symkey_desc_pt desc, uint32_t * cfg_vector);
-
-static xlr_sec_error_t xlr_sec_setup_packet(xlr_sec_io_pt op,
-    symkey_desc_pt desc, unsigned int flags, uint64_t * data,
-    PacketDescriptor_pt pkt_desc, ControlDescriptor_pt ctl_desc,
-    uint32_t vector, PacketDescriptor_pt next_pkt_desc,
-    uint8_t multi_frag_flag);
-static int xlr_sec_submit_message(symkey_desc_pt desc, uint32_t cfg_vector);
-static xlr_sec_error_t xlr_sec_setup_cipher(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc, uint32_t * vector);
-static xlr_sec_error_t xlr_sec_setup_digest(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc, uint32_t * vector);
-static xlr_sec_error_t xlr_sec_setup_cksum(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc);
-static xlr_sec_error_t xlr_sec_control_setup(xlr_sec_io_pt op,
-    unsigned int flags, uint64_t * control, ControlDescriptor_pt ctl_desc,
-    xlr_sec_drv_user_t * user, uint32_t vector);
-static void xlr_sec_free_desc(symkey_desc_pt desc); 
-
-void print_buf(char *desc, void *data, int len);
-xlr_sec_error_t xlr_sec_submit_op(symkey_desc_pt desc);
-void xlr_sec_msgring_handler(int bucket, int size, int code, int stid,
-    struct msgrng_msg *msg, void *data);
-
-void 
-xlr_sec_init(struct xlr_sec_softc *sc)
-{
-	unsigned int i;
-	xlr_reg_t *mmio;
-
-	mmio = sc->mmio = xlr_io_mmio(XLR_IO_SECURITY_OFFSET);
-	xlr_write_reg(mmio, SEC_DMA_CREDIT, SEC_DMA_CREDIT_CONFIG);
-	xlr_write_reg(mmio, SEC_CONFIG2, SEC_CFG2_ROUND_ROBIN_ON);
-
-	for (i = 0; i < 8; i++)
-		xlr_write_reg(mmio,
-		    SEC_MSG_BUCKET0_SIZE + i,
-		    xlr_is_xls() ?
-		    xls_bucket_sizes.bucket[MSGRNG_STNID_SEC + i] :
-		    bucket_sizes.bucket[MSGRNG_STNID_SEC + i]);
-
-	for (i = 0; i < 128; i++)
-		xlr_write_reg(mmio,
-		    SEC_CC_CPU0_0 + i,
-		    xlr_is_xls() ?
-		    xls_cc_table_sec.counters[i >> 3][i & 0x07] :
-		    cc_table_sec.counters[i >> 3][i & 0x07]);
-
-	/*
-	 * Register a bucket handler with the phoenix messaging subsystem
-	 * For now, register handler for bucket 0->5 in msg stn 0
-	 */
-	if (register_msgring_handler(TX_STN_SAE, xlr_sec_msgring_handler, NULL)) {
-		panic("Couldn't register msgring handler 0\n");
-	}
-	return;
-}
-
-int 
-xlr_sec_setup(struct xlr_sec_session *ses,
-    struct xlr_sec_command *cmd,
-    symkey_desc_pt desc)
-{
-	xlr_sec_io_pt op;
-	int size, ret_val;
-	int iv_len;
-
-	desc->ses = ses;
-	op = &cmd->op;
-	if (op == NULL)
-		return (-ENOMEM);
-
-	desc->ctl_desc.instruction = 0;
-	memset(&desc->ctl_desc.cipherHashInfo, 0, sizeof(CipherHashInfo_t));
-	desc->control = 0;
-	desc->pkt_desc[0].srcLengthIVOffUseIVNext = 0;
-	desc->pkt_desc[0].dstDataSettings = 0;
-	desc->pkt_desc[0].authDstNonceLow = 0;
-	desc->pkt_desc[0].ckSumDstNonceHiCFBMaskLLWMask = 0;
-	desc->pkt_desc[1].srcLengthIVOffUseIVNext = 0;
-	desc->pkt_desc[1].dstDataSettings = 0;
-	desc->pkt_desc[1].authDstNonceLow = 0;
-	desc->pkt_desc[1].ckSumDstNonceHiCFBMaskLLWMask = 0;
-	desc->data = 0;
-	desc->ctl_result = 0;
-	desc->data_result = 0;
-
-	if (op->flags & XLR_SEC_FLAGS_HIGH_PRIORITY)
-		if (!xlr_is_xls())
-			desc->op_ctl.stn_id++;
-
-	desc->user.user_src = (uint8_t *) (unsigned long)op->source_buf;
-	desc->user.user_dest = (uint8_t *) (unsigned long)op->dest_buf;
-	desc->user.user_auth = (uint8_t *) (unsigned long)op->auth_dest;
-
-	if ((op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4) &&
-	    (!op->rc4_state && (op->rc4_loadstate || op->rc4_savestate))) {
-		printf(" ** Load/Save State and no State **");
-		xlr_sec_free_desc(desc);
-		return (-EINVAL);
-	}
-	desc->user.user_state = (uint8_t *) (unsigned long)op->rc4_state;
-
-	switch (op->cipher_type) {
-	case XLR_SEC_CIPHER_TYPE_NONE:
-		iv_len = 0;
-		break;
-	case XLR_SEC_CIPHER_TYPE_DES:
-	case XLR_SEC_CIPHER_TYPE_3DES:
-		iv_len = XLR_SEC_DES_IV_LENGTH;
-		break;
-	case XLR_SEC_CIPHER_TYPE_AES128:
-	case XLR_SEC_CIPHER_TYPE_AES192:
-	case XLR_SEC_CIPHER_TYPE_AES256:
-		iv_len = XLR_SEC_AES_IV_LENGTH;
-		break;
-	case XLR_SEC_CIPHER_TYPE_ARC4:
-		iv_len = XLR_SEC_ARC4_IV_LENGTH;
-		break;
-	case XLR_SEC_CIPHER_TYPE_KASUMI_F8:
-		iv_len = XLR_SEC_KASUMI_F8_IV_LENGTH;
-		break;
-
-	default:
-		printf(" ** Undefined Cipher Type **");
-		xlr_sec_free_desc(desc);
-		return (-EINVAL);
-	}
-	size = op->source_buf_size + iv_len;
-
-	/*
-	 * make sure that there are enough bytes for aes based stream
-	 * ciphers
-	 */
-	if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
-	    op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR)
-		size += XLR_SEC_AES_BLOCK_SIZE - 1;
-
-	if (op->cipher_type == XLR_SEC_CIPHER_TYPE_NONE) {
-		if (op->source_buf_size != 0) {
-			memcpy(desc->user.aligned_src,
-			    (uint8_t *)(uintptr_t)op->source_buf,
-			    op->source_buf_size);
-		}
-	} else {
-		if (ses->multi_frag_flag) {
-			/* copy IV into temporary kernel source buffer */
-			memcpy(desc->user.aligned_src, &op->initial_vector[0], iv_len);
-
-			/* copy input data to temporary kernel source buffer */
-			memcpy((uint8_t *) (desc->user.aligned_src + iv_len),
-			    (uint8_t *) (unsigned long)op->source_buf, SEC_MAX_FRAG_LEN);
-
-			desc->next_src_len = op->source_buf_size - SEC_MAX_FRAG_LEN;
-			memcpy((uint8_t *) (desc->next_src_buf),
-			    (uint8_t *) (unsigned long)(op->source_buf + SEC_MAX_FRAG_LEN),
-			    desc->next_src_len);
-
-			op->source_buf_size = SEC_MAX_FRAG_LEN;
-			op->source_buf_size += iv_len;
-		} else {
-			/* copy IV into temporary kernel source buffer */
-			memcpy(desc->user.aligned_src, &op->initial_vector[0], iv_len);
-
-			/* copy input data to temporary kernel source buffer */
-			memcpy((uint8_t *) (desc->user.aligned_src + iv_len),
-			    (uint8_t *) (unsigned long)op->source_buf, op->source_buf_size);
-			op->source_buf_size += iv_len;
-		}
-	}
-
-	/* Set source to new kernel space */
-	op->source_buf = (uint64_t) (unsigned long)desc->user.aligned_src;
-
-	/*
-	 * Build new dest buffer, for Cipher output only
-	 */
-	if (op->cipher_type == XLR_SEC_CIPHER_TYPE_NONE) {
-		/*
-		 * Digest Engine *NEEDS* this, otherwise it will write at
-		 * 0[x]
-		 */
-		op->dest_buf = (uint64_t) (unsigned long)desc->user.aligned_src;
-	} else {
-		/* DEBUG -dpk */
-		XLR_SEC_CMD_DIAG("dest_buf_size = %d \n", op->dest_buf_size);
-		size = op->dest_buf_size + iv_len;
-
-		/*
-		 * make sure that there are enough bytes for aes based
-		 * stream ciphers
-		 */
-		if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
-		    op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR)
-			size += XLR_SEC_AES_BLOCK_SIZE - 1;
-		op->dest_buf = (uint64_t) (unsigned long)desc->user.aligned_dest;
-	}
-
-	ret_val = xlr_sec_cipher_hash_command(op, desc, ses->multi_frag_flag);
-	return (ret_val);
-
-}
-
-static int
-xlr_sec_cipher_hash_command(xlr_sec_io_pt op, symkey_desc_pt desc,
-    uint8_t multi_frag_flag)
-{
-	xlr_sec_error_t err;
-	uint32_t cfg_vector;
-	unsigned int setup_flags = 0;
-
-	err = XLR_SEC_ERR_NONE;
-	cfg_vector = 0;
-
-	if ((op->digest_type == XLR_SEC_DIGEST_TYPE_NONE) &&
-	    (op->cipher_type != XLR_SEC_CIPHER_TYPE_ARC4) &&
-	    (op->cipher_mode != XLR_SEC_CIPHER_MODE_F8) &&
-	    (op->cipher_type != XLR_SEC_CIPHER_TYPE_KASUMI_F8) &&
-	    (op->source_buf_size & 0x7)) {
-		printf("Invalid Cipher Block Size, data len=%d\n",
-		    op->source_buf_size);
-		return (-EINVAL);
-	}
-	do {
-
-		if ((op->cipher_type == XLR_SEC_CIPHER_TYPE_3DES) &&
-		    (op->cipher_op == XLR_SEC_CIPHER_OP_DECRYPT))
-			setup_flags = XLR_SEC_SETUP_OP_FLIP_3DES_KEY;
-
-		err = xlr_sec_setup_descriptor(op,
-		    setup_flags,
-		    desc, &cfg_vector);
-		if (err != XLR_SEC_ERR_NONE)
-			break;
-
-		err = xlr_sec_setup_packet(op,
-		    desc,
-		    op->digest_type != XLR_SEC_DIGEST_TYPE_NONE ?
-		    XLR_SEC_SETUP_OP_CIPHER_HMAC : 0,
-		    &desc->data,
-		    &desc->pkt_desc[0],
-		    &desc->ctl_desc,
-		    cfg_vector,
-		    &desc->pkt_desc[1],
-		    multi_frag_flag);
-		if (err != XLR_SEC_ERR_NONE)
-			break;
-	} while (0);
-	if (err != XLR_SEC_ERR_NONE) {
-		return (EINVAL);
-	}
-	err = xlr_sec_submit_message(desc, cfg_vector);
-	return err;
-}
-
-static xlr_sec_error_t
-xlr_sec_setup_descriptor(xlr_sec_io_pt op,
-    unsigned int flags,
-    symkey_desc_pt desc,
-    uint32_t * cfg_vector)
-{
-	xlr_sec_error_t err;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: ENTER\n");
-
-	if ((err = xlr_sec_setup_cipher(op, &desc->ctl_desc, cfg_vector)) != XLR_SEC_ERR_NONE) {
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_cipher done err %d\n",
-		    (int)err);
-		return err;
-	}
-	if (op->digest_type != XLR_SEC_DIGEST_TYPE_NONE) {
-		if ((err = xlr_sec_setup_digest(op, &desc->ctl_desc, cfg_vector)) != XLR_SEC_ERR_NONE) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_digest done err %d\n",
-			    (int)err);
-			return err;
-		}
-	}
-	if ((err = xlr_sec_setup_cksum(op, &desc->ctl_desc)) != XLR_SEC_ERR_NONE) {
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_cksum done err %d\n",
-		    (int)err);
-		return err;
-	}
-	if ((err = xlr_sec_control_setup(op,
-	    flags,
-	    &desc->control,
-	    &desc->ctl_desc,
-	    &desc->user,
-	    *cfg_vector)) != XLR_SEC_ERR_NONE) {
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_control_setup done err %d\n",
-		    (int)err);
-		return err;
-	}
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: DONE\n");
-	return err;
-}
-
-
-
-static
-xlr_sec_error_t 
-xlr_sec_setup_packet(xlr_sec_io_pt op,
-    symkey_desc_pt desc,
-    unsigned int flags,
-    uint64_t * data,
-    PacketDescriptor_pt pkt_desc,
-    ControlDescriptor_pt ctl_desc,
-    uint32_t vector,
-    PacketDescriptor_pt next_pkt_desc,
-    uint8_t multi_frag_flag)
-{
-	uint32_t len, next_len = 0, len_dwords, last_u64_bytes;
-	uint64_t addr;
-	uint64_t seg_addr, next_seg_addr = 0;
-	uint64_t byte_offset, global_offset;
-	uint32_t cipher_offset_dwords;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ENTER  vector = %04x\n", vector);
-
-	/* physical address of the source buffer */
-	addr = (uint64_t) vtophys((void *)(unsigned long)op->source_buf);
-	/* cache-aligned base of the source buffer */
-	seg_addr = rounddown2(addr, SMP_CACHE_BYTES);
-	/* offset in bytes to the source buffer start from the segment base */
-	byte_offset = addr - seg_addr;
-	/* global offset: 0-7 bytes */
-	global_offset = byte_offset & 0x7;
-
-
-	/*
-	 * op->source_buf_size is expected to be the Nb double words to
-	 * stream in (Including Segment address->CP/IV/Auth/CkSum offsets)
-	 */
-
-	/*
-	 * adjusted length of the whole thing, accounting for the added
-	 * head, sans global_offset (per Paul S.)
-	 */
-
-	len = op->source_buf_size + byte_offset - global_offset;
-	if (multi_frag_flag) {
-		next_seg_addr = (uint64_t)vtophys((void *)(uintptr_t)desc->next_src_buf);
-		next_seg_addr = rounddown2(next_seg_addr, SMP_CACHE_BYTES);
-		next_len = desc->next_src_len;
-	}
-	/* length of the whole thing in dwords */
-	len_dwords = NUM_CHUNKS(len, 3);
-	/* number of bytes in the last chunk (len % 8) */
-	last_u64_bytes = len & 0x07;
-
-	if (op->cipher_offset & 0x7) {
-		printf("** cipher_offset(%d) fails 64-bit word alignment **",
-		    op->cipher_offset);
-
-		return XLR_SEC_ERR_CIPHER_MODE;	/* ! fix ! */
-	}
-	/*
-	 * global_offset is only three bits, so work the number of the whole
-	 * 8-byte words into the global offset. both offset and
-	 * cipher_offset are byte counts
-	 */
-	cipher_offset_dwords = (op->iv_offset + byte_offset) >> 3;
-
-	if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
-	    op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR) {
-		if (multi_frag_flag) {
-			int nlhmac = ((op->source_buf_size + global_offset + 7 - op->cipher_offset) >> 3) & 1;
-
-			pkt_desc->srcLengthIVOffUseIVNext =
-			    FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
-			    FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
-			    FIELD_VALUE(PKT_DSC_PKTLEN, nlhmac + ((len + 7) >> 3)) |
-			    FIELD_VALUE(PKT_DSC_NLHMAC, nlhmac) |
-			    FIELD_VALUE(PKT_DSC_BREAK, 0) |
-			    FIELD_VALUE(PKT_DSC_WAIT, 1) |
-			    FIELD_VALUE(PKT_DSC_NEXT, 1) |
-			    FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
-			    FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-		} else {
-			int nlhmac = ((op->source_buf_size + global_offset + 7 - op->cipher_offset) >> 3) & 1;
-
-			pkt_desc->srcLengthIVOffUseIVNext =
-			    FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
-			    FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
-			    FIELD_VALUE(PKT_DSC_PKTLEN, nlhmac + ((len + 7) >> 3)) |
-			    FIELD_VALUE(PKT_DSC_NLHMAC, nlhmac) |
-			    FIELD_VALUE(PKT_DSC_BREAK, 0) |
-			    FIELD_VALUE(PKT_DSC_WAIT, 0) |
-			    FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
-			    FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
-		}
-	} else {
-		if (multi_frag_flag) {
-			pkt_desc->srcLengthIVOffUseIVNext =
-			    FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
-			    FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
-			    FIELD_VALUE(PKT_DSC_PKTLEN, (len + 7) >> 3) |
-			    FIELD_VALUE(PKT_DSC_BREAK, 0) |
-			    FIELD_VALUE(PKT_DSC_WAIT, 0) |
-			    FIELD_VALUE(PKT_DSC_NEXT, 1) |
-			    FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
-			    FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
-
-			next_pkt_desc->srcLengthIVOffUseIVNext =
-			    FIELD_VALUE(PKT_DSC_HASHBYTES, (next_len & 7)) |
-			    FIELD_VALUE(PKT_DSC_IVOFF, 0) |
-			    FIELD_VALUE(PKT_DSC_PKTLEN, (next_len + 7) >> 3) |
-			    FIELD_VALUE(PKT_DSC_BREAK, 0) |
-			    FIELD_VALUE(PKT_DSC_WAIT, 0) |
-			    FIELD_VALUE(PKT_DSC_NEXT, 0) |
-			    FIELD_VALUE(PKT_DSC_SEGADDR, next_seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
-			    FIELD_VALUE(PKT_DSC_SEGOFFSET, 0);
-
-
-		} else {
-			pkt_desc->srcLengthIVOffUseIVNext =
-			    FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
-			    FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
-			    FIELD_VALUE(PKT_DSC_PKTLEN, (len + 7) >> 3) |
-			    FIELD_VALUE(PKT_DSC_BREAK, 0) |
-			    FIELD_VALUE(PKT_DSC_WAIT, 0) |
-			    FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
-			    FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
-
-		}
-	}
-
-	switch (op->pkt_hmac) {
-	case XLR_SEC_LOADHMACKEY_MODE_OLD:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_OLD);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_OLD);
-
-		}
-		break;
-	case XLR_SEC_LOADHMACKEY_MODE_LOAD:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_LOAD);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_LOAD);
-
-		}
-		break;
-	default:
-		if (vector & (XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_F9)) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_LOADHMACKEY_MODE EXIT\n");
-			return XLR_SEC_ERR_LOADHMACKEY_MODE;
-		}
-		break;
-	}
-
-	switch (op->pkt_hash) {
-	case XLR_SEC_PADHASH_PADDED:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_PADHASH, PKT_DSC_PADHASH_PADDED);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_PADHASH, PKT_DSC_PADHASH_PADDED);
-		}
-		break;
-	case XLR_SEC_PADHASH_PAD:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_PADHASH, PKT_DSC_PADHASH_PAD);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_PADHASH, PKT_DSC_PADHASH_PAD);
-		}
-		break;
-	default:
-		if (vector & (XLR_SEC_VECTOR_MAC | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2)) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_PADHASH_MODE EXIT\n");
-			return XLR_SEC_ERR_PADHASH_MODE;
-		}
-		break;
-	}
-
-	switch (op->pkt_iv) {
-	case XLR_SEC_PKT_IV_OLD:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_IV, PKT_DSC_IV_OLD);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_IV, PKT_DSC_IV_OLD);
-
-		}
-		break;
-	case XLR_SEC_PKT_IV_NEW:
-		CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
-		    PKT_DSC_IV, PKT_DSC_IV_NEW);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
-			    PKT_DSC_IV, PKT_DSC_IV_NEW);
-
-		}
-		break;
-	default:
-		if (vector & XLR_SEC_VECTOR_CIPHER) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_PKT_IV_MODE EXIT\n");
-			return XLR_SEC_ERR_PKT_IV_MODE;
-		}
-		break;
-	}
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  src_buf=%llx  phys_src_buf=%llx \n",
-	    (unsigned long long)op->source_buf, (unsigned long long)addr);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  seg_addr=%llx  offset=%lld\n",
-	    (unsigned long long)seg_addr, (unsigned long long)byte_offset);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: global src offset: %d, iv_offset=%d\n",
-	    cipher_offset_dwords, op->iv_offset);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: src_buf_sz=%d  PKT_LEN=%d\n",
-	    op->source_buf_size, len_dwords);
-
-	/*
-	 * same operation with the destination. cipher offset affects this,
-	 * as well
-	 */
-	if (multi_frag_flag) {
-		next_seg_addr = (uint64_t) vtophys((void *)(unsigned long)(desc->next_dest_buf));
-		next_seg_addr = rounddown2(next_seg_addr, SMP_CACHE_BYTES);
-	}
-	addr = (uint64_t) vtophys((void *)(unsigned long)op->dest_buf);
-	seg_addr = rounddown2(addr, SMP_CACHE_BYTES);
-	byte_offset = addr - seg_addr;
-	global_offset = byte_offset & 0x7;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  dest_buf=%llx  phys_dest_buf=%llx \n",
-	    (unsigned long long)op->dest_buf, (unsigned long long)addr);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  seg_addr=%llx  offset=%lld\n",
-	    (unsigned long long)seg_addr, (unsigned long long)byte_offset);
-
-	/*
-	 * Dest Address = (Cipher Dest Address) + (Cipher Offset) + (Global
-	 * Dest Data Offset)
-	 * 
-	 * Cipher Dest Address - Cache-line  (0xffffffffe0) Cipher Offset -
-	 * Which (64-bit) Word in Cacheline  (0-3) Global Dest Data Offset -
-	 * Number of Bytes in (64-bit) Word before data
-	 * 
-	 * It must be set for Digest-only Ops, since the Digest engine will
-	 * write data to this address.
-	 */
-	cipher_offset_dwords = (op->cipher_offset + byte_offset) >> 3;
-
-
-	pkt_desc->dstDataSettings =
-	/* SYM_OP, HASHSRC */
-	    FIELD_VALUE(PKT_DSC_CPHROFF, cipher_offset_dwords) |
-	    FIELD_VALUE(PKT_DSC_HASHOFF, (op->digest_offset + byte_offset) >> 3) |
-	    FIELD_VALUE(PKT_DSC_CPHR_DST_ADDR, seg_addr) |
-	    FIELD_VALUE(PKT_DSC_CPHR_DST_DWOFFSET, 0) |
-	    FIELD_VALUE(PKT_DSC_CPHR_DST_OFFSET, global_offset);
-
-	if (multi_frag_flag) {
-		next_pkt_desc->dstDataSettings =
-		/* SYM_OP, HASHSRC */
-		    FIELD_VALUE(PKT_DSC_CPHROFF, cipher_offset_dwords) |
-		    FIELD_VALUE(PKT_DSC_HASHOFF, (op->digest_offset + byte_offset) >> 3) |
-		    FIELD_VALUE(PKT_DSC_CPHR_DST_ADDR, next_seg_addr) |
-		    FIELD_VALUE(PKT_DSC_CPHR_DST_DWOFFSET, 0) |
-		    FIELD_VALUE(PKT_DSC_CPHR_DST_OFFSET, global_offset);
-
-	}
-	if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4)
-		pkt_desc->dstDataSettings |= FIELD_VALUE(PKT_DSC_ARC4BYTECOUNT, last_u64_bytes);
-
-	if (op->cipher_type != XLR_SEC_CIPHER_TYPE_NONE) {
-		switch (op->cipher_op) {
-		case XLR_SEC_CIPHER_OP_ENCRYPT:
-			CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
-			    PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_ENCRYPT);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_ENCRYPT);
-
-			}
-			break;
-		case XLR_SEC_CIPHER_OP_DECRYPT:
-			CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
-			    PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_DECRYPT);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_DECRYPT);
-
-			}
-			break;
-		default:
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_CIPHER_OP EXIT\n");
-			return XLR_SEC_ERR_CIPHER_OP;
-		}
-	}
-	if (flags & XLR_SEC_SETUP_OP_HMAC) {
-		switch (op->digest_src) {
-		case XLR_SEC_DIGEST_SRC_DMA:
-			CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
-			    PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_DMA);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_DMA);
-
-			}
-			break;
-		case XLR_SEC_DIGEST_SRC_CPHR:
-			CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
-			    PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_CIPHER);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_CIPHER);
-			}
-			break;
-		default:
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_DIGEST_SRC EXIT\n");
-			return XLR_SEC_ERR_DIGEST_SRC;
-		}
-	}
-	if (op->cksum_type != XLR_SEC_CKSUM_TYPE_NOP) {
-		switch (op->cksum_src) {
-		case XLR_SEC_CKSUM_SRC_DMA:
-			CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
-			    PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_DMA);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_DMA);
-			}
-			break;
-		case XLR_SEC_CKSUM_SRC_CIPHER:
-			CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-			    PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_CIPHER);
-			if (multi_frag_flag) {
-				CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
-				    PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_CIPHER);
-			}
-			break;
-		default:
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_CKSUM_SRC EXIT\n");
-			return XLR_SEC_ERR_CKSUM_SRC;
-		}
-	}
-	pkt_desc->ckSumDstNonceHiCFBMaskLLWMask =
-	    FIELD_VALUE(PKT_DSC_HASH_BYTE_OFF, (op->digest_offset & 0x7)) |
-	    FIELD_VALUE(PKT_DSC_PKTLEN_BYTES, 0) |
-	/* NONCE_HI, PKT_DSC_LASTWORD, CFB_MASK, CKSUM_DST_ADDR */
-	    FIELD_VALUE(PKT_DSC_IV_OFF_HI, 0);
-
-	if (multi_frag_flag) {
-		next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask =
-		    FIELD_VALUE(PKT_DSC_HASH_BYTE_OFF, (op->digest_offset & 0x7)) |
-		    FIELD_VALUE(PKT_DSC_PKTLEN_BYTES, 0) |
-		/* NONCE_HI, PKT_DSC_LASTWORD, CFB_MASK, CKSUM_DST_ADDR */
-		    FIELD_VALUE(PKT_DSC_IV_OFF_HI, 0);
-
-	}
-	switch (op->pkt_lastword) {
-	case XLR_SEC_LASTWORD_128:
-		CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_128);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-			    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_128);
-
-		}
-		break;
-	case XLR_SEC_LASTWORD_96MASK:
-		CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_96MASK);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-			    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_96MASK);
-		}
-		break;
-	case XLR_SEC_LASTWORD_64MASK:
-		CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_64MASK);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-			    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_64MASK);
-		}
-		break;
-	case XLR_SEC_LASTWORD_32MASK:
-		CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_32MASK);
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-			    PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_32MASK);
-		}
-		break;
-	default:
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  ERR_LASTWORD_MODE EXIT\n");
-		return XLR_SEC_ERR_LASTWORD_MODE;
-	}
-	CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-	    PKT_DSC_CFB_MASK, op->cfb_mask);
-	CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-	    PKT_DSC_NONCE_HI, htonl(op->nonce) >> 24);
-	CLEAR_SET_FIELD(pkt_desc->authDstNonceLow,
-	    PKT_DSC_NONCE_LOW, htonl(op->nonce) & 0xffffff);
-
-	if (multi_frag_flag) {
-		CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_CFB_MASK, op->cfb_mask);
-		CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_NONCE_HI, htonl(op->nonce) >> 24);
-		CLEAR_SET_FIELD(next_pkt_desc->authDstNonceLow,
-		    PKT_DSC_NONCE_LOW, htonl(op->nonce) & 0xffffff);
-
-
-	}
-	/* Auth Dest Address must be Cacheline aligned on input */
-	if (vector & (XLR_SEC_VECTOR_MAC | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_F9)) {
-		pkt_desc->authDstNonceLow |=
-		/* NONCE_LOW */
-		    FIELD_VALUE(PKT_DSC_AUTH_DST_ADDR,
-		    (uint64_t) vtophys((void *)(unsigned long)op->auth_dest)) |
-		    FIELD_VALUE(PKT_DSC_CIPH_OFF_HI, 0);
-
-
-		if (multi_frag_flag) {
-			next_pkt_desc->authDstNonceLow |=
-			/* NONCE_LOW */
-			    FIELD_VALUE(PKT_DSC_AUTH_DST_ADDR,
-			    (uint64_t) vtophys((void *)(unsigned long)desc->next_auth_dest)) |
-			    FIELD_VALUE(PKT_DSC_CIPH_OFF_HI, 0);
-
-
-		}
-	}
-	/* CkSum Dest Address must be Cacheline aligned on input */
-	if (op->cksum_type == XLR_SEC_CKSUM_TYPE_IP) {
-		CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-		    PKT_DSC_CKSUM_DST_ADDR,
-		    (uint64_t) vtophys((void *)(unsigned long)op->cksum_dest));
-
-		if (multi_frag_flag) {
-			CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
-			    PKT_DSC_CKSUM_DST_ADDR,
-			    (uint64_t) vtophys((void *)(unsigned long)desc->next_cksum_dest));
-		}
-	}
-	/*
-	 * XLR_SEC_CMD_DIAG (" xlr_sec_setup_packet():  pkt_desc=%llx
-	 * phys_pkt_desc=%llx \n", (unsigned long long)pkt_desc, (unsigned
-	 * long long)virt_to_phys(pkt_desc)); (unsigned long long)pkt_desc,
-	 * (unsigned long long)vtophys(pkt_desc));
-	 */
-	XLR_SEC_CMD_DIAG(" xlr_sec_setup_packet():  pkt_desc=%p   phys_pkt_desc=%llx \n",
-	    pkt_desc, (unsigned long long)vtophys(pkt_desc));
-
-	CLEAR_SET_FIELD(*data, MSG_CMD_DATA_ADDR, ((uint64_t) vtophys(pkt_desc)));
-	CLEAR_SET_FIELD(*data, MSG_CMD_DATA_CTL, SEC_EOP);
-	CLEAR_SET_FIELD(*data, MSG_CMD_DATA_LEN, MSG_CMD_DATA_LEN_LOAD);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_packet:  DONE\n");
-
-#ifdef RMI_SEC_DEBUG
-	{
-		printf("data desc\n");
-		printf("srcLengthIVOffUseIVNext = 0x%llx\n", pkt_desc->srcLengthIVOffUseIVNext);
-		printf("dstDataSettings = 0x%llx\n", pkt_desc->dstDataSettings);
-		printf("authDstNonceLow = 0x%llx\n", pkt_desc->authDstNonceLow);
-		printf("ckSumDstNonceHiCFBMaskLLWMask = 0x%llx\n", pkt_desc->ckSumDstNonceHiCFBMaskLLWMask);
-	}
-
-	if (multi_frag_flag) {
-
-		printf("next data desc\n");
-		printf("srcLengthIVOffUseIVNext = 0x%llx\n", next_pkt_desc->srcLengthIVOffUseIVNext);
-		printf("dstDataSettings = 0x%llx\n", next_pkt_desc->dstDataSettings);
-		printf("authDstNonceLow = 0x%llx\n", next_pkt_desc->authDstNonceLow);
-		printf("ckSumDstNonceHiCFBMaskLLWMask = 0x%llx\n", next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask);
-	}
-#endif
-
-#ifdef SYMBOL
-	if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4) {
-		op->source_buf -= 0;
-		op->source_buf_size += 0;
-		op->dest_buf -= 0;
-	}
-#endif
-	return XLR_SEC_ERR_NONE;
-}
-
-
-static int 
-identify_symkey_ctl_error(uint32_t code, xlr_sec_error_t err)
-{
-	int ret_val = EINVAL;
-
-	switch (code) {
-	case CTL_ERR_NONE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error:  No Error\n");
-		ret_val = 0;
-		break;
-	case CTL_ERR_CIPHER_OP:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CIPHER_OP) - Unknown Cipher Op \n");
-		break;
-	case CTL_ERR_MODE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_MODE) - "
-		    "Unknown or Not Allowed Mode \n");
-		break;
-	case CTL_ERR_CHKSUM_SRC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CHKSUM_SRC) - Unknown CkSum Src\n");
-		break;
-	case CTL_ERR_CFB_MASK:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CFB_MASK) - Forbidden CFB Mask \n");
-		break;
-	case CTL_ERR_OP:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_OP) - Unknown Ctrl Op \n");
-		break;
-	case CTL_ERR_DATA_READ:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_DATA_READ) - Data Read Error\n");
-		break;
-	case CTL_ERR_DESC_CTRL:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_DESC_CTRL) - "
-		    "Descriptor Ctrl Field Error  \n");
-		break;
-	case CTL_ERR_UNDEF1:
-	case CTL_ERR_UNDEF2:
-	default:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error:  UNKNOWN CODE=%d \n", code);
-		break;
-	}
-	return ret_val;
-}
-
-static
-int 
-identify_symkey_data_error(uint32_t code, xlr_sec_error_t err)
-{
-	int ret_val = -EINVAL;
-
-	switch (code) {
-	case DATA_ERR_NONE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error  No Error\n");
-		ret_val = 0;
-		break;
-	case DATA_ERR_LEN_CIPHER:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Not Enough Data To Cipher\n");
-		break;
-	case DATA_ERR_IV_ADDR:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal IV Loacation\n");
-		break;
-	case DATA_ERR_WD_LEN_AES:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal Nb Words To AES\n");
-		break;
-	case DATA_ERR_BYTE_COUNT:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal Pad And ByteCount Spec\n");
-		break;
-	case DATA_ERR_LEN_CKSUM:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Not Enough Data To CkSum\n");
-		break;
-	case DATA_ERR_OP:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Unknown Data Op \n");
-		break;
-	case DATA_ERR_READ:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Data Read Error \n");
-		break;
-	case DATA_ERR_WRITE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Data Write Error \n");
-		break;
-	case DATA_ERR_UNDEF1:
-	default:
-		XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error - UNKNOWN CODE=%d \n", code);
-		break;
-	}
-	return ret_val;
-}
-
-
-static int
-xlr_sec_submit_message(symkey_desc_pt desc, uint32_t cfg_vector)
-{
-	xlr_sec_error_t err;
-	uint32_t ctl_error, data_error;
-	int ret_val = 0;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_submit_message:  ENTER\n");
-	err = XLR_SEC_ERR_NONE;
-	XLR_SEC_CMD_DIAG_SYM_DESC(desc, cfg_vector);
-
-	do {
-		/* For now, send message and wait for response */
-		err = xlr_sec_submit_op(desc);
-
-		XLR_SEC_CMD_DIAG("xlr_sec_submit_message:  err = %d \n", (uint32_t) err);
-
-		if (err != XLR_SEC_ERR_NONE) {
-			ret_val = (EINVAL);
-			break;
-		}
-		ctl_error = desc->ctl_result;
-		data_error = desc->data_result;
-
-		XLR_SEC_CMD_DIAG("xlr_sec_submit_message: ctl_error = %x   data_error = %x\n",
-		    ctl_error, data_error);
-
-		if ((ret_val = identify_symkey_ctl_error(ctl_error, err)) == 0)
-			ret_val = identify_symkey_data_error(data_error, err);
-
-		XLR_SEC_CMD_DIAG("xlr_sec_submit_message: identify error = %d \n", ret_val);
-
-	} while (0);
-
-	XLR_SEC_CMD_DIAG("xlr_sec_submit_message:  DONE\n");
-	return (ret_val);
-}
-
-
-static
-xlr_sec_error_t 
-xlr_sec_setup_cipher(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc,
-    uint32_t * vector)
-{
-	uint32_t aes_flag = 0;
-	uint32_t cipher_vector = 0;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ENTER  vector = %04x\n", *vector);
-
-	switch (op->cipher_type) {
-	case XLR_SEC_CIPHER_TYPE_NONE:
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_BYPASS);
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  CIPHER_TYPE_NONE EXIT\n");
-		return XLR_SEC_ERR_NONE;
-	case XLR_SEC_CIPHER_TYPE_DES:
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_DES;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_DES);
-		break;
-	case XLR_SEC_CIPHER_TYPE_3DES:
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_3DES;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_3DES);
-		break;
-	case XLR_SEC_CIPHER_TYPE_AES128:
-		aes_flag = 1;
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES128;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES128);
-		break;
-	case XLR_SEC_CIPHER_TYPE_AES192:
-		aes_flag = 1;
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES192;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES192);
-		break;
-	case XLR_SEC_CIPHER_TYPE_AES256:
-		aes_flag = 1;
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES256;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES256);
-		break;
-	case XLR_SEC_CIPHER_TYPE_ARC4:
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_ARC4;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_ARC4);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_KEYLEN,
-		    op->rc4_key_len);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_LOADSTATE,
-		    op->rc4_loadstate);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_SAVESTATE,
-		    op->rc4_savestate);
-		if (op->rc4_loadstate || op->rc4_savestate)
-			cipher_vector |= XLR_SEC_VECTOR_STATE;
-		break;
-	case XLR_SEC_CIPHER_TYPE_KASUMI_F8:
-		aes_flag = 1;
-		cipher_vector |= XLR_SEC_VECTOR_CIPHER_KASUMI_F8;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_KASUMI_F8);
-		break;
-	default:
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_TYPE EXIT\n");
-		return XLR_SEC_ERR_CIPHER_TYPE;
-	}
-
-	switch (op->cipher_mode) {
-	case XLR_SEC_CIPHER_MODE_ECB:
-		if (aes_flag == 1)
-			cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
-		else
-			cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_ECB);
-		break;
-	case XLR_SEC_CIPHER_MODE_CBC:
-		if (aes_flag == 1)
-			cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
-		else
-			cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CBC);
-		break;
-	case XLR_SEC_CIPHER_MODE_OFB:
-		if (aes_flag == 0) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_MODE EXIT\n");
-			return XLR_SEC_ERR_CIPHER_MODE;
-		}
-		cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_OFB);
-		break;
-	case XLR_SEC_CIPHER_MODE_CTR:
-		if (aes_flag == 0) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_MODE EXIT\n");
-			return XLR_SEC_ERR_CIPHER_MODE;
-		}
-		cipher_vector |= XLR_SEC_VECTOR_MODE_CTR_CFB;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CTR);
-		break;
-	case XLR_SEC_CIPHER_MODE_CFB:
-		if (aes_flag == 0) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_MODE EXIT\n");
-			return XLR_SEC_ERR_CIPHER_MODE;
-		}
-		cipher_vector |= XLR_SEC_VECTOR_MODE_CTR_CFB;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CFB);
-		break;
-	case XLR_SEC_CIPHER_MODE_F8:
-		if (aes_flag == 0) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_MODE EXIT\n");
-			return XLR_SEC_ERR_CIPHER_MODE;
-		}
-		cipher_vector |= XLR_SEC_VECTOR_MODE_F8;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_F8);
-		break;
-	default:
-		if (!(cipher_vector & (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_CIPHER_KASUMI_F8))) {
-			XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_MODE EXIT\n");
-			return XLR_SEC_ERR_CIPHER_MODE;
-		}
-	}
-
-	switch (op->cipher_init) {
-	case XLR_SEC_CIPHER_INIT_OK:
-		SET_FIELD(ctl_desc->instruction,
-		    CTL_DSC_ICPHR, CTL_DSC_ICPHR_OKY);
-		break;
-
-	case XLR_SEC_CIPHER_INIT_NK:
-		SET_FIELD(ctl_desc->instruction,
-		    CTL_DSC_ICPHR, CTL_DSC_ICPHR_NKY);
-		break;
-	default:
-		XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  ERR_CIPHER_INIT EXIT\n");
-		return XLR_SEC_ERR_CIPHER_INIT;
-	}
-
-	*vector |= cipher_vector;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher:  EXIT  vector = %04x\n", *vector);
-
-	return XLR_SEC_ERR_NONE;
-}
-
-static
-xlr_sec_error_t 
-xlr_sec_setup_digest(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc,
-    uint32_t * vector)
-{
-	uint32_t hash_flag = 0;
-	uint32_t hmac_flag = 0;
-	uint32_t digest_vector = 0;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_digest:  ENTER  vector = %04x\n", *vector);
-
-	switch (op->digest_type) {
-	case XLR_SEC_DIGEST_TYPE_MD5:
-		digest_vector |= XLR_SEC_VECTOR_MAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_MD5);
-		break;
-	case XLR_SEC_DIGEST_TYPE_SHA1:
-		digest_vector |= XLR_SEC_VECTOR_MAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA1);
-		break;
-	case XLR_SEC_DIGEST_TYPE_SHA256:
-		digest_vector |= XLR_SEC_VECTOR_MAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA256);
-		break;
-	case XLR_SEC_DIGEST_TYPE_SHA384:
-		digest_vector |= XLR_SEC_VECTOR_MAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA384 >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA384);
-		break;
-	case XLR_SEC_DIGEST_TYPE_SHA512:
-		digest_vector |= XLR_SEC_VECTOR_MAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA512 >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA512);
-		break;
-	case XLR_SEC_DIGEST_TYPE_GCM:
-		hash_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_GCM;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_GCM >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_GCM);
-		break;
-	case XLR_SEC_DIGEST_TYPE_KASUMI_F9:
-		hash_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_F9;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_KASUMI_F9 >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_KASUMI_F9);
-		break;
-	case XLR_SEC_DIGEST_TYPE_HMAC_MD5:
-		hmac_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_HMAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_MD5);
-		break;
-	case XLR_SEC_DIGEST_TYPE_HMAC_SHA1:
-		hmac_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_HMAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA1);
-		break;
-	case XLR_SEC_DIGEST_TYPE_HMAC_SHA256:
-		hmac_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_HMAC;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA256);
-		break;
-	case XLR_SEC_DIGEST_TYPE_HMAC_SHA384:
-		hmac_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_HMAC2;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA384 >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA384);
-		break;
-	case XLR_SEC_DIGEST_TYPE_HMAC_SHA512:
-		hmac_flag = 1;
-		digest_vector |= XLR_SEC_VECTOR_HMAC2;
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA512 >> 2);
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA512);
-		break;
-	default:
-		return XLR_SEC_ERR_DIGEST_TYPE;
-	}
-
-	if (hmac_flag == 1) {
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_HMAC, CTL_DSC_HMAC_ON);
-
-	}
-	if (hmac_flag || hash_flag) {
-		switch (op->digest_init) {
-		case XLR_SEC_DIGEST_INIT_OLDKEY:
-			SET_FIELD(ctl_desc->instruction, CTL_DSC_IHASH, CTL_DSC_IHASH_OLD);
-			break;
-		case XLR_SEC_DIGEST_INIT_NEWKEY:
-			SET_FIELD(ctl_desc->instruction, CTL_DSC_IHASH, CTL_DSC_IHASH_NEW);
-			break;
-		default:
-			return XLR_SEC_ERR_DIGEST_INIT;
-		}
-	}			/* hmac_flag */
-	*vector |= digest_vector;
-
-	XLR_SEC_CMD_DIAG("xlr_sec_setup_digest: EXIT  vector = %04x\n", *vector);
-	return XLR_SEC_ERR_NONE;
-}
-
-static
-xlr_sec_error_t 
-xlr_sec_setup_cksum(xlr_sec_io_pt op,
-    ControlDescriptor_pt ctl_desc)
-{
-	switch (op->cksum_type) {
-		case XLR_SEC_CKSUM_TYPE_NOP:
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CKSUM, CTL_DSC_CKSUM_NOP);
-		return XLR_SEC_ERR_NONE;
-	case XLR_SEC_CKSUM_TYPE_IP:
-		SET_FIELD(ctl_desc->instruction, CTL_DSC_CKSUM, CTL_DSC_CKSUM_IP);
-		break;
-	default:
-		return XLR_SEC_ERR_CKSUM_TYPE;
-	}
-
-	return XLR_SEC_ERR_NONE;
-}
-
-
-static
-xlr_sec_error_t 
-xlr_sec_control_setup(xlr_sec_io_pt op,
-    unsigned int flags,
-    uint64_t * control,
-    ControlDescriptor_pt ctl_desc,
-    xlr_sec_drv_user_t * user,
-    uint32_t vector)
-{
-	uint64_t *hmac_key = NULL;
-	uint64_t *cipher_key = NULL;
-	uint64_t *cipher_state = NULL;
-	uint32_t ctl_size = 0;
-	uint64_t ctl_addr = 0;
-	uint32_t cipher_keylen = 0;
-	uint32_t hmac_keylen = 0;
-	uint32_t ctl_len;
-
-#ifdef SYM_DEBUG
-	XLR_SEC_CMD_DIAG(" ENTER  vector = %04x\n", vector);
-#endif
-
-	switch (vector) {
-	case XLR_SEC_VECTOR_MAC:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR_MAC \n");
-		ctl_size = sizeof(HMAC_t);
-		break;
-	case XLR_SEC_VECTOR_HMAC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_HMAC  \n");
-		hmac_key = &ctl_desc->cipherHashInfo.infoHMAC.hmacKey0;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(HMAC_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4.cipherKey0;
-		cipher_keylen = op->rc4_key_len;
-		ctl_size = sizeof(ARC4_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4HMAC.hmacKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(ARC4HMAC_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__STATE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__STATE\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4State.cipherKey0;
-		cipher_state =
-		    &ctl_desc->cipherHashInfo.infoARC4State.Arc4SboxData0;
-		cipher_keylen = op->rc4_key_len;
-		ctl_size = sizeof(ARC4State_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC.cipherKey0;
-		cipher_state =
-		    &ctl_desc->cipherHashInfo.infoARC4StateHMAC.Arc4SboxData0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC.hmacKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(ARC4StateHMAC_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8.cipherKey0;
-		cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
-		ctl_size = sizeof(KASUMIF8_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC.cipherKey0;
-		cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
-		hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC.hmacKey0;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(KASUMIF8HMAC_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC2.cipherKey0;
-		cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
-		hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC2.hmacKey0;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(KASUMIF8HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8GCM.cipherKey0;
-		cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
-		hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8GCM.GCMH0;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(KASUMIF8GCM_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8F9.cipherKey0;
-		cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
-		hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8F9.authKey0;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(KASUMIF8F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoDESHMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoDESHMAC.hmacKey0;
-		hmac_keylen = sizeof(HMAC_t);
-		cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
-		ctl_size = sizeof(DESHMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoDES.cipherKey0;
-		cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
-		ctl_size = sizeof(DES_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.info3DESHMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.info3DESHMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(DES3HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.info3DES.cipherKey0;
-		cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
-		ctl_size = sizeof(DES3_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES128HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128.cipherKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		ctl_size = sizeof(AES128_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES128HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128.cipherKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		ctl_size = sizeof(AES128_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES128F8HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8.cipherKey0;
-		cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
-		ctl_size = sizeof(AES128F8_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES192HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192.cipherKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		ctl_size = sizeof(AES192_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES192HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192.cipherKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		ctl_size = sizeof(AES192_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES192F8HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8.cipherKey0;
-		cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
-		ctl_size = sizeof(AES192F8_t);
-		break;
-
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES256HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256.cipherKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		ctl_size = sizeof(AES256_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES256HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256.cipherKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		ctl_size = sizeof(AES256_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC_t);
-		ctl_size = sizeof(AES256F8HMAC_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8.cipherKey0;
-		cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
-		ctl_size = sizeof(AES256F8_t);
-		break;
-	case XLR_SEC_VECTOR_HMAC2:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_HMAC2  \n");
-		hmac_key = &ctl_desc->cipherHashInfo.infoHMAC2.hmacKey0;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4HMAC2.hmacKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(ARC4HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.cipherKey0;
-		cipher_state =
-		    &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.Arc4SboxData0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.hmacKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(ARC4StateHMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoDESHMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoDESHMAC2.hmacKey0;
-		hmac_keylen = sizeof(HMAC2_t);
-		cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
-		ctl_size = sizeof(DESHMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.info3DESHMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.info3DESHMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(DES3HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES128HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES128HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES128F8HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES192HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES192HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES192F8HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES256HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES256HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC2.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC2.hmacKey0;
-		cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
-		hmac_keylen = sizeof(HMAC2_t);
-		ctl_size = sizeof(AES256F8HMAC2_t);
-		break;
-	case XLR_SEC_VECTOR_GCM:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_GCM  \n");
-		hmac_key = &ctl_desc->cipherHashInfo.infoGCM.GCMH0;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(GCM_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__GCM:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__GCM\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4GCM.GCMH0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(ARC4GCM_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateGCM.cipherKey0;
-		cipher_state =
-		    &ctl_desc->cipherHashInfo.infoARC4StateGCM.Arc4SboxData0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateGCM.GCMH0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(ARC4StateGCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoDESGCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoDESGCM.GCMH0;
-		hmac_keylen = sizeof(GCM_t);
-		cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
-		ctl_size = sizeof(DESGCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.info3DESGCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.info3DESGCM.GCMH0;
-		cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(DES3GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES128GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES128GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES128F8GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES192GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES192GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES192F8GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES256GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES256GCM_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8GCM.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8GCM.GCMH0;
-		cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
-		hmac_keylen = sizeof(GCM_t);
-		ctl_size = sizeof(AES256F8GCM_t);
-		break;
-	case XLR_SEC_VECTOR_F9:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_F9  \n");
-		hmac_key = &ctl_desc->cipherHashInfo.infoF9.authKey0;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(F9_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__F9:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__F9\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4F9.authKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(ARC4F9_t);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE\n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateF9.cipherKey0;
-		cipher_state =
-		    &ctl_desc->cipherHashInfo.infoARC4StateF9.Arc4SboxData0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateF9.authKey0;
-		cipher_keylen = op->rc4_key_len;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(ARC4StateF9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoDESF9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoDESF9.authKey0;
-		hmac_keylen = sizeof(F9_t);
-		cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
-		ctl_size = sizeof(DESF9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.info3DESF9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.info3DESF9.authKey0;
-		cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(DES3F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F9.authKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES128F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F9.authKey0;
-		cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES128F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8F9.authKey0;
-		cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES128F8F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F9.authKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES192F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F9.authKey0;
-		cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES192F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8F9.authKey0;
-		cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES192F8F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F9.authKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES256F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F9.authKey0;
-		cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES256F9_t);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8:
-		XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8  \n");
-		cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8F9.cipherKey0;
-		hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8F9.authKey0;
-		cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
-		hmac_keylen = sizeof(F9_t);
-		ctl_size = sizeof(AES256F8F9_t);
-		break;
-
-	default:
-		XLR_SEC_CMD_DIAG("default  \n");
-		return XLR_SEC_ERR_CONTROL_VECTOR;
-	}
-
-	if ((cipher_key != NULL) && !(flags & XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY))
-		memcpy(cipher_key, &op->crypt_key[0], cipher_keylen);
-
-	if ((hmac_key != NULL) && !(flags & XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY))
-		memcpy(hmac_key, &op->mac_key[0], hmac_keylen);
-	if (cipher_state) {
-		if (op->rc4_loadstate)
-			memcpy(cipher_state, (void *)(unsigned long)op->rc4_state,
-			    XLR_SEC_MAX_RC4_STATE_SIZE);
-		if (op->rc4_savestate)
-			user->aligned_state = (char *)cipher_state;
-	}
-	if (flags & XLR_SEC_SETUP_OP_FLIP_3DES_KEY) {
-		uint64_t temp;
-
-		temp = ctl_desc->cipherHashInfo.info3DES.cipherKey0;
-		ctl_desc->cipherHashInfo.info3DES.cipherKey0 =
-		    ctl_desc->cipherHashInfo.info3DES.cipherKey2;
-		ctl_desc->cipherHashInfo.info3DES.cipherKey2 = temp;
-	}
-	/*
-	 * Control length is the number of control cachelines to be read so
-	 * user needs to round up the control length to closest integer
-	 * multiple of 32 bytes.
-	 */
-	ctl_size += sizeof(ctl_desc->instruction);
-	ctl_len = NUM_CHUNKS(ctl_size, 5);
-	XLR_SEC_CMD_DIAG("ctl_size in bytes: %u, in cachelines: %u\n", ctl_size, ctl_len);
-	CLEAR_SET_FIELD(*control, MSG_CMD_CTL_LEN, ctl_len);
-
-	ctl_addr = (uint64_t) vtophys(ctl_desc);
-	CLEAR_SET_FIELD(*control, MSG_CMD_CTL_ADDR, ctl_addr);
-
-	XLR_SEC_CMD_DIAG(" xlr_sec_control_setup():  ctl_desc=%p   ctl_addr=%llx \n",
-	    ctl_desc, (unsigned long long)ctl_addr);
-
-	CLEAR_SET_FIELD(*control, MSG_CMD_CTL_CTL, SEC_SOP);
-
-	return XLR_SEC_ERR_NONE;
-}
-
-xlr_sec_error_t
-xlr_sec_submit_op(symkey_desc_pt desc)
-{
-	struct msgrng_msg send_msg;
-
-	int rsp_dest_id, cpu, hard_cpu, hard_thread;
-	int code, retries;
-	unsigned long msgrng_flags = 0;
-
-	/* threads (0-3) are orthogonal to buckets 0-3 */
-	cpu = xlr_cpu_id();
-
-	hard_cpu = cpu >> 2;
-	hard_thread = cpu & 0x3;/* thread id */
-	rsp_dest_id = (hard_cpu << 3) + hard_thread;
-
-	desc->op_ctl.cpu = hard_cpu;
-	desc->op_ctl.flags = 0;	/* called from kernel thread */
-
-	XLR_SEC_CMD_DIAG("[%s]:%d:  cpu=0x%x  hard_cpu=0x%x  hard_thrd=0x%x  id=0x%x \n",
-	    __FUNCTION__, __LINE__, cpu, hard_cpu, hard_thread, rsp_dest_id);
-
-	/*
-	 * Set DestId in Message Control Word. This tells the Security
-	 * Engine which bucket to send the reply to for this CPU
-	 */
-	CLEAR_SET_FIELD(desc->control, MSG_CMD_CTL_ID, rsp_dest_id);
-	CLEAR_SET_FIELD(desc->data, MSG_CMD_CTL_ID, rsp_dest_id);
-
-	CLEAR_SET_FIELD(desc->control, MSG_CTL_OP_TYPE, MSG0_CTL_OP_ENGINE_SYMKEY);
-	CLEAR_SET_FIELD(desc->data, MSG_CTL_OP_TYPE, MSG1_CTL_OP_SYMKEY_PIPE0);
-
-	send_msg.msg0 = desc->control | (1ULL << 53);
-	send_msg.msg1 = desc->data | (1ULL << 53) | (1ULL << 52);
-	send_msg.msg2 = send_msg.msg3 = 0;
-
-	desc->op_ctl.flags = 1;
-	//in_interrupt();	/* ipsec softirq ? */
-
-	XLR_SEC_CMD_DIAG("[%s]: IN_IRQ=%d  msg0=0x%llx  msg1=0x%llx \n",
-	    __FUNCTION__, desc->op_ctl.flags, send_msg.msg0, send_msg.msg1);
-
-	retries = 100;
-	while (retries--) {
-		msgrng_flags = msgrng_access_enable();
-		code = message_send(SEC_MSGRING_WORDSIZE, MSGRNG_CODE_SEC,
-		    desc->op_ctl.stn_id, &send_msg);
-		msgrng_restore(msgrng_flags);
-		if (code == 0)
-			break;
-	}
-	return (XLR_SEC_ERR_NONE);
-}
-
-symkey_desc_pt 
-xlr_sec_allocate_desc(void *session_ptr)
-{
-	uint64_t addr;
-	symkey_desc_pt aligned, new;
-
-	new = (symkey_desc_pt) malloc(sizeof(symkey_desc_t),
-	    M_DEVBUF, M_NOWAIT | M_ZERO);
-
-	if (new == NULL)
-		return (NULL);
-
-	new->ses = session_ptr;
-
-	new->user.kern_src = new->user.aligned_src =
-	    (uint8_t *) contigmalloc(256 * 1024 + 1024,
-	    M_DEVBUF, M_NOWAIT | M_ZERO,
-	    0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
-	if (new->user.kern_src == NULL) {
-		printf("ERROR - malloc failed for user.kern_src\n");
-		return NULL;
-	}
-	new->user.aligned_dest = new->user.kern_dest =
-	    (uint8_t *) contigmalloc(257 * 1024,
-	    M_DEVBUF, M_NOWAIT | M_ZERO,
-	    0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
-	if (new->user.aligned_dest == NULL) {
-		printf("ERROR - malloc failed for user.aligned_dest\n");
-		return NULL;
-	}
-	new->next_src_buf = (uint8_t *) contigmalloc(256 * 1024 + 1024,
-	    M_DEVBUF, M_NOWAIT | M_ZERO,
-	    0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
-	if (new->next_src_buf == NULL) {
-		printf("ERROR - malloc failed for next_src_buf\n");
-		return NULL;
-	}
-	new->next_dest_buf =
-	    (uint8_t *) contigmalloc(257 * 1024,
-	    M_DEVBUF, M_NOWAIT | M_ZERO,
-	    0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
-	if (new->next_dest_buf == NULL) {
-		printf("ERROR - malloc failed for next_dest_buf\n");
-		return NULL;
-	}
-	new->user.kern_auth = new->user.user_auth = NULL;
-	new->user.aligned_auth = new->user.user_auth = NULL;
-
-	/* find cacheline alignment */
-	aligned = new;
-	addr = (uint64_t) vtophys(new);
-
-	/* save for free */
-	aligned->alloc = new;
-
-	/* setup common control info */
-	aligned->op_ctl.phys_self = addr;
-	aligned->op_ctl.stn_id = MSGRNG_STNID_SEC0;
-	aligned->op_ctl.vaddr = (uintptr_t)aligned;
-
-	return (aligned);
-}
-
-
-static void 
-xlr_sec_free_desc(symkey_desc_pt desc)
-{
-	if ((desc == NULL) || (desc->alloc == NULL)) {
-		printf("%s:  NULL descriptor \n", __FUNCTION__);
-		return;
-	}
-	contigfree(desc, sizeof(symkey_desc_t), M_DEVBUF);
-	return;
-}
-
-void 
-print_buf(char *desc, void *data, int len)
-{
-	uint8_t *dp;
-	int i;
-
-	DPRINT("%s: ", desc);	/* newline done in for-loop */
-	dp = data;
-	for (i = 0; i < len; i++, dp++) {
-		if ((i % 16) == 0)
-			DPRINT("\n");
-		DPRINT(" %c%c",
-		    nib2hex[(((*dp) & 0xf0) >> 4)],
-		    nib2hex[((*dp) & 0x0f)]);
-	}
-	DPRINT("\n");
-}
-
-
-#ifdef XLR_SEC_CMD_DEBUG
-static void
-decode_symkey_desc(symkey_desc_pt desc, uint32_t cfg_vector)
-{
-
-	unsigned long long word;
-
-	/* uint8_t   *info; */
-	/* int i; */
-
-	DPRINT("MSG - CTL: \n");
-	DPRINT("\t CTRL      = %lld \n",
-	    GET_FIELD(desc->control, MSG_CMD_CTL_CTL));
-	DPRINT("\t CTRL LEN  = %lld \n",
-	    GET_FIELD(desc->control, MSG_CMD_CTL_LEN));
-	DPRINT("\t CTRL ADDR = %llx \n\n",
-	    GET_FIELD(desc->control, MSG_CMD_CTL_ADDR));
-
-	DPRINT("MSG - DATA: \n");
-	DPRINT("\t CTRL      = %lld \n",
-	    GET_FIELD(desc->data, MSG_CMD_DATA_CTL));
-	DPRINT("\t DATA LEN  = %lld \n",
-	    GET_FIELD(desc->data, MSG_CMD_DATA_LEN));
-	DPRINT("\t DATA ADDR = %llx \n\n",
-	    GET_FIELD(desc->data, MSG_CMD_DATA_ADDR));
-
-	DPRINT("CONTROL DESCRIPTOR: \n");
-	word = desc->ctl_desc.instruction;
-	DPRINT("\tINSTRUCTION:   %llx\n", word);
-	DPRINT("\t\tOVERRIDE CIPH = %lld \n", GET_FIELD(word, CTL_DSC_OVERRIDECIPHER));
-	DPRINT("\t\tARC4 WAIT     = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_WAIT4SAVE));
-	DPRINT("\t\tARC4 SAVE     = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_SAVESTATE));
-	DPRINT("\t\tARC4 LOAD     = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_LOADSTATE));
-	DPRINT("\t\tARC4 KEYLEN   = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-	DPRINT("\t\tCIPHER        = %lld \n", GET_FIELD(word, CTL_DSC_CPHR));
-	DPRINT("\t\tCIPHER MODE   = %lld \n", GET_FIELD(word, CTL_DSC_MODE));
-	DPRINT("\t\tINIT CIPHER   = %lld \n", GET_FIELD(word, CTL_DSC_ICPHR));
-	DPRINT("\t\tHMAC          = %lld \n", GET_FIELD(word, CTL_DSC_HMAC));
-	DPRINT("\t\tHASH ALG      = %lld \n", GET_FIELD(word, CTL_DSC_HASH) | (GET_FIELD(word, CTL_DSC_HASHHI) << 2));
-	DPRINT("\t\tINIT HASH     = %lld \n", GET_FIELD(word, CTL_DSC_IHASH));
-	DPRINT("\t\tCHKSUM        = %lld \n", GET_FIELD(word, CTL_DSC_CKSUM));
-	DPRINT("\tCIPHER HASH INFO: \n");
-#if 0
-	info = (uint8_t *) & desc->ctl_desc->cipherHashInfo;
-	for (i = 0; i < sizeof(CipherHashInfo_t); i++, info++) {
-		DPRINT(" %02x", *info);
-		if (i && (i % 16) == 0)
-			DPRINT("\n");
-	}
-	DPRINT("\n\n");
-#endif
-
-	switch (cfg_vector) {
-	case XLR_SEC_VECTOR_CIPHER_ARC4:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4 \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__HMAC \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4HMAC.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__STATE:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__STATE \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4State.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_KASUMI_F8 \n");
-		print_buf("KASUMI_F8 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8.cipherKey0,
-		    XLR_SEC_KASUMI_F8_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC:
-		DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC\n");
-		print_buf("KASUMI_F8 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC.cipherKey0,
-		    XLR_SEC_KASUMI_F8_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2:
-		DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2\n");
-		print_buf("KASUMI_F8 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC2.cipherKey0,
-		    XLR_SEC_KASUMI_F8_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM:
-		DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM\n");
-		print_buf("KASUMI_F8 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8GCM.cipherKey0,
-		    XLR_SEC_KASUMI_F8_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8GCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9:
-		DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9\n");
-		print_buf("KASUMI_F8 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8F9.cipherKey0,
-		    XLR_SEC_KASUMI_F8_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoKASUMIF8F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR_MAC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_MAC \n");
-		DPRINT("MAC-ONLY - No Info\n");
-		break;
-	case XLR_SEC_VECTOR_HMAC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_HMAC \n");
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoHMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESHMAC.cipherKey0,
-		    XLR_SEC_DES_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESHMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDES.cipherKey0,
-		    XLR_SEC_DES_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESHMAC.cipherKey0,
-		    XLR_SEC_3DES_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESHMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DES.cipherKey0,
-		    XLR_SEC_3DES_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		break;
-
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2 \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4HMAC2.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC2.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR_HMAC2:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_HMAC2 \n");
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoHMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESHMAC2.cipherKey0,
-		    XLR_SEC_DES_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESHMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESHMAC2.cipherKey0,
-		    XLR_SEC_3DES_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESHMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__GCM:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__GCM \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4GCM.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4GCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateGCM.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateGCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR_GCM:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_GCM \n");
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoGCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESGCM.cipherKey0,
-		    XLR_SEC_DES_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESGCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESGCM.cipherKey0,
-		    XLR_SEC_3DES_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESGCM.GCMH0,
-		    sizeof(GCM_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128GCM.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128GCM.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192GCM.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192GCM.GCMH0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192GCM.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192GCM.GCMH0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256GCM.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256GCM.GCMH0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256GCM.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256GCM.GCMH0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__F9:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__F9 \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4F9.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE \n");
-		print_buf("ARC4 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateF9.cipherKey0,
-		    GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoARC4StateF9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR_F9:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR_F9 \n");
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoF9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESF9.cipherKey0,
-		    XLR_SEC_DES_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoDESF9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESF9.cipherKey0,
-		    XLR_SEC_3DES_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.info3DESF9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F9.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F9.cipherKey0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F9.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB\n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F9.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F9.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F9.cipherKey0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC.cipherKey0,
-		    XLR_SEC_AES128F8_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8.cipherKey0,
-		    XLR_SEC_AES128F8_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC.cipherKey0,
-		    XLR_SEC_AES192F8_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8.cipherKey0,
-		    XLR_SEC_AES192F8_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC.cipherKey0,
-		    XLR_SEC_AES256F8_KEY_LENGTH);
-		print_buf("HMAC Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
-		    sizeof(HMAC_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8.cipherKey0,
-		    XLR_SEC_AES256F8_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC2.cipherKey0,
-		    XLR_SEC_AES128F8_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC2.cipherKey0,
-		    XLR_SEC_AES192F8_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC2.cipherKey0,
-		    XLR_SEC_AES256F8_KEY_LENGTH);
-		print_buf("HMAC2 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC2.hmacKey0,
-		    sizeof(HMAC2_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8GCM.cipherKey0,
-		    XLR_SEC_AES128F8_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
-		    XLR_SEC_AES128_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8GCM.cipherKey0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8GCM.GCMH0,
-		    XLR_SEC_AES192_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8GCM.cipherKey0,
-		    XLR_SEC_AES256F8_KEY_LENGTH);
-		print_buf("GCM Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8GCM.GCMH0,
-		    XLR_SEC_AES256_KEY_LENGTH);
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8F9.cipherKey0,
-		    XLR_SEC_AES128F8_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES128F8F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8F9.cipherKey0,
-		    XLR_SEC_AES192F8_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES192F8F9.authKey0,
-		    sizeof(F9_t));
-		break;
-	case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8:
-		DPRINT("VECTOR:  XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \n");
-		print_buf("CIPHER Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8F9.cipherKey0,
-		    XLR_SEC_AES256F8_KEY_LENGTH);
-		print_buf("F9 Key",
-		    &desc->ctl_desc.cipherHashInfo.infoAES256F8F9.authKey0,
-		    sizeof(F9_t));
-		break;
-
-	default:
-		DPRINT("VECTOR:  ???? \n");
-		DPRINT(">>>  WHAT THE HECK !!!  <<< \n");
-		break;
-	}
-	DPRINT("PACKET DESCRIPTOR: \n");
-	word = 0; //desc->pkt_desc.srcLengthIVOffUseIVNext;
-	DPRINT("\tSrcLengthIVOffsetIVNext:   %llx\n", word);
-	DPRINT("\t\tLoad HMAC         = %lld \n",
-	    GET_FIELD(word, PKT_DSC_LOADHMACKEY));
-	DPRINT("\t\tPad Hash          = %lld \n",
-	    GET_FIELD(word, PKT_DSC_PADHASH));
-	DPRINT("\t\tHash Byte Count   = %lld \n",
-	    GET_FIELD(word, PKT_DSC_HASHBYTES));
-	DPRINT("\t\tNext              = %lld \n",
-	    GET_FIELD(word, PKT_DSC_NEXT));
-	DPRINT("\t\tUse IV            = %lld \n",
-	    GET_FIELD(word, PKT_DSC_IV));
-	DPRINT("\t\tIV Offset         = %lld \n",
-	    GET_FIELD(word, PKT_DSC_IVOFF));
-	DPRINT("\t\tPacket Length     = %lld \n",
-	    GET_FIELD(word, PKT_DSC_PKTLEN));
-	DPRINT("\t\tNLHMAC            = %lld \n", GET_FIELD(word, PKT_DSC_NLHMAC));
-	DPRINT("\t\tBreak             = %lld \n", GET_FIELD(word, PKT_DSC_BREAK));
-	DPRINT("\t\tWait              = %lld \n", GET_FIELD(word, PKT_DSC_WAIT));
-	DPRINT("\t\tSegment Src Addr  = %llx \n",
-	    (GET_FIELD(word, PKT_DSC_SEGADDR) << 5) & 0xffffffffffULL);
-	DPRINT("\t\tSRTCP             = %lld \n", GET_FIELD(word, PKT_DSC_SRTCP));
-	DPRINT("\t\tGlobal Src Offset = %lld \n",
-	    GET_FIELD(word, PKT_DSC_SEGOFFSET));
-
-	word = 0; //desc->pkt_desc.dstDataSettings;
-	DPRINT("\tdstDataSettings:  %llx \n", word);
-	DPRINT("\t\tArc4 Byte Count   = %lld \n", GET_FIELD(word,
-	    PKT_DSC_ARC4BYTECOUNT));
-	DPRINT("\t\tSym Operation     = %lld \n", GET_FIELD(word, PKT_DSC_SYM_OP));
-	DPRINT("\t\tCipher Offset     = %lld \n", GET_FIELD(word, PKT_DSC_CPHROFF));
-	DPRINT("\t\tHash Offset       = %lld \n", GET_FIELD(word, PKT_DSC_HASHOFF));
-	DPRINT("\t\tHash Source       = %lld \n", GET_FIELD(word, PKT_DSC_HASHSRC));
-	DPRINT("\t\tChecksum Offset   = %lld \n", GET_FIELD(word,
-	    PKT_DSC_CKSUMOFF));
-	DPRINT("\t\tChecksum Source   = %lld \n", GET_FIELD(word,
-	    PKT_DSC_CKSUMSRC));
-	DPRINT("\t\tCipher Dest Addr  = %llx \n", GET_FIELD(word,
-	    PKT_DSC_CPHR_DST_ADDR));
-	DPRINT("\t\tCipher Dest Dword = %lld \n", GET_FIELD(word,
-	    PKT_DSC_CPHR_DST_DWOFFSET));
-	DPRINT("\t\tCipher Dest Offset= %lld \n", GET_FIELD(word,
-	    PKT_DSC_CPHR_DST_OFFSET));
-	word = 0; //desc->pkt_desc.authDstNonceLow;
-	DPRINT("\tauthDstNonceLow:  %llx \n", word);
-	DPRINT("\t\tNonce Low 24      = %lld \n", GET_FIELD(word,
-	    PKT_DSC_NONCE_LOW));
-	DPRINT("\t\tauthDst           = %llx \n", GET_FIELD(word,
-	    PKT_DSC_AUTH_DST_ADDR));
-	DPRINT("\t\tCipher Offset High= %lld \n", GET_FIELD(word,
-	    PKT_DSC_CIPH_OFF_HI));
-	word = 0; //desc->pkt_desc.ckSumDstNonceHiCFBMaskLLWMask;
-	DPRINT("\tckSumDstNonceHiCFBMaskLLWMask:  %llx \n", word);
-	DPRINT("\t\tHash Byte off     = %lld \n", GET_FIELD(word, PKT_DSC_HASH_BYTE_OFF));
-	DPRINT("\t\tPacket Len bytes  = %lld \n", GET_FIELD(word, PKT_DSC_PKTLEN_BYTES));
-	DPRINT("\t\tLast Long Word Mask = %lld \n", GET_FIELD(word,
-	    PKT_DSC_LASTWORD));
-	DPRINT("\t\tCipher Dst Address  = %llx \n", GET_FIELD(word,
-	    PKT_DSC_CPHR_DST_ADDR));
-	DPRINT("\t\tGlobal Dst Offset  = %lld \n", GET_FIELD(word,
-	    PKT_DSC_CPHR_DST_OFFSET));
-
-	DPRINT("CFG_VECTOR = %04x\n", cfg_vector);
-	DPRINT("\n\n");
-}
-
-#endif
-
-
-
-/* This function is called from an interrupt handler */
-void 
-xlr_sec_msgring_handler(int bucket, int size, int code, int stid,
-    struct msgrng_msg *msg, void *data)
-{
-	uint64_t error;
-	uint64_t addr, sec_eng, sec_pipe;
-	xlr_sec_io_pt op = NULL;
-	symkey_desc_pt desc = NULL;
-	struct xlr_sec_session *ses = NULL;
-	struct xlr_sec_command *cmd = NULL;
-	uint32_t flags;
-
-	if (code != MSGRNG_CODE_SEC) {
-		panic("xlr_sec_msgring_handler: bad code = %d,"
-		    " expected code = %d\n",
-		    code, MSGRNG_CODE_SEC);
-	}
-	if ((stid < MSGRNG_STNID_SEC0) || (stid > MSGRNG_STNID_PK0)) {
-		panic("xlr_sec_msgring_handler: bad stn id = %d, expect %d - %d\n",
-		    stid, MSGRNG_STNID_SEC0, MSGRNG_STNID_PK0);
-	}
-	/*
-	 * The Submit() operation encodes the engine and pipe in these two
-	 * separate fields.  This allows use to verify the result type with
-	 * the submitted operation type.
-	 */
-	sec_eng = GET_FIELD(msg->msg0, MSG_CTL_OP_TYPE);
-	sec_pipe = GET_FIELD(msg->msg1, MSG_CTL_OP_TYPE);
-
-	error = msg->msg0 >> 40 & 0x1ff;
-	if (error)
-		printf("ctrl error = 0x%llx\n", error);
-	error = msg->msg1 >> 40 & 0x1ff;
-	if (error)
-		printf("data error = 0x%llx\n", error);
-
-
-	XLR_SEC_CMD_DIAG("[%s]:  eng=%lld  pipe=%lld\n",
-	    __FUNCTION__, sec_eng, sec_pipe);
-
-	/* Symmetric Key Operation ? */
-	if (sec_eng == MSG0_CTL_OP_ENGINE_SYMKEY) {
-
-		/*
-		 * The data descriptor address allows us to associate the
-		 * response with the submitted operation. Address is 40-bit
-		 * cacheline aligned address. We need to zero bit 0-4 since
-		 * they are used for the engine and pipe Id.
-		 */
-		addr = GET_FIELD(msg->msg1, MSG_RSLT_DATA_DSC_ADDR);
-		addr = addr & ~((1 << 5) - 1);
-		if (!addr) {
-			panic("[%s:STNID_SEC]:  NULL symkey addr!\n", __FUNCTION__);
-		}
-
-		/*
-		 * The adddress points to the data descriptor. The operation
-		 * descriptor is defined with the 32-byte cacheline size in
-		 * mind.  It allows the code to use this address to
-		 * reference the symkey descriptor.   (ref:  xlr_sec_desc.h)
-		 */
-		addr = addr - sizeof(OperationDescriptor_t);
-		flags = xlr_enable_kx();
-		desc = (symkey_desc_pt)(uintptr_t)xlr_paddr_ld(addr + 
-		    offsetof(OperationDescriptor_t, vaddr));
-		xlr_restore_kx(flags);
-
-		if (!desc) {
-			printf("\nerror : not getting desc back correctly \n");
-			panic("[%s:STNID_SEC]:  NULL symkey data descriptor!\n", __FUNCTION__);
-		}
-		ses = (struct xlr_sec_session *)desc->ses;
-		if (!ses) {
-			printf("\n error : not getting ses back correctly \n");
-			panic("[%s:STNID_SEC]:  NULL symkey data descriptor!\n", __FUNCTION__);
-		}
-		cmd = &ses->cmd;
-		if (!cmd) {
-			printf("\n error : not getting cmd back correctly \n");
-			panic("[%s:STNID_SEC]:  NULL symkey data descriptor!\n", __FUNCTION__);
-		}
-		op = &cmd->op;
-		if (!op) {
-			printf("\n error : not getting op back correctly \n");
-			panic("[%s:STNID_SEC]:  NULL symkey data descriptor!\n", __FUNCTION__);
-		}
-		XLR_SEC_CMD_DIAG("[%s:STNID_SEC]:  addr=0x%llx  desc=%p  alloc=%p \n",
-		    __FUNCTION__, addr, desc, desc->alloc);
-
-		XLR_SEC_CMD_DIAG("[%s:STNID_SEC]:  op_ctl=%p  phys_self=%llx  stn_id=%d \n",
-		    __FUNCTION__, &desc->op_ctl, desc->op_ctl.phys_self,
-		    desc->op_ctl.stn_id);
-
-		if (addr != desc->op_ctl.phys_self) {
-			XLR_SEC_CMD_DIAG("[%s:STNID_SEC]:  Control Descriptor fails Self-Verify !\n",
-			    __FUNCTION__);
-			printf("[%s:STNID_SEC]:  Control Descriptor fails Self-Verify !\n",
-			    __FUNCTION__);
-			printf("[%s:STNID_SEC]:  addr=0x%llx  desc=%p  alloc=%p \n",
-			    __FUNCTION__, (unsigned long long)addr, desc, desc->alloc);
-			printf("[%s:STNID_SEC]:  op_ctl=%p  phys_self=%llx  stn_id=%d \n",
-			    __FUNCTION__, &desc->op_ctl, (unsigned long long)desc->op_ctl.phys_self,
-			    desc->op_ctl.stn_id);
-
-		}
-		if (desc->op_ctl.stn_id != MSGRNG_STNID_SEC0 &&
-		    desc->op_ctl.stn_id != MSGRNG_STNID_SEC1) {
-			XLR_SEC_CMD_DIAG("[%s:STNID_SEC]:  Operation Type Mismatch !\n",
-			    __FUNCTION__);
-			printf("[%s:STNID_SEC]:  Operation Type Mismatch !\n",
-			    __FUNCTION__);
-			printf("[%s:STNID_SEC]:  addr=0x%llx  desc=%p  alloc=%p \n",
-			    __FUNCTION__, (unsigned long long)addr, desc, desc->alloc);
-			printf("[%s:STNID_SEC]:  op_ctl=%p  phys_self=%llx  stn_id=%d \n",
-			    __FUNCTION__, &desc->op_ctl, (unsigned long long)desc->op_ctl.phys_self,
-			    desc->op_ctl.stn_id);
-		}
-		desc->ctl_result = GET_FIELD(msg->msg0, MSG_RSLT_CTL_INST_ERR);
-		desc->data_result = GET_FIELD(msg->msg1, MSG_RSLT_DATA_INST_ERR);
-
-		XLR_SEC_CMD_DIAG("[%s:STNID_SEC]:  cpu=%d  ctl_result=0x%llx  data_result=%llx\n",
-		    __FUNCTION__, desc->op_ctl.cpu,
-		    desc->ctl_result, desc->data_result);
-
-	}
-#if 0
-	else if (sec_eng == MSG0_CTL_OP_ENGINE_PUBKEY) {
-		pubkey_desc_pt desc;
-
-		if (sec_pipe != MSG1_CTL_OP_PUBKEY_PIPE0) {
-			/* response to uc load */
-			/*
-			 * XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: ecc cpu=%d
-			 * ctl_result=0x%llx  data_result=%llx\n",
-			 * __FUNCTION__, desc->op_ctl.cpu, desc->ctl_result,
-			 * desc->data_result);
-			 */
-			return;
-		}
-		/*
-		 * The data descriptor address allows us to associate the
-		 * response with the submitted operation. Address is 40-bit
-		 * cacheline aligned address. We need to zero bit 0-4 since
-		 * they are used for the engine and pipe Id.
-		 */
-		addr = GET_FIELD(msg->msg0, PUBKEY_RSLT_CTL_SRCADDR);
-		addr = addr & ~((1 << 5) - 1);
-		if (!addr) {
-			panic("[%s:STNID_SEC]:  NULL pubkey ctrl desc!\n", __FUNCTION__);
-		}
-		/*
-		 * The adddress points to the data descriptor. The operation
-		 * descriptor is defined with the 32-byte cacheline size in
-		 * mind.  It allows the code to use this address to
-		 * reference the symkey descriptor.   (ref:  xlr_sec_desc.h)
-		 */
-		addr = addr - sizeof(OperationDescriptor_t);
-
-		/* Get pointer to pubkey Descriptor */
-		desc = (pubkey_desc_pt) (unsigned long)addr;
-		if (!desc) {
-			panic("[%s:STNID_SEC]:  NULL pubkey data descriptor!\n", __FUNCTION__);
-		}
-		XLR_SEC_CMD_DIAG("[%s:STNID_PK0]:  addr=0x%llx  desc=%p  alloc=%p \n",
-		    __FUNCTION__, addr, desc, desc->alloc);
-
-		XLR_SEC_CMD_DIAG("[%s:STNID_PK0]:  op_ctl=%p  phys_self=%llx  stn_id=%d \n",
-		    __FUNCTION__, &desc->op_ctl, desc->op_ctl.phys_self,
-		    desc->op_ctl.stn_id);
-
-		if (addr != desc->op_ctl.phys_self) {
-			XLR_SEC_CMD_DIAG("[%s:STNID_PK0]:  Control Descriptor fails Self-Verify !\n",
-			    __FUNCTION__);
-		}
-		if (desc->op_ctl.stn_id != msgrng_stnid_pk0) {
-			XLR_SEC_CMD_DIAG("[%s:STNID_PK0]:  Operation Type Mismatch ! \n",
-			    __FUNCTION__);
-		}
-		desc->ctl_result = GET_FIELD(msg->msg0, PUBKEY_RSLT_CTL_ERROR);
-		desc->data_result = GET_FIELD(msg->msg1, PUBKEY_RSLT_DATA_ERROR);
-
-		XLR_SEC_CMD_DIAG("[%s:STNID_PK0]:  ctl_result=0x%llx  data_result=%llx\n",
-		    __FUNCTION__, desc->ctl_result, desc->data_result);
-
-	}
-#endif
-	else {
-		printf("[%s]: HANDLER  bad id = %d\n", __FUNCTION__, stid);
-	}
-#ifdef RMI_SEC_DEBUG
-	if (ses->multi_frag_flag) {
-		int i;
-		char *ptr;
-
-		printf("\n RETURNED DATA:  \n");
-
-		ptr = (char *)(unsigned long)(desc->user.aligned_dest + cmd->op.cipher_offset);
-		for (i = 0; i < SEC_MAX_FRAG_LEN; i++) {
-			printf("%c  ", (char)*ptr++);
-			if ((i % 10) == 0)
-				printf("\n");
-		}
-
-		printf("second desc\n");
-		ptr = (char *)(unsigned long)(desc->next_dest_buf);
-		for (i = 0; i < desc->next_src_len; i++) {
-			printf("%c  ", (char)*ptr++);
-			if ((i % 10) == 0)
-				printf("\n");
-		}
-	}
-#endif
-
-	/* Copy cipher-data to User-space */
-	if (op->cipher_type != XLR_SEC_CIPHER_TYPE_NONE) {
-		size = op->dest_buf_size;
-
-		/* DEBUG -dpk */
-		XLR_SEC_CMD_DIAG("cipher: to_addr=%p  from_addr=%p  size=%d \n",
-		    desc->user.user_dest, desc->user.aligned_dest, size);
-
-		if (ses->multi_frag_flag) {
-			crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf, 0,
-			    SEC_MAX_FRAG_LEN, (caddr_t)(long)desc->user.aligned_dest + op->cipher_offset);
-			crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf + SEC_MAX_FRAG_LEN, 0,
-			    desc->next_src_len, (caddr_t)(long)desc->next_dest_buf);
-			crypto_done(cmd->crp);
-		} else {
-			crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf, 0,
-			    cmd->op.dest_buf_size, (caddr_t)(long)desc->user.aligned_dest + op->cipher_offset);
-			crypto_done(cmd->crp);
-		}
-
-	}
-
-	/* Copy digest to User-space */
-	if (op->digest_type != XLR_SEC_DIGEST_TYPE_NONE) {
-		int offset = 0;
-
-		switch (op->digest_type) {
-		case XLR_SEC_DIGEST_TYPE_MD5:
-			size = XLR_SEC_MD5_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_SHA1:
-			size = XLR_SEC_SHA1_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_SHA256:
-			size = XLR_SEC_SHA256_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_SHA384:
-			size = XLR_SEC_SHA384_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_SHA512:
-			size = XLR_SEC_SHA512_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_GCM:
-			size = XLR_SEC_GCM_LENGTH;
-			break;
-		case XLR_SEC_DIGEST_TYPE_KASUMI_F9:
-			offset = 4;
-			size = XLR_SEC_KASUMI_F9_RESULT_LENGTH;
-			break;
-		default:
-			size = 0;
-		}
-
-		XLR_SEC_CMD_DIAG("digest:  to_addr=%p  from_addr=%p  size=%d \n",
-		    desc->user.user_auth, desc->user.aligned_auth, size);
-		memcpy(desc->user.user_auth, desc->user.aligned_auth + offset, size);
-		op->auth_dest = (uint64_t) (unsigned long)desc->user.user_auth;
-	}
-	if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4 &&
-	    op->rc4_savestate) {
-		size = XLR_SEC_MAX_RC4_STATE_SIZE;
-
-		XLR_SEC_CMD_DIAG("state:  to_addr=%p  from_addr=%p  size=%d \n",
-		    desc->user.user_state, desc->user.aligned_state, size);
-		op->rc4_state = (uint64_t) (unsigned long)desc->user.user_state;
-	}
-	return;
-}
diff --git a/sys/mips/rmi/dev/sec/rmilib.h b/sys/mips/rmi/dev/sec/rmilib.h
deleted file mode 100644
index 691b455a199..00000000000
--- a/sys/mips/rmi/dev/sec/rmilib.h
+++ /dev/null
@@ -1,1002 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- * 
- * $FreeBSD$
- * RMI_BSD
- */
-
-#ifndef _RMILIB_H_
-#define _RMILIB_H_
-
-#include <sys/cdefs.h>
-#include <mips/rmi/dev/sec/desc.h>
-#include <mips/rmi/iomap.h>
-
-/* #define XLR_SEC_CMD_DEBUG */
-
-#ifdef XLR_SEC_CMD_DEBUG
-#define DPRINT  printf
-#define XLR_SEC_CMD_DIAG(fmt, args...) { \
-                DPRINT(fmt, ##args); \
-        }
-#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec) { \
-                decode_symkey_desc ((desc), (vec)); \
-        }
-#else
-#define DPRINT(fmt, args...)
-#define XLR_SEC_CMD_DIAG(fmt, args...)
-#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec)
-#endif
-
-
-
-
-
-
-/*
-#include <mips/include/pmap.h>
-
-#define OS_ALLOC_KERNEL(size) kmalloc((size), GFP_KERNEL)
-#define virt_to_phys(x)  vtophys((vm_offset_t)(x))
-*/
-/*
- * Cryptographic parameter definitions
- */
-#define XLR_SEC_DES_KEY_LENGTH        8	/* Bytes */
-#define XLR_SEC_3DES_KEY_LENGTH       24	/* Bytes */
-#define XLR_SEC_AES128_KEY_LENGTH     16	/* Bytes */
-#define XLR_SEC_AES192_KEY_LENGTH     24	/* Bytes */
-#define XLR_SEC_AES256_KEY_LENGTH     32	/* Bytes */
-#define XLR_SEC_AES128F8_KEY_LENGTH   32	/* Bytes */
-#define XLR_SEC_AES192F8_KEY_LENGTH   48	/* Bytes */
-#define XLR_SEC_AES256F8_KEY_LENGTH   64	/* Bytes */
-#define XLR_SEC_KASUMI_F8_KEY_LENGTH  16	/* Bytes */
-#define XLR_SEC_MAX_CRYPT_KEY_LENGTH  XLR_SEC_AES256F8_KEY_LENGTH
-
-
-#define XLR_SEC_DES_IV_LENGTH         8	/* Bytes */
-#define XLR_SEC_AES_IV_LENGTH         16	/* Bytes */
-#define XLR_SEC_ARC4_IV_LENGTH        0	/* Bytes */
-#define XLR_SEC_KASUMI_F8_IV_LENGTH   16	/* Bytes */
-#define XLR_SEC_MAX_IV_LENGTH         16	/* Bytes */
-#define XLR_SEC_IV_LENGTH_BYTES       8	/* Bytes */
-
-#define XLR_SEC_AES_BLOCK_SIZE        16	/* Bytes */
-#define XLR_SEC_DES_BLOCK_SIZE        8	/* Bytes */
-#define XLR_SEC_3DES_BLOCK_SIZE       8	/* Bytes */
-
-#define XLR_SEC_MD5_BLOCK_SIZE        64	/* Bytes */
-#define XLR_SEC_SHA1_BLOCK_SIZE       64	/* Bytes */
-#define XLR_SEC_SHA256_BLOCK_SIZE     64	/* Bytes */
-#define XLR_SEC_SHA384_BLOCK_SIZE     128	/* Bytes */
-#define XLR_SEC_SHA512_BLOCK_SIZE     128	/* Bytes */
-#define XLR_SEC_GCM_BLOCK_SIZE        16	/* XXX: Bytes */
-#define XLR_SEC_KASUMI_F9_BLOCK_SIZE  16	/* XXX: Bytes */
-#define XLR_SEC_MAX_BLOCK_SIZE        64	/* Max of MD5/SHA */
-#define XLR_SEC_MD5_LENGTH            16	/* Bytes */
-#define XLR_SEC_SHA1_LENGTH           20	/* Bytes */
-#define XLR_SEC_SHA256_LENGTH         32	/* Bytes */
-#define XLR_SEC_SHA384_LENGTH         64	/* Bytes */
-#define XLR_SEC_SHA512_LENGTH         64	/* Bytes */
-#define XLR_SEC_GCM_LENGTH            16	/* Bytes */
-#define XLR_SEC_KASUMI_F9_LENGTH      16	/* Bytes */
-#define XLR_SEC_KASUMI_F9_RESULT_LENGTH 4	/* Bytes */
-#define XLR_SEC_HMAC_LENGTH           64	/* Max of MD5/SHA/SHA256 */
-#define XLR_SEC_MAX_AUTH_KEY_LENGTH   XLR_SEC_SHA512_BLOCK_SIZE
-#define XLR_SEC_MAX_RC4_STATE_SIZE    264	/* char s[256], int i, int j */
-
-/* Status code is used by the SRL to indicate status */
-typedef unsigned int xlr_sec_status_t;
-
-/*
- * Status codes
- */
-#define XLR_SEC_STATUS_SUCCESS              0
-#define XLR_SEC_STATUS_NO_DEVICE           -1
-#define XLR_SEC_STATUS_TIMEOUT             -2
-#define XLR_SEC_STATUS_INVALID_PARAMETER   -3
-#define XLR_SEC_STATUS_DEVICE_FAILED       -4
-#define XLR_SEC_STATUS_DEVICE_BUSY         -5
-#define XLR_SEC_STATUS_NO_RESOURCE         -6
-#define XLR_SEC_STATUS_CANCELLED           -7
-
-/*
- * Flags
- */
-#define XLR_SEC_FLAGS_HIGH_PRIORITY         1
-
-/* Error code is used to indicate any errors */
-typedef int xlr_sec_error_t;
-
-/*
- */
-#define XLR_SEC_ERR_NONE                    0
-#define XLR_SEC_ERR_CIPHER_OP              -1
-#define XLR_SEC_ERR_CIPHER_TYPE            -2
-#define XLR_SEC_ERR_CIPHER_MODE            -3
-#define XLR_SEC_ERR_CIPHER_INIT            -4
-#define XLR_SEC_ERR_DIGEST_TYPE            -5
-#define XLR_SEC_ERR_DIGEST_INIT            -6
-#define XLR_SEC_ERR_DIGEST_SRC             -7
-#define XLR_SEC_ERR_CKSUM_TYPE             -8
-#define XLR_SEC_ERR_CKSUM_SRC              -9
-#define XLR_SEC_ERR_ALLOC                  -10
-#define XLR_SEC_ERR_CONTROL_VECTOR         -11
-#define XLR_SEC_ERR_LOADHMACKEY_MODE       -12
-#define XLR_SEC_ERR_PADHASH_MODE           -13
-#define XLR_SEC_ERR_HASHBYTES_MODE         -14
-#define XLR_SEC_ERR_NEXT_MODE              -15
-#define XLR_SEC_ERR_PKT_IV_MODE            -16
-#define XLR_SEC_ERR_LASTWORD_MODE          -17
-#define XLR_SEC_ERR_PUBKEY_OP              -18
-#define XLR_SEC_ERR_SYMKEY_MSGSND          -19
-#define XLR_SEC_ERR_PUBKEY_MSGSND          -20
-#define XLR_SEC_ERR_SYMKEY_GETSEM          -21
-#define XLR_SEC_ERR_PUBKEY_GETSEM          -22
-
-/*
- * Descriptor Vector quantities
- *  (helps to identify descriptor type per operation)
- */
-#define XLR_SEC_VECTOR_CIPHER_DES             0x0001
-#define XLR_SEC_VECTOR_CIPHER_3DES            0x0002
-#define XLR_SEC_VECTOR_CIPHER_AES128          0x0004
-#define XLR_SEC_VECTOR_CIPHER_AES192          0x0008
-#define XLR_SEC_VECTOR_CIPHER_AES256          0x0010
-#define XLR_SEC_VECTOR_CIPHER_ARC4            0x0020
-#define XLR_SEC_VECTOR_CIPHER_AES             (XLR_SEC_VECTOR_CIPHER_AES128 | \
-                                           XLR_SEC_VECTOR_CIPHER_AES192 | \
-                                           XLR_SEC_VECTOR_CIPHER_AES256)
-#define XLR_SEC_VECTOR_CIPHER                 (XLR_SEC_VECTOR_CIPHER_DES | \
-                                           XLR_SEC_VECTOR_CIPHER_3DES | \
-                                           XLR_SEC_VECTOR_CIPHER_AES128 | \
-                                           XLR_SEC_VECTOR_CIPHER_AES192 | \
-                                           XLR_SEC_VECTOR_CIPHER_AES256 | \
-                                           XLR_SEC_VECTOR_CIPHER_ARC4)
-
-#define XLR_SEC_VECTOR_HMAC                   0x0040
-#define XLR_SEC_VECTOR_MAC                    0x0080
-#define XLR_SEC_VECTOR_MODE_CTR_CFB           0x0100
-#define XLR_SEC_VECTOR_MODE_ECB_CBC_OFB       0x0200
-#define XLR_SEC_VECTOR_MODE_ECB_CBC           0x0400
-#define XLR_SEC_VECTOR_STATE                  0x0800
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8       0x01000
-#define XLR_SEC_VECTOR_HMAC2                  0x02000
-#define XLR_SEC_VECTOR_GCM                    0x04000
-#define XLR_SEC_VECTOR_F9                     0x08000
-#define XLR_SEC_VECTOR_MODE_F8                0x10000
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC)
-#define XLR_SEC_VECTOR_CIPHER_ARC4__STATE  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_STATE)
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9  \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_F9)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC  \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2  \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC2)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM  \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_GCM)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__F9  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE  \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-/*
- * Cipher Modes
- */
-typedef enum {
-	XLR_SEC_CIPHER_MODE_NONE = 0,
-	XLR_SEC_CIPHER_MODE_PASS = 1,
-	XLR_SEC_CIPHER_MODE_ECB,
-	XLR_SEC_CIPHER_MODE_CBC,
-	XLR_SEC_CIPHER_MODE_OFB,
-	XLR_SEC_CIPHER_MODE_CTR,
-	XLR_SEC_CIPHER_MODE_CFB,
-	XLR_SEC_CIPHER_MODE_F8
-}    XLR_SEC_CIPHER_MODE;
-
-typedef enum {
-	XLR_SEC_CIPHER_OP_NONE = 0,
-	XLR_SEC_CIPHER_OP_ENCRYPT = 1,
-	XLR_SEC_CIPHER_OP_DECRYPT
-}    XLR_SEC_CIPHER_OP;
-
-typedef enum {
-	XLR_SEC_CIPHER_TYPE_UNSUPPORTED = -1,
-	XLR_SEC_CIPHER_TYPE_NONE = 0,
-	XLR_SEC_CIPHER_TYPE_DES,
-	XLR_SEC_CIPHER_TYPE_3DES,
-	XLR_SEC_CIPHER_TYPE_AES128,
-	XLR_SEC_CIPHER_TYPE_AES192,
-	XLR_SEC_CIPHER_TYPE_AES256,
-	XLR_SEC_CIPHER_TYPE_ARC4,
-	XLR_SEC_CIPHER_TYPE_KASUMI_F8
-}    XLR_SEC_CIPHER_TYPE;
-
-typedef enum {
-	XLR_SEC_CIPHER_INIT_OK = 1,	/* Preserve old Keys */
-	XLR_SEC_CIPHER_INIT_NK	/* Load new Keys */
-}    XLR_SEC_CIPHER_INIT;
-
-
-/*
- *  Hash Modes
- */
-typedef enum {
-	XLR_SEC_DIGEST_TYPE_UNSUPPORTED = -1,
-	XLR_SEC_DIGEST_TYPE_NONE = 0,
-	XLR_SEC_DIGEST_TYPE_MD5,
-	XLR_SEC_DIGEST_TYPE_SHA1,
-	XLR_SEC_DIGEST_TYPE_SHA256,
-	XLR_SEC_DIGEST_TYPE_SHA384,
-	XLR_SEC_DIGEST_TYPE_SHA512,
-	XLR_SEC_DIGEST_TYPE_GCM,
-	XLR_SEC_DIGEST_TYPE_KASUMI_F9,
-	XLR_SEC_DIGEST_TYPE_HMAC_MD5,
-	XLR_SEC_DIGEST_TYPE_HMAC_SHA1,
-	XLR_SEC_DIGEST_TYPE_HMAC_SHA256,
-	XLR_SEC_DIGEST_TYPE_HMAC_SHA384,
-	XLR_SEC_DIGEST_TYPE_HMAC_SHA512,
-	XLR_SEC_DIGEST_TYPE_HMAC_AES_CBC,
-	XLR_SEC_DIGEST_TYPE_HMAC_AES_XCBC
-}    XLR_SEC_DIGEST_TYPE;
-
-typedef enum {
-	XLR_SEC_DIGEST_INIT_OLDKEY = 1,	/* Preserve old key HMAC key stored in
-					 * ID registers (moot if HASH.HMAC ==
-					 * 0) */
-	XLR_SEC_DIGEST_INIT_NEWKEY	/* Load new HMAC key from memory ctrl
-					 * section to ID registers */
-}    XLR_SEC_DIGEST_INIT;
-
-typedef enum {
-	XLR_SEC_DIGEST_SRC_DMA = 1,	/* DMA channel */
-	XLR_SEC_DIGEST_SRC_CPHR	/* Cipher if word count exceeded
-				 * Cipher_Offset; else DMA */
-}    XLR_SEC_DIGEST_SRC;
-
-/*
- *  Checksum Modes
- */
-typedef enum {
-	XLR_SEC_CKSUM_TYPE_NOP = 1,
-	XLR_SEC_CKSUM_TYPE_IP
-}    XLR_SEC_CKSUM_TYPE;
-
-typedef enum {
-	XLR_SEC_CKSUM_SRC_DMA = 1,
-	XLR_SEC_CKSUM_SRC_CIPHER
-}    XLR_SEC_CKSUM_SRC;
-
-/*
- *  Packet Modes
- */
-typedef enum {
-	XLR_SEC_LOADHMACKEY_MODE_OLD = 1,
-	XLR_SEC_LOADHMACKEY_MODE_LOAD
-}    XLR_SEC_LOADHMACKEY_MODE;
-
-typedef enum {
-	XLR_SEC_PADHASH_PADDED = 1,
-	XLR_SEC_PADHASH_PAD
-}    XLR_SEC_PADHASH_MODE;
-
-typedef enum {
-	XLR_SEC_HASHBYTES_ALL8 = 1,
-	XLR_SEC_HASHBYTES_MSB,
-	XLR_SEC_HASHBYTES_MSW
-}    XLR_SEC_HASHBYTES_MODE;
-
-typedef enum {
-	XLR_SEC_NEXT_FINISH = 1,
-	XLR_SEC_NEXT_DO
-}    XLR_SEC_NEXT_MODE;
-
-typedef enum {
-	XLR_SEC_PKT_IV_OLD = 1,
-	XLR_SEC_PKT_IV_NEW
-}    XLR_SEC_PKT_IV_MODE;
-
-typedef enum {
-	XLR_SEC_LASTWORD_128 = 1,
-	XLR_SEC_LASTWORD_96MASK,
-	XLR_SEC_LASTWORD_64MASK,
-	XLR_SEC_LASTWORD_32MASK
-}    XLR_SEC_LASTWORD_MODE;
-
-typedef enum {
-	XLR_SEC_CFB_MASK_REGULAR_CTR = 0,
-	XLR_SEC_CFB_MASK_CCMP,
-	XLR_SEC_CFB_MASK_GCM_WITH_SCI,
-	XLR_SEC_CFB_MASK_GCM_WITHOUT_SCI
-}    XLR_SEC_CFB_MASK_MODE;
-
-/*
- *  Public Key
- */
-typedef enum {
-	RMIPK_BLKWIDTH_512 = 1,
-	RMIPK_BLKWIDTH_1024
-}    RMIPK_BLKWIDTH_MODE;
-
-typedef enum {
-	RMIPK_LDCONST_OLD = 1,
-	RMIPK_LDCONST_NEW
-}    RMIPK_LDCONST_MODE;
-
-
-typedef struct xlr_sec_io_s {
-	unsigned int command;
-	unsigned int result_status;
-	unsigned int flags;
-	unsigned int session_num;
-	unsigned int use_callback;
-	unsigned int time_us;
-	unsigned int user_context[2];	/* usable for anything by caller */
-	unsigned int command_context;	/* Context (ID) of this command). */
-	unsigned char initial_vector[XLR_SEC_MAX_IV_LENGTH];
-	unsigned char crypt_key[XLR_SEC_MAX_CRYPT_KEY_LENGTH];
-	unsigned char mac_key[XLR_SEC_MAX_AUTH_KEY_LENGTH];
-
-	XLR_SEC_CIPHER_OP cipher_op;
-	XLR_SEC_CIPHER_MODE cipher_mode;
-	XLR_SEC_CIPHER_TYPE cipher_type;
-	XLR_SEC_CIPHER_INIT cipher_init;
-	unsigned int cipher_offset;
-
-	XLR_SEC_DIGEST_TYPE digest_type;
-	XLR_SEC_DIGEST_INIT digest_init;
-	XLR_SEC_DIGEST_SRC digest_src;
-	unsigned int digest_offset;
-
-	XLR_SEC_CKSUM_TYPE cksum_type;
-	XLR_SEC_CKSUM_SRC cksum_src;
-	unsigned int cksum_offset;
-
-	XLR_SEC_LOADHMACKEY_MODE pkt_hmac;
-	XLR_SEC_PADHASH_MODE pkt_hash;
-	XLR_SEC_HASHBYTES_MODE pkt_hashbytes;
-	XLR_SEC_NEXT_MODE pkt_next;
-	XLR_SEC_PKT_IV_MODE pkt_iv;
-	XLR_SEC_LASTWORD_MODE pkt_lastword;
-
-	unsigned int nonce;
-	unsigned int cfb_mask;
-
-	unsigned int iv_offset;
-	unsigned short pad_type;
-	unsigned short rc4_key_len;
-
-	unsigned int num_packets;
-	unsigned int num_fragments;
-
-	uint64_t source_buf;
-	unsigned int source_buf_size;
-	uint64_t dest_buf;
-	unsigned int dest_buf_size;
-
-	uint64_t auth_dest;
-	uint64_t cksum_dest;
-
-	unsigned short rc4_loadstate;
-	unsigned short rc4_savestate;
-	uint64_t rc4_state;
-
-}            xlr_sec_io_t, *xlr_sec_io_pt;
-
-
-#define XLR_SEC_SESSION(sid)   ((sid) & 0x000007ff)
-#define XLR_SEC_SID(crd,ses)   (((crd) << 28) | ((ses) & 0x7ff))
-
-/*
- *  Length values for cryptography
- */
-/*
-#define XLR_SEC_DES_KEY_LENGTH     8
-#define XLR_SEC_3DES_KEY_LENGTH        24
-#define XLR_SEC_MAX_CRYPT_KEY_LENGTH   XLR_SEC_3DES_KEY_LENGTH
-#define XLR_SEC_IV_LENGTH          8
-#define XLR_SEC_AES_IV_LENGTH      16
-#define XLR_SEC_MAX_IV_LENGTH      XLR_SEC_AES_IV_LENGTH
-*/
-
-#define SEC_MAX_FRAG_LEN 16000
-
-struct xlr_sec_command {
-	uint16_t session_num;
-	struct cryptop *crp;
-	struct cryptodesc *enccrd, *maccrd;
-
-	xlr_sec_io_t op;
-};
-struct xlr_sec_session {
-	uint32_t sessionid;
-	int hs_used;
-	int hs_mlen;
-	struct xlr_sec_command cmd;
-	void *desc_ptr;
-	uint8_t multi_frag_flag;
-};
-
-/*
- * Holds data specific to rmi security accelerators
- */
-struct xlr_sec_softc {
-	device_t sc_dev;	/* device backpointer */
-	struct mtx sc_mtx;	/* per-instance lock */
-
-	int32_t sc_cid;
-	struct xlr_sec_session *sc_sessions;
-	int sc_nsessions;
-	xlr_reg_t *mmio;
-};
-
-
-/*
-
-union xlr_sec_operand_t {
-        struct mbuf *m;
-        struct uio *io;
-        void *buf;
-}xlr_sec_operand;
-*/
-
-
-
-
-
-/* this is passed to packet setup to optimize */
-#define XLR_SEC_SETUP_OP_CIPHER              0x00000001
-#define XLR_SEC_SETUP_OP_HMAC                0x00000002
-#define XLR_SEC_SETUP_OP_CIPHER_HMAC         (XLR_SEC_SETUP_OP_CIPHER | XLR_SEC_SETUP_OP_HMAC)
-/* this is passed to control_setup to update w/preserving existing keys */
-#define XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY    0x80000000
-#define XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY  0x40000000
-#define XLR_SEC_SETUP_OP_UPDATE_KEYS          0x00000010
-#define XLR_SEC_SETUP_OP_FLIP_3DES_KEY        0x00000020
-
-
-
-
-
-/*
- *   Message Ring Specifics
- */
-
-#define SEC_MSGRING_WORDSIZE      2
-
-
-/*
- *
- *
- * rwR      31  30 29     27 26    24 23      21 20     18
- *         |  NA  | RSA0Out | Rsa0In | Pipe3Out | Pipe3In | ...
- *
- *          17       15 14     12 11      9 8       6 5        3 2       0
- *         |  Pipe2Out | Pipe2In | Pipe1In | Pipe1In | Pipe0Out | Pipe0In |
- *
- * DMA CREDIT REG -
- *   NUMBER OF CREDITS PER PIPE
- */
-
-#define SEC_DMA_CREDIT_RSA0_OUT_FOUR   0x20000000
-#define SEC_DMA_CREDIT_RSA0_OUT_TWO    0x10000000
-#define SEC_DMA_CREDIT_RSA0_OUT_ONE    0x08000000
-
-#define SEC_DMA_CREDIT_RSA0_IN_FOUR    0x04000000
-#define SEC_DMA_CREDIT_RSA0_IN_TWO     0x02000000
-#define SEC_DMA_CREDIT_RSA0_IN_ONE     0x01000000
-
-#define SEC_DMA_CREDIT_PIPE3_OUT_FOUR  0x00800000
-#define SEC_DMA_CREDIT_PIPE3_OUT_TWO   0x00400000
-#define SEC_DMA_CREDIT_PIPE3_OUT_ONE   0x00200000
-
-#define SEC_DMA_CREDIT_PIPE3_IN_FOUR   0x00100000
-#define SEC_DMA_CREDIT_PIPE3_IN_TWO    0x00080000
-#define SEC_DMA_CREDIT_PIPE3_IN_ONE    0x00040000
-
-#define SEC_DMA_CREDIT_PIPE2_OUT_FOUR  0x00020000
-#define SEC_DMA_CREDIT_PIPE2_OUT_TWO   0x00010000
-#define SEC_DMA_CREDIT_PIPE2_OUT_ONE   0x00008000
-
-#define SEC_DMA_CREDIT_PIPE2_IN_FOUR   0x00004000
-#define SEC_DMA_CREDIT_PIPE2_IN_TWO    0x00002000
-#define SEC_DMA_CREDIT_PIPE2_IN_ONE    0x00001000
-
-#define SEC_DMA_CREDIT_PIPE1_OUT_FOUR  0x00000800
-#define SEC_DMA_CREDIT_PIPE1_OUT_TWO   0x00000400
-#define SEC_DMA_CREDIT_PIPE1_OUT_ONE   0x00000200
-
-#define SEC_DMA_CREDIT_PIPE1_IN_FOUR   0x00000100
-#define SEC_DMA_CREDIT_PIPE1_IN_TWO    0x00000080
-#define SEC_DMA_CREDIT_PIPE1_IN_ONE    0x00000040
-
-#define SEC_DMA_CREDIT_PIPE0_OUT_FOUR  0x00000020
-#define SEC_DMA_CREDIT_PIPE0_OUT_TWO   0x00000010
-#define SEC_DMA_CREDIT_PIPE0_OUT_ONE   0x00000008
-
-#define SEC_DMA_CREDIT_PIPE0_IN_FOUR   0x00000004
-#define SEC_DMA_CREDIT_PIPE0_IN_TWO    0x00000002
-#define SEC_DMA_CREDIT_PIPE0_IN_ONE    0x00000001
-
-
-/*
- *  Currently, FOUR credits per PIPE
- *  0x24924924
- */
-#define SEC_DMA_CREDIT_CONFIG          SEC_DMA_CREDIT_RSA0_OUT_FOUR | \
-                                       SEC_DMA_CREDIT_RSA0_IN_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE3_OUT_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE3_IN_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE2_OUT_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE2_IN_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE1_OUT_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE1_IN_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE0_OUT_FOUR | \
-                                       SEC_DMA_CREDIT_PIPE0_IN_FOUR
-
-
-
-
-/*
- * CONFIG2
- *    31   5         4                   3
- *   |  NA  | PIPE3_DEF_DBL_ISS | PIPE2_DEF_DBL_ISS | ...
- *
- *                 2                   1                   0
- *   ... | PIPE1_DEF_DBL_ISS | PIPE0_DEF_DBL_ISS | ROUND_ROBIN_MODE |
- *
- *  DBL_ISS - mode for SECENG and DMA controller which slows down transfers
- *             (to be conservativei; 0=Disable,1=Enable).
- *  ROUND_ROBIN - mode where SECENG dispatches operations to PIPE0-PIPE3
- *                and all messages are sent to PIPE0.
- *
- */
-
-#define SEC_CFG2_PIPE3_DBL_ISS_ON      0x00000010
-#define SEC_CFG2_PIPE3_DBL_ISS_OFF     0x00000000
-#define SEC_CFG2_PIPE2_DBL_ISS_ON      0x00000008
-#define SEC_CFG2_PIPE2_DBL_ISS_OFF     0x00000000
-#define SEC_CFG2_PIPE1_DBL_ISS_ON      0x00000004
-#define SEC_CFG2_PIPE1_DBL_ISS_OFF     0x00000000
-#define SEC_CFG2_PIPE0_DBL_ISS_ON      0x00000002
-#define SEC_CFG2_PIPE0_DBL_ISS_OFF     0x00000000
-#define SEC_CFG2_ROUND_ROBIN_ON        0x00000001
-#define SEC_CFG2_ROUND_ROBIN_OFF       0x00000000
-
-
-enum sec_pipe_config {
-
-	SEC_PIPE_CIPHER_KEY0_L0 = 0x00,
-	SEC_PIPE_CIPHER_KEY0_HI,
-	SEC_PIPE_CIPHER_KEY1_LO,
-	SEC_PIPE_CIPHER_KEY1_HI,
-	SEC_PIPE_CIPHER_KEY2_LO,
-	SEC_PIPE_CIPHER_KEY2_HI,
-	SEC_PIPE_CIPHER_KEY3_LO,
-	SEC_PIPE_CIPHER_KEY3_HI,
-	SEC_PIPE_HMAC_KEY0_LO,
-	SEC_PIPE_HMAC_KEY0_HI,
-	SEC_PIPE_HMAC_KEY1_LO,
-	SEC_PIPE_HMAC_KEY1_HI,
-	SEC_PIPE_HMAC_KEY2_LO,
-	SEC_PIPE_HMAC_KEY2_HI,
-	SEC_PIPE_HMAC_KEY3_LO,
-	SEC_PIPE_HMAC_KEY3_HI,
-	SEC_PIPE_HMAC_KEY4_LO,
-	SEC_PIPE_HMAC_KEY4_HI,
-	SEC_PIPE_HMAC_KEY5_LO,
-	SEC_PIPE_HMAC_KEY5_HI,
-	SEC_PIPE_HMAC_KEY6_LO,
-	SEC_PIPE_HMAC_KEY6_HI,
-	SEC_PIPE_HMAC_KEY7_LO,
-	SEC_PIPE_HMAC_KEY7_HI,
-	SEC_PIPE_NCFBM_LO,
-	SEC_PIPE_NCFBM_HI,
-	SEC_PIPE_INSTR_LO,
-	SEC_PIPE_INSTR_HI,
-	SEC_PIPE_RSVD0,
-	SEC_PIPE_RSVD1,
-	SEC_PIPE_RSVD2,
-	SEC_PIPE_RSVD3,
-
-	SEC_PIPE_DF_PTRS0,
-	SEC_PIPE_DF_PTRS1,
-	SEC_PIPE_DF_PTRS2,
-	SEC_PIPE_DF_PTRS3,
-	SEC_PIPE_DF_PTRS4,
-	SEC_PIPE_DF_PTRS5,
-	SEC_PIPE_DF_PTRS6,
-	SEC_PIPE_DF_PTRS7,
-
-	SEC_PIPE_DU_DATA_IN_LO,
-	SEC_PIPE_DU_DATA_IN_HI,
-	SEC_PIPE_DU_DATA_IN_CTRL,
-	SEC_PIPE_DU_DATA_OUT_LO,
-	SEC_PIPE_DU_DATA_OUT_HI,
-	SEC_PIPE_DU_DATA_OUT_CTRL,
-
-	SEC_PIPE_STATE0,
-	SEC_PIPE_STATE1,
-	SEC_PIPE_STATE2,
-	SEC_PIPE_STATE3,
-	SEC_PIPE_STATE4,
-	SEC_PIPE_INCLUDE_MASK0,
-	SEC_PIPE_INCLUDE_MASK1,
-	SEC_PIPE_INCLUDE_MASK2,
-	SEC_PIPE_INCLUDE_MASK3,
-	SEC_PIPE_INCLUDE_MASK4,
-	SEC_PIPE_EXCLUDE_MASK0,
-	SEC_PIPE_EXCLUDE_MASK1,
-	SEC_PIPE_EXCLUDE_MASK2,
-	SEC_PIPE_EXCLUDE_MASK3,
-	SEC_PIPE_EXCLUDE_MASK4,
-};
-
-
-enum sec_pipe_base_config {
-
-	SEC_PIPE0_BASE = 0x00,
-	SEC_PIPE1_BASE = 0x40,
-	SEC_PIPE2_BASE = 0x80,
-	SEC_PIPE3_BASE = 0xc0
-
-};
-
-enum sec_rsa_config {
-
-	SEC_RSA_PIPE0_DU_DATA_IN_LO = 0x100,
-	SEC_RSA_PIPE0_DU_DATA_IN_HI,
-	SEC_RSA_PIPE0_DU_DATA_IN_CTRL,
-	SEC_RSA_PIPE0_DU_DATA_OUT_LO,
-	SEC_RSA_PIPE0_DU_DATA_OUT_HI,
-	SEC_RSA_PIPE0_DU_DATA_OUT_CTRL,
-	SEC_RSA_RSVD0,
-	SEC_RSA_RSVD1,
-
-	SEC_RSA_PIPE0_STATE0,
-	SEC_RSA_PIPE0_STATE1,
-	SEC_RSA_PIPE0_STATE2,
-	SEC_RSA_PIPE0_INCLUDE_MASK0,
-	SEC_RSA_PIPE0_INCLUDE_MASK1,
-	SEC_RSA_PIPE0_INCLUDE_MASK2,
-	SEC_RSA_PIPE0_EXCLUDE_MASK0,
-	SEC_RSA_PIPE0_EXCLUDE_MASK1,
-	SEC_RSA_PIPE0_EXCLUDE_MASK2,
-	SEC_RSA_PIPE0_EVENT_CTR
-
-};
-
-
-
-
-enum sec_config {
-
-	SEC_DMA_CREDIT = 0x140,
-	SEC_CONFIG1,
-	SEC_CONFIG2,
-	SEC_CONFIG3,
-
-};
-
-
-
-enum sec_debug_config {
-
-	SEC_DW0_DESCRIPTOR0_LO = 0x180,
-	SEC_DW0_DESCRIPTOR0_HI,
-	SEC_DW0_DESCRIPTOR1_LO,
-	SEC_DW0_DESCRIPTOR1_HI,
-	SEC_DW1_DESCRIPTOR0_LO,
-	SEC_DW1_DESCRIPTOR0_HI,
-	SEC_DW1_DESCRIPTOR1_LO,
-	SEC_DW1_DESCRIPTOR1_HI,
-	SEC_DW2_DESCRIPTOR0_LO,
-	SEC_DW2_DESCRIPTOR0_HI,
-	SEC_DW2_DESCRIPTOR1_LO,
-	SEC_DW2_DESCRIPTOR1_HI,
-	SEC_DW3_DESCRIPTOR0_LO,
-	SEC_DW3_DESCRIPTOR0_HI,
-	SEC_DW3_DESCRIPTOR1_LO,
-	SEC_DW3_DESCRIPTOR1_HI,
-
-	SEC_STATE0,
-	SEC_STATE1,
-	SEC_STATE2,
-	SEC_INCLUDE_MASK0,
-	SEC_INCLUDE_MASK1,
-	SEC_INCLUDE_MASK2,
-	SEC_EXCLUDE_MASK0,
-	SEC_EXCLUDE_MASK1,
-	SEC_EXCLUDE_MASK2,
-	SEC_EVENT_CTR
-
-};
-
-
-enum sec_msgring_bucket_config {
-
-	SEC_BIU_CREDITS = 0x308,
-
-	SEC_MSG_BUCKET0_SIZE = 0x320,
-	SEC_MSG_BUCKET1_SIZE,
-	SEC_MSG_BUCKET2_SIZE,
-	SEC_MSG_BUCKET3_SIZE,
-	SEC_MSG_BUCKET4_SIZE,
-	SEC_MSG_BUCKET5_SIZE,
-	SEC_MSG_BUCKET6_SIZE,
-	SEC_MSG_BUCKET7_SIZE,
-};
-
-enum sec_msgring_credit_config {
-
-	SEC_CC_CPU0_0 = 0x380,
-	SEC_CC_CPU1_0 = 0x388,
-	SEC_CC_CPU2_0 = 0x390,
-	SEC_CC_CPU3_0 = 0x398,
-	SEC_CC_CPU4_0 = 0x3a0,
-	SEC_CC_CPU5_0 = 0x3a8,
-	SEC_CC_CPU6_0 = 0x3b0,
-	SEC_CC_CPU7_0 = 0x3b8
-
-};
-
-enum sec_engine_id {
-	SEC_PIPE0,
-	SEC_PIPE1,
-	SEC_PIPE2,
-	SEC_PIPE3,
-	SEC_RSA
-};
-
-enum sec_cipher {
-	SEC_AES256_MODE_HMAC,
-	SEC_AES256_MODE,
-	SEC_AES256_HMAC,
-	SEC_AES256,
-	SEC_AES192_MODE_HMAC,
-	SEC_AES192_MODE,
-	SEC_AES192_HMAC,
-	SEC_AES192,
-	SEC_AES128_MODE_HMAC,
-	SEC_AES128_MODE,
-	SEC_AES128_HMAC,
-	SEC_AES128,
-	SEC_DES_HMAC,
-	SEC_DES,
-	SEC_3DES,
-	SEC_3DES_HMAC,
-	SEC_HMAC
-};
-
-enum sec_msgrng_msg_ctrl_config {
-	SEC_EOP = 5,
-	SEC_SOP = 6,
-};
-
-
-
-void 
-xlr_sec_init(struct xlr_sec_softc *sc);
-
-int 
-xlr_sec_setup(struct xlr_sec_session *ses,
-    struct xlr_sec_command *cmd, symkey_desc_pt desc);
-
-symkey_desc_pt xlr_sec_allocate_desc(void *);
-
-#endif
diff --git a/sys/mips/rmi/dev/sec/rmisec.c b/sys/mips/rmi/dev/sec/rmisec.c
deleted file mode 100644
index bc417440869..00000000000
--- a/sys/mips/rmi/dev/sec/rmisec.c
+++ /dev/null
@@ -1,573 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/errno.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/random.h>
-#include <sys/rman.h>
-#include <sys/uio.h>
-#include <sys/kobj.h>
-#include <opencrypto/cryptodev.h>
-
-#include "cryptodev_if.h"
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <mips/rmi/dev/sec/rmilib.h>
-
-/* #define RMI_SEC_DEBUG  */
-
-void xlr_sec_print_data(struct cryptop *crp);
-
-static int xlr_sec_newsession(device_t dev, uint32_t * sidp, struct cryptoini *cri);
-static int xlr_sec_freesession(device_t dev, uint64_t tid);
-static int xlr_sec_process(device_t dev, struct cryptop *crp, int hint);
-
-static int xlr_sec_probe(device_t);
-static int xlr_sec_attach(device_t);
-static int xlr_sec_detach(device_t);
-
-
-static device_method_t xlr_sec_methods[] = {
-	/* device interface */
-	DEVMETHOD(device_probe, xlr_sec_probe),
-	DEVMETHOD(device_attach, xlr_sec_attach),
-	DEVMETHOD(device_detach, xlr_sec_detach),
-
-	/* crypto device methods */
-	DEVMETHOD(cryptodev_newsession, xlr_sec_newsession),
-	DEVMETHOD(cryptodev_freesession,xlr_sec_freesession),
-	DEVMETHOD(cryptodev_process,    xlr_sec_process),
-
-	DEVMETHOD_END
-};
-
-static driver_t xlr_sec_driver = {
-	"rmisec",
-	xlr_sec_methods,
-	sizeof(struct xlr_sec_softc)
-};
-static devclass_t xlr_sec_devclass;
-
-DRIVER_MODULE(rmisec, iodi, xlr_sec_driver, xlr_sec_devclass, 0, 0);
-MODULE_DEPEND(rmisec, crypto, 1, 1, 1);
-
-static int
-xlr_sec_probe(device_t dev)
-{
-
-	device_set_desc(dev, "XLR Security Accelerator");
-	return (BUS_PROBE_DEFAULT);
-}
-
-/*
- * Attach an interface that successfully probed.
- */
-static int
-xlr_sec_attach(device_t dev)
-{
-	struct xlr_sec_softc *sc = device_get_softc(dev);
-
-	sc->sc_dev = dev;
-	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "rmi crypto driver",
-	    MTX_DEF);
-	sc->sc_cid = crypto_get_driverid(dev, CRYPTOCAP_F_HARDWARE);
-	if (sc->sc_cid < 0) {
-		printf("xlr_sec - error : could not get the driver id\n");
-		goto error_exit;
-	}
-	if (crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0) != 0)
-		printf("register failed for CRYPTO_DES_CBC\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0) != 0)
-		printf("register failed for CRYPTO_3DES_CBC\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0) != 0)
-		printf("register failed for CRYPTO_AES_CBC\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0) != 0)
-		printf("register failed for CRYPTO_ARC4\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0) != 0)
-		printf("register failed for CRYPTO_MD5\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0) != 0)
-		printf("register failed for CRYPTO_SHA1\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0) != 0)
-		printf("register failed for CRYPTO_MD5_HMAC\n");
-
-	if (crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0) != 0)
-		printf("register failed for CRYPTO_SHA1_HMAC\n");
-
-	xlr_sec_init(sc);
-	device_printf(dev, "Initialization complete!\n");
-	return (0);
-
-error_exit:
-	return (ENXIO);
-
-}
-
-/*
- * Detach an interface that successfully probed.
- */
-static int
-xlr_sec_detach(device_t dev)
-{
-	int sesn;
-	struct xlr_sec_softc *sc = device_get_softc(dev);
-	struct xlr_sec_session *ses = NULL;
-	symkey_desc_pt desc;
-
-	for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
-		ses = &sc->sc_sessions[sesn];
-		desc = (symkey_desc_pt) ses->desc_ptr;
-		free(desc->user.kern_src, M_DEVBUF);
-		free(desc->user.kern_dest, M_DEVBUF);
-		free(desc->next_src_buf, M_DEVBUF);
-		free(desc->next_dest_buf, M_DEVBUF);
-		free(ses->desc_ptr, M_DEVBUF);
-	}
-
-	return (0);
-}
-
-/*
- * Allocate a new 'session' and return an encoded session id.  'sidp'
- * contains our registration id, and should contain an encoded session
- * id on successful allocation.
- */
-static int
-xlr_sec_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
-{
-	struct cryptoini *c;
-	struct xlr_sec_softc *sc = device_get_softc(dev);
-	int mac = 0, cry = 0, sesn;
-	struct xlr_sec_session *ses = NULL;
-
-	if (sidp == NULL || cri == NULL || sc == NULL)
-		return (EINVAL);
-
-	if (sc->sc_sessions == NULL) {
-		ses = sc->sc_sessions = (struct xlr_sec_session *)malloc(
-		    sizeof(struct xlr_sec_session), M_DEVBUF, M_NOWAIT);
-		if (ses == NULL)
-			return (ENOMEM);
-		sesn = 0;
-		sc->sc_nsessions = 1;
-	} else {
-		for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
-			if (!sc->sc_sessions[sesn].hs_used) {
-				ses = &sc->sc_sessions[sesn];
-				break;
-			}
-		}
-
-		if (ses == NULL) {
-			sesn = sc->sc_nsessions;
-			ses = (struct xlr_sec_session *)malloc((sesn + 1) *
-			    sizeof(struct xlr_sec_session), M_DEVBUF, M_NOWAIT);
-			if (ses == NULL)
-				return (ENOMEM);
-			bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses));
-			bzero(sc->sc_sessions, sesn * sizeof(*ses));
-			free(sc->sc_sessions, M_DEVBUF);
-			sc->sc_sessions = ses;
-			ses = &sc->sc_sessions[sesn];
-			sc->sc_nsessions++;
-		}
-	}
-	bzero(ses, sizeof(*ses));
-	ses->sessionid = sesn;
-	ses->desc_ptr = xlr_sec_allocate_desc(ses);
-	if (ses->desc_ptr == NULL)
-		return (ENOMEM);
-	ses->hs_used = 1;
-
-	for (c = cri; c != NULL; c = c->cri_next) {
-		switch (c->cri_alg) {
-		case CRYPTO_MD5:
-		case CRYPTO_SHA1:
-		case CRYPTO_MD5_HMAC:
-		case CRYPTO_SHA1_HMAC:
-			if (mac)
-				return (EINVAL);
-			mac = 1;
-			ses->hs_mlen = c->cri_mlen;
-			if (ses->hs_mlen == 0) {
-				switch (c->cri_alg) {
-				case CRYPTO_MD5:
-				case CRYPTO_MD5_HMAC:
-					ses->hs_mlen = 16;
-					break;
-				case CRYPTO_SHA1:
-				case CRYPTO_SHA1_HMAC:
-					ses->hs_mlen = 20;
-					break;
-				}
-			}
-			break;
-		case CRYPTO_DES_CBC:
-		case CRYPTO_3DES_CBC:
-		case CRYPTO_AES_CBC:
-			/* XXX this may read fewer, does it matter? */
-			/*
-			 * read_random(ses->hs_iv, c->cri_alg ==
-			 * CRYPTO_AES_CBC ? XLR_SEC_AES_IV_LENGTH :
-			 * XLR_SEC_IV_LENGTH);
-			 */
-			/* FALLTHROUGH */
-		case CRYPTO_ARC4:
-			if (cry)
-				return (EINVAL);
-			cry = 1;
-			break;
-		default:
-			return (EINVAL);
-		}
-	}
-	if (mac == 0 && cry == 0)
-		return (EINVAL);
-
-	*sidp = XLR_SEC_SID(device_get_unit(sc->sc_dev), sesn);
-	return (0);
-}
-
-/*
- * Deallocate a session.
- * XXX this routine should run a zero'd mac/encrypt key into context ram.
- * XXX to blow away any keys already stored there.
- */
-static int
-xlr_sec_freesession(device_t dev, u_int64_t tid)
-{
-	struct xlr_sec_softc *sc = device_get_softc(dev);
-	int session;
-	u_int32_t sid = CRYPTO_SESID2LID(tid);
-
-	if (sc == NULL)
-		return (EINVAL);
-
-	session = XLR_SEC_SESSION(sid);
-	if (session >= sc->sc_nsessions)
-		return (EINVAL);
-
-	sc->sc_sessions[session].hs_used = 0;
-	return (0);
-}
-
-#ifdef RMI_SEC_DEBUG
-
-void 
-xlr_sec_print_data(struct cryptop *crp)
-{
-	int i, key_len;
-	struct cryptodesc *crp_desc;
-
-	printf("session id = 0x%llx, crp_ilen = %d, crp_olen=%d \n",
-	    crp->crp_sid, crp->crp_ilen, crp->crp_olen);
-
-	printf("crp_flags = 0x%x\n", crp->crp_flags);
-
-
-	printf("crp buf:\n");
-	for (i = 0; i < crp->crp_ilen; i++) {
-		printf("%c  ", crp->crp_buf[i]);
-		if (i % 10 == 0)
-			printf("\n");
-	}
-
-	printf("\n");
-	printf("****************** desc ****************\n");
-	crp_desc = crp->crp_desc;
-	printf("crd_skip=%d, crd_len=%d, crd_flags=0x%x, crd_alg=%d\n",
-	    crp_desc->crd_skip, crp_desc->crd_len, crp_desc->crd_flags, crp_desc->crd_alg);
-
-	key_len = crp_desc->crd_klen / 8;
-	printf("key(%d) :\n", key_len);
-	for (i = 0; i < key_len; i++)
-		printf("%d", crp_desc->crd_key[i]);
-	printf("\n");
-
-	printf(" IV : \n");
-	for (i = 0; i < EALG_MAX_BLOCK_LEN; i++)
-		printf("%d", crp_desc->crd_iv[i]);
-	printf("\n");
-
-	printf("crd_next=%p\n", crp_desc->crd_next);
-	return;
-}
-
-#endif
-
-static int
-xlr_sec_process(device_t dev, struct cryptop *crp, int hint)
-{
-	struct xlr_sec_softc *sc = device_get_softc(dev);
-	struct xlr_sec_command *cmd = NULL;
-	int session, err;
-	struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
-	struct xlr_sec_session *ses;
-
-	if (crp == NULL || crp->crp_callback == NULL) {
-		return (EINVAL);
-	}
-	session = XLR_SEC_SESSION(crp->crp_sid);
-	if (sc == NULL || session >= sc->sc_nsessions) {
-		err = EINVAL;
-		goto errout;
-	}
-	ses = &sc->sc_sessions[session];
-
-	cmd = &ses->cmd;
-	if (cmd == NULL) {
-		err = ENOMEM;
-		goto errout;
-	}
-	crd1 = crp->crp_desc;
-	if (crd1 == NULL) {
-		err = EINVAL;
-		goto errout;
-	}
-	crd2 = crd1->crd_next;
-
-	if (crd2 == NULL) {
-		if (crd1->crd_alg == CRYPTO_MD5_HMAC ||
-		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
-		    crd1->crd_alg == CRYPTO_SHA1 ||
-		    crd1->crd_alg == CRYPTO_MD5) {
-			maccrd = crd1;
-			enccrd = NULL;
-		} else if (crd1->crd_alg == CRYPTO_DES_CBC ||
-			    crd1->crd_alg == CRYPTO_3DES_CBC ||
-			    crd1->crd_alg == CRYPTO_AES_CBC ||
-		    crd1->crd_alg == CRYPTO_ARC4) {
-			maccrd = NULL;
-			enccrd = crd1;
-		} else {
-			err = EINVAL;
-			goto errout;
-		}
-	} else {
-		if ((crd1->crd_alg == CRYPTO_MD5_HMAC ||
-		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
-		    crd1->crd_alg == CRYPTO_MD5 ||
-		    crd1->crd_alg == CRYPTO_SHA1) &&
-		    (crd2->crd_alg == CRYPTO_DES_CBC ||
-		    crd2->crd_alg == CRYPTO_3DES_CBC ||
-		    crd2->crd_alg == CRYPTO_AES_CBC ||
-		    crd2->crd_alg == CRYPTO_ARC4)) {
-			maccrd = crd1;
-			enccrd = crd2;
-		} else if ((crd1->crd_alg == CRYPTO_DES_CBC ||
-			    crd1->crd_alg == CRYPTO_ARC4 ||
-			    crd1->crd_alg == CRYPTO_3DES_CBC ||
-			    crd1->crd_alg == CRYPTO_AES_CBC) &&
-			    (crd2->crd_alg == CRYPTO_MD5_HMAC ||
-			    crd2->crd_alg == CRYPTO_SHA1_HMAC ||
-			    crd2->crd_alg == CRYPTO_MD5 ||
-			    crd2->crd_alg == CRYPTO_SHA1) &&
-		    (crd1->crd_flags & CRD_F_ENCRYPT)) {
-			enccrd = crd1;
-			maccrd = crd2;
-		} else {
-			err = EINVAL;
-			goto errout;
-		}
-	}
-
-	bzero(&cmd->op, sizeof(xlr_sec_io_t));
-
-	cmd->op.source_buf = (uint64_t) (unsigned long)crp->crp_buf;
-	cmd->op.source_buf_size = crp->crp_ilen;
-	cmd->op.dest_buf = (uint64_t) (unsigned long)crp->crp_buf;
-	cmd->op.dest_buf_size = crp->crp_ilen;
-	cmd->op.num_packets = 1;
-	cmd->op.num_fragments = 1;
-
-	if (cmd->op.source_buf_size > SEC_MAX_FRAG_LEN) {
-		ses->multi_frag_flag = 1;
-	} else {
-		ses->multi_frag_flag = 0;
-	}
-
-	if (maccrd) {
-		cmd->maccrd = maccrd;
-		cmd->op.cipher_op = XLR_SEC_CIPHER_MODE_PASS;
-		cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_NONE;
-		cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_NONE;
-		cmd->op.cipher_init = 0;
-		cmd->op.cipher_offset = 0;
-
-		switch (maccrd->crd_alg) {
-		case CRYPTO_MD5:
-			cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_MD5;
-			cmd->op.digest_init = XLR_SEC_DIGEST_INIT_NEWKEY;
-			cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
-			cmd->op.digest_offset = 0;
-
-			cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
-			cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
-			cmd->op.cksum_offset = 0;
-
-			cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
-			cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
-			cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
-			cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
-			cmd->op.pkt_iv = XLR_SEC_PKT_IV_OLD;
-			cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
-		default:
-			printf("currently not handled\n");
-		}
-	}
-	if (enccrd) {
-		cmd->enccrd = enccrd;
-
-#ifdef RMI_SEC_DEBUG
-		xlr_sec_print_data(crp);
-#endif
-
-		if (enccrd->crd_flags & CRD_F_ENCRYPT) {
-			cmd->op.cipher_op = XLR_SEC_CIPHER_OP_ENCRYPT;
-		} else
-			cmd->op.cipher_op = XLR_SEC_CIPHER_OP_DECRYPT;
-
-		switch (enccrd->crd_alg) {
-		case CRYPTO_DES_CBC:
-		case CRYPTO_3DES_CBC:
-			if (enccrd->crd_alg == CRYPTO_DES_CBC) {
-				cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_DES;
-				memcpy(&cmd->op.crypt_key[0], enccrd->crd_key, XLR_SEC_DES_KEY_LENGTH);
-			} else {
-				cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_3DES;
-				//if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT)
-				{
-					memcpy(&cmd->op.crypt_key[0], enccrd->crd_key,
-					    XLR_SEC_3DES_KEY_LENGTH);
-				}
-			}
-
-			cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_CBC;
-			cmd->op.cipher_init = XLR_SEC_CIPHER_INIT_NK;
-			cmd->op.cipher_offset = XLR_SEC_DES_IV_LENGTH;
-
-			cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_NONE;
-			cmd->op.digest_init = XLR_SEC_DIGEST_INIT_OLDKEY;
-			cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
-			cmd->op.digest_offset = 0;
-
-			cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
-			cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
-			cmd->op.cksum_offset = 0;
-
-			cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
-			cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
-			cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
-			cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
-			cmd->op.pkt_iv = XLR_SEC_PKT_IV_NEW;
-			cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
-			//if ((!(enccrd->crd_flags & CRD_F_IV_PRESENT)) &&
-			if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT)) {
-				memcpy(&cmd->op.initial_vector[0], enccrd->crd_iv,
-				    XLR_SEC_DES_IV_LENGTH);
-			}
-			break;
-
-		case CRYPTO_AES_CBC:
-			if (enccrd->crd_alg == CRYPTO_AES_CBC) {
-				cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_AES128;
-				//if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT)
-				{
-					memcpy(&cmd->op.crypt_key[0], enccrd->crd_key,
-					    XLR_SEC_AES128_KEY_LENGTH);
-				}
-			}
-			cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_CBC;
-			cmd->op.cipher_init = XLR_SEC_CIPHER_INIT_NK;
-			cmd->op.cipher_offset = XLR_SEC_AES_BLOCK_SIZE;
-
-			cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_NONE;
-			cmd->op.digest_init = XLR_SEC_DIGEST_INIT_OLDKEY;
-			cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
-			cmd->op.digest_offset = 0;
-
-			cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
-			cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
-			cmd->op.cksum_offset = 0;
-
-			cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
-			cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
-			cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
-			cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
-			cmd->op.pkt_iv = XLR_SEC_PKT_IV_NEW;
-			cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
-			//if (!(enccrd->crd_flags & CRD_F_IV_PRESENT)) {
-			if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT)) {
-				memcpy(&cmd->op.initial_vector[0], enccrd->crd_iv,
-				    XLR_SEC_AES_BLOCK_SIZE);
-			}
-			//}
-			break;
-		}
-	}
-	cmd->crp = crp;
-	cmd->session_num = session;
-	xlr_sec_setup(ses, cmd, (symkey_desc_pt) ses->desc_ptr);
-
-	return (0);
-
-errout:
-	if (cmd != NULL)
-		free(cmd, M_DEVBUF);
-	crp->crp_etype = err;
-	crypto_done(crp);
-	return (err);
-}
diff --git a/sys/mips/rmi/dev/xlr/atx_cpld.h b/sys/mips/rmi/dev/xlr/atx_cpld.h
deleted file mode 100644
index f6efcd6d72a..00000000000
--- a/sys/mips/rmi/dev/xlr/atx_cpld.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-#ifndef _RMI_ATX_CPLD_H_
-#define _RMI_ATX_CPLD_H_
-
-/*
- * bit_0 : xgs0 phy reset, bit_1 : xgs1 phy reset, bit_2 : HT reset, bit_3 :
- * RTC reset, bit_4 : gmac phy soft reset, bit_5 : gmac phy hard reset, bit_6
- * : board reset, bit_7 : reserved
- */
-#define ATX_CPLD_RESET_1   2
-
-/*
- * bit_0_2 : reserved, bit_3 : turn off xpak_0 tx, bit_4 : turn off xpak_1
- * tx, bit_5 : HT stop (active low), bit_6 : flash program enable, bit_7 :
- * compact flash io mode
- */
-#define ATX_CPLD_MISC_CTRL 8
-
-/*
- * bit_0 : reset tcam, bit_1 : reset xpak_0 module, bit_2 : reset xpak_1
- * module, bit_3_7 : reserved
- */
-#define ATX_CPLD_RESET_2   9
-
-#endif				/* _RMI_ATX_CPLD_H_ */
diff --git a/sys/mips/rmi/dev/xlr/debug.h b/sys/mips/rmi/dev/xlr/debug.h
deleted file mode 100644
index 9e0dd6bb6f7..00000000000
--- a/sys/mips/rmi/dev/xlr/debug.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_DEBUG_H_
-#define _RMI_DEBUG_H_
-
-#include <machine/atomic.h>
-
-enum {
-	//cacheline 0
-	MSGRNG_INT,
-	MSGRNG_PIC_INT,
-	MSGRNG_MSG,
-	MSGRNG_EXIT_STATUS,
-	MSGRNG_MSG_CYCLES,
-	//cacheline 1
-	NETIF_TX = 8,
-	NETIF_RX,
-	NETIF_TX_COMPLETE,
-	NETIF_TX_COMPLETE_TX,
-	NETIF_RX_CYCLES,
-	NETIF_TX_COMPLETE_CYCLES,
-	NETIF_TX_CYCLES,
-	NETIF_TIMER_START_Q,
-	//NETIF_REG_FRIN,
-	//NETIF_INT_REG,
-	//cacheline 2
-	REPLENISH_ENTER = 16,
-	REPLENISH_ENTER_COUNT,
-	REPLENISH_CPU,
-	REPLENISH_FRIN,
-	REPLENISH_CYCLES,
-	NETIF_STACK_TX,
-	NETIF_START_Q,
-	NETIF_STOP_Q,
-	//cacheline 3
-	USER_MAC_START = 24,
-	USER_MAC_INT = 24,
-	USER_MAC_TX_COMPLETE,
-	USER_MAC_RX,
-	USER_MAC_POLL,
-	USER_MAC_TX,
-	USER_MAC_TX_FAIL,
-	USER_MAC_TX_COUNT,
-	USER_MAC_FRIN,
-	//cacheline 4
-	USER_MAC_TX_FAIL_GMAC_CREDITS = 32,
-	USER_MAC_DO_PAGE_FAULT,
-	USER_MAC_UPDATE_TLB,
-	USER_MAC_UPDATE_BIGTLB,
-	USER_MAC_UPDATE_TLB_PFN0,
-	USER_MAC_UPDATE_TLB_PFN1,
-
-	XLR_MAX_COUNTERS = 40
-};
-extern int xlr_counters[MAXCPU][XLR_MAX_COUNTERS];
-extern __uint32_t msgrng_msg_cycles;
-
-#ifdef ENABLE_DEBUG
-#define xlr_inc_counter(x) atomic_add_int(&xlr_counters[PCPU_GET(cpuid)][(x)], 1)
-#define xlr_dec_counter(x) atomic_subtract_int(&xlr_counters[PCPU_GET(cpuid)][(x)], 1)
-#define xlr_set_counter(x, value) atomic_set_int(&xlr_counters[PCPU_GET(cpuid)][(x)], (value))
-#define xlr_get_counter(x) (&xlr_counters[0][(x)])
-
-#else				/* default mode */
-
-#define xlr_inc_counter(x)
-#define xlr_dec_counter(x)
-#define xlr_set_counter(x, value)
-#define xlr_get_counter(x)
-
-#endif
-
-#define dbg_msg(fmt, args...) printf(fmt, ##args)
-#define dbg_panic(fmt, args...) panic(fmt, ##args)
-
-#endif
diff --git a/sys/mips/rmi/dev/xlr/xgmac_mdio.h b/sys/mips/rmi/dev/xlr/xgmac_mdio.h
deleted file mode 100644
index 0c5928e77c4..00000000000
--- a/sys/mips/rmi/dev/xlr/xgmac_mdio.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-/* MDIO Low level Access routines */
-/* All Phy's accessed from GMAC0 base */
-
-#ifndef _XGMAC_MDIO_H_
-#define _XGMAC_MDIO_H_
-
-static inline int
-xmdio_read(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t address);
-static inline void
-xmdio_write(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t address, uint32_t data);
-static inline void
-xmdio_address(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t dev_ad, uint32_t address);
-
-static inline void
-xmdio_address(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t dev_ad, uint32_t address)
-{
-	uint32_t st_field = 0x0;
-	uint32_t op_type = 0x0;	/* address operation */
-	uint32_t ta_field = 0x2;/* ta field */
-
-	_mmio[0x11] = ((st_field & 0x3) << 30) |
-	    ((op_type & 0x3) << 28) |
-	    ((phy_addr & 0x1F) << 23) |
-	    ((dev_ad & 0x1F) << 18) |
-	    ((ta_field & 0x3) << 16) |
-	    ((address & 0xffff) << 0);
-
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-	_mmio[0x10] = (0x1 << 3) | 0x5;
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-
-	/* wait for dev_ad cycle to complete */
-	while (_mmio[0x14] & 0x1) {
-	};
-
-}
-
-/* function prototypes */
-static inline int
-xmdio_read(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t address)
-{
-	uint32_t st_field = 0x0;
-	uint32_t op_type = 0x3;	/* read operation */
-	uint32_t ta_field = 0x2;/* ta field */
-	uint32_t data = 0;
-
-	xmdio_address(_mmio, phy_addr, 5, address);
-	_mmio[0x11] = ((st_field & 0x3) << 30) |
-	    ((op_type & 0x3) << 28) |
-	    ((phy_addr & 0x1F) << 23) |
-	    ((5 & 0x1F) << 18) |
-	    ((ta_field & 0x3) << 16) |
-	    ((data & 0xffff) << 0);
-
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-	_mmio[0x10] = (0x1 << 3) | 0x5;
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-
-	/* wait for write cycle to complete */
-	while (_mmio[0x14] & 0x1) {
-	};
-
-	data = _mmio[0x11] & 0xffff;
-	return (data);
-}
-
-static inline void
-xmdio_write(volatile unsigned int *_mmio,
-    uint32_t phy_addr, uint32_t address, uint32_t data)
-{
-	uint32_t st_field = 0x0;
-	uint32_t op_type = 0x1;	/* write operation */
-	uint32_t ta_field = 0x2;/* ta field */
-
-	xmdio_address(_mmio, phy_addr, 5, address);
-	_mmio[0x11] = ((st_field & 0x3) << 30) |
-	    ((op_type & 0x3) << 28) |
-	    ((phy_addr & 0x1F) << 23) |
-	    ((5 & 0x1F) << 18) |
-	    ((ta_field & 0x3) << 16) |
-	    ((data & 0xffff) << 0);
-
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-	_mmio[0x10] = (0x1 << 3) | 0x5;
-	_mmio[0x10] = (0x0 << 3) | 0x5;
-
-	/* wait for write cycle to complete */
-	while (_mmio[0x14] & 0x1) {
-	};
-
-}
-
-#endif
diff --git a/sys/mips/rmi/files.xlr b/sys/mips/rmi/files.xlr
deleted file mode 100644
index 2b21397e11f..00000000000
--- a/sys/mips/rmi/files.xlr
+++ /dev/null
@@ -1,25 +0,0 @@
-# $FreeBSD$
-#mips/rmi/xlr_boot1_console.c			standard
-mips/rmi/xlr_machdep.c				standard
-#mips/rmi/clock.c				standard
-mips/rmi/tick.c 				standard
-mips/rmi/iodi.c					standard
-mips/rmi/msgring.c				standard
-mips/rmi/msgring_xls.c				standard
-mips/rmi/board.c				standard
-mips/rmi/fmn.c					standard
-mips/rmi/intr_machdep.c			        standard
-mips/rmi/mpwait.S			        optional smp
-mips/rmi/xlr_i2c.c              		optional iic
-mips/rmi/uart_bus_xlr_iodi.c			optional uart
-mips/rmi/uart_cpu_mips_xlr.c			optional uart
-mips/rmi/xlr_pci.c				optional pci
-mips/rmi/xlr_pcmcia.c				optional ata
-mips/rmi/xls_ehci.c				optional usb ehci
-mips/rmi/bus_space_rmi.c			standard
-mips/rmi/bus_space_rmi_pci.c			standard
-mips/rmi/dev/sec/rmisec.c			optional rmisec
-mips/rmi/dev/sec/rmilib.c			optional rmisec
-mips/rmi/dev/nlge/if_nlge.c			optional nlge
-mips/rmi/dev/iic/max6657.c			optional max6657
-mips/rmi/dev/iic/at24co2n.c			optional at24co2n
diff --git a/sys/mips/rmi/fmn.c b/sys/mips/rmi/fmn.c
deleted file mode 100644
index 0f44ab5e204..00000000000
--- a/sys/mips/rmi/fmn.c
+++ /dev/null
@@ -1,493 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-#include <sys/sbuf.h>
-
-#include <sys/ktr.h>
-#include <sys/kernel.h>
-#include <sys/kthread.h>
-#include <sys/resourcevar.h>
-#include <sys/sched.h>
-#include <sys/unistd.h>
-#include <sys/sysctl.h>
-#include <sys/malloc.h>
-
-#include <machine/reg.h>
-#include <machine/cpu.h>
-#include <machine/hwfunc.h>
-#include <machine/mips_opcode.h>
-
-#include <machine/intr_machdep.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/board.h>
-
-#define MSGRNG_CC_INIT_CPU_DEST(dest, counter) \
-do { \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][0], 0 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][1], 1 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][2], 2 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][3], 3 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][4], 4 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][5], 5 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][6], 6 ); \
-     msgrng_write_cc(MSGRNG_CC_##dest##_REG, counter[dest][7], 7 ); \
-} while(0)
-
-
-/*
- * Keep track of our message ring handler threads, each core has a 
- * different message station. Ideally we will need to start a few
- * message handling threads every core, and wake them up depending on
- * load
- */
-struct msgring_thread {
-	struct {
-		struct thread	*thread; /* msgring handler threads */
-		int	needed;		/* thread needs to wake up */
-	} threads[XLR_NTHREADS];
-	int	running;		/* number of threads running */
-	int	nthreads;		/* number of threads started */
-	struct mtx lock;		/* for changing running/active */
-};
-static struct msgring_thread msgring_threads[XLR_MAX_CORES];
-static struct proc *msgring_proc;	/* all threads are under a proc */
-
-/*
- * The maximum number of software message handler threads to be started 
- * per core. Default is 3 per core
- */
-static int	msgring_maxthreads = 3; 
-TUNABLE_INT("hw.fmn.maxthreads", &msgring_maxthreads);
-
-/* 
- * The device drivers can register a handler for the messages sent
- * from a station (corresponding to the device). 
- */
-struct tx_stn_handler {
-	msgring_handler action;
-	void *arg;
-};
-static struct tx_stn_handler msgmap[MSGRNG_NSTATIONS];
-static struct mtx	msgmap_lock;
-
-/*
- * Initialize the messaging subsystem.
- * 
- * Message Stations are shared among all threads in a cpu core, this 
- * has to be called once from every core which is online.
- */
-void 
-xlr_msgring_cpu_init(void)
-{
-	struct stn_cc *cc_config;
-	struct bucket_size *bucket_sizes;
-	uint32_t flags;
-	int id;
-
-	KASSERT(xlr_thr_id() == 0,
-		("xlr_msgring_cpu_init from non-zero thread"));
-	id = xlr_core_id();
-	bucket_sizes = xlr_board_info.bucket_sizes;
-	cc_config = xlr_board_info.credit_configs[id];
-
-	flags = msgrng_access_enable();
-
-	/*
-	 * FMN messages are received in 8 buckets per core, set up
-	 * the bucket sizes for each bucket
-	 */
-	msgrng_write_bucksize(0, bucket_sizes->bucket[id * 8 + 0]);
-	msgrng_write_bucksize(1, bucket_sizes->bucket[id * 8 + 1]);
-	msgrng_write_bucksize(2, bucket_sizes->bucket[id * 8 + 2]);
-	msgrng_write_bucksize(3, bucket_sizes->bucket[id * 8 + 3]);
-	msgrng_write_bucksize(4, bucket_sizes->bucket[id * 8 + 4]);
-	msgrng_write_bucksize(5, bucket_sizes->bucket[id * 8 + 5]);
-	msgrng_write_bucksize(6, bucket_sizes->bucket[id * 8 + 6]);
-	msgrng_write_bucksize(7, bucket_sizes->bucket[id * 8 + 7]);
-
-	/* 
-	 * For sending FMN messages, we need credits on the destination
-	 * bucket.  Program the credits this core has on the 128 possible
-	 * destination buckets.
-	 * We cannot use a loop here, because the first argument has
-	 * to be a constant integer value.
-	 */
-	MSGRNG_CC_INIT_CPU_DEST(0,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(1,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(2,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(3,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(4,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(5,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(6,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(7,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(8,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(9,  cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(10, cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(11, cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(12, cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(13, cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(14, cc_config->counters);
-	MSGRNG_CC_INIT_CPU_DEST(15, cc_config->counters);
-	msgrng_restore(flags);
-}
-
-/*
- * Boot time init, called only once
- */
-void 
-xlr_msgring_config(void)
-{
-	mtx_init(&msgmap_lock, "msgring", NULL, MTX_SPIN);
-	
-	/* check value */
-	if (msgring_maxthreads < 0 || msgring_maxthreads > XLR_NTHREADS)
-		msgring_maxthreads = XLR_NTHREADS;
-}
-
-/*
- * Drain out max_messages for the buckets set in the bucket mask. 
- * Use max_messages = 0 to drain out all messages.
- */
-uint32_t
-xlr_msgring_handler(uint8_t bucket_mask, uint32_t max_messages)
-{
-	int bucket = 0;
-	int size = 0, code = 0, rx_stid = 0;
-	struct msgrng_msg msg;
-	struct tx_stn_handler *he;
-	unsigned int status = 0;
-	unsigned long mflags;
-	uint32_t n_msgs;
-	uint32_t msgbuckets;
-
-	n_msgs = 0;
-	mflags = msgrng_access_enable();
-	for (;;) {
-		msgbuckets = (~msgrng_read_status() >> 24) & bucket_mask;
-
-		/* all buckets empty, break */
-		if (msgbuckets == 0)
-			break;
-
-		for (bucket = 0; bucket < 8; bucket++) {
-			if ((msgbuckets & (1 << bucket)) == 0) /* empty */
-				continue;
-
-			status = message_receive(bucket, &size, &code,
-			    &rx_stid, &msg);
-			if (status != 0)
-				continue;
-			n_msgs++;
-			he = &msgmap[rx_stid];
-			if (he->action == NULL) {
-				printf("[%s]: No Handler for message from "
-				    "stn_id=%d, bucket=%d, size=%d, msg0=%jx\n",
-				    __func__, rx_stid, bucket, size,
-				    (uintmax_t)msg.msg0);
-			} else {
-				msgrng_restore(mflags);
-				(*he->action)(bucket, size, code, rx_stid,
-				    &msg, he->arg);
-				mflags = msgrng_access_enable();
-			}
-			if (max_messages > 0 && n_msgs >= max_messages)
-				goto done;
-		}
-	}
-
-done:
-	msgrng_restore(mflags);
-	return (n_msgs);
-}
-
-/* 
- * XLR COP2 supports watermark interrupts based on the number of 
- * messages pending in all the buckets in the core.  We increase 
- * the watermark until all the possible handler threads in the core
- * are woken up.
- */
-static void
-msgrng_setconfig(int running, int nthr)
-{
-	uint32_t config, mflags;
-	int watermark = 1;	/* non zero needed */
-	int wm_intr_value;
-
-	KASSERT(nthr >= 0 && nthr <= msgring_maxthreads,
-	    ("Bad value of nthr %d", nthr));
-	KASSERT(running <= nthr, ("Bad value of running %d", running));
-
-	if (running == nthr) {
-		wm_intr_value = 0;
-	} else {
-		switch (running) {
-		case 0: break;		/* keep default */
-		case 1:
-			watermark = 32; break;
-		case 2:
-			watermark = 48; break;
-		case 3: 
-			watermark = 56; break;
-		}
-		wm_intr_value = 0x2;	/* set watermark enable interrupt */
-	}
-	mflags = msgrng_access_enable();
-	config = (watermark << 24) | (IRQ_MSGRING << 16) | (1 << 8) |
-		wm_intr_value;
-	/* clear pending interrupts, they will get re-raised if still valid */
-	write_c0_eirr64(1ULL << IRQ_MSGRING);
-	msgrng_write_config(config);
-	msgrng_restore(mflags);
-}
-
-/* Debug counters */
-static int msgring_nintr[XLR_MAX_CORES];
-static int msgring_badintr[XLR_MAX_CORES];
-static int msgring_wakeup_sleep[XLR_MAX_CORES * XLR_NTHREADS];
-static int msgring_wakeup_nosleep[XLR_MAX_CORES * XLR_NTHREADS];
-static int msgring_nmsgs[XLR_MAX_CORES * XLR_NTHREADS];
-
-static int
-msgring_process_fast_intr(void *arg)
-{
-	struct msgring_thread *mthd;
-	struct thread	*td;
-	uint32_t	mflags;
-	int		core, nt;
-
-	core = xlr_core_id();
-	mthd = &msgring_threads[core];
-	msgring_nintr[core]++;
-	mtx_lock_spin(&mthd->lock);
-	nt = mthd->running;
-	if(nt >= mthd->nthreads) {
-		msgring_badintr[core]++;
-		mtx_unlock_spin(&mthd->lock);
-		return (FILTER_HANDLED);
-	}
-
-	td = mthd->threads[nt].thread;
-	mflags = msgrng_access_enable();
-
-	/* default value with interrupts disabled */
-	msgrng_write_config((1 << 24) | (IRQ_MSGRING << 16) | (1 << 8));
-	/* clear pending interrupts */
-	write_c0_eirr64(1ULL << IRQ_MSGRING);
-	msgrng_restore(mflags);
-	mtx_unlock_spin(&mthd->lock);
-
-	/* wake up the target thread */
-	mthd->threads[nt].needed = 1;
-	thread_lock(td);
-	if (TD_AWAITING_INTR(td)) {
-		msgring_wakeup_sleep[core*4+nt]++;
-		TD_CLR_IWAIT(td);
-		sched_add(td, SRQ_INTR);
-	} else
-		msgring_wakeup_nosleep[core*4+nt]++;
-	thread_unlock(td);
-	return (FILTER_HANDLED);
-}
-
-static void
-msgring_process(void *arg)
-{
-	struct msgring_thread *mthd;
-	struct thread	*td;
-	int		hwtid, tid, core;
-	int		nmsgs;
-
-	hwtid = (intptr_t)arg;
-	core = hwtid / 4;
-	tid = hwtid % 4;
-	mthd = &msgring_threads[core];
-	td = mthd->threads[tid].thread;
-	KASSERT(curthread == td,
-	    ("Incorrect thread core %d, thread %d", core, hwtid));
-
-	/* First bind this thread to the right CPU */
-	thread_lock(td);
-	sched_bind(td, xlr_hwtid_to_cpuid[hwtid]);
-	thread_unlock(td);
-
-	mtx_lock_spin(&mthd->lock);
-	++mthd->nthreads; 		/* Active thread count */
-	mtx_unlock_spin(&mthd->lock);
-
-	/* start processing messages */
-	for(;;) {
-		mtx_lock_spin(&mthd->lock);
-		++mthd->running;
-		msgrng_setconfig(mthd->running, mthd->nthreads);
-		mtx_unlock_spin(&mthd->lock);
-
-		atomic_store_rel_int(&mthd->threads[tid].needed, 0);
-		nmsgs = xlr_msgring_handler(0xff, 0);
-		msgring_nmsgs[hwtid] += nmsgs;
-
-		mtx_lock_spin(&mthd->lock);
-		--mthd->running;
-		msgrng_setconfig(mthd->running, mthd->nthreads);
-		mtx_unlock_spin(&mthd->lock);
-
-		/* sleep */
-		thread_lock(td);
-		if (mthd->threads[tid].needed) {
-			thread_unlock(td);
-			continue;
-		}
-		sched_class(td, PRI_ITHD);
-		TD_SET_IWAIT(td);
-		mi_switch(SW_VOL, NULL);
-		thread_unlock(td);
-	}
-}
-
-static void 
-create_msgring_thread(int hwtid)
-{
-	struct msgring_thread *mthd;
-	struct thread *td;
-	int	tid, core;
-	int	error;
-
-	core = hwtid / 4;
-	tid = hwtid % 4;
-	mthd = &msgring_threads[core];
-	if (tid == 0) {
-		mtx_init(&mthd->lock, "msgrngcore", NULL, MTX_SPIN);
-		mthd->running = mthd->nthreads = 0;
-	}
-	error = kproc_kthread_add(msgring_process, (void *)(uintptr_t)hwtid,
-	    &msgring_proc, &td, RFSTOPPED, 2, "msgrngproc",
-	    "msgthr%d", hwtid);
-	if (error)
-		panic("kproc_kthread_add() failed with %d", error);
-	mthd->threads[tid].thread = td;
-
-	thread_lock(td);
-	sched_class(td, PRI_ITHD);
-	sched_add(td, SRQ_INTR);
-	thread_unlock(td);
-	CTR2(KTR_INTR, "%s: created %s", __func__, td->td_name);
-}
-
-int 
-register_msgring_handler(int startb, int endb, msgring_handler action,
-    void *arg)
-{
-	void	*cookie;
-	int	i;
-	static int msgring_int_enabled = 0;
-
-	KASSERT(startb >= 0 && startb <= endb && endb < MSGRNG_NSTATIONS,
-	    ("Invalid value for for bucket range %d,%d", startb, endb));
-
-	mtx_lock_spin(&msgmap_lock);
-	for (i = startb; i <= endb; i++) {
-		KASSERT(msgmap[i].action == NULL,
-		   ("Bucket %d already used [action %p]", i, msgmap[i].action));
-		msgmap[i].action = action;
-		msgmap[i].arg = arg;
-	}
-	mtx_unlock_spin(&msgmap_lock);
-
-	if (xlr_test_and_set(&msgring_int_enabled)) {
-		create_msgring_thread(0);
-		if (msgring_maxthreads > xlr_threads_per_core)
-			msgring_maxthreads = xlr_threads_per_core;
-		cpu_establish_hardintr("msgring", msgring_process_fast_intr,
-			NULL, NULL, IRQ_MSGRING, 
-			INTR_TYPE_NET, &cookie);
-	}
-	return (0);
-}
-
-/*
- * Start message ring processing threads on other CPUs, after SMP start
- */
-static void
-start_msgring_threads(void *arg)
-{
-	int	hwt, tid;
-
-	for (hwt = 1; hwt < XLR_MAX_CORES * XLR_NTHREADS; hwt++) {
-		if ((xlr_hw_thread_mask & (1 << hwt)) == 0)
-			continue;
-		tid = hwt % XLR_NTHREADS;
-		if (tid >= msgring_maxthreads)
-			continue;
-		create_msgring_thread(hwt);
-	}
-}
-
-SYSINIT(start_msgring_threads, SI_SUB_SMP, SI_ORDER_MIDDLE,
-    start_msgring_threads, NULL);
-
-/*
- * DEBUG support, XXX: static buffer, not locked 
- */
-static int
-sys_print_debug(SYSCTL_HANDLER_ARGS)
-{
-	struct sbuf sb;
-	int error, i;
-
-	sbuf_new_for_sysctl(&sb, NULL, 64, req);
-	sbuf_printf(&sb, 
-	    "\nID      INTR   ER   WU-SLP   WU-ERR     MSGS\n");
-	for (i = 0; i < 32; i++) {
-		if ((xlr_hw_thread_mask & (1 << i)) == 0)
-			continue;
-		sbuf_printf(&sb, "%2d: %8d %4d %8d %8d %8d\n", i,
-		    msgring_nintr[i/4], msgring_badintr[i/4],
-		    msgring_wakeup_sleep[i], msgring_wakeup_nosleep[i],
-		    msgring_nmsgs[i]);
-	} 
-	error = sbuf_finish(&sb);
-	sbuf_delete(&sb);
-	return (error);
-}
-
-SYSCTL_PROC(_debug, OID_AUTO, msgring, CTLTYPE_STRING | CTLFLAG_RD, 0, 0,
-    sys_print_debug, "A", "msgring debug info");
diff --git a/sys/mips/rmi/interrupt.h b/sys/mips/rmi/interrupt.h
deleted file mode 100644
index ccb66f01925..00000000000
--- a/sys/mips/rmi/interrupt.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_INTERRUPT_H_
-#define _RMI_INTERRUPT_H_
-
-/* Defines for the IRQ numbers */
-
-#define IRQ_IPI			41  /* 8-39 are mapped by PIC intr 0-31 */
-#define IRQ_MSGRING             6
-#define IRQ_TIMER               7
-
-/*
- * XLR needs custom pre and post handlers for PCI/PCI-e interrupts
- * XXX: maybe follow i386 intsrc model
- */
-void xlr_establish_intr(const char *name, driver_filter_t filt,
-    driver_intr_t handler, void *arg, int irq, int flags,
-    void **cookiep, void (*busack)(int));
-void xlr_enable_irq(int irq);
-
-#endif				/* _RMI_INTERRUPT_H_ */
diff --git a/sys/mips/rmi/intr_machdep.c b/sys/mips/rmi/intr_machdep.c
deleted file mode 100644
index 435bc35b8d1..00000000000
--- a/sys/mips/rmi/intr_machdep.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006-2009 RMI Corporation
- * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/intr_machdep.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/hwfunc.h>
-
-#include <mips/rmi/rmi_mips_exts.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/pic.h>
-
-struct xlr_intrsrc {
-	void (*busack)(int);		/* Additional ack */
-	struct intr_event *ie;		/* event corresponding to intr */
-	int irq;
-};
-	
-static struct xlr_intrsrc xlr_interrupts[XLR_MAX_INTR];
-static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR];
-static int intrcnt_index;
-
-void
-xlr_enable_irq(int irq)
-{
-	uint64_t eimr;
-
-	eimr = read_c0_eimr64();
-	write_c0_eimr64(eimr | (1ULL << irq));
-}
-
-void
-cpu_establish_softintr(const char *name, driver_filter_t * filt,
-    void (*handler) (void *), void *arg, int irq, int flags,
-    void **cookiep)
-{
-
-	panic("Soft interrupts unsupported!\n");
-}
-
-void
-cpu_establish_hardintr(const char *name, driver_filter_t * filt,
-    void (*handler) (void *), void *arg, int irq, int flags,
-    void **cookiep)
-{
-
-	xlr_establish_intr(name, filt, handler, arg, irq, flags,
-	    cookiep, NULL);
-}
-
-static void
-xlr_post_filter(void *source)
-{
-	struct xlr_intrsrc *src = source;
-	
-	if (src->busack)
-		src->busack(src->irq);
-	pic_ack(PIC_IRQ_TO_INTR(src->irq));
-}
-
-static void
-xlr_pre_ithread(void *source)
-{
-	struct xlr_intrsrc *src = source;
-
-	if (src->busack)
-		src->busack(src->irq);
-}
-
-static void
-xlr_post_ithread(void *source)
-{
-	struct xlr_intrsrc *src = source;
-
-	pic_ack(PIC_IRQ_TO_INTR(src->irq));
-}
-
-void
-xlr_establish_intr(const char *name, driver_filter_t filt,
-    driver_intr_t handler, void *arg, int irq, int flags,
-    void **cookiep, void (*busack)(int))
-{
-	struct intr_event *ie;	/* descriptor for the IRQ */
-	struct xlr_intrsrc *src = NULL;
-	int errcode;
-
-	if (irq < 0 || irq > XLR_MAX_INTR)
-		panic("%s called for unknown hard intr %d", __func__, irq);
-
-	/*
-	 * FIXME locking - not needed now, because we do this only on
-	 * startup from CPU0
-	 */
-	src = &xlr_interrupts[irq];
-	ie = src->ie;
-	if (ie == NULL) {
-		/*
-		 * PIC based interrupts need ack in PIC, and some SoC
-		 * components need additional acks (e.g. PCI)
-		 */
-		if (PIC_IRQ_IS_PICINTR(irq))
-			errcode = intr_event_create(&ie, src, 0, irq,
-			    xlr_pre_ithread, xlr_post_ithread, xlr_post_filter,
-			    NULL, "hard intr%d:", irq);
-		else {
-			if (filt == NULL)
-				panic("Not supported - non filter percpu intr");
-			errcode = intr_event_create(&ie, src, 0, irq,
-			    NULL, NULL, NULL, NULL, "hard intr%d:", irq);
-		}
-		if (errcode) {
-			printf("Could not create event for intr %d\n", irq);
-			return;
-		}
-		src->irq = irq;
-		src->busack = busack;
-		src->ie = ie;
-	}
-	intr_event_add_handler(ie, name, filt, handler, arg,
-	    intr_priority(flags), flags, cookiep);
-	xlr_enable_irq(irq);
-}
-
-void
-cpu_intr(struct trapframe *tf)
-{
-	struct intr_event *ie;
-	uint64_t eirr, eimr;
-	int i;
-
-	critical_enter();
-
-	/* find a list of enabled interrupts */
-	eirr = read_c0_eirr64();
-	eimr = read_c0_eimr64();
-	eirr &= eimr;
-	
-	if (eirr == 0) { 
-		critical_exit();
-		return;
-	}
-	/*
-	 * No need to clear the EIRR here as the handler writes to
-	 * compare which ACKs the interrupt.
-	 */
-	if (eirr & (1 << IRQ_TIMER)) {
-		intr_event_handle(xlr_interrupts[IRQ_TIMER].ie, tf);
-		critical_exit();
-		return;
-	}
-	
-	/* FIXME sched pin >? LOCK>? */
-	for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
-		if ((eirr & (1ULL << i)) == 0)
-			continue;
-
-		ie = xlr_interrupts[i].ie;
-		/* Don't account special IRQs */
-		switch (i) {
-		case IRQ_IPI:
-		case IRQ_MSGRING:
-			break;
-		default:
-			mips_intrcnt_inc(mips_intr_counters[i]);
-		}
-
-		/* Ack the IRQ on the CPU */
-		write_c0_eirr64(1ULL << i);
-		if (intr_event_handle(ie, tf) != 0) {
-			printf("stray interrupt %d\n", i);
-		}
-	}
-	critical_exit();
-}
-
-void
-mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
-{
-	int idx = counter - intrcnt;
-
-	KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
-
-	snprintf(intrnames + (MAXCOMLEN + 1) * idx,
-	    MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
-}
-
-mips_intrcnt_t
-mips_intrcnt_create(const char* name)
-{
-	mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
-
-	mips_intrcnt_setname(counter, name);
-	return counter;
-}
-
-void
-cpu_init_interrupts()
-{
-	int i;
-	char name[MAXCOMLEN + 1];
-
-	/*
-	 * Initialize all available vectors so spare IRQ
-	 * would show up in systat output 
-	 */
-	for (i = 0; i < XLR_MAX_INTR; i++) {
-		snprintf(name, MAXCOMLEN + 1, "int%d:", i);
-		mips_intr_counters[i] = mips_intrcnt_create(name);
-	}
-}
diff --git a/sys/mips/rmi/iodi.c b/sys/mips/rmi/iodi.c
deleted file mode 100644
index 363424034af..00000000000
--- a/sys/mips/rmi/iodi.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/reboot.h>
-#include <sys/rman.h>
-#include <sys/types.h>
-#include <sys/malloc.h>
-#include <sys/interrupt.h>
-#include <sys/module.h>
-
-#include <machine/cpu.h>
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-#include <machine/clock.h>	/* for DELAY */
-#include <machine/resource.h>
-
-#include <mips/rmi/board.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/rmi_mips_exts.h>
-
-#include <mips/rmi/dev/xlr/atx_cpld.h>
-#include <mips/rmi/dev/xlr/xgmac_mdio.h>
-
-extern bus_space_tag_t uart_bus_space_mem;
-
-static struct resource *
-iodi_alloc_resource(device_t, device_t, int, int *,
-    rman_res_t, rman_res_t, rman_res_t, u_int);
-
-static int
-iodi_activate_resource(device_t, device_t, int, int,
-    struct resource *);
-static int
-iodi_setup_intr(device_t, device_t, struct resource *, int,
-    driver_filter_t *, driver_intr_t *, void *, void **);
-
-struct iodi_softc *iodi_softc;	/* There can be only one. */
-
-/*
- * We will manage the Flash/PCMCIA devices in IODI for now.
- * The NOR flash, Compact flash etc. which can be connected on 
- * various chip selects on the peripheral IO, should have a 
- * separate bus later.
- */
-static void
-bridge_pcmcia_ack(int irq)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_FLASH_OFFSET);
-
-	xlr_write_reg(mmio, 0x60, 0xffffffff);
-}
-
-static int
-iodi_setup_intr(device_t dev, device_t child,
-    struct resource *ires, int flags, driver_filter_t *filt,
-    driver_intr_t *intr, void *arg, void **cookiep)
-{
-	const char *name = device_get_name(child);
-
-	if (strcmp(name, "uart") == 0) {
-		/* FIXME uart 1? */
-		cpu_establish_hardintr("uart", filt, intr, arg,
-		    PIC_UART_0_IRQ, flags, cookiep);
-		pic_setup_intr(PIC_IRT_UART_0_INDEX, PIC_UART_0_IRQ, 0x1, 1);
-	} else if (strcmp(name, "nlge") == 0) {
-		int irq;
-
-		/* This is a hack to pass in the irq */
-		irq = (intptr_t)ires->__r_i;
-		cpu_establish_hardintr("nlge", filt, intr, arg, irq, flags,
-		    cookiep);
-		pic_setup_intr(irq - PIC_IRQ_BASE, irq, 0x1, 1);
-	} else if (strcmp(name, "ehci") == 0) {
-		cpu_establish_hardintr("ehci", filt, intr, arg, PIC_USB_IRQ, flags,
-		    cookiep);
-		pic_setup_intr(PIC_USB_IRQ - PIC_IRQ_BASE, PIC_USB_IRQ, 0x1, 1);
-	} else if (strcmp(name, "ata") == 0) {
-		xlr_establish_intr("ata", filt, intr, arg, PIC_PCMCIA_IRQ, flags,
-		    cookiep, bridge_pcmcia_ack);
-		pic_setup_intr(PIC_PCMCIA_IRQ - PIC_IRQ_BASE, PIC_PCMCIA_IRQ, 0x1, 1);
-	}
-	return (0);
-}
-
-static struct resource *
-iodi_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct resource *res = malloc(sizeof(*res), M_DEVBUF, M_WAITOK);
-	const char *name = device_get_name(child);
-	int unit;
-
-#ifdef DEBUG
-	switch (type) {
-	case SYS_RES_IRQ:
-		device_printf(bus, "IRQ resource - for %s %jx-%jx\n",
-		    device_get_nameunit(child), start, end);
-		break;
-
-	case SYS_RES_IOPORT:
-		device_printf(bus, "IOPORT resource - for %s %jx-%jx\n",
-		    device_get_nameunit(child), start, end);
-		break;
-
-	case SYS_RES_MEMORY:
-		device_printf(bus, "MEMORY resource - for %s %jx-%jx\n",
-		    device_get_nameunit(child), start, end);
-		break;
-	}
-#endif
-
-	if (strcmp(name, "uart") == 0) {
-		if ((unit = device_get_unit(child)) == 0) {	/* uart 0 */
-			res->r_bushandle = (xlr_io_base + XLR_IO_UART_0_OFFSET);
-		} else if (unit == 1) {
-			res->r_bushandle = (xlr_io_base + XLR_IO_UART_1_OFFSET);
-		} else
-			printf("%s: Unknown uart unit\n", __FUNCTION__);
-
-		res->r_bustag = uart_bus_space_mem;
-	} else if (strcmp(name, "ehci") == 0) {
-		res->r_bushandle = MIPS_PHYS_TO_KSEG1(0x1ef24000);
-		res->r_bustag = rmi_pci_bus_space;
-	} else if (strcmp(name, "cfi") == 0) {
-		res->r_bushandle = MIPS_PHYS_TO_KSEG1(0x1c000000);
-		res->r_bustag = 0;
-	} else if (strcmp(name, "ata") == 0) {
-		res->r_bushandle = MIPS_PHYS_TO_KSEG1(0x1d000000);
-		res->r_bustag = rmi_pci_bus_space;  /* byte swapping (not really PCI) */
-	}
-	/* res->r_start = *rid; */
-	return (res);
-}
-
-static int
-iodi_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	return (0);
-}
-
-/* prototypes */
-static int iodi_probe(device_t);
-static int iodi_attach(device_t);
-static int iodi_detach(device_t);
-static void iodi_identify(driver_t *, device_t);
-
-int
-iodi_probe(device_t dev)
-{
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-void
-iodi_identify(driver_t * driver, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "iodi", 0);
-}
-
-int
-iodi_attach(device_t dev)
-{
-	device_t tmpd;
-	int i;
-
-	/*
-	 * Attach each devices
-	 */
-	device_add_child(dev, "uart", 0);
-	device_add_child(dev, "xlr_i2c", 0);
-	device_add_child(dev, "xlr_i2c", 1);
-	device_add_child(dev, "pcib", 0);
-	device_add_child(dev, "rmisec", -1);
-
-	if (xlr_board_info.usb)
-		device_add_child(dev, "ehci", 0);
-
-	if (xlr_board_info.cfi)
-		device_add_child(dev, "cfi", 0);
-
-	if (xlr_board_info.ata)
-		device_add_child(dev, "ata", 0);
-
-	for (i = 0; i < 3; i++) {
-		if (xlr_board_info.gmac_block[i].enabled == 0)
-			continue;
-		tmpd = device_add_child(dev, "nlna", i);
-		device_set_ivars(tmpd, &xlr_board_info.gmac_block[i]);
-	}
-
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-	return 0;
-}
-
-int
-iodi_detach(device_t dev)
-{
-	device_t nlna_dev;
-	int error, i, ret;
-
-	error = 0;
-	ret = 0;
-	for (i = 0; i < 3; i++) {
-		nlna_dev = device_find_child(dev, "nlna", i);
-		if (nlna_dev != NULL)
-			error = bus_generic_detach(nlna_dev);
-		if (error)
-			ret = error;
-	}
-	return ret;
-}
-
-static device_method_t iodi_methods[] = {
-	DEVMETHOD(device_probe, iodi_probe),
-	DEVMETHOD(device_attach, iodi_attach),
-	DEVMETHOD(device_detach, iodi_detach),
-	DEVMETHOD(device_identify, iodi_identify),
-	DEVMETHOD(bus_alloc_resource, iodi_alloc_resource),
-	DEVMETHOD(bus_activate_resource, iodi_activate_resource),
-	DEVMETHOD(bus_add_child, bus_generic_add_child),
-	DEVMETHOD(bus_setup_intr, iodi_setup_intr),
-	{0, 0},
-};
-
-static driver_t iodi_driver = {
-	"iodi",
-	iodi_methods,
-	1			/* no softc */
-};
-static devclass_t iodi_devclass;
-
-DRIVER_MODULE(iodi, nexus, iodi_driver, iodi_devclass, 0, 0);
diff --git a/sys/mips/rmi/iomap.h b/sys/mips/rmi/iomap.h
deleted file mode 100644
index 0395a7702eb..00000000000
--- a/sys/mips/rmi/iomap.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_IOMAP_H_
-#define _RMI_IOMAP_H_
-
-#include <machine/endian.h>
-#define XLR_DEVICE_REGISTER_BASE	0x1EF00000
-#define DEFAULT_XLR_IO_BASE 0xffffffffbef00000ULL
-#define XLR_IO_SIZE                   0x1000
-
-#define XLR_IO_BRIDGE_OFFSET          0x00000
-
-#define XLR_IO_DDR2_CHN0_OFFSET       0x01000
-#define XLR_IO_DDR2_CHN1_OFFSET       0x02000
-#define XLR_IO_DDR2_CHN2_OFFSET       0x03000
-#define XLR_IO_DDR2_CHN3_OFFSET       0x04000
-
-#define XLR_IO_RLD2_CHN0_OFFSET       0x05000
-#define XLR_IO_RLD2_CHN1_OFFSET       0x06000
-
-#define XLR_IO_SRAM_OFFSET            0x07000
-
-#define XLR_IO_PIC_OFFSET             0x08000
-#define XLR_IO_PCIX_OFFSET            0x09000
-#define XLR_IO_HT_OFFSET              0x0A000
-
-#define XLR_IO_SECURITY_OFFSET        0x0B000
-
-#define XLR_IO_GMAC_0_OFFSET          0x0C000
-#define XLR_IO_GMAC_1_OFFSET          0x0D000
-#define XLR_IO_GMAC_2_OFFSET          0x0E000
-#define XLR_IO_GMAC_3_OFFSET          0x0F000
-
-#define XLR_IO_SPI4_0_OFFSET          0x10000
-#define XLR_IO_XGMAC_0_OFFSET         0x11000
-#define XLR_IO_SPI4_1_OFFSET          0x12000
-#define XLR_IO_XGMAC_1_OFFSET         0x13000
-
-#define XLR_IO_UART_0_OFFSET          0x14000
-#define XLR_IO_UART_1_OFFSET          0x15000
-#define XLR_UART0ADDR                 (XLR_IO_UART_0_OFFSET+XLR_DEVICE_REGISTER_BASE)
-
-
-
-#define XLR_IO_I2C_0_OFFSET           0x16000
-#define XLR_IO_I2C_1_OFFSET           0x17000
-
-#define XLR_IO_GPIO_OFFSET            0x18000
-
-#define XLR_IO_FLASH_OFFSET           0x19000
-
-#define XLR_IO_TB_OFFSET           	  0x1C000
-
-#define XLR_IO_GMAC_4_OFFSET          0x20000
-#define XLR_IO_GMAC_5_OFFSET          0x21000
-#define XLR_IO_GMAC_6_OFFSET          0x22000
-#define XLR_IO_GMAC_7_OFFSET          0x23000
-
-#define XLR_IO_PCIE_0_OFFSET          0x1E000
-#define XLR_IO_PCIE_1_OFFSET          0x1F000
-
-#define XLR_IO_USB_0_OFFSET           0x24000
-#define XLR_IO_USB_1_OFFSET           0x25000
-
-#define XLR_IO_COMP_OFFSET            0x1d000
-
-/* Base Address (Virtual) of the PCI Config address space
- * For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
- * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
- * ie 1<<24 = 16M
- */
-#define DEFAULT_PCI_CONFIG_BASE         0x18000000
-#define DEFAULT_HT_TYPE0_CFG_BASE       0x16000000
-#define DEFAULT_HT_TYPE1_CFG_BASE       0x17000000
-
-typedef volatile __uint32_t xlr_reg_t;
-extern unsigned long xlr_io_base;
-
-#define xlr_io_mmio(offset) ((xlr_reg_t *)(xlr_io_base+(offset)))
-
-#define xlr_read_reg(base, offset) (__ntohl((base)[(offset)]))
-#define xlr_write_reg(base, offset, value) ((base)[(offset)] = __htonl((value)))
-
-extern void on_chip_init(void);
-
-#endif				/* _RMI_IOMAP_H_ */
diff --git a/sys/mips/rmi/mpwait.S b/sys/mips/rmi/mpwait.S
deleted file mode 100644
index 86c0180123c..00000000000
--- a/sys/mips/rmi/mpwait.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*-
- * Copyright (c) 2010 RMI Technologies Ltd.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-
-#include "assym.s"
-
-	.text
-	.set	noat
-	.set	noreorder
-
-/*
- * On XLR the slave processors and threads will be executing boot
- * loader code on startup. We need to make them run our code before
- * blowing away boot loader memory.
- */
-LEAF(mpwait)
-	PTR_LA  gp, _C_LABEL(_gp)
-	PTR_LA  t1, _C_LABEL(xlr_ap_release)
-	mfc0	t2, $15, 1
-	andi	t2, 0x1f
-	sll	t2, t2, 2
-	add	t1, t2
-
-1:	lw	t0, 0(t1)
-	bnez	t0, 2f
-	nop     /* We should not busy wait in core0 threads */
-	nop     /* on bootup, this will slow the cpu0 thread */
-	nop     /* down - TODO - wait with IPI based wakeup */
-	nop
-	nop
-	nop
-	nop
-	nop
-	j	1b
-	nop
-2:
-	PTR_LA  t1, _C_LABEL(mpentry)
-	jr	t1
-	nop
-END(mpwait)
diff --git a/sys/mips/rmi/msgring.c b/sys/mips/rmi/msgring.c
deleted file mode 100644
index 995532a1184..00000000000
--- a/sys/mips/rmi/msgring.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-/**********************************************************
- * -----------------DO NOT EDIT THIS FILE------------------
- * This file has been autogenerated by the build process
- * from "msgring.cfg"
- **********************************************************/
-
-#include <mips/rmi/msgring.h>
-
-struct bucket_size bucket_sizes = {
-	{
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 16, 16, 16, 16, 16, 16, 16,
-		16, 16, 16, 16, 16, 16, 16, 0,
-		32, 16, 16, 16, 16, 16, 16, 16,
-		16, 16, 16, 16, 16, 16, 16, 0,
-		0, 32, 32, 32, 32, 32, 0, 32,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 32, 0, 32, 0, 0, 0, 0,
-		128, 0, 0, 0, 128, 0, 0, 0,
-	}
-};
-
-struct stn_cc cc_table_cpu_0 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 4, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 2, 4, 4, 4, 4, 0, 2},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 2, 0, 2, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_1 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 2, 4, 4, 4, 4, 0, 2},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 2, 0, 2, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_2 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_3 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_4 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_5 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_6 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_cpu_7 = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{4, 2, 2, 2, 2, 2, 2, 2},
-		{2, 2, 2, 2, 2, 2, 2, 0},
-		{0, 4, 4, 4, 4, 4, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 4, 0, 0, 0, 0},
-		{16, 0, 0, 0, 16, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_xgs_0 = {{
-
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_xgs_1 = {{
-
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 4, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_gmac = {{
-
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{8, 8, 8, 8, 16, 16, 16, 16},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 0, 0, 0, 0, 0, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_dma = {{
-
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc cc_table_sec = {{
-
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 4, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 8, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
diff --git a/sys/mips/rmi/msgring.cfg b/sys/mips/rmi/msgring.cfg
deleted file mode 100644
index 18fa2b5562e..00000000000
--- a/sys/mips/rmi/msgring.cfg
+++ /dev/null
@@ -1,1185 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-/* 
- * This file defines the message ring configuration for phoenix-8. It tries to allow 
- * many different point-point communications between the message stations on the message ring
- * and as result is _not_ the best configuration for performance
- *
- * The message ring on phoenix family of processors connects the cpus, gmacs, xgmac/spi4,
- * security engine and the general purpose DMA engines. It provides a high bandwidth,
- * low latency communication links. On traditional processors, this communication goes through
- * which inherently does not scale very well with increasing number of cpus. 
- * 
- * Message ring has an in-built flow control mechanism. Every agent/station on the ring has to
- * have software configured credits to send messages to any agent. Every receiving agent on the
- * ring has a 256 entry FIFO that can divided into "buckets". All addressing on the ring is 
- * in terms of buckets. There are a total 128 buckets on the ring. The total number of credits 
- * across all sending agents should not exceed the bucket size. 
- *
- * Below are the receiving agents and the max number of buckets they can have
- * 	CPU 0	: 8 buckets
- * 	CPU 1	: 8 buckets
- * 	CPU 2	: 8 buckets
- * 	CPU 3	: 8 buckets
- * 	CPU 4	: 8 buckets
- * 	CPU 5	: 8 buckets
- * 	CPU 6	: 8 buckets
- * 	CPU 7	: 8 buckets
- * 
- * 	XGMAC 0 / SPI4 0
- *			 TX	:	16 buckets
- *			 FREE	:	2  buckets
- * 	XGMAC 1 / SPI4 1
- *			 TX	:	16 buckets
- *			 FREE	:	2  buckets
- * 
- *	GMAC	: 8 buckets	
- *	
- *	SEC	: 8 buckets
- * 
- *	DMA	: 8 buckets
- *
- * The bucket size of a bucket should be aligned to the bucket's starting index in that
- * receiving station's FIFO. For example, if sizes of bucket0 and bucket1 of a station 
- * are 32 and 32, bucket2's size has to be 64. bucket size 0 is valid.
- *
- * The format of the file is pretty straight forward. Each bucket definition has the size
- * and the list of sending agents to that bucket with the number of credits to send.
- * 
- * Undefined buckets have a size of 0 and Tx stations have 0 credits to send to that bucket.
- *
- *  Following are the currently supported bucket names
- *  cpu_0_0
- *  cpu_0_1
- *  cpu_0_2
- *  cpu_0_3
- *  cpu_0_4
- *  cpu_0_5
- *  cpu_0_6
- *  cpu_0_7
- *  
- *  cpu_1_0
- *  cpu_1_1
- *  cpu_1_2
- *  cpu_1_3
- *  cpu_1_4
- *  cpu_1_5
- *  cpu_1_6
- *  cpu_1_7
- *  
- *  cpu_2_0
- *  cpu_2_1
- *  cpu_2_2
- *  cpu_2_3
- *  cpu_2_4
- *  cpu_2_5
- *  cpu_2_6
- *  cpu_2_7
- *  
- *  cpu_3_0
- *  cpu_3_1
- *  cpu_3_2
- *  cpu_3_3
- *  cpu_3_4
- *  cpu_3_5
- *  cpu_3_6
- *  cpu_3_7
- *  
- *  cpu_4_0
- *  cpu_4_1
- *  cpu_4_2
- *  cpu_4_3
- *  cpu_4_4
- *  cpu_4_5
- *  cpu_4_6
- *  cpu_4_7
- *  
- *  cpu_5_0
- *  cpu_5_1
- *  cpu_5_2
- *  cpu_5_3
- *  cpu_5_4
- *  cpu_5_5
- *  cpu_5_6
- *  cpu_5_7
- *  
- *  cpu_6_0
- *  cpu_6_1
- *  cpu_6_2
- *  cpu_6_3
- *  cpu_6_4
- *  cpu_6_5
- *  cpu_6_6
- *  cpu_6_7
- *  
- *  cpu_7_0
- *  cpu_7_1
- *  cpu_7_2
- *  cpu_7_3
- *  cpu_7_4
- *  cpu_7_5
- *  cpu_7_6
- *  cpu_7_7
- *
- *  xgs_0_tx_0
- *  xgs_0_tx_1
- *  xgs_0_tx_2
- *  xgs_0_tx_3
- *  xgs_0_tx_4
- *  xgs_0_tx_5
- *  xgs_0_tx_6
- *  xgs_0_tx_7
- *  xgs_0_tx_8
- *  xgs_0_tx_9
- *  xgs_0_tx_10
- *  xgs_0_tx_11
- *  xgs_0_tx_12
- *  xgs_0_tx_13
- *  xgs_0_tx_14
- *  xgs_0_tx_15
- *
- *  xgs_1_tx_0
- *  xgs_1_tx_1
- *  xgs_1_tx_2
- *  xgs_1_tx_3
- *  xgs_1_tx_4
- *  xgs_1_tx_5
- *  xgs_1_tx_6
- *  xgs_1_tx_7
- *  xgs_1_tx_8
- *  xgs_1_tx_9
- *  xgs_1_tx_10
- *  xgs_1_tx_11
- *  xgs_1_tx_12
- *  xgs_1_tx_13
- *  xgs_1_tx_14
- *  xgs_1_tx_15
- *
- *  gmac_rsvd_0
- *  gmac_rfr_0
- *  gmac_tx_0
- *  gmac_tx_1
- *  gmac_tx_2
- *  gmac_tx_3
- *  gmac_rsvd_1
- *  gmac_rfr_1
- *
- *  xgs_0_rsvd
- *  xgs_0_rfr
- *
- *  xgs_1_rsvd
- *  xgs_1_rfr
- *
- *  sec_pipe_0
- *  sec_pipe_1
- *  sec_pipe_2
- *  sec_pipe_3
- *  sec_rsa
- *
- * Following are the currently supported Tx Agent/Station names
- *
- *   tx_stn_cpu_0
- *  tx_stn_cpu_1
- *  tx_stn_cpu_2
- *  tx_stn_cpu_3
- *  tx_stn_cpu_4
- *  tx_stn_cpu_5
- *  tx_stn_cpu_6
- *  tx_stn_cpu_7
- *
- *   tx_stn_xgs_0
- *  tx_stn_xgs_1
- *
- *   tx_stn_gmac
- *
- *   tx_stn_dma
- *
- *   tx_stn_sec
- *
- *
- * 
- */
-
-/*************************************************************/
-// CPU_0 Message Station 
-
-bucket "cpu_0_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_0_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_0_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_0_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_0_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_0_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_0_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_0_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-/*************************************************************/
-// CPU_1 Message Station 
-
-bucket "cpu_1_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_1_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_1_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_1_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  4;
-    "tx_stn_cpu_0" 4; /* NEEDED BY RMIOS IPSEC */
-}
-bucket "cpu_1_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_1_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_1_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_1_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-/*************************************************************/
-// CPU_2 Message Station 
-
-bucket "cpu_2_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_2_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_2_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_2_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_2_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_2_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_2_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_2_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-/*************************************************************/
-// CPU_3 Message Station 
-
-bucket "cpu_3_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_3_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_3_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_3_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_3_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_3_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_3_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_3_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-/*************************************************************/
-// CPU_4 Message Station 
-
-bucket "cpu_4_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_4_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_4_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_4_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_4_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_4_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_4_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_4_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-/*************************************************************/
-// CPU_5 Message Station 
-
-bucket "cpu_5_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_5_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_5_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_5_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_5_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_5_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_5_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_5_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-
-/*************************************************************/
-// CPU_6 Message Station 
-
-bucket "cpu_6_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_6_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_6_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_6_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_6_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_6_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_6_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_6_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-
-/*************************************************************/
-// CPU_7 Message Station 
-
-bucket "cpu_7_0" { 
-	size 32;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_7_1" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_7_2" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_7_3" { 
-	size 32; 
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-	"tx_stn_gmac" 8;
-	"tx_stn_sec"  8;
-}
-bucket "cpu_7_4" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_7_5" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_7_6" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-bucket "cpu_7_7" {
-	size 32;
-	"tx_stn_gmac" 16;
-	"tx_stn_xgs_0" 8;
-	"tx_stn_xgs_1" 8;
-}
-
-
-/*************************************************************/
-// GMAC Message Station 
-
-bucket "gmac_rfr_0" {
-	size 32;
-	"tx_stn_cpu_0" 2;
-	"tx_stn_cpu_1" 2;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-	"tx_stn_gmac" 4;
-}
-
-bucket "gmac_tx_0" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-}
-
-bucket "gmac_tx_1" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-}
-
-bucket "gmac_tx_2" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-}
-
-bucket "gmac_tx_3" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-}
-
-bucket "gmac_rfr_1" {
-	size 32;
-	"tx_stn_cpu_0" 2;
-	"tx_stn_cpu_1" 2;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_cpu_4" 4;
-	"tx_stn_cpu_5" 4;
-	"tx_stn_cpu_6" 4;
-	"tx_stn_cpu_7" 4;
-	"tx_stn_gmac" 4;
-}
-/*********************************************/
-// xgmac
-bucket "xgs_0_rfr" {
-    size 32;
-    "tx_stn_cpu_0" 2;
-    "tx_stn_cpu_1" 2;
-    "tx_stn_cpu_2" 4;
-    "tx_stn_cpu_3" 4;
-    "tx_stn_cpu_4" 4;
-    "tx_stn_cpu_5" 4;
-    "tx_stn_cpu_6" 4;
-    "tx_stn_cpu_7" 4;
-    "tx_stn_xgs_0" 4;
-}
-
-bucket "xgs_0_tx_0" {
-    size 32;
-    "tx_stn_cpu_0" 4;
-    "tx_stn_cpu_1" 4;
-    "tx_stn_cpu_2" 4;
-    "tx_stn_cpu_3" 4;
-    "tx_stn_cpu_4" 4;
-    "tx_stn_cpu_5" 4;
-    "tx_stn_cpu_6" 4;
-    "tx_stn_cpu_7" 4;
-}
-
-bucket "xgs_0_tx_1" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_2" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_3" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_4" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-bucket "xgs_0_tx_5" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_6" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_7" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_8" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_9" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_10" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-bucket "xgs_0_tx_11" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_12" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_13" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_0_tx_14" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-bucket "xgs_1_rfr" {
-    size 32;
-    "tx_stn_cpu_0" 2;
-    "tx_stn_cpu_1" 2;
-    "tx_stn_cpu_2" 4;
-    "tx_stn_cpu_3" 4;
-    "tx_stn_cpu_4" 4;
-    "tx_stn_cpu_5" 4;
-    "tx_stn_cpu_6" 4;
-    "tx_stn_cpu_7" 4;
-    "tx_stn_xgs_1" 4;
-}
-
-bucket "xgs_1_tx_0" {
-    size 32;
-    "tx_stn_cpu_0" 4;
-    "tx_stn_cpu_1" 4;
-    "tx_stn_cpu_2" 4;
-    "tx_stn_cpu_3" 4;
-    "tx_stn_cpu_4" 4;
-    "tx_stn_cpu_5" 4;
-    "tx_stn_cpu_6" 4;
-    "tx_stn_cpu_7" 4;
-}
-
-
-bucket "xgs_1_tx_1" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_2" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_3" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_4" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_5" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_6" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_7" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-bucket "xgs_1_tx_8" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-bucket "xgs_1_tx_9" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-bucket "xgs_1_tx_10" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_11" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_12" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_13" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-bucket "xgs_1_tx_14" {
-  size 16;
-  "tx_stn_cpu_0" 2;
-  "tx_stn_cpu_1" 2;
-  "tx_stn_cpu_2" 2;
-  "tx_stn_cpu_3" 2;
-  "tx_stn_cpu_4" 2;
-  "tx_stn_cpu_5" 2;
-  "tx_stn_cpu_6" 2;
-  "tx_stn_cpu_7" 2;
-}
-
-
-
-
-
-
-/*************************************************************/
-// Security Message Station 
-
-bucket "sec_pipe_0" {
-        size 128;
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-        "tx_stn_cpu_2" 16;
-        "tx_stn_cpu_3" 16;
-        "tx_stn_cpu_4" 16;
-        "tx_stn_cpu_5" 16;
-        "tx_stn_cpu_6" 16;
-        "tx_stn_cpu_7" 16;
-}
-
-bucket "sec_rsa" {
-        size 128;
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-        "tx_stn_cpu_2" 16;
-        "tx_stn_cpu_3" 16;
-        "tx_stn_cpu_4" 16;
-        "tx_stn_cpu_5" 16;
-        "tx_stn_cpu_6" 16;
-        "tx_stn_cpu_7" 16;
-}
-
diff --git a/sys/mips/rmi/msgring.h b/sys/mips/rmi/msgring.h
deleted file mode 100644
index 5cc9072d9e7..00000000000
--- a/sys/mips/rmi/msgring.h
+++ /dev/null
@@ -1,372 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_MSGRING_H_
-#define _RMI_MSGRING_H_
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/types.h>
-
-#include <machine/cpuregs.h>
-#include <machine/cpufunc.h>
-#include <mips/rmi/rmi_mips_exts.h>
-
-#define	MSGRNG_TX_BUF_REG	0
-#define	MSGRNG_RX_BUF_REG	1
-#define	MSGRNG_MSG_STATUS_REG	2
-#define	MSGRNG_MSG_CONFIG_REG	3
-#define MSGRNG_MSG_BUCKSIZE_REG	4
-
-#define	MSGRNG_CC_0_REG		16
-#define	MSGRNG_CC_1_REG		17
-#define	MSGRNG_CC_2_REG		18
-#define	MSGRNG_CC_3_REG		19
-#define	MSGRNG_CC_4_REG		20
-#define	MSGRNG_CC_5_REG		21
-#define	MSGRNG_CC_6_REG		22
-#define	MSGRNG_CC_7_REG		23
-#define	MSGRNG_CC_8_REG		24
-#define	MSGRNG_CC_9_REG		25
-#define	MSGRNG_CC_10_REG	26
-#define	MSGRNG_CC_11_REG	27
-#define	MSGRNG_CC_12_REG	28
-#define	MSGRNG_CC_13_REG	29
-#define	MSGRNG_CC_14_REG	30
-#define	MSGRNG_CC_15_REG	31
-
-/* Station IDs */
-#define	MSGRNG_STNID_CPU0	0x00
-#define	MSGRNG_STNID_CPU1	0x08
-#define	MSGRNG_STNID_CPU2	0x10
-#define	MSGRNG_STNID_CPU3	0x18
-#define	MSGRNG_STNID_CPU4	0x20
-#define	MSGRNG_STNID_CPU5	0x28
-#define	MSGRNG_STNID_CPU6	0x30
-#define	MSGRNG_STNID_CPU7	0x38
-#define	MSGRNG_STNID_XGS0_TX	64
-#define	MSGRNG_STNID_XMAC0_00_TX	64
-#define	MSGRNG_STNID_XMAC0_01_TX	65
-#define	MSGRNG_STNID_XMAC0_02_TX	66
-#define	MSGRNG_STNID_XMAC0_03_TX	67
-#define	MSGRNG_STNID_XMAC0_04_TX	68
-#define	MSGRNG_STNID_XMAC0_05_TX	69
-#define	MSGRNG_STNID_XMAC0_06_TX	70
-#define	MSGRNG_STNID_XMAC0_07_TX	71
-#define	MSGRNG_STNID_XMAC0_08_TX	72
-#define	MSGRNG_STNID_XMAC0_09_TX	73
-#define	MSGRNG_STNID_XMAC0_10_TX	74
-#define	MSGRNG_STNID_XMAC0_11_TX	75
-#define	MSGRNG_STNID_XMAC0_12_TX	76
-#define	MSGRNG_STNID_XMAC0_13_TX	77
-#define	MSGRNG_STNID_XMAC0_14_TX	78
-#define	MSGRNG_STNID_XMAC0_15_TX	79
-
-#define	MSGRNG_STNID_XGS1_TX		80
-#define	MSGRNG_STNID_XMAC1_00_TX	80
-#define	MSGRNG_STNID_XMAC1_01_TX	81
-#define	MSGRNG_STNID_XMAC1_02_TX	82
-#define	MSGRNG_STNID_XMAC1_03_TX	83
-#define	MSGRNG_STNID_XMAC1_04_TX	84
-#define	MSGRNG_STNID_XMAC1_05_TX	85
-#define	MSGRNG_STNID_XMAC1_06_TX	86
-#define	MSGRNG_STNID_XMAC1_07_TX	87
-#define	MSGRNG_STNID_XMAC1_08_TX	88
-#define	MSGRNG_STNID_XMAC1_09_TX	89
-#define	MSGRNG_STNID_XMAC1_10_TX	90
-#define	MSGRNG_STNID_XMAC1_11_TX	91
-#define	MSGRNG_STNID_XMAC1_12_TX	92
-#define	MSGRNG_STNID_XMAC1_13_TX	93
-#define	MSGRNG_STNID_XMAC1_14_TX	94
-#define	MSGRNG_STNID_XMAC1_15_TX	95
-
-#define	MSGRNG_STNID_GMAC		96
-#define	MSGRNG_STNID_GMACJFR_0		96
-#define	MSGRNG_STNID_GMACRFR_0		97
-#define	MSGRNG_STNID_GMACTX0		98
-#define	MSGRNG_STNID_GMACTX1		99
-#define	MSGRNG_STNID_GMACTX2		100
-#define	MSGRNG_STNID_GMACTX3		101
-#define	MSGRNG_STNID_GMACJFR_1		102
-#define	MSGRNG_STNID_GMACRFR_1		103
-
-#define	MSGRNG_STNID_DMA		104
-#define	MSGRNG_STNID_DMA_0		104
-#define	MSGRNG_STNID_DMA_1		105
-#define	MSGRNG_STNID_DMA_2		106
-#define	MSGRNG_STNID_DMA_3		107
-
-#define	MSGRNG_STNID_XGS0FR		112
-#define	MSGRNG_STNID_XMAC0JFR		112
-#define	MSGRNG_STNID_XMAC0RFR		113
-
-#define	MSGRNG_STNID_XGS1FR		114
-#define	MSGRNG_STNID_XMAC1JFR		114
-#define	MSGRNG_STNID_XMAC1RFR		115
-#define	MSGRNG_STNID_SEC		120
-#define	MSGRNG_STNID_SEC0		120
-#define	MSGRNG_STNID_SEC1		121
-#define	MSGRNG_STNID_SEC2		122
-#define	MSGRNG_STNID_SEC3		123
-#define	MSGRNG_STNID_PK0		124
-#define	MSGRNG_STNID_SEC_RSA		124
-#define	MSGRNG_STNID_SEC_RSVD0		125
-#define	MSGRNG_STNID_SEC_RSVD1		126
-#define	MSGRNG_STNID_SEC_RSVD2		127
-
-#define	MSGRNG_STNID_GMAC1		80
-#define	MSGRNG_STNID_GMAC1_FR_0		81
-#define	MSGRNG_STNID_GMAC1_TX0		82
-#define	MSGRNG_STNID_GMAC1_TX1		83
-#define	MSGRNG_STNID_GMAC1_TX2		84
-#define	MSGRNG_STNID_GMAC1_TX3		85
-#define	MSGRNG_STNID_GMAC1_FR_1		87
-#define	MSGRNG_STNID_GMAC0		96
-#define	MSGRNG_STNID_GMAC0_FR_0		97
-#define	MSGRNG_STNID_GMAC0_TX0		98
-#define	MSGRNG_STNID_GMAC0_TX1		99
-#define	MSGRNG_STNID_GMAC0_TX2		100
-#define	MSGRNG_STNID_GMAC0_TX3		101
-#define	MSGRNG_STNID_GMAC0_FR_1		103
-#define	MSGRNG_STNID_CMP_0		108
-#define	MSGRNG_STNID_CMP_1		109
-#define	MSGRNG_STNID_CMP_2		110
-#define	MSGRNG_STNID_CMP_3		111
-#define	MSGRNG_STNID_PCIE_0		116
-#define	MSGRNG_STNID_PCIE_1		117
-#define	MSGRNG_STNID_PCIE_2		118
-#define	MSGRNG_STNID_PCIE_3		119
-#define	MSGRNG_STNID_XLS_PK0		121
-
-#define	MSGRNG_CODE_MAC		0
-#define	MSGRNG_CODE_XGMAC	2
-#define	MSGRNG_CODE_SEC		0
-#define	MSGRNG_CODE_BOOT_WAKEUP	200
-#define	MSGRNG_CODE_SPI4	3
-
-#define	msgrng_read_status()	read_c2_register32(MSGRNG_MSG_STATUS_REG, 0)
-#define	msgrng_read_config()	read_c2_register32(MSGRNG_MSG_CONFIG_REG, 0)
-#define	msgrng_write_config(v)	write_c2_register32(MSGRNG_MSG_CONFIG_REG, 0, v)
-#define	msgrng_read_bucksize(b)	read_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, b)
-#define	msgrng_write_bucksize(b, v)	write_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, b, v)
-#define	msgrng_read_cc(r, s)	read_c2_register32(r, s)
-#define	msgrng_write_cc(r, v, s)	write_c2_register32(r, s, v)
-
-#define	msgrng_load_rx_msg0()	read_c2_register64(MSGRNG_RX_BUF_REG, 0)
-#define	msgrng_load_rx_msg1()	read_c2_register64(MSGRNG_RX_BUF_REG, 1)
-#define	msgrng_load_rx_msg2()	read_c2_register64(MSGRNG_RX_BUF_REG, 2)
-#define	msgrng_load_rx_msg3()	read_c2_register64(MSGRNG_RX_BUF_REG, 3)
-
-#define	msgrng_load_tx_msg0(v)	write_c2_register64(MSGRNG_TX_BUF_REG, 0, v)
-#define	msgrng_load_tx_msg1(v)	write_c2_register64(MSGRNG_TX_BUF_REG, 1, v)
-#define	msgrng_load_tx_msg2(v)	write_c2_register64(MSGRNG_TX_BUF_REG, 2, v)
-#define	msgrng_load_tx_msg3(v)	write_c2_register64(MSGRNG_TX_BUF_REG, 3, v)
-
-static __inline void 
-msgrng_send(unsigned int stid)
-{
-	__asm__ volatile (
-	    ".set	push\n"
-	    ".set	noreorder\n"
-	    "move	$8, %0\n"
-	    "c2		0x80001\n"	/* msgsnd $8 */
-	    ".set	pop\n"
-	    :: "r" (stid): "$8"
-	);
-}
-
-static __inline void 
-msgrng_receive(unsigned int pri)
-{
-	__asm__ volatile (
-	    ".set	push\n"
-	    ".set	noreorder\n"
-	    "move	$8, %0\n"
-	    "c2		0x80002\n"    /* msgld $8 */
-	    ".set	pop\n"
-	    :: "r" (pri): "$8"
-	);
-}
-
-static __inline void 
-msgrng_wait(unsigned int mask)
-{
-	__asm__ volatile (
-	    ".set	push\n"
-	    ".set	noreorder\n"
-	    "move	$8, %0\n"
-	    "c2		0x80003\n"    /* msgwait $8 */
-	    ".set	pop\n"
-	    :: "r" (mask): "$8"
-	);
-}
-
-static __inline uint32_t
-msgrng_access_enable(void)
-{
-	uint32_t sr = mips_rd_status();
-
-	mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_COP_2_BIT);
-	return (sr);
-}
-
-static __inline void
-msgrng_restore(uint32_t sr)
-{
-
-	mips_wr_status(sr);
-}
-
-struct msgrng_msg {
-	uint64_t msg0;
-	uint64_t msg1;
-	uint64_t msg2;
-	uint64_t msg3;
-};
-
-static __inline int
-message_send(unsigned int size, unsigned int code,
-    unsigned int stid, struct msgrng_msg *msg)
-{
-	unsigned int dest = 0;
-	unsigned long long status = 0;
-	int i = 0;
-
-	/* 
-	 * Make sure that all the writes pending at the cpu are flushed.
-	 * Any writes pending on CPU will not be see by devices. L1/L2
-	 * caches are coherent with IO, so no cache flush needed.
-	 */ 
-	__asm __volatile ("sync");
-
-	/* Load TX message buffers */
-	msgrng_load_tx_msg0(msg->msg0);
-	msgrng_load_tx_msg1(msg->msg1);
-	msgrng_load_tx_msg2(msg->msg2);
-	msgrng_load_tx_msg3(msg->msg3);
-	dest = ((size - 1) << 16) | (code << 8) | stid;
-
-	/*
-	 * Retry a few times on credit fail, this should be a 
-	 * transient condition, unless there is a configuration
-	 * failure, or the receiver is stuck.
-	 */
-	for (i = 0; i < 8; i++) {
-		msgrng_send(dest);
-		status = msgrng_read_status();
-		KASSERT((status & 0x2) == 0, ("Send pending fail!"));
-		if ((status & 0x4) == 0)
-			return (0);
-	}
-
-	/* If there is a credit failure, return error */
-	return (status & 0x06);
-}
-
-static __inline int 
-message_receive(int bucket, int *size, int *code, int *stid,
-    struct msgrng_msg *msg)
-{
-	uint32_t status = 0, tmp = 0;
-       
-	msgrng_receive(bucket); 
-
-	/* wait for load pending to clear */
-	do {
-           status = msgrng_read_status();
-	} while ((status & 0x08) != 0);
-
-	/* receive error bits */
-	tmp = status & 0x30;
-	if (tmp != 0)
-		return (tmp);
-
-	*size = ((status & 0xc0) >> 6) + 1;
-	*code = (status & 0xff00) >> 8;
-	*stid = (status & 0x7f0000) >> 16;
-	msg->msg0 = msgrng_load_rx_msg0();
-	msg->msg1 = msgrng_load_rx_msg1();
-	msg->msg2 = msgrng_load_rx_msg2();
-	msg->msg3 = msgrng_load_rx_msg3();
-	return (0);
-}
-
-#define	MSGRNG_STN_RX_QSIZE	256
-#define	MSGRNG_NSTATIONS	128
-#define	MSGRNG_CORE_NBUCKETS	8
-
-struct stn_cc {
-	unsigned short counters[16][8];
-};
-
-struct bucket_size {
-	unsigned short bucket[MSGRNG_NSTATIONS];
-};
-
-extern struct bucket_size bucket_sizes;
-
-extern struct stn_cc cc_table_cpu_0;
-extern struct stn_cc cc_table_cpu_1;
-extern struct stn_cc cc_table_cpu_2;
-extern struct stn_cc cc_table_cpu_3;
-extern struct stn_cc cc_table_cpu_4;
-extern struct stn_cc cc_table_cpu_5;
-extern struct stn_cc cc_table_cpu_6;
-extern struct stn_cc cc_table_cpu_7;
-extern struct stn_cc cc_table_xgs_0;
-extern struct stn_cc cc_table_xgs_1;
-extern struct stn_cc cc_table_gmac;
-extern struct stn_cc cc_table_dma;
-extern struct stn_cc cc_table_sec;
-
-extern struct bucket_size xls_bucket_sizes;
-
-extern struct stn_cc xls_cc_table_cpu_0;
-extern struct stn_cc xls_cc_table_cpu_1;
-extern struct stn_cc xls_cc_table_cpu_2;
-extern struct stn_cc xls_cc_table_cpu_3;
-extern struct stn_cc xls_cc_table_gmac0;
-extern struct stn_cc xls_cc_table_gmac1;
-extern struct stn_cc xls_cc_table_cmp;
-extern struct stn_cc xls_cc_table_pcie;
-extern struct stn_cc xls_cc_table_dma;
-extern struct stn_cc xls_cc_table_sec;
-
-typedef void (*msgring_handler)(int, int, int, int, struct msgrng_msg *, void *);
-int register_msgring_handler(int startb, int endb, msgring_handler action,
-		    void *arg);
-uint32_t xlr_msgring_handler(uint8_t bucket_mask, uint32_t max_messages);
-void xlr_msgring_cpu_init(void);
-void xlr_msgring_config(void);
-
-#endif
diff --git a/sys/mips/rmi/msgring_xls.c b/sys/mips/rmi/msgring_xls.c
deleted file mode 100644
index bd86187f0c9..00000000000
--- a/sys/mips/rmi/msgring_xls.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/**********************************************************
- * -----------------DO NOT EDIT THIS FILE------------------
- * This file has been autogenerated by the build process
- * from "msgring_xls.cfg"
- **********************************************************/
-
-#include <mips/rmi/msgring.h>
-
-struct bucket_size xls_bucket_sizes = {
-	{32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		32, 32, 32, 32, 32, 32, 32, 32,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 32, 32, 32, 32, 32, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		0, 32, 32, 32, 32, 32, 0, 0,
-		64, 64, 64, 64, 32, 32, 32, 32,
-		0, 0, 0, 0, 0, 0, 0, 0,
-		128, 128, 0, 0, 0, 0, 0, 0,
-	}
-};
-
-struct stn_cc xls_cc_table_cpu_0 = {{
-		{1, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 8, 0, 0, 0, 0},
-		{0, 0, 0, 8, 0, 0, 0, 0},
-		{0, 0, 0, 8, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{16, 16, 16, 16, 16, 16, 16, 16},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{32, 32, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_cpu_1 = {{
-		{1, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{16, 16, 16, 16, 16, 16, 16, 16},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{32, 32, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_cpu_2 = {{
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{16, 16, 16, 16, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{32, 32, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_cpu_3 = {{
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 4, 8, 8, 8, 8, 0, 0},
-		{16, 16, 16, 16, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{32, 32, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_gmac0 = {{
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 8, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 8, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_gmac1 = {{
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{8, 8, 8, 8, 8, 8, 8, 8},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 8, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 8, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_dma = {{
-		{4, 4, 4, 4, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_cmp = {{
-		{4, 4, 4, 4, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{4, 4, 4, 2, 4, 4, 4, 4},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_pcie = {{
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
-
-struct stn_cc xls_cc_table_sec = {{
-		{6, 8, 8, 8, 0, 0, 0, 0},
-		{8, 8, 8, 4, 0, 0, 0, 0},
-		{8, 8, 8, 4, 0, 0, 0, 0},
-		{8, 8, 8, 4, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-		{0, 0, 0, 0, 0, 0, 0, 0},
-}};
diff --git a/sys/mips/rmi/msgring_xls.cfg b/sys/mips/rmi/msgring_xls.cfg
deleted file mode 100644
index 35bfb17f4c4..00000000000
--- a/sys/mips/rmi/msgring_xls.cfg
+++ /dev/null
@@ -1,563 +0,0 @@
-/*********************************************************************
- *
- * Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * *****************************RMI_2**********************************/
-
-
-/* 
- * This file defines the message ring configuration for XLS two core. It tries to allow 
- * many different point-point communications between the message stations on the message ring
- * and as result is _not_ the best configuration for performance
- *
- * The message ring on phoenix family of processors connects the cpus, gmacs, xgmac/spi4,
- * security engine and the general purpose DMA engines. It provides a high bandwidth,
- * low latency communication links. On traditional processors, this communication goes through
- * which inherently does not scale very well with increasing number of cpus. 
- * 
- * Message ring has an in-built flow control mechanism. Every agent/station on the ring has to
- * have software configured credits to send messages to any agent. Every receiving agent on the
- * ring has a 256 entry FIFO that can divided into "buckets". All addressing on the ring is 
- * in terms of buckets. There are a total 128 buckets on the ring. The total number of credits 
- * across all sending agents should not exceed the bucket size. 
- *
- * Below are the receiving agents and the max number of buckets they can have
- * 	CPU 0	: 8 buckets
- * 	CPU 1	: 8 buckets
- * 
- *	GMAC	: 8 buckets	
- *	
- *	SEC	: 8 buckets
- * 
- *	DMA	: 8 buckets
- * 
- *	CMP	: Currently disabled. 
- *
- * The bucket size of a bucket should be aligned to the bucket's starting index in that
- * receiving station's FIFO. For example, if sizes of bucket0 and bucket1 of a station 
- * are 32 and 32, bucket2's size has to be 64. bucket size 0 is valid.
- *
- * The format of the file is pretty straight forward. Each bucket definition has the size
- * and the list of sending agents to that bucket with the number of credits to send.
- * 
- * Undefined buckets have a size of 0 and Tx stations have 0 credits to send to that bucket.
- *
- *  Following are the currently supported bucket names
- *  cpu_0_0
- *  cpu_0_1
- *  cpu_0_2
- *  cpu_0_3
- *  cpu_0_4
- *  cpu_0_5
- *  cpu_0_6
- *  cpu_0_7
- *  
- *  cpu_1_0
- *  cpu_1_1
- *  cpu_1_2
- *  cpu_1_3
- *  cpu_1_4
- *  cpu_1_5
- *  cpu_1_6
- *  cpu_1_7
- *
- *  enabled only for xls-b0
- *  cpu_2_0
- *  cpu_2_1
- *  cpu_2_2
- *  cpu_2_3
- *  cpu_2_4
- *  cpu_2_5
- *  cpu_2_6
- *  cpu_2_7
- *  
- *  enabled only for xls-b0
- *  cpu_3_0
- *  cpu_3_1
- *  cpu_3_2
- *  cpu_3_3
- *  cpu_3_4
- *  cpu_3_5
- *  cpu_3_6
- *  cpu_3_7
- *
- *  gmac0_rfr
- *  gmac0_tx_0
- *  gmac0_tx_1
- *  gmac0_tx_2
- *  gmac0_tx_3
- *  
- *  gmac1_rfr
- *  gmac1_tx_0
- *  gmac1_tx_1
- *  gmac1_tx_2
- *  gmac1_tx_3
- *
- *  sec_pipe_0
- *  sec_rsa
- *
- * Following are the currently supported Tx Agent/Station names
- *
- *  tx_stn_cpu_0
- *  tx_stn_cpu_1
- *
- *  tx_stn_gmac0
- *  tx_stn_gmac1
- *
- *  tx_stn_dma
- *
- *  tx_stn_sec
- *
- * 
- */
-
-/*************************************************************/
-// CPU_0 Message Station 
-
-bucket "cpu_0_0" { 
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  6;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-	"tx_stn_cpu_0" 1;
-        "tx_stn_cpu_1" 1; /* NEEDED BY RMIOS IPSEC */
-}
-bucket "cpu_0_1" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_2" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_3" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_4" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_5" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_6" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_0_7" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-
-/*************************************************************/
-// CPU_1 Message Station 
-
-bucket "cpu_1_0" { 
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_1" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_2" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_3" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  4;
-	"tx_stn_cpu_0" 8; /* NEEDED BY RMIOS IPSEC */
-        "tx_stn_dma" 2;
-        "tx_stn_cmp" 2;
-}
-bucket "cpu_1_4" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_5" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_6" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-bucket "cpu_1_7" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-        "tx_stn_cmp" 4;
-}
-
-/*************************************************************/
-// CPU_2 Message Station 
-
-bucket "cpu_2_0" { 
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_1" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_2" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_3" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  4;
-	"tx_stn_cpu_0" 8; /* NEEDED BY RMIOS IPSEC */
-    "tx_stn_dma" 2;
-    "tx_stn_cmp" 2;
-}
-bucket "cpu_2_4" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_5" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_6" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_2_7" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-
-
-/*************************************************************/
-// CPU_3 Message Station 
-bucket "cpu_3_0" { 
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_1" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_2" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_3" { 
-	size 32; 
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_sec"  4;
-	"tx_stn_cpu_0" 8; /* NEEDED BY RMIOS IPSEC */
-    "tx_stn_dma" 2;
-    "tx_stn_cmp" 2;
-}
-bucket "cpu_3_4" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_5" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_6" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-bucket "cpu_3_7" {
-	size 32;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-	"tx_stn_dma" 4;
-    "tx_stn_cmp" 4;
-}
-
-/*************************************************************/
-
-// GMAC Message Station 
-
-bucket "gmac0_rfr" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-}
-
-bucket "gmac0_tx_0" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac0_tx_1" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac0_tx_2" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac0_tx_3" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac1_rfr" {
-	size 32;
-	"tx_stn_cpu_0" 4;
-	"tx_stn_cpu_1" 4;
-	"tx_stn_cpu_2" 4;
-	"tx_stn_cpu_3" 4;
-	"tx_stn_gmac0" 8;
-	"tx_stn_gmac1" 8;
-}
-
-bucket "gmac1_tx_0" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac1_tx_1" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac1_tx_2" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-bucket "gmac1_tx_3" {
-	size 32;
-	"tx_stn_cpu_0" 8;
-	"tx_stn_cpu_1" 8;
-	"tx_stn_cpu_2" 8;
-	"tx_stn_cpu_3" 8;
-}
-
-/*************************************************************/
-// Security Message Station 
-
-bucket "sec_pipe_0" {
-	size 128;
-	"tx_stn_cpu_0" 32;
-	"tx_stn_cpu_1" 32;
-	"tx_stn_cpu_2" 32;
-	"tx_stn_cpu_3" 32;
-}
-
-bucket "sec_rsa_ecc" {
-	size 128;
-	"tx_stn_cpu_0" 32;
-	"tx_stn_cpu_1" 32;
-	"tx_stn_cpu_2" 32;
-	"tx_stn_cpu_3" 32;
-}
-
-bucket "dma_rsvd_0" {
-	size 64;
-	"tx_stn_cpu_0" 16;
-	"tx_stn_cpu_1" 16;
-	"tx_stn_cpu_2" 16;
-	"tx_stn_cpu_3" 16;
-}
-bucket "dma_rsvd_1" {
-	size 64;
-	"tx_stn_cpu_0" 16;
-	"tx_stn_cpu_1" 16;
-	"tx_stn_cpu_2" 16;
-	"tx_stn_cpu_3" 16;
-}
-
-bucket "dma_rsvd_2" {
-	size 64;
-	"tx_stn_cpu_0" 16;
-	"tx_stn_cpu_1" 16;
-	"tx_stn_cpu_2" 16;
-	"tx_stn_cpu_3" 16;
-}
-
-bucket "dma_rsvd_3" {
-	size 64;
-	"tx_stn_cpu_0" 16;
-	"tx_stn_cpu_1" 16;
-	"tx_stn_cpu_2" 16;
-	"tx_stn_cpu_3" 16;
-}
-
-/*************************************************************/
-// Compression Message Station
-
-bucket "cmp_0" {
-        size 32; 
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-}
-
-bucket "cmp_1" { 
-        size 32;
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-}
-
-bucket "cmp_2" {
-        size 32; 
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-}
-
-bucket "cmp_3" {      
-        size 32;
-        "tx_stn_cpu_0" 16;
-        "tx_stn_cpu_1" 16;
-}
-
diff --git a/sys/mips/rmi/pcibus.h b/sys/mips/rmi/pcibus.h
deleted file mode 100644
index b80b795d187..00000000000
--- a/sys/mips/rmi/pcibus.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#define DEFAULT_PCI_CONFIG_BASE		0x18000000
-#define MSI_MIPS_ADDR_BASE		0xfee00000
-
-#define PCIE_LINK0_MSI_STATUS		0x90
-#define PCIE_LINK1_MSI_STATUS		0x94
-#define PCIE_LINK2_MSI_STATUS		0x190
-#define PCIE_LINK3_MSI_STATUS		0x194
-
diff --git a/sys/mips/rmi/pic.h b/sys/mips/rmi/pic.h
deleted file mode 100644
index 42013c0fb1e..00000000000
--- a/sys/mips/rmi/pic.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _RMI_PIC_H_
-#define	_RMI_PIC_H_
-
-#include <sys/cdefs.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <mips/rmi/iomap.h>
-
-#define	PIC_IRT_WD_INDEX		0
-#define	PIC_IRT_TIMER_INDEX(i)		(1 + (i))
-#define	PIC_IRT_UART_0_INDEX		9
-#define	PIC_IRT_UART_1_INDEX		10
-#define	PIC_IRT_I2C_0_INDEX		11
-#define	PIC_IRT_I2C_1_INDEX		12
-#define	PIC_IRT_PCMCIA_INDEX		13
-#define	PIC_IRT_GPIO_INDEX		14
-#define	PIC_IRT_HYPER_INDEX		15
-#define	PIC_IRT_PCIX_INDEX		16
-#define	PIC_IRT_GMAC0_INDEX		17
-#define	PIC_IRT_GMAC1_INDEX		18
-#define	PIC_IRT_GMAC2_INDEX		19
-#define	PIC_IRT_GMAC3_INDEX		20
-#define	PIC_IRT_XGS0_INDEX		21
-#define	PIC_IRT_XGS1_INDEX		22
-#define	PIC_IRT_HYPER_FATAL_INDEX	23
-#define	PIC_IRT_PCIX_FATAL_INDEX	24
-#define	PIC_IRT_BRIDGE_AERR_INDEX	25
-#define	PIC_IRT_BRIDGE_BERR_INDEX	26
-#define	PIC_IRT_BRIDGE_TB_INDEX		27
-#define	PIC_IRT_BRIDGE_AERR_NMI_INDEX	28
-
-/* numbering for XLS */
-#define	PIC_IRT_BRIDGE_ERR_INDEX	25
-#define	PIC_IRT_PCIE_LINK0_INDEX	26
-#define	PIC_IRT_PCIE_LINK1_INDEX	27
-#define	PIC_IRT_PCIE_LINK2_INDEX	23
-#define	PIC_IRT_PCIE_LINK3_INDEX	24
-#define	PIC_IRT_PCIE_B0_LINK2_INDEX	28
-#define	PIC_IRT_PCIE_B0_LINK3_INDEX	29
-#define	PIC_IRT_PCIE_INT_INDEX		28
-#define	PIC_IRT_PCIE_FATAL_INDEX	29
-#define	PIC_IRT_GPIO_B_INDEX		30
-#define	PIC_IRT_USB_INDEX		31
-#define	PIC_NUM_IRTS			32
-
-#define	PIC_CLOCK_TIMER			7
-
-#define	PIC_CTRL			0x00
-#define	PIC_IPI				0x04
-#define	PIC_INT_ACK			0x06
-
-#define	WD_MAX_VAL_0			0x08
-#define	WD_MAX_VAL_1			0x09
-#define	WD_MASK_0			0x0a
-#define	WD_MASK_1			0x0b
-#define	WD_HEARBEAT_0			0x0c
-#define	WD_HEARBEAT_1			0x0d
-
-#define	PIC_IRT_0_BASE			0x40
-#define	PIC_IRT_1_BASE			0x80
-#define	PIC_TIMER_MAXVAL_0_BASE		0x100
-#define	PIC_TIMER_MAXVAL_1_BASE		0x110
-#define	PIC_TIMER_COUNT_0_BASE		0x120
-#define	PIC_TIMER_COUNT_1_BASE		0x130
-
-#define	PIC_IRT_0(picintr)	(PIC_IRT_0_BASE + (picintr))
-#define	PIC_IRT_1(picintr)	(PIC_IRT_1_BASE + (picintr))
-
-#define	PIC_TIMER_MAXVAL_0(i)	(PIC_TIMER_MAXVAL_0_BASE + (i))
-#define	PIC_TIMER_MAXVAL_1(i)	(PIC_TIMER_MAXVAL_1_BASE + (i))
-#define	PIC_TIMER_COUNT_0(i)	(PIC_TIMER_COUNT_0_BASE + (i))
-#define	PIC_TIMER_COUNT_1(i)	(PIC_TIMER_COUNT_0_BASE + (i))
-#define	PIC_TIMER_HZ		66000000U
-
-/*
- * We use a simple mapping form PIC interrupts to CPU IRQs.
- * The PIC interrupts 0-31 are mapped to CPU irq's 8-39.
- * this leaves the lower 0-7 for the cpu interrupts (like 
- * count/compare, msgrng) and 40-63 for IPIs
- */
-#define	PIC_IRQ_BASE		8
-#define	PIC_INTR_TO_IRQ(i)	(PIC_IRQ_BASE + (i))
-#define	PIC_IRQ_TO_INTR(i)	((i) - PIC_IRQ_BASE)
-
-#define	PIC_WD_IRQ		(PIC_IRQ_BASE + PIC_IRT_WD_INDEX)
-#define	PIC_TIMER_IRQ(i)	(PIC_IRQ_BASE + PIC_IRT_TIMER_INDEX(i))
-#define	PIC_CLOCK_IRQ		PIC_TIMER_IRQ(PIC_CLOCK_TIMER)
-
-#define	PIC_UART_0_IRQ		(PIC_IRQ_BASE + PIC_IRT_UART_0_INDEX)
-#define	PIC_UART_1_IRQ		(PIC_IRQ_BASE + PIC_IRT_UART_1_INDEX)
-#define	PIC_I2C_0_IRQ		(PIC_IRQ_BASE + PIC_IRT_I2C_0_INDEX)
-#define	PIC_I2C_1_IRQ		(PIC_IRQ_BASE + PIC_IRT_I2C_1_INDEX)
-#define	PIC_PCMCIA_IRQ		(PIC_IRQ_BASE + PIC_IRT_PCMCIA_INDEX)
-#define	PIC_GPIO_IRQ		(PIC_IRQ_BASE + PIC_IRT_GPIO_INDEX)
-#define	PIC_HYPER_IRQ		(PIC_IRQ_BASE + PIC_IRT_HYPER_INDEX)
-#define	PIC_PCIX_IRQ		(PIC_IRQ_BASE + PIC_IRT_PCIX_INDEX)
-#define	PIC_GMAC_0_IRQ		(PIC_IRQ_BASE + PIC_IRT_GMAC0_INDEX)
-#define	PIC_GMAC_1_IRQ		(PIC_IRQ_BASE + PIC_IRT_GMAC1_INDEX)
-#define	PIC_GMAC_2_IRQ		(PIC_IRQ_BASE + PIC_IRT_GMAC2_INDEX)
-#define	PIC_GMAC_3_IRQ		(PIC_IRQ_BASE + PIC_IRT_GMAC3_INDEX)
-#define	PIC_XGS_0_IRQ		(PIC_IRQ_BASE + PIC_IRT_XGS0_INDEX)
-#define	PIC_XGS_1_IRQ		(PIC_IRQ_BASE + PIC_IRT_XGS1_INDEX)
-#define	PIC_HYPER_FATAL_IRQ	(PIC_IRQ_BASE + PIC_IRT_HYPER_FATAL_INDEX)
-#define	PIC_PCIX_FATAL_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIX_FATAL_INDEX)
-#define	PIC_BRIDGE_AERR_IRQ	(PIC_IRQ_BASE + PIC_IRT_BRIDGE_AERR_INDEX)
-#define	PIC_BRIDGE_BERR_IRQ	(PIC_IRQ_BASE + PIC_IRT_BRIDGE_BERR_INDEX)
-#define	PIC_BRIDGE_TB_IRQ	(PIC_IRQ_BASE + PIC_IRT_BRIDGE_TB_INDEX)
-#define	PIC_BRIDGE_AERR_NMI_IRQ	(PIC_IRQ_BASE + PIC_IRT_BRIDGE_AERR_NMI_INDEX)
-#define	PIC_BRIDGE_ERR_IRQ	(PIC_IRQ_BASE + PIC_IRT_BRIDGE_ERR_INDEX)
-#define	PIC_PCIE_LINK0_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_LINK0_INDEX)
-#define	PIC_PCIE_LINK1_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_LINK1_INDEX)
-#define	PIC_PCIE_LINK2_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_LINK2_INDEX)
-#define	PIC_PCIE_LINK3_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_LINK3_INDEX)
-#define	PIC_PCIE_B0_LINK2_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_B0_LINK2_INDEX)
-#define	PIC_PCIE_B0_LINK3_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_B0_LINK3_INDEX)
-#define	PIC_PCIE_INT_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_INT_INDEX)
-#define	PIC_PCIE_FATAL_IRQ	(PIC_IRQ_BASE + PIC_IRT_PCIE_FATAL_INDEX)
-#define	PIC_GPIO_B_IRQ		(PIC_IRQ_BASE + PIC_IRT_GPIO_B_INDEX)
-#define	PIC_USB_IRQ		(PIC_IRQ_BASE + PIC_IRT_USB_INDEX)
-
-#define	PIC_IRQ_IS_PICINTR(irq)	((irq) >= PIC_IRQ_BASE && 		\
-				 (irq) < PIC_IRQ_BASE + PIC_NUM_IRTS)
-#define	PIC_IS_EDGE_TRIGGERED(i) ((i) >= PIC_IRT_TIMER_INDEX(0) &&	\
-				  (i) <= PIC_IRT_TIMER_INDEX(7))
-
-extern struct mtx xlr_pic_lock;
-
-static __inline uint32_t 
-pic_read_control(void)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-	uint32_t reg;
-
-	mtx_lock_spin(&xlr_pic_lock);
-	reg = xlr_read_reg(mmio, PIC_CTRL);
-	mtx_unlock_spin(&xlr_pic_lock);
-	return (reg);
-}
-
-static __inline void 
-pic_write_control(uint32_t control)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	mtx_lock_spin(&xlr_pic_lock);
-	xlr_write_reg(mmio, PIC_CTRL, control);
-	mtx_unlock_spin(&xlr_pic_lock);
-}
-
-static __inline void 
-pic_update_control(uint32_t control)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	mtx_lock_spin(&xlr_pic_lock);
-	xlr_write_reg(mmio, PIC_CTRL, (control | xlr_read_reg(mmio, PIC_CTRL)));
-	mtx_unlock_spin(&xlr_pic_lock);
-}
-
-static __inline void 
-pic_ack(int picintr)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	xlr_write_reg(mmio, PIC_INT_ACK, 1U << picintr);
-}
-
-static __inline
-void pic_send_ipi(int cpu, int ipi)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-	int tid, pid;
-
-	tid = cpu & 0x3;
-	pid = (cpu >> 2) & 0x7;
-	xlr_write_reg(mmio, PIC_IPI, (pid << 20) | (tid << 16) | ipi);
-}
-
-static __inline
-void pic_setup_intr(int picintr, int irq, uint32_t cpumask, int level)
-{
-        xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	mtx_lock_spin(&xlr_pic_lock);
-	xlr_write_reg(mmio, PIC_IRT_0(picintr), cpumask);
-	xlr_write_reg(mmio, PIC_IRT_1(picintr), ((1U << 31) | (level << 30) |
-	    (1 << 6) | irq));
-	mtx_unlock_spin(&xlr_pic_lock);
-}
-
-static __inline void 
-pic_init_timer(int timer)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-	uint32_t val;
- 
-	mtx_lock_spin(&xlr_pic_lock);
-	val = xlr_read_reg(mmio, PIC_CTRL);
-	val |= (1 << (8 + timer));
-	xlr_write_reg(mmio, PIC_CTRL, val);
-	mtx_unlock_spin(&xlr_pic_lock);
-}
- 
-static __inline void
-pic_set_timer(int timer, uint64_t maxval)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	xlr_write_reg(mmio, PIC_TIMER_MAXVAL_0(timer),
-	    (maxval & 0xffffffff)); 
-	xlr_write_reg(mmio, PIC_TIMER_MAXVAL_1(timer), 
-	    (maxval >> 32) & 0xffffffff);
-}
-
-static __inline uint32_t
-pic_timer_count32(int timer)
- {
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-
-	return (xlr_read_reg(mmio, PIC_TIMER_COUNT_0(timer))); 
-}
-
-/*
- * The timer can wrap 32 bits between the two reads, so we
- * need additional logic to detect that.
- */
-static __inline uint64_t
-pic_timer_count(int timer)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-	uint32_t tu1, tu2, tl;
-
-	tu1 = xlr_read_reg(mmio, PIC_TIMER_COUNT_1(timer)); 
-	tl = xlr_read_reg(mmio, PIC_TIMER_COUNT_0(timer)); 
-	tu2 = xlr_read_reg(mmio, PIC_TIMER_COUNT_1(timer)); 
-	if (tu2 != tu1)
-		tl = xlr_read_reg(mmio, PIC_TIMER_COUNT_0(timer));
-	return (((uint64_t)tu2 << 32) | tl);
-}
-
-#endif	/* _RMI_PIC_H_ */
diff --git a/sys/mips/rmi/rmi_boot_info.h b/sys/mips/rmi/rmi_boot_info.h
deleted file mode 100644
index a4fa28b948d..00000000000
--- a/sys/mips/rmi/rmi_boot_info.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef _SHARED_STRUCTS_H
-#define _SHARED_STRUCTS_H
-
-#define BOOT1_INFO_VERSION 0x0001
-
-struct boot1_info {
-	uint64_t boot_level;
-	uint64_t io_base;
-	uint64_t output_device;
-	uint64_t uart_print;
-	uint64_t led_output;
-	uint64_t init;
-	uint64_t exit;
-	uint64_t warm_reset;
-	uint64_t wakeup;
-	uint64_t cpu_online_map;
-	uint64_t master_reentry_sp;
-	uint64_t master_reentry_gp;
-	uint64_t master_reentry_fn;
-	uint64_t slave_reentry_fn;
-	uint64_t magic_dword;
-	uint64_t uart_putchar;
-	uint64_t size;
-	uint64_t uart_getchar;
-	uint64_t nmi_handler;
-	uint64_t psb_version;
-	uint64_t mac_addr;
-	uint64_t cpu_frequency;
-	uint64_t board_version;
-	uint64_t malloc;
-	uint64_t free;
-	uint64_t alloc_pbuf;
-	uint64_t free_pbuf;
-	uint64_t psb_os_cpu_map;
-	uint64_t userapp_cpu_map;
-	uint64_t wakeup_os;
-	uint64_t psb_mem_map;
-	uint64_t board_major_version;
-	uint64_t board_minor_version;
-	uint64_t board_manf_revision;
-	uint64_t board_serial_number;
-	uint64_t psb_physaddr_map;
-};
-
-extern struct boot1_info xlr_boot1_info;
-
-
-/* This structure is passed to all applications launched from the linux
-   loader through K0 register
- */
-#define XLR_LOADER_INFO_MAGIC 0x600ddeed
-struct xlr_loader_info {
-	uint32_t magic;
-	/* xlr_loader_shared_struct_t for CPU 0 will start here */
-	unsigned long sh_mem_start;
-	/* Size of the shared memory b/w linux apps and rmios apps  */
-	uint32_t app_sh_mem_size;
-};
-
-/* Boot loader uses the linux mips convention */
-#define BOOT1_MEMMAP_MAX	32
-
-enum xlr_phys_memmap_t {
-	BOOT1_MEM_RAM = 1, BOOT1_MEM_ROM_DATA, BOOT1_MEM_RESERVED
-};
-
-struct xlr_boot1_mem_map {
-	uint32_t num_entries;
-	struct {
-		uint64_t addr;
-		uint64_t size;
-		uint32_t type;
-		uint32_t pad;
-	}      physmem_map[BOOT1_MEMMAP_MAX];
-};
-
-
-#endif
diff --git a/sys/mips/rmi/rmi_mips_exts.h b/sys/mips/rmi/rmi_mips_exts.h
deleted file mode 100644
index d1da62dedc6..00000000000
--- a/sys/mips/rmi/rmi_mips_exts.h
+++ /dev/null
@@ -1,581 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD
- * $FreeBSD$
- */
-#ifndef __MIPS_EXTS_H__
-#define	__MIPS_EXTS_H__
-
-#define	CPU_BLOCKID_IFU		0
-#define	CPU_BLOCKID_ICU		1
-#define	CPU_BLOCKID_IEU		2
-#define	CPU_BLOCKID_LSU		3
-#define	CPU_BLOCKID_MMU		4
-#define	CPU_BLOCKID_PRF		5
-
-#define	LSU_CERRLOG_REGID	9
-
-#if defined(__mips_n64) || defined(__mips_n32)
-static __inline uint64_t
-read_xlr_ctrl_register(int block, int reg)
-{ 
-	uint64_t res;
-
-	__asm__ __volatile__(
-	    ".set	push\n\t"
-	    ".set	noreorder\n\t"
-	    "move	$9, %1\n\t"
-	    ".word	0x71280018\n\t"  /* mfcr $8, $9 */
-	    "move	%0, $8\n\t"
-	    ".set	pop\n"
-	    : "=r" (res) : "r"((block << 8) | reg)
-	    : "$8", "$9"
-	);
-	return (res);
-}
-
-static __inline void
-write_xlr_ctrl_register(int block, int reg, uint64_t value)
-{
-	__asm__ __volatile__(
-	    ".set	push\n\t"
-	    ".set	noreorder\n\t"
-	    "move	$8, %0\n"
-	    "move	$9, %1\n"
-	    ".word	0x71280019\n"    /* mtcr $8, $9  */
-	    ".set	pop\n"
-	    :
-	    : "r" (value), "r" ((block << 8) | reg)
-	    : "$8", "$9"
-	);
-}
-
-#else /* !(defined(__mips_n64) || defined(__mips_n32)) */
-
-static __inline uint64_t
-read_xlr_ctrl_register(int block, int reg)
-{	
-	uint32_t high, low;
-
-	__asm__ __volatile__(
-	    ".set	push\n\t"
-	    ".set	noreorder\n\t"
-	    ".set	mips64\n\t"
-	    "move	$9, %2\n"
-	    ".word 	0x71280018\n"  /* "mfcr    $8, $9\n" */
-	    "dsra32	%0, $8, 0\n\t"
-	    "sll	%1, $8, 0\n\t"
-	    ".set	pop"					
-	    : "=r" (high), "=r"(low)
-	    : "r" ((block << 8) | reg)
-	    : "$8", "$9");
-
-	return ( (((uint64_t)high) << 32) | low);
-}
-
-static __inline void
-write_xlr_ctrl_register(int block, int reg, uint64_t value)
-{
-	uint32_t low, high;
-	high = value >> 32;
-	low = value & 0xffffffff;
-
-	__asm__ __volatile__(
-	   ".set	push\n\t"
-	   ".set	noreorder\n\t"
-	   ".set	mips64\n\t"
-	   "dsll32	$9, %0, 0\n\t"
-	   "dsll32	$8, %1, 0\n\t"
-	   "dsrl32	$8, $8, 0\n\t"
-	   "or		$8, $9, $8\n\t"
-	   "move	$9, %2\n\t"
-	   ".word	0x71280019\n\t" /* mtcr $8, $9 */
-	   ".set	pop\n"
-	   :  /* No outputs */
-	   : "r" (high), "r" (low), "r"((block << 8) | reg)
-	   : "$8", "$9");
-}
-#endif /* defined(__mips_n64) || defined(__mips_n32) */
-
-/*
- * 32 bit read write for c0
- */
-#define read_c0_register32(reg, sel)				\
-({								\
-	 uint32_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mfc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define write_c0_register32(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mtc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-
-#define read_c2_register32(reg, sel)				\
-({								\
-	uint32_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mfc2	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define write_c2_register32(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mtc2	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-
-#if defined(__mips_n64) || defined(__mips_n32)
-/*
- * On 64 bit compilation, the operations are simple
- */
-#define read_c0_register64(reg, sel)				\
-({								\
-	uint64_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define write_c0_register64(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmtc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-
-#define read_c2_register64(reg, sel)				\
-({								\
-	uint64_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc2	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define write_c2_register64(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmtc2	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-
-#else /* ! (defined(__mips_n64) || defined(__mips_n32)) */
-
-/*
- * 32 bit compilation, 64 bit values has to split 
- */
-#define read_c0_register64(reg, sel)				\
-({								\
-	uint32_t __high, __low;					\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc0	$8, $%2, %3\n\t"			\
-	    "dsra32	%0, $8, 0\n\t"				\
-	    "sll	%1, $8, 0\n\t"				\
-	    ".set	pop\n"					\
-	    : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel)	\
-	    : "$8");						\
-	((uint64_t)__high << 32) | __low;			\
-})
-
-#define write_c0_register64(reg, sel, value)			\
-do {								\
-       uint32_t __high = value >> 32;				\
-       uint32_t __low = value & 0xffffffff;			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dsll32	$8, %1, 0\n\t"				\
-	    "dsll32	$9, %0, 0\n\t"				\
-	    "dsrl32	$8, $8, 0\n\t"				\
-	    "or		$8, $8, $9\n\t"				\
-	    "dmtc0	$8, $%2, %3\n\t"			\
-	    ".set	pop"					\
-	    :: "r"(__high), "r"(__low),	 "i"(reg), "i"(sel)	\
-	    :"$8", "$9");					\
-} while(0)
-
-#define read_c2_register64(reg, sel)				\
-({								\
-	uint32_t __high, __low;					\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc2	$8, $%2, %3\n\t"			\
-	    "dsra32	%0, $8, 0\n\t"				\
-	    "sll	%1, $8, 0\n\t"				\
-	    ".set	pop\n"					\
-	    : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel)	\
-	    : "$8");						\
-	((uint64_t)__high << 32) | __low;			\
-})
-
-#define write_c2_register64(reg, sel, value)			\
-do {								\
-       uint32_t __high = value >> 32;				\
-       uint32_t __low = value & 0xffffffff;			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dsll32	$8, %1, 0\n\t"				\
-	    "dsll32	$9, %0, 0\n\t"				\
-	    "dsrl32	$8, $8, 0\n\t"				\
-	    "or		$8, $8, $9\n\t"				\
-	    "dmtc2	$8, $%2, %3\n\t"			\
-	    ".set	pop"					\
-	    :: "r"(__high), "r"(__low),	 "i"(reg), "i"(sel)	\
-	    :"$8", "$9");					\
-} while(0)
-
-#endif /* defined(__mips_n64) || defined(__mips_n32) */
-
-static __inline int
-xlr_cpu_id(void)
-{
-
-	return (read_c0_register32(15, 1) & 0x1f);
-}
-
-static __inline int
-xlr_core_id(void)
-{
-
-	return (xlr_cpu_id() / 4);
-}
-
-static __inline int
-xlr_thr_id(void)
-{
-
-	return (read_c0_register32(15, 1) & 0x3);
-}
-
-/* Additional registers on the XLR */
-#define	MIPS_COP_0_OSSCRATCH	22
-#define	XLR_CACHELINE_SIZE	32
-
-/* functions to write to and read from the extended
- * cp0 registers.
- * EIRR : Extended Interrupt Request Register
- *        cp0 register 9 sel 6
- *        bits 0...7 are same as cause register 8...15
- * EIMR : Extended Interrupt Mask Register
- *        cp0 register 9 sel 7
- *        bits 0...7 are same as status register 8...15
- */
-static __inline uint64_t 
-read_c0_eirr64(void)
-{
-
-	return (read_c0_register64(9, 6));
-}
-
-static __inline void
-write_c0_eirr64(uint64_t val)
-{
-
-	write_c0_register64(9, 6, val);
-}
-
-static __inline uint64_t 
-read_c0_eimr64(void)
-{
-
-	return (read_c0_register64(9, 7));
-}
-
-static __inline void
-write_c0_eimr64(uint64_t val)
-{
-
-	write_c0_register64(9, 7, val);
-}
-
-static __inline int 
-xlr_test_and_set(int *lock)
-{
-	int oldval = 0;
-
-	__asm__ __volatile__(
-	    ".set push\n"
-	    ".set noreorder\n"
-	    "move $9, %2\n"
-	    "li $8, 1\n"
-	    //      "swapw $8, $9\n"
-	    ".word 0x71280014\n"
-	    "move %1, $8\n"
-	    ".set pop\n"
-	    : "+m"(*lock), "=r"(oldval)
-	    : "r"((unsigned long)lock)
-	    : "$8", "$9"
-	);
-
-	return (oldval == 0 ? 1 /* success */ : 0 /* failure */);
-}
-
-static __inline uint32_t 
-xlr_mfcr(uint32_t reg)
-{
-	uint32_t val;
-
-	__asm__ __volatile__(
-	    "move   $8, %1\n"
-	    ".word  0x71090018\n"
-	    "move   %0, $9\n"
-	    : "=r"(val)
-	    : "r"(reg):"$8", "$9");
-
-	return val;
-}
-
-static __inline void 
-xlr_mtcr(uint32_t reg, uint32_t val)
-{
-	__asm__ __volatile__(
-	    "move   $8, %1\n"
-	    "move   $9, %0\n"
-	    ".word  0x71090019\n"
-	    :: "r"(val), "r"(reg)
-	    : "$8", "$9");
-}
-
-/*
- * Atomic increment a unsigned  int
- */
-static __inline unsigned int
-xlr_ldaddwu(unsigned int value, unsigned int *addr)
-{
-	__asm__	 __volatile__(
-	    ".set	push\n"
-	    ".set	noreorder\n"
-	    "move	$8, %2\n"
-	    "move	$9, %3\n"
-	    ".word	0x71280011\n"  /* ldaddwu $8, $9 */
-	    "move	%0, $8\n"
-	    ".set	pop\n"
-	    : "=&r"(value), "+m"(*addr)
-	    : "0"(value), "r" ((unsigned long)addr)
-	    :  "$8", "$9");
-
-	return (value);
-}
-
-#if defined(__mips_n64)
-static __inline uint32_t
-xlr_paddr_lw(uint64_t paddr)
-{
-	
-	paddr |= 0x9800000000000000ULL;
-	return (*(uint32_t *)(uintptr_t)paddr);
-}
-
-static __inline uint64_t
-xlr_paddr_ld(uint64_t paddr)
-{
-	
-	paddr |= 0x9800000000000000ULL;
-	return (*(uint64_t *)(uintptr_t)paddr);
-}
-
-#elif defined(__mips_n32)
-static __inline uint32_t
-xlr_paddr_lw(uint64_t paddr)
-{
-	uint32_t val;
-
-	paddr |= 0x9800000000000000ULL;
-	__asm__ __volatile__(
-	    ".set	push		\n\t"
-	    ".set	mips64		\n\t"
-	    "lw		%0, 0(%1)	\n\t"
-	    ".set	pop		\n"
-	    : "=r"(val)
-	    : "r"(paddr));
-
-	return (val);
-}
-
-static __inline uint64_t
-xlr_paddr_ld(uint64_t paddr)
-{
-	uint64_t val;
-
-	paddr |= 0x9800000000000000ULL;
-	__asm__ __volatile__(
-	    ".set	push		\n\t"
-	    ".set	mips64		\n\t"
-	    "ld		%0, 0(%1)	\n\t"
-	    ".set	pop		\n"
-	    : "=r"(val)
-	    : "r"(paddr));
-
-	return (val);
-}
-
-#else   /* o32 compilation */
-static __inline uint32_t
-xlr_paddr_lw(uint64_t paddr)
-{
-	uint32_t addrh, addrl;
-       	uint32_t val;
-
-	addrh = 0x98000000 | (paddr >> 32);
-	addrl = paddr & 0xffffffff;
-
-	__asm__ __volatile__(
-	    ".set	push		\n\t"
-	    ".set	mips64		\n\t"
-	    "dsll32	$8, %1, 0	\n\t"
-	    "dsll32	$9, %2, 0	\n\t"  /* get rid of the */
-	    "dsrl32	$9, $9, 0	\n\t"  /* sign extend */
-	    "or		$9, $8, $8	\n\t"
-	    "lw		%0, 0($9)	\n\t"
-	    ".set	pop		\n"
-	    :	"=r"(val)
-	    :	"r"(addrh), "r"(addrl)
-	    :	"$8", "$9");
-
-	return (val);
-}
-
-static __inline uint64_t
-xlr_paddr_ld(uint64_t paddr)
-{
-	uint32_t addrh, addrl;
-       	uint32_t valh, vall;
-
-	addrh = 0x98000000 | (paddr >> 32);
-	addrl = paddr & 0xffffffff;
-
-	__asm__ __volatile__(
-	    ".set	push		\n\t"
-	    ".set	mips64		\n\t"
-	    "dsll32	%0, %2, 0	\n\t"
-	    "dsll32	%1, %3, 0	\n\t"  /* get rid of the */
-	    "dsrl32	%1, %1, 0	\n\t"  /* sign extend */
-	    "or		%0, %0, %1	\n\t"
-	    "lw		%1, 4(%0)	\n\t"
-	    "lw		%0, 0(%0)	\n\t"
-	    ".set	pop		\n"
-	    :       "=&r"(valh), "=&r"(vall)
-	    :       "r"(addrh), "r"(addrl));
-
-	return (((uint64_t)valh << 32) | vall);
-}
-#endif
-
-/*
- * XXX: Not really needed in n32 or n64, retain for now
- */
-#if defined(__mips_n64) || defined(__mips_n32)
-static __inline uint32_t
-xlr_enable_kx(void)
-{
-
-	return (0);
-}
-
-static __inline void
-xlr_restore_kx(uint32_t sr)
-{
-}
-
-#else /* !defined(__mips_n64) && !defined(__mips_n32) */
-/*
- * o32 compilation, we will disable interrupts and enable
- * the KX bit so that we can use XKPHYS to access any 40bit
- * physical address
- */
-static __inline uint32_t 
-xlr_enable_kx(void)
-{
-	uint32_t sr = mips_rd_status();
-
-	mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX);
-	return (sr);
-}
-
-static __inline void
-xlr_restore_kx(uint32_t sr)
-{
-
-	mips_wr_status(sr);
-}
-#endif /* defined(__mips_n64) || defined(__mips_n32) */
-
-/*
- * XLR/XLS processors have maximum 8 cores, and maximum 4 threads
- * per core
- */
-#define	XLR_MAX_CORES		8
-#define	XLR_NTHREADS		4
-
-/*
- * FreeBSD can be started with few threads and cores turned off,
- * so have a hardware thread id to FreeBSD cpuid mapping.
- */
-extern int xlr_ncores;
-extern int xlr_threads_per_core;
-extern uint32_t xlr_hw_thread_mask;
-extern int xlr_cpuid_to_hwtid[];
-extern int xlr_hwtid_to_cpuid[];
-
-#endif
diff --git a/sys/mips/rmi/rootfs_list.txt b/sys/mips/rmi/rootfs_list.txt
deleted file mode 100644
index abf81a7a60d..00000000000
--- a/sys/mips/rmi/rootfs_list.txt
+++ /dev/null
@@ -1,669 +0,0 @@
-# $FreeBSD$
-#
-# This is the list of files that
-# should be in your rootfs (copy it from
-# the build world nfsmount dir. When the rge0
-# driver gets fixed we should be able to start
-# using nfs mount... for now we need to use MD_ROOT
-./.cshrc
-./.profile
-./COPYRIGHT
-./bin
-./bin/cat
-./bin/chflags
-./bin/chio
-./bin/chmod
-./bin/cp
-./bin/csh
-./bin/tcsh
-./bin/date
-./bin/dd
-./bin/df
-./bin/domainname
-./bin/echo
-./bin/ed
-./bin/red
-./bin/expr
-./bin/getfacl
-./bin/hostname
-./bin/kenv
-./bin/kill
-./bin/ln
-./bin/link
-./bin/ls
-./bin/mkdir
-./bin/mv
-./bin/pax
-./bin/pkill
-./bin/pgrep
-./bin/ps
-./bin/pwd
-./bin/rcp
-./bin/realpath
-./bin/rm
-./bin/unlink
-./bin/rmail
-./bin/rmdir
-./bin/setfacl
-./bin/sh
-./bin/sleep
-./bin/stty
-./bin/sync
-./bin/test
-./bin/[
-./bin/uuidgen
-./etc
-./etc/bluetooth
-./etc/bluetooth/hcsecd.conf
-./etc/bluetooth/hosts
-./etc/bluetooth/protocols
-./etc/defaults
-./etc/defaults/bluetooth.device.conf
-./etc/defaults/devfs.rules
-./etc/defaults/periodic.conf
-./etc/defaults/rc.conf
-./etc/devd
-./etc/devd/asus.conf
-./etc/gss
-./etc/gss/mech
-./etc/gss/qop
-./etc/mail
-./etc/mail/mailer.conf
-./etc/mail/freebsd.mc
-./etc/mail/freebsd.cf
-./etc/mail/freebsd.submit.mc
-./etc/mail/freebsd.submit.cf
-./etc/mail/helpfile
-./etc/mail/sendmail.cf
-./etc/mail/submit.cf
-./etc/mail/Makefile
-./etc/mail/README
-./etc/mail/access.sample
-./etc/mail/virtusertable.sample
-./etc/mail/mailertable.sample
-./etc/mail/aliases
-./etc/mtree
-./etc/mtree/BSD.include.dist
-./etc/mtree/BSD.root.dist
-./etc/mtree/BSD.usr.dist
-./etc/mtree/BSD.var.dist
-./etc/mtree/BSD.sendmail.dist
-./etc/mtree/BIND.chroot.dist
-./etc/pam.d
-./etc/pam.d/README
-./etc/pam.d/atrun
-./etc/pam.d/cron
-./etc/pam.d/ftpd
-./etc/pam.d/imap
-./etc/pam.d/kde
-./etc/pam.d/login
-./etc/pam.d/other
-./etc/pam.d/passwd
-./etc/pam.d/pop3
-./etc/pam.d/rsh
-./etc/pam.d/sshd
-./etc/pam.d/su
-./etc/pam.d/system
-./etc/pam.d/telnetd
-./etc/pam.d/xdm
-./etc/pam.d/ftp
-./etc/periodic
-./etc/periodic/daily
-./etc/periodic/daily/100.clean-disks
-./etc/periodic/daily/110.clean-tmps
-./etc/periodic/daily/120.clean-preserve
-./etc/periodic/daily/200.backup-passwd
-./etc/periodic/daily/330.news
-./etc/periodic/daily/400.status-disks
-./etc/periodic/daily/404.status-zfs
-./etc/periodic/daily/405.status-ata-raid
-./etc/periodic/daily/406.status-gmirror
-./etc/periodic/daily/407.status-graid3
-./etc/periodic/daily/408.status-gstripe
-./etc/periodic/daily/409.status-gconcat
-./etc/periodic/daily/420.status-network
-./etc/periodic/daily/450.status-security
-./etc/periodic/daily/999.local
-./etc/periodic/daily/310.accounting
-./etc/periodic/daily/470.status-named
-./etc/periodic/daily/300.calendar
-./etc/periodic/daily/130.clean-msgs
-./etc/periodic/daily/480.status-ntpd
-./etc/periodic/daily/140.clean-rwho
-./etc/periodic/daily/430.status-rwho
-./etc/periodic/daily/150.clean-hoststat
-./etc/periodic/daily/210.backup-aliases
-./etc/periodic/daily/440.status-mailq
-./etc/periodic/daily/460.status-mail-rejects
-./etc/periodic/daily/500.queuerun
-./etc/periodic/monthly
-./etc/periodic/monthly/999.local
-./etc/periodic/monthly/200.accounting
-./etc/periodic/security
-./etc/periodic/security/100.chksetuid
-./etc/periodic/security/200.chkmounts
-./etc/periodic/security/300.chkuid0
-./etc/periodic/security/400.passwdless
-./etc/periodic/security/410.logincheck
-./etc/periodic/security/700.kernelmsg
-./etc/periodic/security/800.loginfail
-./etc/periodic/security/900.tcpwrap
-./etc/periodic/security/security.functions
-./etc/periodic/security/510.ipfdenied
-./etc/periodic/security/500.ipfwdenied
-./etc/periodic/security/550.ipfwlimit
-./etc/periodic/security/520.pfdenied
-./etc/periodic/weekly
-./etc/periodic/weekly/340.noid
-./etc/periodic/weekly/999.local
-./etc/periodic/weekly/310.locate
-./etc/periodic/weekly/320.whatis
-./etc/periodic/weekly/400.status-pkg
-./etc/ppp
-./etc/ppp/ppp.conf
-./etc/rc.d
-./etc/rc.d/DAEMON
-./etc/rc.d/FILESYSTEMS
-./etc/rc.d/LOGIN
-./etc/rc.d/NETWORKING
-./etc/rc.d/SERVERS
-./etc/rc.d/abi
-./etc/rc.d/accounting
-./etc/rc.d/addswap
-./etc/rc.d/adjkerntz
-./etc/rc.d/amd
-./etc/rc.d/apm
-./etc/rc.d/apmd
-./etc/rc.d/archdep
-./etc/rc.d/atm1
-./etc/rc.d/atm2
-./etc/rc.d/atm3
-./etc/rc.d/auditd
-./etc/rc.d/bgfsck
-./etc/rc.d/bluetooth
-./etc/rc.d/bootparams
-./etc/rc.d/bridge
-./etc/rc.d/bthidd
-./etc/rc.d/ccd
-./etc/rc.d/cleanvar
-./etc/rc.d/cleartmp
-./etc/rc.d/cron
-./etc/rc.d/ddb
-./etc/rc.d/defaultroute
-./etc/rc.d/devd
-./etc/rc.d/devfs
-./etc/rc.d/dhclient
-./etc/rc.d/dmesg
-./etc/rc.d/dumpon
-./etc/rc.d/encswap
-./etc/rc.d/fsck
-./etc/rc.d/ftp-proxy
-./etc/rc.d/ftpd
-./etc/rc.d/gbde
-./etc/rc.d/geli
-./etc/rc.d/geli2
-./etc/rc.d/gssd
-./etc/rc.d/hcsecd
-./etc/rc.d/hostapd
-./etc/rc.d/hostid
-./etc/rc.d/hostid_save
-./etc/rc.d/hostname
-./etc/rc.d/inetd
-./etc/rc.d/initrandom
-./etc/rc.d/ip6addrctl
-./etc/rc.d/ip6fw
-./etc/rc.d/ipfilter
-./etc/rc.d/ipfs
-./etc/rc.d/ipfw
-./etc/rc.d/ipmon
-./etc/rc.d/ipnat
-./etc/rc.d/ipsec
-./etc/rc.d/jail
-./etc/rc.d/kadmind
-./etc/rc.d/kerberos
-./etc/rc.d/keyserv
-./etc/rc.d/kldxref
-./etc/rc.d/kpasswdd
-./etc/rc.d/ldconfig
-./etc/rc.d/local
-./etc/rc.d/localpkg
-./etc/rc.d/lockd
-./etc/rc.d/lpd
-./etc/rc.d/mixer
-./etc/rc.d/motd
-./etc/rc.d/mountcritlocal
-./etc/rc.d/mountcritremote
-./etc/rc.d/mountlate
-./etc/rc.d/mdconfig
-./etc/rc.d/mdconfig2
-./etc/rc.d/mountd
-./etc/rc.d/moused
-./etc/rc.d/mroute6d
-./etc/rc.d/mrouted
-./etc/rc.d/msgs
-./etc/rc.d/named
-./etc/rc.d/natd
-./etc/rc.d/netif
-./etc/rc.d/netoptions
-./etc/rc.d/newsyslog
-./etc/rc.d/pf
-./etc/rc.d/nfscbd
-./etc/rc.d/nfsclient
-./etc/rc.d/nfsd
-./etc/rc.d/nfsserver
-./etc/rc.d/nfsuserd
-./etc/rc.d/nisdomain
-./etc/rc.d/nsswitch
-./etc/rc.d/ntpd
-./etc/rc.d/ntpdate
-./etc/rc.d/othermta
-./etc/rc.d/pflog
-./etc/rc.d/pfsync
-./etc/rc.d/powerd
-./etc/rc.d/power_profile
-./etc/rc.d/ppp
-./etc/rc.d/pppoed
-./etc/rc.d/pwcheck
-./etc/rc.d/quota
-./etc/rc.d/random
-./etc/rc.d/rarpd
-./etc/rc.d/resolv
-./etc/rc.d/rfcomm_pppd_server
-./etc/rc.d/root
-./etc/rc.d/route6d
-./etc/rc.d/routed
-./etc/rc.d/routing
-./etc/rc.d/rpcbind
-./etc/rc.d/rtadvd
-./etc/rc.d/rwho
-./etc/rc.d/savecore
-./etc/rc.d/sdpd
-./etc/rc.d/securelevel
-./etc/rc.d/sendmail
-./etc/rc.d/serial
-./etc/rc.d/sppp
-./etc/rc.d/statd
-./etc/rc.d/static_arp
-./etc/rc.d/stf
-./etc/rc.d/swap1
-./etc/rc.d/syscons
-./etc/rc.d/sysctl
-./etc/rc.d/syslogd
-./etc/rc.d/timed
-./etc/rc.d/tmp
-./etc/rc.d/ugidfw
-./etc/rc.d/var
-./etc/rc.d/virecover
-./etc/rc.d/watchdogd
-./etc/rc.d/wpa_supplicant
-./etc/rc.d/ypbind
-./etc/rc.d/yppasswdd
-./etc/rc.d/ypserv
-./etc/rc.d/ypset
-./etc/rc.d/ypupdated
-./etc/rc.d/ypxfrd
-./etc/rc.d/zfs
-./etc/rc.d/zvol
-./etc/rc.d/sshd
-./etc/rc.d/nscd
-./etc/security
-./etc/security/audit_class
-./etc/security/audit_event
-./etc/security/audit_control
-./etc/security/audit_user
-./etc/security/audit_warn
-./etc/ssh
-./etc/ssh/ssh_config
-./etc/ssh/sshd_config
-./etc/ssh/moduli
-./etc/ssl
-./etc/ssl/openssl.cnf
-./etc/crontab
-./etc/devd.conf
-./etc/devfs.conf
-./etc/ddb.conf
-./etc/dhclient.conf
-./etc/disktab
-./etc/fbtab
-./etc/ftpusers
-./etc/gettytab
-./etc/group
-./etc/hosts
-./etc/hosts.allow
-./etc/hosts.equiv
-./etc/inetd.conf
-./etc/libalias.conf
-./etc/login.access
-./etc/login.conf
-./etc/mac.conf
-./etc/motd
-./etc/netconfig
-./etc/network.subr
-./etc/networks
-./etc/newsyslog.conf
-./etc/nsswitch.conf
-./etc/phones
-./etc/profile
-./etc/protocols
-./etc/rc
-./etc/rc.bsdextended
-./etc/rc.firewall
-./etc/rc.firewall6
-./etc/rc.initdiskless
-./etc/rc.sendmail
-./etc/rc.shutdown
-./etc/rc.subr
-./etc/remote
-./etc/rpc
-./etc/services
-./etc/shells
-./etc/sysctl.conf
-./etc/syslog.conf
-./etc/ttys
-./etc/amd.map
-./etc/apmd.conf
-./etc/freebsd-update.conf
-./etc/locate.rc
-./etc/hosts.lpd
-./etc/printcap
-./etc/mail.rc
-./etc/manpath.config
-./etc/ntp.conf
-./etc/nscd.conf
-./etc/portsnap.conf
-./etc/pf.os
-./etc/csh.cshrc
-./etc/csh.login
-./etc/csh.logout
-./etc/regdomain.xml
-./etc/login.conf.db
-./etc/pwd.db
-./etc/netstart
-./etc/pccard_ether
-./etc/rc.suspend
-./etc/rc.resume
-./etc/master.passwd
-./etc/nsmb.conf
-./etc/opieaccess
-./etc/spwd.db
-./etc/passwd
-./etc/dumpdates
-./etc/fstab
-./etc/rc.conf
-./etc/resolv.conf
-./etc/termcap
-./lib
-./lib/geom
-./lib/geom/geom_cache.so
-./lib/geom/geom_concat.so
-./lib/geom/geom_eli.so
-./lib/geom/geom_journal.so
-./lib/geom/geom_label.so
-./lib/geom/geom_mirror.so
-./lib/geom/geom_multipath.so
-./lib/geom/geom_nop.so
-./lib/geom/geom_part.so
-./lib/geom/geom_raid3.so
-./lib/geom/geom_shsec.so
-./lib/geom/geom_stripe.so
-./lib/geom/geom_virstor.so
-./lib/libc.so.7
-./lib/libcrypt.so.5
-./lib/libkvm.so.5
-./lib/libm.so.5
-./lib/libmd.so.5
-./lib/libncurses.so.8
-./lib/libncursesw.so.8
-./lib/libsbuf.so.5
-./lib/libutil.so.8
-./lib/libalias.so.7
-./lib/libalias_cuseeme.so
-./lib/libalias_dummy.so
-./lib/libalias_ftp.so
-./lib/libalias_irc.so
-./lib/libalias_nbt.so
-./lib/libalias_pptp.so
-./lib/libalias_skinny.so
-./lib/libalias_smedia.so
-./lib/libbegemot.so.4
-./lib/libcam.so.5
-./lib/libdevstat.so.7
-./lib/libedit.so.7
-./lib/libbsdxml.so.4
-./lib/libgeom.so.5
-./lib/libipsec.so.4
-./lib/libjail.so.1
-./lib/libkiconv.so.4
-./lib/libpcap.so.7
-./lib/libthr.so.3
-./lib/libufs.so.5
-./lib/libz.so.5
-./lib/libgcc_s.so.1
-./lib/libreadline.so.8
-./lib/libssp.so.0
-./lib/libcrypto.so.6
-./libexec
-./libexec/ld-elf.so.1
-./libexec/ld-elf.so.1.old
-./sbin
-./sbin/adjkerntz
-./sbin/atacontrol
-./sbin/bsdlabel
-./sbin/camcontrol
-./sbin/ccdconfig
-./sbin/clri
-./sbin/comcontrol
-./sbin/conscontrol
-./sbin/devd
-./sbin/devfs
-./sbin/dhclient
-./sbin/dhclient-script
-./sbin/dmesg
-./sbin/dump
-./sbin/rdump
-./sbin/dumpfs
-./sbin/dumpon
-./sbin/fdisk
-./sbin/ffsinfo
-./sbin/fsck
-./sbin/fsck_ffs
-./sbin/fsck_ufs
-./sbin/fsck_4.2bsd
-./sbin/fsdb
-./sbin/fsirand
-./sbin/gbde
-./sbin/fsck_msdosfs
-./sbin/geom
-./sbin/gcache
-./sbin/gconcat
-./sbin/geli
-./sbin/gjournal
-./sbin/glabel
-./sbin/gmirror
-./sbin/gmultipath
-./sbin/gnop
-./sbin/gpart
-./sbin/graid3
-./sbin/gshsec
-./sbin/gstripe
-./sbin/gvirstor
-./sbin/ggatec
-./sbin/ggated
-./sbin/ggatel
-./sbin/growfs
-./sbin/gvinum
-./sbin/ifconfig
-./sbin/init
-./sbin/ipf
-./sbin/ipfs
-./sbin/ipfstat
-./sbin/ipftest
-./sbin/ipmon
-./sbin/ipnat
-./sbin/ippool
-./sbin/md5
-./sbin/ipfw
-./sbin/ipresend
-./sbin/iscontrol
-./sbin/kldconfig
-./sbin/kldload
-./sbin/kldstat
-./sbin/kldunload
-./sbin/ldconfig
-./sbin/rmd160
-./sbin/sha1
-./sbin/sha256
-./sbin/mdconfig
-./sbin/mdmfs
-./sbin/mount_mfs
-./sbin/mknod
-./sbin/mksnap_ffs
-./sbin/mount
-./sbin/mount_cd9660
-./sbin/mount_msdosfs
-./sbin/mount_nfs
-./sbin/mount_newnfs
-./sbin/mount_nullfs
-./sbin/mount_udf
-./sbin/mount_unionfs
-./sbin/natd
-./sbin/ddb
-./sbin/newfs
-./sbin/newfs_msdos
-./sbin/nfsiod
-./sbin/nos-tun
-./sbin/pfctl
-./sbin/pflogd
-./sbin/ping
-./sbin/ping6
-./sbin/quotacheck
-./sbin/rcorder
-./sbin/reboot
-./sbin/nextboot
-./sbin/halt
-./sbin/fastboot
-./sbin/fasthalt
-./sbin/recoverdisk
-./sbin/restore
-./sbin/rrestore
-./sbin/route
-./sbin/routed
-./sbin/rtquery
-./sbin/rtsol
-./sbin/savecore
-./sbin/setkey
-./sbin/shutdown
-./sbin/spppcontrol
-./sbin/swapon
-./sbin/swapoff
-./sbin/swapctl
-./sbin/sysctl
-./sbin/tunefs
-./sbin/umount
-./sbin/init.bak
-./var
-./var/crash
-./var/crash/minfree
-./var/db
-./var/db/locate.database
-./var/log
-./var/log/sendmail.st
-./var/named
-./var/named/etc
-./var/named/etc/namedb
-./var/named/etc/namedb/master
-./var/named/etc/namedb/master/empty.db
-./var/named/etc/namedb/master/localhost-forward.db
-./var/named/etc/namedb/master/localhost-reverse.db
-./var/named/etc/namedb/named.conf
-./var/named/etc/namedb/named.root
-./var/yp
-./var/yp/Makefile.dist
-./var/run
-./var/cron
-./var/cron/tabs
-./root
-./root/.k5login
-./root/.profile
-./root/.cshrc
-./root/.login
-./list
-./dev
-./usr
-./usr/sbin
-./usr/sbin/newsyslog
-./usr/sbin/syslogd
-./usr/sbin/ip6addrctl
-./usr/sbin/sendmail
-./usr/sbin/cron
-./usr/lib
-./usr/lib/libpam.so.5
-./usr/lib/libpam.so
-./usr/lib/pam_opie.so.5
-./usr/lib/libbsm.so.3
-./usr/lib/libbsm.so
-./usr/lib/pam_chroot.so.5
-./usr/lib/pam_tacplus.so.5
-./usr/lib/pam_ssh.so.5
-./usr/lib/pam_self.so.5
-./usr/lib/pam_securetty.so.5
-./usr/lib/pam_rootok.so.5
-./usr/lib/pam_rhosts.so.5
-./usr/lib/pam_radius.so.5
-./usr/lib/pam_permit.so.5
-./usr/lib/pam_passwdqc.so.5
-./usr/lib/libcom_err.so.5
-./usr/lib/libcom_err.so
-./usr/lib/pam_opieaccess.so.5
-./usr/lib/pam_nologin.so.5
-./usr/lib/libc.so.7
-./usr/lib/pam_login_access.so.5
-./usr/lib/pam_lastlog.so.5
-./usr/lib/pam_ksu.so.5
-./usr/lib/pam_krb5.so.5
-./usr/lib/pam_guest.so.5
-./usr/lib/pam_group.so.5
-./usr/lib/pam_ftpusers.so.5
-./usr/lib/pam_exec.so.5
-./usr/lib/pam_echo.so.5
-./usr/lib/pam_deny.so.5
-./usr/lib/pam_unix.so.5
-./usr/lib/pam_chroot.so
-./usr/lib/libopie.so
-./usr/lib/pam_deny.so
-./usr/lib/pam_echo.so
-./usr/lib/pam_exec.so
-./usr/lib/pam_ftpusers.so
-./usr/lib/pam_group.so
-./usr/lib/pam_guest.so
-./usr/lib/pam_krb5.so
-./usr/lib/pam_ksu.so
-./usr/lib/pam_lastlog.so
-./usr/lib/pam_login_access.so
-./usr/lib/pam_nologin.so
-./usr/lib/pam_opie.so
-./usr/lib/pam_opieaccess.so
-./usr/lib/pam_passwdqc.so
-./usr/lib/pam_permit.so
-./usr/lib/pam_radius.so
-./usr/lib/pam_rhosts.so
-./usr/lib/pam_rootok.so
-./usr/lib/pam_securetty.so
-./usr/lib/pam_self.so
-./usr/lib/pam_ssh.so
-./usr/lib/pam_tacplus.so
-./usr/lib/pam_unix.so
-./usr/lib/libmd.so.5
-./usr/lib/libbz2.so.4
-./usr/lib/libgnuregex.so.5
-./usr/lib/libypclnt.so.4
-./usr/bin
-./usr/bin/mktemp
-./usr/bin/login
-./usr/bin/uname
-./usr/bin/awk
-./usr/bin/logger
-./usr/bin/grep
-./usr/bin/ftp
-./usr/libexec
-./usr/libexec/getty
diff --git a/sys/mips/rmi/std.xlr b/sys/mips/rmi/std.xlr
deleted file mode 100644
index 6abfad2b260..00000000000
--- a/sys/mips/rmi/std.xlr
+++ /dev/null
@@ -1,5 +0,0 @@
-# $FreeBSD$
-files	"../rmi/files.xlr"
-
-cpu	CPU_RMI
-option	NOFPU
diff --git a/sys/mips/rmi/tick.c b/sys/mips/rmi/tick.c
deleted file mode 100644
index f557ce731ee..00000000000
--- a/sys/mips/rmi/tick.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006-2007 Bruce M. Simpson.
- * Copyright (c) 2003-2004 Juli Mallett.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *	notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *	notice, this list of conditions and the following disclaimer in the
- *	documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Simple driver for the 32-bit interval counter built in to all
- * MIPS32 CPUs.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/power.h>
-#include <sys/smp.h>
-#include <sys/time.h>
-#include <sys/timeet.h>
-#include <sys/timetc.h>
-
-#include <machine/hwfunc.h>
-#include <machine/clock.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/intr_machdep.h>
-#include <mips/rmi/interrupt.h>
-
-uint64_t counter_freq;
-
-struct timecounter *platform_timecounter;
-
-static DPCPU_DEFINE(uint32_t, cycles_per_tick);
-static uint32_t cycles_per_usec;
-
-static DPCPU_DEFINE(volatile uint32_t, counter_upper);
-static DPCPU_DEFINE(volatile uint32_t, counter_lower_last);
-static DPCPU_DEFINE(uint32_t, compare_ticks);
-static DPCPU_DEFINE(uint32_t, lost_ticks);
-
-struct clock_softc {
-	int intr_rid;
-	struct resource *intr_res;
-	void *intr_handler;
-	struct timecounter tc;
-	struct eventtimer et;
-};
-static struct clock_softc *softc;
-
-/*
- * Device methods
- */
-static int clock_probe(device_t);
-static void clock_identify(driver_t *, device_t);
-static int clock_attach(device_t);
-static unsigned counter_get_timecount(struct timecounter *tc);
-
-void 
-mips_timer_early_init(uint64_t clock_hz)
-{
-	/* Initialize clock early so that we can use DELAY sooner */
-	counter_freq = clock_hz;
-	cycles_per_usec = (clock_hz / (1000 * 1000));
-}
-
-void
-platform_initclocks(void)
-{
-
-	if (platform_timecounter != NULL)
-		tc_init(platform_timecounter);
-}
-
-static uint64_t
-tick_ticker(void)
-{
-	uint64_t ret;
-	uint32_t ticktock;
-	uint32_t t_lower_last, t_upper;
-
-	/*
-	 * Disable preemption because we are working with cpu specific data.
-	 */
-	critical_enter();
-
-	/*
-	 * Note that even though preemption is disabled, interrupts are
-	 * still enabled. In particular there is a race with clock_intr()
-	 * reading the values of 'counter_upper' and 'counter_lower_last'.
-	 *
-	 * XXX this depends on clock_intr() being executed periodically
-	 * so that 'counter_upper' and 'counter_lower_last' are not stale.
-	 */
-	do {
-		t_upper = DPCPU_GET(counter_upper);
-		t_lower_last = DPCPU_GET(counter_lower_last);
-	} while (t_upper != DPCPU_GET(counter_upper));
-
-	ticktock = mips_rd_count();
-
-	critical_exit();
-
-	/* COUNT register wrapped around */
-	if (ticktock < t_lower_last)
-		t_upper++;
-
-	ret = ((uint64_t)t_upper << 32) | ticktock;
-	return (ret);
-}
-
-void
-mips_timer_init_params(uint64_t platform_counter_freq, int double_count)
-{
-
-	/*
-	 * XXX: Do not use printf here: uart code 8250 may use DELAY so this
-	 * function should  be called before cninit.
-	 */
-	counter_freq = platform_counter_freq;
-	/*
-	 * XXX: Some MIPS32 cores update the Count register only every two
-	 * pipeline cycles.
-	 * We know this because of status registers in CP0, make it automatic.
-	 */
-	if (double_count != 0)
-		counter_freq /= 2;
-
-	cycles_per_usec = counter_freq / (1 * 1000 * 1000);
-	set_cputicker(tick_ticker, counter_freq, 1);
-}
-
-static int
-sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS)
-{
-	int error;
-	uint64_t freq;
-
-	if (softc == NULL)
-		return (EOPNOTSUPP);
-	freq = counter_freq;
-	error = sysctl_handle_64(oidp, &freq, sizeof(freq), req);
-	if (error == 0 && req->newptr != NULL) {
-		counter_freq = freq;
-		softc->et.et_frequency = counter_freq;
-		softc->tc.tc_frequency = counter_freq;
-	}
-	return (error);
-}
-
-SYSCTL_PROC(_machdep, OID_AUTO, counter_freq, CTLTYPE_U64 | CTLFLAG_RW,
-    NULL, 0, sysctl_machdep_counter_freq, "QU",
-    "Timecounter frequency in Hz");
-
-static unsigned
-counter_get_timecount(struct timecounter *tc)
-{
-
-	return (mips_rd_count());
-}
-
-/*
- * Wait for about n microseconds (at least!).
- */
-void
-DELAY(int n)
-{
-	uint32_t cur, last, delta, usecs;
-
-	/*
-	 * This works by polling the timer and counting the number of
-	 * microseconds that go by.
-	 */
-	last = mips_rd_count();
-	delta = usecs = 0;
-
-	while (n > usecs) {
-		cur = mips_rd_count();
-
-		/* Check to see if the timer has wrapped around. */
-		if (cur < last)
-			delta += cur + (0xffffffff - last) + 1;
-		else
-			delta += cur - last;
-
-		last = cur;
-
-		if (delta >= cycles_per_usec) {
-			usecs += delta / cycles_per_usec;
-			delta %= cycles_per_usec;
-		}
-	}
-}
-
-static int
-clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
-{
-	uint32_t fdiv, div, next;
-
-	if (period != 0)
-		div = (et->et_frequency * period) >> 32;
-	else
-		div = 0;
-	if (first != 0)
-		fdiv = (et->et_frequency * first) >> 32;
-	else 
-		fdiv = div;
-	DPCPU_SET(cycles_per_tick, div);
-	next = mips_rd_count() + fdiv;
-	DPCPU_SET(compare_ticks, next);
-	mips_wr_compare(next);
-	return (0);
-}
-
-static int
-clock_stop(struct eventtimer *et)
-{
-
-	DPCPU_SET(cycles_per_tick, 0);
-	mips_wr_compare(0xffffffff);
-	return (0);
-}
-
-/*
- * Device section of file below
- */
-static int
-clock_intr(void *arg)
-{
-	struct clock_softc *sc = (struct clock_softc *)arg;
-	uint32_t cycles_per_tick;
-	uint32_t count, compare_last, compare_next, lost_ticks;
-
-	cycles_per_tick = DPCPU_GET(cycles_per_tick);
-	/*
-	 * Set next clock edge.
-	 */
-	count = mips_rd_count();
-	compare_last = DPCPU_GET(compare_ticks);
-	if (cycles_per_tick > 0) {
-		compare_next = count + cycles_per_tick;
-		DPCPU_SET(compare_ticks, compare_next);
-		mips_wr_compare(compare_next);
-	} else	/* In one-shot mode timer should be stopped after the event. */
-		mips_wr_compare(0xffffffff);
-
-	/* COUNT register wrapped around */
-	if (count < DPCPU_GET(counter_lower_last)) {
-		DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1);
-	}
-	DPCPU_SET(counter_lower_last, count);
-
-	if (cycles_per_tick > 0) {
-
-		/*
-		 * Account for the "lost time" between when the timer interrupt
-		 * fired and when 'clock_intr' actually started executing.
-		 */
-		lost_ticks = DPCPU_GET(lost_ticks);
-		lost_ticks += count - compare_last;
-	
-		/*
-		 * If the COUNT and COMPARE registers are no longer in sync
-		 * then make up some reasonable value for the 'lost_ticks'.
-		 *
-		 * This could happen, for e.g., after we resume normal
-		 * operations after exiting the debugger.
-		 */
-		if (lost_ticks > 2 * cycles_per_tick)
-			lost_ticks = cycles_per_tick;
-
-		while (lost_ticks >= cycles_per_tick) {
-			if (sc->et.et_active)
-				sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-			lost_ticks -= cycles_per_tick;
-		}
-		DPCPU_SET(lost_ticks, lost_ticks);
-	}
-	if (sc->et.et_active)
-		sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-	return (FILTER_HANDLED);
-}
-
-static int
-clock_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Generic MIPS32 ticker");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-clock_identify(driver_t * drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "clock", 0);
-}
-
-static int
-clock_attach(device_t dev)
-{
-	struct clock_softc *sc;
-
-	if (device_get_unit(dev) != 0)
-		panic("can't attach more clocks");
-
-	softc = sc = device_get_softc(dev);
-	cpu_establish_hardintr("compare", clock_intr, NULL,
-	    sc, IRQ_TIMER, INTR_TYPE_CLK, &sc->intr_handler);
-
-	sc->tc.tc_get_timecount = counter_get_timecount;
-	sc->tc.tc_counter_mask = 0xffffffff;
-	sc->tc.tc_frequency = counter_freq;
-	sc->tc.tc_name = "MIPS32";
-	sc->tc.tc_quality = 800;
-	sc->tc.tc_priv = sc;
-	tc_init(&sc->tc);
-	sc->et.et_name = "MIPS32";
-	sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
-	    ET_FLAGS_PERCPU;
-	sc->et.et_quality = 800;
-	sc->et.et_frequency = counter_freq;
-	sc->et.et_min_period = 0x00004000LLU; /* To be safe. */
-	sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
-	sc->et.et_start = clock_start;
-	sc->et.et_stop = clock_stop;
-	sc->et.et_priv = sc;
-	et_register(&sc->et);
-	return (0);
-}
-
-static device_method_t clock_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, clock_probe),
-	DEVMETHOD(device_identify, clock_identify),
-	DEVMETHOD(device_attach, clock_attach),
-	DEVMETHOD(device_detach, bus_generic_detach),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	{0, 0}
-};
-
-static driver_t clock_driver = {
-	"clock",
-	clock_methods,
-	sizeof(struct clock_softc),
-};
-
-static devclass_t clock_devclass;
-
-DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0);
diff --git a/sys/mips/rmi/uart_bus_xlr_iodi.c b/sys/mips/rmi/uart_bus_xlr_iodi.c
deleted file mode 100644
index 66a940d2a5c..00000000000
--- a/sys/mips/rmi/uart_bus_xlr_iodi.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Raza Microelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#include <mips/rmi/iomap.h>
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-static int uart_iodi_probe(device_t dev);
-
-static device_method_t uart_iodi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, uart_iodi_probe),
-	DEVMETHOD(device_attach, uart_bus_attach),
-	DEVMETHOD(device_detach, uart_bus_detach),
-	{0, 0}
-};
-
-static driver_t uart_iodi_driver = {
-	uart_driver_name,
-	uart_iodi_methods,
-	sizeof(struct uart_softc),
-};
-
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-static int
-uart_iodi_probe(device_t dev)
-{
-	struct uart_softc *sc;
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.bst = rmi_bus_space;
-	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(XLR_UART0ADDR);
-	sc->sc_bas.bst = rmi_bus_space;
-	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(XLR_UART0ADDR);
-	/* regshft = 2, rclk = 66000000, rid = 0, chan = 0 */
-	return (uart_bus_probe(dev, 2, 0, 66000000, 0, 0));
-}
-
-DRIVER_MODULE(uart, iodi, uart_iodi_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/rmi/uart_cpu_mips_xlr.c b/sys/mips/rmi/uart_cpu_mips_xlr.c
deleted file mode 100644
index 407023e4ae9..00000000000
--- a/sys/mips/rmi/uart_cpu_mips_xlr.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: uart_cpu_mips_xlr.c,v 1.5 2008-07-16 20:22:39 jayachandranc Exp $
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-/*
- * XLRMIPS: This file is hacked from arm/...
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <mips/rmi/iomap.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = rmi_bus_space;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(XLR_UART0ADDR);
-	
-	di->bas.regshft = 2;
-	/* divisor = rclk / (baudrate * 16); */
-	di->bas.rclk = 66000000;
-	di->baudrate = 0;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = rmi_bus_space;
-	return (0);
-}
diff --git a/sys/mips/rmi/xlr_csum_nocopy.S b/sys/mips/rmi/xlr_csum_nocopy.S
deleted file mode 100644
index 8b51a7f10f1..00000000000
--- a/sys/mips/rmi/xlr_csum_nocopy.S
+++ /dev/null
@@ -1,217 +0,0 @@
-#include <machine/asm.h>
-
-
-/*
- * a0: source address
- * a1: length of the area to checksum
- * a2: partial checksum
- * a3: dst
- */
-
-#define src a0
-#define dst a3
-#define sum v0
-
-	.text
-	.set	noreorder
-
-	.macro CSUM_BIGCHUNK_AND_COPY offset 
-	pref                    0,  (\offset+0x0)(a0)
-	ld			t0, (\offset+0x00)(a0)
-	ld			t1, (\offset+0x08)(a0)
-	.word			0x70481038  /*daddwc v0, v0, t0 */
-	.word			0x70491038 /*daddwc v0, v0, t1 */
-	ld			t0, (\offset + 0x10)(a0)		
-	ld			t1, (\offset + 0x18)(a0)	
-	.word			0x70481038 /* daddwc v0, v0, t0 */
-	.word			0x70491038 /*daddwc v0, v0, t1 */
-	.endm
-
-small_csumcpy: 						/* unknown src alignment and < 8 bytes to go  */
-	move 		a1, t2
-
-	andi		t0, a1, 4
-	beqz		t0, 1f
-	andi		t0, a1, 2
-
-	ulw			t1, (src) 			/* Still a full word to go  */
-	daddiu		src, 4
-	.word			0x70491038 /*daddwc v0, v0, t1 */
-
-1:	move		t1, zero
-	beqz		t0, 1f
-	andi		t0, a1, 1
-
-	ulhu		t1, (src) 			/* Still a halfword to go  */
-	daddiu		src, 2
-
-1:	beqz		t0, 1f
-	sll			t1, t1, 16
-
-	lbu			t2, (src)
-	nop
-
-#ifdef __MIPSEB__
-	sll		t2, t2, 8
-#endif
-	or		t1, t2
-
-1: 	.word			0x70491038 /*daddwc v0, v0, t1 */
-
-	.word			0x70461038 /*daddwc v0, v0, a2 */
-	.word			0x70401038 /*daddwc v0, v0, $0 */
-
-	/* Ideally at this point of time the status flag must be cleared */
-					
-	dsll32      v1, sum, 0
-	.word			0x70431038 /*daddwc v0, v0, v1 */
-	dsrl32		sum, sum, 0
-	.word			0x70401038 /*daddwc v0, v0, zero */
-
-	/* fold the checksum */
-	sll             v1, sum, 16
-	addu            sum, v1
-	sltu            v1, sum, v1
-	srl             sum, sum, 16
-	addu            sum, v1
-1:
-	.set		reorder
-	jr			ra
-	.set		noreorder
-
-/* ------------------------------------------------------------------ */
-
-	.align	5
-LEAF(xlr_csum_partial_nocopy)
-	move		sum, zero
-	move		t7, zero
-
-	sltiu		t8, a1, 0x8
-	bnez		t8, small_csumcpy		/* < 8 bytes to copy */
-	move		t2, a1
-
-	beqz		a1, out
-	andi		t7, src, 0x1			/* odd buffer? */
-
-hword_align:
-	beqz		t7, word_align
-	andi		t8, src, 0x2
-
-	lbu			t0, (src)
-	dsubu		a1, a1, 0x1
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	daddu		src, src, 0x1
-	andi		t8, src, 0x2
-
-word_align:
-	beqz		t8, dword_align
-	sltiu		t8, a1, 56
-
-	lhu			t0, (src)
-	dsubu		a1, a1, 0x2
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	sltiu		t8, a1, 56
-	daddu		src, src, 0x2
-
-dword_align:
-	bnez		t8, do_end_words
-	move		t8, a1
-
-	andi		t8, src, 0x4
-	beqz		t8, qword_align
-	andi		t8, src, 0x8
-
-	lw			t0, 0x00(src)
-	dsubu		a1, a1, 0x4
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	daddu		src, src, 0x4
-	andi		t8, src, 0x8
-
-qword_align:
-	beqz		t8, oword_align
-	andi		t8, src, 0x10
-
-	ld			t0, 0x00(src)
-	dsubu		a1, a1, 0x8
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	daddu		src, src, 0x8
-	andi		t8, src, 0x10
-
-oword_align:
-	beqz		t8, begin_movement
-	dsrl		t8, a1, 0x7
-
-	ld			t3, 0x08(src)
-	ld			t0, 0x00(src)
-	.word			0x704b1038 /*daddwc v0, v0, t3 */
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	dsubu		a1, a1, 0x10
-	daddu		src, src, 0x10
-	dsrl		t8, a1, 0x7
-
-begin_movement:
-	beqz		t8, 1f
-	andi		t2, a1, 0x40
-
-move_128bytes:
-	pref		0, 0x20(a0)
-	pref		0, 0x40(a0)
-	pref		0, 0x60(a0)
-	CSUM_BIGCHUNK_AND_COPY(0x00)
-	CSUM_BIGCHUNK_AND_COPY(0x20)
-	CSUM_BIGCHUNK_AND_COPY(0x40)
-	CSUM_BIGCHUNK_AND_COPY(0x60)
-	dsubu		t8, t8, 0x01
-	bnez		t8, move_128bytes	/* flag */
-	daddu		src, src, 0x80
-
-1:
-	beqz		t2, 1f
-	andi		t2, a1, 0x20
-
-move_64bytes:
-	pref		0, 0x20(a0)
-	pref		0, 0x40(a0)
-	CSUM_BIGCHUNK_AND_COPY(0x00)
-	CSUM_BIGCHUNK_AND_COPY(0x20)
-	daddu	src, src, 0x40
-
-1:
-	beqz		t2, do_end_words
-	andi		t8, a1, 0x1c
-
-move_32bytes:
-	pref		0, 0x20(a0)
-	CSUM_BIGCHUNK_AND_COPY(0x00)
-	andi		t8, a1, 0x1c
-	daddu		src, src, 0x20
-
-do_end_words:
-	beqz		t8, maybe_end_cruft
-	dsrl		t8, t8, 0x2
-
-end_words:
-	lw			t0, (src)
-	dsubu		t8, t8, 0x1
-	.word			0x70481038 /*daddwc v0, v0, t0 */
-	bnez		t8, end_words
-	daddu		src, src, 0x4
-
-maybe_end_cruft:
-	andi		t2, a1, 0x3
-
-small_memcpy:
- j small_csumcpy; move a1, t2
-	beqz		t2, out
-	move		a1, t2
-
-end_bytes:
-	lb			t0, (src)
-	dsubu		a1, a1, 0x1
-	bnez		a2, end_bytes
-	daddu		src, src, 0x1
-
-out:
-	jr			ra
-	move		v0, sum
-	END(xlr_csum_partial_nocopy)
diff --git a/sys/mips/rmi/xlr_i2c.c b/sys/mips/rmi/xlr_i2c.c
deleted file mode 100644
index 69bd58ed67e..00000000000
--- a/sys/mips/rmi/xlr_i2c.c
+++ /dev/null
@@ -1,418 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * I2C driver for the Palm-BK3220 I2C Host adapter on the RMI XLR.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-
-
-#include <dev/iicbus/iiconf.h>
-#include <dev/iicbus/iicbus.h>
-
-#include <mips/rmi/board.h>
-#include <mips/rmi/iomap.h>
-#include <mips/include/resource.h>
-
-#include "iicbus_if.h"
-
-/* XLR I2C REGISTERS */
-#define XLR_I2C_CFG            0x00
-#define XLR_I2C_CLKDIV         0x01
-#define XLR_I2C_DEVADDR        0x02
-#define XLR_I2C_ADDR           0x03
-#define XLR_I2C_DATAOUT        0x04
-#define XLR_I2C_DATAIN         0x05
-#define XLR_I2C_STATUS         0x06
-#define XLR_I2C_STARTXFR       0x07
-#define XLR_I2C_BYTECNT        0x08
-#define XLR_I2C_HDSTATIM       0x09
-
-/* XLR I2C REGISTERS FLAGS */
-#define XLR_I2C_BUS_BUSY	0x01
-#define XLR_I2C_SDOEMPTY	0x02
-#define XLR_I2C_RXRDY       	0x04
-#define XLR_I2C_ACK_ERR		0x08
-#define XLR_I2C_ARB_STARTERR	0x30
-
-/* Register Programming Values!! Change as required */
-#define XLR_I2C_CFG_ADDR	0xF8	/* 8-Bit dev Addr + POR Values */
-#define XLR_I2C_CFG_NOADDR	0xFA	/* 8-Bit reg Addr + POR Values  : No dev addr */
-#define XLR_I2C_STARTXFR_ND	0x02	/* No data , only addr */
-#define XLR_I2C_STARTXFR_RD	0x01	/* Read */
-#define XLR_I2C_STARTXFR_WR	0x00	/* Write */
-#define XLR_I2C_CLKDIV_DEF	0x14A	/* 0x00000052 */
-#define XLR_I2C_HDSTATIM_DEF	0x107	/* 0x00000000 */
-
-#define MAXTIME 0x10000
-#define ARIZONA_I2C_BUS 1
-
-static devclass_t xlr_i2c_devclass;
-
-/*
- * Device methods
- */
-static int xlr_i2c_probe(device_t);
-static int xlr_i2c_attach(device_t);
-static int xlr_i2c_detach(device_t);
-
-static int xlr_i2c_start(device_t dev, u_char slave, int timeout);
-static int xlr_i2c_stop(device_t dev);
-static int xlr_i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay);
-static int xlr_i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout);
-static int xlr_i2c_callback(device_t dev, int index, caddr_t data);
-static int xlr_i2c_repeated_start(device_t dev, u_char slave, int timeout);
-static int xlr_i2c_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
-
-struct xlr_i2c_softc {
-	device_t dev;		/* Self */
-	struct resource *mem_res;	/* Memory resource */
-	volatile int flags;
-	int sc_started;
-	uint8_t i2cdev_addr;
-	xlr_reg_t *iobase_i2c_regs;
-	device_t iicbus;
-	struct mtx sc_mtx;
-};
-
-static void  
-set_i2c_base(device_t dev)
-{
-	struct xlr_i2c_softc *sc;
-
-	sc = device_get_softc(dev);
-	if (device_get_unit(dev) == 0)
-		sc->iobase_i2c_regs = xlr_io_mmio(XLR_IO_I2C_0_OFFSET);
-	else
-		sc->iobase_i2c_regs = xlr_io_mmio(XLR_IO_I2C_1_OFFSET);
-}
-
-static void 
-xlr_i2c_dev_write(device_t dev, int reg, int value)
-{
-	struct xlr_i2c_softc *sc;
-
-	sc = device_get_softc(dev);
-	xlr_write_reg(sc->iobase_i2c_regs, reg, value);
-	return;
-}
-
-
-static int 
-xlr_i2c_dev_read(device_t dev, int reg)
-{
-	uint32_t val;
-	struct xlr_i2c_softc *sc;
-
-	sc = device_get_softc(dev);
-	val = xlr_read_reg(sc->iobase_i2c_regs, reg);
-	return ((int)val);
-}
-
-
-static int
-xlr_i2c_probe(device_t dev)
-{
-	device_set_desc(dev, "XLR/XLS I2C bus controller");
-
-	return (0);
-}
-
-
-/*
- * We add all the devices which we know about.
- * The generic attach routine will attach them if they are alive.
- */
-static int
-xlr_i2c_attach(device_t dev)
-{
-	int rid;
-	struct xlr_i2c_softc *sc;
-	device_t tmpd;
-
-	if(device_get_unit(dev)!=ARIZONA_I2C_BUS) {
-		device_printf(dev, "unused iicbus instance\n");
-		return 0;
-	}
-
-	sc = device_get_softc(dev);
-	set_i2c_base(dev);
-
-	mtx_init(&sc->sc_mtx, "xlr_i2c", "xlr_i2c", MTX_DEF);
-
-	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (sc->mem_res == NULL) {
-		printf("not able to allocate the bus resource\n");
-	}
-	if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
-		printf("could not allocate iicbus instance\n");
-		return -1;
-	}
-	if(xlr_board_info.xlr_i2c_device[I2C_RTC].enabled == 1) {
-		tmpd = device_add_child(sc->iicbus, "ds13rtc", 0);
-		device_set_ivars(tmpd, &xlr_board_info.xlr_i2c_device[I2C_RTC]);
-	}
-	if(xlr_board_info.xlr_i2c_device[I2C_THERMAL].enabled == 1) {
-		tmpd = device_add_child(sc->iicbus, "max6657", 0);
-		device_set_ivars(tmpd, &xlr_board_info.xlr_i2c_device[I2C_THERMAL]);
-	}
-	if(xlr_board_info.xlr_i2c_device[I2C_EEPROM].enabled == 1) {
-		tmpd = device_add_child(sc->iicbus, "at24co2n", 0);
-		device_set_ivars(tmpd, &xlr_board_info.xlr_i2c_device[I2C_EEPROM]);
-	}
-
-	/*
-	 * The old ds1374 rtc driver only handled one chip type.  The new
-	 * ds13rtc driver handles all ds13xx chips, but must be told the chip
-	 * type via hints.  XLR historically hasn't had a standard hints file,
-	 * so set up the hint now if it isn't already there.
-	 */
-#define HINTNAME "hint.ds13rtc.0.compatible"
-	if (!testenv(HINTNAME))
-		kern_setenv(HINTNAME, "dallas,ds1374");
-
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static int
-xlr_i2c_detach(device_t dev)
-{
-	bus_generic_detach(dev);
-
-	return (0);
-}
-
-static int 
-xlr_i2c_start(device_t dev, u_char slave, int timeout)
-{
-	int error = 0;
-	struct xlr_i2c_softc *sc;
-
-	sc = device_get_softc(dev);
-        mtx_lock(&sc->sc_mtx);
-	sc->sc_started = 1;
-	sc->i2cdev_addr = (slave >> 1);
-	return error;
-
-}
-
-static int 
-xlr_i2c_stop(device_t dev)
-{
-	int error = 0;
-	struct xlr_i2c_softc *sc;
-
-	sc = device_get_softc(dev);
-	mtx_unlock(&sc->sc_mtx);
-	return error;
-
-}
-
-static int 
-xlr_i2c_read(device_t dev, char *buf, int len, int *read, int last,
-    int delay)
-{
-	volatile uint32_t i2c_status = 0;
-	int pos=0;
-	int timeout = 0;
-	
-	xlr_i2c_dev_write(dev, XLR_I2C_CFG, XLR_I2C_CFG_NOADDR);
-	xlr_i2c_dev_write(dev, XLR_I2C_BYTECNT, len);
-
-retry:
-	xlr_i2c_dev_write(dev, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_RD);
-
-	timeout = 0;
-	while(1) {
-		if(timeout++ > MAXTIME)
-			return -1;
-
-		i2c_status = xlr_i2c_dev_read(dev, XLR_I2C_STATUS);
-		if (i2c_status & XLR_I2C_RXRDY)
-			buf[pos++] = (uint8_t) xlr_i2c_dev_read(dev, XLR_I2C_DATAIN);
-
-		/* ACKERR -- bail */
-		if (i2c_status & XLR_I2C_ACK_ERR) 
-			 return -1;      /* ACK_ERROR */
-
-		/* LOST ARB or STARTERR -- repeat */
-		if (i2c_status & XLR_I2C_ARB_STARTERR)
-			goto retry;
-
-		/* Wait for busy bit to go away */
-		if (i2c_status & XLR_I2C_BUS_BUSY)
-			continue;
-
-		if (pos == len)
-			break;
-	}	
-	*read = pos;
-	return 0;
-
-}
-
-static int 
-xlr_i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout /* us */ )
-{
-	volatile uint32_t i2c_status = 0x00;
-	uint8_t devaddr, addr;
-	struct xlr_i2c_softc *sc;
-	int pos;
-
-	sc = device_get_softc(dev);
-
-	/* the first byte of write is  addr (of register in device) */
-	addr = buf[0];
-	devaddr = sc->i2cdev_addr;
-	xlr_i2c_dev_write(dev, XLR_I2C_ADDR, addr);
-	xlr_i2c_dev_write(dev, XLR_I2C_DEVADDR, devaddr);
-	xlr_i2c_dev_write(dev, XLR_I2C_CFG, XLR_I2C_CFG_ADDR);
-	xlr_i2c_dev_write(dev, XLR_I2C_BYTECNT, len - 1);
-
-retry:
-	pos = 1;
-	if (len == 1) /* there is no data only address */
-		xlr_i2c_dev_write(dev, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_ND);
-	else {
-		xlr_i2c_dev_write(dev, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_WR);
-		xlr_i2c_dev_write(dev, XLR_I2C_DATAOUT, buf[pos]);
-	}
-
-	while (1) {
-		i2c_status = xlr_i2c_dev_read(dev, XLR_I2C_STATUS);
-		
-		/* sdo empty send next byte */
-		if (i2c_status & XLR_I2C_SDOEMPTY) {
-			pos++;
-			xlr_i2c_dev_write(dev, XLR_I2C_DATAOUT, buf[pos]);
-		}
-
-		/* LOST ARB or STARTERR -- repeat */
-		if (i2c_status & XLR_I2C_ARB_STARTERR) 
-			goto retry;
-
-		/* ACKERR -- bail */
-		if (i2c_status & XLR_I2C_ACK_ERR) {
-			printf("ACK ERR : exiting\n ");
-			return -1;
-		}
-	
-		/* busy try again */	
-		if (i2c_status & XLR_I2C_BUS_BUSY)
-			continue;
-
-		if (pos >= len)
-			break;
-	}
-	*sent = len - 1;
-	return 0;
-}
-
-
-
-static int
-xlr_i2c_callback(device_t dev, int index, caddr_t data)
-{
-	return 0;
-}
-
-static int
-xlr_i2c_repeated_start(device_t dev, u_char slave, int timeout)
-{
-	return 0;
-}
-
-/*
- * I2C bus transfer for RMI boards and devices.
- * Generic version of iicbus_transfer that calls the appropriate
- * routines to accomplish this.  See note above about acceptable
- * buffer addresses.
- */
-int
-xlr_i2c_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs)
-{       
-        int i, error, lenread, lenwrote;
-        u_char addr;
- 
-	addr = msgs[0].slave | LSB;
-	error = xlr_i2c_start(bus, addr, 0);
-        for (i = 0, error = 0; i < nmsgs && error == 0; i++) {
-                if (msgs[i].flags & IIC_M_RD) {
-		        error = xlr_i2c_read((bus), msgs[i].buf, msgs[i].len, &lenread, IIC_LAST_READ, 0);
-		}
-                else {    
-		        error = xlr_i2c_write((bus), msgs[i].buf, msgs[i].len, &lenwrote, 0);
-		}
-        }	
-	error = xlr_i2c_stop(bus);
-        return (error);
-}
-
-
-static device_method_t xlr_i2c_methods[] = {
-	/* device interface */
-	DEVMETHOD(device_probe, xlr_i2c_probe),
-	DEVMETHOD(device_attach, xlr_i2c_attach),
-	DEVMETHOD(device_detach, xlr_i2c_detach),
-
-	/* iicbus interface */
-	DEVMETHOD(iicbus_callback, xlr_i2c_callback),
-	DEVMETHOD(iicbus_repeated_start, xlr_i2c_repeated_start),
-	DEVMETHOD(iicbus_start, xlr_i2c_start),
-	DEVMETHOD(iicbus_stop, xlr_i2c_stop),
-	DEVMETHOD(iicbus_write, xlr_i2c_write),
-	DEVMETHOD(iicbus_read, xlr_i2c_read),
-	DEVMETHOD(iicbus_transfer, xlr_i2c_transfer),
-	{0, 0}
-};
-
-static driver_t xlr_i2c_driver = {
-	"xlr_i2c",
-	xlr_i2c_methods,
-	sizeof(struct xlr_i2c_softc),
-};
-
-DRIVER_MODULE(xlr_i2c, iodi, xlr_i2c_driver, xlr_i2c_devclass, 0, 0);
-DRIVER_MODULE(iicbus, xlr_i2c, iicbus_driver, iicbus_devclass, 0, 0);
diff --git a/sys/mips/rmi/xlr_machdep.c b/sys/mips/rmi/xlr_machdep.c
deleted file mode 100644
index 7404ee31705..00000000000
--- a/sys/mips/rmi/xlr_machdep.c
+++ /dev/null
@@ -1,626 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006-2009 RMI Corporation
- * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/rtprio.h>
-#include <sys/systm.h>
-#include <sys/interrupt.h>
-#include <sys/limits.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/random.h>
-
-#include <sys/cons.h>		/* cinit() */
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-#include <sys/queue.h>
-#include <sys/smp.h>
-#include <sys/timetc.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/asm.h>
-#include <machine/pmap.h>
-#include <machine/trap.h>
-#include <machine/clock.h>
-#include <machine/fls64.h>
-#include <machine/intr_machdep.h>
-#include <machine/smp.h>
-
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/board.h>
-#include <mips/rmi/rmi_mips_exts.h>
-#include <mips/rmi/rmi_boot_info.h>
-
-void mpwait(void);
-unsigned long xlr_io_base = (unsigned long)(DEFAULT_XLR_IO_BASE);
-
-/* 4KB static data aread to keep a copy of the bootload env until
-   the dynamic kenv is setup */
-char boot1_env[4096];
-int rmi_spin_mutex_safe=0;
-struct mtx xlr_pic_lock;
-
-/*
- * Parameters from boot loader
- */
-struct boot1_info xlr_boot1_info;
-int xlr_run_mode;
-int xlr_argc;
-int32_t *xlr_argv, *xlr_envp;
-uint64_t cpu_mask_info;
-uint32_t xlr_online_cpumask;
-uint32_t xlr_core_cpu_mask = 0x1;	/* Core 0 thread 0 is always there */
-
-int xlr_shtlb_enabled;
-int xlr_ncores;
-int xlr_threads_per_core;
-uint32_t xlr_hw_thread_mask;
-int xlr_cpuid_to_hwtid[MAXCPU];
-int xlr_hwtid_to_cpuid[MAXCPU];
-
-static void 
-xlr_setup_mmu_split(void)
-{
-	uint64_t mmu_setup;
-	int val = 0;
-
-	if (xlr_threads_per_core == 4 && xlr_shtlb_enabled == 0)
-		return;   /* no change from boot setup */	
-
-	switch (xlr_threads_per_core) {
-	case 1: 
-		val = 0; break;
-	case 2: 
-		val = 2; break;
-	case 4: 
-		val = 3; break;
-	}
-	
-	mmu_setup = read_xlr_ctrl_register(4, 0);
-	mmu_setup = mmu_setup & ~0x06;
-	mmu_setup |= (val << 1);
-
-	/* turn on global mode */
-	if (xlr_shtlb_enabled)
-		mmu_setup |= 0x01;
-
-	write_xlr_ctrl_register(4, 0, mmu_setup);
-}
-
-static void
-xlr_parse_mmu_options(void)
-{
-#ifdef notyet
-	char *hw_env, *start, *end;
-#endif
-	uint32_t cpu_map;
-	uint8_t core0_thr_mask, core_thr_mask;
-	int i, j, k;
-
-	/* First check for the shared TLB setup */
-	xlr_shtlb_enabled = 0;
-#ifdef notyet
-	/* 
-	 * We don't support sharing TLB per core - TODO
-	 */
-	xlr_shtlb_enabled = 0;
-	if ((hw_env = kern_getenv("xlr.shtlb")) != NULL) {
-		start = hw_env;
-		tmp = strtoul(start, &end, 0);
-		if (start != end)
-			xlr_shtlb_enabled = (tmp != 0);
-		else
-			printf("Bad value for xlr.shtlb [%s]\n", hw_env);
-		freeenv(hw_env);
-	}
-#endif
-	/*
-	 * XLR supports splitting the 64 TLB entries across one, two or four
-	 * threads (split mode).  XLR also allows the 64 TLB entries to be shared
-         * across all threads in the core using a global flag (shared TLB mode).
-         * We will support 1/2/4 threads in split mode or shared mode.
-	 *
-	 */
-	xlr_ncores = 1;
-	cpu_map = xlr_boot1_info.cpu_online_map;
-
-#ifndef SMP /* Uniprocessor! */
-	if (cpu_map != 0x1) {
-		printf("WARNING: Starting uniprocessor kernel on cpumask [0x%lx]!\n"
-		   "WARNING: Other CPUs will be unused.\n", (u_long)cpu_map);
-		cpu_map = 0x1;
-	}
-#endif
-	core0_thr_mask = cpu_map & 0xf;
-	switch (core0_thr_mask) {
-	case 1:
-		xlr_threads_per_core = 1; break;
-	case 3:
-		xlr_threads_per_core = 2; break;
-	case 0xf: 
-		xlr_threads_per_core = 4; break;
-	default:
-		goto unsupp;
-	}
-
-	/* Verify other cores CPU masks */
-	for (i = 1; i < XLR_MAX_CORES; i++) {
-		core_thr_mask = (cpu_map >> (i*4)) & 0xf;
-		if (core_thr_mask) {
-			if (core_thr_mask != core0_thr_mask)
-				goto unsupp; 
-			xlr_ncores++;
-		}
-	}
-	xlr_hw_thread_mask = cpu_map;
-
-	/* setup hardware processor id to cpu id mapping */
-	for (i = 0; i< MAXCPU; i++)
-		xlr_cpuid_to_hwtid[i] = 
-		    xlr_hwtid_to_cpuid [i] = -1;
-	for (i = 0, k = 0; i < XLR_MAX_CORES; i++) {
-		if (((cpu_map >> (i*4)) & 0xf) == 0)
-			continue;
-		for (j = 0; j < xlr_threads_per_core; j++) {
-			xlr_cpuid_to_hwtid[k] = i*4 + j;
-			xlr_hwtid_to_cpuid[i*4 + j] = k;
-			k++;
-		}
-	}
-
-	/* setup for the startup core */
-	xlr_setup_mmu_split();
-	return;
-
-unsupp:
-	printf("ERROR : Unsupported CPU mask [use 1,2 or 4 threads per core].\n"
-	    "\tcore0 thread mask [%lx], boot cpu mask [%lx]\n"
-	    "\tUsing default, 16 TLB entries per CPU, split mode\n", 
-	    (u_long)core0_thr_mask, (u_long)cpu_map);
-	panic("Invalid CPU mask - halting.\n");
-	return;
-}
-
-static void 
-xlr_set_boot_flags(void)
-{
-	char *p;
-
-	p = kern_getenv("bootflags");
-	if (p == NULL)
-		p = kern_getenv("boot_flags");  /* old style */
-	if (p == NULL)
-		return;
-
-	for (; p && *p != '\0'; p++) {
-		switch (*p) {
-		case 'd':
-		case 'D':
-			boothowto |= RB_KDB;
-			break;
-		case 'g':
-		case 'G':
-			boothowto |= RB_GDB;
-			break;
-		case 'v':
-		case 'V':
-			boothowto |= RB_VERBOSE;
-			break;
-
-		case 's':	/* single-user (default, supported for sanity) */
-		case 'S':
-			boothowto |= RB_SINGLE;
-			break;
-
-		default:
-			printf("Unrecognized boot flag '%c'.\n", *p);
-			break;
-		}
-	}
-
-	freeenv(p);
-	return;
-}
-extern uint32_t _end;
-
-static void
-mips_init(void)
-{
-	init_param1();
-	init_param2(physmem);
-
-	mips_cpu_init();
-	cpuinfo.cache_coherent_dma = TRUE;
-	pmap_bootstrap();
-#ifdef DDB
-	kdb_init();
-	if (boothowto & RB_KDB) {
-		kdb_enter("Boot flags requested debugger", NULL);
-	}
-#endif
-	mips_proc0_init();
-	mutex_init();
-}
-
-u_int
-platform_get_timecount(struct timecounter *tc __unused)
-{
-
-	return (0xffffffffU - pic_timer_count32(PIC_CLOCK_TIMER));
-}
-
-static void 
-xlr_pic_init(void)
-{
-	struct timecounter pic_timecounter = {
-		platform_get_timecount, /* get_timecount */
-		0,                      /* no poll_pps */
-		~0U,                    /* counter_mask */
-		PIC_TIMER_HZ,           /* frequency */
-		"XLRPIC",               /* name */
-		2000,                   /* quality (adjusted in code) */
-	};
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET);
-	int i, irq;
-
-	write_c0_eimr64(0ULL);
-	mtx_init(&xlr_pic_lock, "pic", NULL, MTX_SPIN);
-	xlr_write_reg(mmio, PIC_CTRL, 0);
-
-	/* Initialize all IRT entries */
-	for (i = 0; i < PIC_NUM_IRTS; i++) {
-		irq = PIC_INTR_TO_IRQ(i);
-
-		/*
-		 * Disable all IRTs. Set defaults (local scheduling, high
-		 * polarity, level * triggered, and CPU irq)
-		 */
-		xlr_write_reg(mmio, PIC_IRT_1(i), (1 << 30) | (1 << 6) | irq);
-		/* Bind all PIC irqs to cpu 0 */
-		xlr_write_reg(mmio, PIC_IRT_0(i), 0x01);
-	}
-
-	/* Setup timer 7 of PIC as a timestamp, no interrupts */
-	pic_init_timer(PIC_CLOCK_TIMER);
-	pic_set_timer(PIC_CLOCK_TIMER, ~UINT64_C(0));
-	platform_timecounter = &pic_timecounter;
-}
-
-static void
-xlr_mem_init(void)
-{
-	struct xlr_boot1_mem_map *boot_map;
-	vm_size_t physsz = 0;
-	int i, j;
-
-	/* get physical memory info from boot loader */
-	boot_map = (struct xlr_boot1_mem_map *)
-	    (unsigned long)xlr_boot1_info.psb_mem_map;
-	for (i = 0, j = 0; i < boot_map->num_entries; i++, j += 2) {
-		if (boot_map->physmem_map[i].type != BOOT1_MEM_RAM)
-			continue;
-		if (j == 14) {
-			printf("*** ERROR *** memory map too large ***\n");
-			break;
-		}
-		if (j == 0) {
-			/* start after kernel end */
-			phys_avail[0] = (vm_paddr_t)
-			    MIPS_KSEG0_TO_PHYS(&_end) + 0x20000;
-			/* boot loader start */
-			/* HACK to Use bootloaders memory region */
-			if (boot_map->physmem_map[0].size == 0x0c000000) {
-				boot_map->physmem_map[0].size = 0x0ff00000;
-			}
-			phys_avail[1] = boot_map->physmem_map[0].addr +
-			    boot_map->physmem_map[0].size;
-			printf("First segment: addr:%#jx -> %#jx \n",
-			       (uintmax_t)phys_avail[0], 
-			       (uintmax_t)phys_avail[1]);
-
-			dump_avail[0] = phys_avail[0];
-			dump_avail[1] = phys_avail[1];
-		} else {
-#if !defined(__mips_n64) && !defined(__mips_n32) /* !PHYSADDR_64_BIT */
-			/*
-			 * In 32 bit physical address mode we cannot use 
-			 * mem > 0xffffffff
-			 */
-			if (boot_map->physmem_map[i].addr > 0xfffff000U) {
-				printf("Memory: start %#jx size %#jx ignored"
-				    "(>4GB)\n",
-				    (intmax_t)boot_map->physmem_map[i].addr,
-				    (intmax_t)boot_map->physmem_map[i].size);
-				continue;
-			}
-			if (boot_map->physmem_map[i].addr +
-			    boot_map->physmem_map[i].size > 0xfffff000U) {
-				boot_map->physmem_map[i].size = 0xfffff000U - 
-				    boot_map->physmem_map[i].addr;
-				printf("Memory: start %#jx limited to 4GB\n",
-				    (intmax_t)boot_map->physmem_map[i].addr);
-			}
-#endif /* !PHYSADDR_64_BIT */
-			phys_avail[j] = (vm_paddr_t)
-			    boot_map->physmem_map[i].addr;
-			phys_avail[j + 1] = phys_avail[j] +
-			    boot_map->physmem_map[i].size;
-			printf("Next segment : addr:%#jx -> %#jx\n",
-			       (uintmax_t)phys_avail[j], 
-			       (uintmax_t)phys_avail[j+1]);
-		}
-
-		dump_avail[j] = phys_avail[j];
-		dump_avail[j+1] = phys_avail[j+1];
-
-		physsz += boot_map->physmem_map[i].size;
-	}
-
-	phys_avail[j] = phys_avail[j + 1] = 0;
-	realmem = physmem = btoc(physsz);
-}
-
-void
-platform_start(__register_t a0 __unused,
-    __register_t a1 __unused,
-    __register_t a2 __unused,
-    __register_t a3 __unused)
-{
-	int i;
-#ifdef SMP
-	uint32_t tmp;
-	void (*wakeup) (void *, void *, unsigned int);
-#endif
-
-	/* Save boot loader and other stuff from scratch regs */
-	xlr_boot1_info = *(struct boot1_info *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 0);
-	cpu_mask_info = read_c0_register64(MIPS_COP_0_OSSCRATCH, 1);
-	xlr_online_cpumask = read_c0_register32(MIPS_COP_0_OSSCRATCH, 2);
-	xlr_run_mode = read_c0_register32(MIPS_COP_0_OSSCRATCH, 3);
-	xlr_argc = read_c0_register32(MIPS_COP_0_OSSCRATCH, 4);
-	/*
-	 * argv and envp are passed in array of 32bit pointers
-	 */
-	xlr_argv = (int32_t *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 5);
-	xlr_envp = (int32_t *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 6);
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/* initialize console so that we have printf */
-	boothowto |= (RB_SERIAL | RB_MULTIPLE);	/* Use multiple consoles */
-
-	/* clockrate used by delay, so initialize it here */
-	cpu_clock = xlr_boot1_info.cpu_frequency / 1000000;
-
-	/*
-	 * Note the time counter on CPU0 runs not at system clock speed, but
-	 * at PIC time counter speed (which is returned by
-	 * platform_get_frequency(). Thus we do not use
-	 * xlr_boot1_info.cpu_frequency here.
-	 */
-	mips_timer_early_init(xlr_boot1_info.cpu_frequency);
-
-	/* Init console please */
-	cninit();
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-	printf("Environment (from %d args):\n", xlr_argc - 1);
-	if (xlr_argc == 1)
-		printf("\tNone\n");
-	for (i = 1; i < xlr_argc; i++) {
-		char *n, *arg;
-
-		arg = (char *)(intptr_t)xlr_argv[i];
-		printf("\t%s\n", arg);
-		n = strsep(&arg, "=");
-		if (arg == NULL)
-			kern_setenv(n, "1");
-		else
-			kern_setenv(n, arg);
-	}
-
-	xlr_set_boot_flags();
-	xlr_parse_mmu_options();
-
-	xlr_mem_init();
-	/* Set up hz, among others. */
-	mips_init();
-
-#ifdef SMP
-	/*
-	 * If thread 0 of any core is not available then mark whole core as
-	 * not available
-	 */
-	tmp = xlr_boot1_info.cpu_online_map;
-	for (i = 4; i < MAXCPU; i += 4) {
-		if ((tmp & (0xf << i)) && !(tmp & (0x1 << i))) {
-			/*
-			 * Oops.. thread 0 is not available. Disable whole
-			 * core
-			 */
-			tmp = tmp & ~(0xf << i);
-			printf("WARNING: Core %d is disabled because thread 0"
-			    " of this core is not enabled.\n", i / 4);
-		}
-	}
-	xlr_boot1_info.cpu_online_map = tmp;
-
-	/* Wakeup Other cpus, and put them in bsd park code. */
-	wakeup = ((void (*) (void *, void *, unsigned int))
-	    (unsigned long)(xlr_boot1_info.wakeup));
-	printf("Waking up CPUs 0x%jx.\n", 
-	    (intmax_t)xlr_boot1_info.cpu_online_map & ~(0x1U));
-	if (xlr_boot1_info.cpu_online_map & ~(0x1U))
-		wakeup(mpwait, 0,
-		    (unsigned int)xlr_boot1_info.cpu_online_map);
-#endif
-
-	/* xlr specific post initialization */
-	/* initialize other on chip stuff */
-	xlr_board_info_setup();
-	xlr_msgring_config();
-	xlr_pic_init();
-	xlr_msgring_cpu_init();
-
-	mips_timer_init_params(xlr_boot1_info.cpu_frequency, 0);
-
-	printf("Platform specific startup now completes\n");
-}
-
-void 
-platform_cpu_init()
-{
-}
-
-void
-platform_reset(void)
-{
-	xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
-
-	/* write 1 to GPIO software reset register */
-	xlr_write_reg(mmio, 8, 1);
-}
-
-#ifdef SMP
-int xlr_ap_release[MAXCPU];
-
-int
-platform_start_ap(int cpuid)
-{
-	int hwid = xlr_cpuid_to_hwtid[cpuid];
-
-	if (xlr_boot1_info.cpu_online_map & (1<<hwid)) {
-		/*
-		 * other cpus are enabled by the boot loader and they will be 
-		 * already looping in mpwait, release them
-		 */
-		atomic_store_rel_int(&xlr_ap_release[hwid], 1);
-		return (0);
-	} else
-		return (-1);
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	uint32_t stat;
-
-	/* The first thread has to setup the core MMU split  */
-	if (xlr_thr_id() == 0)
-		xlr_setup_mmu_split();
-
-	/* Setup interrupts for secondary CPUs here */
-	stat = mips_rd_status();
-	KASSERT((stat & MIPS_SR_INT_IE) == 0,
-	    ("Interrupts enabled in %s!", __func__));
-	stat |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT;
-	mips_wr_status(stat);
-
-	write_c0_eimr64(0ULL);
-	xlr_enable_irq(IRQ_IPI);
-	xlr_enable_irq(IRQ_TIMER);
-	if (xlr_thr_id() == 0)
-		xlr_msgring_cpu_init(); 
-	 xlr_enable_irq(IRQ_MSGRING);
-
-	return;
-}
-
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (IRQ_IPI);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (-1);
-}
-
-void
-platform_ipi_send(int cpuid)
-{
-
-	pic_send_ipi(xlr_cpuid_to_hwtid[cpuid], platform_ipi_hardintr_num());
-}
-
-void
-platform_ipi_clear(void)
-{
-}
-
-int
-platform_processor_id(void)
-{
-
-	return (xlr_hwtid_to_cpuid[xlr_cpu_id()]);
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	int i, s;
-
-	CPU_ZERO(mask);
-	s = xlr_ncores * xlr_threads_per_core;
-	for (i = 0; i < s; i++)
-		CPU_SET(i, mask);
-}
-
-struct cpu_group *
-platform_smp_topo()
-{
-
-	return (smp_topo_2level(CG_SHARE_L2, xlr_ncores, CG_SHARE_L1,
-		xlr_threads_per_core, CG_FLAG_THREAD));
-}
-#endif
diff --git a/sys/mips/rmi/xlr_pci.c b/sys/mips/rmi/xlr_pci.c
deleted file mode 100644
index 1feb71eb1d4..00000000000
--- a/sys/mips/rmi/xlr_pci.c
+++ /dev/null
@@ -1,659 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/types.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <machine/bus.h>
-#include <machine/md_var.h>
-#include <machine/intr_machdep.h>
-#include <machine/cpuregs.h>
-
-#include <mips/rmi/rmi_mips_exts.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/board.h>
-#include <mips/rmi/pcibus.h>
-
-#include "pcib_if.h"
-#include <dev/pci/pcib_private.h>
-
-#define pci_cfg_offset(bus,slot,devfn,where) (((bus)<<16) + ((slot) << 11)+((devfn)<<8)+(where))
-#define PCIE_LINK_STATE    0x4000
-
-#define LSU_CFG0_REGID       0
-#define LSU_CERRLOG_REGID    9
-#define LSU_CERROVF_REGID    10
-#define LSU_CERRINT_REGID    11
-
-/* MSI support */
-#define MSI_MIPS_ADDR_DEST		0x000ff000
-#define MSI_MIPS_ADDR_RH		0x00000008
-#define MSI_MIPS_ADDR_RH_OFF		0x00000000
-#define MSI_MIPS_ADDR_RH_ON		0x00000008
-#define MSI_MIPS_ADDR_DM		0x00000004
-#define MSI_MIPS_ADDR_DM_PHYSICAL	0x00000000
-#define MSI_MIPS_ADDR_DM_LOGICAL	0x00000004
-
-/* Fields in data for Intel MSI messages. */
-#define MSI_MIPS_DATA_TRGRMOD		0x00008000	/* Trigger mode */
-#define MSI_MIPS_DATA_TRGREDG		0x00000000	/* edge */
-#define MSI_MIPS_DATA_TRGRLVL		0x00008000	/* level */
-
-#define MSI_MIPS_DATA_LEVEL		0x00004000	/* Polarity. */
-#define MSI_MIPS_DATA_DEASSERT		0x00000000
-#define MSI_MIPS_DATA_ASSERT		0x00004000
-
-#define MSI_MIPS_DATA_DELMOD		0x00000700	/* Delivery Mode */
-#define MSI_MIPS_DATA_DELFIXED		0x00000000	/* fixed */
-#define MSI_MIPS_DATA_DELLOPRI		0x00000100	/* lowest priority */
-
-#define MSI_MIPS_DATA_INTVEC		0x000000ff
-
-/*
- * Build Intel MSI message and data values from a source.  AMD64 systems
- * seem to be compatible, so we use the same function for both.
- */
-#define MIPS_MSI_ADDR(cpu)					       \
-        (MSI_MIPS_ADDR_BASE | (cpu) << 12 |			       \
-	 MSI_MIPS_ADDR_RH_OFF | MSI_MIPS_ADDR_DM_PHYSICAL)
-
-#define MIPS_MSI_DATA(irq)					       \
-        (MSI_MIPS_DATA_TRGRLVL | MSI_MIPS_DATA_DELFIXED |	       \
-	 MSI_MIPS_DATA_ASSERT | (irq))
-
-struct xlr_pcib_softc {
-	bus_dma_tag_t	sc_pci_dmat;	/* PCI DMA tag pointer */
-};
-
-static devclass_t pcib_devclass;
-static void *xlr_pci_config_base;
-static struct rman irq_rman, port_rman, mem_rman;
-
-static void
-xlr_pci_init_resources(void)
-{
-
-	irq_rman.rm_start = 0;
-	irq_rman.rm_end = 255;
-	irq_rman.rm_type = RMAN_ARRAY;
-	irq_rman.rm_descr = "PCI Mapped Interrupts";
-	if (rman_init(&irq_rman)
-	    || rman_manage_region(&irq_rman, 0, 255))
-		panic("pci_init_resources irq_rman");
-
-	port_rman.rm_type = RMAN_ARRAY;
-	port_rman.rm_descr = "I/O ports";
-	if (rman_init(&port_rman)
-	    || rman_manage_region(&port_rman, 0x10000000, 0x1fffffff))
-		panic("pci_init_resources port_rman");
-
-	mem_rman.rm_type = RMAN_ARRAY;
-	mem_rman.rm_descr = "I/O memory";
-	if (rman_init(&mem_rman)
-	    || rman_manage_region(&mem_rman, 0xd0000000, 0xdfffffff))
-		panic("pci_init_resources mem_rman");
-}
-
-static int
-xlr_pcib_probe(device_t dev)
-{
-
-	if (xlr_board_info.is_xls)
-		device_set_desc(dev, "XLS PCIe bus");
-	else
-		device_set_desc(dev, "XLR PCI bus");
-
-	xlr_pci_init_resources();
-	xlr_pci_config_base = (void *)MIPS_PHYS_TO_KSEG1(DEFAULT_PCI_CONFIG_BASE);
-
-	return (0);
-}
-
-static int
-xlr_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = 0;
-		return (0);
-	}
-	return (ENOENT);
-}
-
-static int
-xlr_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		return (EINVAL);
-	case PCIB_IVAR_BUS:
-		return (EINVAL);
-	}
-	return (ENOENT);
-}
-
-static int
-xlr_pcib_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static __inline__ void 
-disable_and_clear_cache_error(void)
-{
-	uint64_t lsu_cfg0;
-
-	lsu_cfg0 = read_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CFG0_REGID);
-	lsu_cfg0 = lsu_cfg0 & ~0x2e;
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CFG0_REGID, lsu_cfg0);
-	/* Clear cache error log */
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CERRLOG_REGID, 0);
-}
-
-static __inline__ void 
-clear_and_enable_cache_error(void)
-{
-	uint64_t lsu_cfg0 = 0;
-
-	/* first clear the cache error logging register */
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CERRLOG_REGID, 0);
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CERROVF_REGID, 0);
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CERRINT_REGID, 0);
-
-	lsu_cfg0 = read_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CFG0_REGID);
-	lsu_cfg0 = lsu_cfg0 | 0x2e;
-	write_xlr_ctrl_register(CPU_BLOCKID_LSU, LSU_CFG0_REGID, lsu_cfg0);
-}
-
-static uint32_t 
-pci_cfg_read_32bit(uint32_t addr)
-{
-	uint32_t temp = 0;
-	uint32_t *p = (uint32_t *)xlr_pci_config_base + addr / sizeof(uint32_t);
-	uint64_t cerr_cpu_log = 0;
-
-	disable_and_clear_cache_error();
-	temp = bswap32(*p);
-
-	/* Read cache err log */
-	cerr_cpu_log = read_xlr_ctrl_register(CPU_BLOCKID_LSU,
-	    LSU_CERRLOG_REGID);
-	if (cerr_cpu_log) {
-		/* Device don't exist. */
-		temp = ~0x0;
-	}
-	clear_and_enable_cache_error();
-	return (temp);
-}
-
-static u_int32_t
-xlr_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
-			u_int reg, int width)
-{
-	uint32_t data = 0;
-
-	if ((width == 2) && (reg & 1))
-		return 0xFFFFFFFF;
-	else if ((width == 4) && (reg & 3))
-		return 0xFFFFFFFF;
-
-	data = pci_cfg_read_32bit(pci_cfg_offset(b, s, f, reg));
-
-	if (width == 1)
-		return ((data >> ((reg & 3) << 3)) & 0xff);
-	else if (width == 2)
-		return ((data >> ((reg & 3) << 3)) & 0xffff);
-	else
-		return (data);
-}
-
-static void
-xlr_pcib_write_config(device_t dev, u_int b, u_int s, u_int f,
-		u_int reg, u_int32_t val, int width)
-{
-	uint32_t cfgaddr = pci_cfg_offset(b, s, f, reg);
-	uint32_t data = 0, *p;
-
-	if ((width == 2) && (reg & 1))
-		return;
-	else if ((width == 4) && (reg & 3))
-		return;
-
-	if (width == 1) {
-		data = pci_cfg_read_32bit(cfgaddr);
-		data = (data & ~(0xff << ((reg & 3) << 3))) |
-		    (val << ((reg & 3) << 3));
-	} else if (width == 2) {
-		data = pci_cfg_read_32bit(cfgaddr);
-		data = (data & ~(0xffff << ((reg & 3) << 3))) |
-		    (val << ((reg & 3) << 3));
-	} else {
-		data = val;
-	}
-
-	p = (uint32_t *)xlr_pci_config_base + cfgaddr / sizeof(uint32_t);
-	*p = bswap32(data);
-
-	return;
-}
-
-static int 
-xlr_pcib_attach(device_t dev)
-{
-	struct xlr_pcib_softc *sc;
-	sc = device_get_softc(dev);
-	
-	/*
-	 * XLR C revision chips cannot do DMA above 2G physical address
-	 * create a parent tag with this lowaddr
-	 */
-	if (xlr_is_c_revision()) {
-		if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0,
-		    0x7fffffff, ~0, NULL, NULL, 0x7fffffff,
-		    0xff, 0x7fffffff, 0, NULL, NULL, &sc->sc_pci_dmat) != 0)
-			panic("%s: bus_dma_tag_create failed", __func__);
-	}
-	device_add_child(dev, "pci", -1);
-	bus_generic_attach(dev);
-	return (0);
-}
-
-static void
-xlr_pcib_identify(driver_t * driver, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "pcib", 0);
-}
-
-/*
- * XLS PCIe can have upto 4 links, and each link has its on IRQ
- * Find the link on which the device is on 
- */
-static int
-xls_pcie_link(device_t pcib, device_t dev)
-{
-	device_t parent, tmp;
-
-	/* find the lane on which the slot is connected to */
-	printf("xls_pcie_link : bus %s dev %s\n", device_get_nameunit(pcib),
-		device_get_nameunit(dev));
-	tmp = dev;
-	while (1) {
-		parent = device_get_parent(tmp);
-		if (parent == NULL || parent == pcib) {
-			device_printf(dev, "Cannot find parent bus\n");
-			return (-1);
-		}
-		if (strcmp(device_get_nameunit(parent), "pci0") == 0)
-			break;
-		tmp = parent;
-	}
-	return (pci_get_slot(tmp));
-}
-
-/*
- * Find the IRQ for the link, each link has a different interrupt 
- * at the XLS pic
- */
-static int
-xls_pcie_link_irq(int link)
-{
-
-	switch (link) {
-	case 0:
-		return (PIC_PCIE_LINK0_IRQ);
-	case 1:
-		return (PIC_PCIE_LINK1_IRQ);
-	case 2:
-		if (xlr_is_xls_b0())
-			return (PIC_PCIE_B0_LINK2_IRQ);
-		else
-			return (PIC_PCIE_LINK2_IRQ);
-	case 3:
-		if (xlr_is_xls_b0())
-			return (PIC_PCIE_B0_LINK3_IRQ);
-		else
-			return (PIC_PCIE_LINK3_IRQ);
-	}
-	return (-1);
-}
-
-static int
-xlr_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
-{
-	int i, link;
-
-	/*
-	 * Each link has 32 MSIs that can be allocated, but for now
-	 * we only support one device per link.
-	 * msi_alloc() equivalent is needed when we start supporting 
-	 * bridges on the PCIe link.
-	 */
-	link = xls_pcie_link(pcib, dev);
-	if (link == -1)
-		return (ENXIO);
-
-	/*
-	 * encode the irq so that we know it is a MSI interrupt when we
-	 * setup interrupts
-	 */
-	for (i = 0; i < count; i++)
-		irqs[i] = 64 + link * 32 + i;
-
-	return (0);
-}
-
-static int
-xlr_release_msi(device_t pcib, device_t dev, int count, int *irqs)
-{
-	device_printf(dev, "%s: msi release %d\n", device_get_nameunit(pcib),
-	    count);
-	return (0);
-}
-
-static int
-xlr_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
-    uint32_t *data)
-{
-	int msi;
-
-	if (irq >= 64) {
-		msi = irq - 64;
-		*addr = MIPS_MSI_ADDR(0);
-		*data = MIPS_MSI_DATA(msi);
-		return (0);
-	} else {
-		device_printf(dev, "%s: map_msi for irq %d  - ignored", 
-		    device_get_nameunit(pcib), irq);
-		return (ENXIO);
-	}
-}
-
-static void
-bridge_pcix_ack(int irq)
-{
-
-	(void)xlr_read_reg(xlr_io_mmio(XLR_IO_PCIX_OFFSET), 0x140 >> 2);
-}
-
-static void
-bridge_pcie_ack(int irq)
-{
-	uint32_t reg;
-	xlr_reg_t *pcie_mmio_le = xlr_io_mmio(XLR_IO_PCIE_1_OFFSET);
-
-	switch (irq) {
-	case PIC_PCIE_LINK0_IRQ:
-		reg = PCIE_LINK0_MSI_STATUS;
-		break;
-	case PIC_PCIE_LINK1_IRQ:
-		reg = PCIE_LINK1_MSI_STATUS;
-		break;
-	case PIC_PCIE_LINK2_IRQ:
-	case PIC_PCIE_B0_LINK2_IRQ:
-		reg = PCIE_LINK2_MSI_STATUS;
-		break;
-	case PIC_PCIE_LINK3_IRQ:
-	case PIC_PCIE_B0_LINK3_IRQ:
-		reg = PCIE_LINK3_MSI_STATUS;
-		break;
-	default:
-		return;
-	}
-	xlr_write_reg(pcie_mmio_le, reg>>2, 0xffffffff);
-}
-
-static int
-mips_platform_pci_setup_intr(device_t dev, device_t child,
-    struct resource *irq, int flags, driver_filter_t *filt,
-    driver_intr_t *intr, void *arg, void **cookiep)
-{
-	int error = 0;
-	int xlrirq;
-
-	error = rman_activate_resource(irq);
-	if (error)
-		return error;
-	if (rman_get_start(irq) != rman_get_end(irq)) {
-		device_printf(dev, "Interrupt allocation %ju != %ju\n",
-		    rman_get_start(irq), rman_get_end(irq));
-		return (EINVAL);
-	}
-	xlrirq = rman_get_start(irq);
-
-	if (strcmp(device_get_name(dev), "pcib") != 0)
-		return (0);
-
-	if (xlr_board_info.is_xls == 0) {
-		xlr_establish_intr(device_get_name(child), filt,
-		    intr, arg, PIC_PCIX_IRQ, flags, cookiep, bridge_pcix_ack);
-		pic_setup_intr(PIC_IRT_PCIX_INDEX, PIC_PCIX_IRQ, 0x1, 1);
-	} else {
-		/* 
-		 * temporary hack for MSI, we support just one device per
-		 * link, and assign the link interrupt to the device interrupt
-		 */
-		if (xlrirq >= 64) {
-			xlrirq -= 64;
-			if (xlrirq % 32 != 0)
-				return (0);
-			xlrirq = xls_pcie_link_irq(xlrirq / 32);
-			if (xlrirq == -1)
-				return (EINVAL);
-		}
-		xlr_establish_intr(device_get_name(child), filt,
-		    intr, arg, xlrirq, flags, cookiep, bridge_pcie_ack);
-		pic_setup_intr(xlrirq - PIC_IRQ_BASE, xlrirq, 0x1, 1);
-	}
-
-	return (bus_generic_setup_intr(dev, child, irq, flags, filt, intr,
-	    arg, cookiep));
-}
-
-static int
-mips_platform_pci_teardown_intr(device_t dev, device_t child,
-    struct resource *irq, void *cookie)
-{
-	if (strcmp(device_get_name(child), "pci") == 0) {
-		/* if needed reprogram the pic to clear pcix related entry */
-		device_printf(dev, "teardown intr\n");
-	}
-	return (bus_generic_teardown_intr(dev, child, irq, cookie));
-}
-
-static struct resource *
-xlr_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-	rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct rman *rm;
-	struct resource *rv;
-	vm_offset_t va;
-	int needactivate = flags & RF_ACTIVE;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &irq_rman;
-		break;
-
-	case SYS_RES_IOPORT:
-		rm = &port_rman;
-		break;
-
-	case SYS_RES_MEMORY:
-		rm = &mem_rman;
-		break;
-
-	default:
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL)
-		return (0);
-
-	rman_set_rid(rv, *rid);
-
-	if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
-		va = (vm_offset_t)pmap_mapdev(start, count);
-		rman_set_bushandle(rv, va);
-		/* bushandle is same as virtual addr */
-		rman_set_virtual(rv, (void *)va);
-		rman_set_bustag(rv, rmi_pci_bus_space);
-	}
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-	return (rv);
-}
-
-static int
-xlr_pci_release_resource(device_t bus, device_t child, int type, int rid,
-		       struct resource *r)
-{
-
-	return (rman_release_resource(r));
-}
-
-static bus_dma_tag_t
-xlr_pci_get_dma_tag(device_t bus, device_t child)
-{
-	struct xlr_pcib_softc *sc;
-
-	sc = device_get_softc(bus);
-	return (sc->sc_pci_dmat);
-}
-
-static int
-xlr_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-                      struct resource *r)
-{
-
-	return (rman_activate_resource(r));
-}
-
-static int
-xlr_pci_deactivate_resource(device_t bus, device_t child, int type, int rid,
-                          struct resource *r)
-{
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-mips_pci_route_interrupt(device_t bus, device_t dev, int pin)
-{
-	int irq, link;
-
-	/*
-	 * Validate requested pin number.
-	 */
-	if ((pin < 1) || (pin > 4))
-		return (255);
-
-	if (xlr_board_info.is_xls) {
-		link = xls_pcie_link(bus, dev);
-		irq = xls_pcie_link_irq(link);
-		if (irq != -1)
-			return (irq);
-	} else {
-		if (pin == 1)
-			return (PIC_PCIX_IRQ);
-	}
-
-	return (255);
-}
-
-static device_method_t xlr_pcib_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify, xlr_pcib_identify),
-	DEVMETHOD(device_probe, xlr_pcib_probe),
-	DEVMETHOD(device_attach, xlr_pcib_attach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar, xlr_pcib_read_ivar),
-	DEVMETHOD(bus_write_ivar, xlr_pcib_write_ivar),
-	DEVMETHOD(bus_alloc_resource, xlr_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource, xlr_pci_release_resource),
-	DEVMETHOD(bus_get_dma_tag, xlr_pci_get_dma_tag),
-	DEVMETHOD(bus_activate_resource, xlr_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, xlr_pci_deactivate_resource),
-	DEVMETHOD(bus_setup_intr, mips_platform_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr, mips_platform_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots, xlr_pcib_maxslots),
-	DEVMETHOD(pcib_read_config, xlr_pcib_read_config),
-	DEVMETHOD(pcib_write_config, xlr_pcib_write_config),
-	DEVMETHOD(pcib_route_interrupt, mips_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD(pcib_alloc_msi, xlr_alloc_msi),
-	DEVMETHOD(pcib_release_msi, xlr_release_msi),
-	DEVMETHOD(pcib_map_msi, xlr_map_msi),
-
-	DEVMETHOD_END
-};
-
-static driver_t xlr_pcib_driver = {
-	"pcib",
-	xlr_pcib_methods,
-	sizeof(struct xlr_pcib_softc),
-};
-
-DRIVER_MODULE(pcib, iodi, xlr_pcib_driver, pcib_devclass, 0, 0);
diff --git a/sys/mips/rmi/xlr_pcmcia.c b/sys/mips/rmi/xlr_pcmcia.c
deleted file mode 100644
index 1c510013b00..00000000000
--- a/sys/mips/rmi/xlr_pcmcia.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-/*
- * ATA driver for the XLR_PCMCIA Host adapter on the RMI XLR/XLS/.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h> 
-#include <sys/rman.h>
-#include <vm/uma.h>
-#include <sys/ata.h>
-#include <sys/sema.h>
-#include <sys/taskqueue.h>
-#include <sys/bus_dma.h>
-
-#include <dev/ata/ata-all.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/iomap.h>
-#include <mips/include/resource.h>
-#include <mips/rmi/interrupt.h>
-
-#define	XLR_PCMCIA_DATA_REG		0x1f0
-#define	XLR_PCMCIA_ERROR_REG		0x1f1
-#define	XLR_PCMCIA_SECT_CNT_REG		0x1f2
-#define	XLR_PCMCIA_SECT_NUM_REG		0x1f3
-#define	XLR_PCMCIA_CYLINDER_LOW_REG	0x1f4
-#define	XLR_PCMCIA_CYLINDER_HIGH_REG	0x1f5
-#define	XLR_PCMCIA_SECT_DRIVE_HEAD_REG	0x1f6
-#define	XLR_PCMCIA_CMD_STATUS_REG	0x1f7
-#define	XLR_PCMCIA_ALT_STATUS_REG	0x3f6
-#define	XLR_PCMCIA_CONTROL_REG		0x3f6
-
-/*
- * Device methods
- */
-static int xlr_pcmcia_probe(device_t);
-static int xlr_pcmcia_attach(device_t);
-static int xlr_pcmcia_detach(device_t);
-
-static int
-xlr_pcmcia_probe(device_t dev)
-{
-	struct ata_channel *ch = device_get_softc(dev);
-
-	ch->unit = 0;
-	ch->flags |= ATA_USE_16BIT | ATA_NO_SLAVE ;
-	device_set_desc(dev, "PCMCIA ATA controller");
-
-	return (ata_probe(dev));
-}
-
-/*
- * We add all the devices which we know about.
- * The generic attach routine will attach them if they are alive.
- */
-static int
-xlr_pcmcia_attach(device_t dev)
-{
-	struct ata_channel *ch = device_get_softc(dev);
-	int i;
-	int rid =0;
-	struct resource *mem_res;
-
-
-	mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,  RF_ACTIVE);
-	for (i = 0; i < ATA_MAX_RES; i++)
-		ch->r_io[i].res = mem_res;
-
-	/*
-	 * CF+ Specification.
-	 */
-	ch->r_io[ATA_DATA].offset 	= XLR_PCMCIA_DATA_REG;
-	ch->r_io[ATA_FEATURE].offset 	= XLR_PCMCIA_ERROR_REG;
-	ch->r_io[ATA_COUNT].offset 	= XLR_PCMCIA_SECT_CNT_REG;
-	ch->r_io[ATA_SECTOR].offset 	= XLR_PCMCIA_SECT_NUM_REG;
-	ch->r_io[ATA_CYL_LSB].offset 	= XLR_PCMCIA_CYLINDER_LOW_REG;
-	ch->r_io[ATA_CYL_MSB].offset 	= XLR_PCMCIA_CYLINDER_HIGH_REG;
-	ch->r_io[ATA_DRIVE].offset 	= XLR_PCMCIA_SECT_DRIVE_HEAD_REG;
-	ch->r_io[ATA_COMMAND].offset 	= XLR_PCMCIA_CMD_STATUS_REG;
-	ch->r_io[ATA_ERROR].offset 	= XLR_PCMCIA_ERROR_REG;
-	ch->r_io[ATA_IREASON].offset 	= XLR_PCMCIA_SECT_CNT_REG;
-	ch->r_io[ATA_STATUS].offset 	= XLR_PCMCIA_CMD_STATUS_REG;
-	ch->r_io[ATA_ALTSTAT].offset 	= XLR_PCMCIA_ALT_STATUS_REG;
-	ch->r_io[ATA_CONTROL].offset 	= XLR_PCMCIA_CONTROL_REG;
-
-	/* Should point at the base of registers. */
-	ch->r_io[ATA_IDX_ADDR].offset = XLR_PCMCIA_DATA_REG;
-
-	ata_generic_hw(dev);
-
-	return (ata_attach(dev)); 
-}
-
-static int
-xlr_pcmcia_detach(device_t dev)
-{
-	bus_generic_detach(dev);
-  
-	return (0);
-}
-
-static device_method_t xlr_pcmcia_methods[] = {
-    /* device interface */
-    DEVMETHOD(device_probe,         xlr_pcmcia_probe),
-    DEVMETHOD(device_attach,        xlr_pcmcia_attach),
-    DEVMETHOD(device_detach,        xlr_pcmcia_detach),
-
-    { 0, 0 }
-};
-
-static driver_t xlr_pcmcia_driver = {
-        "ata",
-        xlr_pcmcia_methods,
-        sizeof(struct ata_channel),
-};
-
-DRIVER_MODULE(ata, iodi, xlr_pcmcia_driver, ata_devclass, 0, 0);
diff --git a/sys/mips/rmi/xls_ehci.c b/sys/mips/rmi/xls_ehci.c
deleted file mode 100644
index d0cff83fc1e..00000000000
--- a/sys/mips/rmi/xls_ehci.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Lennart Augustsson (augustss@carlstedt.se) at
- * Carlstedt Research & Technology.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_bus.h"
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-#include <dev/usb/controller/ehci.h>
-#include <dev/usb/controller/ehcireg.h>
-#include <mips/rmi/pic.h>
-
-static device_attach_t ehci_xls_attach;
-static device_detach_t ehci_xls_detach;
-
-static const char *xlr_usb_dev_desc = "RMI XLR USB 2.0 controller";
-static const char *xlr_vendor_desc = "RMI Corp";
-
-static int
-ehci_xls_probe(device_t self)
-{
-	/* TODO see if usb is enabled on the board */
-	device_set_desc(self, xlr_usb_dev_desc);
-	return BUS_PROBE_DEFAULT;
-}
-
-static int
-ehci_xls_attach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	int err;
-	int rid;
-
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
-		return (ENOMEM);
-	}
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	printf("IO Resource tag %lx, hdl %lx, size %lx\n",
-	       (u_long)sc->sc_io_tag, (u_long)sc->sc_io_hdl, 
-	       (u_long)sc->sc_io_size);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid,
-	    PIC_USB_IRQ, PIC_USB_IRQ, 1, RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!sc->sc_bus.bdev) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, xlr_usb_dev_desc);
-
-	strlcpy(sc->sc_vendor, xlr_vendor_desc, sizeof(sc->sc_vendor));
-
-	err = bus_setup_intr(self, sc->sc_irq_res,
-	    INTR_TYPE_BIO | INTR_MPSAFE, NULL,
-	    (driver_intr_t *) ehci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ehci_init(sc);
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-
-	err = device_probe_and_attach(sc->sc_bus.bdev);
-	if (err) {
-		device_printf(self, "USB probe and attach failed err=%d\n", err);
-		goto error;
-	}
-
-	return (0);
-
-error:
-	ehci_xls_detach(self);
-	return (ENXIO);
-}
-
-static int
-ehci_xls_detach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		ehci_detach(sc);
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-			    err);
-		sc->sc_intr_hdl = 0;
-	}
-
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-		sc->sc_io_tag = 0;
-		sc->sc_io_hdl = 0;
-	}
-
-	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ehci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ehci_xls_probe),
-	DEVMETHOD(device_attach, ehci_xls_attach),
-	DEVMETHOD(device_detach, ehci_xls_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ehci_driver = {
-	.name = "ehci",
-	.methods = ehci_methods,
-	.size = sizeof(struct ehci_softc),
-};
-
-static devclass_t ehci_devclass;
-
-DRIVER_MODULE(ehci, iodi, ehci_driver, ehci_devclass, 0, 0);
-MODULE_DEPEND(ehci, usb, 1, 1, 1);
diff --git a/sys/mips/rt305x/files.rt305x b/sys/mips/rt305x/files.rt305x
deleted file mode 100644
index 94152d3cdcb..00000000000
--- a/sys/mips/rt305x/files.rt305x
+++ /dev/null
@@ -1,19 +0,0 @@
-# $FreeBSD$
-
-# RT305X on-board devices
-mips/rt305x/rt305x_machdep.c	standard
-mips/rt305x/obio.c		standard
-mips/rt305x/rt305x_sysctl.c	standard
-mips/rt305x/rt305x_ic.c		standard
-mips/rt305x/rt305x_gpio.c	optional gpio
-mips/rt305x/uart_bus_rt305x.c	optional uart
-mips/rt305x/uart_cpu_rt305x.c	optional uart
-mips/rt305x/uart_dev_rt305x.c	optional uart
-mips/rt305x/rt305x_dotg.c	optional dwcotg
-mips/rt305x/rt305x_ehci.c	optional ehci
-mips/rt305x/rt305x_ohci.c	optional ohci
-mips/rt305x/rt305x_spi.c	optional spibus
-mips/rt305x/rt305x_pci.c	optional pci
-mips/mips/intr_machdep.c        standard
-mips/mips/tick.c		standard
-dev/rt/if_rt.c			optional rt
diff --git a/sys/mips/rt305x/obio.c b/sys/mips/rt305x/obio.c
deleted file mode 100644
index 1004a01e963..00000000000
--- a/sys/mips/rt305x/obio.c
+++ /dev/null
@@ -1,634 +0,0 @@
-/*	$NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/obiovar.h>
-#include <mips/rt305x/rt305x_icvar.h>
-
-/* MIPS HW interrupts of IRQ/FIQ respectively */
-#define RT305X_INTR		0
-#define RT305X_FAST_INTR	1
-
-/* Interrupt levels */
-#define INTR_IRQ 0
-#define INTR_FIQ 1
-
-
-int irq_priorities[NIRQS] = {
-	INTR_IRQ,	/* SYSCTL */
-	INTR_FIQ,	/* TIMER0 */
-	INTR_FIQ,	/* WDTIMER */
-	INTR_IRQ,	/* Illegal Access */
-	INTR_IRQ,	/* PCM */
-	INTR_IRQ,	/* UART */
-	INTR_IRQ,	/* GPIO */
-	INTR_FIQ,	/* GDMA */
-	INTR_IRQ,	/* NAND */
-	INTR_IRQ,	/* Perfomance Counter */
-	INTR_IRQ,	/* I2S */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* UARTLITE */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* EtherNet Switch */
-	INTR_FIQ,	/* OTG */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-	INTR_IRQ,	/* unknown */
-};
-
-
-#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(INTCTL_BASE + (o)))
-#define REG_WRITE(o,v) (REG_READ(o)) = (v)
-
-static int	obio_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	obio_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		obio_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	obio_attach(device_t);
-static int	obio_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		obio_get_resource_list(device_t, device_t);
-static void	obio_add_res_child(device_t, const char *, int, long, int, int);
-static void	obio_hinted_child(device_t, const char *, int);
-static int	obio_intr(void *);
-static int	obio_probe(device_t);
-static int	obio_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	obio_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	obio_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-
-static void 
-obio_mask_irq(void *source)
-{
-	int irq;
-	uint32_t irqmask;
-
-	irq = (int)source;
-	irqmask = 1 << irq;
-
-	/* disable IRQ */
-	rt305x_ic_set(IC_INT_DIS, irqmask);
-}
-
-static void 
-obio_unmask_irq(void *source)
-{
-	int irq;
-	uint32_t irqmask;
-
-	irq = (int)source;
-	irqmask = 1 << irq;
-
-	/* enable IRQ */
-	rt305x_ic_set(IC_INT_ENA, irqmask);
-
-}
-
-
-static int
-obio_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->oba_mem_rman.rm_type = RMAN_ARRAY;
-	sc->oba_mem_rman.rm_descr = "OBIO memory";
-	if (rman_init(&sc->oba_mem_rman) != 0 ||
-	    rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START,
-	        OBIO_MEM_END) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, 0, NIRQS-1) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    RT305X_INTR, RT305X_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, obio_intr, NULL,
-	    sc, &sc->sc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* Hook up our FAST interrupt handler. */
-	if ((sc->sc_fast_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-	    RT305X_FAST_INTR, RT305X_FAST_INTR, 1,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_fast_irq, INTR_TYPE_MISC, obio_intr,
-	    NULL, sc, &sc->sc_fast_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* disable all interrupts */
-	rt305x_ic_set(IC_INT_DIS, IC_INT_MASK|IC_LINE_GLOBAL);
-
-	bus_generic_probe(dev);
-
-	obio_add_res_child(dev, "rt305x_sysctl", 0, 
-	    SYSCTL_BASE, (SYSCTL_END - SYSCTL_BASE + 1),
-	    IC_SYSCTL);
-	obio_add_res_child(dev, "rt305x_ic", 0, 
-	    INTCTL_BASE, (INTCTL_END - INTCTL_BASE + 1),
-	    -1);
-#ifdef notyet
-	obio_add_res_child(dev, "timer",0, 
-	    TIMER_BASE, (TIMER_END - TIMER_BASE  + 1),
-	    IC_TIMER0);
-	obio_add_res_child(dev, "rt305x_memc", 0,
-	    MEMCTRL_BASE, (MEMCTRL_END - MEMCTRL_BASE + 1),
-	    -1);
-	obio_add_res_child(dev, "pcm", 	0, 
-	    PCM_BASE, (PCM_END - PCM_BASE  + 1),
-	    IC_PCM);
-#endif
-	obio_add_res_child(dev, "uart", 0, 
-	    UART_BASE, (UART_END - UART_BASE + 1),
-	    IC_UART);
-	obio_add_res_child(dev, "gpio", 0, 
-	    PIO_BASE, (PIO_END - PIO_BASE  + 1),
-	    IC_PIO);
-#ifdef notyet
-	obio_add_res_child(dev, "rt305x_dma", 0,
-	    GDMA_BASE, (GDMA_END - GDMA_BASE + 1),
-	    IC_DMA);
-	obio_add_res_child(dev, "rt305x_nandc", 0,
-	    NANDFC_BASE, (NANDFC_END - NANDFC_BASE  + 1),
-	    IC_NAND);
-	obio_add_res_child(dev, "i2c", 	0,
-	    I2C_BASE, (I2C_END - I2C_BASE  + 1),
-	    -1);
-	obio_add_res_child(dev, "i2s", 0,
-	    I2S_BASE, (I2S_END - I2S_BASE  + 1),
-	    IC_I2S);
-#endif
-	obio_add_res_child(dev, "spi", 0, 
-	    SPI_BASE, (SPI_END - SPI_BASE  + 1),
-	    -1);
-	obio_add_res_child(dev, "uart", 1,
-	    UARTLITE_BASE, (UARTLITE_END - UARTLITE_BASE + 1),
-	    IC_UARTLITE);
-#if !defined(RT5350) && !defined(MT7620)
-	obio_add_res_child(dev, "cfi", 	0,
-	    FLASH_BASE, (FLASH_END - FLASH_BASE  + 1),
-	    -1);
-	obio_add_res_child(dev, "dwcotg", 0,
-	    USB_OTG_BASE, (USB_OTG_END - USB_OTG_BASE  + 1),
-	    IC_OTG);
-#else
-	obio_add_res_child(dev, "ehci", 0,
-	    USB_OTG_BASE, (USB_OTG_END - USB_OTG_BASE  + 1),
-	    IC_OTG);
-	obio_add_res_child(dev, "ohci", 0,
-	    USB_OHCI_BASE, (USB_OHCI_END - USB_OHCI_BASE + 1),
-	    IC_OTG);
-#endif
-	obio_add_res_child(dev, "switch", 0,
-	    ETHSW_BASE, (ETHSW_END - ETHSW_BASE  + 1),
-	    IC_ETHSW);
-
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	/* enable IC */
-	rt305x_ic_set(IC_INT_ENA, IC_LINE_GLOBAL);
-
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct obio_softc		*sc = device_get_softc(bus);
-	struct obio_ivar		*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1);
-	needactivate = flags & RF_ACTIVE;
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL)
-			return (NULL);
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->oba_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/*
-	 * If this is a memory resource, track the direct mapping
-	 * in the uncached MIPS KSEG1 segment.
-	 */
-	if (type == SYS_RES_MEMORY) {
-		void *vaddr;
-
-		vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
-		rman_set_virtual(r, vaddr);
-		rman_set_bustag(r, mips_bus_space_generic);
-		rman_set_bushandle(r, (bus_space_handle_t)vaddr);
-	}
-
-	return (rman_activate_resource(r));
-}
-
-static int
-obio_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-obio_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = obio_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-obio_setup_intr(device_t dev, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, error, priority;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq,
-		    obio_mask_irq, obio_unmask_irq,
-		    NULL, NULL, "obio intr%d:", irq);
-
-		sc->sc_eventstab[irq] = event;
-	}
-	else
-		panic("obio: Can't share IRQs");
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	irqmask = 1 << irq;
-	priority = irq_priorities[irq];
-
-	if (priority == INTR_FIQ)
-		rt305x_ic_set(IC_INTTYPE, rt305x_ic_get(IC_INTTYPE) | irqmask);
-	else
-		rt305x_ic_set(IC_INTTYPE, rt305x_ic_get(IC_INTTYPE) & ~irqmask);
-
-	/* enable */
-	obio_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-obio_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-	int irq, result, priority;
-	uint32_t irqmask;
-
-	irq = rman_get_start(ires);
-	if (irq >= NIRQS)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	irqmask = (1 << irq);
-	priority = irq_priorities[irq];
-
-	if (priority == INTR_FIQ)
-		rt305x_ic_set(IC_INTTYPE, rt305x_ic_get(IC_INTTYPE) & ~irqmask);
-	else
-		rt305x_ic_set(IC_INTTYPE, rt305x_ic_get(IC_INTTYPE) | irqmask);
-
-	/* disable */
-	obio_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result) {
-		sc->sc_eventstab[irq] = NULL;
-	}
-
-	return (result);
-}
-
-static int
-obio_intr(void *arg)
-{
-	struct obio_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t irqstat;
-	int irq;
-
-	irqstat = rt305x_ic_get(IC_IRQ0STAT);
-	irqstat |= rt305x_ic_get(IC_IRQ1STAT);
-
-	irq = 0;
-	while (irqstat != 0) {
-		if ((irqstat & 1) == 1) {
-			event = sc->sc_eventstab[irq];
-			if (!event || TAILQ_EMPTY(&event->ie_handlers))
-				continue;
-
-			/* TODO: pass frame as an argument*/
-			/* TODO: log stray interrupt */
-			intr_event_handle(event, NULL);
-		}
-		irq++;
-		irqstat >>= 1;
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-obio_add_res_child(device_t bus, const char *dname, int dunit, 
-    long maddr, int msize, int irq)
-{
-	device_t		child;
-	int			result;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-	    maddr, msize);
-	if (result != 0)
-		device_printf(bus, "warning: bus_set_resource() failed\n");
-
-	if (irq != -1) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static void
-obio_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	long			maddr;
-	int			msize;
-	int			irq;
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	resource_long_value(dname, dunit, "maddr", &maddr);
-	resource_int_value(dname, dunit, "msize", &msize);
-
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) irq = -1;
-
-	obio_add_res_child(bus, dname, dunit, maddr, msize, irq);
-}
-
-static device_t
-obio_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct obio_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-obio_get_resource_list(device_t dev, device_t child)
-{
-	struct obio_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-static int
-obio_print_all_resources(device_t dev)
-{
-	struct obio_ivar *ivar = device_get_ivars(dev);
-	struct resource_list *rl = &ivar->resources;
-	int retval = 0;
-
-	if (STAILQ_FIRST(rl))
-		retval += printf(" at");
-
-	retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
-	retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
-
-	return (retval);
-}
-
-static int
-obio_print_child(device_t bus, device_t child)
-{
-	int retval = 0;
-
-	retval += bus_print_child_header(bus, child);
-	retval += obio_print_all_resources(child);
-	if (device_get_flags(child))
-		retval += printf(" flags %#x", device_get_flags(child));
-	retval += printf(" on %s\n", device_get_nameunit(bus));
-
-	return (retval);
-}
-
-static device_method_t obio_methods[] = {
-	DEVMETHOD(bus_activate_resource,	obio_activate_resource),
-	DEVMETHOD(bus_add_child,		obio_add_child),
-	DEVMETHOD(bus_alloc_resource,		obio_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	obio_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	obio_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		obio_hinted_child),
-	DEVMETHOD(bus_print_child,		obio_print_child),
-	DEVMETHOD(bus_release_resource,		obio_release_resource),
-	DEVMETHOD(bus_setup_intr,		obio_setup_intr),
-	DEVMETHOD(bus_teardown_intr,		obio_teardown_intr),
-	DEVMETHOD(device_attach,		obio_attach),
-	DEVMETHOD(device_probe,			obio_probe),
-        DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-        DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/rt305x/obiovar.h b/sys/mips/rt305x/obiovar.h
deleted file mode 100644
index 002194af09b..00000000000
--- a/sys/mips/rt305x/obiovar.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _RT305X_OBIOVAR_H_
-#define	_RT305X_OBIOVAR_H_
-
-#include <sys/rman.h>
-
-/* Number of IRQs */
-#define	NIRQS	32
-
-
-struct obio_softc {
-	struct rman		oba_mem_rman;
-	struct rman		oba_irq_rman;
-	struct rman		oba_gpio_rman;
-	struct intr_event	*sc_eventstab[NIRQS]; /* IRQ events structs */
-	struct resource		*sc_irq;	/* IRQ resource */
-	void			*sc_ih;		/* interrupt cookie */
-	struct resource		*sc_fast_irq;	/* IRQ resource */
-	void			*sc_fast_ih;	/* interrupt cookie */
-};
-
-struct obio_ivar {
-	struct resource_list	resources;
-};
-
-#endif /* _RT305X_OBIOVAR_H_ */
diff --git a/sys/mips/rt305x/rt305x_dotg.c b/sys/mips/rt305x/rt305x_dotg.c
deleted file mode 100644
index 73c9a2de755..00000000000
--- a/sys/mips/rt305x/rt305x_dotg.c
+++ /dev/null
@@ -1,233 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/dwc_otg.h>
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-#define	MEM_RID	0
-
-static device_probe_t dotg_obio_probe;
-static device_attach_t dotg_obio_attach;
-static device_detach_t dotg_obio_detach;
-
-static int
-dotg_obio_probe(device_t dev)
-{
-	device_set_desc(dev, "DWC like USB OTG controller");
-	return (0);
-}
-
-static int
-dotg_obio_attach(device_t dev)
-{
-	struct dwc_otg_softc *sc = device_get_softc(dev);
-	uint32_t tmp;
-	int err, rid;
-
-	/* setup controller interface softc */
-
-	/* initialise some bus fields */
-	sc->sc_mode = DWC_MODE_HOST;
-	sc->sc_bus.parent = dev;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(dev), NULL)) {
-		printf("No mem\n");
-		return (ENOMEM);
-	}
-	rid = 0;
-	sc->sc_io_res =
-	    bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (!(sc->sc_io_res)) {
-		printf("Can`t alloc MEM\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &rid, RF_ACTIVE);
-	if (!(sc->sc_irq_res)) {
-		printf("Can`t alloc IRQ\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		printf("Can`t add usbus\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-
-#if (__FreeBSD_version >= 700031)
-	err = bus_setup_intr(dev, sc->sc_irq_res,
-	    INTR_TYPE_TTY | INTR_MPSAFE, dwc_otg_filter_interrupt,
-	    dwc_otg_interrupt, sc, &sc->sc_intr_hdl);
-#else
-	#error error
-	err = bus_setup_intr(dev, sc->sc_irq_res,
-	    INTR_TYPE_BIO | INTR_MPSAFE,(driver_intr_t*)dwc_otg_interrupt,
-	    sc, &sc->sc_intr_hdl);
-#endif
-	if (err) {
-		sc->sc_intr_hdl = NULL;
-		printf("Can`t set IRQ handle\n");
-		goto error;
-	}
-
-	/* Run clock for OTG core */
-	rt305x_sysctl_set(SYSCTL_CLKCFG1, rt305x_sysctl_get(SYSCTL_CLKCFG1) | 
-	    SYSCTL_CLKCFG1_OTG_CLK_EN);
-	tmp = rt305x_sysctl_get(SYSCTL_RSTCTRL);
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, tmp | SYSCTL_RSTCTRL_OTG);
-	DELAY(100);
-	/*
-	 * Docs say that RSTCTRL bits for RT305x are W1C, so there should
-	 * be no need for the below, but who really knows?
-	 */
-//	rt305x_sysctl_set(SYSCTL_RSTCTRL, tmp & ~SYSCTL_RSTCTRL_OTG);
-//	DELAY(100);
-
-	err = dwc_otg_init(sc);
-	if (err) printf("dotg_init fail\n");
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-		if (err) printf("device_probe_and_attach fail %d\n", err);
-	}
-	if (err) {
-		goto error;
-	}
-	return (0);
-
-error:
-	dotg_obio_detach(dev);
-	return (ENXIO);
-}
-
-static int
-dotg_obio_detach(device_t dev)
-{
-	struct dwc_otg_softc *sc = device_get_softc(dev);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call dotg_obio_uninit() after dotg_obio_init()
-		 */
-		dwc_otg_uninit(sc);
-
-		/* Stop OTG clock */
-		rt305x_sysctl_set(SYSCTL_CLKCFG1, 
-		    rt305x_sysctl_get(SYSCTL_CLKCFG1) & 
-		    ~SYSCTL_CLKCFG1_OTG_CLK_EN);
-
-		err = bus_teardown_intr(dev, sc->sc_irq_res,
-		    sc->sc_intr_hdl);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(dev, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, NULL);
-
-	return (0);
-}
-
-static device_method_t dotg_obio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, dotg_obio_probe),
-	DEVMETHOD(device_attach, dotg_obio_attach),
-	DEVMETHOD(device_detach, dotg_obio_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t dotg_obio_driver = {
-	.name = "dwcotg",
-	.methods = dotg_obio_methods,
-	.size = sizeof(struct dwc_otg_softc),
-};
-
-static devclass_t dotg_obio_devclass;
-
-DRIVER_MODULE(dwcotg, obio, dotg_obio_driver, dotg_obio_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_ehci.c b/sys/mips/rt305x/rt305x_ehci.c
deleted file mode 100644
index 0930aff188c..00000000000
--- a/sys/mips/rt305x/rt305x_ehci.c
+++ /dev/null
@@ -1,239 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/ehci.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-#define EHCI_HC_DEVSTR	"Ralink integrated USB 2.0 controller"
-
-static device_probe_t ehci_obio_probe;
-static device_attach_t ehci_obio_attach;
-static device_detach_t ehci_obio_detach;
-
-static int
-ehci_obio_probe(device_t self)
-{
-	device_set_desc(self, EHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-ehci_obio_attach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	uint32_t reg;
-	int err;
-	int rid;
-
-	/* setup controller interface softc */
-	reg = rt305x_sysctl_get(SYSCTL_SYSCFG1);
-	reg |= SYSCTL_SYSCFG1_USB0_HOST_MODE;
-	rt305x_sysctl_set(SYSCTL_SYSCFG1, reg);
-
-	reg = rt305x_sysctl_get(SYSCTL_CLKCFG1);
-	reg |= SYSCTL_CLKCFG1_UPHY0_CLK_EN;
-#ifdef MT7620
-	reg |= SYSCTL_CLKCFG1_UPHY1_CLK_EN;
-#endif
-	rt305x_sysctl_set(SYSCTL_CLKCFG1, reg);
-
-	reg = rt305x_sysctl_get(SYSCTL_RSTCTRL);
-	reg |= SYSCTL_RSTCTRL_UPHY0 | SYSCTL_RSTCTRL_UPHY1;
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, reg);
-	reg &= ~(SYSCTL_RSTCTRL_UPHY0 | SYSCTL_RSTCTRL_UPHY1);
-	DELAY(100000);
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, reg);
-	DELAY(100000);
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
-		printf("No mem\n");
-		return (ENOMEM);
-	}
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-				RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-		RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "Ralink");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-		NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ehci_init(sc);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	ehci_obio_detach(self);
-	return (ENXIO);
-}
-
-static int
-ehci_obio_detach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ehci_detach() after ehci_init()
-		 */
-		ehci_detach(sc);
-
-		/* Stop EHCI clock */
-		rt305x_sysctl_set(SYSCTL_CLKCFG1, 
-		  rt305x_sysctl_get(SYSCTL_CLKCFG1) & 
-		  ~(SYSCTL_CLKCFG1_UPHY0_CLK_EN
-#ifdef MT7620
-		    | SYSCTL_CLKCFG1_UPHY1_CLK_EN
-#endif
-		));
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-				err);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ehci_obio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ehci_obio_probe),
-	DEVMETHOD(device_attach, ehci_obio_attach),
-	DEVMETHOD(device_detach, ehci_obio_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ehci_obio_driver = {
-	.name = "ehci",
-	.methods = ehci_obio_methods,
-	.size = sizeof(ehci_softc_t),
-};
-
-static devclass_t ehci_obio_devclass;
-
-DRIVER_MODULE(ehci, obio, ehci_obio_driver, ehci_obio_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_gpio.c b/sys/mips/rt305x/rt305x_gpio.c
deleted file mode 100644
index 326dfcc39d3..00000000000
--- a/sys/mips/rt305x/rt305x_gpio.c
+++ /dev/null
@@ -1,628 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010-2011, Aleksandr Rybalko <ray@ddteam.net>
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2009, Luiz Otavio O Souza. 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * GPIO driver for RT305X SoC.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_gpio.h>
-#include <mips/rt305x/rt305x_gpiovar.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-#include <dev/gpio/gpiobusvar.h>
-
-#include "gpio_if.h"
-
-#ifdef	notyet
-#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_INVIN | \
- 		         GPIO_PIN_INVOUT | GPIO_PIN_REPORT )
-#else
-#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_INVIN | \
- 		         GPIO_PIN_INVOUT )
-#endif
-
-/*
- * Helpers
- */
-static void rt305x_gpio_pin_configure(struct rt305x_gpio_softc *sc, 
-    struct gpio_pin *pin, uint32_t flags);
-
-/*
- * Driver stuff
- */
-static int rt305x_gpio_probe(device_t dev);
-static int rt305x_gpio_attach(device_t dev);
-static int rt305x_gpio_detach(device_t dev);
-static int rt305x_gpio_intr(void *arg);
-
-int 	rt305x_get_int_mask  (device_t);
-void 	rt305x_set_int_mask  (device_t, uint32_t);
-int 	rt305x_get_int_status(device_t);
-void 	rt305x_set_int_status(device_t, uint32_t);
-
-/*
- * GPIO interface
- */
-static device_t rt305x_gpio_get_bus(device_t);
-static int rt305x_gpio_pin_max(device_t dev, int *maxpin);
-static int rt305x_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
-static int rt305x_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
-    *flags);
-static int rt305x_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
-static int rt305x_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
-static int rt305x_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
-static int rt305x_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
-static int rt305x_gpio_pin_toggle(device_t dev, uint32_t pin);
-
-static void
-rt305x_gpio_pin_configure(struct rt305x_gpio_softc *sc, struct gpio_pin *pin,
-    unsigned int flags)
-{
-	GPIO_LOCK(sc);
-
-	/*
-	 * Manage input/output
-	 */
-	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
-		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
-		if (flags & GPIO_PIN_OUTPUT) {
-			pin->gp_flags |= GPIO_PIN_OUTPUT;
-			GPIO_BIT_SET(sc, pin->gp_pin, DIR);
-		}
-		else {
-			pin->gp_flags |= GPIO_PIN_INPUT;
-			GPIO_BIT_CLR(sc, pin->gp_pin, DIR);
-		}
-	}
-
-	if (flags & GPIO_PIN_INVOUT) {
-		pin->gp_flags |= GPIO_PIN_INVOUT;
-		GPIO_BIT_SET(sc, pin->gp_pin, POL);
-	}
-	else {
-		pin->gp_flags &= ~GPIO_PIN_INVOUT;
-		GPIO_BIT_CLR(sc, pin->gp_pin, POL);
-	}
-
-	if (flags & GPIO_PIN_INVIN) {
-		pin->gp_flags |= GPIO_PIN_INVIN;
-		GPIO_BIT_SET(sc, pin->gp_pin, POL);
-	}
-	else {
-		pin->gp_flags &= ~GPIO_PIN_INVIN;
-		GPIO_BIT_CLR(sc, pin->gp_pin, POL);
-	}
-
-#ifdef	notyet
-	/* Enable interrupt bits for rising/falling transitions */
-	if (flags & GPIO_PIN_REPORT) {
-		pin->gp_flags |= GPIO_PIN_REPORT;
-		GPIO_BIT_SET(sc, pin->gp_pin, RENA);
-		GPIO_BIT_SET(sc, pin->gp_pin, FENA);
-		device_printf(sc->dev, "Will report interrupt on pin %d\n", 
-		    pin->gp_pin);
-
-	}
-	else {
-		pin->gp_flags &= ~GPIO_PIN_REPORT;
-		GPIO_BIT_CLR(sc, pin->gp_pin, RENA);
-		GPIO_BIT_CLR(sc, pin->gp_pin, FENA);
-	}
-#else
-	/* Disable generating interrupts for now */
-	GPIO_BIT_CLR(sc, pin->gp_pin, RENA);
-	GPIO_BIT_CLR(sc, pin->gp_pin, FENA);
-#endif
-
-	GPIO_UNLOCK(sc);
-}
-
-static device_t
-rt305x_gpio_get_bus(device_t dev)
-{
-	struct rt305x_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-rt305x_gpio_pin_max(device_t dev, int *maxpin)
-{
-
-	*maxpin = NGPIO - 1;
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*caps = sc->gpio_pins[i].gp_caps;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*flags = sc->gpio_pins[i].gp_flags;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	int i;
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	rt305x_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-
-	GPIO_LOCK(sc);
-	if (value) GPIO_BIT_SET(sc, i, DATA);
-	else       GPIO_BIT_CLR(sc, i, DATA);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*val = GPIO_BIT_GET(sc, i, DATA);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	int i;
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	GPIO_BIT_SET(sc, i, TOG);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-rt305x_gpio_intr(void *arg)
-{
-	struct rt305x_gpio_softc *sc = arg;
-#ifdef	notyet
-	uint32_t i;
-#endif
-	uint64_t input, value;
-#ifdef	notyet
-	uint64_t reset_pin;
-	char notify[16];
-	char pinname[6];
-#endif
-
-	/* Read all reported pins */
-	input  = GPIO_READ_ALL(sc, INT);
-	/* Clear int status */
-	GPIO_WRITE_ALL(sc, INT, input);
-	/* Clear report for OUTs */
-	input &= ~GPIO_READ_ALL(sc, DIR);
-	value = input & GPIO_READ_ALL(sc, DATA);
-
-	if (!input) goto intr_done;
-
-#ifdef	notyet
-	/* if reset_gpio and this pin is input */
-	if (sc->reset_gpio >= 0  && (input & (1 << sc->reset_gpio))) {
-		/* get reset_gpio pin value */
-		reset_pin = (value & (1 << sc->reset_gpio))?1:0;
-		if ( sc->reset_gpio_last != reset_pin )	{
-			/*
-			 * if now reset is high, check how long
-			 * and do reset if less than 2 seconds
-			 */
-			if ( reset_pin && 
-			    (time_uptime - sc->reset_gpio_ontime) < 2 )
-				shutdown_nice(0);
-
-			sc->reset_gpio_last = reset_pin;
-			sc->reset_gpio_ontime = time_uptime;
-		}
-	}
-
-	for ( i = 0; i < NGPIO; i ++ )
-	{
-		/* Next if output pin */
-		if ( !(( input >> i) & 1) ) continue;
-
-		if ( (((value & input) >> i) & 1) != sc->gpio_pins[i].gp_last )
-		{
-			/* !system=GPIO subsystem=pin7 type=PIN_HIGH period=3 */
-			snprintf(notify , sizeof(notify ), "period=%d", 
-			    (uint32_t)time_uptime - sc->gpio_pins[i].gp_time);
-			snprintf(pinname, sizeof(pinname), "pin%02d", i);
-			devctl_notify("GPIO", pinname, 
-			    (((value & input) >> i) & 1)?"PIN_HIGH":"PIN_LOW", 
-			    notify);
-			printf("GPIO[%s] %s %s\n", pinname, 
-			    (((value & input) >> i) & 1)?"PIN_HIGH":"PIN_LOW", 
-			    notify);
-			sc->gpio_pins[i].gp_last = ((value & input) >> i) & 1;
-			sc->gpio_pins[i].gp_time = time_uptime;
-		}
-
-	}
-#endif
-
-intr_done:
-	return (FILTER_HANDLED);
-}
-
-static int
-rt305x_gpio_probe(device_t dev)
-{
-	device_set_desc(dev, "RT305X GPIO driver");
-	return (0);
-}
-
-static uint64_t
-rt305x_gpio_init(device_t dev)
-{
-	uint64_t avl = ~0ULL;
-	uint32_t gmode = rt305x_sysctl_get(SYSCTL_GPIOMODE);
-	if (!(gmode & SYSCTL_GPIOMODE_RGMII_GPIO_MODE))
-		avl &= ~RGMII_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_SDRAM_GPIO_MODE))
-		avl &= ~SDRAM_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_MDIO_GPIO_MODE))
-		avl &= ~MDIO_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_JTAG_GPIO_MODE))
-		avl &= ~JTAG_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_UARTL_GPIO_MODE))
-		avl &= ~UARTL_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_SPI_GPIO_MODE))
-		avl &= ~SPI_GPIO_MODE_MASK;
-	if (!(gmode & SYSCTL_GPIOMODE_I2C_GPIO_MODE))
-		avl &= ~I2C_GPIO_MODE_MASK;
-	if ((gmode & SYSCTL_GPIOMODE_UARTF_SHARE_MODE_GPIO) != 
-	    SYSCTL_GPIOMODE_UARTF_SHARE_MODE_GPIO)
-		avl &= ~I2C_GPIO_MODE_MASK;
-/* D-Link DAP-1350 Board have
- * MDIO_GPIO_MODE
- * UARTF_GPIO_MODE
- * SPI_GPIO_MODE
- * I2C_GPIO_MODE
- * So we have 
- * 00000001 10000000 01111111 11111110
-*/
-	return (avl);
-
-}
-
-#define DAP1350_RESET_GPIO	10
-
-static int
-rt305x_gpio_attach(device_t dev)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-	int i;
-	uint64_t avlpins = 0;
-	sc->reset_gpio = DAP1350_RESET_GPIO;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("rt305x_gpio_gpio: Only one gpio module supported"));
-
-	mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
-
-	/* Map control/status registers. */
-	sc->gpio_mem_rid = 0;
-	sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->gpio_mem_rid, RF_ACTIVE);
-
-	if (sc->gpio_mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		rt305x_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		rt305x_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 
-	    /* rt305x_gpio_filter, */
-	    rt305x_gpio_intr, NULL, sc, &sc->gpio_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		rt305x_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	sc->dev = dev;
-	avlpins = rt305x_gpio_init(dev);
-
-	/* Configure all pins as input */
-	/* disable interrupts for all pins */
-	/* TODO */
-
-	sc->gpio_npins = NGPIO;
-	resource_int_value(device_get_name(dev), device_get_unit(dev), 
-	    "pins", &sc->gpio_npins);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
- 		sc->gpio_pins[i].gp_pin = i;
- 		sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
- 		sc->gpio_pins[i].gp_flags = 0;
-	}
-
-	/* Setup reset pin interrupt */
-	if (TUNABLE_INT_FETCH("reset_gpio", &sc->reset_gpio)) {
-		device_printf(dev, "\tHinted reset_gpio %d\n", sc->reset_gpio);
-	}
-#ifdef	notyet
-	if (sc->reset_gpio != -1) {
-		rt305x_gpio_pin_setflags(dev, sc->reset_gpio, 
-		    GPIO_PIN_INPUT|GPIO_PIN_INVOUT|
-		    GPIO_PIN_INVOUT|GPIO_PIN_REPORT);
-		device_printf(dev, "\tUse reset_gpio %d\n", sc->reset_gpio);
-	}
-#else
-	if (sc->reset_gpio != -1) {
-		rt305x_gpio_pin_setflags(dev, sc->reset_gpio, 
-		    GPIO_PIN_INPUT|GPIO_PIN_INVOUT);
-		device_printf(dev, "\tUse reset_gpio %d\n", sc->reset_gpio);
-	}
-#endif
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL) {
-		rt305x_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-rt305x_gpio_detach(device_t dev)
-{
-	struct rt305x_gpio_softc *sc = device_get_softc(dev);
-
-	KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
-
-	gpiobus_detach_bus(dev);
-	if (sc->gpio_ih)
-		bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
-	if (sc->gpio_irq_res)
-		bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
-		    sc->gpio_irq_res);
-	if (sc->gpio_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
-		    sc->gpio_mem_res);
-	mtx_destroy(&sc->gpio_mtx);
-
-	return(0);
-}
-
-#ifdef notyet
-static struct resource *
-rt305x_gpio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct obio_softc		*sc = device_get_softc(bus);
-	struct resource			*rv;
-	struct rman			*rm;
-
-	switch (type) {
-	case SYS_RES_GPIO:
-		rm = &sc->gpio_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	return (rv);
-}
-
-static int
-rt305x_gpio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	return (rman_activate_resource(r));
-}
-
-static int
-rt305x_gpio_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-rt305x_gpio_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	rman_release_resource(r);
-	return (0);
-}
-#endif
-
-static device_method_t rt305x_gpio_methods[] = {
-	DEVMETHOD(device_probe,		rt305x_gpio_probe),
-	DEVMETHOD(device_attach,	rt305x_gpio_attach),
-	DEVMETHOD(device_detach,	rt305x_gpio_detach),
-
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus,		rt305x_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max,		rt305x_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname,	rt305x_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags,	rt305x_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps,	rt305x_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags,	rt305x_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get,		rt305x_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set,		rt305x_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle,	rt305x_gpio_pin_toggle),
-	{0, 0},
-};
-
-static driver_t rt305x_gpio_driver = {
-	"gpio",
-	rt305x_gpio_methods,
-	sizeof(struct rt305x_gpio_softc),
-};
-static devclass_t rt305x_gpio_devclass;
-
-DRIVER_MODULE(rt305x_gpio, obio, rt305x_gpio_driver, 
-    rt305x_gpio_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_gpio.h b/sys/mips/rt305x/rt305x_gpio.h
deleted file mode 100644
index 45d50726f3a..00000000000
--- a/sys/mips/rt305x/rt305x_gpio.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _RT305X_GPIO_H_
-#define _RT305X_GPIO_H_
-
-#define NGPIO			52
-
-#define RGMII_GPIO_MODE_MASK	(0x0fffULL<<40)
-#define SDRAM_GPIO_MODE_MASK  	(0xffffULL<<24)
-#define MDIO_GPIO_MODE_MASK   	(0x0003ULL<<22)
-#define JTAG_GPIO_MODE_MASK   	(0x001fULL<<17)
-#define UARTL_GPIO_MODE_MASK  	(0x0003ULL<<15)
-#define UARTF_GPIO_MODE_MASK  	(0x00ffULL<<7)
-#define SPI_GPIO_MODE_MASK    	(0x000fULL<<3)
-#define I2C_GPIO_MODE_MASK    	(0x0003ULL<<1)
-
-#define GPIO23_00_INT		0x00 /* Programmed I/O Int Status */
-#define GPIO23_00_EDGE		0x04 /* Programmed I/O Edge Status */
-#define GPIO23_00_RENA		0x08 /* Programmed I/O Int on Rising */
-#define GPIO23_00_FENA		0x0C /* Programmed I/O Int on Falling */
-#define GPIO23_00_DATA		0x20 /* Programmed I/O Data */
-#define GPIO23_00_DIR		0x24 /* Programmed I/O Direction */
-#define GPIO23_00_POL		0x28 /* Programmed I/O Pin Polarity */
-#define GPIO23_00_SET		0x2C /* Set PIO Data Bit */
-#define GPIO23_00_RESET		0x30 /* Clear PIO Data bit */
-#define GPIO23_00_TOG		0x34 /* Toggle PIO Data bit */
-
-#define GPIO39_24_INT		0x38
-#define GPIO39_24_EDGE		0x3c
-#define GPIO39_24_RENA		0x40
-#define GPIO39_24_FENA		0x44
-#define GPIO39_24_DATA		0x48
-#define GPIO39_24_DIR		0x4c
-#define GPIO39_24_POL		0x50
-#define GPIO39_24_SET		0x54
-#define GPIO39_24_RESET		0x58
-#define GPIO39_24_TOG		0x5c
-
-#define GPIO51_40_INT		0x60
-#define GPIO51_40_EDGE		0x64
-#define GPIO51_40_RENA		0x68
-#define GPIO51_40_FENA		0x6C
-#define GPIO51_40_DATA		0x70
-#define GPIO51_40_DIR		0x74
-#define GPIO51_40_POL		0x78
-#define GPIO51_40_SET		0x7C
-#define GPIO51_40_RESET		0x80
-#define GPIO51_40_TOG		0x84
-
-#define GPIO_REG(g, n)							\
-	((g<24)?(GPIO23_00_##n):(g<40)?(GPIO39_24_##n):(GPIO51_40_##n))
-#define GPIO_MASK(g)							\
-	((g<24)?(1<<g):(g<40)?(1<<(g-24)):(1<<(g-40)))
-#define GPIO_BIT_SHIFT(g)	((g<24)?(g):(g<40)?(g-24):(g-40))
-
-#define GPIO_READ(r, g, n) 						\
-	bus_read_4(r->gpio_mem_res, GPIO_REG(g, n))
-#define GPIO_WRITE(r, g, n, v) 						\
-	bus_write_4(r->gpio_mem_res, GPIO_REG(g, n), v)
-#define GPIO_READ_ALL(r, n) 						\
-	(((uint64_t)bus_read_4(r->gpio_mem_res, GPIO23_00_##n)) |	\
-	(((uint64_t)bus_read_4(r->gpio_mem_res, GPIO39_24_##n)) << 24) |\
-	(((uint64_t)bus_read_4(r->gpio_mem_res, GPIO51_40_##n)) << 40))
-#define GPIO_WRITE_ALL(r, n, v) 					\
-	{bus_write_4(r->gpio_mem_res,GPIO23_00_##n, v      &0x00ffffff);\
-	bus_write_4(r->gpio_mem_res, GPIO39_24_##n, (v>>24)&0x0000ffff);\
-	bus_write_4(r->gpio_mem_res, GPIO51_40_##n, (v>>40)&0x00000fff);}
-
-
-#define GPIO_BIT_CLR(r, g, n) 						\
-	bus_write_4(r->gpio_mem_res, GPIO_REG(g, n), 			\
-	    bus_read_4(r->gpio_mem_res, GPIO_REG(g, n)) & ~GPIO_MASK(g))
-#define GPIO_BIT_SET(r, g, n) 						\
-	bus_write_4(r->gpio_mem_res, GPIO_REG(g, n), 			\
-	    bus_read_4(r->gpio_mem_res, GPIO_REG(g, n)) | GPIO_MASK(g))
-
-#define GPIO_BIT_GET(r, g, n)						\
-	((bus_read_4(r->gpio_mem_res, GPIO_REG(g, n)) >> 		\
-	    GPIO_BIT_SHIFT(g)) & 1)
-
-#define GPIO_LOCK(_sc)		mtx_lock(&(_sc)->gpio_mtx)
-#define GPIO_UNLOCK(_sc)	mtx_unlock(&(_sc)->gpio_mtx)
-#define GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
-
-#endif /* _RT305X_GPIO_H_ */
-
diff --git a/sys/mips/rt305x/rt305x_gpiovar.h b/sys/mips/rt305x/rt305x_gpiovar.h
deleted file mode 100644
index 0eab1a7e0f3..00000000000
--- a/sys/mips/rt305x/rt305x_gpiovar.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _RT305X_GPIOVAR_H_
-#define _RT305X_GPIOVAR_H_
-
-struct rt305x_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct mtx		gpio_mtx;
-	struct resource		*gpio_mem_res;
-	int			gpio_mem_rid;
-	struct resource		*gpio_irq_res;
-	int			gpio_irq_rid;
-	void			*gpio_ih;
-	int			gpio_npins;
-	struct gpio_pin		gpio_pins[NGPIO];
-	int			reset_gpio;
-	int			reset_gpio_last;
-	time_t			reset_gpio_ontime;
-};
-
-#endif /* _RT305X_GPIOVAR_H_ */
-
-
diff --git a/sys/mips/rt305x/rt305x_ic.c b/sys/mips/rt305x/rt305x_ic.c
deleted file mode 100644
index 28f61c9b96c..00000000000
--- a/sys/mips/rt305x/rt305x_ic.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_icvar.h>
-
-
-static int	rt305x_ic_probe(device_t);
-static int	rt305x_ic_attach(device_t);
-static int	rt305x_ic_detach(device_t);
-
-
-static struct rt305x_ic_softc *rt305x_ic_softc = NULL;
-
-static int
-rt305x_ic_probe(device_t dev)
-{
-	device_set_desc(dev, "RT305X Interrupt Controller driver");
-	return (0);
-}
-
-static int
-rt305x_ic_attach(device_t dev)
-{
-	struct rt305x_ic_softc *sc = device_get_softc(dev);
-	int error = 0;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("rt305x_ic: Only one Interrupt Controller module supported"));
-
-	if (rt305x_ic_softc != NULL)
-		return (ENXIO);
-	rt305x_ic_softc = sc;
-
-
-	/* Map control/status registers. */
-	sc->mem_rid = 0;
-	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->mem_rid, RF_ACTIVE);
-
-	if (sc->mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		rt305x_ic_detach(dev);
-		return(error);
-	}
-	return (bus_generic_attach(dev));
-}
-
-static int
-rt305x_ic_detach(device_t dev)
-{
-	struct rt305x_ic_softc *sc = device_get_softc(dev);
-
-	bus_generic_detach(dev);
-
-	if (sc->mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
-		    sc->mem_res);
-	return(0);
-}
-
-
-uint32_t
-rt305x_ic_get(uint32_t reg)
-{
-	struct rt305x_ic_softc *sc = rt305x_ic_softc;
-
-	if (!sc)
-		return (0);
-
-	return (bus_read_4(sc->mem_res, reg));
-}
-
-void
-rt305x_ic_set(uint32_t reg, uint32_t val)
-{
-	struct rt305x_ic_softc *sc = rt305x_ic_softc;
-
-	if (!sc)
-		return;
-
-	bus_write_4(sc->mem_res, reg, val);
-
-	return;
-}
-
-
-static device_method_t rt305x_ic_methods[] = {
-	DEVMETHOD(device_probe,			rt305x_ic_probe),
-	DEVMETHOD(device_attach,		rt305x_ic_attach),
-	DEVMETHOD(device_detach,		rt305x_ic_detach),
-
-	{0, 0},
-};
-
-static driver_t rt305x_ic_driver = {
-	"rt305x_ic",
-	rt305x_ic_methods,
-	sizeof(struct rt305x_ic_softc),
-};
-static devclass_t rt305x_ic_devclass;
-
-DRIVER_MODULE(rt305x_ic, obio, rt305x_ic_driver, rt305x_ic_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_icvar.h b/sys/mips/rt305x/rt305x_icvar.h
deleted file mode 100644
index 4dcc88f8905..00000000000
--- a/sys/mips/rt305x/rt305x_icvar.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _RT305X_ICVAR_H_
-#define _RT305X_ICVAR_H_
-
-struct rt305x_ic_softc {
-	device_t		dev;
-	struct resource		*mem_res;
-	int			mem_rid;
-};
-
-
-uint32_t rt305x_ic_get(uint32_t);
-void	rt305x_ic_set(uint32_t, uint32_t);
-
-#endif /* _RT305X_ICVAR_H_ */
-
diff --git a/sys/mips/rt305x/rt305x_machdep.c b/sys/mips/rt305x/rt305x_machdep.c
deleted file mode 100644
index f1b0b2c615a..00000000000
--- a/sys/mips/rt305x/rt305x_machdep.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (C) 2010-2011 by Aleksandr Rybalko. All rights reserved.
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-extern int	*edata;
-extern int	*end;
-static char 	boot1_env[0x1000];
-
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	int i;
-	char *memsize;
-
-	printf("entry: mips_init()\n");
-
-	if ((memsize = kern_getenv("memsize")) != NULL)
-		realmem = btoc(strtol(memsize, NULL, 0) << 20);
-	else
-		realmem = btoc(32 << 20);
-	
-
-	bootverbose = 1;
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* phys_avail regions are in bytes */
-	dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	dump_avail[1] = phys_avail[1] = ctob(realmem);
-
-	physmem = realmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
-
-#if !defined(MT7620) && !defined(RT5350)
-	__asm __volatile("li	$25, 0xbf000000");
-	__asm __volatile("j	$25");
-#else
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, 1);
-	while (1);
-#endif
-}
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	vm_offset_t kernend;
-	uint64_t platform_counter_freq = PLATFORM_COUNTER_FREQ;
-	int i;
-	int argc = a0;
-	char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1);
-	char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2);
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	mips_timer_early_init(platform_counter_freq / 2);
-
-	/* initialize console so that we have printf */
-	boothowto |= (RB_SERIAL | RB_MULTIPLE);	/* Use multiple consoles */
-	boothowto |= (RB_VERBOSE);
-	cninit();
-
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-
-	printf("U-Boot args (from %d args):\n", argc - 1);
-
-	if (argc == 1)
-		printf("\tNone\n");
-
-	for (i = 1; i < argc; i++) {
-		char *n = "argv  ", *arg;
-
-		if (i > 99)
-			break;
-
-		if (argv[i])
-		{
-			arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]);
-			printf("\targv[%d] = %s\n", i, arg);
-			sprintf(n, "argv%d", i);
-			kern_setenv(n, arg);
-		}
-	}
-
-	printf("Environment:\n");
-
-	for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) {
-		char *n, *arg;
-
-		arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
-		if (! MIPS_IS_VALID_PTR(arg))
-			continue;
-		printf("\t%s\n", arg);
-		n = strsep(&arg, "=");
-		if (arg == NULL)
-			kern_setenv(n, "1");
-		else
-			kern_setenv(n, arg);
-	}
-
-
-	mips_init();
-	mips_timer_init_params(platform_counter_freq, 1);
-}
diff --git a/sys/mips/rt305x/rt305x_ohci.c b/sys/mips/rt305x/rt305x_ohci.c
deleted file mode 100644
index b7006033f51..00000000000
--- a/sys/mips/rt305x/rt305x_ohci.c
+++ /dev/null
@@ -1,239 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/ohci.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-#define OHCI_HC_DEVSTR	"Ralink integrated USB controller"
-
-static device_probe_t ohci_obio_probe;
-static device_attach_t ohci_obio_attach;
-static device_detach_t ohci_obio_detach;
-
-static int
-ohci_obio_probe(device_t self)
-{
-	device_set_desc(self, OHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-ohci_obio_attach(device_t self)
-{
-	ohci_softc_t *sc = device_get_softc(self);
-	uint32_t reg;
-	int err;
-	int rid;
-
-	/* setup controller interface softc */
-	reg = rt305x_sysctl_get(SYSCTL_SYSCFG1);
-	reg |= SYSCTL_SYSCFG1_USB0_HOST_MODE;
-	rt305x_sysctl_set(SYSCTL_SYSCFG1, reg);
-
-	reg = rt305x_sysctl_get(SYSCTL_CLKCFG1);
-	reg |= SYSCTL_CLKCFG1_UPHY0_CLK_EN;
-#ifdef MT7620
-	reg |= SYSCTL_CLKCFG1_UPHY1_CLK_EN;
-#endif
-	rt305x_sysctl_set(SYSCTL_CLKCFG1, reg);
-
-	reg = rt305x_sysctl_get(SYSCTL_RSTCTRL);
-	reg |= SYSCTL_RSTCTRL_UPHY0 | SYSCTL_RSTCTRL_UPHY1;
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, reg);
-	reg &= ~(SYSCTL_RSTCTRL_UPHY0 | SYSCTL_RSTCTRL_UPHY1);
-	DELAY(100000);
-	rt305x_sysctl_set(SYSCTL_RSTCTRL, reg);
-	DELAY(100000);
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ohci_iterate_hw_softc)) {
-		printf("No mem\n");
-		return (ENOMEM);
-	}
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-				RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-		RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, OHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "Ralink");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-		NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ohci_init(sc);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	ohci_obio_detach(self);
-	return (ENXIO);
-}
-
-static int
-ohci_obio_detach(device_t self)
-{
-	ohci_softc_t *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ohci_detach() after ohci_init()
-		 */
-		ohci_detach(sc);
-
-		/* Stop OHCI clock */
-		rt305x_sysctl_set(SYSCTL_CLKCFG1, 
-		  rt305x_sysctl_get(SYSCTL_CLKCFG1) & 
-		  ~(SYSCTL_CLKCFG1_UPHY0_CLK_EN
-#ifdef MT7620
-		    | SYSCTL_CLKCFG1_UPHY1_CLK_EN
-#endif
-		));
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-				err);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ohci_obio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ohci_obio_probe),
-	DEVMETHOD(device_attach, ohci_obio_attach),
-	DEVMETHOD(device_detach, ohci_obio_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ohci_obio_driver = {
-	.name = "ohci",
-	.methods = ohci_obio_methods,
-	.size = sizeof(ohci_softc_t),
-};
-
-static devclass_t ohci_obio_devclass;
-
-DRIVER_MODULE(ohci, obio, ohci_obio_driver, ohci_obio_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_pci.c b/sys/mips/rt305x/rt305x_pci.c
deleted file mode 100644
index af39ac01659..00000000000
--- a/sys/mips/rt305x/rt305x_pci.c
+++ /dev/null
@@ -1,955 +0,0 @@
-/*-
- * Copyright (c) 2015 Stanislav Galabov.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * This is based on the pci allocator code from sys/dev/arm/mv/:
- *
- * Copyright (c) 2008 MARVELL INTERNATIONAL LTD.
- * Copyright (c) 2010 The FreeBSD Foundation
- * Copyright (c) 2010-2012 Semihalf
- * All rights reserved.
- *
- * Developed by Semihalf.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/endian.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_pcireg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-struct mtx rt305x_pci_mtx;
-MTX_SYSINIT(rt305x_pci_mtx, &rt305x_pci_mtx, "rt305x PCI/PCIe mutex", MTX_SPIN);
-
-struct rt305x_pci_softc {
-	device_t		sc_dev;
-
-	bus_space_tag_t		sc_bst;
-	bus_space_handle_t	sc_bsh;
-
-	int			sc_busno;
-
-	struct rman		sc_mem_rman;
-	struct rman		sc_io_rman;
-	struct rman		sc_irq_rman;
-
-	bus_addr_t		sc_mem_base;
-	bus_addr_t		sc_mem_size;
-	uint32_t		sc_mem_map[(256*1024*1024) /
-				(PCI_MIN_MEM_ALLOC * BITS_PER_UINT32)];
-
-	bus_addr_t		sc_io_base;
-	bus_addr_t		sc_io_size;
-	uint32_t		sc_io_map[(16*1024*1024) /
-				(PCI_MIN_IO_ALLOC * BITS_PER_UINT32)];
-
-	struct intr_event	*sc_eventstab[RT305X_PCI_NIRQS];
-	mips_intrcnt_t		sc_intr_counter[RT305X_PCI_NIRQS];
-
-	int			pcie_link_status;
-};
-
-static void rt305x_pci_phy_init(device_t);
-static void rt305x_pci_init(device_t);
-static int rt305x_pcib_init(device_t, int, int);
-static int rt305x_pci_intr(void *);
-
-static void rt305x_pci_dump_regs(device_t);
-
-static struct rt305x_pci_softc *rt_sc = NULL;
-
-static int
-rt305x_pci_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-rt305x_pci_attach(device_t dev)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-
-	rt_sc = sc;
-
-	sc->sc_dev = dev;
-	sc->sc_mem_base = PCIE_MEM_BASE;
-	sc->sc_mem_size = 0x10000000;
-	sc->sc_io_base = PCIE_IO_BASE;
-	sc->sc_io_size = 0x10000;
-
-	sc->sc_bsh = MIPS_PHYS_TO_KSEG1(PCIE_BASE);
-	sc->sc_bst = mips_bus_space_generic;
-
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "rt305x pci memory window";
-	if (rman_init(&sc->sc_mem_rman) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman, sc->sc_mem_base,
-		sc->sc_mem_base + sc->sc_mem_size - 1) != 0) {
-		panic("%s: failed to set up memory rman", __FUNCTION__);
-	}
-
-	sc->sc_io_rman.rm_type = RMAN_ARRAY;
-	sc->sc_io_rman.rm_descr = "rt305x pci io window";
-	if (rman_init(&sc->sc_io_rman) != 0 ||
-	    rman_manage_region(&sc->sc_io_rman, sc->sc_io_base,
-		sc->sc_io_base + sc->sc_io_size - 1) != 0) {
-		panic("%s: failed to set up io rman", __FUNCTION__);
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "rt305x pci irqs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, RT305X_PCIE0_IRQ,
-		RT305X_PCIE0_IRQ) != 0) {
-		panic("%s: failed to set up irq rman", __FUNCTION__);
-	}
-
-	cpu_establish_hardintr("pci", rt305x_pci_intr, NULL, sc,
-		RT305X_PCI_INTR_PIN, INTR_TYPE_MISC | INTR_EXCL, NULL);
-
-	rt305x_pci_phy_init(dev);
-
-	rt305x_pci_init(dev);
-
-	rt305x_pci_dump_regs(dev);
-
-	rt305x_pcib_init(dev, 0, PCI_SLOTMAX);
-
-	device_add_child(dev, "pci", -1);
-
-	return (bus_generic_attach(dev));
-}
-
-static int
-rt305x_pci_read_ivar(device_t dev, device_t child, int which,
-	uintptr_t *result)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = device_get_unit(dev);
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-rt305x_pci_write_ivar(device_t dev, device_t child, int which,
-	uintptr_t result)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static struct resource *
-rt305x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-	rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(bus);
-	struct resource *rv;
-	struct rman *rm;
-	vm_offset_t va;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if (type != SYS_RES_IRQ) {
-		if (type == SYS_RES_MEMORY) {
-			va = (vm_offset_t)pmap_mapdev(start, count);
-		} else if (type == SYS_RES_IOPORT){
-			va = (vm_offset_t)MIPS_PHYS_TO_KSEG1(start);
-		}
-		rman_set_bushandle(rv, va);
-		rman_set_virtual(rv, (void *)va);
-		rman_set_bustag(rv, mips_bus_space_generic);
-	}
-
-	if (flags & RF_ACTIVE) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-rt305x_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-	struct resource *r)
-{
-
-	return rman_activate_resource(r);
-}
-
-static inline int
-rt305x_idx_to_irq(int idx)
-{
-
-	return ((idx == 0) ? RT305X_PCIE0_IRQ :
-		(idx == 1) ? RT305X_PCIE1_IRQ :
-		(idx == 2) ? RT305X_PCIE2_IRQ : -1);
-}
-
-static inline int
-rt305x_irq_to_idx(int irq)
-{
-
-	return ((irq == RT305X_PCIE0_IRQ) ? 0 :
-		(irq == RT305X_PCIE1_IRQ) ? 1 :
-		(irq == RT305X_PCIE2_IRQ) ? 2 : -1);
-}
-
-static void
-rt305x_pci_mask_irq(void *source)
-{
-
-	RT_WRITE32(rt_sc, RT305X_PCI_PCIENA,
-		RT_READ32(rt_sc, RT305X_PCI_PCIENA) & ~(1<<((int)source)));
-}
-
-static void
-rt305x_pci_unmask_irq(void *source)
-{
-
-	RT_WRITE32(rt_sc, RT305X_PCI_PCIENA,
-		RT_READ32(rt_sc, RT305X_PCI_PCIENA) | (1<<((int)source)));
-}
-
-static int
-rt305x_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
-	int flags, driver_filter_t *filt, driver_intr_t *handler,
-	void *arg, void **cookiep)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error, irqidx;
-
-	irq = rman_get_start(ires);
-
-	if ((irqidx = rt305x_irq_to_idx(irq)) == -1)
-		panic("%s: bad irq %d", __FUNCTION__, irq);
-
-	event = sc->sc_eventstab[irqidx];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq,
-		    rt305x_pci_mask_irq, rt305x_pci_unmask_irq, NULL, NULL,
-		    "pci intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irqidx] = event;
-			sc->sc_intr_counter[irqidx] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return (error);
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-		handler, arg, intr_priority(flags), flags, cookiep);
-
-	mips_intrcnt_setname(sc->sc_intr_counter[irqidx], event->ie_fullname);
-
-	rt305x_pci_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-rt305x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires,
-	void *cookie)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	int irq, result, irqidx;
-
-	irq = rman_get_start(ires);
-	if ((irqidx = rt305x_irq_to_idx(irq)) == -1)
-		panic("%s: bad irq %d", __FUNCTION__, irq);
-
-	if (sc->sc_eventstab[irqidx] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	rt305x_pci_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irqidx] = NULL;
-
-	return (result);
-}
-
-static inline uint32_t
-rt305x_pci_make_addr(int bus, int slot, int func, int reg)
-{
-	uint32_t addr;
-
-	addr = (((reg & 0xf00) >> 8) << 24) | (bus << 16) | (slot << 11) |
-		(func << 8) | (reg & 0xfc) | (1 << 31);
-
-	return (addr);
-}
-
-static int
-rt305x_pci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static uint32_t
-rt305x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
-	u_int reg, int bytes)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t addr = 0, data = 0;
-
-	if (bus == 0 && (sc->pcie_link_status & (1<<slot)) == 0)
-		return (~0U);
-
-	mtx_lock_spin(&rt305x_pci_mtx);
-	addr = rt305x_pci_make_addr(bus, slot, func, (reg & ~3));
-	RT_WRITE32(sc, RT305X_PCI_CFGADDR, addr);
-	switch (bytes % 4) {
-	case 0:
-		data = RT_READ32(sc, RT305X_PCI_CFGDATA);
-		break;
-	case 1:
-		data = RT_READ8(sc, RT305X_PCI_CFGDATA + (reg & 0x3));
-		break;
-	case 2:
-		data = RT_READ16(sc, RT305X_PCI_CFGDATA + (reg & 0x3));
-		break;
-	default:
-		panic("%s(): Wrong number of bytes (%d) requested!\n",
-			__FUNCTION__, bytes % 4);
-	}
-	mtx_unlock_spin(&rt305x_pci_mtx);
-
-	return (data);
-}
-
-static void
-rt305x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
-	u_int reg, uint32_t val, int bytes)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t addr = 0, data = val;
-
-	if (bus == 0 && (sc->pcie_link_status & (1<<slot)) == 0)
-		return;
-
-	mtx_lock_spin(&rt305x_pci_mtx);
-	addr = rt305x_pci_make_addr(bus, slot, func, (reg & ~3));
-	RT_WRITE32(sc, RT305X_PCI_CFGADDR, addr);
-	switch (bytes % 4) {
-	case 0:
-		RT_WRITE32(sc, RT305X_PCI_CFGDATA, data);
-		break;
-	case 1:
-		RT_WRITE8(sc, RT305X_PCI_CFGDATA + (reg & 0x3), data);
-		break;
-	case 2:
-		RT_WRITE16(sc, RT305X_PCI_CFGDATA + (reg & 0x3), data);
-		break;
-	default:
-		panic("%s(): Wrong number of bytes (%d) requested!\n",
-			__FUNCTION__, bytes % 4);
-	}
-	mtx_unlock_spin(&rt305x_pci_mtx);
-}
-
-static int
-rt305x_pci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-	//struct rt305x_pci_softc *sc = device_get_softc(pcib);
-	int bus, sl;
-
-	bus = pci_get_bus(device);
-	sl = pci_get_slot(device);
-
-	if (bus != 0)
-		panic("Unexpected bus number %d\n", bus);
-
-	//printf("%s: not done yet.\n", __FUNCTION__);
-
-	switch (sl) {
-	case 0: return RT305X_PCIE0_IRQ;
-	default: return (-1);
-	}
-
-	return (-1);
-}
-
-static device_method_t rt305x_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		rt305x_pci_probe),
-	DEVMETHOD(device_attach,	rt305x_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	rt305x_pci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	rt305x_pci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	rt305x_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource,   rt305x_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	rt305x_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	rt305x_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	rt305x_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	rt305x_pci_read_config),
-	DEVMETHOD(pcib_write_config,	rt305x_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	rt305x_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t rt305x_pci_driver = {
-	"pcib",
-	rt305x_pci_methods,
-	sizeof(struct rt305x_pci_softc),
-};
-
-static devclass_t rt305x_pci_devclass;
-
-DRIVER_MODULE(rt305x_pci, nexus, rt305x_pci_driver, rt305x_pci_devclass, 0, 0);
-
-static void
-rt305x_pci_dump_regs(device_t dev)
-{
-#if 0
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t reg = 0;
-
-	reg = 0x0000;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x0008;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x000c;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x0020;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x0024;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x0028;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x002c;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2010;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2014;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2018;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2030;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2034;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2038;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2050;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2060;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-
-	reg = 0x2064;
-	printf("0x%04x: 0x%08x\n", reg, RT_READ32(sc, reg));
-#endif
-}
-
-static void
-rt305x_pci_init(device_t dev)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t tmp;
-
-	rt305x_sysctl_set(SYSCTL_SYSCFG1,
-		rt305x_sysctl_get(SYSCTL_SYSCFG1) | (1 << 8));
-
-	rt305x_sysctl_set(SYSCTL_GPIOMODE,
-		rt305x_sysctl_get(SYSCTL_GPIOMODE) & ~(0x3 << 16));
-	rt305x_sysctl_set(SYSCTL_RSTCTRL,
-		rt305x_sysctl_get(SYSCTL_RSTCTRL) & ~(1<<26));
-	rt305x_sysctl_set(SYSCTL_CLKCFG1,
-		rt305x_sysctl_get(SYSCTL_CLKCFG1) | (1<<26));
-
-	tmp = rt305x_sysctl_get(SYSCTL_PPLL_CFG1);
-	if ((tmp & (1<<23)) == 0) {
-		device_printf(dev, "PPLL not locked\n");
-		return;
-	}
-
-	tmp = rt305x_sysctl_get(SYSCTL_PPLL_DRV);
-	tmp |= (1<<19);
-	rt305x_sysctl_set(SYSCTL_PPLL_DRV, tmp);
-	tmp &= ~(1<<18);
-	rt305x_sysctl_set(SYSCTL_PPLL_DRV, tmp);
-	tmp &= ~(1<<17);
-	rt305x_sysctl_set(SYSCTL_PPLL_DRV, tmp);
-	tmp|= (1<<31);
-	rt305x_sysctl_set(SYSCTL_PPLL_DRV, tmp);
-
-	RT_WRITE32(sc, RT305X_PCI_MEMBASE, sc->sc_mem_base);
-	RT_WRITE32(sc, RT305X_PCI_IOBASE, sc->sc_io_base);
-
-	RT_WRITE32(sc, RT305X_PCI_PCICFG, RT_READ32(sc, 0) & ~(1<<1));
-	DELAY(500000);
-	if ((RT_READ32(sc, RT305X_PCI_PCIE0_STATUS) & 0x1) == 1)
-		sc->pcie_link_status = 1;
-	else
-		sc->pcie_link_status = 0;
-
-	RT_WRITE32(sc, RT305X_PCI_PCIE0_BAR0SETUP, 0x7FFF0001);
-	RT_WRITE32(sc, RT305X_PCI_PCIE0_BAR1SETUP, 0x00000000);
-	RT_WRITE32(sc, RT305X_PCI_PCIE0_IMBASEBAR0, 0x00000000);
-	RT_WRITE32(sc, RT305X_PCI_PCIE0_CLASS, 0x06040001);
-
-	tmp = rt305x_pci_read_config(dev, 0, 0, 0, 4, 4);
-	rt305x_pci_write_config(dev, 0, 0, 0, 4, tmp | 0x7, 4);
-	tmp = rt305x_pci_read_config(dev, 0, 0, 0, 0x70c, 4);
-	tmp &= ~(0xff)<<8;
-	tmp |= 0x50<<8;
-	rt305x_pci_write_config(dev, 0, 0, 0, 0x70c, tmp, 4);
-	tmp = rt305x_pci_read_config(dev, 0, 0, 0, 0x70c, 4);
-
-	rt305x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), 0, 4);
-}
-
-static inline uint32_t
-pcib_bit_get(uint32_t *map, uint32_t bit)
-{
-	uint32_t n = bit / BITS_PER_UINT32;
-
-	bit = bit % BITS_PER_UINT32;
-	return (map[n] & (1 << bit));
-}
-
-static inline void
-pcib_bit_set(uint32_t *map, uint32_t bit)
-{
-	uint32_t n = bit / BITS_PER_UINT32;
-
-	bit = bit % BITS_PER_UINT32;
-	map[n] |= (1 << bit);
-}
-
-static inline uint32_t
-pcib_map_check(uint32_t *map, uint32_t start, uint32_t bits)
-{
-	uint32_t i;
-
-	for (i = start; i < start + bits; i++)
-		if (pcib_bit_get(map, i))
-			return (0);
-
-	return (1);
-}
-
-static inline void
-pcib_map_set(uint32_t *map, uint32_t start, uint32_t bits)
-{
-	uint32_t i;
-
-	for (i = start; i < start + bits; i++)
-		pcib_bit_set(map, i);
-}
-
-static bus_addr_t
-pcib_alloc(device_t dev, uint32_t smask)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t bits, bits_limit, i, *map, min_alloc, size;
-	bus_addr_t addr = 0;
-	bus_addr_t base;
-
-	if (smask & 1) {
-		base = sc->sc_io_base;
-		min_alloc = PCI_MIN_IO_ALLOC;
-		bits_limit = sc->sc_io_size / min_alloc;
-		map = sc->sc_io_map;
-		smask &= ~0x3;
-	} else {
-		base = sc->sc_mem_base;
-		min_alloc = PCI_MIN_MEM_ALLOC;
-		bits_limit = sc->sc_mem_size / min_alloc;
-		map = sc->sc_mem_map;
-		smask &= ~0xF;
-	}
-
-	size = ~smask + 1;
-	bits = size / min_alloc;
-
-	for (i = 0; i + bits <= bits_limit; i+= bits)
-		if (pcib_map_check(map, i, bits)) {
-			pcib_map_set(map, i, bits);
-			addr = base + (i * min_alloc);
-			return (addr);
-		}
-
-	return (addr);
-}
-
-static int
-rt305x_pcib_init_bar(device_t dev, int bus, int slot, int func, int barno)
-{
-	uint32_t addr, bar;
-	int reg, width;
-
-	reg = PCIR_BAR(barno);
-
-	rt305x_pci_write_config(dev, bus, slot, func, reg, ~0, 4);
-	bar = rt305x_pci_read_config(dev, bus, slot, func, reg, 4);
-	if (bar == 0)
-		return (1);
-
-	/* Calculate BAR size: 64 or 32 bit (in 32-bit units) */
-	width = ((bar & 7) == 4) ? 2 : 1;
-
-	addr = pcib_alloc(dev, bar);
-	if (!addr)
-		return (-1);
-
-	if (bootverbose)
-		printf("PCI %u:%u:%u: reg %x: smask=%08x: addr=%08x\n",
-		    bus, slot, func, reg, bar, addr);
-
-	rt305x_pci_write_config(dev, bus, slot, func, reg, addr, 4);
-	if (width == 2)
-		rt305x_pci_write_config(dev, bus, slot, func, reg + 4, 0, 4);
-
-	return (width);
-}
-
-static int
-rt305x_pcib_init_all_bars(device_t dev, int bus, int slot, int func,
-	int hdrtype)
-{
-	int maxbar, bar, i;
-
-	maxbar = (hdrtype & PCIM_HDRTYPE) ? 0 : 6;
-	bar = 0;
-
-	while (bar < maxbar) {
-		i = rt305x_pcib_init_bar(dev, bus, slot, func, bar);
-		bar += i;
-		if (i < 0) {
-			device_printf(dev, "PCI IO/Memory space exhausted\n");
-			return (ENOMEM);
-		}
-	}
-
-	return (0);
-}
-
-static inline int
-rt305x_pci_slot_has_link(device_t dev, int slot)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-
-	return !!(sc->pcie_link_status & (1<<slot));
-}
-
-static int cur_secbus = 0;
-
-static void
-rt305x_pcib_init_bridge(device_t dev, int bus, int slot, int func)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	bus_addr_t io_base, mem_base;
-	uint32_t io_limit, mem_limit;
-	int secbus;
-
-	if (bus == 0 && !rt305x_pci_slot_has_link(dev, slot)) {
-		device_printf(dev, "Skip bus %d due to no link\n",++cur_secbus);
-		return;
-	}
-
-	io_base = sc->sc_io_base;
-	io_limit = io_base + sc->sc_io_size - 1;
-	mem_base = sc->sc_mem_base;
-	mem_limit = mem_base + sc->sc_mem_size - 1;
-
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_IOBASEL_1,
-		io_base >> 8, 1);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_IOBASEH_1,
-		io_base >> 16, 2);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_IOLIMITL_1,
-		io_limit >> 8, 1);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_IOLIMITH_1,
-		io_limit >> 16, 2);
-
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_MEMBASE_1,
-		mem_base >> 16, 2);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_MEMLIMIT_1,
-		mem_limit >> 16, 2);
-
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_PMBASEL_1,
-		0x10, 2);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_PMBASEH_1,
-		0x0, 4);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_PMLIMITL_1,
-		0xF, 2);
-	rt305x_pci_write_config(dev, bus, slot, func, PCIR_PMLIMITH_1,
-		0x0, 4);
-
-	secbus = rt305x_pci_read_config(dev, bus, slot, func, PCIR_SECBUS_1, 1);
-
-	if (secbus == 0) {
-		rt305x_pci_write_config(dev, bus, slot, func, PCIR_SECBUS_1,
-			++cur_secbus, 1);
-		rt305x_pci_write_config(dev, bus, slot, func, PCIR_SUBBUS_1,
-			cur_secbus, 1);
-		secbus = cur_secbus;
-	}
-
-	rt305x_pcib_init(dev, secbus, PCI_SLOTMAX);
-}
-
-static int
-rt305x_pcib_init(device_t dev, int bus, int maxslot)
-{
-	int slot, func, maxfunc, error;
-	uint8_t hdrtype, command, class, subclass;
-
-	for (slot = 0; slot <= maxslot; slot++) {
-		maxfunc = 0;
-		for (func = 0; func <= maxfunc; func++) {
-			hdrtype = rt305x_pci_read_config(dev, bus, slot, func,
-				PCIR_HDRTYPE, 1);
-
-			if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
-				continue;
-
-			if (func == 0 && (hdrtype & PCIM_MFDEV))
-				maxfunc = PCI_FUNCMAX;
-
-			command = rt305x_pci_read_config(dev, bus, slot, func,
-				PCIR_COMMAND, 1);
-			command &= ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN);
-			rt305x_pci_write_config(dev, bus, slot, func,
-				PCIR_COMMAND, command, 1);
-
-			error = rt305x_pcib_init_all_bars(dev, bus, slot, func,
-				hdrtype);
-
-			if (error)
-				return (error);
-
-			command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
-				PCIM_CMD_PORTEN;
-			rt305x_pci_write_config(dev, bus, slot, func,
-				PCIR_COMMAND, command, 1);
-
-			rt305x_pci_write_config(dev, bus, slot, func,
-				PCIR_CACHELNSZ, 16, 1);
-
-			class = rt305x_pci_read_config(dev, bus, slot, func,
-				PCIR_CLASS, 1);
-			subclass = rt305x_pci_read_config(dev, bus, slot, func,
-				PCIR_SUBCLASS, 1);
-
-			if (class != PCIC_BRIDGE || subclass != PCIS_BRIDGE_PCI)
-				continue;
-
-			rt305x_pcib_init_bridge(dev, bus, slot, func);
-		}
-	}
-
-	return (0);
-}
-
-#define BUSY		0x80000000
-#define WAITRETRY_MAX	10
-#define WRITE_MODE	(1<<23)
-#define DATA_SHIFT	0
-#define ADDR_SHIFT	8
-
-static int
-rt305x_wait_pci_phy_busy(struct rt305x_pci_softc *sc)
-{
-	uint32_t reg_value = 0x0, retry = 0;
-
-	while (1) {
-		reg_value = RT_READ32(sc, RT305X_PCI_PHY0_CFG);
-		if (reg_value & BUSY)
-			DELAY(100000);
-		else
-			break;
-		if (retry++ > WAITRETRY_MAX) {
-			printf("PHY retry failed\n");
-			return (-1);
-		}
-	}
-	return (0);
-}
-
-static uint32_t
-rt305x_pci_phy(struct rt305x_pci_softc *sc, char rwmode, uint32_t addr,
-		uint32_t val)
-{
-	uint32_t reg_value = 0x0;
-
-	rt305x_wait_pci_phy_busy(sc);
-	if (rwmode == 'w') {
-		reg_value |= WRITE_MODE;
-		reg_value |= (val) << DATA_SHIFT;
-	}
-	reg_value |= (addr) << ADDR_SHIFT;
-
-	RT_WRITE32(sc, RT305X_PCI_PHY0_CFG, reg_value);
-	DELAY(1000);
-
-	rt305x_wait_pci_phy_busy(sc);
-
-	if (rwmode == 'r') {
-		reg_value = RT_READ32(sc, RT305X_PCI_PHY0_CFG);
-		return (reg_value);
-	}
-
-	return (0);
-}
-
-static void
-rt305x_pci_phy_init(device_t dev)
-{
-	struct rt305x_pci_softc *sc = device_get_softc(dev);
-	uint32_t tmp;
-
-	rt305x_pci_phy(sc, 'w', 0x00, 0x80);
-	rt305x_pci_phy(sc, 'w', 0x01, 0x04);
-	rt305x_pci_phy(sc, 'w', 0x68, 0x84);
-
-	rt305x_sysctl_set(SYSCTL_RSTCTRL,
-		rt305x_sysctl_get(SYSCTL_RSTCTRL) | (1<<26));
-	rt305x_sysctl_set(SYSCTL_CLKCFG1,
-		rt305x_sysctl_get(SYSCTL_CLKCFG1) & ~(1<<26));
-
-	tmp = rt305x_sysctl_get(SYSCTL_PPLL_CFG1);
-	tmp &= ~(1<<19);
-	rt305x_sysctl_set(SYSCTL_PPLL_CFG1, tmp);
-	tmp |= (1<<31);
-	rt305x_sysctl_set(SYSCTL_PPLL_CFG1, tmp);
-}
-
-static int
-rt305x_pci_intr(void *arg)
-{
-	struct rt305x_pci_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq, irqidx;
-
-	reg = RT_READ32(sc, RT305X_PCI_PCIINT);
-
-	for (irqidx = 0; irqidx < RT305X_PCI_NIRQS; irqidx++) {
-		irq = rt305x_idx_to_irq(irqidx);
-		if (reg & (1<<irq)) {
-			event = sc->sc_eventstab[irqidx];
-			if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
-				if (irq != 0)
-					printf("Stray PCI IRQ %d\n", irq);
-				continue;
-			}
-
-			intr_event_handle(event, NULL);
-			mips_intrcnt_inc(sc->sc_intr_counter[irqidx]);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
diff --git a/sys/mips/rt305x/rt305x_pcireg.h b/sys/mips/rt305x/rt305x_pcireg.h
deleted file mode 100644
index cc6a62a907d..00000000000
--- a/sys/mips/rt305x/rt305x_pcireg.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*-
- * Copyright (c) 2015 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef __RT305X_PCIREG_H__
-#define __RT305X_PCIREG_H__
-
-#define RT305X_PCI_NIRQS	1
-#define RT305X_PCI_BASESLOT	0
-
-#define RT305X_PCI_PCICFG		0x0000
-#define RT305X_PCI_PCIINT		0x0008
-#define RT305X_PCI_PCIENA		0x000C
-#define RT305X_PCI_CFGADDR		0x0020
-#define RT305X_PCI_CFGDATA		0x0024
-#define RT305X_PCI_MEMBASE		0x0028
-#define RT305X_PCI_IOBASE		0x002C
-#define RT305X_PCI_PHY0_CFG		0x0090
-
-#define RT305X_PCI_PCIE0_BAR0SETUP	0x2010
-#define RT305X_PCI_PCIE0_BAR1SETUP	0x2014
-#define RT305X_PCI_PCIE0_IMBASEBAR0	0x2018
-#define RT305X_PCI_PCIE0_ID		0x2030
-#define RT305X_PCI_PCIE0_CLASS		0x2034
-#define RT305X_PCI_PCIE0_SUBID		0x2038
-#define RT305X_PCI_PCIE0_STATUS		0x2050
-#define RT305X_PCI_PCIE0_DLECR		0x2060
-#define RT305X_PCI_PCIE0_ECRC		0x2064
-
-#define RT305X_PCIE0_IRQ	20
-#define RT305X_PCIE1_IRQ	21
-#define RT305X_PCIE2_IRQ	22
-
-#define RT305X_PCI_INTR_PIN	2
-
-#define PCI_MIN_IO_ALLOC	4
-#define PCI_MIN_MEM_ALLOC	16
-#define BITS_PER_UINT32		(NBBY * sizeof(uint32_t))
-
-#define RT_WRITE32(sc, off, val) \
-	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (off), (val))
-#define RT_WRITE16(sc, off, val) \
-	bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (off), (val))
-#define RT_WRITE8(sc, off, val) \
-	bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (off), (val))
-#define RT_READ32(sc, off) \
-	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (off))
-#define RT_READ16(sc, off) \
-	bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (off))
-#define RT_READ8(sc, off) \
-	bus_space_read_1((sc)->sc_bst, (sc)->sc_bsh, (off))
-
-#endif /* __RT305X_PCIREG_H__ */
diff --git a/sys/mips/rt305x/rt305x_spi.c b/sys/mips/rt305x/rt305x_spi.c
deleted file mode 100644
index 2fd99fae251..00000000000
--- a/sys/mips/rt305x/rt305x_spi.c
+++ /dev/null
@@ -1,354 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-//#include <machine/pmap.h>
-
-#include <dev/spibus/spi.h>
-#include <dev/spibus/spibusvar.h>
-#include "spibus_if.h"
-
-#include "opt_platform.h"
-
-#ifdef FDT
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#endif
-
-#include <mips/rt305x/rt305xreg.h>
-#include <dev/flash/mx25lreg.h>
-
-#undef RT305X_SPI_DEBUG
-#ifdef RT305X_SPI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * register space access macros
- */
-#define SPI_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->sc_mem_res, (reg), (val)); \
-	} while (0)
-
-#define SPI_READ(sc, reg)	 bus_read_4(sc->sc_mem_res, (reg))
-
-#define SPI_SET_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
-
-#define SPI_CLEAR_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
-
-struct rt305x_spi_softc {
-	device_t		sc_dev;
-	struct resource		*sc_mem_res;
-};
-
-static int	rt305x_spi_probe(device_t);
-static int	rt305x_spi_attach(device_t);
-static int	rt305x_spi_detach(device_t);
-static int	rt305x_spi_wait(struct rt305x_spi_softc *);
-static void	rt305x_spi_chip_activate(struct rt305x_spi_softc *);
-static void	rt305x_spi_chip_deactivate(struct rt305x_spi_softc *);
-static uint8_t	rt305x_spi_txrx(struct rt305x_spi_softc *, uint8_t *, int);
-static int	rt305x_spi_transfer(device_t, device_t, struct spi_command *);
-#ifdef FDT
-static phandle_t rt305x_spi_get_node(device_t, device_t);
-#endif
-
-static int
-rt305x_spi_probe(device_t dev)
-{
-#ifdef FDT
-        if (!ofw_bus_is_compatible(dev, "ralink,rt305x-spi"))
-            return(ENXIO);
-#endif
-	device_set_desc(dev, "RT305X SPI");
-	return (0);
-}
-
-static int
-rt305x_spi_attach(device_t dev)
-{
-	struct rt305x_spi_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->sc_dev = dev;
-        rid = 0;
-	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (!sc->sc_mem_res) {
-		device_printf(dev, "Could not map memory\n");
-		return (ENXIO);
-	}
-
-	if (rt305x_spi_wait(sc)) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-		return (EBUSY);
-	}
-
-	SPI_WRITE(sc, RT305X_SPICFG, MSBFIRST | SPICLKPOL | TX_ON_CLK_FALL |
-	    SPI_CLK_DIV8); /* XXX: make it configurable */
-	    /*
-	     * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
-	     * Update: divide by 4, DEV2 to fast for flash.
-	     */
-
-	device_add_child(dev, "spibus", 0);
-	return (bus_generic_attach(dev));
-}
-
-static int
-rt305x_spi_detach(device_t dev)
-{
-	struct rt305x_spi_softc *sc = device_get_softc(dev);
-
-	SPI_SET_BITS(sc, RT305X_SPICTL, HIZSMOSI | CS_HIGH);
-
-	if (sc->sc_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-
-	return (0);
-}
-
-static void
-rt305x_spi_chip_activate(struct rt305x_spi_softc *sc)
-{
-//        printf("%s\n", __func__);
-        rt305x_spi_wait(sc);
-	/*
-	 * Put all CSx to low
-	 */
-	SPI_CLEAR_BITS(sc, RT305X_SPICTL, CS_HIGH | HIZSMOSI);
-}
-
-static void
-rt305x_spi_chip_deactivate(struct rt305x_spi_softc *sc)
-{
-//        printf("%s\n", __func__);
-        rt305x_spi_wait(sc);
-	/*
-	 * Put all CSx to high
-	 */
-	SPI_SET_BITS(sc, RT305X_SPICTL, CS_HIGH | HIZSMOSI);
-}
-
-static int
-rt305x_spi_wait(struct rt305x_spi_softc *sc)
-{
-	int i = 1000;
-
-	while (i--) {
-		if (!SPI_READ(sc, RT305X_SPIBUSY))
-			break;
-	}
-	if (i == 0) {
-		printf("busy\n");
-		return (1);
-	}
-
-	return (0);
-}
-
-static uint8_t
-rt305x_spi_txrx(struct rt305x_spi_softc *sc, uint8_t *data, int write)
-{
-
-	if (rt305x_spi_wait(sc))
-		return (EBUSY);
-
-	if (write == RT305X_SPI_WRITE) {
-		SPI_WRITE(sc, RT305X_SPIDATA, *data);
-		SPI_SET_BITS(sc, RT305X_SPICTL, START_WRITE);
-		//printf("%s(W:%d)\n", __func__, *data);
-	} else {/* RT305X_SPI_READ */
-		SPI_SET_BITS(sc, RT305X_SPICTL, START_READ);
-		if (rt305x_spi_wait(sc))
-			return (EBUSY);
-
-		*data = SPI_READ(sc, RT305X_SPIDATA) & 0xff;
-		//printf("%s(R:%d)\n", __func__, *data);
-	}
-	return (0);
-}
-
-static int
-rt305x_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
-{
-	struct rt305x_spi_softc *sc;
-	uint32_t cs;
-	uint8_t *buf, byte, *tx_buf;
-	int i, sz, error = 0, write = 0;
-
-	sc = device_get_softc(dev);
-
-	spibus_get_cs(child, &cs);
-
-	cs &= ~SPIBUS_CS_HIGH;
-
-	if (cs != 0)
-		/* Only 1 CS */
-		return (ENXIO);
-
-        /* There is always a command to transfer. */
-        tx_buf = (uint8_t *)(cmd->tx_cmd);
-        
-        /* Perform some fixup because RT305X dont support duplex SPI */
-        switch(tx_buf[0]) {
-                case CMD_READ_IDENT:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 3;
-                        break;
-                case CMD_WRITE_ENABLE:
-                case CMD_WRITE_DISABLE:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 0;
-                        break;
-                case CMD_READ_STATUS:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 1;
-                        break;
-                case CMD_READ:
-                        cmd->tx_cmd_sz = 4;
-                case CMD_FAST_READ:
-                        cmd->tx_cmd_sz = 5;
-                        cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
-                        break;
-                case CMD_SECTOR_ERASE:
-                        cmd->tx_cmd_sz = 4;
-                        cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
-                        break;
-                case CMD_PAGE_PROGRAM:
-                        cmd->tx_cmd_sz = 4;
-                        cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
-                        break;
-        }      
-        
-	rt305x_spi_chip_activate(sc);
-
-	if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
-		buf = (uint8_t *)(cmd->rx_cmd);
-		tx_buf = (uint8_t *)(cmd->tx_cmd);
-		sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
-
-		for (i = 0; i < sz; i++) {
-                        if(i < cmd->tx_cmd_sz) {
-			        byte = tx_buf[i];
-        			error = rt305x_spi_txrx(sc, &byte,
-		        	    RT305X_SPI_WRITE);
-        			if (error)
-        				goto rt305x_spi_transfer_fail;
-                                continue;
-                        }
-                        error = rt305x_spi_txrx(sc, &byte,
-		            RT305X_SPI_READ);
-        		if (error)
-        			goto rt305x_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-	
-	/*
-	 * Transfer/Receive data
-	 */
-	
-	if (cmd->tx_data_sz + cmd->rx_data_sz) {
-		write = (cmd->tx_data_sz > 0)?1:0;
-		buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
-		sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
-
-		for (i = 0; i < sz; i++) {
-			byte = buf[i];
-			error = rt305x_spi_txrx(sc, &byte,
-			    write?RT305X_SPI_WRITE:RT305X_SPI_READ);
-			if (error)
-				goto rt305x_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-rt305x_spi_transfer_fail:
-	rt305x_spi_chip_deactivate(sc);
-
-	return (error);
-}
-
-#ifdef FDT
-static phandle_t
-rt305x_spi_get_node(device_t bus, device_t dev)
-{
-
-	/* We only have one child, the SPI bus, which needs our own node. */
-	return (ofw_bus_get_node(bus));
-}
-#endif
-
-static device_method_t rt305x_spi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		rt305x_spi_probe),
-	DEVMETHOD(device_attach,	rt305x_spi_attach),
-	DEVMETHOD(device_detach,	rt305x_spi_detach),
-
-	DEVMETHOD(spibus_transfer,	rt305x_spi_transfer),
-
-#ifdef FDT
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	rt305x_spi_get_node),
-#endif
-
-	DEVMETHOD_END
-};
-
-static driver_t rt305x_spi_driver = {
-	.name = "spi",
-	.methods = rt305x_spi_methods,
-	.size = sizeof(struct rt305x_spi_softc),
-};
-
-static devclass_t rt305x_spi_devclass;
-
-DRIVER_MODULE(rt305x_spi, obio, rt305x_spi_driver, rt305x_spi_devclass, 0, 0);
-#ifdef FDT
-DRIVER_MODULE(rt305x_spi, simplebus, rt305x_spi_driver, rt305x_spi_devclass, 0, 0);
-#endif
diff --git a/sys/mips/rt305x/rt305x_sysctl.c b/sys/mips/rt305x/rt305x_sysctl.c
deleted file mode 100644
index 6a86374d601..00000000000
--- a/sys/mips/rt305x/rt305x_sysctl.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/rt305x/rt305xreg.h>
-#include <mips/rt305x/rt305x_sysctlvar.h>
-
-
-static int	rt305x_sysctl_probe(device_t);
-static int	rt305x_sysctl_attach(device_t);
-static int	rt305x_sysctl_detach(device_t);
-
-
-static struct rt305x_sysctl_softc *rt305x_sysctl_softc = NULL;
-
-static void
-rt305x_sysctl_dump_config(device_t dev)
-{
-	uint32_t val;
-#define DUMPREG(r) 							\
-	val = rt305x_sysctl_get(r); printf("    " #r "=%#08x\n", val)
-
-	val = rt305x_sysctl_get(SYSCTL_CHIPID0_3);
-	printf("\tChip ID: \"%c%c%c%c", 
-	    (val >> 0 ) & 0xff, 
-	    (val >> 8 ) & 0xff, 
-	    (val >> 16) & 0xff, 
-	    (val >> 24) & 0xff);
-	val = rt305x_sysctl_get(SYSCTL_CHIPID4_7);
-	printf("%c%c%c%c\"\n", 
-	    (val >> 0 ) & 0xff, 
-	    (val >> 8 ) & 0xff, 
-	    (val >> 16) & 0xff, 
-	    (val >> 24) & 0xff);
-
-	DUMPREG(SYSCTL_SYSCFG);
-#if !defined(RT5350) && !defined(MT7620)
-	if ( val & SYSCTL_SYSCFG_INIC_EE_SDRAM)
-		printf("\tGet SDRAM config from EEPROM\n");
-	if ( val & SYSCTL_SYSCFG_INIC_8MB_SDRAM)
-		printf("\tBootstrap flag is set\n");
-	printf("\tGE0 mode %u\n",
-	    ((val & SYSCTL_SYSCFG_GE0_MODE_MASK) >> 
-		SYSCTL_SYSCFG_GE0_MODE_SHIFT));
-	if ( val & SYSCTL_SYSCFG_BOOT_ADDR_1F00)
-		printf("\tBoot from 0x1f000000\n");
-	if ( val & SYSCTL_SYSCFG_BYPASS_PLL)
-		printf("\tBypass PLL\n");
-	if ( val & SYSCTL_SYSCFG_BIG_ENDIAN)
-		printf("\tBig Endian\n");
-	if ( val & SYSCTL_SYSCFG_CPU_CLK_SEL_384MHZ)
-		printf("\tClock is 384MHz\n");
-	printf("\tBoot from %u\n",
-	    ((val & SYSCTL_SYSCFG_BOOT_FROM_MASK) >> 
-		SYSCTL_SYSCFG_BOOT_FROM_SHIFT));
-	printf("\tBootstrap test code %u\n",
-	    ((val & SYSCTL_SYSCFG_TEST_CODE_MASK) >> 
-		SYSCTL_SYSCFG_TEST_CODE_SHIFT));
-	printf("\tSRAM_CS mode %u\n",
-	    ((val & SYSCTL_SYSCFG_SRAM_CS_MODE_MASK) >> 
-		SYSCTL_SYSCFG_SRAM_CS_MODE_SHIFT));
-	printf("\t%umA SDRAM_CLK driving\n",
-	    (val & SYSCTL_SYSCFG_SDRAM_CLK_DRV)?12:8);
-
-	DUMPREG(SYSCTL_CLKCFG0);
-	printf("\tSDRAM_CLK_SKEW %uns\n", (val >> 30) & 0x03);
-
-	DUMPREG(SYSCTL_CLKCFG1);
-	if ( val & SYSCTL_CLKCFG1_PBUS_DIV_CLK_BY2)
-		printf("\tPbus clock is 1/2 of System clock\n");
-	if ( val & SYSCTL_CLKCFG1_OTG_CLK_EN)
-		printf("\tUSB OTG clock is enabled\n");
-	if ( val & SYSCTL_CLKCFG1_I2S_CLK_EN)
-		printf("\tI2S clock is enabled\n");
-	printf("\tI2S clock is %s\n", 
-	    (val & SYSCTL_CLKCFG1_I2S_CLK_SEL_EXT)?
-		"external":"internal 15.625MHz");
-	printf("\tI2S clock divider %u\n",
-	    ((val & SYSCTL_CLKCFG1_I2S_CLK_DIV_MASK) >> 
-		SYSCTL_CLKCFG1_I2S_CLK_DIV_SHIFT));
-	if ( val & SYSCTL_CLKCFG1_PCM_CLK_EN)
-		printf("\tPCM clock is enabled\n");
-
-	printf("\tPCM clock is %s\n", 
-	    (val & SYSCTL_CLKCFG1_PCM_CLK_SEL_EXT)?
-		"external":"internal 15.625MHz");
-	printf("\tPCM clock divider %u\n",
-	    ((val & SYSCTL_CLKCFG1_PCM_CLK_DIV_MASK) >> 
-		SYSCTL_CLKCFG1_PCM_CLK_DIV_SHIFT));
-	DUMPREG(SYSCTL_GPIOMODE);
-#endif
-#undef DUMPREG
-
-	return;
-}
-
-static int
-rt305x_sysctl_probe(device_t dev)
-{
-	device_set_desc(dev, "RT305X System Control driver");
-	return (0);
-}
-
-static int
-rt305x_sysctl_attach(device_t dev)
-{
-	struct rt305x_sysctl_softc *sc = device_get_softc(dev);
-	int error = 0;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("rt305x_sysctl: Only one sysctl module supported"));
-
-	if (rt305x_sysctl_softc != NULL)
-		return (ENXIO);
-	rt305x_sysctl_softc = sc;
-
-
-	/* Map control/status registers. */
-	sc->mem_rid = 0;
-	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->mem_rid, RF_ACTIVE);
-
-	if (sc->mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		rt305x_sysctl_detach(dev);
-		return(error);
-	}
-#ifdef notyet
-	sc->irq_rid = 0;
-	if ((sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &sc->irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 
-	    rt305x_sysctl_intr, NULL, sc, &sc->sysctl_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-#endif
-	rt305x_sysctl_dump_config(dev);
-
-	return (bus_generic_attach(dev));
-}
-
-static int
-rt305x_sysctl_detach(device_t dev)
-{
-	struct rt305x_sysctl_softc *sc = device_get_softc(dev);
-
-	bus_generic_detach(dev);
-
-	if (sc->mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
-		    sc->mem_res);
-#ifdef notyet
-	if (sc->irq_res)
-		bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
-		    sc->irq_res);
-#endif
-	return(0);
-}
-
-#ifdef notyet
-static int
-rt305x_sysctl_intr(void *arg)
-{
-	return (FILTER_HANDLED);
-}
-#endif
-
-uint32_t
-rt305x_sysctl_get(uint32_t reg)
-{
-	struct rt305x_sysctl_softc *sc = rt305x_sysctl_softc;
-	return (bus_read_4(sc->mem_res, reg));
-}
-
-void
-rt305x_sysctl_set(uint32_t reg, uint32_t val)
-{
-	struct rt305x_sysctl_softc *sc = rt305x_sysctl_softc;
-	bus_write_4(sc->mem_res, reg, val);
-	return;
-}
-
-
-static device_method_t rt305x_sysctl_methods[] = {
-	DEVMETHOD(device_probe,			rt305x_sysctl_probe),
-	DEVMETHOD(device_attach,		rt305x_sysctl_attach),
-	DEVMETHOD(device_detach,		rt305x_sysctl_detach),
-
-	{0, 0},
-};
-
-static driver_t rt305x_sysctl_driver = {
-	"rt305x_sysctl",
-	rt305x_sysctl_methods,
-	sizeof(struct rt305x_sysctl_softc),
-};
-static devclass_t rt305x_sysctl_devclass;
-
-DRIVER_MODULE(rt305x_sysctl, obio, rt305x_sysctl_driver, rt305x_sysctl_devclass, 0, 0);
diff --git a/sys/mips/rt305x/rt305x_sysctlvar.h b/sys/mips/rt305x/rt305x_sysctlvar.h
deleted file mode 100644
index 71553df4e94..00000000000
--- a/sys/mips/rt305x/rt305x_sysctlvar.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _RT305X_SYSCTLVAR_H_
-#define _RT305X_SYSCTLVAR_H_
-
-struct rt305x_sysctl_softc {
-	device_t		dev;
-	struct resource		*mem_res;
-	int			mem_rid;
-	struct resource		*irq_res;
-	int			irq_rid;
-	int			sysctl_ih;
-};
-
-
-uint32_t	rt305x_sysctl_get(uint32_t);
-void		rt305x_sysctl_set(uint32_t, uint32_t);
-
-#endif /* _RT305X_SYSCTLVAR_H_ */
-
diff --git a/sys/mips/rt305x/rt305xreg.h b/sys/mips/rt305x/rt305xreg.h
deleted file mode 100644
index 2629236dce3..00000000000
--- a/sys/mips/rt305x/rt305xreg.h
+++ /dev/null
@@ -1,534 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2015 Stanislav Galabov.
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _RT305XREG_H_
-#define _RT305XREG_H_
-
-#include "opt_rt305x.h"
-
-#ifdef RT3052F
-#define PLATFORM_COUNTER_FREQ	(384 * 1000 * 1000)
-#endif
-#ifdef RT3050F
-#define PLATFORM_COUNTER_FREQ	(320 * 1000 * 1000)
-#endif
-#ifdef MT7620
-#define PLATFORM_COUNTER_FREQ	(580 * 1000 * 1000)
-#endif
-#ifdef RT5350
-#define PLATFORM_COUNTER_FREQ	(360 * 1000 * 1000)
-#endif
-#ifndef PLATFORM_COUNTER_FREQ
-#error "No platform selected"
-#endif
-
-#ifndef MT7620
-
-#define SYSTEM_CLOCK	(PLATFORM_COUNTER_FREQ/3)
-
-#define SDRAM_BASE 	0x00000000
-#define SDRAM_END 	0x03FFFFFF
-
-#define SYSCTL_BASE 	0x10000000
-#define SYSCTL_END 	0x100000FF
-#define TIMER_BASE 	0x10000100
-#define TIMER_END 	0x100001FF
-#define INTCTL_BASE 	0x10000200
-#define INTCTL_END 	0x100002FF
-#define MEMCTRL_BASE	0x10000300
-#define MEMCTRL_END 	0x100003FF /* SDRAM & Flash/SRAM */
-#ifndef RT5350
-#define PCM_BASE 	0x10000400
-#define PCM_END 	0x100004FF
-#else
-#define PCM_BASE	0x10002000
-#define PCM_END		0x100027FF
-#endif
-#define UART_BASE 	0x10000500
-#define UART_END 	0x100005FF
-#define PIO_BASE 	0x10000600
-#define PIO_END 	0x100006FF
-#ifndef RT5350
-#define GDMA_BASE 	0x10000700
-#define GDMA_END 	0x100007FF /* Generic DMA */
-#define NANDFC_BASE 	0x10000800
-#define NANDFC_END 	0x100008FF /* NAND Flash Controller */
-#else
-#define GDMA_BASE	0x10002800
-#define GDMA_END	0x10002FFF
-#endif
-#define I2C_BASE 	0x10000900
-#define I2C_END 	0x100009FF
-#define I2S_BASE 	0x10000A00
-#define I2S_END 	0x10000AFF
-#define SPI_BASE 	0x10000B00
-#define SPI_END 	0x10000BFF
-#define UARTLITE_BASE 	0x10000C00
-#define UARTLITE_END 	0x10000CFF
-
-#define FRENG_BASE 	0x10100000
-#define FRENG_END 	0x1010FFFF /* Frame Engine */
-#define ETHSW_BASE 	0x10110000
-#define ETHSW_END 	0x10117FFF /* Ethernet Switch */
-#define ROM_BASE 	0x10118000
-#define ROM_END 	0x10119FFF
-#define WLAN_BASE 	0x10180000
-#define WLAN_END 	0x101BFFFF /* 802.11n MAC/BBP */
-#ifndef RT5350
-#define USB_OTG_BASE	0x101C0000
-#define USB_OTG_END 	0x101FFFFF
-#else
-#define USB_OTG_BASE	0x101C0000
-#define USB_OTG_END	0x101C0FFF
-#define USB_OHCI_BASE	0x101C1000
-#define USB_OHCI_END	0x101C1FFF
-#endif
-#define EMEM_BASE 	0x1B000000
-#define EMEM_END 	0x1BFFFFFF /* External SRAM/Flash */
-#ifdef RT5350
-#define BOOT_ROM_BASE	0x1C000000
-#define BOOT_ROM_END	0x1C003FFF
-#endif
-#ifndef RT5350
-#define FLASH_BASE 	0x1F000000
-#define FLASH_END 	0x1FFFFFFF /* Flash window */
-#endif
-
-#define OBIO_MEM_BASE	SYSCTL_BASE
-#define OBIO_MEM_START	OBIO_MEM_BASE
-#ifndef RT5350
-#define OBIO_MEM_END	FLASH_END
-#else
-#define OBIO_MEM_END	BOOT_ROM_END
-#endif
-
-#else /* MT7620 */
-
-#define SYSTEM_CLOCK	(40 * 1000 * 1000)
-
-#define SDRAM_BASE	0x00000000
-#define SDRAM_END	0x0FFFFFFF
-
-#define SYSCTL_BASE	0x10000000
-#define SYSCTL_END	0x100000FF
-#define TIMER_BASE	0x10000100
-#define TIMER_END	0x100001FF
-#define INTCTL_BASE	0x10000200
-#define INTCTL_END	0x100002FF
-#define MEMCTRL_BASE	0x10000300
-#define MEMCTRL_END	0x100003FF /* SDRAM & Flash/SRAM */
-#define PCM_BASE	0x10002000
-#define PCM_END		0x100027FF
-#define UART_BASE	0x10000500
-#define UART_END	0x100005FF
-#define PIO_BASE	0x10000600
-#define PIO_END		0x100006FF
-#define GDMA_BASE	0x10002800
-#define GDMA_END	0x10002FFF /* Generic DMA */
-#define NANDFC_BASE	0x10000800
-#define NANDFC_END	0x100008FF /* NAND Flash Controller */
-#define I2C_BASE	0x10000900
-#define I2C_END		0x100009FF
-#define I2S_BASE	0x10000A00
-#define I2S_END		0x10000AFF
-#define SPI_BASE	0x10000B00
-#define SPI_END		0x10000BFF
-#define UARTLITE_BASE	0x10000C00
-#define UARTLITE_END	0x10000CFF
-
-#define FRENG_BASE	0x10100000
-#define FRENG_END	0x1010FFFF /* Frame Engine */
-#define ETHSW_BASE	0x10110000
-#define ETHSW_END	0x10117FFF /* Ethernet Switch */
-#define ROM_BASE	0x10118000
-#define ROM_END		0x1011FFFF
-#define WLAN_BASE	0x10180000
-#define WLAN_END	0x101BFFFF /* 802.11n MAC/BBP */
-#define USB_OTG_BASE	0x101C0000
-#define USB_OTG_END	0x101C0FFF
-#define USB_OHCI_BASE	0x101C1000
-#define USB_OHCI_END	0x101C1FFF
-#define PCIE_BASE	0x10140000
-#define PCIE_END	0x1017FFFF
-#define SDHC_BASE	0x10130000
-#define SDHC_END	0x10133FFF
-
-#define PCIE_IO_BASE	0x10160000
-#define PCIE_IO_END	0x1016FFFF
-#define PCIE_MEM_BASE	0x20000000
-#define PCIE_MEM_END	0x2FFFFFFF
-
-// TODO: fix below mappings?
-#define EMEM_BASE	0x1B000000
-#define EMEM_END	0x1BFFFFFF /* External SRAM/Flash */
-#define FLASH_BASE	0x1F000000
-#define FLASH_END	0x1FFFFFFF /* Flash window */
-
-#define OBIO_MEM_BASE	SYSCTL_BASE
-#define OBIO_MEM_START	OBIO_MEM_BASE
-#define OBIO_MEM_END	FLASH_END
-#endif
-
-/* System Control */
-#define SYSCTL_CHIPID0_3 	0x00
-#define SYSCTL_CHIPID4_7 	0x04
-#ifdef RT5350
-#define SYSCTL_REVID		0x0C
-#endif
-
-#define SYSCTL_SYSCFG		0x10
-#if !defined(RT5350) && !defined(MT7620)
-#define SYSCTL_SYSCFG_INIC_EE_SDRAM		(1<<29)
-#define SYSCTL_SYSCFG_INIC_8MB_SDRAM		(1<<28) 
-#define SYSCTL_SYSCFG_GE0_MODE_MASK		0x03000000
-#define SYSCTL_SYSCFG_GE0_MODE_SHIFT		24
-#define SYSCTL_SYSCFG_GE0_MODE_RGMII		0 /* RGMII Mode */
-#define SYSCTL_SYSCFG_GE0_MODE_MII		1 /* MII Mode */
-#define SYSCTL_SYSCFG_GE0_MODE_REV_MII		2 /*Reversed MII Mode*/
-#define SYSCTL_SYSCFG_BOOT_ADDR_1F00		(1<<22)
-#define SYSCTL_SYSCFG_BYPASS_PLL		(1<<21)
-#define SYSCTL_SYSCFG_BIG_ENDIAN		(1<<20)
-#define SYSCTL_SYSCFG_CPU_CLK_SEL_384MHZ	(1<<18)
-#define SYSCTL_SYSCFG_BOOT_FROM_MASK		0x00030000
-#define SYSCTL_SYSCFG_BOOT_FROM_SHIFT		16
-#define SYSCTL_SYSCFG_BOOT_FROM_FLASH16		0
-#define SYSCTL_SYSCFG_BOOT_FROM_FLASH8		1
-#define SYSCTL_SYSCFG_BOOT_FROM_NANDFLASH	2
-#define SYSCTL_SYSCFG_BOOT_FROM_ROM		3
-#define SYSCTL_SYSCFG_TEST_CODE_MASK		0x0000ff00
-#define SYSCTL_SYSCFG_TEST_CODE_SHIFT		8
-#define SYSCTL_SYSCFG_SRAM_CS_MODE_MASK		0x0000000c
-#define SYSCTL_SYSCFG_SRAM_CS_MODE_SHIFT	2
-#define SYSCTL_SYSCFG_SRAM_CS_MODE_SRAM		0
-#define SYSCTL_SYSCFG_SRAM_CS_MODE_WDOG_RST	1
-#define SYSCTL_SYSCFG_SRAM_CS_MODE_BT_COEX	2
-#define SYSCTL_SYSCFG_SDRAM_CLK_DRV		(1<<0) /* 8mA/12mA */
-#endif
-#ifdef RT5350
-#define SYSCTL1_SYSCFG_PULL_EN			(1<<26)
-#define SYSCTL1_SYSCFG_SDR_PAD_DRV_MASK		0x0700000
-#define SYSCTL1_SYSCFG_SDR_PAD_DRV_SHIFT	20
-#define SYSCTL1_SYSCFG_SDR_PAD_DRV_0		0
-#define SYSCTL1_SYSCFG_SDR_PAD_DRV_1		1
-#define SYSCTL1_SYSCFG_SDR_PAD_DRV_2		2
-#endif
-
-#define SYSCTL_SYSCFG1		0x14
-#define SYSCTL_SYSCFG1_USB0_HOST_MODE		(1 << 10)
-
-#define SYSCTL_TESTSTAT		0x18
-#define SYSCTL_TESTSTAT2	0x1C
-
-#define SYSCTL_CLKCFG0		0x2C
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_MASK		0xc0000000
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_SHIFT		30
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_ZERO_DELAY	0
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_1NS_DELAY		1
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_2NS_DELAY		2
-#define SYSCTL_CLKCFG0_SDRAM_CLK_SKEW_3NS_DELAY		3
-
-#define SYSCTL_CLKCFG1		0x30
-#if !defined(RT5350)
-#define SYSCTL_CLKCFG1_PBUS_DIV_CLK_BY2		(1<<30)
-#define SYSCTL_CLKCFG1_UPHY0_CLK_EN		(1<<25)
-#define SYSCTL_CLKCFG1_UPHY1_CLK_EN		(1<<22)
-#define SYSCTL_CLKCFG1_OTG_CLK_EN		(1<<18)
-#define SYSCTL_CLKCFG1_I2S_CLK_EN		(1<<15)
-#define SYSCTL_CLKCFG1_I2S_CLK_SEL_EXT		(1<<14)
-#define SYSCTL_CLKCFG1_I2S_CLK_DIV_MASK 		0x00003f00
-#define SYSCTL_CLKCFG1_I2S_CLK_DIV_SHIFT 	8
-#define SYSCTL_CLKCFG1_PCM_CLK_EN		(1<<7)
-#define SYSCTL_CLKCFG1_PCM_CLK_SEL_EXT 		(1<<6)
-#define SYSCTL_CLKCFG1_PCM_CLK_DIV_MASK 		0x0000003f
-#define SYSCTL_CLKCFG1_PCM_CLK_DIV_SHIFT 	0
-#endif
-#ifdef RT5350
-#define SYSCTL_CLKCFG1_SYSTICK_EN		(1<<29)
-#define SYSCTL_CLKCFG1_PDMA_CSR_CLK_GATE_BYP	(1<<23)
-#define SYSCTL_CLKCFG1_UPHY0_CLK_EN		(1<<18)
-#endif
-
-#define SYSCTL_RSTCTRL		0x34
-#define SYSCTL_RSTCTRL_ETHSW		(1<<23)
-#if !defined(MT7620) && !defined(RT5350)
-#define SYSCTL_RSTCTRL_OTG		(1<<22)
-#else
-#define SYSCTL_RSTCTRL_UPHY0		(1<<25)
-#define SYSCTL_RSTCTRL_UPHY1		(1<<22)
-#endif
-#define SYSCTL_RSTCTRL_FRENG		(1<<21)
-#define SYSCTL_RSTCTRL_WLAN		(1<<20)
-#define SYSCTL_RSTCTRL_UARTL		(1<<19)
-#define SYSCTL_RSTCTRL_SPI		(1<<18)
-#define SYSCTL_RSTCTRL_I2S		(1<<17)
-#define SYSCTL_RSTCTRL_I2C		(1<<16)
-#define SYSCTL_RSTCTRL_DMA		(1<<14)
-#define SYSCTL_RSTCTRL_PIO		(1<<13)
-#define SYSCTL_RSTCTRL_UART		(1<<12)
-#define SYSCTL_RSTCTRL_PCM		(1<<11)
-#define SYSCTL_RSTCTRL_MC		(1<<10)
-#define SYSCTL_RSTCTRL_INTC		(1<<9)
-#define SYSCTL_RSTCTRL_TIMER		(1<<8)
-#define SYSCTL_RSTCTRL_SYS		(1<<0)
-
-#define SYSCTL_RSTSTAT		0x38
-#define SYSCTL_RSTSTAT_SWCPURST		(1<<3)
-#define SYSCTL_RSTSTAT_SWSYSRST		(1<<2)
-#define SYSCTL_RSTSTAT_WDRST		(1<<1)
-
-#define SYSCTL_GPIOMODE		0x60
-#define SYSCTL_GPIOMODE_RGMII_GPIO_MODE		(1<<9)
-#define SYSCTL_GPIOMODE_SDRAM_GPIO_MODE  	(1<<8)
-#define SYSCTL_GPIOMODE_MDIO_GPIO_MODE   	(1<<7)
-#define SYSCTL_GPIOMODE_JTAG_GPIO_MODE   	(1<<6)
-#define SYSCTL_GPIOMODE_UARTL_GPIO_MODE  	(1<<5)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_UARTF		(0<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_PCM_UARTF	(1<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_PCM_I2S	(2<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_I2S_UARTF	(3<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_PCM_GPIO	(4<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_GPIO_UARTF	(5<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_GPIO_I2S	(6<<2)
-#define SYSCTL_GPIOMODE_UARTF_SHARE_MODE_GPIO		(7<<2)
-#define SYSCTL_GPIOMODE_SPI_GPIO_MODE    	(1<<1)
-#define SYSCTL_GPIOMODE_I2C_GPIO_MODE    	(1<<0)
-
-#define SYSCTL_MEMO0		0x68
-#define SYSCTL_MEMO1		0x6C
-
-#define SYSCTL_PPLL_CFG1	0x9C
-#define SYSCTL_PPLL_DRV		0xA0
-
-/* Timer */
-#define TIMER_TMRSTAT		0x00
-#define TIMER_TMRSTAT_TMR1RST	(1<<5)
-#define TIMER_TMRSTAT_TMR0RST	(1<<4)
-#define TIMER_TMRSTAT_TMR1INT	(1<<1)
-#define TIMER_TMRSTAT_TMR0INT	(1<<0)
-#define TIMER_TMR0LOAD		0x10
-#define TIMER_TMR0VAL		0x14
-#define TIMER_TMR0CTL		0x18
-#define TIMER_TMR1LOAD		0x20
-#define TIMER_TMR1VAL		0x24
-#define TIMER_TMR1CTL		0x28
-
-#define TIMER_TMRLOAD_TMR0LOAD_MASK	0xffff
-
-#define TIMER_TMRVAL_TMR0VAL_MASK	0xffff
-
-#define TIMER_TMRCTL_ENABLE		(1<<7)
-#define TIMER_TMRCTL_MODE_MASK		0x00000030
-#define TIMER_TMRCTL_MODE_SHIFT		4
-#define TIMER_TMRCTL_MODE_FREE		0
-#define TIMER_TMRCTL_MODE_PERIODIC	1
-#define TIMER_TMRCTL_MODE_TIMOUT	2
-#define TIMER_TMRCTL_MODE_TIMOUT3	3
-#define TIMER_TMRCTL_PRESCALE_MASK	0x0000000f
-#define TIMER_TMRCTL_PRESCALE_SHIFT	0
-#define TIMER_TMRCTL_PRESCALE_NONE	0
-#define TIMER_TMRCTL_PRESCALE_BY_4	1
-#define TIMER_TMRCTL_PRESCALE_BY_8	2
-#define TIMER_TMRCTL_PRESCALE_BY_16	3
-#define TIMER_TMRCTL_PRESCALE_BY_32	4
-#define TIMER_TMRCTL_PRESCALE_BY_64	5
-#define TIMER_TMRCTL_PRESCALE_BY_128	6
-#define TIMER_TMRCTL_PRESCALE_BY_256	7
-#define TIMER_TMRCTL_PRESCALE_BY_512	8
-#define TIMER_TMRCTL_PRESCALE_BY_1K	9
-#define TIMER_TMRCTL_PRESCALE_BY_2K	10
-#define TIMER_TMRCTL_PRESCALE_BY_4K	11
-#define TIMER_TMRCTL_PRESCALE_BY_8K	12
-#define TIMER_TMRCTL_PRESCALE_BY_16K	13
-#define TIMER_TMRCTL_PRESCALE_BY_32K	14
-#define TIMER_TMRCTL_PRESCALE_BY_64K	15
-
-/* Interrupt Controller */
-#define IC_IRQ0STAT		0x00
-#define IC_IRQ1STAT		0x04
-#define IC_INTTYPE		0x20
-#define IC_INTRAW		0x30
-#define IC_INT_ENA		0x34
-#define IC_INT_DIS		0x38
-
-#define IC_OTG		18
-#define IC_ETHSW	17
-#define IC_R2P		15
-#define IC_SDHC		14
-#define IC_UARTLITE	12
-#define IC_SPI		11
-#define IC_I2S		10
-#define IC_PERFC	9
-#define IC_NAND		8
-#define IC_DMA		7
-#define IC_PIO		6
-#define IC_UART		5
-#define IC_PCM		4
-#define IC_ILL_ACCESS	3
-#define IC_WDTIMER	2
-#define IC_TIMER0	1
-#define IC_SYSCTL	0
-
-#define IC_LINE_GLOBAL		(1<<31) /* Only for DIS/ENA regs */
-#define IC_LINE_OTG		(1<<18)
-#define IC_LINE_ETHSW		(1<<17)
-#define IC_LINE_UARTLITE	(1<<12)
-#define IC_LINE_I2S		(1<<10)
-#define IC_LINE_PERFC		(1<<9)
-#define IC_LINE_NAND		(1<<8)
-#define IC_LINE_DMA		(1<<7)
-#define IC_LINE_PIO		(1<<6)
-#define IC_LINE_UART		(1<<5)
-#define IC_LINE_PCM		(1<<4)
-#define IC_LINE_ILL_ACCESS	(1<<3)
-#define IC_LINE_WDTIMER		(1<<2)
-#define IC_LINE_TIMER0		(1<<1)
-#define IC_LINE_SYSCTL		(1<<0)
-
-#define IC_INT_MASK		0x000617ff
-
-/* GPIO */
-
-#define GPIO23_00_INT		0x00 /* Programmed I/O Int Status */
-#define GPIO23_00_EDGE		0x04 /* Programmed I/O Edge Status */
-#define GPIO23_00_RENA		0x08 /* Programmed I/O Int on Rising */
-#define GPIO23_00_FENA		0x0C /* Programmed I/O Int on Falling */
-#define GPIO23_00_DATA		0x20 /* Programmed I/O Data */
-#define GPIO23_00_DIR		0x24 /* Programmed I/O Direction */
-#define GPIO23_00_POL		0x28 /* Programmed I/O Pin Polarity */
-#define GPIO23_00_SET		0x2C /* Set PIO Data Bit */
-#define GPIO23_00_RESET		0x30 /* Clear PIO Data bit */
-#define GPIO23_00_TOG		0x34 /* Toggle PIO Data bit */
-
-#define GPIO39_24_INT		0x38
-#define GPIO39_24_EDGE		0x3c
-#define GPIO39_24_RENA		0x40
-#define GPIO39_24_FENA		0x44
-#define GPIO39_24_DATA		0x48
-#define GPIO39_24_DIR		0x4c
-#define GPIO39_24_POL		0x50
-#define GPIO39_24_SET		0x54
-#define GPIO39_24_RESET		0x58
-#define GPIO39_24_TOG		0x5c
-
-#define GPIO51_40_INT		0x60
-#define GPIO51_40_EDGE		0x64
-#define GPIO51_40_RENA		0x68
-#define GPIO51_40_FENA		0x6C
-#define GPIO51_40_DATA		0x70
-#define GPIO51_40_DIR		0x74
-#define GPIO51_40_POL		0x78
-#define GPIO51_40_SET		0x7C
-#define GPIO51_40_RESET		0x80
-#define GPIO51_40_TOG		0x84
-
-
-
-
-#define GDMA_CHANNEL_REQ0	0
-#define GDMA_CHANNEL_REQ1	1 /* (NAND-flash) */
-#define GDMA_CHANNEL_REQ2	2 /* (I2S) */
-#define GDMA_CHANNEL_REQ3	3 /* (PCM0-RX) */
-#define GDMA_CHANNEL_REQ4	4 /* (PCM1-RX) */
-#define GDMA_CHANNEL_REQ5	5 /* (PCM0-TX) */
-#define GDMA_CHANNEL_REQ6	6 /* (PCM1-TX) */
-#define GDMA_CHANNEL_REQ7	7
-#define GDMA_CHANNEL_MEM	8
-
-/* Generic DMA Controller */
-/* GDMA Channel n Source Address */
-#define GDMASA(n)		(0x00 + 0x10*n)
- /* GDMA Channel n Destination Address */
-#define GDMADA(n)		(0x04 + 0x10*n)
- /* GDMA Channel n Control Register 0 */
-#define GDMACT0(n)		(0x08 + 0x10*n)
-
-#define GDMACT0_TR_COUNT_MASK		0x0fff0000
-#define GDMACT0_TR_COUNT_SHIFT		16
-#define GDMACT0_SRC_CHAN_SHIFT		12
-#define GDMACT0_SRC_CHAN_MASK		0x0000f000
-#define GDMACT0_DST_CHAN_SHIFT		8
-#define GDMACT0_DST_CHAN_MASK		0x00000f00
-#define GDMACT0_SRC_BURST_MODE		(1<<7)
-#define GDMACT0_DST_BURST_MODE		(1<<6)
-#define GDMACT0_BURST_SIZE_SHIFT	3
-#define GDMACT0_BURST_SIZE_MASK		0x00000038
-#define GDMACT0_BURST_SIZE_1		0
-#define GDMACT0_BURST_SIZE_2		1
-#define GDMACT0_BURST_SIZE_4		2
-#define GDMACT0_BURST_SIZE_8		3
-#define GDMACT0_BURST_SIZE_16		4
-
-#define GDMACT0_DONE_INT_EN		(1<<2)
-#define GDMACT0_CHAN_EN			(1<<1)
-/*
- * In software mode, the data transfer will start when the Channel Enable bit
- * is set.
- * In hardware mode, the data transfer will start when the DMA Request is
- * asserted.
-*/
-#define GDMACT0_SWMODE			(1<<0)
-
-/* SPI controller interface */
- 
-#define	RT305X_SPISTAT		0x00
-/* SPIBUSY is alias for SPIBUSY, because SPISTAT have only BUSY bit*/
-#define	RT305X_SPIBUSY		RT305X_SPISTAT
- 
-#define	RT305X_SPICFG		0x10
-#define		MSBFIRST		(1<<8)
-#define		SPICLKPOL		(1<<6)
-#define		CAPT_ON_CLK_FALL	(1<<5)
-#define		TX_ON_CLK_FALL		(1<<4)
-#define		HIZSPI			(1<<3) /* Set SPI pins to Tri-state */
-#define		SPI_CLK_SHIFT		0	/* SPI clock divide control */
-#define		SPI_CLK_MASK		0x00000007
-#define		SPI_CLK_DIV2		0
-#define		SPI_CLK_DIV4		1
-#define		SPI_CLK_DIV8		2
-#define		SPI_CLK_DIV16		3
-#define		SPI_CLK_DIV32		4
-#define		SPI_CLK_DIV64		5
-#define		SPI_CLK_DIV128		6
-#define		SPI_CLK_DISABLED	7
- 
-#define	RT305X_SPICTL		0x14
-#define		HIZSMOSI		(1<<3)
-#define		START_WRITE		(1<<2)
-#define		START_READ		(1<<1)
-#define		CS_HIGH			(1<<0)
-
-#define	RT305X_SPIDATA		0x20
-#define		SPIDATA_MASK		0x000000ff
-
-#define	RT305X_SPI_WRITE	1
-#define	RT305X_SPI_READ		0
-
-#endif /* _RT305XREG_H_ */
diff --git a/sys/mips/rt305x/rt_swreg.h b/sys/mips/rt305x/rt_swreg.h
deleted file mode 100644
index 9690953403d..00000000000
--- a/sys/mips/rt305x/rt_swreg.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _RT_SWREG_H_
-#define _RT_SWREG_H_
-
-/* XXX: must move to config */
-#define RT3052F
-
-#define RT_SW_BASE	0x10110000
-
-#define RT_SW_ISR		0x00
-
-#define 	WATCHDOG1_TMR_EXPIRED	(1<<29)
-#define 	WATCHDOG0_TMR_EXPIRED	(1<<28)
-#define 	HAS_INTRUDER		(1<<27)
-#define 	PORT_ST_CHG		(1<<26)
-#define 	BC_STORM		(1<<25)
-#define 	MUST_DROP_LAN		(1<<24)
-#define 	GLOBAL_QUE_FULL		(1<<23)
-#define 	LAN_QUE_FULL6		(1<<20)
-#define 	LAN_QUE_FULL5		(1<<19)
-#define 	LAN_QUE_FULL4		(1<<18)
-#define 	LAN_QUE_FULL3		(1<<17)
-#define 	LAN_QUE_FULL2		(1<<16)
-#define 	LAN_QUE_FULL1		(1<<15)
-#define 	LAN_QUE_FULL0		(1<<14)
-
-#define RT_SW_IMR		0x04
-
-#define RT_SW_FCT0		0x08
-#define RT_SW_FCT1		0x0c
-#define RT_SW_PFC0		0x10
-#define RT_SW_PFC1		0x14
-#define RT_SW_PFC2		0x18
-#define RT_SW_GQS0		0x1c
-#define RT_SW_GQS1		0x20
-#define RT_SW_ATS		0x24
-#define RT_SW_ATS0		0x28
-#define RT_SW_ATS1		0x2c
-#define RT_SW_ATS2		0x30
-#define RT_SW_WMAD0		0x34
-#define RT_SW_WMAD1		0x38
-#define RT_SW_WMAD2		0x3c
-#define RT_SW_PVIDC0		0x40
-#define RT_SW_PVIDC1		0x44
-#define RT_SW_PVIDC2		0x48
-#define RT_SW_PVIDC3		0x4c
-#define RT_SW_VID0		0x50
-#define RT_SW_VID1		0x54
-#define RT_SW_VID2		0x58
-#define RT_SW_VID3		0x5c
-#define RT_SW_VID4		0x60
-#define RT_SW_VID5		0x64
-#define RT_SW_VID6		0x68
-#define RT_SW_VID7		0x6c
-#define RT_SW_VMSC0		0x70
-#define RT_SW_VMSC1		0x74
-#define RT_SW_VMSC2		0x78
-#define RT_SW_VMSC3		0x7c
-#define RT_SW_POA		0x80
-#define RT_SW_FPA		0x84
-#define RT_SW_PTS		0x88
-#define RT_SW_SOCPC		0x8c
-#define RT_SW_POC0		0x90
-#define RT_SW_POC1		0x94
-#define RT_SW_POC2		0x98
-#define RT_SW_SGC		0x9c
-#define RT_SW_STRT		0xa0
-#define RT_SW_LEDP0		0xa4
-#define RT_SW_LEDP1		0xa8
-#define RT_SW_LEDP2		0xac
-#define RT_SW_LEDP3		0xb0
-#define RT_SW_LEDP4		0xb4
-#define RT_SW_WDTR		0xb8
-#define RT_SW_DES		0xbc
-#define RT_SW_PCR0		0xc0
-#define RT_SW_PCR1		0xc4
-#define RT_SW_FPA		0xc8
-#define RT_SW_FCT2		0xcc
-#define RT_SW_QSS0		0xd0
-
-#define RT_SW_QSS1		0xd4
-#define RT_SW_DEC		0xd8
-#define 	BRIDGE_IPG_SHIFT	24
-#define 	DEBUG_SW_PORT_SEL_SHIFT	3
-#define 	DEBUG_SW_PORT_SEL_MASK	0x00000038
-
-#define RT_SW_MTI		0xdc
-#define 	SKIP_BLOCKS_SHIFT	7
-#define 	SKIP_BLOCKS_MASK	0x0000ff80
-#define 	SW_RAM_TEST_DONE	(1<<6)
-#define 	AT_RAM_TEST_DONE	(1<<5)
-#define 	AT_RAM_TEST_FAIL	(1<<4)
-#define 	LK_RAM_TEST_DONE	(1<<3)
-#define 	LK_RAM_TEST_FAIL	(1<<2)
-#define 	DT_RAM_TEST_DONE	(1<<1)
-#define 	DT_RAM_TEST_FAIL	(1<<0)
-
-#define RT_SW_PPC		0xe0
-#define 	SW2FE_CNT_SHIFT		16
-#define 	FE2SW_CNT_SHIFT		0
-
-#define RT_SW_SGC2		0xe4
-#define 	FE2SW_WL_FC_EN	(1<<30)
-#define 	LAN_PMAP_P0_IS_LAN		(1<<24)
-#define 	LAN_PMAP_P1_IS_LAN		(1<<25)
-#define 	LAN_PMAP_P2_IS_LAN		(1<<26)
-#define 	LAN_PMAP_P3_IS_LAN		(1<<27)
-#define 	LAN_PMAP_P4_IS_LAN		(1<<28)
-#define 	LAN_PMAP_P5_IS_LAN		(1<<29)
-/* Transmit CPU TPID(810x) port bit map */
-#define 	TX_CPU_TPID_BIT_MAP_SHIFT	16
-#define 	TX_CPU_TPID_BIT_MAP_MASK	0x007f0000
-#define 	ARBITER_LAN_EN			(1<<11)
-#define 	CPU_TPID_EN			(1<<10)
-#define 	P0_DOUBLE_TAG_EN		(1<<0)
-#define 	P1_DOUBLE_TAG_EN		(1<<1)
-#define 	P2_DOUBLE_TAG_EN		(1<<2)
-#define 	P3_DOUBLE_TAG_EN		(1<<3)
-#define 	P4_DOUBLE_TAG_EN		(1<<4)
-#define 	P5_DOUBLE_TAG_EN		(1<<5)
-
-#define RT_SW_P0PC		0xe8
-#define RT_SW_P1PC		0xec
-#define RT_SW_P2PC		0xf0
-#define RT_SW_P3PC		0xf4
-#define RT_SW_P4PC		0xf8
-#define RT_SW_P5PC		0xfc
-#define 	BAD_PCOUNT_SHIFT	16
-#define 	BAD_PCOUNT_MASK		0xffff0000
-#define 	GOOD_PCOUNT_SHIFT	0
-#define 	GOOD_PCOUNT_MASK	0x0000ffff
-
-#endif /* _RT_SWREG_H_ */
diff --git a/sys/mips/rt305x/std.rt305x b/sys/mips/rt305x/std.rt305x
deleted file mode 100644
index d0e09b3b6b0..00000000000
--- a/sys/mips/rt305x/std.rt305x
+++ /dev/null
@@ -1,7 +0,0 @@
-# $FreeBSD$
-# Standard include file for RT305XF SoC
-
-files	"../rt305x/files.rt305x"
-
-cpu		CPU_MIPS24K
-
diff --git a/sys/mips/rt305x/uart_bus_rt305x.c b/sys/mips/rt305x/uart_bus_rt305x.c
deleted file mode 100644
index 84ab9aa2ae1..00000000000
--- a/sys/mips/rt305x/uart_bus_rt305x.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/rt305x/rt305xreg.h>
-
-#include "uart_if.h"
-
-static int uart_rt305x_probe(device_t dev);
-
-extern struct uart_class uart_rt305x_uart_class;
-
-static device_method_t uart_rt305x_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_rt305x_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_rt305x_driver = {
-	uart_driver_name,
-	uart_rt305x_methods,
-	sizeof(struct uart_softc),
-};
-
-static int
-uart_rt305x_probe(device_t dev)
-{
-	struct uart_softc *sc;
-
-	sc = device_get_softc(dev);
-	sc->sc_class = &uart_rt305x_uart_class;
-	sc->sc_bas.regshft = 2;
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = 
-	    MIPS_PHYS_TO_KSEG1(device_get_unit(dev)?UARTLITE_BASE:UART_BASE);
-
-	return (uart_bus_probe(dev, 2, 0, SYSTEM_CLOCK, 0, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_rt305x_driver, uart_devclass, 0, 0);
-
diff --git a/sys/mips/rt305x/uart_cpu_rt305x.c b/sys/mips/rt305x/uart_cpu_rt305x.c
deleted file mode 100644
index 0a6c4e4af15..00000000000
--- a/sys/mips/rt305x/uart_cpu_rt305x.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/rt305x/rt305xreg.h>
-
-extern struct uart_class uart_rt305x_uart_class;
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	di->ops = uart_getops(&uart_rt305x_uart_class);
-	di->bas.chan = 0;
-	di->bas.bst = mips_bus_space_generic;
-	di->bas.regshft = 2;
-	di->bas.rclk = SYSTEM_CLOCK;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = mips_bus_space_generic;
-#ifdef RT305X_USE_UART
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART_BASE);
-#else
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(UARTLITE_BASE);
-#endif
-	return (0);
-}
diff --git a/sys/mips/rt305x/uart_dev_rt305x.c b/sys/mips/rt305x/uart_dev_rt305x.c
deleted file mode 100644
index e52c4e47e46..00000000000
--- a/sys/mips/rt305x/uart_dev_rt305x.c
+++ /dev/null
@@ -1,535 +0,0 @@
-/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * Copyright (c) 2007 Oleksandr Tymoshenko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-#include <sys/sysctl.h>
-#include <sys/kernel.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/rt305x/uart_dev_rt305x.h>
-#include <mips/rt305x/rt305xreg.h>
-
-#include "uart_if.h"
-/*
- * Low-level UART interface.
- */
-static int rt305x_uart_probe(struct uart_bas *bas);
-static void rt305x_uart_init(struct uart_bas *bas, int, int, int, int);
-static void rt305x_uart_term(struct uart_bas *bas);
-static void rt305x_uart_putc(struct uart_bas *bas, int);
-static int rt305x_uart_rxready(struct uart_bas *bas);
-static int rt305x_uart_getc(struct uart_bas *bas, struct mtx *);
-
-static struct uart_ops uart_rt305x_uart_ops = {
-	.probe = rt305x_uart_probe,
-	.init = rt305x_uart_init,
-	.term = rt305x_uart_term,
-	.putc = rt305x_uart_putc,
-	.rxready = rt305x_uart_rxready,
-	.getc = rt305x_uart_getc,
-};
-
-static int	uart_output = 1;
-SYSCTL_INT(_kern, OID_AUTO, uart_output, CTLFLAG_RWTUN,
-    &uart_output, 0, "UART output enabled.");
-
-static int
-rt305x_uart_probe(struct uart_bas *bas)
-{
-
-	return (0);
-}
-
-static void
-rt305x_uart_init(struct uart_bas *bas, int baudrate, int databits, 
-    int stopbits, int parity)
-{
-#ifdef notyet
-        /* CLKDIV  = 384000000/ 3/ 16/ br */
-        /* for 384MHz CLKDIV = 8000000 / baudrate; */
-        switch (databits) {
-        case 5:
-    		databits = UART_LCR_5B;
-    		break;
-        case 6:
-    		databits = UART_LCR_6B;
-    		break;
-        case 7:
-    		databits = UART_LCR_7B;
-    		break;
-        case 8:
-    		databits = UART_LCR_8B;
-    		break;
-    	default:
-    		/* Unsupported */
-    		return;
-        }
-	switch (parity) {
-	case UART_PARITY_EVEN:	parity = (UART_LCR_PEN|UART_LCR_EVEN); break;
-	case UART_PARITY_NONE:	parity = (UART_LCR_PEN); break;
-	case UART_PARITY_ODD:	parity = 0; break;
-	/* Unsupported */
-	default:		return;
-	}
-        uart_setreg(bas, UART_CDDL_REG, 8000000/baudrate);
-	uart_barrier(bas);
-        uart_setreg(bas, UART_LCR_REG, databits | (stopbits==1?0:4) | parity);
-	uart_barrier(bas);
-#endif
-}
-
-static void
-rt305x_uart_term(struct uart_bas *bas)
-{
-        uart_setreg(bas, UART_MCR_REG, 0);
-	uart_barrier(bas);
-}
-
-static void
-rt305x_uart_putc(struct uart_bas *bas, int c)
-{
-	char chr;
-	if (!uart_output) return;
-	chr = c;
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE));
-	uart_setreg(bas, UART_TX_REG, c);
-	uart_barrier(bas);
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE));
-}
-
-static int
-rt305x_uart_rxready(struct uart_bas *bas)
-{
-#ifdef notyet
-	if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)
-		return (1);
-
-	return (0);
-#else
-	return (1);
-#endif
-}
-
-static int
-rt305x_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
-{
-	int c;
-
-	uart_lock(hwmtx);
-
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) {
-		uart_unlock(hwmtx);
-		DELAY(10);
-		uart_lock(hwmtx);
-	}
-
-	c = uart_getreg(bas, UART_RX_REG);
-
-	uart_unlock(hwmtx);
-
-	return (c);
-}
-
-/*
- * High-level UART interface.
- */
-struct rt305x_uart_softc {
-	struct uart_softc base;
-};
-
-static int rt305x_uart_bus_attach(struct uart_softc *);
-static int rt305x_uart_bus_detach(struct uart_softc *);
-static int rt305x_uart_bus_flush(struct uart_softc *, int);
-static int rt305x_uart_bus_getsig(struct uart_softc *);
-static int rt305x_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int rt305x_uart_bus_ipend(struct uart_softc *);
-static int rt305x_uart_bus_param(struct uart_softc *, int, int, int, int);
-static int rt305x_uart_bus_probe(struct uart_softc *);
-static int rt305x_uart_bus_receive(struct uart_softc *);
-static int rt305x_uart_bus_setsig(struct uart_softc *, int);
-static int rt305x_uart_bus_transmit(struct uart_softc *);
-static void rt305x_uart_bus_grab(struct uart_softc *);
-static void rt305x_uart_bus_ungrab(struct uart_softc *);
-
-static kobj_method_t rt305x_uart_methods[] = {
-	KOBJMETHOD(uart_attach,		rt305x_uart_bus_attach),
-	KOBJMETHOD(uart_detach,		rt305x_uart_bus_detach),
-	KOBJMETHOD(uart_flush,		rt305x_uart_bus_flush),
-	KOBJMETHOD(uart_getsig,		rt305x_uart_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		rt305x_uart_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		rt305x_uart_bus_ipend),
-	KOBJMETHOD(uart_param,		rt305x_uart_bus_param),
-	KOBJMETHOD(uart_probe,		rt305x_uart_bus_probe),
-	KOBJMETHOD(uart_receive,	rt305x_uart_bus_receive),
-	KOBJMETHOD(uart_setsig,		rt305x_uart_bus_setsig),
-	KOBJMETHOD(uart_transmit,	rt305x_uart_bus_transmit),
-	KOBJMETHOD(uart_grab,		rt305x_uart_bus_grab),
-	KOBJMETHOD(uart_ungrab,		rt305x_uart_bus_ungrab),
-	{ 0, 0 }
-};
-
-struct uart_class uart_rt305x_uart_class = {
-	"rt305x",
-	rt305x_uart_methods,
-	sizeof(struct rt305x_uart_softc),
-	.uc_ops = &uart_rt305x_uart_ops,
-	.uc_range = 1, /* use hinted range */
-	.uc_rclk = SYSTEM_CLOCK,
-	.uc_rshift = 0
-};
-
-#define	SIGCHG(c, i, s, d)				\
-	if (c) {					\
-		i |= (i & s) ? s : s | d;		\
-	} else {					\
-		i = (i & s) ? (i & ~s) | d : i;		\
-	}
-
-/*
- * Disable TX interrupt. uart should be locked 
- */ 
-static __inline void
-rt305x_uart_disable_txintr(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint8_t cr;
-
-	cr = uart_getreg(bas, UART_IER_REG);
-	cr &= ~UART_IER_ETBEI;
-	uart_setreg(bas, UART_IER_REG, cr);
-	uart_barrier(bas);
-}
-
-/*
- * Enable TX interrupt. uart should be locked 
- */ 
-static __inline void
-rt305x_uart_enable_txintr(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint8_t cr;
-
-	cr = uart_getreg(bas, UART_IER_REG);
-	cr |= UART_IER_ETBEI;
-	uart_setreg(bas, UART_IER_REG, cr);
-	uart_barrier(bas);
-}
-
-static int
-rt305x_uart_bus_attach(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	struct uart_devinfo *di;
-
-	bas = &sc->sc_bas;
-	if (sc->sc_sysdev != NULL) {
-		di = sc->sc_sysdev;
-		rt305x_uart_init(bas, di->baudrate, di->databits, di->stopbits,
-		    di->parity);
-	} else {
-		rt305x_uart_init(bas, 115200, 8, 1, 0);
-	}
-
-	(void)rt305x_uart_bus_getsig(sc);
-
-	/* Enable FIFO */
-	uart_setreg(bas, UART_FCR_REG, 
-	    uart_getreg(bas, UART_FCR_REG) | 
-	    UART_FCR_FIFOEN | UART_FCR_TXTGR_1 | UART_FCR_RXTGR_1);
- 	uart_barrier(bas);
-	/* Enable interrupts */
-	uart_setreg(bas, UART_IER_REG,
-	    UART_IER_EDSSI | UART_IER_ELSI | UART_IER_ERBFI);
-	uart_barrier(bas);
-
-	return (0);
-}
-
-static int
-rt305x_uart_bus_detach(struct uart_softc *sc)
-{
-
-	return (0);
-}
-
-static int
-rt305x_uart_bus_flush(struct uart_softc *sc, int what)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t fcr = uart_getreg(bas, UART_FCR_REG);
-	if (what & UART_FLUSH_TRANSMITTER) {
-		uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_TXRST);
-		uart_barrier(bas);
-	}
-	if (what & UART_FLUSH_RECEIVER) {
-		uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_RXRST);
-		uart_barrier(bas);
-	}
-	uart_setreg(bas, UART_FCR_REG, fcr);
-	uart_barrier(bas);
-	return (0);
-}
-
-static int
-rt305x_uart_bus_getsig(struct uart_softc *sc)
-{
-	uint32_t new, old, sig;
-	uint8_t bes;
-
-	do {
-		old = sc->sc_hwsig;
-		sig = old;
-		uart_lock(sc->sc_hwmtx);
-		bes = uart_getreg(&sc->sc_bas, UART_MSR_REG);
-		uart_unlock(sc->sc_hwmtx);
-		/* XXX: chip can show delta */
-		SIGCHG(bes & UART_MSR_CTS, sig, SER_CTS, SER_DCTS);
-		SIGCHG(bes & UART_MSR_DCD, sig, SER_DCD, SER_DDCD);
-		SIGCHG(bes & UART_MSR_DSR, sig, SER_DSR, SER_DDSR);
-		new = sig & ~SER_MASK_DELTA;
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-
-	return (sig);
-}
-
-static int
-rt305x_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
-{
-	struct uart_bas *bas;
-	int baudrate, divisor, error;
-
-	bas = &sc->sc_bas;
-	error = 0;
-	uart_lock(sc->sc_hwmtx);
-	switch (request) {
-	case UART_IOCTL_BREAK:
-		/* TODO: Send BREAK */
-		break;
-	case UART_IOCTL_BAUD:
-		divisor = uart_getreg(bas, UART_CDDL_REG);
-		baudrate = bas->rclk / (divisor * 16);
-		*(int*)data = baudrate;
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-rt305x_uart_bus_ipend(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int ipend;
-	uint8_t iir, lsr, msr;
-
-	bas = &sc->sc_bas;
-	ipend = 0;
-
-	uart_lock(sc->sc_hwmtx);
-	iir = uart_getreg(&sc->sc_bas, UART_IIR_REG);
-	lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG);
-	uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr);
-	msr = uart_getreg(&sc->sc_bas, UART_MSR_REG);
-	uart_setreg(&sc->sc_bas, UART_MSR_REG, msr);
-	if (iir & UART_IIR_INTP) {
-		uart_unlock(sc->sc_hwmtx);
-		return (0);
-	}
-
-
-	switch ((iir >> 1) & 0x07) {
-	case UART_IIR_ID_THRE:
-		ipend |= SER_INT_TXIDLE;
-		break;
-	case UART_IIR_ID_DR2:
-		rt305x_uart_bus_flush(sc, UART_FLUSH_RECEIVER);
-		/* passthrough */
-	case UART_IIR_ID_DR:
-		ipend |= SER_INT_RXREADY;
-		break;
-	case UART_IIR_ID_MST:
-	case UART_IIR_ID_LINESTATUS:
-		ipend |= SER_INT_SIGCHG;
-		if (lsr & UART_LSR_BI)
-		{
-			ipend |= SER_INT_BREAK;
-#ifdef KDB
-			breakpoint();
-#endif
-		}
-		if (lsr & UART_LSR_OE)
-			ipend |= SER_INT_OVERRUN;
-		break;
-	default:
-		/* XXX: maybe return error here */
-		break;
-	}
-
-	uart_unlock(sc->sc_hwmtx);
-
-	return (ipend);
-}
-
-static int
-rt305x_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
-    int stopbits, int parity)
-{
-	uart_lock(sc->sc_hwmtx);
-	rt305x_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity);
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-rt305x_uart_bus_probe(struct uart_softc *sc)
-{
-	char buf[80];
-	int error;
-
-	error = rt305x_uart_probe(&sc->sc_bas);
-	if (error)
-		return (error);
-
-	sc->sc_rxfifosz = 16;
-	sc->sc_txfifosz = 16;
-
-	snprintf(buf, sizeof(buf), "rt305x_uart");
-	device_set_desc_copy(sc->sc_dev, buf);
-
-	return (0);
-}
-
-static int
-rt305x_uart_bus_receive(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int xc;
-	uint8_t lsr;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	lsr = uart_getreg(bas, UART_LSR_REG);
-	while ((lsr & UART_LSR_DR)) {
-		if (uart_rx_full(sc)) {
-			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
-			break;
-		}
-		xc = 0;
-		xc = uart_getreg(bas, UART_RX_REG);
-		if (lsr & UART_LSR_FE)
-			xc |= UART_STAT_FRAMERR;
-		if (lsr & UART_LSR_PE)
-			xc |= UART_STAT_PARERR;
-		if (lsr & UART_LSR_OE)
-			xc |= UART_STAT_OVERRUN;
-		uart_barrier(bas);
-		uart_rx_put(sc, xc);
-		lsr = uart_getreg(bas, UART_LSR_REG);
-	}
-
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-rt305x_uart_bus_setsig(struct uart_softc *sc, int sig)
-{
-
-	/* TODO: implement (?) */
-	return (0);
-}
-
-static int
-rt305x_uart_bus_transmit(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	int i;
-
-	if (!uart_output) return (0);
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	while ((uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE) == 0)
-		;
-	rt305x_uart_enable_txintr(sc);
-	for (i = 0; i < sc->sc_txdatasz; i++) {
-		uart_setreg(bas, UART_TX_REG, sc->sc_txbuf[i]);
-		uart_barrier(bas);
-	}
-	sc->sc_txbusy = 1;
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static void
-rt305x_uart_bus_grab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-
-	/* disable interrupts -- XXX not sure which one is RX, so kill them all */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(bas, UART_IER_REG, 0);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
-
-static void
-rt305x_uart_bus_ungrab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-
-	/* Enable interrupts */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(bas, UART_IER_REG,
-	    UART_IER_EDSSI | UART_IER_ELSI | UART_IER_ERBFI);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
diff --git a/sys/mips/rt305x/uart_dev_rt305x.h b/sys/mips/rt305x/uart_dev_rt305x.h
deleted file mode 100644
index 203a8d1d1dd..00000000000
--- a/sys/mips/rt305x/uart_dev_rt305x.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_RT305XUART_H
-#define	_RT305XUART_H
-
-#undef	uart_getreg
-#undef	uart_setreg
-#define	uart_getreg(bas, reg)		\
-	bus_space_read_4((bas)->bst, (bas)->bsh, reg)
-#define	uart_setreg(bas, reg, value)	\
-	bus_space_write_4((bas)->bst, (bas)->bsh, reg, value)
-
-/* UART registers */
-#define	UART_RX_REG	0x00
-#define	UART_TX_REG	0x04
-
-#define	UART_IER_REG	0x08
-#define		UART_IER_EDSSI		(1<<3) /* Only full UART */
-#define		UART_IER_ELSI		(1<<2)
-#define		UART_IER_ETBEI		(1<<1)
-#define		UART_IER_ERBFI		(1<<0)
-
-#define	UART_IIR_REG	0x0c
-#define		UART_IIR_RXFIFO		(1<<7)
-#define		UART_IIR_TXFIFO		(1<<6)
-#define		UART_IIR_ID_MST		0
-#define		UART_IIR_ID_THRE	1
-#define		UART_IIR_ID_DR		2
-#define		UART_IIR_ID_LINESTATUS	3
-#define		UART_IIR_ID_DR2		6
-#define		UART_IIR_ID_SHIFT	1
-#define		UART_IIR_ID_MASK	0x0000000e
-#define		UART_IIR_INTP		(1<<0)
-
-#define	UART_FCR_REG	0x10
-#define		UART_FCR_RXTGR_1	(0<<6)
-#define		UART_FCR_RXTGR_4	(1<<6)
-#define		UART_FCR_RXTGR_8	(2<<6)
-#define		UART_FCR_RXTGR_12	(3<<6)
-#define		UART_FCR_TXTGR_1	(0<<4)
-#define		UART_FCR_TXTGR_4	(1<<4)
-#define		UART_FCR_TXTGR_8	(2<<4)
-#define		UART_FCR_TXTGR_12	(3<<4)
-#define		UART_FCR_DMA		(1<<3)
-#define		UART_FCR_TXRST		(1<<2)
-#define		UART_FCR_RXRST		(1<<1)
-#define		UART_FCR_FIFOEN		(1<<0)
-
-#define	UART_LCR_REG	0x14
-#define		UART_LCR_DLAB	(1<<7)
-#define		UART_LCR_BRK	(1<<6)
-#define		UART_LCR_FPAR	(1<<5)
-#define		UART_LCR_EVEN	(1<<4)
-#define		UART_LCR_PEN	(1<<3)
-#define		UART_LCR_STB_15	(1<<2)
-#define		UART_LCR_5B	0
-#define		UART_LCR_6B	1
-#define		UART_LCR_7B	2
-#define		UART_LCR_8B	3
-
-#define	UART_MCR_REG	0x18
-#define		UART_MCR_LOOP	(1<<4)
-#define		UART_MCR_OUT2_L	(1<<3) /* Only full UART */
-#define		UART_MCR_OUT1_L	(1<<2) /* Only full UART */
-#define		UART_MCR_RTS_L	(1<<1) /* Only full UART */
-#define		UART_MCR_DTR_L	(1<<0) /* Only full UART */
-
-#define	UART_LSR_REG	0x1c
-#define		UART_LSR_ERINF	(1<<7)
-#define		UART_LSR_TEMT	(1<<6)
-#define		UART_LSR_THRE	(1<<5)
-#define		UART_LSR_BI	(1<<4)
-#define		UART_LSR_FE	(1<<3)
-#define		UART_LSR_PE	(1<<2)
-#define		UART_LSR_OE	(1<<1)
-#define		UART_LSR_DR	(1<<0)
-
-#define	UART_MSR_REG	0x20 	/* Only full UART */
-#define		UART_MSR_DCD	(1<<7) /* Only full UART */
-#define		UART_MSR_RI	(1<<6) /* Only full UART */
-#define		UART_MSR_DSR	(1<<5) /* Only full UART */
-#define		UART_MSR_CTS	(1<<4) /* Only full UART */
-#define		UART_MSR_DDCD	(1<<3) /* Only full UART */
-#define		UART_MSR_TERI	(1<<2) /* Only full UART */
-#define		UART_MSR_DDSR	(1<<1) /* Only full UART */
-#define		UART_MSR_DCTS	(1<<0) /* Only full UART */
-
-#define	UART_CDDL_REG	0x28
-#define	UART_CDDLL_REG	0x2c
-#define	UART_CDDLH_REG	0x30
-
-#define	UART_IFCTL_REG	0x34
-#define		UART_IFCTL_IFCTL	(1<<0)
-
-int	uart_cnattach(void);
-#endif	/* _RT305XUART_H */
diff --git a/sys/modules/Makefile b/sys/modules/Makefile
index b3d23a958db..25e08ff93e4 100644
--- a/sys/modules/Makefile
+++ b/sys/modules/Makefile
@@ -115,7 +115,6 @@ SUBDIR=	\
 	dummynet \
 	${_ed} \
 	${_efirt} \
-	${_elink} \
 	${_em} \
 	${_ena} \
 	${_ep} \
@@ -742,7 +741,6 @@ _coff=		coff
 .if ${MK_SOURCELESS_UCODE} != "no"
 _cp=		cp
 .endif
-_elink=		elink
 _glxiic=	glxiic
 _glxsb=		glxsb
 #_ibcs2=		ibcs2
diff --git a/sys/modules/elink/Makefile b/sys/modules/elink/Makefile
deleted file mode 100644
index 78ccd947940..00000000000
--- a/sys/modules/elink/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# $FreeBSD$
-#
-
-.PATH:	${SRCTOP}/sys/i386/isa
-
-KMOD=		elink
-SRCS=		elink.c
-EXPORT_SYMS=	elink_reset elink_idseq
-
-.include <bsd.kmod.mk>
diff --git a/sys/modules/ep/Makefile b/sys/modules/ep/Makefile
index c91c38784f4..78d0173c21a 100644
--- a/sys/modules/ep/Makefile
+++ b/sys/modules/ep/Makefile
@@ -7,6 +7,9 @@ SYSDIR?=${SRCTOP}/sys
 
 KMOD=	if_ep
 SRCS=	if_ep.c
+.if ${MACHINE_CPUARCH} == "i386"
+SRCS+=	elink.c
+.endif
 SRCS+=	if_ep_pccard.c pccarddevs.h card_if.h
 SRCS+=	if_ep_isa.c isa_if.h
 SRCS+=	bus_if.h device_if.h
diff --git a/sys/net/if_lagg.c b/sys/net/if_lagg.c
index 0765400d37c..07baf56aa7a 100644
--- a/sys/net/if_lagg.c
+++ b/sys/net/if_lagg.c
@@ -244,7 +244,7 @@ SYSCTL_INT(_net_link_lagg, OID_AUTO, failover_rx_all, CTLFLAG_RW | CTLFLAG_VNET,
     "Accept input from any interface in a failover lagg");
 
 /* Default value for using flowid */
-static VNET_DEFINE(int, def_use_flowid) = 1;
+static VNET_DEFINE(int, def_use_flowid) = 0;
 #define	V_def_use_flowid	VNET(def_use_flowid)
 SYSCTL_INT(_net_link_lagg, OID_AUTO, default_use_flowid, CTLFLAG_RWTUN,
     &VNET_NAME(def_use_flowid), 0,
diff --git a/sys/net/if_vxlan.c b/sys/net/if_vxlan.c
index 5c1dd551131..53be5af62b1 100644
--- a/sys/net/if_vxlan.c
+++ b/sys/net/if_vxlan.c
@@ -68,10 +68,12 @@ __FBSDID("$FreeBSD$");
 #include <netinet/ip.h>
 #include <netinet/ip6.h>
 #include <netinet/ip_var.h>
-#include <netinet6/ip6_var.h>
 #include <netinet/udp.h>
 #include <netinet/udp_var.h>
 
+#include <netinet6/ip6_var.h>
+#include <netinet6/scope6_var.h>
+
 struct vxlan_softc;
 LIST_HEAD(vxlan_softc_head, vxlan_softc);
 
@@ -215,9 +217,9 @@ static void	vxlan_ftable_fini(struct vxlan_softc *);
 static void	vxlan_ftable_flush(struct vxlan_softc *, int);
 static void	vxlan_ftable_expire(struct vxlan_softc *);
 static int	vxlan_ftable_update_locked(struct vxlan_softc *,
-		    const struct sockaddr *, const uint8_t *,
+		    const union vxlan_sockaddr *, const uint8_t *,
 		    struct rm_priotracker *);
-static int	vxlan_ftable_update(struct vxlan_softc *,
+static int	vxlan_ftable_learn(struct vxlan_softc *,
 		    const struct sockaddr *, const uint8_t *);
 static int	vxlan_ftable_sysctl_dump(SYSCTL_HANDLER_ARGS);
 
@@ -358,6 +360,7 @@ static void	vxlan_sockaddr_in_copy(union vxlan_sockaddr *,
 static int	vxlan_sockaddr_supported(const union vxlan_sockaddr *, int);
 static int	vxlan_sockaddr_in_any(const union vxlan_sockaddr *);
 static int	vxlan_sockaddr_in_multicast(const union vxlan_sockaddr *);
+static int	vxlan_sockaddr_in6_embedscope(union vxlan_sockaddr *);
 
 static int	vxlan_can_change_config(struct vxlan_softc *);
 static int	vxlan_check_vni(uint32_t);
@@ -378,7 +381,11 @@ static const char vxlan_name[] = "vxlan";
 static MALLOC_DEFINE(M_VXLAN, vxlan_name,
     "Virtual eXtensible LAN Interface");
 static struct if_clone *vxlan_cloner;
+
 static struct mtx vxlan_list_mtx;
+#define VXLAN_LIST_LOCK()	mtx_lock(&vxlan_list_mtx)
+#define VXLAN_LIST_UNLOCK()	mtx_unlock(&vxlan_list_mtx)
+
 static LIST_HEAD(, vxlan_socket) vxlan_socket_list;
 
 static eventhandler_tag vxlan_ifdetach_event_tag;
@@ -576,10 +583,10 @@ vxlan_ftable_expire(struct vxlan_softc *sc)
 }
 
 static int
-vxlan_ftable_update_locked(struct vxlan_softc *sc, const struct sockaddr *sa,
-    const uint8_t *mac, struct rm_priotracker *tracker)
+vxlan_ftable_update_locked(struct vxlan_softc *sc,
+    const union vxlan_sockaddr *vxlsa, const uint8_t *mac,
+    struct rm_priotracker *tracker)
 {
-	union vxlan_sockaddr vxlsa;
 	struct vxlan_ftable_entry *fe;
 	int error;
 
@@ -596,7 +603,7 @@ vxlan_ftable_update_locked(struct vxlan_softc *sc, const struct sockaddr *sa,
 		fe->vxlfe_expire = time_uptime + sc->vxl_ftable_timeout;
 
 		if (!VXLAN_FE_IS_DYNAMIC(fe) ||
-		    vxlan_sockaddr_in_equal(&fe->vxlfe_raddr, sa))
+		    vxlan_sockaddr_in_equal(&fe->vxlfe_raddr, &vxlsa->sa))
 			return (0);
 		if (!VXLAN_LOCK_WOWNED(sc)) {
 			VXLAN_RUNLOCK(sc, tracker);
@@ -604,7 +611,7 @@ vxlan_ftable_update_locked(struct vxlan_softc *sc, const struct sockaddr *sa,
 			sc->vxl_stats.ftable_lock_upgrade_failed++;
 			goto again;
 		}
-		vxlan_sockaddr_in_copy(&fe->vxlfe_raddr, sa);
+		vxlan_sockaddr_in_copy(&fe->vxlfe_raddr, &vxlsa->sa);
 		return (0);
 	}
 
@@ -624,15 +631,7 @@ vxlan_ftable_update_locked(struct vxlan_softc *sc, const struct sockaddr *sa,
 	if (fe == NULL)
 		return (ENOMEM);
 
-	/*
-	 * The source port may be randomly select by the remove host, so
-	 * use the port of the default destination address.
-	 */
-	vxlan_sockaddr_copy(&vxlsa, sa);
-	vxlsa.in4.sin_port = sc->vxl_dst_addr.in4.sin_port;
-
-	vxlan_ftable_entry_init(sc, fe, mac, &vxlsa.sa,
-	    VXLAN_FE_FLAG_DYNAMIC);
+	vxlan_ftable_entry_init(sc, fe, mac, &vxlsa->sa, VXLAN_FE_FLAG_DYNAMIC);
 
 	/* The prior lookup failed, so the insert should not. */
 	error = vxlan_ftable_entry_insert(sc, fe);
@@ -642,14 +641,28 @@ vxlan_ftable_update_locked(struct vxlan_softc *sc, const struct sockaddr *sa,
 }
 
 static int
-vxlan_ftable_update(struct vxlan_softc *sc, const struct sockaddr *sa,
+vxlan_ftable_learn(struct vxlan_softc *sc, const struct sockaddr *sa,
     const uint8_t *mac)
 {
 	struct rm_priotracker tracker;
+	union vxlan_sockaddr vxlsa;
 	int error;
 
+	/*
+	 * The source port may be randomly selected by the remote host, so
+	 * use the port of the default destination address.
+	 */
+	vxlan_sockaddr_copy(&vxlsa, sa);
+	vxlsa.in4.sin_port = sc->vxl_dst_addr.in4.sin_port;
+
+	if (VXLAN_SOCKADDR_IS_IPV6(&vxlsa)) {
+		error = vxlan_sockaddr_in6_embedscope(&vxlsa);
+		if (error)
+			return (error);
+	}
+
 	VXLAN_RLOCK(sc, &tracker);
-	error = vxlan_ftable_update_locked(sc, sa, mac, &tracker);
+	error = vxlan_ftable_update_locked(sc, &vxlsa, mac, &tracker);
 	VXLAN_UNLOCK(sc, &tracker);
 
 	return (error);
@@ -881,11 +894,11 @@ vxlan_socket_release(struct vxlan_socket *vso)
 {
 	int destroy;
 
-	mtx_lock(&vxlan_list_mtx);
+	VXLAN_LIST_LOCK();
 	destroy = VXLAN_SO_RELEASE(vso);
 	if (destroy != 0)
 		LIST_REMOVE(vso, vxlso_entry);
-	mtx_unlock(&vxlan_list_mtx);
+	VXLAN_LIST_UNLOCK();
 
 	if (destroy != 0)
 		vxlan_socket_destroy(vso);
@@ -896,14 +909,14 @@ vxlan_socket_lookup(union vxlan_sockaddr *vxlsa)
 {
 	struct vxlan_socket *vso;
 
-	mtx_lock(&vxlan_list_mtx);
+	VXLAN_LIST_LOCK();
 	LIST_FOREACH(vso, &vxlan_socket_list, vxlso_entry) {
 		if (vxlan_sockaddr_cmp(&vso->vxlso_laddr, &vxlsa->sa) == 0) {
 			VXLAN_SO_ACQUIRE(vso);
 			break;
 		}
 	}
-	mtx_unlock(&vxlan_list_mtx);
+	VXLAN_LIST_UNLOCK();
 
 	return (vso);
 }
@@ -912,10 +925,10 @@ static void
 vxlan_socket_insert(struct vxlan_socket *vso)
 {
 
-	mtx_lock(&vxlan_list_mtx);
+	VXLAN_LIST_LOCK();
 	VXLAN_SO_ACQUIRE(vso);
 	LIST_INSERT_HEAD(&vxlan_socket_list, vso, vxlso_entry);
-	mtx_unlock(&vxlan_list_mtx);
+	VXLAN_LIST_UNLOCK();
 }
 
 static int
@@ -1051,8 +1064,8 @@ vxlan_socket_ifdetach(struct vxlan_socket *vso, struct ifnet *ifp,
 static struct vxlan_socket *
 vxlan_socket_mc_lookup(const union vxlan_sockaddr *vxlsa)
 {
-	struct vxlan_socket *vso;
 	union vxlan_sockaddr laddr;
+	struct vxlan_socket *vso;
 
 	laddr = *vxlsa;
 
@@ -1406,7 +1419,7 @@ vxlan_setup_multicast_interface(struct vxlan_softc *sc)
 
 	ifp = ifunit_ref(sc->vxl_mc_ifname);
 	if (ifp == NULL) {
-		if_printf(sc->vxl_ifp, "multicast interfaces %s does "
+		if_printf(sc->vxl_ifp, "multicast interface %s does "
 		    "not exist\n", sc->vxl_mc_ifname);
 		return (ENOENT);
 	}
@@ -1830,6 +1843,13 @@ vxlan_ctrl_get_config(struct vxlan_softc *sc, void *arg)
 	cfg->vxlc_ttl = sc->vxl_ttl;
 	VXLAN_RUNLOCK(sc, &tracker);
 
+#ifdef INET6
+	if (VXLAN_SOCKADDR_IS_IPV6(&cfg->vxlc_local_sa))
+		sa6_recoverscope(&cfg->vxlc_local_sa.in6);
+	if (VXLAN_SOCKADDR_IS_IPV6(&cfg->vxlc_remote_sa))
+		sa6_recoverscope(&cfg->vxlc_remote_sa.in6);
+#endif
+
 	return (0);
 }
 
@@ -1869,6 +1889,11 @@ vxlan_ctrl_set_local_addr(struct vxlan_softc *sc, void *arg)
 		return (EINVAL);
 	if (vxlan_sockaddr_in_multicast(vxlsa) != 0)
 		return (EINVAL);
+	if (VXLAN_SOCKADDR_IS_IPV6(vxlsa)) {
+		error = vxlan_sockaddr_in6_embedscope(vxlsa);
+		if (error)
+			return (error);
+	}
 
 	VXLAN_WLOCK(sc);
 	if (vxlan_can_change_config(sc)) {
@@ -1893,6 +1918,11 @@ vxlan_ctrl_set_remote_addr(struct vxlan_softc *sc, void *arg)
 
 	if (!VXLAN_SOCKADDR_IS_IPV46(vxlsa))
 		return (EINVAL);
+	if (VXLAN_SOCKADDR_IS_IPV6(vxlsa)) {
+		error = vxlan_sockaddr_in6_embedscope(vxlsa);
+		if (error)
+			return (error);
+	}
 
 	VXLAN_WLOCK(sc);
 	if (vxlan_can_change_config(sc)) {
@@ -2093,6 +2123,12 @@ vxlan_ctrl_ftable_entry_add(struct vxlan_softc *sc, void *arg)
 	if (vxlsa.sa.sa_family != sc->vxl_dst_addr.sa.sa_family)
 		return (EAFNOSUPPORT);
 
+	if (VXLAN_SOCKADDR_IS_IPV6(&vxlsa)) {
+		error = vxlan_sockaddr_in6_embedscope(&vxlsa);
+		if (error)
+			return (error);
+	}
+
 	fe = vxlan_ftable_entry_alloc();
 	if (fe == NULL)
 		return (ENOMEM);
@@ -2248,7 +2284,6 @@ vxlan_pick_source_port(struct vxlan_softc *sc, struct mbuf *m)
 
 	range = sc->vxl_max_port - sc->vxl_min_port + 1;
 
-	/* check if flowid is set and not opaque */
 	if (M_HASHTYPE_ISHASH(m))
 		hash = m->m_pkthdr.flowid;
 	else
@@ -2536,7 +2571,7 @@ vxlan_input(struct vxlan_socket *vso, uint32_t vni, struct mbuf **m0,
 	}
 
 	if (sc->vxl_flags & VXLAN_FLAG_LEARN)
-		vxlan_ftable_update(sc, sa, eh->ether_shost);
+		vxlan_ftable_learn(sc, sa, eh->ether_shost);
 
 	m_clrprotoflags(m);
 	m->m_pkthdr.rcvif = ifp;
@@ -2588,6 +2623,18 @@ vxlan_set_user_config(struct vxlan_softc *sc, struct ifvxlanparam *vxlp)
 	if (vxlp->vxlp_with & (VXLAN_PARAM_WITH_LOCAL_ADDR6 |
 	    VXLAN_PARAM_WITH_REMOTE_ADDR6))
 		return (EAFNOSUPPORT);
+#else
+	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_LOCAL_ADDR6) {
+		int error = vxlan_sockaddr_in6_embedscope(&vxlp->vxlp_local_sa);
+		if (error)
+			return (error);
+	}
+	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_REMOTE_ADDR6) {
+		int error = vxlan_sockaddr_in6_embedscope(
+		   &vxlp->vxlp_remote_sa);
+		if (error)
+			return (error);
+	}
 #endif
 
 	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_VNI) {
@@ -2598,21 +2645,25 @@ vxlan_set_user_config(struct vxlan_softc *sc, struct ifvxlanparam *vxlp)
 	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_LOCAL_ADDR4) {
 		sc->vxl_src_addr.in4.sin_len = sizeof(struct sockaddr_in);
 		sc->vxl_src_addr.in4.sin_family = AF_INET;
-		sc->vxl_src_addr.in4.sin_addr = vxlp->vxlp_local_in4;
+		sc->vxl_src_addr.in4.sin_addr =
+		    vxlp->vxlp_local_sa.in4.sin_addr;
 	} else if (vxlp->vxlp_with & VXLAN_PARAM_WITH_LOCAL_ADDR6) {
 		sc->vxl_src_addr.in6.sin6_len = sizeof(struct sockaddr_in6);
 		sc->vxl_src_addr.in6.sin6_family = AF_INET6;
-		sc->vxl_src_addr.in6.sin6_addr = vxlp->vxlp_local_in6;
+		sc->vxl_src_addr.in6.sin6_addr =
+		    vxlp->vxlp_local_sa.in6.sin6_addr;
 	}
 
 	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_REMOTE_ADDR4) {
 		sc->vxl_dst_addr.in4.sin_len = sizeof(struct sockaddr_in);
 		sc->vxl_dst_addr.in4.sin_family = AF_INET;
-		sc->vxl_dst_addr.in4.sin_addr = vxlp->vxlp_remote_in4;
+		sc->vxl_dst_addr.in4.sin_addr =
+		    vxlp->vxlp_remote_sa.in4.sin_addr;
 	} else if (vxlp->vxlp_with & VXLAN_PARAM_WITH_REMOTE_ADDR6) {
 		sc->vxl_dst_addr.in6.sin6_len = sizeof(struct sockaddr_in6);
 		sc->vxl_dst_addr.in6.sin6_family = AF_INET6;
-		sc->vxl_dst_addr.in6.sin6_addr = vxlp->vxlp_remote_in6;
+		sc->vxl_dst_addr.in6.sin6_addr =
+		    vxlp->vxlp_remote_sa.in6.sin6_addr;
 	}
 
 	if (vxlp->vxlp_with & VXLAN_PARAM_WITH_LOCAL_PORT)
@@ -2696,6 +2747,8 @@ vxlan_clone_create(struct if_clone *ifc, int unit, caddr_t params)
 	ifp->if_ioctl = vxlan_ioctl;
 	ifp->if_transmit = vxlan_transmit;
 	ifp->if_qflush = vxlan_qflush;
+	ifp->if_capabilities |= IFCAP_LINKSTATE;
+	ifp->if_capenable |= IFCAP_LINKSTATE;
 
 	ifmedia_init(&sc->vxl_media, 0, vxlan_media_change, vxlan_media_status);
 	ifmedia_add(&sc->vxl_media, IFM_ETHER | IFM_AUTO, 0, NULL);
@@ -2930,6 +2983,21 @@ vxlan_sockaddr_in_multicast(const union vxlan_sockaddr *vxladdr)
 	return (mc);
 }
 
+static int
+vxlan_sockaddr_in6_embedscope(union vxlan_sockaddr *vxladdr)
+{
+	int error;
+
+	MPASS(VXLAN_SOCKADDR_IS_IPV6(vxladdr));
+#ifdef INET6
+	error = sa6_embedscope(&vxladdr->in6, V_ip6_use_defzone);
+#else
+	error = EAFNOSUPPORT;
+#endif
+
+	return (error);
+}
+
 static int
 vxlan_can_change_config(struct vxlan_softc *sc)
 {
@@ -3052,10 +3120,10 @@ vxlan_ifdetach_event(void *arg __unused, struct ifnet *ifp)
 	if ((ifp->if_flags & IFF_MULTICAST) == 0)
 		return;
 
-	mtx_lock(&vxlan_list_mtx);
+	VXLAN_LIST_LOCK();
 	LIST_FOREACH(vso, &vxlan_socket_list, vxlso_entry)
 		vxlan_socket_ifdetach(vso, ifp, &list);
-	mtx_unlock(&vxlan_list_mtx);
+	VXLAN_LIST_UNLOCK();
 
 	LIST_FOREACH_SAFE(sc, &list, vxl_ifdetach_list, tsc) {
 		LIST_REMOVE(sc, vxl_ifdetach_list);
diff --git a/sys/net/if_vxlan.h b/sys/net/if_vxlan.h
index 557b4e7b549..98b4d902624 100644
--- a/sys/net/if_vxlan.h
+++ b/sys/net/if_vxlan.h
@@ -54,6 +54,12 @@ struct vxlan_header {
 #define VXLAN_PORT		4789
 #define VXLAN_LEGACY_PORT	8472
 
+union vxlan_sockaddr {
+	struct sockaddr		sa;
+	struct sockaddr_in	in4;
+	struct sockaddr_in6	in6;
+};
+
 struct ifvxlanparam {
 	uint64_t		vxlp_with;
 
@@ -72,10 +78,8 @@ struct ifvxlanparam {
 #define VXLAN_PARAM_WITH_LEARN		0x1000
 
 	uint32_t		vxlp_vni;
-	struct in_addr		vxlp_local_in4;
-	struct in6_addr		vxlp_local_in6;
-	struct in_addr		vxlp_remote_in4;
-	struct in6_addr		vxlp_remote_in6;
+	union vxlan_sockaddr 	vxlp_local_sa;
+	union vxlan_sockaddr 	vxlp_remote_sa;
 	uint16_t		vxlp_local_port;
 	uint16_t		vxlp_remote_port;
 	uint16_t		vxlp_min_port;
@@ -87,12 +91,6 @@ struct ifvxlanparam {
 	uint8_t			vxlp_learn;
 };
 
-union vxlan_sockaddr {
-	struct sockaddr		sa;
-	struct sockaddr_in	in4;
-	struct sockaddr_in6	in6;
-};
-
 #define VXLAN_SOCKADDR_IS_IPV4(_vxsin)	((_vxsin)->sa.sa_family == AF_INET)
 #define VXLAN_SOCKADDR_IS_IPV6(_vxsin)	((_vxsin)->sa.sa_family == AF_INET6)
 #define VXLAN_SOCKADDR_IS_IPV46(_vxsin) \
diff --git a/sys/net/pfvar.h b/sys/net/pfvar.h
index 4bc84d941d9..c9b1d1db1ad 100644
--- a/sys/net/pfvar.h
+++ b/sys/net/pfvar.h
@@ -1619,6 +1619,7 @@ int	pf_normalize_tcp_stateful(struct mbuf *, int, struct pf_pdesc *,
 u_int32_t
 	pf_state_expires(const struct pf_state *);
 void	pf_purge_expired_fragments(void);
+void	pf_purge_fragments(uint32_t);
 int	pf_routable(struct pf_addr *addr, sa_family_t af, struct pfi_kif *,
 	    int);
 int	pf_socket_lookup(int, struct pf_pdesc *, struct mbuf *);
diff --git a/sys/net80211/ieee80211_node.c b/sys/net80211/ieee80211_node.c
index 1461e23dba3..4454e2d6374 100644
--- a/sys/net80211/ieee80211_node.c
+++ b/sys/net80211/ieee80211_node.c
@@ -243,7 +243,12 @@ ieee80211_node_setuptxparms(struct ieee80211_node *ni)
 	struct ieee80211vap *vap = ni->ni_vap;
 	enum ieee80211_phymode mode;
 
-	if (ni->ni_flags & IEEE80211_NODE_HT) {
+	if (ni->ni_flags & IEEE80211_NODE_VHT) {
+		if (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan))
+			mode = IEEE80211_MODE_VHT_5GHZ;
+		else
+			mode = IEEE80211_MODE_VHT_2GHZ;
+	} else if (ni->ni_flags & IEEE80211_NODE_HT) {
 		if (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan))
 			mode = IEEE80211_MODE_11NA;
 		else
diff --git a/sys/net80211/ieee80211_output.c b/sys/net80211/ieee80211_output.c
index 0e427c1f0cd..b720fcc969a 100644
--- a/sys/net80211/ieee80211_output.c
+++ b/sys/net80211/ieee80211_output.c
@@ -551,6 +551,59 @@ ieee80211_raw_output(struct ieee80211vap *vap, struct ieee80211_node *ni,
 	return (error);
 }
 
+static int
+ieee80211_validate_frame(struct mbuf *m,
+    const struct ieee80211_bpf_params *params)
+{
+	struct ieee80211_frame *wh;
+	int type;
+
+	if (m->m_pkthdr.len < sizeof(struct ieee80211_frame_ack))
+		return (EINVAL);
+
+	wh = mtod(m, struct ieee80211_frame *);
+	if ((wh->i_fc[0] & IEEE80211_FC0_VERSION_MASK) !=
+	    IEEE80211_FC0_VERSION_0)
+		return (EINVAL);
+
+	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
+	if (type != IEEE80211_FC0_TYPE_DATA) {
+		if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) !=
+		    IEEE80211_FC1_DIR_NODS)
+			return (EINVAL);
+
+		if (type != IEEE80211_FC0_TYPE_MGT &&
+		    (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) != 0)
+			return (EINVAL);
+
+		/* XXX skip other field checks? */
+	}
+
+	if ((params && (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0) ||
+	    (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) != 0) {
+		int subtype;
+
+		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
+
+		/*
+		 * See IEEE Std 802.11-2012,
+		 * 8.2.4.1.9 'Protected Frame field'
+		 */
+		/* XXX no support for robust management frames yet. */
+		if (!(type == IEEE80211_FC0_TYPE_DATA ||
+		    (type == IEEE80211_FC0_TYPE_MGT &&
+		     subtype == IEEE80211_FC0_SUBTYPE_AUTH)))
+			return (EINVAL);
+
+		wh->i_fc[1] |= IEEE80211_FC1_PROTECTED;
+	}
+
+	if (m->m_pkthdr.len < ieee80211_anyhdrsize(wh))
+		return (EINVAL);
+
+	return (0);
+}
+
 /*
  * 802.11 output routine. This is (currently) used only to
  * connect bpf write calls to the 802.11 layer for injecting
@@ -561,6 +614,7 @@ ieee80211_output(struct ifnet *ifp, struct mbuf *m,
 	const struct sockaddr *dst, struct route *ro)
 {
 #define senderr(e) do { error = (e); goto bad;} while (0)
+	const struct ieee80211_bpf_params *params = NULL;
 	struct ieee80211_node *ni = NULL;
 	struct ieee80211vap *vap;
 	struct ieee80211_frame *wh;
@@ -606,14 +660,20 @@ ieee80211_output(struct ifnet *ifp, struct mbuf *m,
 		senderr(EIO);
 	/* XXX bypass bridge, pfil, carp, etc. */
 
-	if (m->m_pkthdr.len < sizeof(struct ieee80211_frame_ack))
-		senderr(EIO);	/* XXX */
+	/*
+	 * NB: DLT_IEEE802_11_RADIO identifies the parameters are
+	 * present by setting the sa_len field of the sockaddr (yes,
+	 * this is a hack).
+	 * NB: we assume sa_data is suitably aligned to cast.
+	 */
+	if (dst->sa_len != 0)
+		params = (const struct ieee80211_bpf_params *)dst->sa_data;
+
+	error = ieee80211_validate_frame(m, params);
+	if (error != 0)
+		senderr(error);
+
 	wh = mtod(m, struct ieee80211_frame *);
-	if ((wh->i_fc[0] & IEEE80211_FC0_VERSION_MASK) !=
-	    IEEE80211_FC0_VERSION_0)
-		senderr(EIO);	/* XXX */
-	if (m->m_pkthdr.len < ieee80211_anyhdrsize(wh))
-		senderr(EIO);	/* XXX */
 
 	/* locate destination node */
 	switch (wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) {
@@ -626,7 +686,7 @@ ieee80211_output(struct ifnet *ifp, struct mbuf *m,
 		ni = ieee80211_find_txnode(vap, wh->i_addr3);
 		break;
 	default:
-		senderr(EIO);	/* XXX */
+		senderr(EDOOFUS);
 	}
 	if (ni == NULL) {
 		/*
@@ -645,11 +705,18 @@ ieee80211_output(struct ifnet *ifp, struct mbuf *m,
 	 *     it marks EAPOL in frames with M_EAPOL.
 	 */
 	m->m_flags &= ~M_80211_TX;
+	m->m_flags |= M_ENCAP;		/* mark encapsulated */
 
-	/* calculate priority so drivers can find the tx queue */
-	/* XXX assumes an 802.3 frame */
-	if (ieee80211_classify(ni, m))
-		senderr(EIO);		/* XXX */
+	if (IEEE80211_IS_DATA(wh)) {
+		/* calculate priority so drivers can find the tx queue */
+		if (ieee80211_classify(ni, m))
+			senderr(EIO);		/* XXX */
+
+		/* NB: ieee80211_encap does not include 802.11 header */
+		IEEE80211_NODE_STAT_ADD(ni, tx_bytes,
+		    m->m_pkthdr.len - ieee80211_hdrsize(wh));
+	} else
+		M_WME_SETAC(m, WME_AC_BE);
 
 	IEEE80211_NODE_STAT(ni, tx_data);
 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
@@ -657,20 +724,9 @@ ieee80211_output(struct ifnet *ifp, struct mbuf *m,
 		m->m_flags |= M_MCAST;
 	} else
 		IEEE80211_NODE_STAT(ni, tx_ucast);
-	/* NB: ieee80211_encap does not include 802.11 header */
-	IEEE80211_NODE_STAT_ADD(ni, tx_bytes, m->m_pkthdr.len);
 
 	IEEE80211_TX_LOCK(ic);
-
-	/*
-	 * NB: DLT_IEEE802_11_RADIO identifies the parameters are
-	 * present by setting the sa_len field of the sockaddr (yes,
-	 * this is a hack).
-	 * NB: we assume sa_data is suitably aligned to cast.
-	 */
-	ret = ieee80211_raw_output(vap, ni, m,
-	    (const struct ieee80211_bpf_params *)(dst->sa_len ?
-		dst->sa_data : NULL));
+	ret = ieee80211_raw_output(vap, ni, m, params);
 	IEEE80211_TX_UNLOCK(ic);
 	return (ret);
 bad:
@@ -1006,13 +1062,44 @@ ieee80211_send_nulldata(struct ieee80211_node *ni)
 int
 ieee80211_classify(struct ieee80211_node *ni, struct mbuf *m)
 {
-	const struct ether_header *eh = mtod(m, struct ether_header *);
+	const struct ether_header *eh = NULL;
+	uint16_t ether_type;
 	int v_wme_ac, d_wme_ac, ac;
 
+	if (__predict_false(m->m_flags & M_ENCAP)) {
+		struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
+		struct llc *llc;
+		int hdrlen, subtype;
+
+		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
+		if (subtype & IEEE80211_FC0_SUBTYPE_NODATA) {
+			ac = WME_AC_BE;
+			goto done;
+		}
+
+		hdrlen = ieee80211_hdrsize(wh);
+		if (m->m_pkthdr.len < hdrlen + sizeof(*llc))
+			return 1;
+
+		llc = (struct llc *)mtodo(m, hdrlen);
+		if (llc->llc_dsap != LLC_SNAP_LSAP ||
+		    llc->llc_ssap != LLC_SNAP_LSAP ||
+		    llc->llc_control != LLC_UI ||
+		    llc->llc_snap.org_code[0] != 0 ||
+		    llc->llc_snap.org_code[1] != 0 ||
+		    llc->llc_snap.org_code[2] != 0)
+			return 1;
+
+		ether_type = llc->llc_snap.ether_type;
+	} else {
+		eh = mtod(m, struct ether_header *);
+		ether_type = eh->ether_type;
+	}
+
 	/*
 	 * Always promote PAE/EAPOL frames to high priority.
 	 */
-	if (eh->ether_type == htons(ETHERTYPE_PAE)) {
+	if (ether_type == htons(ETHERTYPE_PAE)) {
 		/* NB: mark so others don't need to check header */
 		m->m_flags |= M_EAPOL;
 		ac = WME_AC_VO;
@@ -1047,7 +1134,7 @@ ieee80211_classify(struct ieee80211_node *ni, struct mbuf *m)
 
 	/* XXX m_copydata may be too slow for fast path */
 #ifdef INET
-	if (eh->ether_type == htons(ETHERTYPE_IP)) {
+	if (eh && eh->ether_type == htons(ETHERTYPE_IP)) {
 		uint8_t tos;
 		/*
 		 * IP frame, map the DSCP bits from the TOS field.
@@ -1060,7 +1147,7 @@ ieee80211_classify(struct ieee80211_node *ni, struct mbuf *m)
 	} else {
 #endif /* INET */
 #ifdef INET6
-	if (eh->ether_type == htons(ETHERTYPE_IPV6)) {
+	if (eh && eh->ether_type == htons(ETHERTYPE_IPV6)) {
 		uint32_t flow;
 		uint8_t tos;
 		/*
diff --git a/sys/netpfil/pf/pf.c b/sys/netpfil/pf/pf.c
index a5807b9de51..7ee53aff5ed 100644
--- a/sys/netpfil/pf/pf.c
+++ b/sys/netpfil/pf/pf.c
@@ -1498,7 +1498,7 @@ pf_unload_vnet_purge(void)
 	 * Now purge everything.
 	 */
 	pf_purge_expired_states(0, pf_hashmask);
-	pf_purge_expired_fragments();
+	pf_purge_fragments(UINT_MAX);
 	pf_purge_expired_src_nodes();
 
 	/*
diff --git a/sys/netpfil/pf/pf_ioctl.c b/sys/netpfil/pf/pf_ioctl.c
index 10a236d8bb1..4a6fc0cd0de 100644
--- a/sys/netpfil/pf/pf_ioctl.c
+++ b/sys/netpfil/pf/pf_ioctl.c
@@ -3833,12 +3833,6 @@ pf_modevent(module_t mod, int type, void *data)
 	case MOD_LOAD:
 		error = pf_load();
 		break;
-	case MOD_QUIESCE:
-		/*
-		 * Module should not be unloaded due to race conditions.
-		 */
-		error = EBUSY;
-		break;
 	case MOD_UNLOAD:
 		/* Handled in SYSUNINIT(pf_unload) to ensure it's done after
 		 * the vnet_pf_uninit()s */
diff --git a/sys/netpfil/pf/pf_norm.c b/sys/netpfil/pf/pf_norm.c
index 33edfbc93b2..3c0e1253dbe 100644
--- a/sys/netpfil/pf/pf_norm.c
+++ b/sys/netpfil/pf/pf_norm.c
@@ -218,10 +218,17 @@ pf_frag_compare(struct pf_fragment *a, struct pf_fragment *b)
 
 void
 pf_purge_expired_fragments(void)
+{
+	u_int32_t	expire = time_uptime -
+			    V_pf_default_rule.timeout[PFTM_FRAG];
+
+	pf_purge_fragments(expire);
+}
+
+void
+pf_purge_fragments(uint32_t expire)
 {
 	struct pf_fragment	*frag;
-	u_int32_t		 expire = time_uptime -
-				    V_pf_default_rule.timeout[PFTM_FRAG];
 
 	PF_FRAG_LOCK();
 	while ((frag = TAILQ_LAST(&V_pf_fragqueue, pf_fragqueue)) != NULL) {
diff --git a/sys/opencrypto/cryptosoft.c b/sys/opencrypto/cryptosoft.c
index f8b519ff947..45897990a86 100644
--- a/sys/opencrypto/cryptosoft.c
+++ b/sys/opencrypto/cryptosoft.c
@@ -607,9 +607,7 @@ swcr_authenc(struct cryptop *crp)
 					bzero(blk, blksz);
 				crypto_copydata(crp->crp_flags, buf,
 				    crde->crd_skip + i, len, blk);
-				if (!(crde->crd_flags & CRD_F_ENCRYPT)) {
-					exf->decrypt(swe->sw_kschedule, blk);
-				}
+				exf->decrypt(swe->sw_kschedule, blk);
 				crypto_copyback(crp->crp_flags, buf,
 				    crde->crd_skip + i, len, blk);
 			}
diff --git a/sys/powerpc/aim/locore64.S b/sys/powerpc/aim/locore64.S
index cd1b426abe8..f283ba6489b 100644
--- a/sys/powerpc/aim/locore64.S
+++ b/sys/powerpc/aim/locore64.S
@@ -61,6 +61,48 @@ GLOBAL(tmpstk)
 
 TOC_ENTRY(tmpstk)
 
+/*
+ * Entry point for bootloaders that do not fully implement ELF and start
+ * at the beginning of the image (kexec, notably). In its own section so
+ * that it ends up before any linker-generated call stubs and actually at
+ * the beginning of the image. kexec on some systems also enters at
+ * (start of image) + 0x60, so put a spin loop there.
+ */
+	.section ".text.kboot", "x", @progbits
+kbootentry:
+	b __start
+. = kbootentry + 0x40	/* Magic address used in platform layer */
+	.global smp_spin_sem
+ap_kexec_spin_sem:
+	.long   -1
+. = kbootentry + 0x60	/* Entry point for kexec APs */
+ap_kexec_start:		/* At 0x60 past start, copied to 0x60 by kexec */
+	/* r3 set to CPU ID by kexec */
+
+	/* Invalidate icache for low-memory copy and jump there */
+	li	%r0,0x80
+	dcbst	0,%r0
+	sync
+	icbi	0,%r0
+	isync
+	ba	0x80			/* Absolute branch to next inst */
+
+. = kbootentry + 0x80			/* Aligned to cache line */
+1:	or	31,31,31		/* yield */
+	sync
+	lwz	%r1,0x40(0)		/* Spin on ap_kexec_spin_sem */
+	cmpw	%r1,%r3			/* Until it equals our CPU ID */
+	bne	1b
+	
+	/* Released */
+	or	2,2,2			/* unyield */
+	ba	EXC_RST
+
+
+/*
+ * Now start the real text section
+ */
+
 	.text
 	.globl	btext
 btext:
diff --git a/sys/powerpc/aim/trap_subr64.S b/sys/powerpc/aim/trap_subr64.S
index 587086e0eea..eb42624f5b1 100644
--- a/sys/powerpc/aim/trap_subr64.S
+++ b/sys/powerpc/aim/trap_subr64.S
@@ -297,7 +297,8 @@ dtrace_invop_calltrap_addr:
  * not still hanging around in the trap handling region
  * once the MMU is turned on.
  */
-	.globl	CNAME(rstcode), CNAME(rstcodeend)
+	.globl	CNAME(rstcode), CNAME(rstcodeend), CNAME(cpu_reset_handler)
+	.p2align 3
 CNAME(rstcode):
 	/* Explicitly set MSR[SF] */
 	mfmsr	%r9
@@ -305,8 +306,9 @@ CNAME(rstcode):
 	insrdi	%r9,%r8,1,0
 	mtmsrd	%r9
 	isync
+
 	bl	1f
-	.llong	cpu_reset
+	.llong	cpu_reset_handler /* Make sure to maintain 8-byte alignment */
 1:	mflr	%r9
 	ld	%r9,0(%r9)
 	mtlr	%r9
@@ -314,7 +316,7 @@ CNAME(rstcode):
 	blr
 CNAME(rstcodeend):
 
-cpu_reset:
+cpu_reset_handler:
 	GET_TOCBASE(%r2)
 
 	ld	%r1,TOC_REF(tmpstk)(%r2)	/* get new SP */
@@ -569,6 +571,7 @@ CNAME(aliend):
  * Has to handle standard pagetable spills
  */
 	.globl	CNAME(dsitrap),CNAME(dsiend)
+	.p2align 3
 CNAME(dsitrap):
 	mtsprg1	%r1			/* save SP */
 	GET_CPUINFO(%r1)
@@ -831,6 +834,7 @@ dbleave:
  * In case of KDB we want a separate trap catcher for it
  */
 	.globl	CNAME(dblow),CNAME(dbend)
+	.p2align 3
 CNAME(dblow):
 	mtsprg1	%r1			/* save SP */
 	mtsprg2	%r29			/* save r29 */
@@ -859,6 +863,7 @@ CNAME(dblow):
         std	%r30,(PC_DBSAVE+CPUSAVE_R30)(%r1)	/* free r30 */
         std	%r31,(PC_DBSAVE+CPUSAVE_R31)(%r1)	/* free r31 */
         mflr	%r28					/* save LR */
+	nop						/* alignment */
 	bl	9f					/* Begin branch */
 	.llong	dbtrap
 9:	mflr	%r1
diff --git a/sys/powerpc/include/pcpu.h b/sys/powerpc/include/pcpu.h
index 32b5bb6a085..0449fbf04c2 100644
--- a/sys/powerpc/include/pcpu.h
+++ b/sys/powerpc/include/pcpu.h
@@ -46,7 +46,6 @@ struct pvo_entry;
 	struct thread	*pc_fputhread;		/* current fpu user */  \
 	struct thread	*pc_vecthread;		/* current vec user */  \
 	uintptr_t	pc_hwref;					\
-	uint32_t	pc_pir;						\
 	int		pc_bsp;						\
 	volatile int	pc_awake;					\
 	uint32_t	pc_ipimask;					\
diff --git a/sys/powerpc/include/vmparam.h b/sys/powerpc/include/vmparam.h
index 04639416697..5863cd14261 100644
--- a/sys/powerpc/include/vmparam.h
+++ b/sys/powerpc/include/vmparam.h
@@ -60,8 +60,12 @@
 #endif
 
 #ifndef	MAXSSIZ
+#ifdef __powerpc64__
+#define	MAXSSIZ		(512*1024*1024)		/* max stack size */
+#else
 #define	MAXSSIZ		(64*1024*1024)		/* max stack size */
 #endif
+#endif
 
 #ifdef AIM
 #define	VM_MAXUSER_ADDRESS32	((vm_offset_t)0xfffff000)
@@ -108,7 +112,7 @@
 #endif
 
 #ifdef AIM
-#define	KERNBASE		0x00100000UL	/* start of kernel virtual */
+#define	KERNBASE		0x00100100UL	/* start of kernel virtual */
 
 #ifndef __powerpc64__
 #define	VM_MIN_KERNEL_ADDRESS	((vm_offset_t)KERNEL_SR << ADDR_SR_SHFT)
diff --git a/sys/powerpc/powerpc/clock.c b/sys/powerpc/powerpc/clock.c
index 8dff4b61fc6..62a0be553ac 100644
--- a/sys/powerpc/powerpc/clock.c
+++ b/sys/powerpc/powerpc/clock.c
@@ -305,9 +305,11 @@ DELAY(int n)
 {
 	u_quad_t	tb, ttb;
 
+	TSENTER();
 	tb = mftb();
 	ttb = tb + howmany(n * 1000, ns_per_tick);
 	while (tb < ttb)
 		tb = mftb();
+	TSEXIT();
 }
 
diff --git a/sys/powerpc/powerpc/db_interface.c b/sys/powerpc/powerpc/db_interface.c
index 4bde4da8024..c16b2584989 100644
--- a/sys/powerpc/powerpc/db_interface.c
+++ b/sys/powerpc/powerpc/db_interface.c
@@ -91,5 +91,4 @@ db_show_mdpcpu(struct pcpu *pc)
 
 	db_printf("PPC: hwref   = %#zx\n", pc->pc_hwref);
 	db_printf("PPC: ipimask = %#x\n", pc->pc_ipimask);
-	db_printf("PPC: pir     = %#x\n", pc->pc_pir);
 }
diff --git a/sys/powerpc/powerpc/elf32_machdep.c b/sys/powerpc/powerpc/elf32_machdep.c
index 9d9363913bd..2615809363a 100644
--- a/sys/powerpc/powerpc/elf32_machdep.c
+++ b/sys/powerpc/powerpc/elf32_machdep.c
@@ -42,6 +42,7 @@
 #include <sys/sysent.h>
 #include <sys/imgact_elf.h>
 #include <sys/syscall.h>
+#include <sys/sysctl.h>
 #include <sys/signalvar.h>
 #include <sys/vnode.h>
 #include <sys/linker.h>
@@ -60,6 +61,18 @@
 #include <compat/freebsd32/freebsd32_util.h>
 
 extern const char *freebsd32_syscallnames[];
+static void ppc32_fixlimit(struct rlimit *rl, int which);
+
+static SYSCTL_NODE(_compat, OID_AUTO, ppc32, CTLFLAG_RW, 0, "32-bit mode");
+
+#define PPC32_MAXDSIZ (1024*1024*1024)
+static u_long ppc32_maxdsiz = PPC32_MAXDSIZ;
+SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxdsiz, CTLFLAG_RWTUN, &ppc32_maxdsiz,
+             0, "");
+#define PPC32_MAXSSIZ (64*1024*1024)
+u_long ppc32_maxssiz = PPC32_MAXSSIZ;
+SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxssiz, CTLFLAG_RWTUN, &ppc32_maxssiz,
+             0, "");
 #endif
 
 struct sysentvec elf32_freebsd_sysvec = {
@@ -91,6 +104,7 @@ struct sysentvec elf32_freebsd_sysvec = {
 	.sv_copyout_strings = freebsd32_copyout_strings,
 	.sv_setregs	= ppc32_setregs,
 	.sv_syscallnames = freebsd32_syscallnames,
+	.sv_fixlimit	= ppc32_fixlimit,
 #else
 	.sv_maxuser	= VM_MAXUSER_ADDRESS,
 	.sv_usrstack	= USRSTACK,
@@ -98,8 +112,8 @@ struct sysentvec elf32_freebsd_sysvec = {
 	.sv_copyout_strings = exec_copyout_strings,
 	.sv_setregs	= exec_setregs,
 	.sv_syscallnames = syscallnames,
-#endif
 	.sv_fixlimit	= NULL,
+#endif
 	.sv_maxssiz	= NULL,
 	.sv_flags	= SV_ABI_FREEBSD | SV_ILP32 | SV_SHP,
 	.sv_set_syscall_retval = cpu_set_syscall_retval,
@@ -321,3 +335,28 @@ elf_cpu_unload_file(linker_file_t lf __unused)
 	return (0);
 }
 #endif
+
+#ifdef __powerpc64__
+static void
+ppc32_fixlimit(struct rlimit *rl, int which)
+{
+	switch (which) {
+	case RLIMIT_DATA:
+		if (ppc32_maxdsiz != 0) {
+			if (rl->rlim_cur > ppc32_maxdsiz)
+				rl->rlim_cur = ppc32_maxdsiz;
+			if (rl->rlim_max > ppc32_maxdsiz)
+				rl->rlim_max = ppc32_maxdsiz;
+		}
+		break;
+	case RLIMIT_STACK:
+		if (ppc32_maxssiz != 0) {
+			if (rl->rlim_cur > ppc32_maxssiz)
+				rl->rlim_cur = ppc32_maxssiz;
+			if (rl->rlim_max > ppc32_maxssiz)
+				rl->rlim_max = ppc32_maxssiz;
+		}
+		break;
+	}
+}
+#endif
diff --git a/sys/powerpc/powerpc/machdep.c b/sys/powerpc/powerpc/machdep.c
index 1f594306683..9a9a1efa7d4 100644
--- a/sys/powerpc/powerpc/machdep.c
+++ b/sys/powerpc/powerpc/machdep.c
@@ -368,7 +368,6 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp,
 	thread0.td_oncpu = bsp.cr_cpuid;
 	pc->pc_cpuid = bsp.cr_cpuid;
 	pc->pc_hwref = bsp.cr_hwref;
-	pc->pc_pir = mfspr(SPR_PIR);
 	__asm __volatile("mtsprg 0, %0" :: "r"(pc));
 
 	/*
diff --git a/sys/powerpc/powerpc/mp_machdep.c b/sys/powerpc/powerpc/mp_machdep.c
index 52fbc511cbd..109f8b48c3b 100644
--- a/sys/powerpc/powerpc/mp_machdep.c
+++ b/sys/powerpc/powerpc/mp_machdep.c
@@ -74,8 +74,6 @@ void
 machdep_ap_bootstrap(void)
 {
 
-	/* Set PIR */
-	PCPU_SET(pir, mfspr(SPR_PIR));
 	PCPU_SET(awake, 1);
 	__asm __volatile("msync; isync");
 
@@ -224,13 +222,13 @@ cpu_mp_unleash(void *dummy)
 				DELAY(1000);
 
 		} else {
-			PCPU_SET(pir, mfspr(SPR_PIR));
 			pc->pc_awake = 1;
 		}
 		if (pc->pc_awake) {
 			if (bootverbose)
-				printf("Adding CPU %d, pir=%x, awake=%x\n",
-				    pc->pc_cpuid, pc->pc_pir, pc->pc_awake);
+				printf("Adding CPU %d, hwref=%jx, awake=%x\n",
+				    pc->pc_cpuid, (uintmax_t)pc->pc_hwref,
+				    pc->pc_awake);
 			smp_cpus++;
 		} else
 			CPU_SET(pc->pc_cpuid, &stopped_cpus);
diff --git a/sys/powerpc/powerpc/swtch64.S b/sys/powerpc/powerpc/swtch64.S
index fbec9a54848..281c3215f3f 100644
--- a/sys/powerpc/powerpc/swtch64.S
+++ b/sys/powerpc/powerpc/swtch64.S
@@ -280,5 +280,5 @@ ENTRY_NOPROF(fork_trampoline)
 					   trapframe to simulate FRAME_SETUP
 					   does when allocating space for
 					   a frame pointer/saved LR */
-	b	trapexit
+	bl	trapexit
 	nop
diff --git a/sys/powerpc/powerpc/trap.c b/sys/powerpc/powerpc/trap.c
index c72b631cca4..b9748dde431 100644
--- a/sys/powerpc/powerpc/trap.c
+++ b/sys/powerpc/powerpc/trap.c
@@ -97,6 +97,8 @@ static int	handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
 extern int	n_slbs;
 #endif
 
+extern vm_offset_t __startkernel;
+
 #ifdef KDB
 int db_trap_glue(struct trapframe *);		/* Called from trap_subr.S */
 #endif
@@ -123,6 +125,7 @@ static struct powerpc_exception powerpc_exceptions[] = {
 	{ EXC_EXI,	"external interrupt" },
 	{ EXC_ALI,	"alignment" },
 	{ EXC_PGM,	"program" },
+	{ EXC_HEA,	"hypervisor emulation assistance" },
 	{ EXC_FPU,	"floating-point unavailable" },
 	{ EXC_APU,	"auxiliary proc unavailable" },
 	{ EXC_DECR,	"decrementer" },
@@ -484,9 +487,11 @@ printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 	printf("   esr             = 0x%b\n",
 	    (int)frame->cpu.booke.esr, ESR_BITMASK);
 #endif
-	printf("   srr0            = 0x%" PRIxPTR "\n", frame->srr0);
+	printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
+	    frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
 	printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
-	printf("   lr              = 0x%" PRIxPTR "\n", frame->lr);
+	printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
+	    frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
 	printf("   curthread       = %p\n", curthread);
 	if (curthread != NULL)
 		printf("          pid = %d, comm = %s\n",
diff --git a/sys/powerpc/ps3/mmu_ps3.c b/sys/powerpc/ps3/mmu_ps3.c
index d570ed4d6d3..273bd0597ce 100644
--- a/sys/powerpc/ps3/mmu_ps3.c
+++ b/sys/powerpc/ps3/mmu_ps3.c
@@ -100,12 +100,18 @@ mps3_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
 
 	moea64_early_bootstrap(mmup, kernelstart, kernelend);
 
+	/* In case we had a page table already */
+	lv1_destruct_virtual_address_space(0);
+
+	/* Allocate new hardware page table */
 	lv1_construct_virtual_address_space(
 	    20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */,
 	    (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */,
 	    &mps3_vas_id, &final_pteg_count
 	);
 
+	lv1_select_virtual_address_space(mps3_vas_id);
+
 	moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
 
 	moea64_mid_bootstrap(mmup, kernelstart, kernelend);
@@ -122,14 +128,9 @@ mps3_cpu_bootstrap(mmu_t mmup, int ap)
 	mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
 
 	/*
-	 * Destroy the loader's address space if we are coming up for
-	 * the first time, and redo the FB mapping so we can continue
-	 * having a console.
+	 * Select the page table we configured above and set up the FB mapping
+	 * so we can have a console.
 	 */
-
-	if (!ap)
-		lv1_destruct_virtual_address_space(0);
-
 	lv1_select_virtual_address_space(mps3_vas_id);
 
 	if (!ap)
diff --git a/sys/powerpc/ps3/platform_ps3.c b/sys/powerpc/ps3/platform_ps3.c
index 564b48e99fd..5f8145dc6f4 100644
--- a/sys/powerpc/ps3/platform_ps3.c
+++ b/sys/powerpc/ps3/platform_ps3.c
@@ -103,6 +103,8 @@ static platform_def_t ps3_platform = {
 
 PLATFORM_DEF(ps3_platform);
 
+static int ps3_boot_pir = 0;
+
 static int
 ps3_probe(platform_t plat)
 {
@@ -129,6 +131,9 @@ ps3_attach(platform_t plat)
 	/* Set a breakpoint to make NULL an invalid address */
 	lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */);
 
+	/* Record our PIR at boot for later */
+	ps3_boot_pir = mfspr(SPR_PIR);
+
 	return (0);
 }
 
@@ -189,7 +194,7 @@ ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
 {
 
 	cpuref->cr_cpuid = 0;
-	cpuref->cr_hwref = cpuref->cr_cpuid;
+	cpuref->cr_hwref = ps3_boot_pir;
 
 	return (0);
 }
@@ -202,7 +207,7 @@ ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
 		return (ENOENT);
 
 	cpuref->cr_cpuid++;
-	cpuref->cr_hwref = cpuref->cr_cpuid;
+	cpuref->cr_hwref = !ps3_boot_pir;
 
 	return (0);
 }
@@ -212,7 +217,7 @@ ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
 {
 
 	cpuref->cr_cpuid = 0;
-	cpuref->cr_hwref = cpuref->cr_cpuid;
+	cpuref->cr_hwref = ps3_boot_pir;
 
 	return (0);
 }
@@ -220,21 +225,21 @@ ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
 static int
 ps3_smp_start_cpu(platform_t plat, struct pcpu *pc)
 {
-	/* loader(8) is spinning on 0x40 == 0 right now */
-	uint32_t *secondary_spin_sem = (uint32_t *)(0x40);
+	/* kernel is spinning on 0x40 == -1 right now */
+	volatile uint32_t *secondary_spin_sem = (uint32_t *)(0x40);
+	int remote_pir = pc->pc_hwref;
 	int timeout;
 
-	if (pc->pc_hwref != 1)
-		return (ENXIO);
-
 	ap_pcpu = pc;
-	*secondary_spin_sem = 1;
-	powerpc_sync();
-	DELAY(1);
 
+	/* Try both PIR values, looping a few times: the HV likes moving us */
 	timeout = 10000;
-	while (!pc->pc_awake && timeout--)
+	while (!pc->pc_awake && timeout--) {
+		*secondary_spin_sem = remote_pir;
+		powerpc_sync();
 		DELAY(100);
+		remote_pir = !remote_pir;
+	}
 
 	return ((pc->pc_awake) ? 0 : EBUSY);
 }
diff --git a/sys/powerpc/ps3/ps3_syscons.c b/sys/powerpc/ps3/ps3_syscons.c
index cbdec3c5335..aeec42b0cd2 100644
--- a/sys/powerpc/ps3/ps3_syscons.c
+++ b/sys/powerpc/ps3/ps3_syscons.c
@@ -159,16 +159,62 @@ static int
 ps3fb_init(struct vt_device *vd)
 {
 	struct ps3fb_softc *sc;
+	char linux_video_mode[24];
+	int linux_video_mode_num = 0;
 
 	/* Init softc */
 	vd->vd_softc = sc = &ps3fb_softc;
 
-	/* XXX: get from HV repository */
 	sc->fb_info.fb_depth = 32;
-	sc->fb_info.fb_height = 480;
-	sc->fb_info.fb_width = 720;
+	sc->fb_info.fb_height = 1080;
+	sc->fb_info.fb_width = 1920;
+
+	/* See if the bootloader has passed a graphics mode to use */
+	bzero(linux_video_mode, sizeof(linux_video_mode));
+	TUNABLE_STR_FETCH("video", linux_video_mode, sizeof(linux_video_mode));
+	sscanf(linux_video_mode, "ps3fb:mode:%d", &linux_video_mode_num);
+	
+	switch (linux_video_mode_num) {
+	case 1:
+	case 2:
+		sc->fb_info.fb_height = 480;
+		sc->fb_info.fb_width = 720;
+		break;
+	case 3:
+	case 8:
+		sc->fb_info.fb_height = 720;
+		sc->fb_info.fb_width = 1280;
+		break;
+	case 4:
+	case 5:
+	case 9:
+	case 10:
+		sc->fb_info.fb_height = 1080;
+		sc->fb_info.fb_width = 1920;
+		break;
+	case 6:
+	case 7:
+		sc->fb_info.fb_height = 576;
+		sc->fb_info.fb_width = 720;
+		break;
+	case 11:
+		sc->fb_info.fb_height = 768;
+		sc->fb_info.fb_width = 1024;
+		break;
+	case 12:
+		sc->fb_info.fb_height = 1024;
+		sc->fb_info.fb_width = 1280;
+		break;
+	case 13:
+		sc->fb_info.fb_height = 1200;
+		sc->fb_info.fb_width = 1920;
+		break;
+	}
+	
+	/* Allow explicitly-specified values for us to override everything */
 	TUNABLE_INT_FETCH("hw.ps3fb.height", &sc->fb_info.fb_height);
 	TUNABLE_INT_FETCH("hw.ps3fb.width", &sc->fb_info.fb_width);
+
 	sc->fb_info.fb_stride = sc->fb_info.fb_width*4;
 	sc->fb_info.fb_size = sc->fb_info.fb_height * sc->fb_info.fb_stride;
 	sc->fb_info.fb_bpp = sc->fb_info.fb_stride / sc->fb_info.fb_width * 8;
@@ -183,7 +229,7 @@ ps3fb_init(struct vt_device *vd)
 
 	/* 32-bit VGA palette */
 	vt_generate_cons_palette(sc->fb_info.fb_cmap, COLOR_FORMAT_RGB,
-	    255, 0, 255, 8, 255, 16);
+	    255, 16, 255, 8, 255, 0);
 
 	/* Set correct graphics context */
 	lv1_gpu_context_attribute(sc->sc_fbcontext,
diff --git a/sys/riscv/riscv/timer.c b/sys/riscv/riscv/timer.c
index 0308ca50e6c..00af244e55c 100644
--- a/sys/riscv/riscv/timer.c
+++ b/sys/riscv/riscv/timer.c
@@ -261,6 +261,7 @@ DELAY(int usec)
 				cpufunc_nullop();
 		return;
 	}
+	TSENTER();
 
 	/* Get the number of times to count */
 	counts_per_usec = ((riscv_timer_timecount.tc_frequency / 1000000) + 1);
@@ -283,4 +284,5 @@ DELAY(int usec)
 		counts -= (int64_t)(last - first);
 		first = last;
 	}
+	TSEXIT();
 }
diff --git a/sys/sparc64/sparc64/clock.c b/sys/sparc64/sparc64/clock.c
index bd6ea254b93..05b62880b39 100644
--- a/sys/sparc64/sparc64/clock.c
+++ b/sys/sparc64/sparc64/clock.c
@@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/pcpu.h>
 #include <sys/proc.h>
 #include <sys/sched.h>
+#include <sys/tslog.h>
 
 #include <machine/cpu.h>
 #include <machine/cpufunc.h>
@@ -45,6 +46,7 @@ DELAY(int usec)
 
 	if (usec < 0)
 		return;
+	TSENTER();
 
 	/*
 	 * We avoid being migrated to another CPU with a possibly
@@ -57,5 +59,6 @@ DELAY(int usec)
 		cpu_spinwait();
 
 	sched_unpin();
+	TSEXIT();
 }
 
diff --git a/sys/sys/_stdarg.h b/sys/sys/_stdarg.h
index c006a5b851a..69c06b91e93 100644
--- a/sys/sys/_stdarg.h
+++ b/sys/sys/_stdarg.h
@@ -61,7 +61,7 @@
   #if __ISO_C_VISIBLE >= 1999
     #define va_copy(dst, src) ((dst) = (src))
   #endif
-  #define va_arg(ap, type) (*(((type)*)(((ap) += sizeof(type)) - sizeof(type))))
+  #define va_arg(ap, type) (*((type*)(((ap) += sizeof(type)) - sizeof(type))))
   #define va_end(ap) ((void)0)
 #endif
 
diff --git a/sys/sys/copyright.h b/sys/sys/copyright.h
index 11831be6e44..4d11214b755 100644
--- a/sys/sys/copyright.h
+++ b/sys/sys/copyright.h
@@ -1,7 +1,7 @@
 /*-
  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
  *
- * Copyright (C) 1992-2017 The FreeBSD Project. All rights reserved.
+ * Copyright (C) 1992-2018 The FreeBSD Project. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -36,7 +36,7 @@
 
 /* FreeBSD */
 #define COPYRIGHT_FreeBSD \
-	"Copyright (c) 1992-2017 The FreeBSD Project.\n"
+	"Copyright (c) 1992-2018 The FreeBSD Project.\n"
 
 /* Foundation */
 #define	TRADEMARK_Foundation \
diff --git a/sys/sys/cpuctl.h b/sys/sys/cpuctl.h
index 70212eb3a85..8c7fb65632f 100644
--- a/sys/sys/cpuctl.h
+++ b/sys/sys/cpuctl.h
@@ -59,5 +59,6 @@ typedef struct {
 #define	CPUCTL_MSRSBIT	_IOWR('c', 5, cpuctl_msr_args_t)
 #define	CPUCTL_MSRCBIT	_IOWR('c', 6, cpuctl_msr_args_t)
 #define	CPUCTL_CPUID_COUNT _IOWR('c', 7, cpuctl_cpuid_count_args_t)
+#define	CPUCTL_EVAL_CPU_FEATURES	_IO('c', 8)
 
 #endif /* _CPUCTL_H_ */
diff --git a/sys/sys/kernel.h b/sys/sys/kernel.h
index ea3bf2620da..2e103c7804b 100644
--- a/sys/sys/kernel.h
+++ b/sys/sys/kernel.h
@@ -54,6 +54,9 @@
 /* for intrhook below */
 #include <sys/queue.h>
 
+/* for timestamping SYSINITs; other files may assume this is included here */
+#include <sys/tslog.h>
+
 /* Global variables for the kernel. */
 
 /* 1.1 */
@@ -229,6 +232,35 @@ struct sysinit {
  * correct warnings when -Wcast-qual is used.
  *
  */
+#ifdef TSLOG
+struct sysinit_tslog {
+	sysinit_cfunc_t func;
+	const void * data;
+	const char * name;
+};
+static inline void
+sysinit_tslog_shim(const void * data)
+{
+	const struct sysinit_tslog * x = data;
+
+	TSRAW(curthread, TS_ENTER, "SYSINIT", x->name);
+	(x->func)(x->data);
+	TSRAW(curthread, TS_EXIT, "SYSINIT", x->name);
+}
+#define	C_SYSINIT(uniquifier, subsystem, order, func, ident)	\
+	static struct sysinit_tslog uniquifier ## _sys_init_tslog = {	\
+		func,						\
+		(ident),					\
+		#uniquifier					\
+	};							\
+	static struct sysinit uniquifier ## _sys_init = {	\
+		subsystem,					\
+		order,						\
+		sysinit_tslog_shim,				\
+		&uniquifier ## _sys_init_tslog			\
+	};							\
+	DATA_SET(sysinit_set,uniquifier ## _sys_init)
+#else
 #define	C_SYSINIT(uniquifier, subsystem, order, func, ident)	\
 	static struct sysinit uniquifier ## _sys_init = {	\
 		subsystem,					\
@@ -237,6 +269,7 @@ struct sysinit {
 		(ident)						\
 	};							\
 	DATA_SET(sysinit_set,uniquifier ## _sys_init)
+#endif
 
 #define	SYSINIT(uniquifier, subsystem, order, func, ident)	\
 	C_SYSINIT(uniquifier, subsystem, order,			\
diff --git a/sys/sys/libkern.h b/sys/sys/libkern.h
index 91620f94959..3ec1ca76855 100644
--- a/sys/sys/libkern.h
+++ b/sys/sys/libkern.h
@@ -82,6 +82,13 @@ hex2ascii(int hex)
 	return (hex2ascii_data[hex]);
 }
 
+static inline bool
+validbcd(int bcd)
+{
+
+	return (bcd == 0 || (bcd > 0 && bcd <= 0x99 && bcd2bin_data[bcd] != 0));
+}
+
 static __inline int imax(int a, int b) { return (a > b ? a : b); }
 static __inline int imin(int a, int b) { return (a < b ? a : b); }
 static __inline long lmax(long a, long b) { return (a > b ? a : b); }
diff --git a/sys/sys/mount.h b/sys/sys/mount.h
index 362c54e9230..9d499004434 100644
--- a/sys/sys/mount.h
+++ b/sys/sys/mount.h
@@ -40,6 +40,7 @@
 #ifdef _KERNEL
 #include <sys/lock.h>
 #include <sys/lockmgr.h>
+#include <sys/tslog.h>
 #include <sys/_mutex.h>
 #include <sys/_sx.h>
 #endif
@@ -708,9 +709,11 @@ vfs_statfs_t	__vfs_statfs;
 #define	VFS_MOUNT(MP) ({						\
 	int _rc;							\
 									\
+	TSRAW(curthread, TS_ENTER, "VFS_MOUNT", (MP)->mnt_vfc->vfc_name);\
 	VFS_PROLOGUE(MP);						\
 	_rc = (*(MP)->mnt_op->vfs_mount)(MP);				\
 	VFS_EPILOGUE(MP);						\
+	TSRAW(curthread, TS_EXIT, "VFS_MOUNT", (MP)->mnt_vfc->vfc_name);\
 	_rc; })
 
 #define	VFS_UNMOUNT(MP, FORCE) ({					\
diff --git a/sys/sys/syslimits.h b/sys/sys/syslimits.h
index 1551582b0d1..d6381dad7e2 100644
--- a/sys/sys/syslimits.h
+++ b/sys/sys/syslimits.h
@@ -52,7 +52,6 @@
 #ifndef CHILD_MAX
 #define	CHILD_MAX		   40	/* max simultaneous processes */
 #endif
-#define	LINK_MAX		32767	/* max file link count */
 #define	MAX_CANON		  255	/* max bytes in term canon input line */
 #define	MAX_INPUT		  255	/* max bytes in terminal input */
 #define	NAME_MAX		  255	/* max bytes in a file name */
diff --git a/sys/sys/tslog.h b/sys/sys/tslog.h
new file mode 100644
index 00000000000..4b2971e4e64
--- /dev/null
+++ b/sys/sys/tslog.h
@@ -0,0 +1,62 @@
+/*-
+ * Copyright (c) 2017 Colin Percival
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _TSLOG_H_
+#define	_TSLOG_H_
+
+#ifdef TSLOG
+#include <sys/_types.h>
+#include <sys/pcpu.h>
+#endif
+
+#define TS_ENTER	0
+#define TS_EXIT		1
+#define TS_THREAD	2
+#define TS_EVENT	3
+
+#define TSENTER() TSRAW(curthread, TS_ENTER, __func__, NULL)
+#define TSENTER2(x) TSRAW(curthread, TS_ENTER, __func__, x)
+#define TSEXIT() TSRAW(curthread, TS_EXIT, __func__, NULL)
+#define TSEXIT2(x) TSRAW(curthread, TS_EXIT, __func__, x)
+#define TSTHREAD(td, x) TSRAW(td, TS_THREAD, x, NULL)
+#define TSEVENT(x) TSRAW(curthread, TS_EVENT, x, NULL)
+#define TSEVENT2(x, y) TSRAW(curthread, TS_EVENT, x, y)
+#define TSLINE() TSEVENT2(__FILE__, __XSTRING(__LINE__))
+#define TSWAIT(x) TSEVENT2("WAIT", x);
+#define TSUNWAIT(x) TSEVENT2("UNWAIT", x);
+#define TSHOLD(x) TSEVENT2("HOLD", x);
+#define TSRELEASE(x) TSEVENT2("RELEASE", x);
+
+#ifdef TSLOG
+#define TSRAW(a, b, c, d) tslog(a, b, c, d)
+void tslog(void *, int, const char *, const char *);
+#else
+#define TSRAW(a, b, c, d)		/* Timestamp logging disabled */
+#endif
+
+#endif /* _TSLOG_H_ */
diff --git a/sys/sys/watchdog.h b/sys/sys/watchdog.h
index 1b85ce7a83e..191456a4acf 100644
--- a/sys/sys/watchdog.h
+++ b/sys/sys/watchdog.h
@@ -112,6 +112,14 @@ EVENTHANDLER_DECLARE(watchdog_list, watchdog_fn);
 
 u_int	wdog_kern_last_timeout(void);
 int	wdog_kern_pat(u_int utim);
+
+/*
+ * The following function pointer is used to attach a software watchdog
+ * if no hardware watchdog has been attached, and if the software module
+ * has initialized the function pointer.
+ */
+
+extern void (*wdog_software_attach)(void);
 #endif
 
 #endif /* _SYS_WATCHDOG_H */
diff --git a/sys/tools/embed_mfs.sh b/sys/tools/embed_mfs.sh
index c4fea153d56..01246623088 100644
--- a/sys/tools/embed_mfs.sh
+++ b/sys/tools/embed_mfs.sh
@@ -49,7 +49,7 @@ mfs_size=`stat -f '%z' $2 2> /dev/null`
 
 err_no_mfs="Can't locate mfs section within "
 
-if [ `file -b $1 | grep -q '^ELF ..-bit .SB executable'` ]; then
+if file -b $1 | grep -q '^ELF ..-bit .SB executable'; then
 
 	sec_info=`elfdump -c $1 2> /dev/null | grep -A 5 -E "sh_name: oldmfs$"`
 	# If we can't find the mfs section within the given kernel - bail.
diff --git a/sys/tools/makeobjops.awk b/sys/tools/makeobjops.awk
index 367354148a3..225e48d4349 100644
--- a/sys/tools/makeobjops.awk
+++ b/sys/tools/makeobjops.awk
@@ -326,11 +326,19 @@ function handle_method (static, doc)
 	}
 	printh("{");
 	printh("\tkobjop_t _m;");
+	if (ret != "void")
+		printh("\t" ret " rc;");
 	if (!static)
 		firstvar = "((kobj_t)" firstvar ")";
+	if (prolog != "")
+		printh(prolog);
 	printh("\tKOBJOPLOOKUP(" firstvar "->ops," mname ");");
-	retrn =  (ret != "void") ? "return " : "";
-	printh("\t" retrn "((" mname "_t *) _m)(" varname_list ");");
+	rceq = (ret != "void") ? "rc = " : "";
+	printh("\t" rceq "((" mname "_t *) _m)(" varname_list ");");
+	if (epilog != "")
+		printh(epilog);
+	if (ret != "void")
+		printh("\treturn (rc);");
 	printh("}\n");
 }
 
@@ -440,6 +448,8 @@ for (file_i = 0; file_i < num_files; file_i++) {
 	lineno = 0;
 	error = 0;		# to signal clean up and gerror setting
 	lastdoc = "";
+	prolog = "";
+	epilog = "";
 
 	while (!error && (getline < src) > 0) {
 		lineno++;
@@ -473,10 +483,18 @@ for (file_i = 0; file_i < num_files; file_i++) {
 		else if (/^METHOD/) {
 			handle_method(0, lastdoc);
 			lastdoc = "";
+			prolog = "";
+			epilog = "";
 		} else if (/^STATICMETHOD/) {
 			handle_method(1, lastdoc);
 			lastdoc = "";
-		} else {
+			prolog = "";
+			epilog = "";
+		} else if (/^PROLOG[ 	]*{$/)
+			prolog = handle_code();
+		else if (/^EPILOG[ 	]*{$/)
+			epilog = handle_code();
+		else {
 			debug($0);
 			warnsrc("Invalid line encountered");
 			error = 1;
diff --git a/sys/ufs/ufs/ufs_lookup.c b/sys/ufs/ufs/ufs_lookup.c
index 944eeff9919..3714096795a 100644
--- a/sys/ufs/ufs/ufs_lookup.c
+++ b/sys/ufs/ufs/ufs_lookup.c
@@ -1126,8 +1126,9 @@ ufs_direnter(dvp, tvp, dirp, cnp, newdirbp, isrename)
 		error = UFS_TRUNCATE(dvp, (off_t)dp->i_endoff,
 		    IO_NORMAL | (DOINGASYNC(dvp) ? 0 : IO_SYNC), cr);
 		if (error != 0)
-			vn_printf(dvp, "ufs_direnter: failed to truncate "
-			    "err %d", error);
+			vn_printf(dvp,
+			    "ufs_direnter: failed to truncate, error %d\n",
+			    error);
 #ifdef UFS_DIRHASH
 		if (error == 0 && dp->i_dirhash != NULL)
 			ufsdirhash_dirtrunc(dp, dp->i_endoff);
diff --git a/sys/ufs/ufs/ufs_vnops.c b/sys/ufs/ufs/ufs_vnops.c
index 018a6a0e74e..73482efc257 100644
--- a/sys/ufs/ufs/ufs_vnops.c
+++ b/sys/ufs/ufs/ufs_vnops.c
@@ -1545,8 +1545,9 @@ ufs_rename(ap)
 		error = UFS_TRUNCATE(tdvp, endoff, IO_NORMAL |
 		    (DOINGASYNC(tdvp) ? 0 : IO_SYNC), tcnp->cn_cred);
 		if (error != 0)
-			vn_printf(tdvp, "ufs_rename: failed to truncate "
-			    "err %d", error);
+			vn_printf(tdvp,
+			    "ufs_rename: failed to truncate, error %d\n",
+			    error);
 #ifdef UFS_DIRHASH
 		else if (tdp->i_dirhash != NULL)
 			ufsdirhash_dirtrunc(tdp, endoff);
diff --git a/sys/vm/swap_pager.c b/sys/vm/swap_pager.c
index 22bf6c72b8b..753aeded64e 100644
--- a/sys/vm/swap_pager.c
+++ b/sys/vm/swap_pager.c
@@ -311,8 +311,7 @@ swap_release_by_cred(vm_ooffset_t decr, struct ucred *cred)
 	racct_sub_cred(cred, RACCT_SWAP, decr);
 }
 
-#define SWM_FREE	0x02	/* free, period			*/
-#define SWM_POP		0x04	/* pop out			*/
+#define SWM_POP		0x01	/* pop out			*/
 
 static int swap_pager_full = 2;	/* swap space exhaustion (task killing) */
 static int swap_pager_almost_full = 1; /* swap space exhaustion (w/hysteresis)*/
@@ -911,6 +910,7 @@ swap_pager_copy(vm_object_t srcobject, vm_object_t dstobject,
     vm_pindex_t offset, int destroysource)
 {
 	vm_pindex_t i;
+	daddr_t dstaddr, first_free, num_free, srcaddr;
 
 	VM_OBJECT_ASSERT_WLOCKED(srcobject);
 	VM_OBJECT_ASSERT_WLOCKED(dstobject);
@@ -935,53 +935,44 @@ swap_pager_copy(vm_object_t srcobject, vm_object_t dstobject,
 	}
 
 	/*
-	 * transfer source to destination.
+	 * Transfer source to destination.
 	 */
+	first_free = SWAPBLK_NONE;
+	num_free = 0;
 	for (i = 0; i < dstobject->size; ++i) {
-		daddr_t dstaddr;
-
-		/*
-		 * Locate (without changing) the swapblk on the destination,
-		 * unless it is invalid in which case free it silently, or
-		 * if the destination is a resident page, in which case the
-		 * source is thrown away.
-		 */
+		srcaddr = swp_pager_meta_ctl(srcobject, i + offset, SWM_POP);
+		if (srcaddr == SWAPBLK_NONE)
+			continue;
 		dstaddr = swp_pager_meta_ctl(dstobject, i, 0);
-
 		if (dstaddr == SWAPBLK_NONE) {
 			/*
 			 * Destination has no swapblk and is not resident,
 			 * copy source.
+			 *
+			 * swp_pager_meta_build() can sleep.
 			 */
-			daddr_t srcaddr;
-
-			srcaddr = swp_pager_meta_ctl(
-			    srcobject,
-			    i + offset,
-			    SWM_POP
-			);
-
-			if (srcaddr != SWAPBLK_NONE) {
-				/*
-				 * swp_pager_meta_build() can sleep.
-				 */
-				vm_object_pip_add(srcobject, 1);
-				VM_OBJECT_WUNLOCK(srcobject);
-				vm_object_pip_add(dstobject, 1);
-				swp_pager_meta_build(dstobject, i, srcaddr);
-				vm_object_pip_wakeup(dstobject);
-				VM_OBJECT_WLOCK(srcobject);
-				vm_object_pip_wakeup(srcobject);
-			}
+			vm_object_pip_add(srcobject, 1);
+			VM_OBJECT_WUNLOCK(srcobject);
+			vm_object_pip_add(dstobject, 1);
+			swp_pager_meta_build(dstobject, i, srcaddr);
+			vm_object_pip_wakeup(dstobject);
+			VM_OBJECT_WLOCK(srcobject);
+			vm_object_pip_wakeup(srcobject);
 		} else {
 			/*
 			 * Destination has valid swapblk or it is represented
 			 * by a resident page.  We destroy the sourceblock.
 			 */
-
-			swp_pager_meta_ctl(srcobject, i + offset, SWM_FREE);
+			if (first_free + num_free == srcaddr)
+				num_free++;
+			else {
+				swp_pager_freeswapspace(first_free, num_free);
+				first_free = srcaddr;
+				num_free = 1;
+			}
 		}
 	}
+	swp_pager_freeswapspace(first_free, num_free);
 
 	/*
 	 * Free left over swap blocks in source.
@@ -1082,8 +1073,11 @@ swap_pager_haspage(vm_object_t object, vm_pindex_t pindex, int *before,
 static void
 swap_pager_unswapped(vm_page_t m)
 {
+	daddr_t srcaddr;
 
-	swp_pager_meta_ctl(m->object, m->pindex, SWM_FREE);
+	srcaddr = swp_pager_meta_ctl(m->object, m->pindex, SWM_POP);
+	if (srcaddr != SWAPBLK_NONE)
+		swp_pager_freeswapspace(srcaddr, 1);
 }
 
 /*
@@ -1999,21 +1993,17 @@ swp_pager_meta_free_all(vm_object_t object)
 }
 
 /*
- * SWP_PAGER_METACTL() -  misc control of swap and vm_page_t meta data.
+ * SWP_PAGER_METACTL() -  misc control of swap meta data.
  *
- *	This routine is capable of looking up, popping, or freeing
- *	swapblk assignments in the swap meta data or in the vm_page_t.
- *	The routine typically returns the swapblk being looked-up, or popped,
- *	or SWAPBLK_NONE if the block was freed, or SWAPBLK_NONE if the block
- *	was invalid.  This routine will automatically free any invalid
- *	meta-data swapblks.
+ *	This routine is capable of looking up, or removing swapblk
+ *	assignments in the swap meta data.  It returns the swapblk being
+ *	looked-up, popped, or SWAPBLK_NONE if the block was invalid.
  *
  *	When acting on a busy resident page and paging is in progress, we
  *	have to wait until paging is complete but otherwise can act on the
  *	busy page.
  *
- *	SWM_FREE	remove and free swap block from metadata
- *	SWM_POP		remove from meta data but do not free.. pop it out
+ *	SWM_POP		remove from meta data but do not free it
  */
 static daddr_t
 swp_pager_meta_ctl(vm_object_t object, vm_pindex_t pindex, int flags)
@@ -2021,7 +2011,7 @@ swp_pager_meta_ctl(vm_object_t object, vm_pindex_t pindex, int flags)
 	struct swblk *sb;
 	daddr_t r1;
 
-	if ((flags & (SWM_FREE | SWM_POP)) != 0)
+	if ((flags & SWM_POP) != 0)
 		VM_OBJECT_ASSERT_WLOCKED(object);
 	else
 		VM_OBJECT_ASSERT_LOCKED(object);
@@ -2040,7 +2030,7 @@ swp_pager_meta_ctl(vm_object_t object, vm_pindex_t pindex, int flags)
 	r1 = sb->d[pindex % SWAP_META_PAGES];
 	if (r1 == SWAPBLK_NONE)
 		return (SWAPBLK_NONE);
-	if ((flags & (SWM_FREE | SWM_POP)) != 0) {
+	if ((flags & SWM_POP) != 0) {
 		sb->d[pindex % SWAP_META_PAGES] = SWAPBLK_NONE;
 		if (swp_pager_swblk_empty(sb, 0, SWAP_META_PAGES)) {
 			SWAP_PCTRIE_REMOVE(&object->un_pager.swp.swp_blks,
@@ -2048,10 +2038,6 @@ swp_pager_meta_ctl(vm_object_t object, vm_pindex_t pindex, int flags)
 			uma_zfree(swblk_zone, sb);
 		}
 	}
-	if ((flags & SWM_FREE) != 0) {
-		swp_pager_freeswapspace(r1, 1);
-		r1 = SWAPBLK_NONE;
-	}
 	return (r1);
 }
 
diff --git a/sys/vm/uma.h b/sys/vm/uma.h
index 1ea8ee06245..1bd366416cb 100644
--- a/sys/vm/uma.h
+++ b/sys/vm/uma.h
@@ -698,4 +698,12 @@ struct uma_percpu_stat {
 void uma_reclaim_wakeup(void);
 void uma_reclaim_worker(void *);
 
+unsigned long uma_limit(void);
+
+/* Return the amount of memory managed by UMA. */
+unsigned long uma_size(void);
+
+/* Return the amount of memory remaining.  May be negative. */
+long uma_avail(void);
+
 #endif	/* _VM_UMA_H_ */
diff --git a/sys/vm/uma_core.c b/sys/vm/uma_core.c
index 81c953a4838..0dd16dd9c32 100644
--- a/sys/vm/uma_core.c
+++ b/sys/vm/uma_core.c
@@ -62,6 +62,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/eventhandler.h>
 #include <sys/kernel.h>
 #include <sys/types.h>
+#include <sys/limits.h>
 #include <sys/queue.h>
 #include <sys/malloc.h>
 #include <sys/ktr.h>
@@ -148,7 +149,7 @@ static struct mtx uma_boot_pages_mtx;
 static struct sx uma_drain_lock;
 
 /* kmem soft limit. */
-static unsigned long uma_kmem_limit;
+static unsigned long uma_kmem_limit = LONG_MAX;
 static volatile unsigned long uma_kmem_total;
 
 /* Is the VM done starting up? */
@@ -3265,7 +3266,14 @@ unsigned long
 uma_size(void)
 {
 
-	return uma_kmem_total;
+	return (uma_kmem_total);
+}
+
+long
+uma_avail(void)
+{
+
+	return (uma_kmem_limit - uma_kmem_total);
 }
 
 void
diff --git a/sys/vm/uma_int.h b/sys/vm/uma_int.h
index 158c2383c88..a8aca454f06 100644
--- a/sys/vm/uma_int.h
+++ b/sys/vm/uma_int.h
@@ -428,10 +428,6 @@ void uma_small_free(void *mem, vm_size_t size, uint8_t flags);
 
 /* Set a global soft limit on UMA managed memory. */
 void uma_set_limit(unsigned long limit);
-unsigned long uma_limit(void);
-
-/* Return the amount of memory managed by UMA. */
-unsigned long uma_size(void);
 #endif /* _KERNEL */
 
 #endif /* VM_UMA_INT_H */
diff --git a/sys/vm/vm_pageout.c b/sys/vm/vm_pageout.c
index 43c417ffe3a..543e5b144f5 100644
--- a/sys/vm/vm_pageout.c
+++ b/sys/vm/vm_pageout.c
@@ -150,7 +150,7 @@ SDT_PROBE_DEFINE(vm, , , vm__lowmem_scan);
 int vm_pageout_deficit;		/* Estimated number of pages deficit */
 u_int vm_pageout_wakeup_thresh;
 static int vm_pageout_oom_seq = 12;
-bool vm_pageout_wanted;		/* Event on which pageout daemon sleeps */
+static bool vm_pageout_wanted;	/* Event on which pageout daemon sleeps */
 bool vm_pages_needed;		/* Are threads waiting for free pages? */
 
 /* Pending request for dirty page laundering. */
diff --git a/sys/vm/vm_pageout.h b/sys/vm/vm_pageout.h
index 9362ea12905..60ee00d9e82 100644
--- a/sys/vm/vm_pageout.h
+++ b/sys/vm/vm_pageout.h
@@ -76,7 +76,6 @@
 extern int vm_page_max_wired;
 extern int vm_pageout_deficit;
 extern int vm_pageout_page_count;
-extern bool vm_pageout_wanted;
 extern bool vm_pages_needed;
 
 #define	VM_OOM_MEM	1
diff --git a/sys/vm/vm_swapout.c b/sys/vm/vm_swapout.c
index f76ecf92b71..ea76c1ee0d6 100644
--- a/sys/vm/vm_swapout.c
+++ b/sys/vm/vm_swapout.c
@@ -203,6 +203,8 @@ vm_swapout_object_deactivate_pages(pmap_t pmap, vm_object_t first_object,
 		TAILQ_FOREACH(p, &object->memq, listq) {
 			if (pmap_resident_count(pmap) <= desired)
 				goto unlock_return;
+			if (should_yield())
+				goto unlock_return;
 			if (vm_page_busied(p))
 				continue;
 			VM_CNT_INC(v_pdpages);
@@ -516,8 +518,10 @@ vm_daemon(void)
 			PRELE(p);
 		}
 		sx_sunlock(&allproc_lock);
-		if (tryagain != 0 && attempts <= 10)
+		if (tryagain != 0 && attempts <= 10) {
+			maybe_yield();
 			goto again;
+		}
 	}
 }
 
@@ -542,7 +546,7 @@ vm_thread_swapout(struct thread *td)
 			panic("vm_thread_swapout: kstack already missing?");
 		vm_page_dirty(m);
 		vm_page_lock(m);
-		vm_page_unwire(m, PQ_INACTIVE);
+		vm_page_unwire(m, PQ_LAUNDRY);
 		vm_page_unlock(m);
 	}
 	VM_OBJECT_WUNLOCK(ksobj);
@@ -556,16 +560,14 @@ vm_thread_swapin(struct thread *td)
 {
 	vm_object_t ksobj;
 	vm_page_t ma[KSTACK_MAX_PAGES];
-	int pages;
+	int a, count, i, j, pages, rv;
 
 	pages = td->td_kstack_pages;
 	ksobj = td->td_kstack_obj;
 	VM_OBJECT_WLOCK(ksobj);
 	(void)vm_page_grab_pages(ksobj, 0, VM_ALLOC_NORMAL | VM_ALLOC_WIRED, ma,
 	    pages);
-	for (int i = 0; i < pages;) {
-		int j, a, count, rv;
-
+	for (i = 0; i < pages;) {
 		vm_page_assert_xbusied(ma[i]);
 		if (ma[i]->valid == VM_PAGE_BITS_ALL) {
 			vm_page_xunbusy(ma[i]);
@@ -642,13 +644,9 @@ faultin(struct proc *p)
 void
 swapper(void)
 {
-	struct proc *p;
+	struct proc *p, *pp;
 	struct thread *td;
-	struct proc *pp;
-	int slptime;
-	int swtime;
-	int ppri;
-	int pri;
+	int ppri, pri, slptime, swtime;
 
 loop:
 	if (vm_page_count_min()) {
@@ -735,156 +733,74 @@ swapout_procs(int action)
 {
 	struct proc *p;
 	struct thread *td;
-	int didswap = 0;
+	int slptime;
+	bool didswap, doswap;
 
-retry:
+	MPASS((action & (VM_SWAP_NORMAL | VM_SWAP_IDLE)) != 0);
+
+	didswap = false;
 	sx_slock(&allproc_lock);
 	FOREACH_PROC_IN_SYSTEM(p) {
-		struct vmspace *vm;
-		int minslptime = 100000;
-		int slptime;
-
+		/*
+		 * Filter out not yet fully constructed processes.  Do
+		 * not swap out held processes.  Avoid processes which
+		 * are system, exiting, execing, traced, already swapped
+		 * out or are in the process of being swapped in or out.
+		 */
 		PROC_LOCK(p);
-		/*
-		 * Watch out for a process in
-		 * creation.  It may have no
-		 * address space or lock yet.
-		 */
-		if (p->p_state == PRS_NEW) {
+		if (p->p_state != PRS_NORMAL || p->p_lock != 0 || (p->p_flag &
+		    (P_SYSTEM | P_WEXIT | P_INEXEC | P_STOPPED_SINGLE |
+		    P_TRACED | P_SWAPPINGOUT | P_SWAPPINGIN | P_INMEM)) !=
+		    P_INMEM) {
 			PROC_UNLOCK(p);
 			continue;
 		}
+
 		/*
-		 * An aio daemon switches its
-		 * address space while running.
-		 * Perform a quick check whether
-		 * a process has P_SYSTEM.
-		 * Filter out exiting processes.
+		 * Further consideration of this process for swap out
+		 * requires iterating over its threads.  We release
+		 * allproc_lock here so that process creation and
+		 * destruction are not blocked while we iterate.
+		 *
+		 * To later reacquire allproc_lock and resume
+		 * iteration over the allproc list, we will first have
+		 * to release the lock on the process.  We place a
+		 * hold on the process so that it remains in the
+		 * allproc list while it is unlocked.
 		 */
-		if ((p->p_flag & (P_SYSTEM | P_WEXIT)) != 0) {
-			PROC_UNLOCK(p);
-			continue;
-		}
 		_PHOLD_LITE(p);
-		PROC_UNLOCK(p);
 		sx_sunlock(&allproc_lock);
 
 		/*
-		 * Do not swapout a process that
-		 * is waiting for VM data
-		 * structures as there is a possible
-		 * deadlock.  Test this first as
-		 * this may block.
-		 *
-		 * Lock the map until swapout
-		 * finishes, or a thread of this
-		 * process may attempt to alter
-		 * the map.
+		 * Do not swapout a realtime process.
+		 * Guarantee swap_idle_threshold1 time in memory.
+		 * If the system is under memory stress, or if we are
+		 * swapping idle processes >= swap_idle_threshold2,
+		 * then swap the process out.
 		 */
-		vm = vmspace_acquire_ref(p);
-		if (vm == NULL)
-			goto nextproc2;
-		if (!vm_map_trylock(&vm->vm_map))
-			goto nextproc1;
-
-		PROC_LOCK(p);
-		if (p->p_lock != 1 || (p->p_flag & (P_STOPPED_SINGLE |
-		    P_TRACED | P_SYSTEM)) != 0)
-			goto nextproc;
-
-		/*
-		 * only aiod changes vmspace, however it will be
-		 * skipped because of the if statement above checking 
-		 * for P_SYSTEM
-		 */
-		if ((p->p_flag & (P_INMEM|P_SWAPPINGOUT|P_SWAPPINGIN)) != P_INMEM)
-			goto nextproc;
-
-		switch (p->p_state) {
-		default:
-			/* Don't swap out processes in any sort
-			 * of 'special' state. */
-			break;
-
-		case PRS_NORMAL:
-			/*
-			 * do not swapout a realtime process
-			 * Check all the thread groups..
-			 */
-			FOREACH_THREAD_IN_PROC(p, td) {
-				thread_lock(td);
-				if (PRI_IS_REALTIME(td->td_pri_class)) {
-					thread_unlock(td);
-					goto nextproc;
-				}
-				slptime = (ticks - td->td_slptick) / hz;
-				/*
-				 * Guarantee swap_idle_threshold1
-				 * time in memory.
-				 */
-				if (slptime < swap_idle_threshold1) {
-					thread_unlock(td);
-					goto nextproc;
-				}
-
-				/*
-				 * Do not swapout a process if it is
-				 * waiting on a critical event of some
-				 * kind or there is a thread whose
-				 * pageable memory may be accessed.
-				 *
-				 * This could be refined to support
-				 * swapping out a thread.
-				 */
-				if (!thread_safetoswapout(td)) {
-					thread_unlock(td);
-					goto nextproc;
-				}
-				/*
-				 * If the system is under memory stress,
-				 * or if we are swapping
-				 * idle processes >= swap_idle_threshold2,
-				 * then swap the process out.
-				 */
-				if (((action & VM_SWAP_NORMAL) == 0) &&
-				    (((action & VM_SWAP_IDLE) == 0) ||
-				    (slptime < swap_idle_threshold2))) {
-					thread_unlock(td);
-					goto nextproc;
-				}
-
-				if (minslptime > slptime)
-					minslptime = slptime;
-				thread_unlock(td);
-			}
-
-			/*
-			 * If the pageout daemon didn't free enough pages,
-			 * or if this process is idle and the system is
-			 * configured to swap proactively, swap it out.
-			 */
-			if ((action & VM_SWAP_NORMAL) ||
-				((action & VM_SWAP_IDLE) &&
-				 (minslptime > swap_idle_threshold2))) {
-				_PRELE(p);
-				if (swapout(p) == 0)
-					didswap++;
-				PROC_UNLOCK(p);
-				vm_map_unlock(&vm->vm_map);
-				vmspace_free(vm);
-				goto retry;
-			}
+		doswap = true;
+		FOREACH_THREAD_IN_PROC(p, td) {
+			thread_lock(td);
+			slptime = (ticks - td->td_slptick) / hz;
+			if (PRI_IS_REALTIME(td->td_pri_class) ||
+			    slptime < swap_idle_threshold1 ||
+			    !thread_safetoswapout(td) ||
+			    ((action & VM_SWAP_NORMAL) == 0 &&
+			    slptime < swap_idle_threshold2))
+				doswap = false;
+			thread_unlock(td);
+			if (!doswap)
+				break;
 		}
-nextproc:
+		if (doswap && swapout(p) == 0)
+			didswap = true;
+
 		PROC_UNLOCK(p);
-		vm_map_unlock(&vm->vm_map);
-nextproc1:
-		vmspace_free(vm);
-nextproc2:
 		sx_slock(&allproc_lock);
 		PRELE(p);
 	}
 	sx_sunlock(&allproc_lock);
+
 	/*
 	 * If we swapped something out, and another process needed memory,
 	 * then wakeup the sched process.
@@ -938,9 +854,10 @@ swapout(struct proc *p)
 	    P_INMEM, ("swapout: lost a swapout race?"));
 
 	/*
-	 * remember the process resident count
+	 * Remember the resident count.
 	 */
 	p->p_vmspace->vm_swrss = vmspace_resident_count(p->p_vmspace);
+
 	/*
 	 * Check and mark all threads before we proceed.
 	 */
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h
index 0fa472f948a..f41089fd17d 100644
--- a/sys/x86/include/specialreg.h
+++ b/sys/x86/include/specialreg.h
@@ -76,6 +76,7 @@
 #define	CR4_PCIDE 0x00020000	/* Enable Context ID */
 #define	CR4_XSAVE 0x00040000	/* XSETBV/XGETBV */
 #define	CR4_SMEP 0x00100000	/* Supervisor-Mode Execution Prevention */
+#define	CR4_SMAP 0x00200000	/* Supervisor-Mode Access Prevention */
 
 /*
  * Bits in AMD64 special registers.  EFER is 64 bits wide.
diff --git a/sys/x86/include/x86_var.h b/sys/x86/include/x86_var.h
index 57716869584..b996a5a0a04 100644
--- a/sys/x86/include/x86_var.h
+++ b/sys/x86/include/x86_var.h
@@ -119,7 +119,8 @@ void	cpu_setregs(void);
 void	dump_add_page(vm_paddr_t);
 void	dump_drop_page(vm_paddr_t);
 void	finishidentcpu(void);
-void	identify_cpu(void);
+void	identify_cpu1(void);
+void	identify_cpu2(void);
 void	identify_hypervisor(void);
 void	initializecpu(void);
 void	initializecpucache(void);
diff --git a/sys/x86/x86/delay.c b/sys/x86/x86/delay.c
index 917a015b903..d0900c4330b 100644
--- a/sys/x86/x86/delay.c
+++ b/sys/x86/x86/delay.c
@@ -101,8 +101,12 @@ void
 DELAY(int n)
 {
 
-	if (delay_tc(n))
+	TSENTER();
+	if (delay_tc(n)) {
+		TSEXIT();
 		return;
+	}
 
 	init_ops.early_delay(n);
+	TSEXIT();
 }
diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c
index 8d4da42c83a..31fc7341c33 100644
--- a/sys/x86/x86/identcpu.c
+++ b/sys/x86/x86/identcpu.c
@@ -1385,9 +1385,8 @@ fix_cpuid(void)
 	return (false);
 }
 
-#ifdef __amd64__
 void
-identify_cpu(void)
+identify_cpu1(void)
 {
 	u_int regs[4];
 
@@ -1404,7 +1403,29 @@ identify_cpu(void)
 	cpu_feature = regs[3];
 	cpu_feature2 = regs[2];
 }
-#endif
+
+void
+identify_cpu2(void)
+{
+	u_int regs[4], cpu_stdext_disable;
+
+	if (cpu_high >= 7) {
+		cpuid_count(7, 0, regs);
+		cpu_stdext_feature = regs[1];
+
+		/*
+		 * Some hypervisors failed to filter out unsupported
+		 * extended features.  Allow to disable the
+		 * extensions, activation of which requires setting a
+		 * bit in CR4, and which VM monitors do not support.
+		 */
+		cpu_stdext_disable = 0;
+		TUNABLE_INT_FETCH("hw.cpu_stdext_disable", &cpu_stdext_disable);
+		cpu_stdext_feature &= ~cpu_stdext_disable;
+
+		cpu_stdext_feature2 = regs[2];
+	}
+}
 
 /*
  * Final stage of CPU identification.
@@ -1412,7 +1433,7 @@ identify_cpu(void)
 void
 finishidentcpu(void)
 {
-	u_int regs[4], cpu_stdext_disable;
+	u_int regs[4];
 #ifdef __i386__
 	u_char ccr3;
 #endif
@@ -1431,22 +1452,7 @@ finishidentcpu(void)
 		cpu_mon_max_size = regs[1] &  CPUID5_MON_MAX_SIZE;
 	}
 
-	if (cpu_high >= 7) {
-		cpuid_count(7, 0, regs);
-		cpu_stdext_feature = regs[1];
-
-		/*
-		 * Some hypervisors failed to filter out unsupported
-		 * extended features.  Allow to disable the
-		 * extensions, activation of which requires setting a
-		 * bit in CR4, and which VM monitors do not support.
-		 */
-		cpu_stdext_disable = 0;
-		TUNABLE_INT_FETCH("hw.cpu_stdext_disable", &cpu_stdext_disable);
-		cpu_stdext_feature &= ~cpu_stdext_disable;
-
-		cpu_stdext_feature2 = regs[2];
-	}
+	identify_cpu2();
 
 #ifdef __i386__
 	if (cpu_high > 0 &&
diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c
index ded3a06bc2f..981ac4482be 100644
--- a/sys/x86/x86/local_apic.c
+++ b/sys/x86/x86/local_apic.c
@@ -217,6 +217,7 @@ lapic_write32(enum LAPIC_REGISTERS reg, uint32_t val)
 
 	if (x2apic_mode) {
 		mfence();
+		lfence();
 		wrmsr(MSR_APIC_000 + reg, val);
 	} else {
 		*(volatile uint32_t *)(lapic_map + reg * LAPIC_MEM_MUL) = val;
diff --git a/targets/pseudo/userland/Makefile.depend b/targets/pseudo/userland/Makefile.depend
index c485983b247..98690f74ae5 100644
--- a/targets/pseudo/userland/Makefile.depend
+++ b/targets/pseudo/userland/Makefile.depend
@@ -528,7 +528,6 @@ DIRDEPS+= \
 	usr.sbin/bsnmpd/modules/snmp_wlan \
 	usr.sbin/bsnmpd/tools/bsnmptools \
 	usr.sbin/bsnmpd/tools/libbsnmptools \
-	usr.sbin/burncd \
 	usr.sbin/cdcontrol \
 	usr.sbin/chkgrp \
 	usr.sbin/chown \
diff --git a/tests/sys/geom/class/eli/attach_d_test.sh b/tests/sys/geom/class/eli/attach_d_test.sh
index 5d700b3270c..ed9226972d8 100644
--- a/tests/sys/geom/class/eli/attach_d_test.sh
+++ b/tests/sys/geom/class/eli/attach_d_test.sh
@@ -6,30 +6,30 @@
 base=`basename $0`
 sectors=100
 keyfile=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..3"
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile md${no}
-geli attach -d -p -k $keyfile md${no}
-if [ -c /dev/md${no}.eli ]; then
+geli init -B none -P -K $keyfile ${md}
+geli attach -d -p -k $keyfile ${md}
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
 # Be sure it doesn't detach on read.
-dd if=/dev/md${no}.eli of=/dev/null 2>/dev/null
+dd if=/dev/${md}.eli of=/dev/null 2>/dev/null
 sleep 1
-if [ -c /dev/md${no}.eli ]; then
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
-true > /dev/md${no}.eli
+true > /dev/${md}.eli
 sleep 1
-if [ ! -c /dev/md${no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
diff --git a/tests/sys/geom/class/eli/conf.sh b/tests/sys/geom/class/eli/conf.sh
index 5ac291b2e15..6e26145623e 100644
--- a/tests/sys/geom/class/eli/conf.sh
+++ b/tests/sys/geom/class/eli/conf.sh
@@ -4,13 +4,6 @@
 class="eli"
 base=`basename $0`
 
-# We need to use linear probing in order to detect the first available md(4)
-# device instead of using mdconfig -a -t, because geli(8) attachs md(4) devices
-no=0
-while [ -c /dev/md$no ]; do
-	: $(( no += 1 ))
-done
-
 # Execute `func` for each combination of cipher, sectorsize, and hmac algo
 # `func` usage should be:
 # func <cipher> <aalgo> <secsize>
@@ -30,7 +23,11 @@ for_each_geli_config() {
 		for aalgo in hmac/md5 hmac/sha1 hmac/ripemd160 hmac/sha256 \
 		    hmac/sha384 hmac/sha512; do
 			for secsize in 512 1024 2048 4096 8192; do
+				bytes=`expr $secsize \* $sectors + 512`b
+				md=$(attach_md -t malloc -s $bytes)
 				${func} $cipher $aalgo $secsize
+				geli detach ${md} 2>/dev/null
+				mdconfig -d -u ${md} 2>/dev/null
 			done
 		done
 	done
@@ -53,7 +50,11 @@ for_each_geli_config_nointegrity() {
 		ealgo=${cipher%%:*}
 		keylen=${cipher##*:}
 		for secsize in 512 1024 2048 4096 8192; do
-			${func} $cipher $aalgo $secsize
+			bytes=`expr $secsize \* $sectors + 512`b
+			md=$(attach_md -t malloc -s $bytes)
+			${func} $cipher $secsize
+			geli detach ${md} 2>/dev/null
+			mdconfig -d -u ${md} 2>/dev/null
 		done
 	done
 }
@@ -61,8 +62,14 @@ for_each_geli_config_nointegrity() {
 
 geli_test_cleanup()
 {
-	[ -c /dev/md${no}.eli ] && geli detach md${no}.eli
-	mdconfig -d -u $no
+	if [ -f "$TEST_MDS_FILE" ]; then
+		while read md; do
+			[ -c /dev/${md}.eli ] && \
+				geli detach $md.eli 2>/dev/null
+			mdconfig -d -u $md 2>/dev/null
+		done < $TEST_MDS_FILE
+	fi
+	rm -f "$TEST_MDS_FILE"
 }
 trap geli_test_cleanup ABRT EXIT INT TERM
 
diff --git a/tests/sys/geom/class/eli/configure_b_B_test.sh b/tests/sys/geom/class/eli/configure_b_B_test.sh
index b6cdf4fe1d9..521917551fc 100644
--- a/tests/sys/geom/class/eli/configure_b_B_test.sh
+++ b/tests/sys/geom/class/eli/configure_b_B_test.sh
@@ -5,123 +5,123 @@
 
 base=`basename $0`
 sectors=100
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..17"
 
-geli init -B none -P -K /dev/null md${no}
+geli init -B none -P -K /dev/null ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
 
-geli dump md${no} | egrep 'flags: 0x0$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x0$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
 
-geli init -B none -b -P -K /dev/null md${no}
+geli init -B none -b -P -K /dev/null ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
 
-geli dump md${no} | egrep 'flags: 0x2$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x2$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 4"
 else
 	echo "not ok 4"
 fi
 
-geli configure -B md${no}
+geli configure -B ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 5"
 else
 	echo "not ok 5"
 fi
 
-geli dump md${no} | egrep 'flags: 0x0$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x0$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
 	echo "not ok 6"
 fi
 
-geli configure -b md${no}
+geli configure -b ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 7"
 else
 	echo "not ok 7"
 fi
 
-geli dump md${no} | egrep 'flags: 0x2$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x2$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 8"
 else
 	echo "not ok 8"
 fi
 
-geli attach -p -k /dev/null md${no}
+geli attach -p -k /dev/null ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 9"
 else
 	echo "not ok 9"
 fi
 
-geli list md${no}.eli | egrep '^Flags: .*BOOT' >/dev/null
+geli list ${md}.eli | egrep '^Flags: .*BOOT' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 10"
 else
 	echo "not ok 10"
 fi
 
-geli configure -B md${no}
+geli configure -B ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 11"
 else
 	echo "not ok 11"
 fi
 
-geli list md${no}.eli | egrep '^Flags: .*BOOT' >/dev/null
+geli list ${md}.eli | egrep '^Flags: .*BOOT' >/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 12"
 else
 	echo "not ok 12"
 fi
 
-geli dump md${no} | egrep 'flags: 0x0$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x0$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 13"
 else
 	echo "not ok 13"
 fi
 
-geli configure -b md${no}
+geli configure -b ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 14"
 else
 	echo "not ok 14"
 fi
 
-geli list md${no}.eli | egrep '^Flags: .*BOOT' >/dev/null
+geli list ${md}.eli | egrep '^Flags: .*BOOT' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 15"
 else
 	echo "not ok 15"
 fi
 
-geli dump md${no} | egrep 'flags: 0x2$' >/dev/null
+geli dump ${md} | egrep 'flags: 0x2$' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 16"
 else
 	echo "not ok 16"
 fi
 
-geli detach md${no}
+geli detach ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 17"
 else
diff --git a/tests/sys/geom/class/eli/delkey_test.sh b/tests/sys/geom/class/eli/delkey_test.sh
index 67b253efd0d..a76100a4dda 100644
--- a/tests/sys/geom/class/eli/delkey_test.sh
+++ b/tests/sys/geom/class/eli/delkey_test.sh
@@ -9,7 +9,7 @@ keyfile1=`mktemp $base.XXXXXX` || exit 1
 keyfile2=`mktemp $base.XXXXXX` || exit 1
 keyfile3=`mktemp $base.XXXXXX` || exit 1
 keyfile4=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..14"
 
@@ -18,21 +18,21 @@ dd if=/dev/random of=${keyfile2} bs=512 count=16 >/dev/null 2>&1
 dd if=/dev/random of=${keyfile3} bs=512 count=16 >/dev/null 2>&1
 dd if=/dev/random of=${keyfile4} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile1 md${no}
-geli attach -p -k $keyfile1 md${no}
-geli setkey -n 1 -P -K $keyfile2 md${no}
+geli init -B none -P -K $keyfile1 ${md}
+geli attach -p -k $keyfile1 ${md}
+geli setkey -n 1 -P -K $keyfile2 ${md}
 
 # Remove key 0 for attached provider.
-geli delkey -n 0 md${no}
+geli delkey -n 0 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # We cannot use keyfile1 anymore.
-geli attach -p -k $keyfile1 md${no} 2>/dev/null
+geli attach -p -k $keyfile1 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 2"
 else
@@ -40,7 +40,7 @@ else
 fi
 
 # Attach with key 1.
-geli attach -p -k $keyfile2 md${no}
+geli attach -p -k $keyfile2 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 3"
 else
@@ -48,7 +48,7 @@ else
 fi
 
 # We cannot remove last key without -f option (for attached provider).
-geli delkey -n 1 md${no} 2>/dev/null
+geli delkey -n 1 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 4"
 else
@@ -56,7 +56,7 @@ else
 fi
 
 # Remove last key for attached provider.
-geli delkey -f -n 1 md${no}
+geli delkey -f -n 1 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 5"
 else
@@ -64,16 +64,16 @@ else
 fi
 
 # If there are no valid keys, but provider is attached, we can save situation.
-geli setkey -n 0 -P -K $keyfile3 md${no}
+geli setkey -n 0 -P -K $keyfile3 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
 	echo "not ok 6"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # We cannot use keyfile2 anymore.
-geli attach -p -k $keyfile2 md${no} 2>/dev/null
+geli attach -p -k $keyfile2 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 7"
 else
@@ -81,7 +81,7 @@ else
 fi
 
 # Attach with key 0.
-geli attach -p -k $keyfile3 md${no}
+geli attach -p -k $keyfile3 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 8"
 else
@@ -89,16 +89,16 @@ else
 fi
 
 # Setup key 1.
-geli setkey -n 1 -P -K $keyfile4 md${no}
+geli setkey -n 1 -P -K $keyfile4 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 9"
 else
 	echo "not ok 9"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # Remove key 1 for detached provider.
-geli delkey -n 1 md${no}
+geli delkey -n 1 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 10"
 else
@@ -106,7 +106,7 @@ else
 fi
 
 # We cannot use keyfile4 anymore.
-geli attach -p -k $keyfile4 md${no} 2>/dev/null
+geli attach -p -k $keyfile4 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 11"
 else
@@ -114,7 +114,7 @@ else
 fi
 
 # We cannot remove last key without -f option (for detached provider).
-geli delkey -n 0 md${no} 2>/dev/null
+geli delkey -n 0 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 12"
 else
@@ -122,7 +122,7 @@ else
 fi
 
 # Remove last key for detached provider.
-geli delkey -f -n 0 md${no}
+geli delkey -f -n 0 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 13"
 else
@@ -130,7 +130,7 @@ else
 fi
 
 # We cannot use keyfile3 anymore.
-geli attach -p -k $keyfile3 md${no} 2>/dev/null
+geli attach -p -k $keyfile3 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 14"
 else
diff --git a/tests/sys/geom/class/eli/detach_l_test.sh b/tests/sys/geom/class/eli/detach_l_test.sh
index 605ae94e6bf..ba5e1892cf5 100644
--- a/tests/sys/geom/class/eli/detach_l_test.sh
+++ b/tests/sys/geom/class/eli/detach_l_test.sh
@@ -6,36 +6,36 @@
 base=`basename $0`
 sectors=100
 keyfile=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..4"
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile md${no}
-geli attach -p -k $keyfile md${no}
-if [ -c /dev/md${no}.eli ]; then
+geli init -B none -P -K $keyfile ${md}
+geli attach -p -k $keyfile ${md}
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
 # Be sure it doesn't detach before 'detach -l'.
-dd if=/dev/md${no}.eli of=/dev/null 2>/dev/null
+dd if=/dev/${md}.eli of=/dev/null 2>/dev/null
 sleep 1
-if [ -c /dev/md${no}.eli ]; then
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
-geli detach -l md${no}
-if [ -c /dev/md${no}.eli ]; then
+geli detach -l ${md}
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
-dd if=/dev/md${no}.eli of=/dev/null 2>/dev/null
+dd if=/dev/${md}.eli of=/dev/null 2>/dev/null
 sleep 1
-if [ ! -c /dev/md${no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 4"
 else
 	echo "not ok 4"
diff --git a/tests/sys/geom/class/eli/init_B_test.sh b/tests/sys/geom/class/eli/init_B_test.sh
index 3ba743cfbc6..8d384a73930 100644
--- a/tests/sys/geom/class/eli/init_B_test.sh
+++ b/tests/sys/geom/class/eli/init_B_test.sh
@@ -12,90 +12,90 @@ echo "1..13"
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-mdconfig -a -t malloc -s $sectors -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors`)
 
 # -B none
-rm -f /var/backups/md${no}.eli
-geli init -B none -P -K $keyfile md${no} 2>/dev/null
-if [ ! -f /var/backups/md${no}.eli ]; then
+rm -f /var/backups/${md}.eli
+geli init -B none -P -K $keyfile ${md} 2>/dev/null
+if [ ! -f /var/backups/${md}.eli ]; then
 	echo "ok 1 - -B none"
 else
 	echo "not ok 1 - -B none"
 fi
 
 # no -B
-rm -f /var/backups/md${no}.eli
-geli init -P -K $keyfile md${no} >/dev/null 2>&1
-if [ -f /var/backups/md${no}.eli ]; then
+rm -f /var/backups/${md}.eli
+geli init -P -K $keyfile ${md} >/dev/null 2>&1
+if [ -f /var/backups/${md}.eli ]; then
 	echo "ok 2 - no -B"
 else
 	echo "not ok 2 - no -B"
 fi
-geli clear md${no}
-geli attach -p -k $keyfile md${no} 2>/dev/null
+geli clear ${md}
+geli attach -p -k $keyfile ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 3 - no -B"
 else
 	echo "not ok 3 - no -B"
 fi
-if [ ! -c /dev/md${no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 4 - no -B"
 else
 	echo "not ok 4 - no -B"
 fi
-geli restore /var/backups/md${no}.eli md${no}
+geli restore /var/backups/${md}.eli ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 5 - no -B"
 else
 	echo "not ok 5 - no -B"
 fi
-geli attach -p -k $keyfile md${no} 2>/dev/null
+geli attach -p -k $keyfile ${md} 2>/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 6 - no -B"
 else
 	echo "not ok 6 - no -B"
 fi
-if [ -c /dev/md${no}.eli ]; then
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 7 - no -B"
 else
 	echo "not ok 7 - no -B"
 fi
-geli detach md${no}
-rm -f /var/backups/md${no}.eli
+geli detach ${md}
+rm -f /var/backups/${md}.eli
 
 # -B file
 rm -f $backupfile
-geli init -B $backupfile -P -K $keyfile md${no} >/dev/null 2>&1
+geli init -B $backupfile -P -K $keyfile ${md} >/dev/null 2>&1
 if [ -f $backupfile ]; then
 	echo "ok 8 - -B file"
 else
 	echo "not ok 8 - -B file"
 fi
-geli clear md${no}
-geli attach -p -k $keyfile md${no} 2>/dev/null
+geli clear ${md}
+geli attach -p -k $keyfile ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 9 - -B file"
 else
 	echo "not ok 9 - -B file"
 fi
-if [ ! -c /dev/md${no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 10 - -B file"
 else
 	echo "not ok 10 - -B file"
 fi
-geli restore $backupfile md${no}
+geli restore $backupfile ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 11 - -B file"
 else
 	echo "not ok 11 - -B file"
 fi
-geli attach -p -k $keyfile md${no} 2>/dev/null
+geli attach -p -k $keyfile ${md} 2>/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 12 - -B file"
 else
 	echo "not ok 12 - -B file"
 fi
-if [ -c /dev/md${no}.eli ]; then
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 13 - -B file"
 else
 	echo "not ok 13 - -B file"
diff --git a/tests/sys/geom/class/eli/init_J_test.sh b/tests/sys/geom/class/eli/init_J_test.sh
index 266a3d537e0..090a5087745 100644
--- a/tests/sys/geom/class/eli/init_J_test.sh
+++ b/tests/sys/geom/class/eli/init_J_test.sh
@@ -9,7 +9,7 @@ keyfile0=`mktemp $base.XXXXXX` || exit 1
 keyfile1=`mktemp $base.XXXXXX` || exit 1
 passfile0=`mktemp $base.XXXXXX` || exit 1
 passfile1=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..150"
 
@@ -20,106 +20,106 @@ dd if=/dev/random bs=512 count=16 2>/dev/null | sha1 > ${passfile1}
 
 i=1
 for iter in -1 0 64; do
-	geli init -i ${iter} -B none -J ${passfile0} -P md${no} 2>/dev/null && echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -P ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli init -i ${iter} -B none -J ${passfile0} -P -K ${keyfile0} md${no} 2>/dev/null && echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -P -K ${keyfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli init -i ${iter} -B none -J ${passfile0} -K ${keyfile0} md${no} 2>/dev/null || echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -K ${keyfile0} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -p md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -p ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${keyfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${keyfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${passfile0} -p md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${passfile0} -p ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${keyfile0} -k ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${keyfile0} -k ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${keyfile0} -k ${keyfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${keyfile0} -k ${keyfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} -k ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${passfile0} -k ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} -k ${keyfile0} md${no} 2>/dev/null || echo -n "not "
+	geli attach -j ${passfile0} -k ${keyfile0} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${keyfile0} | geli attach -j ${passfile0} -k - md${no} 2>/dev/null || echo -n "not "
+	cat ${keyfile0} | geli attach -j ${passfile0} -k - ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${passfile0} | geli attach -j - -k ${keyfile0} md${no} 2>/dev/null || echo -n "not "
+	cat ${passfile0} | geli attach -j - -k ${keyfile0} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
 
-	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -P md${no} 2>/dev/null && echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -P ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -P -K ${keyfile0} -K ${keyfile1} md${no} 2>/dev/null && echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -P -K ${keyfile0} -K ${keyfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -K ${keyfile0} -K ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	geli init -i ${iter} -B none -J ${passfile0} -J ${passfile1} -K ${keyfile0} -K ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -p md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -p ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -p md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -p ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -k ${keyfile1} -p md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -k ${keyfile1} -p ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -j ${passfile0} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -j ${passfile0} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -j ${passfile0} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -j ${passfile0} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -j ${passfile0} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -k ${keyfile0} -j ${passfile0} -j ${passfile1} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -k ${keyfile0} -j ${passfile0} -j ${passfile1} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile1} -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile0} -k ${keyfile1} -j ${passfile1} -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -k ${keyfile1} -k ${keyfile0} -j ${passfile1} -j ${passfile0} md${no} 2>/dev/null && echo -n "not "
+	geli attach -k ${keyfile1} -k ${keyfile0} -j ${passfile1} -j ${passfile0} ${md} 2>/dev/null && echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli attach -j ${passfile0} -j ${passfile1} -k ${keyfile0} -k ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	geli attach -j ${passfile0} -j ${passfile1} -k ${keyfile0} -k ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${passfile0} | geli attach -j - -j ${passfile1} -k ${keyfile0} -k ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	cat ${passfile0} | geli attach -j - -j ${passfile1} -k ${keyfile0} -k ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${passfile1} | geli attach -j ${passfile0} -j - -k ${keyfile0} -k ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	cat ${passfile1} | geli attach -j ${passfile0} -j - -k ${keyfile0} -k ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${keyfile0} | geli attach -j ${passfile0} -j ${passfile1} -k - -k ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	cat ${keyfile0} | geli attach -j ${passfile0} -j ${passfile1} -k - -k ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${keyfile1} | geli attach -j ${passfile0} -j ${passfile1} -k ${keyfile0} -k - md${no} 2>/dev/null || echo -n "not "
+	cat ${keyfile1} | geli attach -j ${passfile0} -j ${passfile1} -k ${keyfile0} -k - ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${keyfile0} ${keyfile1} | geli attach -j ${passfile0} -j ${passfile1} -k - md${no} 2>/dev/null || echo -n "not "
+	cat ${keyfile0} ${keyfile1} | geli attach -j ${passfile0} -j ${passfile1} -k - ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	cat ${passfile0} ${passfile1} | awk '{printf "%s", $0}' | geli attach -j - -k ${keyfile0} -k ${keyfile1} md${no} 2>/dev/null || echo -n "not "
+	cat ${passfile0} ${passfile1} | awk '{printf "%s", $0}' | geli attach -j - -k ${keyfile0} -k ${keyfile1} ${md} 2>/dev/null || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
-	geli detach md${no} || echo -n "not "
+	geli detach ${md} || echo -n "not "
 	echo "ok ${i}"; i=$((i+1))
 done
 
diff --git a/tests/sys/geom/class/eli/init_a_test.sh b/tests/sys/geom/class/eli/init_a_test.sh
index 9b5b251c930..9f349f5c908 100644
--- a/tests/sys/geom/class/eli/init_a_test.sh
+++ b/tests/sys/geom/class/eli/init_a_test.sh
@@ -15,16 +15,15 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* $sectors + 512`b -u $no || exit 1
-	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize md${no} 2>/dev/null
-	geli attach -p -k $keyfile md${no}
+	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize ${md} 2>/dev/null
+	geli attach -p -k $keyfile ${md}
 
-	secs=`diskinfo /dev/md${no}.eli | awk '{print $4}'`
+	secs=`diskinfo /dev/${md}.eli | awk '{print $4}'`
 
-	dd if=${rnd} of=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null
+	dd if=${rnd} of=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null
 
 	md_rnd=`dd if=${rnd} bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_ddev=`dd if=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_ddev=`dd if=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
 
 	if [ ${md_rnd} = ${md_ddev} ]; then
 		echo "ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
@@ -32,9 +31,6 @@ do_test() {
 		echo "not ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 echo "1..600"
diff --git a/tests/sys/geom/class/eli/init_alias_test.sh b/tests/sys/geom/class/eli/init_alias_test.sh
index 0422bee0706..24aa3941444 100644
--- a/tests/sys/geom/class/eli/init_alias_test.sh
+++ b/tests/sys/geom/class/eli/init_alias_test.sh
@@ -15,10 +15,10 @@ do_test() {
 	expected_ealgo=$3
 	expected_keylen=$4
 
-	geli init -B none -e $ealgo -l $keylen -P -K $keyfile md${no} 2>/dev/null
-	geli attach -p -k $keyfile md${no}
-	real_ealgo=`geli list md${no}.eli | awk '/EncryptionAlgorithm/ {print $2}'`
-	real_keylen=`geli list md${no}.eli | awk '/KeyLength/ {print $2}'`
+	geli init -B none -e $ealgo -l $keylen -P -K $keyfile ${md} 2>/dev/null
+	geli attach -p -k $keyfile ${md}
+	real_ealgo=`geli list ${md}.eli | awk '/EncryptionAlgorithm/ {print $2}'`
+	real_keylen=`geli list ${md}.eli | awk '/KeyLength/ {print $2}'`
 
 	if [ ${real_ealgo} = ${expected_ealgo} ]; then
 		echo "ok $i - ${ealgo} aliased to ${real_ealgo}"
@@ -34,12 +34,12 @@ do_test() {
 	fi
 	i=$((i+1))
 
-	geli detach md${no}
+	geli detach ${md}
 }
 
 echo "1..38"
 i=1
-mdconfig -a -t malloc -s 1024k -u $no || exit 1
+md=$(attach_md -t malloc -s 1024k)
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
 for spec in aes:0:AES-XTS:128 aes:128:AES-XTS:128 aes:256:AES-XTS:256 \
diff --git a/tests/sys/geom/class/eli/init_i_P_test.sh b/tests/sys/geom/class/eli/init_i_P_test.sh
index 1c59a97d391..e512c3f918e 100644
--- a/tests/sys/geom/class/eli/init_i_P_test.sh
+++ b/tests/sys/geom/class/eli/init_i_P_test.sh
@@ -6,13 +6,13 @@
 base=`basename $0`
 sectors=100
 keyfile=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..1"
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -i 64 -P -K ${keyfile} md${no} 2>/dev/null
+geli init -B none -i 64 -P -K ${keyfile} ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 1"
 else
diff --git a/tests/sys/geom/class/eli/init_test.sh b/tests/sys/geom/class/eli/init_test.sh
index 31fca551436..fa682797508 100644
--- a/tests/sys/geom/class/eli/init_test.sh
+++ b/tests/sys/geom/class/eli/init_test.sh
@@ -16,19 +16,17 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* $sectors + 512`b -u $no || exit 1
+	geli init -B none -e $ealgo -l $keylen -P -K $keyfile -s $secsize ${md} 2>/dev/null
+	geli attach -p -k $keyfile ${md}
 
-	geli init -B none -e $ealgo -l $keylen -P -K $keyfile -s $secsize md${no} 2>/dev/null
-	geli attach -p -k $keyfile md${no}
-
-	secs=`diskinfo /dev/md${no}.eli | awk '{print $4}'`
+	secs=`diskinfo /dev/${md}.eli | awk '{print $4}'`
 
 	dd if=/dev/random of=${rnd} bs=${secsize} count=${secs} >/dev/null 2>&1
-	dd if=${rnd} of=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null
+	dd if=${rnd} of=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null
 
 	md_rnd=`dd if=${rnd} bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_ddev=`dd if=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_edev=`dd if=/dev/md${no} bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_ddev=`dd if=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_edev=`dd if=/dev/${md} bs=${secsize} count=${secs} 2>/dev/null | md5`
 
 	if [ ${md_rnd} = ${md_ddev} ]; then
 		echo "ok $i - ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
@@ -42,9 +40,6 @@ do_test() {
 		echo "not ok $i - ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 i=1
diff --git a/tests/sys/geom/class/eli/integrity_copy_test.sh b/tests/sys/geom/class/eli/integrity_copy_test.sh
index ae345d74cae..485db915f96 100644
--- a/tests/sys/geom/class/eli/integrity_copy_test.sh
+++ b/tests/sys/geom/class/eli/integrity_copy_test.sh
@@ -4,6 +4,7 @@
 . $(dirname $0)/conf.sh
 
 base=`basename $0`
+sectors=2
 keyfile=`mktemp $base.XXXXXX` || exit 1
 sector=`mktemp $base.XXXXXX` || exit 1
 
@@ -16,13 +17,12 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* 2 + 512`b -u $no || exit 1
-	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize md${no} 2>/dev/null
-	geli attach -p -k $keyfile md${no}
+	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize ${md} 2>/dev/null
+	geli attach -p -k $keyfile ${md}
 
-	dd if=/dev/random of=/dev/md${no}.eli bs=${secsize} count=1 >/dev/null 2>&1
+	dd if=/dev/random of=/dev/${md}.eli bs=${secsize} count=1 >/dev/null 2>&1
 
-	dd if=/dev/md${no}.eli bs=${secsize} count=1 >/dev/null 2>&1
+	dd if=/dev/${md}.eli bs=${secsize} count=1 >/dev/null 2>&1
 	if [ $? -eq 0 ]; then
 		echo "ok $i - small 1 aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
@@ -30,14 +30,14 @@ do_test() {
 	fi
 	i=$((i+1))
 
-	geli detach md${no}
+	geli detach ${md}
 	# Copy first small sector to the second small sector.
 	# This should be detected as corruption.
-	dd if=/dev/md${no} of=${sector} bs=512 count=1 >/dev/null 2>&1
-	dd if=${sector} of=/dev/md${no} bs=512 count=1 seek=1 >/dev/null 2>&1
-	geli attach -p -k $keyfile md${no}
+	dd if=/dev/${md} of=${sector} bs=512 count=1 >/dev/null 2>&1
+	dd if=${sector} of=/dev/${md} bs=512 count=1 seek=1 >/dev/null 2>&1
+	geli attach -p -k $keyfile ${md}
 
-	dd if=/dev/md${no}.eli of=/dev/null bs=${secsize} count=1 >/dev/null 2>&1
+	dd if=/dev/${md}.eli of=/dev/null bs=${secsize} count=1 >/dev/null 2>&1
 	if [ $? -ne 0 ]; then
 		echo "ok $i - small 2 aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
@@ -45,14 +45,14 @@ do_test() {
 	fi
 	i=$((i+1))
 
-	ms=`diskinfo /dev/md${no} | awk '{print $3 - 512}'`
-	ns=`diskinfo /dev/md${no}.eli | awk '{print $4}'`
+	ms=`diskinfo /dev/${md} | awk '{print $3 - 512}'`
+	ns=`diskinfo /dev/${md}.eli | awk '{print $4}'`
 	usecsize=`echo "($ms / $ns) - (($ms / $ns) % 512)" | bc`
 
 	# Fix the corruption
-	dd if=/dev/random of=/dev/md${no}.eli bs=${secsize} count=2 >/dev/null 2>&1
+	dd if=/dev/random of=/dev/${md}.eli bs=${secsize} count=2 >/dev/null 2>&1
 
-	dd if=/dev/md${no}.eli bs=${secsize} count=2 >/dev/null 2>&1
+	dd if=/dev/${md}.eli bs=${secsize} count=2 >/dev/null 2>&1
 	if [ $? -eq 0 ]; then
 		echo "ok $i - big 1 aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
@@ -60,23 +60,18 @@ do_test() {
 	fi
 	i=$((i+1))
 
-	geli detach md${no}
+	geli detach ${md}
 	# Copy first big sector to the second big sector.
 	# This should be detected as corruption.
-	dd if=/dev/md${no} of=${sector} bs=${usecsize} count=1 >/dev/null 2>&1
-	dd if=${sector} of=/dev/md${no} bs=${usecsize} count=1 seek=1 >/dev/null 2>&1
-	geli attach -p -k $keyfile md${no}
-
-	dd if=/dev/md${no}.eli of=/dev/null bs=${secsize} count=2 >/dev/null 2>&1
+	dd if=/dev/${md} of=${sector} bs=${usecsize} count=1 >/dev/null 2>&1
+	dd if=${sector} of=/dev/${md} bs=${usecsize} count=1 seek=1 >/dev/null 2>&1
+	geli attach -p -k $keyfile ${md} 2>/dev/null
 	if [ $? -ne 0 ]; then
 		echo "ok $i - big 2 aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
 		echo "not ok $i - big 2 aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 
diff --git a/tests/sys/geom/class/eli/integrity_data_test.sh b/tests/sys/geom/class/eli/integrity_data_test.sh
index 73b950a58a5..43b3a404e3a 100644
--- a/tests/sys/geom/class/eli/integrity_data_test.sh
+++ b/tests/sys/geom/class/eli/integrity_data_test.sh
@@ -4,6 +4,7 @@
 . $(dirname $0)/conf.sh
 
 base=`basename $0`
+sectors=2
 keyfile=`mktemp $base.XXXXXX` || exit 1
 sector=`mktemp $base.XXXXXX` || exit 1
 
@@ -16,25 +17,21 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* 2 + 512`b -u $no || exit 1
-	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize md${no} 2>/dev/null
+	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize ${md} 2>/dev/null
 
 	# Corrupt 8 bytes of data.
-	dd if=/dev/md${no} of=${sector} bs=512 count=1 >/dev/null 2>&1
+	dd if=/dev/${md} of=${sector} bs=512 count=1 >/dev/null 2>&1
 	dd if=/dev/random of=${sector} bs=1 count=8 seek=64 conv=notrunc >/dev/null 2>&1
-	dd if=${sector} of=/dev/md${no} bs=512 count=1 >/dev/null 2>&1
-	geli attach -p -k $keyfile md${no}
+	dd if=${sector} of=/dev/${md} bs=512 count=1 >/dev/null 2>&1
+	geli attach -p -k $keyfile ${md}
 
-	dd if=/dev/md${no}.eli of=/dev/null bs=${secsize} count=1 >/dev/null 2>&1
+	dd if=/dev/${md}.eli of=/dev/null bs=${secsize} count=1 >/dev/null 2>&1
 	if [ $? -ne 0 ]; then
 		echo "ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
 		echo "not ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 i=1
diff --git a/tests/sys/geom/class/eli/integrity_hmac_test.sh b/tests/sys/geom/class/eli/integrity_hmac_test.sh
index 6e1dfa58510..284d080b684 100644
--- a/tests/sys/geom/class/eli/integrity_hmac_test.sh
+++ b/tests/sys/geom/class/eli/integrity_hmac_test.sh
@@ -4,6 +4,7 @@
 . $(dirname $0)/conf.sh
 
 base=`basename $0`
+sectors=2
 keyfile=`mktemp $base.XXXXXX` || exit 1
 sector=`mktemp $base.XXXXXX` || exit 1
 
@@ -16,25 +17,21 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* 2 + 512`b -u $no || exit 2
-	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize md${no} 2>/dev/null
+	geli init -B none -a $aalgo -e $ealgo -l $keylen -P -K $keyfile -s $secsize ${md} 2>/dev/null
 
 	# Corrupt 8 bytes of HMAC.
-	dd if=/dev/md${no} of=${sector} bs=512 count=1 >/dev/null 2>&1
+	dd if=/dev/${md} of=${sector} bs=512 count=1 >/dev/null 2>&1
 	dd if=/dev/random of=${sector} bs=1 count=16 conv=notrunc >/dev/null 2>&1
-	dd if=${sector} of=/dev/md${no} bs=512 count=1 >/dev/null 2>&1
-	geli attach -p -k $keyfile md${no}
+	dd if=${sector} of=/dev/${md} bs=512 count=1 >/dev/null 2>&1
+	geli attach -p -k $keyfile ${md}
 
-	dd if=/dev/md${no}.eli bs=${secsize} count=1 >/dev/null 2>&1
+	dd if=/dev/${md}.eli bs=${secsize} count=1 >/dev/null 2>&1
 	if [ $? -ne 0 ]; then
 		echo "ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	else
 		echo "not ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 
diff --git a/tests/sys/geom/class/eli/kill_test.sh b/tests/sys/geom/class/eli/kill_test.sh
index ccced9f4739..241f2ce73e3 100644
--- a/tests/sys/geom/class/eli/kill_test.sh
+++ b/tests/sys/geom/class/eli/kill_test.sh
@@ -7,19 +7,19 @@ base=`basename $0`
 sectors=100
 keyfile1=`mktemp $base.XXXXXX` || exit 1
 keyfile2=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..9"
 
 dd if=/dev/random of=${keyfile1} bs=512 count=16 >/dev/null 2>&1
 dd if=/dev/random of=${keyfile2} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile1 md${no}
-geli attach -p -k $keyfile1 md${no}
-geli setkey -n 1 -P -K $keyfile2 md${no}
+geli init -B none -P -K $keyfile1 ${md}
+geli attach -p -k $keyfile1 ${md}
+geli setkey -n 1 -P -K $keyfile2 ${md}
 
 # Kill attached provider.
-geli kill md${no}
+geli kill ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 1"
 else
@@ -27,14 +27,14 @@ else
 fi
 sleep 1
 # Provider should be automatically detached.
-if [ ! -c /dev/md{$no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
 
 # We cannot use keyfile1 anymore.
-geli attach -p -k $keyfile1 md${no} 2>/dev/null
+geli attach -p -k $keyfile1 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 3"
 else
@@ -42,36 +42,36 @@ else
 fi
 
 # We cannot use keyfile2 anymore.
-geli attach -p -k $keyfile2 md${no} 2>/dev/null
+geli attach -p -k $keyfile2 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 4"
 else
 	echo "not ok 4"
 fi
 
-geli init -B none -P -K $keyfile1 md${no}
-geli setkey -n 1 -p -k $keyfile1 -P -K $keyfile2 md${no}
+geli init -B none -P -K $keyfile1 ${md}
+geli setkey -n 1 -p -k $keyfile1 -P -K $keyfile2 ${md}
 
 # Should be possible to attach with keyfile1.
-geli attach -p -k $keyfile1 md${no}
+geli attach -p -k $keyfile1 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 5"
 else
 	echo "not ok 5"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # Should be possible to attach with keyfile2.
-geli attach -p -k $keyfile2 md${no}
+geli attach -p -k $keyfile2 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
 	echo "not ok 6"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # Kill detached provider.
-geli kill md${no}
+geli kill ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 7"
 else
@@ -79,7 +79,7 @@ else
 fi
 
 # We cannot use keyfile1 anymore.
-geli attach -p -k $keyfile1 md${no} 2>/dev/null
+geli attach -p -k $keyfile1 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 8"
 else
@@ -87,7 +87,7 @@ else
 fi
 
 # We cannot use keyfile2 anymore.
-geli attach -p -k $keyfile2 md${no} 2>/dev/null
+geli attach -p -k $keyfile2 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 9"
 else
diff --git a/tests/sys/geom/class/eli/nokey_test.sh b/tests/sys/geom/class/eli/nokey_test.sh
index f32e1a4f1eb..282979bd455 100644
--- a/tests/sys/geom/class/eli/nokey_test.sh
+++ b/tests/sys/geom/class/eli/nokey_test.sh
@@ -6,11 +6,11 @@
 base=`basename $0`
 sectors=100
 keyfile=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..8"
 
-geli init -B none -P md${no} 2>/dev/null
+geli init -B none -P ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 1"
 else
@@ -19,43 +19,43 @@ fi
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K ${keyfile} md${no} 2>/dev/null
+geli init -B none -P -K ${keyfile} ${md} 2>/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
-geli attach -p md${no} 2>/dev/null
+geli attach -p ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
-geli attach -p -k ${keyfile} md${no} 2>/dev/null
+geli attach -p -k ${keyfile} ${md} 2>/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 4"
 else
 	echo "not ok 4"
 fi
-geli setkey -n 0 -P md${no} 2>/dev/null
+geli setkey -n 0 -P ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 5"
 else
 	echo "not ok 5"
 fi
-geli detach md${no} 2>/dev/null
+geli detach ${md} 2>/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
 	echo "not ok 6"
 fi
-geli setkey -n 0 -p -P -K ${keyfile} md${no} 2>/dev/null
+geli setkey -n 0 -p -P -K ${keyfile} ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 7"
 else
 	echo "not ok 7"
 fi
-geli setkey -n 0 -p -k ${keyfile} -P md${no} 2>/dev/null
+geli setkey -n 0 -p -k ${keyfile} -P ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 8"
 else
diff --git a/tests/sys/geom/class/eli/onetime_a_test.sh b/tests/sys/geom/class/eli/onetime_a_test.sh
index 0cccf303135..1398bd53b68 100644
--- a/tests/sys/geom/class/eli/onetime_a_test.sh
+++ b/tests/sys/geom/class/eli/onetime_a_test.sh
@@ -16,15 +16,14 @@ do_test() {
 	ealgo=${cipher%%:*}
 	keylen=${cipher##*:}
 
-	mdconfig -a -t malloc -s `expr $secsize \* $sectors + 512`b -u $no || exit 1
-	geli onetime -a $aalgo -e $ealgo -l $keylen -s $secsize md${no} 2>/dev/null
+	geli onetime -a $aalgo -e $ealgo -l $keylen -s $secsize ${md} 2>/dev/null
 
-	secs=`diskinfo /dev/md${no}.eli | awk '{print $4}'`
+	secs=`diskinfo /dev/${md}.eli | awk '{print $4}'`
 
-	dd if=${rnd} of=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null
+	dd if=${rnd} of=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null
 
 	md_rnd=`dd if=${rnd} bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_ddev=`dd if=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_ddev=`dd if=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
 
 	if [ ${md_rnd} = ${md_ddev} ]; then
 		echo "ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
@@ -32,9 +31,6 @@ do_test() {
 		echo "not ok $i - aalgo=${aalgo} ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
 	fi
 	i=$((i+1))
-
-	geli detach md${no}
-	mdconfig -d -u $no
 }
 
 i=1
diff --git a/tests/sys/geom/class/eli/onetime_d_test.sh b/tests/sys/geom/class/eli/onetime_d_test.sh
index 51a6abb8c97..c39ac8f9726 100644
--- a/tests/sys/geom/class/eli/onetime_d_test.sh
+++ b/tests/sys/geom/class/eli/onetime_d_test.sh
@@ -5,30 +5,30 @@
 
 base=`basename $0`
 sectors=100
-mdconfig -a -t malloc -s $sectors -u $no || exit 1
+md=$(attach_md -t malloc -s $sectors)
 
 echo "1..3"
 
-geli onetime -d md${no}
-if [ -c /dev/md${no}.eli ]; then
+geli onetime -d ${md}
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
 # Be sure it doesn't detach on read.
-dd if=/dev/md${no}.eli of=/dev/null 2>/dev/null
+dd if=/dev/${md}.eli of=/dev/null 2>/dev/null
 sleep 1
-if [ -c /dev/md${no}.eli ]; then
+if [ -c /dev/${md}.eli ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
-true > /dev/md${no}.eli
+true > /dev/${md}.eli
 sleep 1
-if [ ! -c /dev/md${no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
 
-mdconfig -d -u $no
+mdconfig -d -u ${md}
diff --git a/tests/sys/geom/class/eli/onetime_test.sh b/tests/sys/geom/class/eli/onetime_test.sh
index 3cade152829..524df2c7a60 100644
--- a/tests/sys/geom/class/eli/onetime_test.sh
+++ b/tests/sys/geom/class/eli/onetime_test.sh
@@ -15,18 +15,17 @@ do_test() {
 	keylen=${cipher##*:}
 
 	rnd=`mktemp $base.XXXXXX` || exit 1
-	mdconfig -a -t malloc -s `expr $secsize \* $sectors`b -u $no || exit 1
 
-	geli onetime -e $ealgo -l $keylen -s $secsize md${no} 2>/dev/null
+	geli onetime -e $ealgo -l $keylen -s $secsize ${md} 2>/dev/null
 
-	secs=`diskinfo /dev/md${no}.eli | awk '{print $4}'`
+	secs=`diskinfo /dev/${md}.eli | awk '{print $4}'`
 
 	dd if=/dev/random of=${rnd} bs=${secsize} count=${secs} >/dev/null 2>&1
-	dd if=${rnd} of=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null
+	dd if=${rnd} of=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null
 
 	md_rnd=`dd if=${rnd} bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_ddev=`dd if=/dev/md${no}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
-	md_edev=`dd if=/dev/md${no} bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_ddev=`dd if=/dev/${md}.eli bs=${secsize} count=${secs} 2>/dev/null | md5`
+	md_edev=`dd if=/dev/${md} bs=${secsize} count=${secs} 2>/dev/null | md5`
 
 	if [ ${md_rnd} = ${md_ddev} ]; then
 		echo "ok $i - ealgo=${ealgo} keylen=${keylen} sec=${secsize}"
@@ -41,9 +40,7 @@ do_test() {
 	fi
 	i=$((i+1))
 
-	geli detach md${no}
 	rm -f $rnd
-	mdconfig -d -u $no
 }
 
 i=1
diff --git a/tests/sys/geom/class/eli/readonly_test.sh b/tests/sys/geom/class/eli/readonly_test.sh
index 721ad62f3b5..2d69d14769e 100644
--- a/tests/sys/geom/class/eli/readonly_test.sh
+++ b/tests/sys/geom/class/eli/readonly_test.sh
@@ -6,34 +6,34 @@
 base=`basename $0`
 sectors=100
 keyfile=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..11"
 
 dd if=/dev/random of=${keyfile} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile md${no}
+geli init -B none -P -K $keyfile ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
 
-geli attach -r -p -k $keyfile md${no}
+geli attach -r -p -k $keyfile ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 2"
 else
 	echo "not ok 2"
 fi
 
-sh -c "true >/dev/md${no}.eli" 2>/dev/null
+sh -c "true >/dev/${md}.eli" 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
 
-geli kill md${no}
+geli kill ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 4"
 else
@@ -41,54 +41,54 @@ else
 fi
 
 # kill should detach provider...
-if [ ! -c /dev/md{$no}.eli ]; then
+if [ ! -c /dev/${md}.eli ]; then
 	echo "ok 5"
 else
 	echo "not ok 5"
 fi
 
 # ...but not destroy the metadata.
-geli attach -r -p -k $keyfile md${no}
+geli attach -r -p -k $keyfile ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
 	echo "not ok 6"
 fi
 
-geli setkey -n 1 -P -K /dev/null md${no} 2>/dev/null
+geli setkey -n 1 -P -K /dev/null ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 7"
 else
 	echo "not ok 7"
 fi
 
-geli delkey -n 0 md${no} 2>/dev/null
+geli delkey -n 0 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 8"
 else
 	echo "not ok 8"
 fi
 
-geli delkey -f -n 0 md${no} 2>/dev/null
+geli delkey -f -n 0 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 9"
 else
 	echo "not ok 9"
 fi
 
-geli list md${no}.eli | egrep '^Flags: .*READ-ONLY' >/dev/null
+geli list ${md}.eli | egrep '^Flags: .*READ-ONLY' >/dev/null
 if [ $? -eq 0 ]; then
 	echo "ok 10"
 else
 	echo "not ok 10"
 fi
 
-geli detach md${no}
+geli detach ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 11"
 else
 	echo "not ok 11"
 fi
 
-mdconfig -d -u $no
+mdconfig -d -u ${md}
 rm -f $keyfile
diff --git a/tests/sys/geom/class/eli/resize_test.sh b/tests/sys/geom/class/eli/resize_test.sh
index ef40ee59b0c..e5bec1a45ce 100644
--- a/tests/sys/geom/class/eli/resize_test.sh
+++ b/tests/sys/geom/class/eli/resize_test.sh
@@ -8,8 +8,7 @@ echo 1..27
 BLK=512
 BLKS_PER_MB=2048
 
-md=$(mdconfig -s40m) || exit 1
-unit=${md#md}
+md=$(attach_md -t malloc -s40m)
 i=1
 
 fsck_md()
@@ -26,17 +25,16 @@ fsck_md()
 }
 
 setsize() {
-    partszMB=$1 unitszMB=$2
+    partszMB=$1
 
-    {
-	echo a: $(($partszMB * $BLKS_PER_MB)) 0 4.2BSD 1024 8192
-	echo c: $(($unitszMB * $BLKS_PER_MB)) 0 unused 0 0
-    } | bsdlabel -R $md /dev/stdin
+    gpart resize -i 1 -s ${partszMB}m ${md}
 }
 
 # Initialise
 
-setsize 10 40 || echo -n "not "
+gpart create -s BSD ${md}
+gpart add -t freebsd-ufs -s 10m ${md}
+setsize 10 || echo -n "not "
 echo ok $i - "Sized ${md}a to 10m"
 i=$((i + 1))
 
@@ -64,7 +62,7 @@ geli detach ${md}a.eli || echo -n "not "
 echo ok $i - "Detached ${md}a.eli"
 i=$((i + 1))
 
-setsize 20 40 || echo -n "not "
+setsize 20 || echo -n "not "
 echo ok $i - "Sized ${md}a to 20m"
 i=$((i + 1))
 geli attach -pktmp.key ${md}a && echo -n "not "
@@ -94,7 +92,7 @@ geli detach ${md}a.eli || echo -n "not "
 echo ok $i - "Detached ${md}a.eli"
 i=$((i + 1))
 
-setsize 30 40 || echo -n "not "
+setsize 30 || echo -n "not "
 echo ok $i - "Sized ${md}a to 30m"
 i=$((i + 1))
 
diff --git a/tests/sys/geom/class/eli/setkey_test.sh b/tests/sys/geom/class/eli/setkey_test.sh
index 458100c7da8..087524d292b 100644
--- a/tests/sys/geom/class/eli/setkey_test.sh
+++ b/tests/sys/geom/class/eli/setkey_test.sh
@@ -11,7 +11,7 @@ keyfile2=`mktemp $base.XXXXXX` || exit 1
 keyfile3=`mktemp $base.XXXXXX` || exit 1
 keyfile4=`mktemp $base.XXXXXX` || exit 1
 keyfile5=`mktemp $base.XXXXXX` || exit 1
-mdconfig -a -t malloc -s `expr $sectors + 1` -u $no || exit 1
+md=$(attach_md -t malloc -s `expr $sectors + 1`)
 
 echo "1..16"
 
@@ -23,24 +23,24 @@ dd if=/dev/random of=${keyfile3} bs=512 count=16 >/dev/null 2>&1
 dd if=/dev/random of=${keyfile4} bs=512 count=16 >/dev/null 2>&1
 dd if=/dev/random of=${keyfile5} bs=512 count=16 >/dev/null 2>&1
 
-geli init -B none -P -K $keyfile1 md${no}
-geli attach -p -k $keyfile1 md${no}
+geli init -B none -P -K $keyfile1 ${md}
+geli attach -p -k $keyfile1 ${md}
 
-dd if=${rnd} of=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null
+dd if=${rnd} of=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null
 rm -f $rnd
-hash2=`dd if=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null | md5`
+hash2=`dd if=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null | md5`
 
 # Change current key (0) for attached provider.
-geli setkey -P -K $keyfile2 md${no}
+geli setkey -P -K $keyfile2 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 1"
 else
 	echo "not ok 1"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # We cannot use keyfile1 anymore.
-geli attach -p -k $keyfile1 md${no} 2>/dev/null
+geli attach -p -k $keyfile1 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 2"
 else
@@ -48,35 +48,35 @@ else
 fi
 
 # Attach with new key.
-geli attach -p -k $keyfile2 md${no}
+geli attach -p -k $keyfile2 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 3"
 else
 	echo "not ok 3"
 fi
-hash3=`dd if=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null | md5`
+hash3=`dd if=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null | md5`
 
 # Change key 1 for attached provider.
-geli setkey -n 1 -P -K $keyfile3 md${no}
+geli setkey -n 1 -P -K $keyfile3 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 4"
 else
 	echo "not ok 4"
 fi
-geli detach md${no}
+geli detach ${md}
 
 # Attach with key 1.
-geli attach -p -k $keyfile3 md${no}
+geli attach -p -k $keyfile3 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 5"
 else
 	echo "not ok 5"
 fi
-hash4=`dd if=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null | md5`
-geli detach md${no}
+hash4=`dd if=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null | md5`
+geli detach ${md}
 
 # Change current (1) key for detached provider.
-geli setkey -p -k $keyfile3 -P -K $keyfile4 md${no}
+geli setkey -p -k $keyfile3 -P -K $keyfile4 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 6"
 else
@@ -84,7 +84,7 @@ else
 fi
 
 # We cannot use keyfile3 anymore.
-geli attach -p -k $keyfile3 md${no} 2>/dev/null
+geli attach -p -k $keyfile3 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 7"
 else
@@ -92,17 +92,17 @@ else
 fi
 
 # Attach with key 1.
-geli attach -p -k $keyfile4 md${no}
+geli attach -p -k $keyfile4 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 8"
 else
 	echo "not ok 8"
 fi
-hash5=`dd if=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null | md5`
-geli detach md${no}
+hash5=`dd if=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null | md5`
+geli detach ${md}
 
 # Change key 0 for detached provider.
-geli setkey -n 0 -p -k $keyfile4 -P -K $keyfile5 md${no}
+geli setkey -n 0 -p -k $keyfile4 -P -K $keyfile5 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 9"
 else
@@ -110,7 +110,7 @@ else
 fi
 
 # We cannot use keyfile2 anymore.
-geli attach -p -k $keyfile2 md${no} 2>/dev/null
+geli attach -p -k $keyfile2 ${md} 2>/dev/null
 if [ $? -ne 0 ]; then
 	echo "ok 10"
 else
@@ -118,14 +118,14 @@ else
 fi
 
 # Attach with key 0.
-geli attach -p -k $keyfile5 md${no}
+geli attach -p -k $keyfile5 ${md}
 if [ $? -eq 0 ]; then
 	echo "ok 11"
 else
 	echo "not ok 11"
 fi
-hash6=`dd if=/dev/md${no}.eli bs=512 count=${sectors} 2>/dev/null | md5`
-geli detach md${no}
+hash6=`dd if=/dev/${md}.eli bs=512 count=${sectors} 2>/dev/null | md5`
+geli detach ${md}
 
 if [ ${hash1} = ${hash2} ]; then
 	echo "ok 12"
diff --git a/tools/tools/sysbuild/sysbuild.sh b/tools/tools/sysbuild/sysbuild.sh
index 78c06a3ca6b..6317d1d2483 100644
--- a/tools/tools/sysbuild/sysbuild.sh
+++ b/tools/tools/sysbuild/sysbuild.sh
@@ -196,13 +196,20 @@ ports_recurse() (
 	echo "$t" >> /tmp/_.plist.tdone
 	for d
 	do
+		fl=""
 		if [ ! -d $d ] ; then
-			echo "Missing port $d ($t)" 1>&2
-			continue
+			fl=FLAVOR=`expr $d : '.*@\(.*\)'`
+			bd=`expr $d : '\(.*\)@.*'`
+			if [ ! -d $bd ] ; then
+				echo "Missing port $d ($t) (fl $fl) (bd $bd)" 1>&2
+				continue
+			fi
+			echo "Flavored port $d ($t) (fl $fl) (bd $bd)" 1>&2
+			d=$bd
 		fi
 		d=`cd /usr/ports && cd $d && /bin/pwd`
 		if [ ! -f $d/Makefile ] ; then
-			echo "Missing port $d" 1>&2
+			echo "Missing port (Makefile) $d" 1>&2
 			continue
 		fi
 		if [ "x$t" != "x." ] ; then
@@ -216,7 +223,7 @@ ports_recurse() (
 			(
 			cd $d
 			l=""
-			for a in `ports_make -V _UNIFIED_DEPENDS`
+			for a in `ports_make -V _UNIFIED_DEPENDS $fl`
 			do
 				x=`expr "$a" : '.*:\(.*\)'`
 				l="${l} ${x}"
diff --git a/usr.bin/find/Makefile b/usr.bin/find/Makefile
index cd10f123045..dfe89de331b 100644
--- a/usr.bin/find/Makefile
+++ b/usr.bin/find/Makefile
@@ -1,6 +1,8 @@
 #	@(#)Makefile	8.1 (Berkeley) 6/6/93
 # $FreeBSD$
 
+.include <src.opts.mk>
+
 PROG=	find
 SRCS=	find.c function.c ls.c main.c misc.c operator.c option.c \
 	getdate.y
@@ -8,4 +10,7 @@ YFLAGS=
 
 NO_WMISSING_VARIABLE_DECLARATIONS=
 
+HAS_TESTS=
+SUBDIR.${MK_TESTS}+= tests
+
 .include <bsd.prog.mk>
diff --git a/usr.bin/find/function.c b/usr.bin/find/function.c
index cc724ba7c77..72bc8fee275 100644
--- a/usr.bin/find/function.c
+++ b/usr.bin/find/function.c
@@ -1066,12 +1066,17 @@ c_samefile(OPTION *option, char ***argvp)
 	char *fn;
 	PLAN *new;
 	struct stat sb;
+	int error;
 
 	fn = nextarg(option, argvp);
 	ftsoptions &= ~FTS_NOSTAT;
 
 	new = palloc(option);
-	if (stat(fn, &sb))
+	if (ftsoptions & FTS_PHYSICAL)
+		error = lstat(fn, &sb);
+	else
+		error = stat(fn, &sb);
+	if (error != 0)
 		err(1, "%s", fn);
 	new->i_data = sb.st_ino;
 	return new;
@@ -1201,6 +1206,7 @@ c_newer(OPTION *option, char ***argvp)
 	char *fn_or_tspec;
 	PLAN *new;
 	struct stat sb;
+	int error;
 
 	fn_or_tspec = nextarg(option, argvp);
 	ftsoptions &= ~FTS_NOSTAT;
@@ -1214,7 +1220,11 @@ c_newer(OPTION *option, char ***argvp)
 		/* Use the seconds only in the comparison. */
 		new->t_data.tv_nsec = 999999999;
 	} else {
-		if (stat(fn_or_tspec, &sb))
+		if (ftsoptions & FTS_PHYSICAL)
+			error = lstat(fn_or_tspec, &sb);
+		else
+			error = stat(fn_or_tspec, &sb);
+		if (error != 0)
 			err(1, "%s", fn_or_tspec);
 		if (option->flags & F_TIME2_C)
 			new->t_data = sb.st_ctim;
diff --git a/usr.bin/find/tests/Makefile b/usr.bin/find/tests/Makefile
new file mode 100644
index 00000000000..e8c22a36a5f
--- /dev/null
+++ b/usr.bin/find/tests/Makefile
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+ATF_TESTS_SH=	find_test
+
+.include <bsd.test.mk>
diff --git a/usr.bin/find/tests/find_test.sh b/usr.bin/find/tests/find_test.sh
new file mode 100755
index 00000000000..0268d052da9
--- /dev/null
+++ b/usr.bin/find/tests/find_test.sh
@@ -0,0 +1,72 @@
+#
+# Copyright 2017, Conrad Meyer <cem@FreeBSD.org>.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# * Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# $FreeBSD$
+#
+
+atf_test_case find_newer_link
+find_newer_link_head()
+{
+	atf_set "descr" "Verifies that -newer correctly uses a symlink, " \
+	    "rather than its target, for comparison"
+}
+find_newer_link_body()
+{
+	atf_check -s exit:0 mkdir test
+	atf_check -s exit:0 ln -s file1 test/link
+	atf_check -s exit:0 touch -d 2017-12-31T10:00:00Z -h test/link
+	atf_check -s exit:0 touch -d 2017-12-31T11:00:00Z test/file2
+	atf_check -s exit:0 touch -d 2017-12-31T12:00:00Z test/file1
+
+	# find(1) should evaluate 'link' as a symlink rather than its target
+	# (with -P / without -L flags).  Since link was created first, the
+	# other two files should be newer.
+	echo -e "test\ntest/file1\ntest/file2" > expout
+	atf_check -s exit:0 -o save:output find test -newer test/link
+	atf_check -s exit:0 -o file:expout sort < output
+}
+
+atf_test_case find_samefile_link
+find_samefile_link_head()
+{
+	atf_set "descr" "Verifies that -samefile correctly uses a symlink, " \
+	    "rather than its target, for comparison"
+}
+find_samefile_link_body()
+{
+	atf_check -s exit:0 mkdir test
+	atf_check -s exit:0 touch test/file3
+	atf_check -s exit:0 ln -s file3 test/link2
+
+	# find(1) should evaluate 'link' as a symlink rather than its target
+	# (with -P / without -L flags).
+	atf_check -s exit:0 -o "inline:test/link2\n" find test -samefile test/link2
+}
+
+atf_init_test_cases()
+{
+	atf_add_test_case find_newer_link
+	atf_add_test_case find_samefile_link
+}
diff --git a/usr.bin/hexdump/display.c b/usr.bin/hexdump/display.c
index b2f57239722..0b2df2e0280 100644
--- a/usr.bin/hexdump/display.c
+++ b/usr.bin/hexdump/display.c
@@ -39,6 +39,8 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/capsicum.h>
+#include <sys/conf.h>
+#include <sys/ioctl.h>
 #include <sys/stat.h>
 
 #include <capsicum_helpers.h>
@@ -57,6 +59,7 @@ static off_t address;			/* address/offset in stream */
 static off_t eaddress;			/* end address */
 
 static void print(PR *, u_char *);
+static void noseek(void);
 
 void
 display(void)
@@ -386,7 +389,7 @@ next(char **argv)
 void
 doskip(const char *fname, int statok)
 {
-	int cnt;
+	int type;
 	struct stat sb;
 
 	if (statok) {
@@ -398,16 +401,37 @@ doskip(const char *fname, int statok)
 			return;
 		}
 	}
-	if (statok && S_ISREG(sb.st_mode)) {
-		if (fseeko(stdin, skip, SEEK_SET))
-			err(1, "%s", fname);
-		address += skip;
-		skip = 0;
-	} else {
-		for (cnt = 0; cnt < skip; ++cnt)
-			if (getchar() == EOF)
-				break;
-		address += cnt;
-		skip -= cnt;
+	if (!statok || S_ISFIFO(sb.st_mode) || S_ISSOCK(sb.st_mode)) {
+		noseek();
+		return;
 	}
+	if (S_ISCHR(sb.st_mode) || S_ISBLK(sb.st_mode)) {
+		if (ioctl(fileno(stdin), FIODTYPE, &type))
+			err(1, "%s", fname);
+		/*
+		 * Most tape drives don't support seeking,
+		 * yet fseek() would succeed.
+		 */
+		if (type & D_TAPE) {
+			noseek();
+			return;
+		}
+	}
+	if (fseeko(stdin, skip, SEEK_SET)) {
+		noseek();
+		return;
+	}
+	address += skip;
+	skip = 0;
+}
+
+static void
+noseek(void)
+{
+	int count;
+	for (count = 0; count < skip; ++count)
+		if (getchar() == EOF)
+			break;
+	address += count;
+	skip -= count;
 }
diff --git a/usr.bin/kdump/kdump.c b/usr.bin/kdump/kdump.c
index 7f42575753c..a2ecc67e374 100644
--- a/usr.bin/kdump/kdump.c
+++ b/usr.bin/kdump/kdump.c
@@ -175,34 +175,7 @@ static TAILQ_HEAD(trace_procs, proc_info) trace_procs;
 
 #ifdef WITH_CASPER
 static cap_channel_t *cappwd, *capgrp;
-#endif
 
-static void
-strerror_init(void)
-{
-
-	/*
-	 * Cache NLS data before entering capability mode.
-	 * XXXPJD: There should be strerror_init() and strsignal_init() in libc.
-	 */
-	(void)catopen("libc", NL_CAT_LOCALE);
-}
-
-static void
-localtime_init(void)
-{
-	time_t ltime;
-
-	/*
-	 * Allow localtime(3) to cache /etc/localtime content before entering
-	 * capability mode.
-	 * XXXPJD: There should be localtime_init() in libc.
-	 */
-	(void)time(&ltime);
-	(void)localtime(&ltime);
-}
-
-#ifdef WITH_CASPER
 static int
 cappwdgrp_setup(cap_channel_t **cappwdp, cap_channel_t **capgrpp)
 {
@@ -450,8 +423,9 @@ main(int argc, char *argv[])
 		if (!freopen(tracefile, "r", stdin))
 			err(1, "%s", tracefile);
 
-	strerror_init();
-	localtime_init();
+	caph_cache_catpages();
+	caph_cache_tzdata();
+
 #ifdef WITH_CASPER
 	if (resolv != 0) {
 		if (cappwdgrp_setup(&cappwd, &capgrp) < 0) {
diff --git a/usr.bin/man/man.1 b/usr.bin/man/man.1
index 93cbc723cfd..44f613d67d2 100644
--- a/usr.bin/man/man.1
+++ b/usr.bin/man/man.1
@@ -355,6 +355,8 @@ System configuration file.
 .It Pa /usr/local/etc/man.d/*.conf
 Local configuration files.
 .El
+.Sh EXIT STATUS
+.Ex -std
 .Sh SEE ALSO
 .Xr apropos 1 ,
 .Xr intro 1 ,
diff --git a/usr.bin/morse/morse.6 b/usr.bin/morse/morse.6
index 94645bbf5c7..bf339563589 100644
--- a/usr.bin/morse/morse.6
+++ b/usr.bin/morse/morse.6
@@ -29,7 +29,7 @@
 .\"	@(#)bcd.6	8.1 (Berkeley) 5/31/93
 .\" $FreeBSD$
 .\"
-.Dd June 7, 2005
+.Dd January 5, 2018
 .Dt MORSE 6
 .Os
 .Sh NAME
@@ -37,7 +37,7 @@
 .Nd reformat input as morse code
 .Sh SYNOPSIS
 .Nm
-.Op Fl elps
+.Op Fl elrps
 .Op Fl d Ar device
 .Op Fl w Ar speed
 .Op Fl c Ar speed
@@ -85,13 +85,18 @@ Similar to
 .Fl p ,
 but use the RTS line of
 .Ar device
-(which must by a TTY device)
+(which must be a TTY device)
 in order to emit the morse code.
 .It Fl e
 Echo each character before it is sent, used together with either
 .Fl p
 or
 .Fl d .
+.It Fl r
+Decode morse output consisting of dots and dashes (as generated by using
+the
+.Fl s
+option).
 .El
 .Pp
 The
diff --git a/usr.bin/morse/morse.c b/usr.bin/morse/morse.c
index 03a09a6cb53..7e018f3b9ae 100644
--- a/usr.bin/morse/morse.c
+++ b/usr.bin/morse/morse.c
@@ -1,4 +1,4 @@
-/*
+/*-
  * Copyright (c) 1988, 1993
  *	The Regents of the University of California.  All rights reserved.
  *
@@ -32,23 +32,21 @@
  * <lyndon@orthanc.ca>
  */
 
-#ifndef lint
 static const char copyright[] =
 "@(#) Copyright (c) 1988, 1993\n\
 	The Regents of the University of California.  All rights reserved.\n";
-#endif /* not lint */
 
-#ifndef lint
 #if 0
 static char sccsid[] = "@(#)morse.c	8.1 (Berkeley) 5/31/93";
 #endif
 static const char rcsid[] =
  "$FreeBSD$";
-#endif /* not lint */
 
 #include <sys/time.h>
+#include <sys/ioctl.h>
 
 #include <ctype.h>
+#include <err.h>
 #include <fcntl.h>
 #include <langinfo.h>
 #include <locale.h>
@@ -59,8 +57,13 @@ static const char rcsid[] =
 #include <termios.h>
 #include <unistd.h>
 
+#ifdef __FreeBSD__
 /* Always use the speaker, let the open fail if -p is selected */
 #define SPEAKER "/dev/speaker"
+#endif
+
+#define WHITESPACE " \t\n"
+#define DELIMITERS " \t"
 
 #ifdef SPEAKER
 #include <dev/speaker/speaker.h>
@@ -132,6 +135,8 @@ static const struct morsetab mtab[] = {
 	{'$', "...-..-"},
 	{'+', ".-.-."},		/* AR */
 	{'@', ".--.-."},	/* AC */
+	{'_', "..--.-"},
+	{'\'', ".----."},
 
 	/* prosigns without already assigned values */
 
@@ -156,6 +161,7 @@ static const struct morsetab iso8859_1tab[] = {
 	{'\350', "..-.."},	/* è */
 	{'\351', "..-.."},	/* é */
 	{'\352', "-..-."},	/* ê */
+	{'\361', "--.--"},	/* ñ */
 	{'\366', "---."},	/* ö */
 	{'\374', "..--"},	/* ü */
 
@@ -267,14 +273,11 @@ static const struct morsetab koi8rtab[] = {
 };
 
 static void	show(const char *), play(const char *), morse(char);
+static void	decode (char *), fdecode(FILE *);
 static void	ttyout(const char *);
 static void	sighandler(int);
 
-#define GETOPTOPTS "c:d:ef:lsw:"
-#define USAGE \
-"usage: morse [-els] [-d device] [-w speed] [-c speed] [-f frequency] [string ...]\n"
-
-static int	pflag, lflag, sflag, eflag;
+static int	pflag, lflag, rflag, sflag, eflag;
 static int	wpm = 20;	/* effective words per minute */
 static int	cpm;		/* effective words per minute between
 				 * characters */
@@ -293,17 +296,20 @@ static int	olflags;
 
 #ifdef SPEAKER
 static tone_t	sound;
-#undef GETOPTOPTS
-#define GETOPTOPTS "c:d:ef:lpsw:"
-#undef USAGE
+#define GETOPTOPTS "c:d:ef:lprsw:"
 #define USAGE \
-"usage: morse [-elps] [-d device] [-w speed] [-c speed] [-f frequency] [string ...]\n"
+"usage: morse [-elprs] [-d device] [-w speed] [-c speed] [-f frequency] [string ...]\n"
+#else
+#define GETOPTOPTS "c:d:ef:lrsw:"
+#define USAGE \
+"usage: morse [-elrs] [-d device] [-w speed] [-c speed] [-f frequency] [string ...]\n"
+
 #endif
 
 static const struct morsetab *hightab;
 
 int
-main(int argc, char **argv)
+main(int argc, char *argv[])
 {
 	int    ch, lflags;
 	char  *p, *codeset;
@@ -331,6 +337,9 @@ main(int argc, char **argv)
 			pflag = 1;
 			break;
 #endif
+		case 'r':
+			rflag = 1;
+			break;
 		case 's':
 			sflag = 1;
 			break;
@@ -339,42 +348,36 @@ main(int argc, char **argv)
 			break;
 		case '?':
 		default:
-			fputs(USAGE, stderr);
-			exit(1);
+			errx(1, USAGE);
 		}
-	if (sflag && lflag) {
-		fputs("morse: only one of -l and -s allowed\n", stderr);
-		exit(1);
+	if ((sflag && lflag) || (sflag && rflag) || (lflag && rflag)) {
+		errx(1, "morse: only one of -l, -s, and -r allowed\n");
 	}
 	if ((pflag || device) && (sflag || lflag)) {
-		fputs("morse: only one of -p, -d and -l, -s allowed\n", stderr);
-		exit(1);
+		errx(1, "morse: only one of -p, -d and -l, -s allowed\n");
 	}
-	if (cpm == 0)
+	if (cpm == 0) {
 		cpm = wpm;
-	if ((pflag || device) && ((wpm < 1) || (wpm > 60) || (cpm < 1) || (cpm > 60))) {
-		fputs("morse: insane speed\n", stderr);
-		exit(1);
 	}
-	if ((pflag || device) && (freq == 0))
+	if ((pflag || device) && ((wpm < 1) || (wpm > 60) || (cpm < 1) || (cpm > 60))) {
+		errx(1, "morse: insane speed\n");
+	}
+	if ((pflag || device) && (freq == 0)) {
 		freq = FREQUENCY;
-
+	}
 #ifdef SPEAKER
 	if (pflag) {
 		if ((spkr = open(SPEAKER, O_WRONLY, 0)) == -1) {
-			perror(SPEAKER);
-			exit(1);
+			err(1, SPEAKER);
 		}
 	} else
 #endif
 	if (device) {
 		if ((line = open(device, O_WRONLY | O_NONBLOCK)) == -1) {
-			perror("open tty line");
-			exit(1);
+			err(1, "open tty line");
 		}
 		if (tcgetattr(line, &otty) == -1) {
-			perror("tcgetattr() failed");
-			exit(1);
+			err(1, "tcgetattr() failed");
 		}
 		ntty = otty;
 		ntty.c_cflag |= CLOCAL;
@@ -419,9 +422,29 @@ main(int argc, char **argv)
 			hightab = iso8859_7tab;
 	}
 
-	if (lflag)
+	if (lflag) {
 		printf("m");
-	if (*argv) {
+	}
+	if (rflag) {
+		if (*argv) {
+			do {
+				p = strtok(*argv, DELIMITERS);
+				if (p == NULL) {
+					decode(*argv);
+				}
+				else {
+					while (p) {
+						decode(p);
+						p = strtok(NULL, DELIMITERS);
+					}
+				}
+			} while (*++argv);
+			putchar('\n');
+		} else {
+			fdecode(stdin);
+		}
+	}
+	else if (*argv) {
 		do {
 			for (p = *argv; *p; ++p) {
 				if (eflag)
@@ -518,15 +541,13 @@ play(const char *s)
 		}
 		if (sound.duration) {
 			if (ioctl(spkr, SPKRTONE, &sound) == -1) {
-				perror("ioctl play");
-				exit(1);
+				err(1, "ioctl play");
 			}
 		}
 		sound.frequency = 0;
 		sound.duration = dot_clock;
 		if (ioctl(spkr, SPKRTONE, &sound) == -1) {
-			perror("ioctl rest");
-			exit(1);
+			err(1, "ioctl rest");
 		}
 	}
 	sound.frequency = 0;
@@ -577,6 +598,68 @@ ttyout(const char *s)
 	usleep(duration);
 }
 
+void
+fdecode(FILE *stream)
+{
+	char *n, *p, *s;
+	char buf[BUFSIZ];
+
+	s = buf;
+	while (fgets(s, BUFSIZ - (s - buf), stream)) {
+		p = buf;
+
+		while (*p && isblank(*p)) {
+			p++;
+		}
+		while (*p && isspace(*p)) {
+			p++;
+			putchar (' ');
+		}
+		while (*p) {
+			n = strpbrk(p, WHITESPACE);
+			if (n == NULL) {
+				/* The token was interrupted at the end
+				 * of the buffer. Shift it to the begin
+				 * of the buffer.
+				 */
+				for (s = buf; *p; *s++ = *p++)
+					;
+			} else {
+				*n = '\0';
+				n++;
+				decode(p);
+				p = n;
+			}
+		}
+	}
+	putchar('\n');
+}
+
+void
+decode(char *p)
+{
+	char c;
+	const struct morsetab *m;
+
+	c = ' ';
+	for (m = mtab; m != NULL && m->inchar != '\0'; m++) {
+		if (strcmp(m->morse, p) == 0) {
+			c = m->inchar;
+			break;
+		}
+	}
+
+	if (c == ' ')
+		for (m = hightab; m != NULL && m->inchar != '\0'; m++) {
+			if (strcmp(m->morse, p) == 0) {
+				c = m->inchar;
+				break;
+			}
+		}
+
+	putchar(c);
+}
+
 static void
 sighandler(int signo)
 {
diff --git a/usr.bin/units/units.c b/usr.bin/units/units.c
index 8385de32fbf..8f7c7081518 100644
--- a/usr.bin/units/units.c
+++ b/usr.bin/units/units.c
@@ -763,7 +763,7 @@ main(int argc, char **argv)
 	history_file = NULL;
 	outputformat = numfmt;
 	quit = false;
-	while ((optchar = getopt_long(argc, argv, "+ehf:oqtvHUV", longopts, NULL)) != -1) {
+	while ((optchar = getopt_long(argc, argv, "+ehf:o:qtvH:UV", longopts, NULL)) != -1) {
 		switch (optchar) {
 		case 'e':
 			outputformat = "%6e";
diff --git a/usr.sbin/bsdinstall/distextract/distextract.c b/usr.sbin/bsdinstall/distextract/distextract.c
index 95287a51640..81d83f982e3 100644
--- a/usr.sbin/bsdinstall/distextract/distextract.c
+++ b/usr.sbin/bsdinstall/distextract/distextract.c
@@ -310,7 +310,15 @@ extract_files(struct dpv_file_node *file, int out __unused)
 		archive = NULL;
 		file->status = DPV_STATUS_DONE;
 		return (100);
-	} else if (retval != ARCHIVE_OK) {
+	} else if (retval != ARCHIVE_OK &&
+	    !(retval == ARCHIVE_WARN &&
+	    strcmp(archive_error_string(archive), "Can't restore time") == 0)) {
+		/*
+		 * Print any warning/error messages except inability to set
+		 * ctime/mtime, which is not fatal, or even interesting,
+		 * for our purposes. Would be nice if this were a libarchive
+		 * option.
+		 */
 		snprintf(errormsg, sizeof(errormsg),
 		    "Error while extracting %s: %s\n", file->name,
 		    archive_error_string(archive));
diff --git a/usr.sbin/bsdinstall/partedit/gpart_ops.c b/usr.sbin/bsdinstall/partedit/gpart_ops.c
index 6ceccaf1200..b2cfef597fd 100644
--- a/usr.sbin/bsdinstall/partedit/gpart_ops.c
+++ b/usr.sbin/bsdinstall/partedit/gpart_ops.c
@@ -167,7 +167,8 @@ newfs_command(const char *fstype, char *command, int use_default)
 			else if (strcmp(items[i].name, "atime") == 0)
 				strcat(command, "-O atime=off ");
 		}
-	} else if (strcmp(fstype, "fat32") == 0 || strcmp(fstype, "efi") == 0) {
+	} else if (strcmp(fstype, "fat32") == 0 || strcmp(fstype, "efi") == 0 ||
+	     strcmp(fstype, "ms-basic-data") == 0) {
 		int i;
 		DIALOG_LISTITEM items[] = {
 			{"FAT32", "FAT Type 32",
@@ -747,7 +748,8 @@ set_default_part_metadata(const char *name, const char *scheme,
 		/* Get VFS from text after freebsd-, if possible */
 		if (strncmp("freebsd-", type, 8) == 0)
 			md->fstab->fs_vfstype = strdup(&type[8]);
-		else if (strcmp("fat32", type) == 0 || strcmp("efi", type) == 0)
+		else if (strcmp("fat32", type) == 0 || strcmp("efi", type) == 0
+	     	    || strcmp("ms-basic-data", type) == 0)
 			md->fstab->fs_vfstype = strdup("msdosfs");
 		else
 			md->fstab->fs_vfstype = strdup(type); /* Guess */
diff --git a/usr.sbin/bsdinstall/partedit/partedit_powerpc.c b/usr.sbin/bsdinstall/partedit/partedit_powerpc.c
index c74c9354c19..403ef70a874 100644
--- a/usr.sbin/bsdinstall/partedit/partedit_powerpc.c
+++ b/usr.sbin/bsdinstall/partedit/partedit_powerpc.c
@@ -44,10 +44,10 @@ default_scheme(void) {
 
 	if (strcmp(platform, "powermac") == 0)
 		return ("APM");
-	if (strcmp(platform, "chrp") == 0)
+	if (strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0)
 		return ("MBR");
 
-	/* Pick GPT (bootable on PS3) as a generic default */
+	/* Pick GPT as a generic default */
 	return ("GPT");
 }
 
@@ -59,9 +59,9 @@ is_scheme_bootable(const char *part_type) {
 
 	if (strcmp(platform, "powermac") == 0 && strcmp(part_type, "APM") == 0)
 		return (1);
-	if (strcmp(platform, "ps3") == 0 && strcmp(part_type, "GPT") == 0)
+	if (strcmp(platform, "powernv") == 0 && strcmp(part_type, "GPT") == 0)
 		return (1);
-	if (strcmp(platform, "chrp") == 0 &&
+	if ((strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0) &&
 	    (strcmp(part_type, "MBR") == 0 || strcmp(part_type, "BSD") == 0 ||
 	     strcmp(part_type, "GPT") == 0))
 		return (1);
@@ -79,20 +79,26 @@ is_fs_bootable(const char *part_type, const char *fs)
 }
 
 size_t
-bootpart_size(const char *part_type) {
+bootpart_size(const char *part_type)
+{
 	size_t platlen = sizeof(platform);
 	if (strlen(platform) == 0)
 		sysctlbyname("hw.platform", platform, &platlen, NULL, -1);
 
-	if (strcmp(part_type, "APM") == 0 || strcmp(part_type, "MBR") == 0)
+	if (strcmp(part_type, "APM") == 0)
 		return (800*1024);
-	if (strcmp(platform, "chrp") == 0 && strcmp(part_type, "GPT") == 0)
+	if (strcmp(part_type, "BSD") == 0) /* Nothing for nested */
+		return (0);
+	if (strcmp(platform, "chrp") == 0)
 		return (800*1024);
+	if (strcmp(platform, "ps3") == 0 || strcmp(platform, "powernv") == 0)
+		return (512*1024*1024);
 	return (0);
 }
 
 const char *
-bootpart_type(const char *scheme, const char **mountpoint) {
+bootpart_type(const char *scheme, const char **mountpoint)
+{
 	size_t platlen = sizeof(platform);
 	if (strlen(platform) == 0)
 		sysctlbyname("hw.platform", platform, &platlen, NULL, -1);
@@ -101,6 +107,13 @@ bootpart_type(const char *scheme, const char **mountpoint) {
 		return ("prep-boot");
 	if (strcmp(platform, "powermac") == 0)
 		return ("apple-boot");
+	if (strcmp(platform, "powernv") == 0 || strcmp(platform, "ps3") == 0) {
+		*mountpoint = "/boot";
+		if (strcmp(scheme, "GPT") == 0)
+			return ("ms-basic-data");
+		else if (strcmp(scheme, "MBR") == 0)
+			return ("fat32");
+	}
 
 	return ("freebsd-boot");
 }
@@ -118,8 +131,7 @@ partcode_path(const char *part_type, const char *fs_type) {
 
 	if (strcmp(part_type, "APM") == 0)
 		return ("/boot/boot1.hfs");
-	if (strcmp(part_type, "MBR") == 0 ||
-	    (strcmp(platform, "chrp") == 0 && strcmp(part_type, "GPT") == 0))
+	if (strcmp(platform, "chrp") == 0)
 		return ("/boot/boot1.elf");
 	return (NULL);
 }
diff --git a/usr.sbin/bsdinstall/scripts/Makefile b/usr.sbin/bsdinstall/scripts/Makefile
index 163929ab574..11c4564ea90 100644
--- a/usr.sbin/bsdinstall/scripts/Makefile
+++ b/usr.sbin/bsdinstall/scripts/Makefile
@@ -1,8 +1,9 @@
 # $FreeBSD$
 
-SCRIPTS= auto adduser checksum config docsinstall entropy hardening hostname jail \
-	 keymap mirrorselect mount netconfig netconfig_ipv4 netconfig_ipv6 \
-	 rootpass script services time umount wlanconfig zfsboot
+SCRIPTS= auto adduser bootconfig checksum config docsinstall entropy hardening \
+	 hostname jail keymap mirrorselect mount netconfig netconfig_ipv4 \
+	 netconfig_ipv6 rootpass script services time umount wlanconfig \
+	 zfsboot
 BINDIR= ${LIBEXECDIR}/bsdinstall
 
 MAN=
diff --git a/usr.sbin/bsdinstall/scripts/auto b/usr.sbin/bsdinstall/scripts/auto
index 02323bbee42..41951f02f42 100755
--- a/usr.sbin/bsdinstall/scripts/auto
+++ b/usr.sbin/bsdinstall/scripts/auto
@@ -377,6 +377,10 @@ fi
 
 bsdinstall checksum || error "Distribution checksum failed"
 bsdinstall distextract || error "Distribution extract failed"
+
+# Set up boot loader
+bsdinstall bootconfig || error "Failed to configure bootloader"
+
 bsdinstall rootpass || error "Could not set root password"
 
 trap true SIGINT	# This section is optional
diff --git a/usr.sbin/bsdinstall/scripts/bootconfig b/usr.sbin/bsdinstall/scripts/bootconfig
new file mode 100755
index 00000000000..c6294852897
--- /dev/null
+++ b/usr.sbin/bsdinstall/scripts/bootconfig
@@ -0,0 +1,40 @@
+#!/bin/sh
+#-
+# Copyright (c) 2017 Nathan Whitehorn
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# $FreeBSD$
+
+if [ `uname -m` == powerpc ]; then
+	platform=`sysctl -n hw.platform`
+	if [ "$platform" == ps3 -o "$platform" == powernv ]; then
+		rootpart=$(awk '{ if($2 == "/") printf("%s:%s\n", $3, $1); }' $PATH_FSTAB)
+		mkdir -p $BSDINSTALL_CHROOT/boot/etc/
+		echo FreeBSD=\'/kernel/kernel vfs.root.mountfrom=${rootpart}\' > $BSDINSTALL_CHROOT/boot/etc/kboot.conf
+	fi
+fi
+
+# For new-style EFI booting, add code here
+# Add boot0cfg for MBR BIOS booting?
+
diff --git a/usr.sbin/bsdinstall/scripts/rootpass b/usr.sbin/bsdinstall/scripts/rootpass
index 7bfd82377e4..7764a51b62f 100755
--- a/usr.sbin/bsdinstall/scripts/rootpass
+++ b/usr.sbin/bsdinstall/scripts/rootpass
@@ -32,5 +32,6 @@ echo "========================"
 echo
 
 echo "Please select a password for the system management account (root):"
+echo "Typed characters will not be visible."
 
 chroot $BSDINSTALL_CHROOT passwd root 2>&1
diff --git a/usr.sbin/bsdinstall/scripts/script b/usr.sbin/bsdinstall/scripts/script
index bb295b4b5a5..a633554b943 100755
--- a/usr.sbin/bsdinstall/scripts/script
+++ b/usr.sbin/bsdinstall/scripts/script
@@ -116,9 +116,16 @@ fi
 bsdinstall checksum
 for set in $DISTRIBUTIONS; do
 	f_dprintf "Extracting $BSDINSTALL_DISTDIR/$set"
+	# XXX: this will fail if any mountpoints are FAT, due to inability to
+	# set ctime/mtime on the root of FAT partitions. tar has no option to
+	# ignore this. We probably need to switch back to distextract here
+	# to properly support EFI.
 	tar -xf "$BSDINSTALL_DISTDIR/$set" -C $BSDINSTALL_CHROOT
 done
 
+# Configure bootloader if needed
+bsdinstall bootconfig
+
 # Finalize install
 bsdinstall config
 
diff --git a/usr.sbin/cpucontrol/cpucontrol.8 b/usr.sbin/cpucontrol/cpucontrol.8
index 2a1a5f10990..4e54bb51baf 100644
--- a/usr.sbin/cpucontrol/cpucontrol.8
+++ b/usr.sbin/cpucontrol/cpucontrol.8
@@ -24,7 +24,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd September 30, 2017
+.Dd January 5, 2018
 .Dt CPUCONTROL 8
 .Os
 .Sh NAME
@@ -34,46 +34,51 @@
 device
 .Sh SYNOPSIS
 .Nm
+.Bk
 .Op Fl v
 .Fl m Ar msr
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl v
 .Fl m Ar msr Ns = Ns Ar value
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl v
 .Fl m Ar msr Ns &= Ns Ar mask
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl v
 .Fl m Ar msr Ns |= Ns Ar mask
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl v
 .Fl i Ar level
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl v
 .Fl i Ar level,level_type
-.Bk
 .Ar device
 .Ek
+.Bk
 .Nm
 .Op Fl vn
 .Op Fl d Ar datadir
 .Fl u
+.Ar device
+.Ek
 .Bk
+.Nm
+.Fl e
 .Ar device
 .Ek
 .Sh DESCRIPTION
@@ -136,6 +141,20 @@ The
 .Nm
 utility will walk through the configured data directories
 and apply all firmware updates available for this CPU.
+.It Fl e
+Re-evaluate the kernel flags indicating the present CPU features.
+This command is typically executed after a firmware update was applied
+which changes information reported by the
+.Dv CPUID
+instruction.
+.Pp
+.Bf -symbolic
+Only execute the
+.Fl e
+command after the microcode update was applied to all CPUs in the system.
+The kernel does not operate correctly if the features of processors are
+not identical.
+.Ef
 .It Fl v
 Increase the verbosity level.
 .It Fl h
diff --git a/usr.sbin/cpucontrol/cpucontrol.c b/usr.sbin/cpucontrol/cpucontrol.c
index f25578b49f9..b20247dfba8 100644
--- a/usr.sbin/cpucontrol/cpucontrol.c
+++ b/usr.sbin/cpucontrol/cpucontrol.c
@@ -63,6 +63,7 @@ int	verbosity_level = 0;
 #define	FLAG_M	0x02
 #define	FLAG_U	0x04
 #define	FLAG_N	0x08
+#define	FLAG_E	0x10
 
 #define	OP_INVAL	0x00
 #define	OP_READ		0x01
@@ -117,7 +118,7 @@ usage(void)
 	if (name == NULL)
 		name = "cpuctl";
 	fprintf(stderr, "Usage: %s [-vh] [-d datadir] [-m msr[=value] | "
-	    "-i level | -i level,level_type | -u] device\n", name);
+	    "-i level | -i level,level_type | -e | -u] device\n", name);
 	exit(EX_USAGE);
 }
 
@@ -340,6 +341,25 @@ do_msr(const char *cmdarg, const char *dev)
 	return (0);
 }
 
+static int
+do_eval_cpu_features(const char *dev)
+{
+	int fd, error;
+
+	assert(dev != NULL);
+
+	fd = open(dev, O_RDWR);
+	if (fd < 0) {
+		WARN(0, "error opening %s for writing", dev);
+		return (1);
+	}
+	error = ioctl(fd, CPUCTL_EVAL_CPU_FEATURES, NULL);
+	if (error < 0)
+		WARN(0, "ioctl(%s, CPUCTL_EVAL_CPU_FEATURES)", dev);
+	close(fd);
+	return (error);
+}
+
 static int
 do_update(const char *dev)
 {
@@ -430,11 +450,14 @@ main(int argc, char *argv[])
 	error = 0;
 	cmdarg = "";	/* To keep gcc3 happy. */
 
-	while ((c = getopt(argc, argv, "d:hi:m:nuv")) != -1) {
+	while ((c = getopt(argc, argv, "d:ehi:m:nuv")) != -1) {
 		switch (c) {
 		case 'd':
 			datadir_add(optarg);
 			break;
+		case 'e':
+			flags |= FLAG_E;
+			break;
 		case 'i':
 			flags |= FLAG_I;
 			cmdarg = optarg;
@@ -468,22 +491,25 @@ main(int argc, char *argv[])
 	if ((flags & FLAG_N) == 0)
 		datadir_add(DEFAULT_DATADIR);
 	dev = argv[0];
-	c = flags & (FLAG_I | FLAG_M | FLAG_U);
+	c = flags & (FLAG_E | FLAG_I | FLAG_M | FLAG_U);
 	switch (c) {
-		case FLAG_I:
-			if (strstr(cmdarg, ",") != NULL)
-				error = do_cpuid_count(cmdarg, dev);
-			else
-				error = do_cpuid(cmdarg, dev);
-			break;
-		case FLAG_M:
-			error = do_msr(cmdarg, dev);
-			break;
-		case FLAG_U:
-			error = do_update(dev);
-			break;
-		default:
-			usage();	/* Only one command can be selected. */
+	case FLAG_I:
+		if (strstr(cmdarg, ",") != NULL)
+			error = do_cpuid_count(cmdarg, dev);
+		else
+			error = do_cpuid(cmdarg, dev);
+		break;
+	case FLAG_M:
+		error = do_msr(cmdarg, dev);
+		break;
+	case FLAG_U:
+		error = do_update(dev);
+		break;
+	case FLAG_E:
+		error = do_eval_cpu_features(dev);
+		break;
+	default:
+		usage();	/* Only one command can be selected. */
 	}
 	SLIST_FREE(&datadirs, next, free);
 	return (error == 0 ? 0 : 1);
diff --git a/usr.sbin/devmatch/devmatch.8 b/usr.sbin/devmatch/devmatch.8
index 369b1c91a5b..d8242e294ef 100644
--- a/usr.sbin/devmatch/devmatch.8
+++ b/usr.sbin/devmatch/devmatch.8
@@ -29,7 +29,7 @@
 .Dt DEVMATCH 8
 .Os
 .Sh NAME
-.Nm devinfo
+.Nm devmatch
 .Nd print information about unattached devices
 .Sh SYNOPSIS
 .Nm
diff --git a/usr.sbin/diskinfo/diskinfo.c b/usr.sbin/diskinfo/diskinfo.c
index 00dd9688024..56912afa844 100644
--- a/usr.sbin/diskinfo/diskinfo.c
+++ b/usr.sbin/diskinfo/diskinfo.c
@@ -407,9 +407,14 @@ speeddisk(int fd, off_t mediasize, u_int sectorsize)
 	int bulk, i;
 	off_t b0, b1, sectorcount, step;
 
+	/*
+	 * Drives smaller than 1MB produce negative sector numbers,
+	 * as do 2048 or fewer sectors.
+	 */
 	sectorcount = mediasize / sectorsize;
-	if (sectorcount <= 0)
-		return;		/* Can't test devices with no sectors */
+	if (mediasize < 1024 * 1024 || sectorcount < 2048)
+		return;
+
 
 	step = 1ULL << (flsll(sectorcount / (4 * 200)) - 1);
 	if (step > 16384)
diff --git a/usr.sbin/dumpcis/printcis.c b/usr.sbin/dumpcis/printcis.c
index 82f894d03cf..c6ec2beb378 100644
--- a/usr.sbin/dumpcis/printcis.c
+++ b/usr.sbin/dumpcis/printcis.c
@@ -26,10 +26,8 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef lint
-static const char rcsid[] =
-  "$FreeBSD$";
-#endif /* not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
 
 /* 
  * Code cleanup, bug-fix and extension
@@ -183,8 +181,7 @@ static void
 dump_config_map(struct tuple *tp)
 {
 	u_char *p = tp->data, x;
-	int     rlen, mlen = 0;
-	int     i;
+	unsigned int rlen, mlen = 0, i;
 
 	rlen = (p[0] & 3) + 1;
 	if (tp->code == CIS_CONF_MAP)
diff --git a/usr.sbin/dumpcis/readcis.c b/usr.sbin/dumpcis/readcis.c
index 7192f677ab7..ce072d017cf 100644
--- a/usr.sbin/dumpcis/readcis.c
+++ b/usr.sbin/dumpcis/readcis.c
@@ -26,16 +26,15 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef lint
-static const char rcsid[] =
-  "$FreeBSD$";
-#endif /* not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
 
 /*
  * Code cleanup, bug-fix and extension
  * by Tatsumi Hosokawa <hosokawa@mt.cs.keio.ac.jp>
  */
 
+#include <assert.h>
 #include <err.h>
 #include <stdio.h>
 #include <stdlib.h>
@@ -52,42 +51,44 @@ static struct tuple_list *read_tuples(int);
 static struct tuple *find_tuple_in_list(struct tuple_list *, unsigned char);
 static struct tuple_info *get_tuple_info(unsigned char);
 
+#define LENGTH_ANY 255
+
 static struct tuple_info tuple_info[] = {
 	{"Null tuple", CIS_NULL, 0},
-	{"Common memory descriptor", CIS_MEM_COMMON, 255},
-	{"Long link to next chain for CardBus", CIS_LONGLINK_CB, 255},
-	{"Indirect access", CIS_INDIRECT, 255},
-	{"Configuration map for CardBus", CIS_CONF_MAP_CB, 255},
-	{"Configuration entry for CardBus", CIS_CONFIG_CB, 255},
-	{"Long link to next chain for MFC", CIS_LONGLINK_MFC, 255},
+	{"Common memory descriptor", CIS_MEM_COMMON, LENGTH_ANY},
+	{"Long link to next chain for CardBus", CIS_LONGLINK_CB, LENGTH_ANY},
+	{"Indirect access", CIS_INDIRECT, LENGTH_ANY},
+	{"Configuration map for CardBus", CIS_CONF_MAP_CB, LENGTH_ANY},
+	{"Configuration entry for CardBus", CIS_CONFIG_CB, LENGTH_ANY},
+	{"Long link to next chain for MFC", CIS_LONGLINK_MFC, LENGTH_ANY},
 	{"Base address register for CardBus", CIS_BAR, 6},
 	{"Checksum", CIS_CHECKSUM, 5},
 	{"Long link to attribute memory", CIS_LONGLINK_A, 4},
 	{"Long link to common memory", CIS_LONGLINK_C, 4},
 	{"Link target", CIS_LINKTARGET, 3},
 	{"No link", CIS_NOLINK, 0},
-	{"Version 1 info", CIS_INFO_V1, 255},
-	{"Alternate language string", CIS_ALTSTR, 255},
-	{"Attribute memory descriptor", CIS_MEM_ATTR, 255},
-	{"JEDEC descr for common memory", CIS_JEDEC_C, 255},
-	{"JEDEC descr for attribute memory", CIS_JEDEC_A, 255},
-	{"Configuration map", CIS_CONF_MAP, 255},
-	{"Configuration entry", CIS_CONFIG, 255},
-	{"Other conditions for common memory", CIS_DEVICE_OC, 255},
-	{"Other conditions for attribute memory", CIS_DEVICE_OA, 255},
-	{"Geometry info for common memory", CIS_DEVICEGEO, 255},
-	{"Geometry info for attribute memory", CIS_DEVICEGEO_A, 255},
+	{"Version 1 info", CIS_INFO_V1, LENGTH_ANY},
+	{"Alternate language string", CIS_ALTSTR, LENGTH_ANY},
+	{"Attribute memory descriptor", CIS_MEM_ATTR, LENGTH_ANY},
+	{"JEDEC descr for common memory", CIS_JEDEC_C, LENGTH_ANY},
+	{"JEDEC descr for attribute memory", CIS_JEDEC_A, LENGTH_ANY},
+	{"Configuration map", CIS_CONF_MAP, LENGTH_ANY},
+	{"Configuration entry", CIS_CONFIG, LENGTH_ANY},
+	{"Other conditions for common memory", CIS_DEVICE_OC, LENGTH_ANY},
+	{"Other conditions for attribute memory", CIS_DEVICE_OA, LENGTH_ANY},
+	{"Geometry info for common memory", CIS_DEVICEGEO, LENGTH_ANY},
+	{"Geometry info for attribute memory", CIS_DEVICEGEO_A, LENGTH_ANY},
 	{"Manufacturer ID", CIS_MANUF_ID, 4},
 	{"Functional ID", CIS_FUNC_ID, 2},
-	{"Functional EXT", CIS_FUNC_EXT, 255},
+	{"Functional EXT", CIS_FUNC_EXT, LENGTH_ANY},
 	{"Software interleave", CIS_SW_INTERLV, 2},
-	{"Version 2 Info", CIS_VERS_2, 255},
-	{"Data format", CIS_FORMAT, 255},
+	{"Version 2 Info", CIS_VERS_2, LENGTH_ANY},
+	{"Data format", CIS_FORMAT, LENGTH_ANY},
 	{"Geometry", CIS_GEOMETRY, 4},
 	{"Byte order", CIS_BYTEORDER, 2},
 	{"Card init date", CIS_DATE, 4},
 	{"Battery replacement", CIS_BATTERY, 4},
-	{"Organization", CIS_ORG, 255},
+	{"Organization", CIS_ORG, LENGTH_ANY},
 	{"Terminator", CIS_END, 0},
 	{0, 0, 0}
 };
@@ -99,10 +100,9 @@ xmalloc(int sz)
 
 	sz = (sz + 7) & ~7;
 	p = malloc(sz);
-	if (p)
-		bzero(p, sz);
-	else
+	if (p == NULL)
 		errx(1, "malloc");
+	bzero(p, sz);
 	return (p);
 }
 
@@ -205,39 +205,40 @@ read_tuples(int fd)
 	do {
 		flag = MDF_ATTR;
 		tp = find_tuple_in_list(last_tl, CIS_LONGLINK_A);
-		if (tp == 0) {
+		if (tp == NULL) {
 			flag = 0;
 			tp = find_tuple_in_list(last_tl, CIS_LONGLINK_C);
 		}
-		if (tp && tp->length == 4) {
-			offs = tpl32(tp->data);
+
+		if (tp == NULL || tp->length != 4)
+			break;
+
+		offs = (uint32_t)tpl32(tp->data);
 #ifdef	DEBUG
-			printf("Checking long link at %zd (%s memory)\n",
-			    offs, flag ? "Attribute" : "Common");
+		printf("Checking long link at %zd (%s memory)\n",
+		    offs, flag ? "Attribute" : "Common");
 #endif
-			/* If a link was found, read the tuple list from it. */
-			if (ck_linktarget(fd, offs, flag)) {
-				tl = read_one_tuplelist(fd, flag, offs);
-				last_tl->next = tl;
-				last_tl = tl;
-			}
-		} else
-			tl = 0;
+		/*
+		 * If a link was found, it looks sane read the tuple list from it.
+		 */
+		if (offs > 0 && offs < 32 * 1024 && ck_linktarget(fd, offs, flag)) {
+			tl = read_one_tuplelist(fd, flag, offs);
+			last_tl->next = tl;
+			last_tl = tl;
+		}
 	} while (tl);
 
 	/*
-	 * If the primary list had no NOLINK tuple, and no LINKTARGET,
-	 * then try to read a tuple list at common memory (offset 0).
+	 * If the primary list had no NOLINK tuple, and no LINKTARGET, then try
+	 * to read a tuple list at common memory (offset 0).
 	 */
 	if (find_tuple_in_list(tlist, CIS_NOLINK) == 0 &&
 	    find_tuple_in_list(tlist, CIS_LINKTARGET) == 0 &&
 	    ck_linktarget(fd, (off_t) 0, 0)) {
-		offs = 0;
 #ifdef	DEBUG
-		printf("Reading long link at %zd (%s memory)\n",
-		    offs, flag ? "Attribute" : "Common");
+		printf("Reading long link at 0 (Common memory)\n");
 #endif
-		tlist->next = read_one_tuplelist(fd, 0, offs);
+		tlist->next = read_one_tuplelist(fd, 0, 0);
 	}
 	return (tlist);
 }
@@ -261,13 +262,15 @@ read_one_tuplelist(int fd, int flags, off_t offs)
 	tl = xmalloc(sizeof(*tl));
 	tl->offs = offs;
 	tl->flags = flags & MDF_ATTR;
-	ioctl(fd, PIOCRWFLAG, &flags);
-	lseek(fd, offs, SEEK_SET);
+	if (ioctl(fd, PIOCRWFLAG, &flags) < 0)
+		err(1, "Setting flag to rad %s memory failed",
+		    flags ? "attribute" : "common");
+	if (lseek(fd, offs, SEEK_SET) < 0)
+		err(1, "Unable to seek to memory offset %ju",
+		    (uintmax_t)offs);
 	do {
-		if (read(fd, &code, 1) != 1) {
-			warn("CIS code read");
-			break;
-		}
+		if (read(fd, &code, 1) != 1)
+			errx(1, "CIS code read");
 		total++;
 		if (code == CIS_NULL)
 			continue;
@@ -276,42 +279,50 @@ read_one_tuplelist(int fd, int flags, off_t offs)
 		if (code == CIS_END)
 			length = 0;
 		else {
-			if (read(fd, &length, 1) != 1) {
-				warn("CIS len read");
-				break;
-			}
+			if (read(fd, &length, 1) != 1)
+				errx(1, "CIS len read");
 			total++;
 		}
-		tp->length = length;
 #ifdef	DEBUG
 		printf("Tuple code = 0x%x, len = %d\n", code, length);
 #endif
+
+		/*
+		 * A length of 255 is invalid, all others are valid. Treat a
+		 * length of 255 as the end of the list. Some cards don't have a
+		 * CIS_END at the end. These work on other systems because the
+		 * end of the CIS eventually sees an area that's not decoded and
+		 * read back as 0xff.
+		 */
 		if (length == 0xFF) {
-			length = tp->length = 0;
+			length = 0;
 			code = CIS_END;
 		}
-		if (length != 0) {
-			total += length;
-			tp->data = xmalloc(length);
-			if (read(fd, tp->data, length) != length) {
-				warn("CIS read");
-				break;
-			}
-		}
+		assert(length < 0xff);
 
 		/*
 		 * Check the tuple, and ignore it if it isn't in the table
 		 * or the length is illegal.
 		 */
 		tinfo = get_tuple_info(code);
-		if (tinfo != NULL && (tinfo->length != 255 && tinfo->length > length)) {
+		if (tinfo == NULL || (tinfo->length != LENGTH_ANY && tinfo->length > length)) {
 			printf("code %s (%d) ignored\n", tuple_name(code), code);
-			tp->code = CIS_NULL;
+			continue;
 		}
-		if (tl->tuples == NULL)
-			tl->tuples = tp;
-		else
+		tp->length = length;
+		if (length != 0) {
+			total += length;
+			tp->data = xmalloc(length);
+			if (read(fd, tp->data, length) != length)
+				errx(1, "Can't read CIS data");
+		}
+
+		if (last_tp != NULL)
 			last_tp->next = tp;
+		if (tl->tuples == NULL) {
+			tl->tuples = tp;
+			tp->next = NULL;
+		}
 		last_tp = tp;
 	} while (code != CIS_END && total < 1024);
 	return (tl);
@@ -325,8 +336,12 @@ ck_linktarget(int fd, off_t offs, int flag)
 {
 	char    blk[5];
 
-	ioctl(fd, PIOCRWFLAG, &flag);
-	lseek(fd, offs, SEEK_SET);
+	if (ioctl(fd, PIOCRWFLAG, &flag) < 0)
+		err(1, "Setting flag to rad %s memory failed",
+		    flag ? "attribute" : "common");
+	if (lseek(fd, offs, SEEK_SET) < 0)
+		err(1, "Unable to seek to memory offset %ju",
+		    (uintmax_t)offs);
 	if (read(fd, blk, 5) != 5)
 		return (0);
 	if (blk[0] == CIS_LINKTARGET &&
diff --git a/usr.sbin/dumpcis/readcis.h b/usr.sbin/dumpcis/readcis.h
index 397587d8005..14d9803eebc 100644
--- a/usr.sbin/dumpcis/readcis.h
+++ b/usr.sbin/dumpcis/readcis.h
@@ -31,7 +31,7 @@
 struct tuple {
 	struct tuple *next;
 	unsigned char code;
-	int     length;
+	unsigned char length;
 	unsigned char *data;
 };
 
diff --git a/usr.sbin/efibootmgr/efibootmgr.c b/usr.sbin/efibootmgr/efibootmgr.c
index 20f9e1dbc5a..9d02e642d7b 100644
--- a/usr.sbin/efibootmgr/efibootmgr.c
+++ b/usr.sbin/efibootmgr/efibootmgr.c
@@ -164,18 +164,17 @@ static int
 set_bootvar(const char *name, uint8_t *data, size_t size)
 {
 
-	efi_del_variable(EFI_GLOBAL_GUID, name);
 	return efi_set_variable(EFI_GLOBAL_GUID, name, data, size,
 	    COMMON_ATTRS);
 }
 
 
 #define USAGE \
-	"   [-aAnNB Bootvar] [-t timeout] [-T] [-o bootorder] [-O] [--verbose] [--help] \n \
-  [-c -d device -p partition -l loader [-L label] [--dry-run]]"
+	"   [-aAnNB Bootvar] [-t timeout] [-T] [-o bootorder] [-O] [--verbose] [--help] \n\
+  [-c -l loader [-k kernel ] [-L label] [--dry-run]]"
 
 #define CREATE_USAGE \
-	"       efibootmgr -c -d device -p partition -loader loader [-L label ] [--dry-run]"
+	"       efibootmgr -c -l loader [-k kernel] [-L label] [--dry-run]"
 #define ORDER_USAGE \
 	"       efibootmgr -o bootvarnum1,bootvarnum2,..."
 #define TIMEOUT_USAGE \
@@ -217,6 +216,7 @@ parse_args(int argc, char *argv[])
 			opts.dry_run = true;
 			break;
 		case 'e':
+			free(opts.env);
 			opts.env = strdup(optarg);
 			break;
 		case 'h':
@@ -224,12 +224,15 @@ parse_args(int argc, char *argv[])
 			errx(1, "%s", USAGE);
 			break;
 		case 'k':
+			free(opts.kernel);
 			opts.kernel = strdup(optarg);
 			break;
 		case 'L':
+			free(opts.label);
 			opts.label = strdup(optarg);
 			break;
 		case 'l':
+			free(opts.loader);
 			opts.loader = strdup(optarg);
 			opts.loader = mangle_loader(opts.loader);
 			break;
@@ -244,6 +247,7 @@ parse_args(int argc, char *argv[])
 			opts.once = true;
 			break;
 		case 'o':
+			free(opts.order);
 			opts.order = strdup(optarg);
 			break;
 		case 'T':
@@ -591,12 +595,7 @@ create_loadopt(uint8_t *buf, size_t bufmax, uint32_t attributes, efidp dp, size_
 	/*
 	 * Compute the length to make sure the passed in buffer is long enough.
 	 */
-	if (description)
-		utf8_to_ucs2(description, &bbuf, &desc_len);
-	else {
-		desc_len = 0;
-		bbuf = NULL;
-	}
+	utf8_to_ucs2(description, &bbuf, &desc_len);
 	len = sizeof(uint32_t) + sizeof(uint16_t) + desc_len + dp_size + optional_data_size;
 	if (len > bufmax) {
 		free(bbuf);
@@ -636,6 +635,8 @@ make_boot_var(const char *label, const char *loader, const char *kernel, const c
 	char *bootvar = NULL;
 	int ret;
 
+	assert(label != NULL);
+
 	bootvar = make_next_boot_var_name();
 	if (bootvar == NULL)
 		err(1, "bootvar creation");
@@ -755,7 +756,7 @@ print_loadopt_str(uint8_t *data, size_t datalen)
 }
 
 static char *
-get_descr(uint8_t* data)
+get_descr(uint8_t *data)
 {
 	uint8_t *pos = data;
 	efi_char *desc;
@@ -861,8 +862,8 @@ main(int argc, char *argv[])
 		/*
 		 * side effect, adds to boot order, but not yet active.
 		 */
-		make_boot_var(opts.label, opts.loader, opts.kernel, opts.env,
-		    opts.dry_run);
+		make_boot_var(opts.label ? opts.label : "",
+		    opts.loader, opts.kernel, opts.env, opts.dry_run);
 	else if (opts.set_active || opts.set_inactive )
 		handle_activity(opts.bootnum, opts.set_active);
 	else if (opts.order != NULL)
diff --git a/usr.sbin/efidp/efidp.c b/usr.sbin/efidp/efidp.c
index a4db95abeea..e12491ecabf 100644
--- a/usr.sbin/efidp/efidp.c
+++ b/usr.sbin/efidp/efidp.c
@@ -143,10 +143,13 @@ unix_to_efi(void)
 	char *walker;
 	int rv;
 
+	dp = NULL;
 	while (fgets(buffer, sizeof(buffer), stdin)) {
 		walker= trim(buffer);
+		free(dp);
+		dp = NULL;
 		rv = efivar_unix_path_to_device_path(walker, &dp);
-		if (rv != 0) {
+		if (rv != 0 || dp == NULL) {
 			errno = rv;
 			warn("Can't convert '%s' to efi", walker);
 			continue;
@@ -158,6 +161,7 @@ unix_to_efi(void)
 		}
 		printf("%s\n", efi);
 	}
+	free(dp);
 }
 
 static void
diff --git a/usr.sbin/fdcontrol/fdcontrol.c b/usr.sbin/fdcontrol/fdcontrol.c
index e6e4fa5d48c..fc975eb87b3 100644
--- a/usr.sbin/fdcontrol/fdcontrol.c
+++ b/usr.sbin/fdcontrol/fdcontrol.c
@@ -82,6 +82,7 @@ main(int argc, char **argv)
 
 		case 'a':
 			autofmt = 1;
+			/*FALLTHROUGH*/
 		case 'F':
 			showfmt = 1;
 			show = 0;
diff --git a/usr.sbin/fwcontrol/fwdv.c b/usr.sbin/fwcontrol/fwdv.c
index 0dbf17d04a4..2baf1c43c80 100644
--- a/usr.sbin/fwcontrol/fwdv.c
+++ b/usr.sbin/fwcontrol/fwdv.c
@@ -409,7 +409,6 @@ dvsend(int d, const char *filename, char ich, int count)
 			err(1, "write failed");
 		}
 	}
-	close(fd);
 	fprintf(stderr, "\n");
 send_end:
 	gettimeofday(&end, NULL);
diff --git a/usr.sbin/ifmcstat/printb.c b/usr.sbin/ifmcstat/printb.c
index 76b063fcb9e..9481a0dc1bf 100644
--- a/usr.sbin/ifmcstat/printb.c
+++ b/usr.sbin/ifmcstat/printb.c
@@ -32,6 +32,7 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+#include <assert.h>
 #include <stdio.h>
 
 /*
@@ -43,7 +44,8 @@ printb(const char *s, unsigned int v, const char *bits)
 	int i, any = 0;
 	char c;
 
-	if (bits && *bits == 8)
+	assert(bits != NULL);
+	if (*bits == 8)
 		printf("%s=%o", s, v);
 	else
 		printf("%s=%x", s, v);
diff --git a/usr.sbin/kldxref/ef.c b/usr.sbin/kldxref/ef.c
index 6ac69401563..236164d6cbf 100644
--- a/usr.sbin/kldxref/ef.c
+++ b/usr.sbin/kldxref/ef.c
@@ -475,7 +475,7 @@ ef_seg_read_rel(elf_file_t ef, Elf_Off offset, size_t len, void*dest)
 
 	if (ofs == 0) {
 		if (ef->ef_verbose)
-			warnx("ef_seg_read(%s): zero offset (%lx:%ld)",
+			warnx("ef_seg_read_rel(%s): zero offset (%lx:%ld)",
 			    ef->ef_name, (long)offset, ofs);
 		return EFAULT;
 	}
diff --git a/usr.sbin/kldxref/ef_obj.c b/usr.sbin/kldxref/ef_obj.c
index d35aa76e721..536806248e0 100644
--- a/usr.sbin/kldxref/ef_obj.c
+++ b/usr.sbin/kldxref/ef_obj.c
@@ -227,7 +227,7 @@ ef_obj_seg_read(elf_file_t ef, Elf_Off offset, size_t len, void *dest)
 
 	if (offset + len > ef->size) {
 		if (ef->ef_verbose)
-			warnx("ef_seg_read_rel(%s): bad offset/len (%lx:%ld)",
+			warnx("ef_obj_seg_read(%s): bad offset/len (%lx:%ld)",
 			    ef->ef_name, (long)offset, (long)len);
 		return (EFAULT);
 	}
@@ -246,7 +246,7 @@ ef_obj_seg_read_rel(elf_file_t ef, Elf_Off offset, size_t len, void *dest)
 
 	if (offset + len > ef->size) {
 		if (ef->ef_verbose)
-			warnx("ef_seg_read_rel(%s): bad offset/len (%lx:%ld)",
+			warnx("ef_obj_seg_read_rel(%s): bad offset/len (%lx:%ld)",
 			    ef->ef_name, (long)offset, (long)len);
 		return (EFAULT);
 	}
diff --git a/usr.sbin/mailwrapper/Makefile b/usr.sbin/mailwrapper/Makefile
index 98222ae22cf..799d7e43fb7 100644
--- a/usr.sbin/mailwrapper/Makefile
+++ b/usr.sbin/mailwrapper/Makefile
@@ -5,6 +5,8 @@
 .if ${MK_MAILWRAPPER} != "no"
 PROG=	mailwrapper
 MAN=	mailwrapper.8
+
+LIBADD=	util
 .endif
 
 .if ${MK_MAILWRAPPER} != "no" || ${MK_SENDMAIL} != "no"
diff --git a/usr.sbin/mailwrapper/Makefile.depend b/usr.sbin/mailwrapper/Makefile.depend
index 5c0ddbe76ee..991757ecadc 100644
--- a/usr.sbin/mailwrapper/Makefile.depend
+++ b/usr.sbin/mailwrapper/Makefile.depend
@@ -7,7 +7,8 @@ DIRDEPS = \
 	include/xlocale \
 	lib/${CSU_DIR} \
 	lib/libc \
-	lib/libcompiler_rt
+	lib/libcompiler_rt \
+	lib/libutil \
 
 
 .include <dirdeps.mk>
diff --git a/usr.sbin/mailwrapper/mailwrapper.c b/usr.sbin/mailwrapper/mailwrapper.c
index 9b57c458b16..1ad4053a843 100644
--- a/usr.sbin/mailwrapper/mailwrapper.c
+++ b/usr.sbin/mailwrapper/mailwrapper.c
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 #include <string.h>
 #include <unistd.h>
 #include <stdlib.h>
+#include <libutil.h>
 #include <sysexits.h>
 #include <syslog.h>
 
@@ -88,17 +89,14 @@ int
 main(int argc, char *argv[], char *envp[])
 {
 	FILE *config;
-	char *line, *cp, *from, *to, *ap, *walk;
+	char *line, *cp, *from, *to, *ap;
 	const char *progname;
 	char localmailerconf[MAXPATHLEN];
 	const char *mailerconf;
-	size_t linecap = 0, lineno = 0;
-	ssize_t linelen;
+	size_t len, lineno = 0;
 	int i;
 	struct arglist al;
 
-	line = NULL;
-
 	/* change __progname to mailwrapper so we get sensible error messages */
 	progname = getprogname();
 	setprogname("mailwrapper");
@@ -125,16 +123,12 @@ main(int argc, char *argv[], char *envp[])
 	}
 
 	for (;;) {
-		if ((linelen = getline(&line, &linecap, config)) <= 0) {
-			if (feof(config)) {
+		if ((line = fparseln(config, &len, &lineno, NULL, 0)) == NULL) {
+			if (feof(config))
 				errx(EX_CONFIG, "no mapping in %s", mailerconf);
-			}
 			err(EX_CONFIG, "cannot parse line %lu", (u_long)lineno);
 		}
-		lineno++;
-		walk = line;
-		/* strip comments */
-		strsep(&walk, "#");
+
 #define	WS	" \t\n"
 		cp = line;
 
diff --git a/usr.sbin/newsyslog/newsyslog.c b/usr.sbin/newsyslog/newsyslog.c
index c724cfc637d..ede2a73e202 100644
--- a/usr.sbin/newsyslog/newsyslog.c
+++ b/usr.sbin/newsyslog/newsyslog.c
@@ -132,6 +132,7 @@ __FBSDID("$FreeBSD$");
 #define	CE_CREATE	0x0100	/* Create the log file if it does not exist. */
 #define	CE_NODUMP	0x0200	/* Set 'nodump' on newly created log file. */
 #define	CE_PID2CMD	0x0400	/* Replace PID file with a shell command.*/
+#define	CE_PLAIN0	0x0800	/* Do not compress zero'th history file */
 
 #define	CE_RFC5424	0x0800	/* Use RFC5424 format rotation message */
 
@@ -1316,6 +1317,9 @@ parse_file(FILE *cf, struct cflist *work_p, struct cflist *glob_p,
 			case 'n':
 				working->flags |= CE_NOSIGNAL;
 				break;
+			case 'p':
+				working->flags |= CE_PLAIN0;
+				break;
 			case 'r':
 				working->flags |= CE_PID2CMD;
 				break;
@@ -1341,7 +1345,6 @@ parse_file(FILE *cf, struct cflist *work_p, struct cflist *glob_p,
 				break;
 			case 'f':	/* Used by OpenBSD for "CE_FOLLOW" */
 			case 'm':	/* Used by OpenBSD for "CE_MONITOR" */
-			case 'p':	/* Used by NetBSD  for "CE_PLAIN0" */
 			default:
 				errx(1, "illegal flag in config file -- %c",
 				    *q);
@@ -1846,8 +1849,18 @@ do_rotate(const struct conf_entry *ent)
 		else {
 			/* XXX - Ought to be checking for failure! */
 			(void)rename(zfile1, zfile2);
+			change_attrs(zfile2, ent);
+			if (ent->compress && !strlen(logfile_suffix)) {
+				/* compress old rotation */
+				struct zipwork_entry zwork;
+
+				memset(&zwork, 0, sizeof(zwork));
+				zwork.zw_conf = ent;
+				zwork.zw_fsize = sizefile(zfile2);
+				strcpy(zwork.zw_fname, zfile2);
+				do_zipwork(&zwork);
+			}
 		}
-		change_attrs(zfile2, ent);
 	}
 
 	if (ent->numlogs > 0) {
@@ -1896,12 +1909,15 @@ do_rotate(const struct conf_entry *ent)
 	if (ent->pid_cmd_file != NULL)
 		swork = save_sigwork(ent);
 	if (ent->numlogs > 0 && ent->compress > COMPRESS_NONE) {
-		/*
-		 * The zipwork_entry will include a pointer to this
-		 * conf_entry, so the conf_entry should not be freed.
-		 */
-		free_or_keep = KEEP_ENT;
-		save_zipwork(ent, swork, ent->fsize, file1);
+		if (!(ent->flags & CE_PLAIN0) ||
+		    strcmp(&file1[strlen(file1) - 2], ".0") != 0) {
+			/*
+			 * The zipwork_entry will include a pointer to this
+			 * conf_entry, so the conf_entry should not be freed.
+			 */
+			free_or_keep = KEEP_ENT;
+			save_zipwork(ent, swork, ent->fsize, file1);
+		}
 	}
 
 	return (free_or_keep);
diff --git a/usr.sbin/newsyslog/newsyslog.conf.5 b/usr.sbin/newsyslog/newsyslog.conf.5
index baed72a6cdc..daae2f23817 100644
--- a/usr.sbin/newsyslog/newsyslog.conf.5
+++ b/usr.sbin/newsyslog/newsyslog.conf.5
@@ -21,7 +21,7 @@
 .\" the suitability of this software for any purpose.  It is
 .\" provided "as is" without express or implied warranty.
 .\"
-.Dd May 19, 2017
+.Dd Dec 31, 2017
 .Dt NEWSYSLOG.CONF 5
 .Os
 .Sh NAME
@@ -312,6 +312,8 @@ log file using
 .It Cm N
 indicates that there is no process which needs to be signaled
 when this log file is rotated.
+.It Cm p
+indicates that the zero-th rotated file should not be compressed.
 .It Cm R
 if this flag is set the
 .Xr newsyslog 8
diff --git a/usr.sbin/pciconf/cap.c b/usr.sbin/pciconf/cap.c
index d8c518526f6..03490e42324 100644
--- a/usr.sbin/pciconf/cap.c
+++ b/usr.sbin/pciconf/cap.c
@@ -161,7 +161,7 @@ cap_pcix(int fd, struct pci_conf *p, uint8_t ptr)
 		printf("supports");
 	comma = 0;
 	if (status & PCIXM_STATUS_133CAP) {
-		printf("%s 133MHz", comma ? "," : "");
+		printf(" 133MHz");
 		comma = 1;
 	}
 	if (status & PCIXM_STATUS_266CAP) {
@@ -351,10 +351,8 @@ cap_vendor(int fd, struct pci_conf *p, uint8_t ptr)
 				printf("%s SATA RAID-0/1/10", comma ? "," : "");
 				comma = 1;
 			}
-			if (fvec & (1 << 3)) {
-				printf("%s SATA AHCI", comma ? "," : "");
-				comma = 1;
-			}
+			if (fvec & (1 << 3))
+				printf(", SATA AHCI");
 		}
 	}
 }
diff --git a/usr.sbin/pciconf/pciconf.c b/usr.sbin/pciconf/pciconf.c
index 914a1c93180..692eae39560 100644
--- a/usr.sbin/pciconf/pciconf.c
+++ b/usr.sbin/pciconf/pciconf.c
@@ -1005,6 +1005,7 @@ writeit(const char *name, const char *reg, const char *data, int width)
 
 	if (ioctl(fd, PCIOCWRITE, &pi) < 0)
 		err(1, "ioctl(PCIOCWRITE)");
+	close(fd);
 }
 
 static void
@@ -1024,4 +1025,5 @@ chkattached(const char *name)
 
 	exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */
 	printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached");
+	close(fd);
 }
diff --git a/usr.sbin/rpcbind/check_bound.c b/usr.sbin/rpcbind/check_bound.c
index becd2012244..cf0a029dad7 100644
--- a/usr.sbin/rpcbind/check_bound.c
+++ b/usr.sbin/rpcbind/check_bound.c
@@ -53,7 +53,6 @@ static	char sccsid[] = "@(#)check_bound.c 1.11 89/04/21 Copyr 1989 Sun Micro";
 #include <sys/socket.h>
 #include <rpc/rpc.h>
 #include <rpc/svc_dg.h>
-#include <stdio.h>
 #include <netconfig.h>
 #include <syslog.h>
 #include <string.h>
diff --git a/usr.sbin/rpcbind/rpcb_stat.c b/usr.sbin/rpcbind/rpcb_stat.c
index 65bd1645c5f..361ae4c7f2b 100644
--- a/usr.sbin/rpcbind/rpcb_stat.c
+++ b/usr.sbin/rpcbind/rpcb_stat.c
@@ -40,7 +40,6 @@
  * Copyright (c) 1990 by Sun Microsystems, Inc.
  */
 
-#include <stdio.h>
 #include <netconfig.h>
 #include <rpc/rpc.h>
 #include <rpc/rpcb_prot.h>
diff --git a/usr.sbin/rpcbind/rpcb_svc.c b/usr.sbin/rpcbind/rpcb_svc.c
index 9ae41965b97..39114dd59ca 100644
--- a/usr.sbin/rpcbind/rpcb_svc.c
+++ b/usr.sbin/rpcbind/rpcb_svc.c
@@ -47,8 +47,6 @@
 #include <rpc/rpc.h>
 #include <rpc/rpcb_prot.h>
 #include <netconfig.h>
-#include <syslog.h>
-#include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
 
diff --git a/usr.sbin/rpcbind/rpcb_svc_4.c b/usr.sbin/rpcbind/rpcb_svc_4.c
index 9bb48beed3e..b6ee61771ed 100644
--- a/usr.sbin/rpcbind/rpcb_svc_4.c
+++ b/usr.sbin/rpcbind/rpcb_svc_4.c
@@ -48,9 +48,7 @@
 #include <sys/stat.h>
 #include <rpc/rpc.h>
 #include <stdio.h>
-#include <unistd.h>
 #include <netconfig.h>
-#include <syslog.h>
 #include <string.h>
 #include <stdlib.h>
 #include "rpcbind.h"
diff --git a/usr.sbin/rpcbind/rpcb_svc_com.c b/usr.sbin/rpcbind/rpcb_svc_com.c
index 7c72041b4a6..8dc68ee3f7e 100644
--- a/usr.sbin/rpcbind/rpcb_svc_com.c
+++ b/usr.sbin/rpcbind/rpcb_svc_com.c
@@ -53,15 +53,15 @@
 #include <netconfig.h>
 #include <errno.h>
 #include <syslog.h>
-#include <unistd.h>
 #include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
 #ifdef PORTMAP
 #include <netinet/in.h>
 #include <rpc/rpc_com.h>
 #include <rpc/pmap_prot.h>
 #endif /* PORTMAP */
-#include <string.h>
-#include <stdlib.h>
 
 #include "rpcbind.h"
 
@@ -1101,7 +1101,7 @@ void
 my_svc_run(void)
 {
 	size_t nfds;
-	struct pollfd pollfds[FD_SETSIZE];
+	struct pollfd pollfds[FD_SETSIZE + 1];
 	int poll_ret, check_ret;
 	int n;
 #ifdef SVC_RUN_DEBUG
@@ -1112,6 +1112,9 @@ my_svc_run(void)
 
 	for (;;) {
 		p = pollfds;
+		p->fd = terminate_rfd;
+		p->events = MASKVAL;
+		p++;
 		for (n = 0; n <= svc_maxfd; n++) {
 			if (FD_ISSET(n, &svc_fdset)) {
 				p->fd = n;
@@ -1130,7 +1133,20 @@ my_svc_run(void)
 			fprintf(stderr, ">\n");
 		}
 #endif
-		switch (poll_ret = poll(pollfds, nfds, 30 * 1000)) {
+		poll_ret = poll(pollfds, nfds, 30 * 1000);
+
+		if (doterminate != 0) {
+			close(rpcbindlockfd);
+#ifdef WARMSTART
+			syslog(LOG_ERR,
+			    "rpcbind terminating on signal %d. Restart with \"rpcbind -w\"",
+			    (int)doterminate);
+			write_warmstart();	/* Dump yourself */
+#endif
+			exit(2);
+		}
+
+		switch (poll_ret) {
 		case -1:
 			/*
 			 * We ignore all errors, continuing with the assumption
diff --git a/usr.sbin/rpcbind/rpcbind.c b/usr.sbin/rpcbind/rpcbind.c
index bac11a9b205..c9779fa9f34 100644
--- a/usr.sbin/rpcbind/rpcbind.c
+++ b/usr.sbin/rpcbind/rpcbind.c
@@ -71,7 +71,6 @@ static	char sccsid[] = "@(#)rpcbind.c 1.35 89/04/21 Copyr 1984 Sun Micro";
 #include <unistd.h>
 #include <syslog.h>
 #include <err.h>
-#include <libutil.h>
 #include <pwd.h>
 #include <string.h>
 #include <errno.h>
@@ -80,7 +79,10 @@ static	char sccsid[] = "@(#)rpcbind.c 1.35 89/04/21 Copyr 1984 Sun Micro";
 /* Global variables */
 int debugging = 0;	/* Tell me what's going on */
 int doabort = 0;	/* When debugging, do an abort on errors */
+int terminate_rfd;	/* Pipefd to wake on signal */
+volatile sig_atomic_t doterminate = 0;	/* Terminal signal received */
 rpcblist_ptr list_rbl;	/* A list of version 3/4 rpcbind services */
+int rpcbindlockfd;
 
 /* who to suid to if -s is given */
 #define RUN_AS  "daemon"
@@ -100,7 +102,7 @@ static struct sockaddr **bound_sa;
 static int ipv6_only = 0;
 static int nhosts = 0;
 static int on = 1;
-static int rpcbindlockfd;
+static int terminate_wfd;
 
 #ifdef WARMSTART
 /* Local Variable */
@@ -133,6 +135,7 @@ main(int argc, char *argv[])
 	void *nc_handle;	/* Net config handle */
 	struct rlimit rl;
 	int maxrec = RPC_MAXDATASIZE;
+	int error, fds[2];
 
 	parseargs(argc, argv);
 
@@ -192,6 +195,16 @@ main(int argc, char *argv[])
 	}
 	endnetconfig(nc_handle);
 
+	/*
+	 * Allocate pipe fd to wake main thread from signal handler in non-racy
+	 * way.
+	 */
+	error = pipe(fds);
+	if (error != 0)
+		err(1, "pipe failed");
+	terminate_rfd = fds[0];
+	terminate_wfd = fds[1];
+
 	/* catch the usual termination signals for graceful exit */
 	(void) signal(SIGCHLD, reap);
 	(void) signal(SIGINT, terminate);
@@ -759,16 +772,15 @@ rbllist_add(rpcprog_t prog, rpcvers_t vers, struct netconfig *nconf,
  * Catch the signal and die
  */
 static void
-terminate(int signum __unused)
+terminate(int signum)
 {
-	close(rpcbindlockfd);
-#ifdef WARMSTART
-	syslog(LOG_ERR,
-	    "rpcbind terminating on signal %d. Restart with \"rpcbind -w\"",
-	    signum);
-	write_warmstart();	/* Dump yourself */
-#endif
-	exit(2);
+	char c = '\0';
+	ssize_t wr;
+
+	doterminate = signum;
+	wr = write(terminate_wfd, &c, 1);
+	if (wr < 1)
+		_exit(2);
 }
 
 void
diff --git a/usr.sbin/rpcbind/rpcbind.h b/usr.sbin/rpcbind/rpcbind.h
index f78b2eecc34..a4bb3d27406 100644
--- a/usr.sbin/rpcbind/rpcbind.h
+++ b/usr.sbin/rpcbind/rpcbind.h
@@ -44,6 +44,8 @@
 #ifndef rpcbind_h
 #define	rpcbind_h
 
+#include <signal.h>
+
 #ifdef PORTMAP
 #include <rpc/pmap_prot.h>
 #endif
@@ -68,6 +70,8 @@ struct r_rmtcall_args {
 
 extern int debugging;
 extern int doabort;
+extern int terminate_rfd;
+extern volatile sig_atomic_t doterminate;
 #ifdef LIBWRAP
 extern int libwrap;
 #endif
@@ -75,6 +79,7 @@ extern int verboselog;
 extern int insecure;
 extern int oldstyle_local;
 extern rpcblist_ptr list_rbl;	/* A list of version 3 & 4 rpcbind services */
+extern int rpcbindlockfd;
 
 #ifdef PORTMAP
 extern struct pmaplist *list_pml; /* A list of version 2 rpcbind services */
diff --git a/usr.sbin/rpcbind/security.c b/usr.sbin/rpcbind/security.c
index 2cff10ad540..22cf0b26fa9 100644
--- a/usr.sbin/rpcbind/security.c
+++ b/usr.sbin/rpcbind/security.c
@@ -9,12 +9,9 @@
 #include <rpc/rpc.h>
 #include <rpc/rpcb_prot.h>
 #include <rpc/pmap_prot.h>
-#include <err.h>
 #include <stdio.h>
-#include <stdlib.h>
 #include <string.h>
 #include <unistd.h>
-#include <libutil.h>
 #include <syslog.h>
 #include <netdb.h>
 
diff --git a/usr.sbin/rpcbind/tests/addrmerge_test.c b/usr.sbin/rpcbind/tests/addrmerge_test.c
index 23064f68337..e1600f1a483 100644
--- a/usr.sbin/rpcbind/tests/addrmerge_test.c
+++ b/usr.sbin/rpcbind/tests/addrmerge_test.c
@@ -40,7 +40,6 @@
 
 #include <ifaddrs.h>
 #include <stdlib.h>
-#include <stdio.h>
 
 #include <atf-c.h>
 
diff --git a/usr.sbin/rpcbind/util.c b/usr.sbin/rpcbind/util.c
index 0393bff1c4f..455578b657f 100644
--- a/usr.sbin/rpcbind/util.c
+++ b/usr.sbin/rpcbind/util.c
@@ -42,10 +42,8 @@
 #include <ifaddrs.h>
 #include <sys/poll.h>
 #include <rpc/rpc.h>
-#include <errno.h>
 #include <stdlib.h>
 #include <string.h>
-#include <unistd.h>
 #include <netdb.h>
 #include <netconfig.h>
 #include <stdio.h>
diff --git a/usr.sbin/usbconfig/usbconfig.8 b/usr.sbin/usbconfig/usbconfig.8
index ae6973711bd..2d0a32aa85a 100644
--- a/usr.sbin/usbconfig/usbconfig.8
+++ b/usr.sbin/usbconfig/usbconfig.8
@@ -23,7 +23,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
-.Dd January 6, 2010
+.Dd December 30, 2017
 .Dt USBCONFIG 8
 .Os
 .Sh NAME
@@ -56,45 +56,122 @@ The unit and address coordinates may be prefixed by the lowercased word "ugen".
 Show help and available commands.
 .El
 .Pp
-When called without options,
+The following commands may be used with
+.Nm :
+.Bl -tag -width indent
+.It Cm set_config Ar cfg_index
+Choose the configuration for the USB device.
+Valid values range from zero to the number reported as the
+.Ar bNumConfigurations
+in
+.Cm dump_device_desc
+output.
+The special value of 255 unconfigures the device, detaching
+the interface drivers and reducing the power consumption to minimum,
+but without going into power saving mode or detaching from the bus.
+In some cases, it prevents the device from charging.
+.It Cm set_alt Ar alt_index
+Choose the alternate interface for the USB device.
+Alternative settings for the current configuration are available as the
+.Ar bAlternateSetting
+in
+.Cm dump_curr_config_desc
+output.
+Usually there is no need to adjust this setting.
+.It Cm set_template Ar template
+Set the global USB device side template.
+See
+.Xr usb_template 4
+for more information.
+.It Cm get_template
+Get the current USB device side template.
+.It Cm add_dev_quirk_vplh Ar vid Ar pid Ar lo_rev Ar hi_rev Ar quirk_name
+Add a quirk by specifying the Vendor ID, Product ID, low and high
+revision numbers, and the quirk name.
+See
+.Xr usb_quirk 4
+for more information.
+.It Cm remove_dev_quirk_vplh Ar vid Ar pid Ar lo_rev Ar hi_rev Ar quirk_name
+Remove a quirk.
+.It Cm add_quirk Ar quirk_name
+Add quirk for the currently selected USB device.
+.It Cm remove_quirk Ar quirk_name
+Remove a quirk for the currently selected USB device.
+.It Cm dump_quirk_names
+Display the list of supported quirk names.
+.It Cm dump_device_quirks
+Display the list of current device quirks.
+.It Cm dump_device_desc
+Display the device descriptor.
+.It Cm dump_curr_config_desc
+Display current configuration descriptor.
+.It Cm dump_all_config_desc
+Display all the configuration descriptors.
+.It Cm dump_string Ar index
+Display string descriptor at selected index.
+.It Cm dump_info
+Display summary information about the device.
+.It Cm show_ifdrv
+Display the list of interface drivers (such as
+.Xr ukbd 4
+or
+.Xr u3g 4 )
+currently attached to the device.
+.It Cm suspend
+Force the device to suspend.
+.It Cm resume
+Force the device to resume.
+.It Cm power_off
+Turn the device off.
+.It Cm power_save
+Turn the automatic suspend and resume on.
+This is the default for USB hubs.
+.It Cm power_on
+Turn the device on and disable automatic suspend and resume.
+This is the default for non-hub devices.
+.It Cm reset
+Reset the device.
+This forces the USB stack to reenumerate the bus.
+.It Cm list
+List all available USB devices.
+This is the default if
 .Nm
-prints a list of all available USB devices.
+is called without specifying a command.
+.It Cm do_request Ar bmReqTyp Ar bReq Ar wVal Ar wIdx Ar wLen Ar data...
+Perform a synchronous control request on the specified device.
+See
+.Xr libusb20_dev_request_sync 3
+for more information.
+.El
 .Sh EXAMPLES
 Show information about the device on USB bus 1 at address 2:
 .Pp
-.Dl usbconfig -u 1 -a 2 dump_info
+.Dl usbconfig -d ugen1.2 dump_info
 .Pp
 Dump HID descriptor for device on USB bus 1 at address 2:
 .Pp
-.Dl usbconfig -u 1 -a 2 do_request 0x81 0x06 0x2200 0 0x100
+.Dl usbconfig -d ugen1.2 do_request 0x81 0x06 0x2200 0 0x100
 .Pp
 Dump string descriptor at index Z for device on USB bus 1 at address 2:
 .Pp
-.Dl usbconfig -u 1 -a 2 dump_string Z
+.Dl usbconfig -d ugen1.2 dump_string Z
 .Pp
 Dump current configuration descriptor for device on USB bus 1 at address 2:
 .Pp
-.Dl usbconfig -u 1 -a 2 dump_curr_config_desc
+.Dl usbconfig -d ugen1.2 dump_curr_config_desc
 .Pp
 Dump device descriptor for device on USB bus 1 at address 2:
 .Pp
-.Dl usbconfig -u 1 -a 2 dump_device_desc
+.Dl usbconfig -d ugen1.2 dump_device_desc
 .Pp
 Program the device on USB bus 1 at address 2 to suspend, resume, power off, go into power save, or power on:
 .Pp
-.Dl usbconfig -u 1 -a 2 suspend
-.Dl usbconfig -u 1 -a 2 resume
-.Dl usbconfig -u 1 -a 2 power_off
-.Dl usbconfig -u 1 -a 2 power_save
-.Dl usbconfig -u 1 -a 2 power_on
-.Pp
-Display a list of available quirk names:
-.Pp
-.Dl usbconfig dump_quirk_names
-.Pp
-See
-.Xr usb_quirk 4
-for more information on quirks.
+.Dl usbconfig -d ugen1.2 suspend
+.Dl usbconfig -d ugen1.2 resume
+.Dl usbconfig -d ugen1.2 power_off
+.Dl usbconfig -d ugen1.2 power_save
+.Dl usbconfig -d ugen1.2 power_on
 .Sh SEE ALSO
 .Xr usb 4 ,
-.Xr usb_quirk 4
+.Xr usb_quirk 4 ,
+.Xr usb_template 4