From 462386c6b1ea32c41bc8e73d0369ac1251dd0c72 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Fri, 20 Jan 2012 19:18:11 +0000 Subject: [PATCH] Pull in r148240 from upstream llvm trunk: Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768. In particular, this fixes segfaults during the build of devel/icu on i386. The __sync_synchronize() builtin used for implementing icu's internal barrier could lead to incorrect behaviour. MFC after: 3 days --- contrib/llvm/lib/Target/X86/X86InstrCompiler.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/contrib/llvm/lib/Target/X86/X86InstrCompiler.td b/contrib/llvm/lib/Target/X86/X86InstrCompiler.td index da28690672a..612b2fa66f2 100644 --- a/contrib/llvm/lib/Target/X86/X86InstrCompiler.td +++ b/contrib/llvm/lib/Target/X86/X86InstrCompiler.td @@ -533,7 +533,7 @@ def ATOMSWAP6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2), // Memory barriers // TODO: Get this to fold the constant into the instruction. -let isCodeGenOnly = 1 in +let isCodeGenOnly = 1, Defs = [EFLAGS] in def OR32mrLocked : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero), "lock\n\t" "or{l}\t{$zero, $dst|$dst, $zero}",