From 3b22825af701ad90d220f621ba52ecf86688b5a4 Mon Sep 17 00:00:00 2001 From: John Baldwin Date: Fri, 16 Mar 2012 16:12:10 +0000 Subject: [PATCH] Revert the PCIe 4GB boundary issue workaround now that the proper fix is in HEAD. Ok'd by: scottl --- sys/x86/x86/busdma_machdep.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/sys/x86/x86/busdma_machdep.c b/sys/x86/x86/busdma_machdep.c index 35daa40bc0a..76d49264251 100644 --- a/sys/x86/x86/busdma_machdep.c +++ b/sys/x86/x86/busdma_machdep.c @@ -227,14 +227,6 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, bus_dma_tag_t newtag; int error = 0; - /* Always enforce at least a 4GB (2GB for PAE) boundary. */ -#if defined(__amd64__) - if (boundary == 0 || boundary > ((bus_addr_t)1 << 32)) - boundary = (bus_size_t)1 << 32; -#elif defined(PAE) - if (boundary == 0 || boundary > ((bus_addr_t)1 << 31)) - boundary = (bus_size_t)1 << 31; -#endif /* Basic sanity checking */ if (boundary != 0 && boundary < maxsegsz) maxsegsz = boundary;