From 32d1f18865abe94d351a6f178a93b7195595ec69 Mon Sep 17 00:00:00 2001
From: Andrew Turner <andrew@FreeBSD.org>
Date: Tue, 3 Feb 2026 14:01:32 +0000
Subject: [PATCH] libc/aarch64: Add memset for a 64 byte dc zva

On arm64 we can use the "dc zva" instruction to zero memory. The CPU
tells software if the instruction is implemented, and if so the size
and alignment it will use.

When the size is 64-bytes the Arm Optimized Routines implementation of
memset can use dc zva to zero memory, and has a build flag to skip
checking.

Use this flag to build a version of memset that will be used when this
assumption is true.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D54776
---
 lib/libc/aarch64/string/Makefile.inc      |  4 +++-
 lib/libc/aarch64/string/memset_resolver.c | 13 +++++++++++++
 lib/libc/aarch64/string/memset_zva64.S    |  4 ++++
 3 files changed, 20 insertions(+), 1 deletion(-)
 create mode 100644 lib/libc/aarch64/string/memset_zva64.S

diff --git a/lib/libc/aarch64/string/Makefile.inc b/lib/libc/aarch64/string/Makefile.inc
index 20a844f80e1..bc05e849aa2 100644
--- a/lib/libc/aarch64/string/Makefile.inc
+++ b/lib/libc/aarch64/string/Makefile.inc
@@ -42,7 +42,8 @@ MDSRCS+= \
 	memcpy_resolver.c \
 	memmove_resolver.c \
 	memset.S \
-	memset_resolver.c
+	memset_resolver.c \
+	memset_zva64.S
 
 #
 # Add the above functions. Generate an asm file that includes the needed
@@ -77,3 +78,4 @@ CFLAGS.${FILE}+=-I${SRCTOP}/contrib/arm-optimized-routines/string
 CFLAGS.memchr.S+=-I${SRCTOP}/contrib/arm-optimized-routines/string
 CFLAGS.memcpy.S+=-I${SRCTOP}/contrib/arm-optimized-routines/string
 CFLAGS.memset.S+=-I${SRCTOP}/contrib/arm-optimized-routines/string
+CFLAGS.memset_zva64.S+=-I${SRCTOP}/contrib/arm-optimized-routines/string
diff --git a/lib/libc/aarch64/string/memset_resolver.c b/lib/libc/aarch64/string/memset_resolver.c
index 34ca98aa1d3..277e8c177de 100644
--- a/lib/libc/aarch64/string/memset_resolver.c
+++ b/lib/libc/aarch64/string/memset_resolver.c
@@ -25,18 +25,31 @@
  * SUCH DAMAGE.
  */
 #include <sys/types.h>
+
+#include <machine/armreg.h>
 #include <machine/ifunc.h>
 
 #include <elf.h>
 
 void *__memset_aarch64(void *, int, size_t);
+void *__memset_aarch64_zva64(void *, int, size_t);
 void *__memset_aarch64_mops(void *, int, size_t);
 
 DEFINE_UIFUNC(, void *, memset, (void *, int, size_t))
 {
+	uint64_t dczid;
+
 	if (ifunc_arg->_hwcap2 & HWCAP2_MOPS)
 		return (__memset_aarch64_mops);
 
+	/*
+	 * Check for the DC ZVA instruction, and it will
+	 * zero 64 bytes (4 * 4byte words).
+	 */
+	dczid = READ_SPECIALREG(dczid_el0);
+	if ((dczid & DCZID_DZP) == 0 && DCZID_BS_SIZE(dczid) == 4)
+		return (__memset_aarch64_zva64);
+
 	return (__memset_aarch64);
 }
 
diff --git a/lib/libc/aarch64/string/memset_zva64.S b/lib/libc/aarch64/string/memset_zva64.S
new file mode 100644
index 00000000000..7f1cf6ba577
--- /dev/null
+++ b/lib/libc/aarch64/string/memset_zva64.S
@@ -0,0 +1,4 @@
+/* Used when we know we have a 64-byte dc zva instruction */
+#define	__memset_aarch64	__memset_aarch64_zva64
+#define	SKIP_ZVA_CHECK
+#include "aarch64/memset.S"