powerpc/pmap/oea64: Make PV_LOCK superpage sized
HPT superpages are 16MB, not 2MB. Taking 8 locks to lock a super page almost defeats the purpose of using the super page. Expanding the PV_LOCK scope to cover 16MB (24 bit shift) reduces this to a single lock. MFC after: 3 weeks
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@@ -125,7 +125,7 @@ uintptr_t moea64_get_unique_vsid(void);
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#define PV_LOCK_COUNT MAXCPU
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#define PV_LOCK_COUNT MAXCPU
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static struct mtx_padalign pv_lock[PV_LOCK_COUNT];
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static struct mtx_padalign pv_lock[PV_LOCK_COUNT];
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#define PV_LOCK_SHIFT 21
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#define PV_LOCK_SHIFT HPT_SP_SIZE
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#define pa_index(pa) ((pa) >> PV_LOCK_SHIFT)
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#define pa_index(pa) ((pa) >> PV_LOCK_SHIFT)
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/*
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/*
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@@ -146,48 +146,6 @@ static struct mtx_padalign pv_lock[PV_LOCK_COUNT];
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#define PV_PAGE_UNLOCK(m) PV_UNLOCK(VM_PAGE_TO_PHYS(m))
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#define PV_PAGE_UNLOCK(m) PV_UNLOCK(VM_PAGE_TO_PHYS(m))
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#define PV_PAGE_LOCKASSERT(m) PV_LOCKASSERT(VM_PAGE_TO_PHYS(m))
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#define PV_PAGE_LOCKASSERT(m) PV_LOCKASSERT(VM_PAGE_TO_PHYS(m))
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/* Superpage PV lock */
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#define PV_LOCK_SIZE (1 << PV_LOCK_SHIFT)
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static __always_inline void
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moea64_sp_pv_lock(vm_paddr_t pa)
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{
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vm_paddr_t pa_end;
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/* Note: breaking when pa_end is reached to avoid overflows */
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pa_end = pa + (HPT_SP_SIZE - PV_LOCK_SIZE);
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for (;;) {
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mtx_lock_flags(PV_LOCKPTR(pa), MTX_DUPOK);
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if (pa == pa_end)
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break;
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pa += PV_LOCK_SIZE;
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}
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}
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static __always_inline void
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moea64_sp_pv_unlock(vm_paddr_t pa)
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{
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vm_paddr_t pa_end;
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/* Note: breaking when pa_end is reached to avoid overflows */
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pa_end = pa;
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pa += HPT_SP_SIZE - PV_LOCK_SIZE;
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for (;;) {
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mtx_unlock_flags(PV_LOCKPTR(pa), MTX_DUPOK);
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if (pa == pa_end)
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break;
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pa -= PV_LOCK_SIZE;
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}
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}
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#define SP_PV_LOCK_ALIGNED(pa) moea64_sp_pv_lock(pa)
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#define SP_PV_UNLOCK_ALIGNED(pa) moea64_sp_pv_unlock(pa)
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#define SP_PV_LOCK(pa) moea64_sp_pv_lock((pa) & ~HPT_SP_MASK)
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#define SP_PV_UNLOCK(pa) moea64_sp_pv_unlock((pa) & ~HPT_SP_MASK)
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#define SP_PV_PAGE_LOCK(m) SP_PV_LOCK(VM_PAGE_TO_PHYS(m))
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#define SP_PV_PAGE_UNLOCK(m) SP_PV_UNLOCK(VM_PAGE_TO_PHYS(m))
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struct ofw_map {
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struct ofw_map {
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cell_t om_va;
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cell_t om_va;
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cell_t om_len;
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cell_t om_len;
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@@ -3736,7 +3694,7 @@ moea64_sp_enter(pmap_t pmap, vm_offset_t va, vm_page_t m,
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}
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}
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}
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}
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SP_PV_LOCK_ALIGNED(spa);
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PV_LOCK(spa);
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PMAP_LOCK(pmap);
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PMAP_LOCK(pmap);
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/* Note: moea64_remove_locked() also clears cached REF/CHG bits. */
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/* Note: moea64_remove_locked() also clears cached REF/CHG bits. */
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@@ -3775,7 +3733,7 @@ moea64_sp_enter(pmap_t pmap, vm_offset_t va, vm_page_t m,
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}
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}
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PMAP_UNLOCK(pmap);
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PMAP_UNLOCK(pmap);
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SP_PV_UNLOCK_ALIGNED(spa);
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PV_UNLOCK(spa);
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sync = (sm->a.flags & PGA_EXECUTABLE) == 0;
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sync = (sm->a.flags & PGA_EXECUTABLE) == 0;
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/* Note: moea64_pvo_cleanup() also clears page prot. flags. */
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/* Note: moea64_pvo_cleanup() also clears page prot. flags. */
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